| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
[lldb] Fix undefined behavior (#158119) https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/lldb-cmake-sanitized/2178/consoleText [2025-09-11T13:10:53.352Z] /Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-sanitized/llvm-project/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp:14138:35: runtime error: signed integer overflow: 2147483624 + 608 cannot be represented in type 'int32_t' (aka 'int') [2025-09-11T13:10:53.352Z] SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior /Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-sanitized/llvm-project/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp:14138:35 in | 10 个月前 | |
[lldb/aarch64] Add STR/LDR instructions for FP registers to Emulator (#168187) A function prologue can begin with a pre-index STR instruction for a floating-point register. To construct an unwind plan from assembly correctly, the instruction emulator must support such instructions. | 8 个月前 | |
[lldb][RISCV] fix LR/SC atomic sequence handling in lldb-server (#146072) lldb-server had limited support for single-stepping through the lr/sc atomic sequence. This patch enhances that support for all possible atomic sequences. The previous version contained an incorrect regex pattern in the test, causing the riscv-specific test to run on other platforms. This reland fixes the regex (see lldb/test/API/riscv/step/TestSoftwareStep.py) | 1 年前 | |
MC: Add Triple overloads for more MC constructors (#157321) Avoids more Triple->string->Triple round trip. This is a continuation of f137c3d592e96330e450a8fd63ef7e8877fc1908 | 10 个月前 | |
MC: Add Triple overloads for more MC constructors (#157321) Avoids more Triple->string->Triple round trip. This is a continuation of f137c3d592e96330e450a8fd63ef7e8877fc1908 | 10 个月前 | |
[lldb/cmake] Implicitly pass arguments to llvm_add_library (#142583) If we're not touching them, we don't need to do anything special to pass them along -- with one important caveat: due to how cmake arguments work, the implicitly passed arguments need to be specified before arguments that we handle. This isn't particularly nice, but the alternative is enumerating all arguments that can be used by llvm_add_library and the macros it calls (it also relies on implicit passing of some arguments to llvm_process_sources). | 1 年前 | |
[lldb][RISCV] Fix float load and stores in RISC-V emulator (#167490) This patch fixes 2 fundamental problems in emulating FLW, FSW, FLD and FSD instructions. 1. Instructions immediate wasn't sign extended 2. Store instructions always wrote for 64 bits to memory Also this patch fixes 2 lldb tests for RISC-V: TestThreadJump.py and TestBreakpointHitCount.py | 8 个月前 | |
| 1 年前 |