| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
[mlir][linalg] Clean up op verifiers without custom checks(NFC) (#168712) This PR removes op verifiers that do not implement any custom verification logic. | 8 个月前 | |
[mlir][linalg-transform] dyn_cast DestinationStyleOpInterface and early return (#166299) Use dyn_cast instead of cast and early return if op does not implement the DestinationStyleOpInterface. Before the change the following IR would cause a segfault when the transform interpreter is run, where myop.a and myop.b implement the TilingInterface and not the DestinationStyleOpInterface. Tried looking for ops in the upstream dialect that implement the TilingInterface and not the DestinationStyleOpInterface to add a test but could not find any. mlir module { func.func @fuse(%arg0: tensor<4x4x4xf32>, %arg1: tensor<4x4x4xf32>) -> tensor<4x4x4xf32> { %mul = "myop.a"(%arg0, %arg1) : (tensor<4x4x4xf32>, tensor<4x4x4xf32>) -> tensor<4x4x4xf32> %add = "myop.b"(%mul, %mul) : (tensor<4x4x4xf32>, tensor<4x4x4xf32>) -> tensor<4x4x4xf32> return %add : tensor<4x4x4xf32> } transform.sequence failures(propagate) { ^bb0(%func: !transform.any_op): %mul = transform.structured.match ops{["myop.a"]} in %func : (!transform.any_op) -> !transform.any_op %add = transform.structured.match ops{["myop.b"]} in %func : (!transform.any_op) -> !transform.any_op %loop, %tiled = transform.structured.tile_using_forall %add tile_sizes [1, 2, 4] : (!transform.any_op) -> (!transform.any_op, !transform.any_op) %mul_fused, %mul_containing = transform.structured.fuse_into_containing_op %mul into %tiled : (!transform.any_op, !transform.any_op) -> (!transform.any_op, !transform.any_op) } } | 9 个月前 | |
[mlir][vector] Missing indices on vectorization of 1-d reduction to 1-ranked memref (#166959) Vectorization of a 1-d reduction where the output variable is a 1-ranked memref can generate an invalid vector.transfer_write with no indices for the memref, e.g.: vector.transfer_write"(%vec, %buff) <{...}> : (vector<f32>, memref<1xf32>) -> () This patch solves the problem by providing the expected amount of indices (i.e. matching the rank of the memref). | 8 个月前 | |
[Linalg] Add *Conv1D* matchers (#168050) -- This commit is the second in the series of adding matchers for linalg.*conv*/*pool*. Refer: https://github.com/llvm/llvm-project/pull/163724 -- In this commit all variants of Conv1D convolution ops have been added. -- For sake of completion for a specific infra required for those ops which don't require dilations/strides information during their creation, this commit also includes a basic Conv2D and Conv3D op as part of the lit test. Signed-off-by: Abhishek Varma <abhvarma@amd.com> | 8 个月前 | |
[mlir] Remove Linalg fusion-on-memrefs. PSA: https://discourse.llvm.org/t/psa-retire-tileandfuselinalgops-method/63850 Differential Revision: https://reviews.llvm.org/D141807 | 3 年前 |
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| 3 年前 |