| [lld][AArch64] Fix handling of SHT_REL relocation addends. (#98291) | 1 年前 |
| [AMDGPU] Introduce Code Object V6 (#76954) | 2 年前 |
| [lld][ARM] Fix assertion when mixing ARM and Thumb objects (#101985) | 1 年前 |
| Fix R_AVR_7_PCREL and R_AVR_13_PCREL range checking (#92695) | 2 年前 |
| [lld][Hexagon] Fix R_HEX_B22_PCREL range checks (#115925) | 1 年前 |
| [lld][ELF][LoongArch] Support R_LARCH_TLS_{LD,GD,DESC}_PCREL_S2 | 1 年前 |
| [ELF] Clean up headers. NFC | 4 年前 |
| [Object,ELFType] Rename TargetEndianness to Endianness (#86604) | 2 年前 |
| [ELF] Remove ctx indirection. NFC | 3 年前 |
| [ELF] Implement getImplicitAddend and enable checkDynamicRelocsDefault for PPC32 | 2 年前 |
| [ELF] Set ctx.internalFile for PPC64 _savegpr[01]_{14..31} and _restgpr[01]_{14..31}. NFC | 2 年前 |
| [LLD][PowerPC] Implement GOT to PC-Rel relaxation | 5 年前 |
| [lld][RISCV] Add break to nested switch in mergeAtomic (#99762) | 1 年前 |
| [ELF] Clean up headers. NFC | 4 年前 |
| [lld] Add target support for SystemZ (s390x) (#75643) | 2 年前 |
| [ELF] Support TLS GD/LD relaxations for x86-32 -fno-plt | 3 年前 |
| [ELF] -no-pie: don't optimize addq R_X86_64_REX_GOTPCRELX when !isInt<32>(va) | 1 年前 |