文件最后提交记录最后更新时间
[Backend] Bump to llvm/llvm-project@bc773632355b (#7881) * Switched Constant{Int|Float}Op type and value order following llvm/llvm-project@a45fda6aeba362926da6cc1b107be92dafb0d490 * Provided triple for TargetLibraryInfoImpl following llvm/llvm-project@c91cbafad2119cace85499e8d231b8e5737f3b41 * Fixed atomic sync scope for NVIDIA following llvm/llvm-project@0f1b16dd5f83fd931ecb111bb925ac9e1d56f589 * Updated MLIR lib names following llvm/llvm-project@e68a20e0b7623738d6af736d3aa02625cba6126a * Updated nvvm.stmatrix op following llvm/llvm-project@2b27377b0bf72e4524774dedf4b03521b07606d5 * Updated ROCDL::Mbcnt{Lo|Hi}Op following llvm/llvm-project@bbe3d64b39d80c2d6132fbad6008b2a6e86fd4d5 Closes https://github.com/triton-lang/triton/pull/7413 Closes https://github.com/triton-lang/triton/pull/7575 Closes https://github.com/triton-lang/triton/pull/7765 --------- Co-authored-by: Yi Qian <yi.qian@amd.com> Co-authored-by: Thomas Raoux <thomas.raoux@openai.com>9 个月前
[AMD] Add TritonAMDGPU dialect scaffolding (#4685) This PR adds an TritonAMDGPU dialect to host future AMD specific ops to help with AMD backend CodeGen. --------- Co-authored-by: Ognjen Plavsic <ognjen.plavsic@luxoft.com> Co-authored-by: Lei Zhang <antiagainst@gmail.com>1 年前