文件	最后提交记录	最后更新时间
bin	Fix compilation error on Ubuntu 22.04 Default /bin/sh does not support '\|&', change into portable '2>&1 \|' to fix build errors like below: >cd rv32ui-p-add; vvp /work/e203_hbirdv2/vsim/run/vvp.exec -lxt2 +DUMPWAVE=1 +TESTCASE=/work/e203_hbirdv2/vsim/run/../../riscv-tools/riscv-tests/isa/generated/rv32ui-p-add +SIM_TOOL=iverilog \|& tee rv32ui-p-add.log; cd /work/e203_hbirdv2/vsim/run; >/bin/sh: 1: Syntax error: "&" unexpected >make[1]: *** [Makefile:131: run] Error 2	3 年前
.gitignore	Initial commit of Hummingbirdv2	6 年前
Makefile	rtl: convert peripheral IPs implemented by system verilog to verilog implementation vsim: add iVerilog and GTKWave tool support	5 年前
README.md	fix typo	3 年前

The Simulation Directory

Here we use iVerilog+GTKWave for simulation by default, and VCS+Verdi are also supported in simulation environment, you can choose the simulation tool by Makefile variable SIM. If you want to run simulation tests directly, please make sure these EDA tools are installed in your working environment.

Preparation

make clean

make install

Compile

make compile SIM=iverilog or make compile SIM=VCS

Run Test

make run_test SIM=iverilog or make run_test SIM=vcs

Check Waveform

make wave SIM=iverilog or make wave SIM=vcs

Note:

If you use iVerilog as simulation tool, please make sure the tool verison is 12.0.