// Configuration for a single-core CPU.

// Common params.
num_cores       1
line_size       64
cpu_scheduling  true
sim_refs        8888888
skip_refs       1000000
warmup_fraction 0.8
coherence       true
use_physical    true

// Cache params.
P0L1I {                        // P0 L1 I$
  type            instruction
  core            0
  size            65536
  assoc           8
  parent          P0L2
  replace_policy  LRU
}
P0L1D {                        // P0 L1 D$
  type            data
  core            0
  size            65536
  assoc           8
  parent          P0L2
  replace_policy  LRU
}
P0L2 {                         // P0 L2$
  size            512K
  assoc           16
  inclusive       true
  parent          LLC
  replace_policy  LRU
}
LLC {                          // LLC
  size            1M
  assoc           16
  inclusive       true
  parent          memory
  replace_policy  LRU
  miss_file       misses.txt
}