| 文件 | 最后提交记录 | 最后更新时间 |
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i#5365: Add AArch64 SVE support to the core (part 1) (#5835) This patch adds Arm AArch64 Scalable Vector Extension (SVE) support to the core including related changes to the codec, IR and relevant clients. SVE and SVE2 are major extensions to Arm's 64 bit architecture. Developers and users should reference the relevant documentation at developer.arm.com, (currently https://developer.arm.com/Architectures/Scalable%20Vector%20Extensions). The architecture allows hardware implementations to support vector lengths from 128 to 2048 bits. This patch supports up to 512 bits due to DynamoRIO's stack size limitation. There is currently no stock SVE hardware with vector lengths greater than 512 bits. The vector length is determined by get_processor_specific_info() at runtime on startup and is available by calling proc_get_vector_length(). For Z registers, reg_get_size() will return the vector size implemented by the hardware rather than OPSZ_SCALABLE. There will be follow up patches for: - SVE scatter/gather emulation - Full SVE signal context support - Complete SVE support in sample clients and drcachesim tracer. Issues: #5365, #3044 --------- Co-authored-by: Cam Mannett <camden.mannett@arm.com> | 2 年前 | |
i#5365: Add AArch64 SVE support to the core (part 1) (#5835) This patch adds Arm AArch64 Scalable Vector Extension (SVE) support to the core including related changes to the codec, IR and relevant clients. SVE and SVE2 are major extensions to Arm's 64 bit architecture. Developers and users should reference the relevant documentation at developer.arm.com, (currently https://developer.arm.com/Architectures/Scalable%20Vector%20Extensions). The architecture allows hardware implementations to support vector lengths from 128 to 2048 bits. This patch supports up to 512 bits due to DynamoRIO's stack size limitation. There is currently no stock SVE hardware with vector lengths greater than 512 bits. The vector length is determined by get_processor_specific_info() at runtime on startup and is available by calling proc_get_vector_length(). For Z registers, reg_get_size() will return the vector size implemented by the hardware rather than OPSZ_SCALABLE. There will be follow up patches for: - SVE scatter/gather emulation - Full SVE signal context support - Complete SVE support in sample clients and drcachesim tracer. Issues: #5365, #3044 --------- Co-authored-by: Cam Mannett <camden.mannett@arm.com> | 2 年前 | |
Aarch64: Remove unused function get_fcache_return_tls_offs (#6296) The internal API get_fcache_return_tls_offs() was never used in Aarch64 and this patch removes it. Also changed the function signature in ARM to be static. | 2 年前 | |
i#5383 mac a64, part 1: Build on M1 (#5610) This patch adds enough support to run simple hello world on M1 MacOS. It separates x86 and aarch64 Mac code in many places, adjusts the TLS from tpidr_el0 to tpidrro_el0, tweaks the assembly syntax, adds support for decoding and handling some of the pointer authentication opcodes in ARMv8.3 (mainly just strips off any PAC bits before jumping anywhere), adds pthread_jit_write_protect_np() calls for written executable code, and updates the system call number register. There are a number of unresolved and missing pieces, which are marked with comments in the code: + DR_TLS_BASE_OFFSET needs further investigation + dynamorio_{sigreturn,exit} are NYI + The pointer authentication opcodes need tests, and the full set of opcodes needs to be added + The gettimeofday library call inserted here should be replaced with a system call. + The PTHREAD_JIT_WRITE calls are likely missing from some places and not at the right level to be most efficient. Original version contributed by: Anthony Romano <anthony@forallsecure.com> Co-authored-by: Anthony Romano <anthony@forallsecure.com> Issue: #5383 | 3 年前 | |
i#1569 AArch64: Add files in core/arch/aarch64/. This continues filling in the code needed for AArch64 but with empty work-in-progress function bodies. Review-URL: https://codereview.appspot.com/287370043 | 10 年前 | |
i#5365: Add AArch64 SVE support to the core (part 1) (#5835) This patch adds Arm AArch64 Scalable Vector Extension (SVE) support to the core including related changes to the codec, IR and relevant clients. SVE and SVE2 are major extensions to Arm's 64 bit architecture. Developers and users should reference the relevant documentation at developer.arm.com, (currently https://developer.arm.com/Architectures/Scalable%20Vector%20Extensions). The architecture allows hardware implementations to support vector lengths from 128 to 2048 bits. This patch supports up to 512 bits due to DynamoRIO's stack size limitation. There is currently no stock SVE hardware with vector lengths greater than 512 bits. The vector length is determined by get_processor_specific_info() at runtime on startup and is available by calling proc_get_vector_length(). For Z registers, reg_get_size() will return the vector size implemented by the hardware rather than OPSZ_SCALABLE. There will be follow up patches for: - SVE scatter/gather emulation - Full SVE signal context support - Complete SVE support in sample clients and drcachesim tracer. Issues: #5365, #3044 --------- Co-authored-by: Cam Mannett <camden.mannett@arm.com> | 2 年前 |
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