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GGitHubi#3544 RV64: Fix AUIPC uimm sign-extension issue (#6306)

7c7734ab创建于 2023年9月11日历史提交

文件	最后提交记录	最后更新时间
isl	i#3544 RV64: Include implicit operands in instr_t (#6304) The RISC-V compressed extension (RVC) contains some instructions that have implicit operands, e.g.: C.JR expands to jalr x0, 0(rs1); C.JALR expands to jalr x1, 0(rs1). This patch puts these implicit operands into instr_t.	2 年前
codec.c	i#3544 RV64: Fix AUIPC uimm sign-extension issue (#6306) The "u" in uimm means U-type, not unsigned, the immediate is a signed integer. This patch fixes this issue and adds a test case for it. Issue: #3544	2 年前
codec.h	i#3544 RV64: Include implicit operands in instr_t (#6304) The RISC-V compressed extension (RVC) contains some instructions that have implicit operands, e.g.: C.JR expands to jalr x0, 0(rs1); C.JALR expands to jalr x1, 0(rs1). This patch puts these implicit operands into instr_t.	2 年前
codec.py	i#3544 RV64: Include implicit operands in instr_t (#6304) The RISC-V compressed extension (RVC) contains some instructions that have implicit operands, e.g.: C.JR expands to jalr x0, 0(rs1); C.JALR expands to jalr x1, 0(rs1). This patch puts these implicit operands into instr_t.	2 年前
decode.c	i#3544 RV64: Added a new immediate format for AUIPC (#6208) AUIPC is a PC-relative instruction, which needs to be mangled before going into fcache, so the src opnd needs to be a PC or instr. This patch added a new immediate type called u_immpc for AUIPC to achieve this. Issue: https://github.com/DynamoRIO/dynamorio/issues/3544	2 年前
decode_private.h	i#3544 RV64: Added an encoder and some fixes and improvments to the decoder (#6095) This patch added the following changes: 1. Added an encoder 2. Fixed various disassemble issues 3. Optimized disassembled immediate format 4. Added unit tests for the encoder and decoder Issue: #3544	3 年前
disassemble.c	i#3544 RV64: Added an encoder and some fixes and improvments to the decoder (#6095) This patch added the following changes: 1. Added an encoder 2. Fixed various disassemble issues 3. Optimized disassembled immediate format 4. Added unit tests for the encoder and decoder Issue: #3544	3 年前
encode.c	i#3544 RV64: Assert AUIPC instruction imm alignment (#6254) Adds an assert to encode_u_immpc_opnd to ensure that the lower 12 bits of imm are all 0s. Also, in order to share .expect files between static link and dynamic link tests, we added the ability to ignore specific lines in runcmp.cmake and removed the dependence on the external diff command. Note that we fall back to STREQUAL when the expected file is too large. We can use ZIP_LISTS to provide better performance, but this feature requires CMake 3.17, but bumping to 3.17 requires some effort on the Windows side. Related: #6208 Issue: #3544	2 年前
instr.c	i#3544 RV64: Refine instr_branch_type (#6307) Implements instr_branch_type(), which is called during the execution of a simple program. Since compressed instructions have all the implicit operands listed in instr_t, they don't need any special treatment. Issue: #3544	2 年前
instr_create_api.h.in	i#3544 RV64 XINST_CREATE: Implement platform-independent macros (#6300) Implement platform-independent XINST_CREATE_xxx macros, also remove APIs that do not make sense for RISC-V.	2 年前
ir_utils.c	i#3544 RV64: Implemented insert_mov_immed_arch (#6210) Similar to the LI pseudo instruction of RISC-V, insert_mov_immed_arch() can generate as few instructions as possible to load an arbitrary 64-bit immediate value into the specified register dst. Issue: https://github.com/DynamoRIO/dynamorio/issues/3544	2 年前
opcode_api.h.in	i#3544 riscv64, part 4: generate opcodes and instruction create macros (#5669) Convert instr_create_api.h and opcode_api.h to templates used by codec.py to generate final files. As a result, add the codec.py to the build system and fixup opcode references which aren't valid anymore now that opcodes are named as in the Instruction Set Listing files. Issue #3544 Signed-off-by: Stanislaw Kardach <kda@semihalf.com>	3 年前
opnd.c	i#3544 RISC-V, part 14: add missing FIXME comments (#5631) Add missing "Not implemented" FIXME comments so that all missing implementation is marked with those. Issue #3544 Signed-off-by: Stanislaw Kardach <kda@semihalf.com>	3 年前
trie.h	i#3544 riscv64, part 1: add instruction codec (#5666) Add the main source file for instruction codec whose goal is to decode and encode all RISC-V instructions. At the moment only the decoding part is implemented. The decoding process is based on instr_info_t structures and is separated into two stages: 1. Instruction opcode decoding to retrieve a corresponding rv_instr_info_t. This gives the codec information on the number and type of source and destination operands. 2. Instruction operand decoding. All operands are decodec utilizing the data from instr_info_t and a set of operand decoder functions gathered in the opnd_decoders array indexed by the operand field type. Note: The codec.c file is not yet added to the build system as it relies on a set of generated files with opcode and instr_info_t data. The script for that as well as Instruction Set Listing files will follow in later commits. Note 2: There is currently no support for decoding of translated instructions and hence orig_pc is never used. In fact all base+disp operands utilize opnd_create_mem_instr() which id described as a PC-relative memory reference, so it "should" be resistant to the change in base address. Issue #3544 Signed-off-by: Stanislaw Kardach <kda@semihalf.com>	3 年前