* Copyright (c) 2025 Huawei Technologies Co., Ltd.
* This program is free software, you can redistribute it and/or modify it under the terms and conditions of
* CANN Open Software License Agreement Version 2.0 (the "License").
* Please refer to the License for details. You may not use this file except in compliance with the License.
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
* See LICENSE in the root of the software repository for the full text of the License.
*/
* \file sigmoid_3510_impl.h
* \brief
*/
#if !defined(__ASCENDC_INCLUDE_INTERNAL_HEADERS__)
#pragma message( \
"impl/adv_api/detail/activation/sigmoid/sigmoid_3510_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file may be removed in the future. Please use \"#include \"adv_api/activation/sigmoid.h\"\" and use public functions or variables defined in interface headers files.")
#define __ASCENDC_INCLUDE_INTERNAL_HEADERS__
#define __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_SIGMOID_C310_IMPL_H__
#endif
#ifndef IMPL_ACTIVATION_SIGMOID_C310_IMPL_H
#define IMPL_ACTIVATION_SIGMOID_C310_IMPL_H
#include "kernel_tensor.h"
#include "kernel_pop_stack_buffer.h"
#include "../../common/common.h"
namespace AscendC {
namespace Internal {
* Formula is y= 1 / (1 + exp(-x))
*/
template <typename T>
__simd_vf__ inline void SigmoidImplVF(__ubuf__ T* dstUb, __ubuf__ T* srcUb, uint32_t count, const uint16_t repeatTimes)
{
uint32_t sreg = count;
Reg::MaskReg preg;
Reg::RegTensor<T> srcReg;
Reg::RegTensor<float> castReg;
Reg::RegTensor<float> tmpReg;
Reg::RegTensor<float> dstReg;
for (uint16_t i = 0; i < repeatTimes; ++i) {
preg = Reg::UpdateMask<float>(sreg);
if constexpr (sizeof(T) == sizeof(half)) {
Reg::LoadAlign<T, Reg::LoadDist::DIST_UNPACK_B16>(srcReg, srcUb + i * B32_DATA_NUM_PER_REPEAT);
Reg::Cast<float, T, castTraitB16ToB32>(castReg, srcReg, preg);
} else {
Reg::LoadAlign(castReg, srcUb + i * B32_DATA_NUM_PER_REPEAT);
}
Reg::Muls(tmpReg, castReg, -1.0f, preg);
Reg::Exp(tmpReg, tmpReg, preg);
Reg::Adds(tmpReg, tmpReg, 1.0f, preg);
Reg::Duplicate(dstReg, 1.0f, preg);
Reg::Div(dstReg, dstReg, tmpReg, preg);
if constexpr (sizeof(T) == sizeof(half)) {
Reg::Cast<T, float, castTraitB32ToB16>(srcReg, dstReg, preg);
Reg::StoreAlign<T, Reg::StoreDist::DIST_PACK_B32>(dstUb + i * B32_DATA_NUM_PER_REPEAT, srcReg, preg);
} else {
Reg::StoreAlign(dstUb + i * B32_DATA_NUM_PER_REPEAT, dstReg, preg);
}
}
}
}
template <typename T, bool isReuseSource = false>
__aicore__ inline void SigmoidImpl(
const LocalTensor<T>& dstTensor, const LocalTensor<T>& srcTensor, const LocalTensor<uint8_t>& sharedTmpBuffer,
const uint32_t calCount)
{
if ASCEND_IS_AIC {
return;
}
static_assert(SupportType<T, half, float>(), "current data type is not supported on current device!");
CheckTensorPos<T>(dstTensor, Hardware::UB, "dstTensor", "VECIN / VECCALC / VECOUT", "Sigmoid");
CheckTensorPos<T>(srcTensor, Hardware::UB, "srcTensor", "VECIN / VECCALC / VECOUT", "Sigmoid");
CheckTensorPos<uint8_t>(sharedTmpBuffer, Hardware::UB, "sharedTmpBuffer", "VECIN / VECCALC / VECOUT", "Sigmoid");
ASCENDC_ASSERT((calCount <= srcTensor.GetSize()), {
KERNEL_LOG(
KERNEL_ERROR, "calCount is %u, which should not be larger than srcTensor length %u", calCount,
srcTensor.GetSize());
});
ASCENDC_ASSERT((calCount <= dstTensor.GetSize()), {
KERNEL_LOG(
KERNEL_ERROR, "calCount is %u, which should not be larger than dstTensor length %u", calCount,
dstTensor.GetSize());
});
__ubuf__ T* dstUb = (__ubuf__ T*)dstTensor.GetPhyAddr();
__ubuf__ T* srcUb = (__ubuf__ T*)srcTensor.GetPhyAddr();
uint16_t repeatTimes = CeilDivision(calCount, B32_DATA_NUM_PER_REPEAT);
Internal::SigmoidImplVF<T>(dstUb, srcUb, calCount, repeatTimes);
}
}
#endif
#if defined(__UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_SIGMOID_C310_IMPL_H__)
#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__
#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_SIGMOID_C310_IMPL_H__
#endif