#ifndef IOCTL_COMMON_DEF_H
#define IOCTL_COMMON_DEF_H
#define IOCTL_GET_NODE_INFO 0x0101
#define IOCTL_GET_HEAD_INFO 0x0102
#define HEADER_VERSION 0x2001001
#define INVALID_PORTID 0xFFFF
#define INDEX_NOT_FOUND ((unsigned int)-1)
#define SHM_SIZE (256 + 7 * 1024 * 256)
#define MAX_PROCESS_NUM 15
#define PROC_ID_POINTER_OFFSET 2
#define THREAD_SLEEP (300 * 1000)
#define ODA_REPORT_FAULT_FATAL 155907
#define ODA_REPORT_FAULT_PCIE 155649
#define ODA_REPORT_FAULT_MEM_MULTI 155904
#define ODA_REPORT_FAULT_BLOCK_C 132134
#define ODA_REPORT_FAULT_M7 155911
#define ODA_REPORT_FAULT_CONFIG 155908
#define ODA_REPORT_FAULT_BY_DEVICE 155909
#define ODA_REPORT_PORT_FAULT_FAIL 155912
#define ODA_REPORT_PORT_FAULT_UNSTABLE 155913
#define ODA_REPORT_PORT_FAULT_INVALID_PKG 155914
#define ODA_REPORT_PORT_FAULT_DOWN 0xFFFFFFFF
#define ODA_REPORT_PORT_FAULT_LANE_REDUCE_HALF 132332
#define ODA_REPORT_PORT_FAULT_LANE_REDUCE_QUARTER 132333
#define LQ_DCMI_OK 0
#define LQ_DCMI_ERR_CODE_INVALID_PARAMETER (-8001)
#define LQ_DCMI_ERR_CODE_LOG_CREATE_FAIL (-8002)
#define LQ_DCMI_ERR_CODE_MEM_CREATE_FAIL (-8003)
#define LQ_DCMI_ERR_CODE_DEVICE_OPEN_FAIL (-8004)
#define LQ_DCMI_ERR_CODE_IOCTL_FAIL (-8005)
#define LQ_DCMI_ERR_CODE_LOCK_CREATE_FAIL (-8006)
#define LQ_DCMI_ERR_CODE_UPDATETHREAD_CREATE_FAIL (-8007)
#define LQ_DCMI_ERR_CODE_VERSION_IMCOMPATIBLE (-8008)
#define LQ_DCMI_ERR_CODE_INTERFACE_INIT_FAIL (-8009)
#define LQ_DCMI_ERR_CODE_MAX_PROCESS_EXCEEDED (-8010)
#define LQ_DCMI_ERR_CODE_MMAP_FAIL (-8011)
#define LQ_DCMI_ERR_CODE_MEM_SET_FAIL (-8012)
#define LQ_DCMI_ERR_CODE_MEM_COPY_FAIL (-8013)
#define LQ_DCMI_ERR_CODE_MAX_SUBCRIBLE_NUMS_EXCEEDED (-8014)
#define LQ_DCMI_ERR_CODE_INVALID_FILTER (-8015)
#define LQ_DCMI_ERR_CODE_UNSUBSCRIBE_FAIL (-8016)
#define LQ_DCMI_ERR_CODE_INTERFACE_INIT_DUPLICATE (-8017)
#define NUM_CHIP 7
#define NUM_PORTS 48
#define CAPACITY 30
typedef struct {
unsigned int version;
unsigned int length;
unsigned int nodeSize;
unsigned int nodeNum;
unsigned int nodeHead;
unsigned int nodeTail;
unsigned long startTimeMs;
unsigned int disable;
unsigned int overflowflag;
unsigned char resverd[216];
} SramDescCtlHeader;
typedef struct {
unsigned int msgId;
unsigned int devId;
unsigned char res[8];
} SramFaultEventHead;
typedef struct {
SramFaultEventHead head;
unsigned char data[240];
} SramFaultEventData;
typedef struct {
unsigned int eventType;
unsigned int subType;
unsigned short peerportDevice;
unsigned short peerportId;
unsigned short switchChipid;
unsigned short switchPortid;
unsigned char severity;
unsigned char assertion;
char res[6];
unsigned int eventSerialNum;
unsigned int notifySerialNum;
unsigned long alarmRaisedTime;
unsigned char additionalParam[40];
char additionalInfo[32];
} LqDcmiEvent;
typedef enum {
RECOVERY = 0,
FAULT = 1
} Assertion;
typedef enum {
CHIP_ALARM = 1,
PORT_ALARM = 2
} AlarmType;
typedef struct {
unsigned int portId;
unsigned int alarmFlag;
LqDcmiEvent portNodeInfo;
} PortFaultInfo;
typedef struct {
unsigned int chipId;
unsigned int alarmFlag;
LqDcmiEvent chipNodeInfo;
PortFaultInfo portFaultInfo[NUM_PORTS];
} ChipFaultInfo;
typedef struct {
unsigned int subType;
unsigned int alarmFlag;
unsigned int chipId;
ChipFaultInfo chipFaultInfo[NUM_CHIP];
} FaultEventNodeTable;
typedef struct {
int cmd;
int len;
void *in_addr;
void *out_addr;
size_t out_size;
} IOCTL_CMD_S;
typedef struct IOCTL_CMD_INFO_tag {
int cmd;
int (*cmd_fun_pre)(void);
int (*cmd_fun)(IOCTL_CMD_S *ioctl_cmd);
} IOCTL_CMD_INFO_S;
typedef struct {
unsigned int event_type;
unsigned int sub_type;
unsigned int index;
} EventMapping;
#define EVENT_MAPPING_INITIALIZER \
{ \
{0x00f1fef5, ODA_REPORT_PORT_FAULT_INVALID_PKG, 0}, \
{0x00f1fef5, ODA_REPORT_PORT_FAULT_UNSTABLE, 1}, \
{0x00f1fef5, ODA_REPORT_PORT_FAULT_FAIL, 2}, \
{0x00f103b6, ODA_REPORT_FAULT_BY_DEVICE, 3}, \
{0x00f103b6, ODA_REPORT_FAULT_CONFIG, 4}, \
{0x00f1ff06, ODA_REPORT_FAULT_M7, 5}, \
{0x00f1ff06, ODA_REPORT_FAULT_BLOCK_C, 6}, \
{0x00f103b0, ODA_REPORT_FAULT_MEM_MULTI, 7}, \
{0x00f103b0, ODA_REPORT_FAULT_PCIE, 8}, \
{0x00f103b0, ODA_REPORT_FAULT_FATAL, 9}, \
{0x08520003, ODA_REPORT_PORT_FAULT_DOWN, 10}, \
{0x00f10509, ODA_REPORT_PORT_FAULT_LANE_REDUCE_HALF, 11}, \
{0x00f10509, ODA_REPORT_PORT_FAULT_LANE_REDUCE_QUARTER, 12} \
}
static inline unsigned int find_index_by_event_type(EventMapping *mapping, unsigned int map_cnt, unsigned int event_type)
{
size_t i = 0;
for (i = 0; i < map_cnt; i++) {
if (mapping[i].event_type == event_type) {
return mapping[i].index;
}
}
return INDEX_NOT_FOUND;
}
static inline unsigned int find_index_by_sub_type(EventMapping *mapping, unsigned int map_cnt,unsigned int sub_type)
{
size_t i = 0;
for (i = 0; i < map_cnt; i++) {
if (mapping[i].sub_type == sub_type) {
return mapping[i].index;
}
}
return INDEX_NOT_FOUND;
}
static inline bool IsPortNodeInfoZero(LqDcmiEvent event)
{
LqDcmiEvent zeroEvent = {0};
return memcmp(&event, &zeroEvent, sizeof(event)) == 0;
}
static inline int GetAlarmType(LqDcmiEvent *event)
{
if (event->switchPortid == INVALID_PORTID) {
return CHIP_ALARM;
} else {
return PORT_ALARM;
}
}
#endif