Pull Request has been successfully merged by CANN-robot.
(Thank you for ddddwe's contribution.)变更摘要
该 PR 主要围绕 Pro 前端诊断信息的可用性与若干契约校验的完备性展开。诊断侧,_errors.py 引入 PyptoProWarning 基类及 CapacityUnknown、CheckSkipped、MutexMismatch 等警告类别,新增 _warn_located、warn_check_skipped 与 render(with_source=...),使 DSL 调用位置可被结构化保留、警告可按类别过滤,并支持不渲染源码预览地输出诊断;配套 python/tests/conftest.py 让 pytest 的 match= 只匹配诊断文本而非源码预览。契约校验侧,block_ops.py、_call_parser.py、_buffer_parser.py 增加了动态槽位重解释、MX 缩放平面地址、手动 mutex 别名重叠、packed host 形状等检查,并通过 collect_capacity_overflows 聚合多处容量溢出。同时新增版本化 IR 属性快照 API、parse 观察者与标量算术别名,并修正相关文档。
主要改动
-
诊断定位与警告分类:
_errors.py新增PyptoProWarning、CapacityUnknown、CheckSkipped、MutexMismatch及_warn_located、warn_check_skipped,并让PyptoProError.render()支持with_source=False;block_ops.py中大量raise补传span=span,使错误与警告携带 DSL 调用位置且可按类别过滤。 -
容量校验聚合与告警:
block_ops.py新增collect_capacity_overflows()上下文管理器聚合单次 parse 中的多处容量溢出并统一抛出OutOfRange,_get_memory_capacity在可用空间容量未知时发出CapacityUnknown,动态偏移检查则通过warn_check_skipped以可选方式提示。 -
新增契约检查:
_call_parser.py增加_check_mx_plane_slots/_mx_group_slot_addrs校验每个 MX scale 槽位地址与数据槽位地址>> 4的对应关系,并拒绝 Vector 段使用bar_m/bar_mte1/bar_fix;block_ops.py与_buffer_parser.py借助_tile_slot_source、_dynamic_slot_tiles拒绝运行时槽位索引的pl.reinterpret(),并新增warn_manual_mutex_aliases()对重叠但无共享 mutex ID 的手动别名缓冲发出MutexMismatch。 -
缓冲类型与形状策略:
structural_equal.cpp将memorySpace_纳入TileType相等性比较(地址与大小仍属分配元信息);platform.h/platform.cpp新增kMemorySpaceBias、kMemorySpaceScaling并映射到btSize、fixQuantPreSize;shape_policy.py将_pack_factor迁入并用于bind_runtime_args对 packed host 形状按逻辑元素归一。 -
新增 API 与文档订正:
ir.cpp与ir/__init__.py暴露get_attributes、attributes_api_version以读取Call/Function/ForStmt的属性快照;kernel.py的parse_target_program新增observer参数;language/__init__.py与_api.py声明标量别名adds、subs、muls,并订正pl.struct、init_output、matmulbias、pto_assert、@pl.inline等文档说明。


Hi @ddddwe, welcome to submitting your first PR to pypto!
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/approve
/lgtm


/approve


Pro frontend errors and warnings carry DSL call and argument locations. Tile builder validation uses an explicit span when supplied and inherits current_span when omitted, including nested reinterpretation and capacity warnings. Capacity lookup failures produce located CapacityUnknown warnings for bounded on-chip buffers, including MX ScaleLeft/ScaleRight; DDR does not trigger this warning.
Tile capacity checks raise OutOfRange immediately on the first over-capacity declaration, in both normal compilation and pipeline probe parsing. Error rendering can omit source previews while preserving error codes, locations, hints and notes. Tests explicitly inspect the error message or rendered diagnostic, keeping assertions independent of source previews and pytest internals.
TileType equality checks effective MemRef presence and memory space. A known memory reference differs from an unspecified one; two unspecified references can match. Allocation addresses and sizes do not participate in type equality. Packed host shape binding normalizes the last axis of 4-bit tensors directly; explicit static_shapes already count logical elements. Compile-time binding and launch validation share accepted Torch storage dtypes: sub-byte data uses uint8, with native Torch FP4 also accepted for FP4E2M1. FP8 supports its matching Torch dtype or a uint8 carrier. INT16 and UINT16 each accept torch.int16 or torch.uint16 as bit-preserving 16-bit storage carriers. UINT32 accepts torch.uint32 or torch.int32 as 32-bit carriers. Integer carriers of the wrong width and unrelated floating-point dtypes remain invalid; no numerical dtype conversion is performed.
The frontend also checks dynamic slot reinterpretation, MX data/scale slot layouts and manual mutex aliases. IR observation exposes versioned attribute snapshots and invocation-local parse observers. Existing scalar arithmetic aliases have public declarations and documentation. Capacity validation uses the upstream Bias/Scaling and MX buffer mappings.
The existing gather comparison and gatherb STs use their original int32 storage directly. Their UINT32 arguments retain the same 32-bit bit patterns without a dtype conversion. This PR does not modify any ST case.
Validation: