* Copyright (c) 2025 Huawei Technologies Co., Ltd.
* This program is free software, you can redistribute it and/or modify it under the terms and conditions of
* CANN Open Software License Agreement Version 2.0 (the "License").
* Please refer to the License for details. You may not use this file except in compliance with the License.
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
* See LICENSE in the root of the software repository for the full text of the License.
*/
* \file kernel_micro_vec_duplicate_intf_impl.h
* \brief
*/
#ifndef ASCENDC_KERNEL_MICRO_VEC_DUPLICATE_INTERFACE_IMPL_H
#define ASCENDC_KERNEL_MICRO_VEC_DUPLICATE_INTERFACE_IMPL_H
#if __NPU_ARCH__ == 3003
#include "micro_api/dav_l300/kernel_micro_vec_duplicate_impl.h"
#elif __NPU_ARCH__ == 3113
#include "micro_api/dav_l311/kernel_micro_vec_duplicate_impl.h"
#elif __NPU_ARCH__ == 5102
#include "micro_api/dav_m510/kernel_micro_vec_duplicate_impl.h"
#else
#include "micro_api/dav_c310/kernel_micro_vec_duplicate_impl.h"
#endif
namespace AscendC {
namespace MicroAPI {
template <typename T, typename U, typename S>
__simd_callee__ inline void Duplicate(S& dstReg, U scalarValue)
{
DuplicateImpl<T, U, S>(dstReg, scalarValue);
}
template <typename T, MaskMergeMode mode, typename U, typename S>
__simd_callee__ inline void Duplicate(S& dstReg, U scalarValue, MaskReg& mask)
{
DuplicateImpl<T, mode, U, S>(dstReg, scalarValue, mask);
}
template <typename T, HighLowPart pos, MaskMergeMode mode, typename U>
__simd_callee__ inline void Duplicate(U& dstReg, U& srcReg, MaskReg& mask)
{
DuplicateImpl<T, pos, mode, U>(dstReg, srcReg, mask);
}
template <typename T, typename U>
__simd_callee__ inline void Interleave(U& dstReg0, U& dstReg1, U& srcReg0, U& srcReg1)
{
InterleaveImpl<T, U>(dstReg0, dstReg1, srcReg0, srcReg1);
}
template <typename T, typename U>
__simd_callee__ inline void DeInterleave(U& dstReg0, U& dstReg1, U& srcReg0, U& srcReg1)
{
DeInterleaveImpl<T, U>(dstReg0, dstReg1, srcReg0, srcReg1);
}
}
}
#endif
