##############################################################################
# arch/renesas/src/m16c/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements.  See the NOTICE file distributed with
# this work for additional information regarding copyright ownership.  The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License.  You may obtain a copy of the License at
#
#   http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
# License for the specific language governing permissions and limitations
# under the License.
#
##############################################################################

HEAD_ASRC = m16c_head.S

CMN_CSRCS  = renesas_allocateheap.c renesas_createstack.c renesas_doirq.c
CMN_CSRCS += renesas_exit.c renesas_getintstack.c renesas_idle.c
CMN_CSRCS += renesas_initialize.c renesas_lowputs.c renesas_mdelay.c
CMN_CSRCS += renesas_nputs.c renesas_releasestack.c renesas_stackframe.c
CMN_CSRCS += renesas_switchcontext.c renesas_udelay.c renesas_usestack.c

CHIP_ASRCS  = m16c_vectors.S
CHIP_CSRCS  = m16c_initialstate.c m16c_copystate.c m16c_lowputc.c m16c_irq.c
CHIP_CSRCS += m16c_serial.c m16c_registerdump.c

ifneq ($(CONFIG_DISABLE_SIGNALS),y)
CHIP_CSRCS += m16c_schedulesigaction.c m16c_sigdeliver.c
endif

ifneq ($(CONFIG_SCHED_TICKLESS),y)
CHIP_CSRCS += m16c_timerisr.c
endif