Oopenvela-robotqemu/armv8-r: add support for BMP protected 4 cpus
| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
boards/arm/qemu: enable kernel build for armv7a See Documentation/platforms/arm/qemu/boards/qemu-armv7a/README.txt for details Signed-off-by: fangxinyong <fangxinyong@xiaomi.com> | 2 个月前 | |
qemu/armv8-r: replace SMP_NCPUS to NCPUS Signed-off-by: buxiasen <buxiasen@xiaomi.com> | 2 个月前 | |
arch/atomic: remove up_testset in spinlock Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com> | 2 个月前 | |
qemu/armv8-r: replace SMP_NCPUS to NCPUS Signed-off-by: buxiasen <buxiasen@xiaomi.com> | 2 个月前 | |
v8r/percpu: add percpu_section support, enable percpu section in SMP Reserve dtb 1MB with ram start Signed-off-by: buxiasen <buxiasen@xiaomi.com> | 2 个月前 | |
qemu/armv8-r: add support for BMP protected 4 cpus Run qemu with: bash qemu-system-arm -M virt,virtualization=on,highmem=off \ -semihosting -nographic -cpu cortex-r52 \ -device loader,file=./nuttx/nuttx \ -device loader,file=./nuttx/nuttx_user \ -smp 4 Change core by cu -l /dev/ttyCORE1, etc. Signed-off-by: buxiasen <buxiasen@xiaomi.com> | 2 个月前 | |
qemu/arm: percpu section compatible for SMP When SMP, the percpu data&bss idletcb etc, will be in percpu, currently we will do lots of all core init in nx_start when SMP, not able to load percpu data & bss by eachcore, need to do all core percpu in core0, we shall revert this patch after SMP leave tcb like data init by each core self. At least need SMP check point from core-N to core-0 before core before core-0 sched_unlock. Signed-off-by: buxiasen <buxiasen@xiaomi.com> | 2 个月前 | |
qemu/arm_a_r: use cp15 as percpu offset Should avoid touch cpuid in userspace, optimze reduce the offset*cpuid Signed-off-by: buxiasen <buxiasen@xiaomi.com> | 2 个月前 | |
qemu/arm-v7a: add pm support Signed-off-by: tengshuangshuang <tengshuangshuang@xiaomi.com> | 2 个月前 | |
qemu/arm-v7a: add pm support Signed-off-by: tengshuangshuang <tengshuangshuang@xiaomi.com> | 2 个月前 | |
arm/qemu_irq: add more stacks This extends IRQ/FIQ stack defs to support up to 8 cores. Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com> | 2 个月前 | |
zipfs: should reset ret to error value when unzOpen2_64 called failed Signed-off-by: wanggang26 <wanggang26@xiaomi.com> | 2 个月前 | |
mm: Fix some typos Signed-off-by: xuxingliang <xuxingliang@xiaomi.com> | 2 个月前 | |
mm: Fix some typos Signed-off-by: xuxingliang <xuxingliang@xiaomi.com> | 2 个月前 | |
boards/arm/qemu: enable kernel build for armv7a See Documentation/platforms/arm/qemu/boards/qemu-armv7a/README.txt for details Signed-off-by: fangxinyong <fangxinyong@xiaomi.com> | 2 个月前 | |
arch/arm/qemu: only do pl011 init with core0 in qemu For BMP case, we should reduce the serial cross core use. Signed-off-by: yintao <yintao@xiaomi.com> Signed-off-by: buxiasen <buxiasen@xiaomi.com> | 2 个月前 | |
chip/qemu: fix CORTEXR52 build issue This adds GICD_BASE, GICR_BASE etc to fix QEMU CORTEXR52 build issues. It also adds arm_el_init() for ARMV8R to fix link issue. It also tweaks Make.defs to add dependency on armv8-r if required. Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com> | 2 个月前 | |
qemu/armv8-r: add support for BMP protected 4 cpus Run qemu with: bash qemu-system-arm -M virt,virtualization=on,highmem=off \ -semihosting -nographic -cpu cortex-r52 \ -device loader,file=./nuttx/nuttx \ -device loader,file=./nuttx/nuttx_user \ -smp 4 Change core by cu -l /dev/ttyCORE1, etc. Signed-off-by: buxiasen <buxiasen@xiaomi.com> | 2 个月前 | |
arch/qemu: cortex-r5 PROTECTED support This adds MPU and userspace handling in QEMU chips so that to boot PROTECTED target qemu-armv7r:pnsh. Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com> | 2 个月前 |