Oopenvela-robotfix the compile error
| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
fix the compile error ld: nuttx section .data' will not fit in region flash' arm-none-eabi-ld: region flash' overflowed by 904 bytes Memory region Used Size Region Size %age Used flash: 263048 B 256 KB 100.34% When CONFIG_DISABLE_SIGNALS=y`, the flash size is now: flash: 238624 B 256 KB 91.03% Reduced the size of 24424 Byte. Signed-off-by: v-tangmeng <v-tangmeng@xiaomi.com> | 2 个月前 | |
boards/arm/eoss3: migrate to SPDX identifier Most tools used for compliance and SBOM generation use SPDX identifiers This change brings us a step closer to an easy SBOM generation. Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com> | 2 个月前 | |
boards/arm/eoss3: migrate to SPDX identifier Most tools used for compliance and SBOM generation use SPDX identifiers This change brings us a step closer to an easy SBOM generation. Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com> | 2 个月前 | |
boards/arm/eoss3: migrate to SPDX identifier Most tools used for compliance and SBOM generation use SPDX identifiers This change brings us a step closer to an easy SBOM generation. Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com> | 2 个月前 | |
Add initial support for the QuickLogic EOS S3 The QuickFeather board added as an initial target. These featrues are minimally implemented: * Clock Configuration -- All clocking registers are defined and configuration is used to setup the HSO, M4 Core, and M4 Perif clocks. Additionally some clock debugging is stubbed for bringing out clock paths to IO pins. * UART -- The lowputc as well as the serial driver is implemnted for the single UART device. Currently the configuration is hard coded, but uses the proper interfaces to later fill in. * SysTick -- The system tick timer is implemented and clocking properly. Tickless mode is not yet implemented. * Interrupts -- The interrupt system is implemented and verified using the UART and SysTick systems. * GPIO -- GPIO and IOMUX systems are defined and implemented. This is verified using the UART as well as the Arch LED system. The GPIO interupt system is stubbed out but not implemented. * Arch LEDS -- The blue LED as part of the RGB LED is configured and attached to the Arch LED system. This indicates the device coming online as well as when a hardfault is triggered. Applications and Testing: * There is a nsh configuration implemented that includes debug features as well as the ostest, getprime, and mem test. All of these have been run and verified. Signed-off-by: Brennan Ashton <bashton@brennanashton.com> | 2 个月前 |