| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
[NFC][Py Reformat] Reformat python files in mlir subdir This is an ongoing series of commits that are reformatting our Python code. Reformatting is done with black. If you end up having problems merging this commit because you have made changes to a python file, the best way to handle that is to run git checkout --ours <yourfile> and then reformat it with black. If you run into any problems, post to discourse about it and we will try to help. RFC Thread below: https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style Differential Revision: https://reviews.llvm.org/D150782 | 3 年前 | |
[mlir][python] Add install target for MLIR Python sources. Differential Revision: https://reviews.llvm.org/D155362 | 2 年前 | |
Finish renaming getOperandSegmentSizeAttr() from operand_segment_sizes to operandSegmentSizes This renaming started with the native ODS support for properties, this is completing it. A mass automated textual rename seems safe for most codebases. Drop also the ods prefix to keep the accessors the same as they were before this change: properties.odsOperandSegmentSizes reverts back to: properties.operandSegementSizes The ODS prefix was creating divergence between all the places and make it harder to be consistent. Reviewed By: jpienaar Differential Revision: https://reviews.llvm.org/D157173 | 2 年前 | |
[mlir][python] Remove PythonAttr mapping functionality This functionality has been replaced by TypeCasters (see D151840) depends on D154468 Reviewed By: ftynse Differential Revision: https://reviews.llvm.org/D154469 | 2 年前 | |
[backport][mlir] Add Python bindings for DenseResourceElementsAttr. (#66319) Only construction and type casting are implemented. The method to create is explicitly named "unsafe" and the documentation calls out what the caller is responsible for. There really isn't a better way to do this and retain the power-user feature this represents. originally by: Stella Laurenzo reference: https://github.com/llvm/llvm-project/commit/f66cd9e9556a53142a26a5c21a72e21f1579 | 9 个月前 | |
[backport][mlir] Add Python bindings for DenseResourceElementsAttr. (#66319) Only construction and type casting are implemented. The method to create is explicitly named "unsafe" and the documentation calls out what the caller is responsible for. There really isn't a better way to do this and retain the power-user feature this represents. originally by: Stella Laurenzo reference: https://github.com/llvm/llvm-project/commit/f66cd9e9556a53142a26a5c21a72e21f1579 | 9 个月前 | |
[mlir][transform][structured][python] Allow str arg in match_op_names. Allow the names argument in MatchOp.match_op_names to be of type str in addition to Sequence[str]. In this case, the argument is treated as a list with one name, i.e., it is possible to write MatchOp.match_op_names(..., "test.dummy") instead of MatchOp.match_op_names(..., ["test.dummy"]). Reviewed By: ftynse Differential Revision: https://reviews.llvm.org/D155807 | 2 年前 | |
[Backport][Intrinsics] llvm.memcpy.inline length no longer needs to be constant Reference: https://github.com/llvm/llvm-project/commit/fdf94e1 Originally By: Alex Bradbury <asb@igalia.com> A test change was missing for mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir in the initial commit. | 5 个月前 | |
Fix ODS verifier emission for DerivedAttr when Properties are enabled Differential Revision: https://reviews.llvm.org/D158679 | 2 年前 | |
[mlir] Fix crash when adding nested dialect extensions A dialect extension can add additional dialect extensions in its apply function. This used to crash when the vector of extensions was internally reallocated while it is being iterated over. Differential Revision: https://reviews.llvm.org/D158838 | 2 年前 | |
New features and bug fix in MLIR test generation tool - Option --variable_names <names> allows the user to pass names for FileCheck regexps representing variables. Variable names are separated by commas, and empty names can be used to generate specific variable names automatically. For example, --variable-names arg_0,arg_1,,,result will produce regexp names ARG_0, ARG_1, VAR_0, VAR_1, RESULT, VAR_2, VAR_3, ... - Option '--attribute_names <names>' can be used to generate global regexp names to represent attributes. Useful for affine maps. Same behavior as '--variable_names'. - Bug fixed for scope detection of SSA variables in ops with nested regions that return SSA values (e.g., 'linalg.generic'). Originally, returned SSA values were inserted in the nested scope. This version of the tool has been used to generate unit tests for the following patch: https://reviews.llvm.org/D153291 For example, the main body of the test named 'test_select_2d_one_dynamic' was generated using the following command: $ mlir-opt -pass-pipeline='builtin.module(func.func(tosa-to-linalg))' test_select_2d_one_dynamic.tosa.mlir | generate-test-checks.py --attribute_names map0,map1,map2 --variable_names arg0,arg1,arg2,const1,arg0_dim1,arg1_dim1,,arg2_dim1,max_dim1,,,arg0_broadcast,,,,,,,arg1_broadcast,,,,,,,arg2_broadcast,,,,,,result Reviewed By: eric-k256 Differential Revision: https://reviews.llvm.org/D154458 | 2 年前 | |
[mlir] Add missing newline at end of .clang-format file | 3 年前 | |
[mlir] Disable misc-const-correctness clang-tidy check. https://clang.llvm.org/extra/clang-tidy/checks/misc/const-correctness.html | 3 年前 | |
[mlir] Don't make the ROCm conversions depend on the execution engine During a conversion to MLIR_ENABLE_EXECUTION_ENGINE from checking for the native target, the ROCm conversion passes (--serialize-to-hsaco) were mistakenly flagged for being disabled if the execution ending is not being built. These passes use LLVM to build binaries for AMD GPUs, and so require that backend to be enabled. However, they do not produce native code, nor do they interact with the JIT or any of the execution engine support libraries. When building MLIR into a compiler library that's intended to produce GPU binaries, we want to build only the AMDGPU backend and have the binary serialization passes available. This change makes that possible. It looks like the CUDA path might currently require a native target, it's hard to tell, so this commit leaves that if statement untouched. Reviewed By: fmorac Differential Revision: https://reviews.llvm.org/D155227 | 2 年前 | |
Add the Apache2 with LLVM exceptions license to MLIR It seems that every subproject has a license file instead of having a top-level one. | 6 年前 | |
mlir README.md: Fix the syntax | 6 年前 |
Multi-Level Intermediate Representation
See https://mlir.llvm.org/ for more information.