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MMehdi Amini[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in AsyncRegionRewriter.cpp (NFC)

971e124f创建于 2025年11月13日历史提交

文件	最后提交记录	最后更新时间
AllReduceLowering.cpp	[mlir][NFC] update mlir/Dialect create APIs (16/n) (#149922) See https://github.com/llvm/llvm-project/pull/147168 for more info.	1 年前
AsyncRegionRewriter.cpp	[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in AsyncRegionRewriter.cpp (NFC)	8 个月前
BufferDeallocationOpInterfaceImpl.cpp	[mlir] Remove unused includes (NFC) (#147455) These are identified by misc-include-cleaner. I've filtered out those that break builds. Also, I'm staying away from llvm-config.h, config.h, and Compiler.h, which likely cause platform- or compiler-specific build failures.	1 年前
DecomposeMemRefs.cpp	[mlir][NFC] update mlir/Dialect create APIs (16/n) (#149922) See https://github.com/llvm/llvm-project/pull/147168 for more info.	1 年前
EliminateBarriers.cpp	[mlir] Simplify Default cases in type switches. NFC. (#165767) Use default values instead of lambdas when possible. std::nullopt and nullptr can be used now because of https://github.com/llvm/llvm-project/pull/165724.	9 个月前
GlobalIdRewriter.cpp	[mlir][NFC] update mlir/Dialect create APIs (16/n) (#149922) See https://github.com/llvm/llvm-project/pull/147168 for more info.	1 年前
KernelOutlining.cpp	[mlir][gpu] Support outlining nested gpu.launch (#152696) This PR fixes a crash in GpuKernelOutliningPass that occurred when encountering a symbol that was not a FlatSymbolRefAttr, enabling outlining of nested gpu.launch operations. Fixes #149318.	11 个月前
MemoryPromotion.cpp	[mlir][NFC] Use hasOneBlock instead of llvm::hasSingleElement(region) (#149809)	1 年前
ModuleToBinary.cpp	[ADT] Prepare to deprecate variadic StringSwitch::Cases. NFC. (#166020) Update all uses of variadic .Cases to use the initializer list overload instead. I plan to mark variadic .Cases as deprecated in a followup PR. For more context, see https://github.com/llvm/llvm-project/pull/163117.	9 个月前
NVVMAttachTarget.cpp	[MLIR][NVVM] Add ptxas-cmd-options to pass flags to the downstream compiler (#127457) This PR adds cmd-options to the gpu-lower-to-nvvm-pipeline pipeline and the nvvm-attach-target pass, allowing users to pass flags to the downstream compiler, *ptxas*. Example: mlir-opt -gpu-lower-to-nvvm-pipeline="cubin-chip=sm_80 ptxas-cmd-options='-v --register-usage-level=8'"	1 年前
ParallelLoopMapper.cpp	[mlir][gpu] Add innermost-first policy when mapping loops to GPU IDs (#160634)	10 个月前
PromoteShuffleToAMDGPU.cpp	[mlir][amdgpu] Promote gpu.shuffle to amdgpu.permlane_swap (#154933) - promote gpu.shuffle %src xor {16,32} 64 to amdgpu.permlane_swap %src {16,32}	11 个月前
ROCDLAttachTarget.cpp	[mlir] Construct SmallVector with ArrayRef (NFC) (#101896)	1 年前
SPIRVAttachTarget.cpp	[mlir] Use llvm::unique (NFC) (#96415)	2 年前
ShuffleRewriter.cpp	[mlir][NFC] update mlir/Dialect create APIs (33/n) (#150659) See https://github.com/llvm/llvm-project/pull/147168 for more info.	1 年前
SubgroupIdRewriter.cpp	[mlir][NFC] update mlir/Dialect create APIs (16/n) (#149922) See https://github.com/llvm/llvm-project/pull/147168 for more info.	1 年前
SubgroupReduceLowering.cpp	[MLIR][GPU] Ensure all lanes in cluster have final reduction value (#165764) This is a fix for a cluster size of 32 when the subgroup size is 64. Previously, only lanes [16, 32) u [48, 64) contained the correct clusterwise reduction value. This PR adds a swizzle instruction to broadcast the correct value down to lanes [0, 16) u [32, 48).	9 个月前
XeVMAttachTarget.cpp	[MLIR][GPU][XeVM] Add XeVM target and XeVM dialect integration tests. (#148286) As part of XeVM dialect upsteaming, covers remaining parts required for XeVM dialect integration and testing. It has two high level components - XeVM target and serialization support - XeVM dialect integration tests using level zero runtime Co-Authored-by: Artem Kroviakov <artem.kroviakov@intel.com>	11 个月前