已合并
[feature] 支持core文件展示&切换线程信息 #106
wiyr0创建于 4月23日
[feature] 支持core文件展示&切换线程信息 #106
已合并
共 29 个文件变更+966-543
| @@ -47,4 +47,4 @@ repos: | |||
| 47 | files: \.(c|h|cpp|hpp|cc|hh|cxx|hxx)$ | 47 | files: \.(c|h|cpp|hpp|cc|hh|cxx|hxx)$ |
| 48 | entry: git-clang-format | 48 | entry: git-clang-format |
| 49 | args: [--binary, clang-format, -f] | 49 | args: [--binary, clang-format, -f] |
| 50 | - exclude: ^build/|tests/third_party/ | 50 | + exclude: \.(build|test|third-party) |
| @@ -404,4 +404,17 @@ template <typename Cat> Log *GetLog(Cat mask) { | |||
| 404 | ::llvm::consumeError(::std::move(error_private)); \ | 404 | ::llvm::consumeError(::std::move(error_private)); \ |
| 405 | } while (0) | 405 | } while (0) |
| 406 | 406 | ||
| 407 | + | ||
| 408 | + | ||
| 409 | + do { \ | ||
| 410 | + static std::once_flag flag{}; \ | ||
| 411 | + lldb_private::Log *log_private = (log); \ | ||
| 412 | + if (log_private) { \ | ||
| 413 | + std::call_once(flag, [&]() { \ | ||
| 414 | + log_private->Format(__FILE__, __func__, __VA_ARGS__); \ | ||
| 415 | + }); \ | ||
| 416 | + } \ | ||
| 417 | + } while (0) | ||
| 418 | + | ||
| 419 | + | ||
| 407 | 420 | ||
| @@ -30,7 +30,7 @@ enum class SocType { | |||
| 30 | SOC_END, | 30 | SOC_END, |
| 31 | }; | 31 | }; |
| 32 | 32 | ||
| 33 | -// Defined by ts | 33 | +// Defined by ts |
| 34 | enum class CoreType { | 34 | enum class CoreType { |
| 35 | AIC = 0, | 35 | AIC = 0, |
| 36 | AIV, | 36 | AIV, |
| @@ -56,9 +56,9 @@ enum class MemType : uint32_t { | |||
| 56 | }; | 56 | }; |
| 57 | 57 | ||
| 58 | enum class InterruptPosType : uint8_t { | 58 | enum class InterruptPosType : uint8_t { |
| 59 | - STARS_SU_INTERRUPT = 0, | 59 | + SU_INTERRUPT = 0, |
| 60 | - STARS_VEC_INTERRUPT_SIMD = 1, | 60 | + VEC_INTERRUPT_SIMD = 1, |
| 61 | - STARS_VEC_INTERRUPT_SIMT = 2 | 61 | + VEC_INTERRUPT_SIMT = 2 |
| 62 | }; | 62 | }; |
| 63 | 63 | ||
| 64 | struct CoreInfo { | 64 | struct CoreInfo { |
| @@ -155,10 +155,7 @@ struct DeviceStopInfo { | |||
| 155 | SocType soc_type; | 155 | SocType soc_type; |
| 156 | // used by coredump currently | 156 | // used by coredump currently |
| 157 | std::string stop_description; | 157 | std::string stop_description; |
| 158 | - | 158 | + ThreadPos thread_pos; |
| 159 | - uint16_t thread_idx_x; | ||
| 160 | - uint16_t thread_idx_y; | ||
| 161 | - uint16_t thread_idx_z; | ||
| 162 | }; | 159 | }; |
| 163 | 160 | ||
| 164 | // Message from lldb-client to lldb-server | 161 | // Message from lldb-client to lldb-server |
| @@ -169,13 +166,13 @@ struct MemoryTypeInfo { | |||
| 169 | uint8_t element_size; | 166 | uint8_t element_size; |
| 170 | }; | 167 | }; |
| 171 | 168 | ||
| 172 | -// | 169 | +// |
| 173 | struct InterruptPosInfo { | 170 | struct InterruptPosInfo { |
| 174 | CoreType core_type; | 171 | CoreType core_type; |
| 175 | bool single_core_run; | 172 | bool single_core_run; |
| 176 | bool single_warp_run; | 173 | bool single_warp_run; |
| 177 | uint32_t core_id; | 174 | uint32_t core_id; |
| 178 | - InterruptPosType pos_type{InterruptPosType::STARS_SU_INTERRUPT}; | 175 | + InterruptPosType pos_type{InterruptPosType::SU_INTERRUPT}; |
| 179 | ThreadPos thread_pos; | 176 | ThreadPos thread_pos; |
| 180 | uint64_t pc; | 177 | uint64_t pc; |
| 181 | ThreadInfo thread_info; | 178 | ThreadInfo thread_info; |
| @@ -196,7 +193,7 @@ struct InterruptPosInfo { | |||
| 196 | void Reset() { | 193 | void Reset() { |
| 197 | core_id = 1; | 194 | core_id = 1; |
| 198 | core_type = CoreType::UNKNOWN_CORE_TYPE; | 195 | core_type = CoreType::UNKNOWN_CORE_TYPE; |
| 199 | - pos_type = InterruptPosType::STARS_SU_INTERRUPT; | 196 | + pos_type = InterruptPosType::SU_INTERRUPT; |
| 200 | thread_pos = ThreadPos{}; | 197 | thread_pos = ThreadPos{}; |
| 201 | pc = -1; | 198 | pc = -1; |
| 202 | // 默认设置所有warp同步调试 | 199 | // 默认设置所有warp同步调试 |
| @@ -74,8 +74,7 @@ static Status GetCoreInfo(Process *process, const uint8_t core_id, const CoreTyp | |||
| 74 | for (uint32_t i = 0; i < infos.size(); ++i) { | 74 | for (uint32_t i = 0; i < infos.size(); ++i) { |
| 75 | CoreInfo core_info = infos[i]; | 75 | CoreInfo core_info = infos[i]; |
| 76 | 76 | ||
| 77 | - if (core_info.core_id == core_id && | 77 | + if (core_info.core_id == core_id && core_info.core_type == core_type) { |
| 78 | - core_info.core_type == core_type) { | ||
| 79 | info = core_info; | 78 | info = core_info; |
| 80 | return error; | 79 | return error; |
| 81 | } | 80 | } |
| @@ -87,19 +86,12 @@ static Status GetCoreInfo(Process *process, const uint8_t core_id, const CoreTyp | |||
| 87 | 86 | ||
| 88 | } | 87 | } |
| 89 | 88 | ||
| 90 | -static uint32_t ComputeLinearIdx(const ThreadPos &thread_idx, const ThreadPos &thread_dim) { | 89 | +static uint32_t ComputeLinearIdx(const ThreadPos &thread_idx, |
| 90 | + const ThreadDim &thread_dim) { | ||
| 91 | // 获取线程的线性ID | 91 | // 获取线程的线性ID |
| 92 | return thread_idx.x + thread_idx.y * thread_dim.x + thread_idx.z * thread_dim.x * thread_dim.y; | 92 | return thread_idx.x + thread_idx.y * thread_dim.x + thread_idx.z * thread_dim.x * thread_dim.y; |
| 93 | } | 93 | } |
| 94 | 94 | ||
| 95 | -static ThreadPos LinearIdxToThreadIdx(uint32_t linear_idx, const ThreadPos &thread_dim) { | ||
| 96 | - ThreadPos pos; | ||
| 97 | - pos.x = linear_idx % thread_dim.x; | ||
| 98 | - pos.y = (linear_idx / thread_dim.x) % thread_dim.y; | ||
| 99 | - pos.z = linear_idx / (thread_dim.x * thread_dim.y); | ||
| 100 | - return pos; | ||
| 101 | -} | ||
| 102 | - | ||
| 103 | inline uint32_t CalcBitNum(const vector<uint64_t> &bitmaps) { | 95 | inline uint32_t CalcBitNum(const vector<uint64_t> &bitmaps) { |
| 104 | uint32_t num = 0; | 96 | uint32_t num = 0; |
| 105 | for (auto bitmap: bitmaps) { | 97 | for (auto bitmap: bitmaps) { |
| @@ -107,7 +99,7 @@ inline uint32_t CalcBitNum(const vector<uint64_t> &bitmaps) { | |||
| 107 | } | 99 | } |
| 108 | return num; | 100 | return num; |
| 109 | } | 101 | } |
| 110 | - | 102 | + |
| 111 | inline void DumpBitmap(const vector<uint64_t> &bitmaps, std::ostream &os) { | 103 | inline void DumpBitmap(const vector<uint64_t> &bitmaps, std::ostream &os) { |
| 112 | os << "0x"; | 104 | os << "0x"; |
| 113 | if (bitmaps.empty()) { | 105 | if (bitmaps.empty()) { |
| @@ -170,8 +162,8 @@ protected: | |||
| 170 | strm << " Device Aic_Num Aiv_Num Aic_Mask Aiv_Mask\n"; | 162 | strm << " Device Aic_Num Aiv_Num Aic_Mask Aiv_Mask\n"; |
| 171 | std::stringstream ss; | 163 | std::stringstream ss; |
| 172 | for (const auto& id : device_info.device_ids) { | 164 | for (const auto& id : device_info.device_ids) { |
| 173 | - WriteLine(ss, id, id == device_info.device_id, aic_num, aiv_num, | 165 | + WriteLine(ss, id, id == device_info.device_id, aic_num, aiv_num, |
| 174 | - device_info.aic_bitmaps, device_info.aiv_bitmaps); | 166 | + device_info.aic_bitmaps, device_info.aiv_bitmaps); |
| 175 | } | 167 | } |
| 176 | strm << ss.str(); | 168 | strm << ss.str(); |
| 177 | } else { | 169 | } else { |
| @@ -248,7 +240,6 @@ public: | |||
| 248 | ~CommandObjectAscendInfoAicores() override = default; | 240 | ~CommandObjectAscendInfoAicores() override = default; |
| 249 | 241 | ||
| 250 | protected: | 242 | protected: |
| 251 | - | ||
| 252 | void DoExecute(Args &command, CommandReturnObject &result) override { | 243 | void DoExecute(Args &command, CommandReturnObject &result) override { |
| 253 | Stream &strm = result.GetOutputStream(); | 244 | Stream &strm = result.GetOutputStream(); |
| 254 | Process *process = m_exe_ctx.GetProcessPtr(); | 245 | Process *process = m_exe_ctx.GetProcessPtr(); |
| @@ -281,7 +272,7 @@ protected: | |||
| 281 | } | 272 | } |
| 282 | static constexpr uint32_t CORE_ID_WIDTH = 4; | 273 | static constexpr uint32_t CORE_ID_WIDTH = 4; |
| 283 | static constexpr uint32_t BLOCK_ID_WIDTH = 6; | 274 | static constexpr uint32_t BLOCK_ID_WIDTH = 6; |
| 284 | - | 275 | + |
| 285 | std::string stopReasonKey = std::to_string(static_cast<uint8_t>(core_info.core_type)) + '_' + | 276 | std::string stopReasonKey = std::to_string(static_cast<uint8_t>(core_info.core_type)) + '_' + |
| 286 | std::to_string(core_info.core_id); | 277 | std::to_string(core_info.core_id); |
| 287 | auto iter = stop_reason.find(stopReasonKey); | 278 | auto iter = stop_reason.find(stopReasonKey); |
| @@ -329,21 +320,21 @@ protected: | |||
| 329 | return; | 320 | return; |
| 330 | } | 321 | } |
| 331 | 322 | ||
| 332 | - KernelInfo kernel_info; | 323 | + KernelInfo kernel_info{}; |
| 333 | error = process->GetKernelInfo(kernel_info); | 324 | error = process->GetKernelInfo(kernel_info); |
| 334 | if (!error.Success()) { | 325 | if (!error.Success()) { |
| 335 | result.AppendErrorWithFormat("Failed to get kernel info, reason: %s", error.AsCString()); | 326 | result.AppendErrorWithFormat("Failed to get kernel info, reason: %s", error.AsCString()); |
| 336 | return; | 327 | return; |
| 337 | } | 328 | } |
| 338 | 329 | ||
| 339 | - CoreInfo focus_core; | 330 | + CoreInfo focus_core{}; |
| 340 | error = commonInfo.GetFocusCore(process, focus_core); | 331 | error = commonInfo.GetFocusCore(process, focus_core); |
| 341 | if (!error.Success()) { | 332 | if (!error.Success()) { |
| 342 | result.AppendErrorWithFormat("Failed to get focused core info, reason: %s", error.AsCString()); | 333 | result.AppendErrorWithFormat("Failed to get focused core info, reason: %s", error.AsCString()); |
| 343 | return; | 334 | return; |
| 344 | } | 335 | } |
| 345 | 336 | ||
| 346 | - TaskInfo task_info; | 337 | + TaskInfo task_info{}; |
| 347 | 338 | ||
| 348 | task_info.stream_id = focus_core.stream_id; | 339 | task_info.stream_id = focus_core.stream_id; |
| 349 | task_info.task_id = focus_core.task_id; | 340 | task_info.task_id = focus_core.task_id; |
| @@ -396,13 +387,13 @@ protected: | |||
| 396 | result.AppendErrorWithFormat("Failed to get ascend info, reason: %s", error.AsCString()); | 387 | result.AppendErrorWithFormat("Failed to get ascend info, reason: %s", error.AsCString()); |
| 397 | return; | 388 | return; |
| 398 | } | 389 | } |
| 399 | - CoreInfo focus_core; | 390 | + CoreInfo focus_core{}; |
| 400 | error = commonInfo.GetFocusCore(process, focus_core); | 391 | error = commonInfo.GetFocusCore(process, focus_core); |
| 401 | if (!error.Success()) { | 392 | if (!error.Success()) { |
| 402 | result.AppendErrorWithFormat("Failed to get focused core info, reason: %s", error.AsCString()); | 393 | result.AppendErrorWithFormat("Failed to get focused core info, reason: %s", error.AsCString()); |
| 403 | return; | 394 | return; |
| 404 | } | 395 | } |
| 405 | - | 396 | + |
| 406 | StreamInfo stream_info; | 397 | StreamInfo stream_info; |
| 407 | stream_info.stream_id = focus_core.stream_id; | 398 | stream_info.stream_id = focus_core.stream_id; |
| 408 | std::string core_type_str; | 399 | std::string core_type_str; |
| @@ -437,33 +428,33 @@ public: | |||
| 437 | class OptionGroupAscendInfoBlocks : public OptionGroup { | 428 | class OptionGroupAscendInfoBlocks : public OptionGroup { |
| 438 | public: | 429 | public: |
| 439 | OptionGroupAscendInfoBlocks() {} | 430 | OptionGroupAscendInfoBlocks() {} |
| 440 | - | 431 | + |
| 441 | ~OptionGroupAscendInfoBlocks() override = default; | 432 | ~OptionGroupAscendInfoBlocks() override = default; |
| 442 | - | 433 | + |
| 443 | llvm::ArrayRef<OptionDefinition> GetDefinitions() override { | 434 | llvm::ArrayRef<OptionDefinition> GetDefinitions() override { |
| 444 | return llvm::ArrayRef(g_ascend_info_blocks_options); | 435 | return llvm::ArrayRef(g_ascend_info_blocks_options); |
| 445 | } | 436 | } |
| 446 | - | 437 | + |
| 447 | Status SetOptionValue(uint32_t option_idx, llvm::StringRef option_value, | 438 | Status SetOptionValue(uint32_t option_idx, llvm::StringRef option_value, |
| 448 | ExecutionContext *execution_context) override { | 439 | ExecutionContext *execution_context) override { |
| 449 | Status error; | 440 | Status error; |
| 450 | const int short_option = g_ascend_info_blocks_options[option_idx].short_option; | 441 | const int short_option = g_ascend_info_blocks_options[option_idx].short_option; |
| 451 | - | 442 | + |
| 452 | switch (short_option) { | 443 | switch (short_option) { |
| 453 | case 'd': | 444 | case 'd': |
| 454 | m_show_details = true; | 445 | m_show_details = true; |
| 455 | break; | 446 | break; |
| 456 | - | 447 | + |
| 457 | default: | 448 | default: |
| 458 | llvm_unreachable("Unimplemented option"); | 449 | llvm_unreachable("Unimplemented option"); |
| 459 | } | 450 | } |
| 460 | return error; | 451 | return error; |
| 461 | } | 452 | } |
| 462 | - | 453 | + |
| 463 | void OptionParsingStarting(ExecutionContext *execution_context) override { | 454 | void OptionParsingStarting(ExecutionContext *execution_context) override { |
| 464 | m_show_details = false; | 455 | m_show_details = false; |
| 465 | } | 456 | } |
| 466 | - | 457 | + |
| 467 | bool m_show_details; | 458 | bool m_show_details; |
| 468 | }; | 459 | }; |
| 469 | 460 | ||
| @@ -555,7 +546,7 @@ protected: | |||
| 555 | return false; | 546 | return false; |
| 556 | } | 547 | } |
| 557 | Status error; | 548 | Status error; |
| 558 | - | 549 | + |
| 559 | // 遍历并展示暂停点上下文 | 550 | // 遍历并展示暂停点上下文 |
| 560 | strm << "Current stop state of all blocks:\n\n"; | 551 | strm << "Current stop state of all blocks:\n\n"; |
| 561 | for (uint32_t i = 0; i < commonInfo.m_core_info_vec.size(); ++i) { | 552 | for (uint32_t i = 0; i < commonInfo.m_core_info_vec.size(); ++i) { |
| @@ -571,7 +562,7 @@ protected: | |||
| 571 | stop_info.core_id); | 562 | stop_info.core_id); |
| 572 | continue; | 563 | continue; |
| 573 | } | 564 | } |
| 574 | - | 565 | + |
| 575 | std::stringstream ss; | 566 | std::stringstream ss; |
| 576 | ss << "[" | 567 | ss << "[" |
| 577 | << ((commonInfo.m_stop_info.core_id == stop_info.core_id) ? "* " : "") | 568 | << ((commonInfo.m_stop_info.core_id == stop_info.core_id) ? "* " : "") |
| @@ -584,7 +575,7 @@ protected: | |||
| 584 | strm.EOL(); | 575 | strm.EOL(); |
| 585 | } | 576 | } |
| 586 | strm.Flush(); | 577 | strm.Flush(); |
| 587 | - | 578 | + |
| 588 | // 切回原核 | 579 | // 切回原核 |
| 589 | error = SetCoreOnFocus(process, commonInfo.m_stop_info); | 580 | error = SetCoreOnFocus(process, commonInfo.m_stop_info); |
| 590 | if (error.Fail()) { | 581 | if (error.Fail()) { |
| @@ -595,11 +586,11 @@ protected: | |||
| 595 | return false; | 586 | return false; |
| 596 | } | 587 | } |
| 597 | thread->RefreshStackFramePC(); | 588 | thread->RefreshStackFramePC(); |
| 598 | - | 589 | + |
| 599 | result.SetStatus(eReturnStatusSuccessFinishNoResult); | 590 | result.SetStatus(eReturnStatusSuccessFinishNoResult); |
| 600 | return error.Success(); | 591 | return error.Success(); |
| 601 | } | 592 | } |
| 602 | - | 593 | + |
| 603 | private: | 594 | private: |
| 604 | OptionGroupAscendInfoBlocks m_blocks_options; | 595 | OptionGroupAscendInfoBlocks m_blocks_options; |
| 605 | OptionGroupOptions m_all_options; | 596 | OptionGroupOptions m_all_options; |
| @@ -610,7 +601,7 @@ void PrintDevtbl(const SummaryInfo& summary_info, const DeviceStopInfo &stop_inf | |||
| 610 | strm << " CoreId CoreType PC DeviceId ChipType\n"; | 601 | strm << " CoreId CoreType PC DeviceId ChipType\n"; |
| 611 | static constexpr uint32_t ID_WIDTH = 4; | 602 | static constexpr uint32_t ID_WIDTH = 4; |
| 612 | for (const auto &core_info: core_infos) { | 603 | for (const auto &core_info: core_infos) { |
| 613 | - std::stringstream ss; | 604 | + std::stringstream ss; |
| 614 | ss << (core_info.core_type == stop_info.core_type && core_info.core_id == stop_info.core_id ? " *" : " "); | 605 | ss << (core_info.core_type == stop_info.core_type && core_info.core_id == stop_info.core_id ? " *" : " "); |
| 615 | ss << std::setw(ID_WIDTH) << static_cast<uint64_t>(core_info.core_id) << " " << | 606 | ss << std::setw(ID_WIDTH) << static_cast<uint64_t>(core_info.core_id) << " " << |
| 616 | (core_info.core_type == CoreType::AIC ? "AIC" : "AIV") << " 0x" << std::hex << | 607 | (core_info.core_type == CoreType::AIC ? "AIC" : "AIV") << " 0x" << std::hex << |
| @@ -618,7 +609,7 @@ void PrintDevtbl(const SummaryInfo& summary_info, const DeviceStopInfo &stop_inf | |||
| 618 | summary_info.dev_id << " " << | 609 | summary_info.dev_id << " " << |
| 619 | DevdrvChipTypeToStr[summary_info.chip_type] << std::endl; | 610 | DevdrvChipTypeToStr[summary_info.chip_type] << std::endl; |
| 620 | strm << ss.str(); | 611 | strm << ss.str(); |
| 621 | - } | 612 | + } |
| 622 | } | 613 | } |
| 623 | 614 | ||
| 624 | void PrintTensorShape(GlobalDataType data_type, const GlobalMemInfo &mem_info, std::stringstream &ss) { | 615 | void PrintTensorShape(GlobalDataType data_type, const GlobalMemInfo &mem_info, std::stringstream &ss) { |
| @@ -670,7 +661,8 @@ void PrintDeviceInfo(const SummaryInfo& summary_info, Stream &strm) { | |||
| 670 | CenterText(global_mem_vec[i].global_mem_info.addr, WIDTH_LONG, true, global_mem_vec[i].valid) << | 661 | CenterText(global_mem_vec[i].global_mem_info.addr, WIDTH_LONG, true, global_mem_vec[i].valid) << |
| 671 | " " << std::setw(WIDTH_LONG) << | 662 | " " << std::setw(WIDTH_LONG) << |
| 672 | CenterText(global_mem_vec[i].global_mem_info.size, WIDTH_LONG, false, true); | 663 | CenterText(global_mem_vec[i].global_mem_info.size, WIDTH_LONG, false, true); |
| 673 | - if (global_data_type == GlobalDataType::STACK) { | 664 | + if (global_data_type == GlobalDataType::STACK || |
| 665 | + global_data_type == GlobalDataType::VF_STACK) { | ||
| 674 | ss << " " << std::setw(WIDTH_SHORT) << | 666 | ss << " " << std::setw(WIDTH_SHORT) << |
| 675 | CenterText(core_id, WIDTH_SHORT, false, true) << | 667 | CenterText(core_id, WIDTH_SHORT, false, true) << |
| 676 | " " << std::setw(WIDTH_SHORT) << | 668 | " " << std::setw(WIDTH_SHORT) << |
| @@ -765,7 +757,7 @@ protected: | |||
| 765 | result.AppendError("Failed to get process info"); | 757 | result.AppendError("Failed to get process info"); |
| 766 | return; | 758 | return; |
| 767 | } | 759 | } |
| 768 | - | 760 | + |
| 769 | if (!process->IsStopInSimtKernel()) { | 761 | if (!process->IsStopInSimtKernel()) { |
| 770 | result.AppendError("The ascend info threads command can only run on in simt kernel."); | 762 | result.AppendError("The ascend info threads command can only run on in simt kernel."); |
| 771 | return; | 763 | return; |
| @@ -782,10 +774,10 @@ protected: | |||
| 782 | return; | 774 | return; |
| 783 | } | 775 | } |
| 784 | 776 | ||
| 785 | - ThreadPos thread_dim = { | 777 | + ThreadDim thread_dim = { |
| 786 | - core_info.thread_dim_x, | 778 | + core_info.thread_dim_x, |
| 787 | - core_info.thread_dim_y, | 779 | + core_info.thread_dim_y, |
| 788 | - core_info.thread_dim_z, | 780 | + core_info.thread_dim_z, |
| 789 | }; | 781 | }; |
| 790 | 782 | ||
| 791 | std::vector<WarpInfo> warps_info; | 783 | std::vector<WarpInfo> warps_info; |
| @@ -796,30 +788,24 @@ protected: | |||
| 796 | } | 788 | } |
| 797 | constexpr uint32_t WARP_SIZE = 32; | 789 | constexpr uint32_t WARP_SIZE = 32; |
| 798 | // 当前线程 | 790 | // 当前线程 |
| 799 | - uint32_t current_linear = ComputeLinearIdx({stop_info.thread_idx_x, stop_info.thread_idx_y, | 791 | + uint32_t current_linear = |
| 800 | - stop_info.thread_idx_z}, thread_dim); | 792 | + ComputeLinearIdx(stop_info.thread_pos, thread_dim); |
| 801 | // 属于哪个warp,用于突出展示 | 793 | // 属于哪个warp,用于突出展示 |
| 802 | uint32_t current_warp_id = current_linear / WARP_SIZE; | 794 | uint32_t current_warp_id = current_linear / WARP_SIZE; |
| 803 | 795 | ||
| 804 | - strm << " ThreadIdx to ThreadIdx ActiveCount " | 796 | + strm << " ThreadIdx to ThreadIdx ActiveCount " << CenterAlign("PC", 14) |
| 805 | - << CenterAlign("PC", 14) << " " << CenterAlign("ActiveMask", 10) << "\n"; | 797 | + << " " << CenterAlign("ActiveMask", 10) << "\n"; |
| 806 | - | 798 | + |
| 807 | // 按照warp维度展示线程信息,每行一个warp | 799 | // 按照warp维度展示线程信息,每行一个warp |
| 808 | for (const auto &warp : warps_info) { | 800 | for (const auto &warp : warps_info) { |
| 809 | // 计算每个线程的warp范围 | 801 | // 计算每个线程的warp范围 |
| 810 | uint32_t start_linear = warp.warp_id * WARP_SIZE; | 802 | uint32_t start_linear = warp.warp_id * WARP_SIZE; |
| 811 | uint32_t end_linear = start_linear + WARP_SIZE - 1; | 803 | uint32_t end_linear = start_linear + WARP_SIZE - 1; |
| 812 | - ThreadPos start_pos = LinearIdxToThreadIdx(start_linear, thread_dim); | 804 | + ThreadPos start_pos = LinearIdxToThreadPos(start_linear, thread_dim); |
| 813 | - ThreadPos end_pos = LinearIdxToThreadIdx(end_linear, thread_dim); | 805 | + ThreadPos end_pos = LinearIdxToThreadPos(end_linear, thread_dim); |
| 814 | 806 | ||
| 815 | // 统计活跃线程数量 | 807 | // 统计活跃线程数量 |
| 816 | - uint32_t active_count = 0; | 808 | + uint32_t active_count = __builtin_popcount(warp.exec_mask); |
| 817 | - for (uint32_t i = 0; i < WARP_SIZE; i++) { | ||
| 818 | - if ((warp.exec_mask & (1U << i)) != 0) { | ||
| 819 | - active_count++; | ||
| 820 | - } | ||
| 821 | - } | ||
| 822 | - | ||
| 823 | std::stringstream ss, start_ss, end_ss; | 809 | std::stringstream ss, start_ss, end_ss; |
| 824 | FormatThreadIdx(start_pos, start_ss); | 810 | FormatThreadIdx(start_pos, start_ss); |
| 825 | FormatThreadIdx(end_pos, end_ss); | 811 | FormatThreadIdx(end_pos, end_ss); |
| @@ -1109,25 +1095,23 @@ public: | |||
| 1109 | ~CommandObjectAscendThread() override = default; | 1095 | ~CommandObjectAscendThread() override = default; |
| 1110 | 1096 | ||
| 1111 | protected: | 1097 | protected: |
| 1112 | - | 1098 | + bool CheckThreadIdxValid(const ThreadPos &thread_idx, |
| 1113 | - bool CheckThreadIdxValid(const ThreadPos &thread_idx, const ThreadPos &thread_dim) { | 1099 | + const ThreadDim &thread_dim) { |
| 1114 | // 校验用户输入的x,y,z三维是否符合thread_dim的要求 | 1100 | // 校验用户输入的x,y,z三维是否符合thread_dim的要求 |
| 1115 | - if (thread_idx.x >= thread_dim.x || | 1101 | + if (thread_idx.x >= thread_dim.x || thread_idx.y >= thread_dim.y || |
| 1116 | - thread_idx.y >= thread_dim.y || | 1102 | + thread_idx.z >= thread_dim.z) { |
| 1117 | - thread_idx.z >= thread_dim.z | ||
| 1118 | - ) { | ||
| 1119 | return false; | 1103 | return false; |
| 1120 | } | 1104 | } |
| 1121 | 1105 | ||
| 1122 | return true; | 1106 | return true; |
| 1123 | } | 1107 | } |
| 1124 | 1108 | ||
| 1125 | - bool CheckThreadIdxValid(const uint32_t linear_idx, const ThreadPos &thread_dim) { | 1109 | + bool CheckThreadIdxValid(const uint32_t linear_idx, |
| 1110 | + const ThreadDim &thread_dim) { | ||
| 1126 | // 校验用户输入的线性线程ID是否符合thread_dim的要求 | 1111 | // 校验用户输入的线性线程ID是否符合thread_dim的要求 |
| 1127 | - return linear_idx < (thread_dim.x * thread_dim.y * thread_dim.z); | 1112 | + return linear_idx < (thread_dim.x * 1ULL * thread_dim.y * thread_dim.z); |
| 1128 | } | 1113 | } |
| 1129 | 1114 | ||
| 1130 | - | ||
| 1131 | Status GetWarpInfo(Process *process, WarpInfo &info) { | 1115 | Status GetWarpInfo(Process *process, WarpInfo &info) { |
| 1132 | std::vector<WarpInfo> warps_info; | 1116 | std::vector<WarpInfo> warps_info; |
| 1133 | Status error = process->GetWarpsInfo(warps_info); | 1117 | Status error = process->GetWarpsInfo(warps_info); |
| @@ -1156,7 +1140,8 @@ protected: | |||
| 1156 | 1140 | ||
| 1157 | } | 1141 | } |
| 1158 | 1142 | ||
| 1159 | - bool GetLinearIdx(Args &command, CommandReturnObject &result, uint32_t &linear_idx, const ThreadPos &thread_dim) { | 1143 | + bool GetLinearIdx(Args &command, CommandReturnObject &result, |
| 1144 | + uint32_t &linear_idx, const ThreadDim &thread_dim) { | ||
| 1160 | // 解析参数,校验参数并获取用户的线性ID | 1145 | // 解析参数,校验参数并获取用户的线性ID |
| 1161 | std::string arg0 = command.GetArgumentAtIndex(0); | 1146 | std::string arg0 = command.GetArgumentAtIndex(0); |
| 1162 | 1147 | ||
| @@ -1165,7 +1150,7 @@ protected: | |||
| 1165 | size_t pos2 = arg0.find(',', pos1 + 1); | 1150 | size_t pos2 = arg0.find(',', pos1 + 1); |
| 1166 | size_t end_pos = arg0.find(')'); | 1151 | size_t end_pos = arg0.find(')'); |
| 1167 | 1152 | ||
| 1168 | - if (pos1 == std::string::npos || pos2 == std::string::npos || | 1153 | + if (pos1 == std::string::npos || pos2 == std::string::npos || |
| 1169 | end_pos == std::string::npos) { | 1154 | end_pos == std::string::npos) { |
| 1170 | result.AppendErrorWithFormat("Invalid format, expected (x, y, z)"); | 1155 | result.AppendErrorWithFormat("Invalid format, expected (x, y, z)"); |
| 1171 | return false; | 1156 | return false; |
| @@ -1183,7 +1168,9 @@ protected: | |||
| 1183 | return false; | 1168 | return false; |
| 1184 | } | 1169 | } |
| 1185 | 1170 | ||
| 1186 | - ThreadPos thread_idx = {x, y, z}; | 1171 | + ThreadPos thread_idx = {static_cast<uint16_t>(x), |
| 1172 | + static_cast<uint16_t>(y), | ||
| 1173 | + static_cast<uint16_t>(z)}; | ||
| 1187 | if (!CheckThreadIdxValid(thread_idx, thread_dim)) { | 1174 | if (!CheckThreadIdxValid(thread_idx, thread_dim)) { |
| 1188 | result.AppendErrorWithFormat("input thread is invalid and exceeds the value range indicated by thread_dim."); | 1175 | result.AppendErrorWithFormat("input thread is invalid and exceeds the value range indicated by thread_dim."); |
| 1189 | return false; | 1176 | return false; |
| @@ -1261,7 +1248,7 @@ protected: | |||
| 1261 | result.AppendError("Failed to get thread info"); | 1248 | result.AppendError("Failed to get thread info"); |
| 1262 | return; | 1249 | return; |
| 1263 | } | 1250 | } |
| 1264 | - | 1251 | + |
| 1265 | DeviceStopInfo stop_info; | 1252 | DeviceStopInfo stop_info; |
| 1266 | process->GetDeviceStopInfoCached(stop_info); | 1253 | process->GetDeviceStopInfoCached(stop_info); |
| 1267 | 1254 | ||
| @@ -1272,11 +1259,11 @@ protected: | |||
| 1272 | result.AppendErrorWithFormat("Failed to get core info."); | 1259 | result.AppendErrorWithFormat("Failed to get core info."); |
| 1273 | return; | 1260 | return; |
| 1274 | } | 1261 | } |
| 1275 | - | 1262 | + |
| 1276 | - ThreadPos thread_dim = { | 1263 | + ThreadDim thread_dim = { |
| 1277 | - core_info.thread_dim_x, | 1264 | + core_info.thread_dim_x, |
| 1278 | - core_info.thread_dim_y, | 1265 | + core_info.thread_dim_y, |
| 1279 | - core_info.thread_dim_z, | 1266 | + core_info.thread_dim_z, |
| 1280 | }; | 1267 | }; |
| 1281 | 1268 | ||
| 1282 | uint32_t linear_idx; | 1269 | uint32_t linear_idx; |
| @@ -1285,7 +1272,7 @@ protected: | |||
| 1285 | return; | 1272 | return; |
| 1286 | } | 1273 | } |
| 1287 | 1274 | ||
| 1288 | - WarpInfo warp_info; | 1275 | + WarpInfo warp_info{}; |
| 1289 | warp_info.warp_id = GetWarpId(linear_idx); | 1276 | warp_info.warp_id = GetWarpId(linear_idx); |
| 1290 | 1277 | ||
| 1291 | error = GetWarpInfo(process, warp_info); | 1278 | error = GetWarpInfo(process, warp_info); |
| @@ -1305,9 +1292,9 @@ protected: | |||
| 1305 | return; | 1292 | return; |
| 1306 | } | 1293 | } |
| 1307 | // update core info cache in client | 1294 | // update core info cache in client |
| 1308 | - stop_info.thread_idx_x = linear_idx % thread_dim.x; | 1295 | + stop_info.thread_pos = LinearIdxToThreadPos( |
| 1309 | - stop_info.thread_idx_y = (linear_idx / thread_dim.x) % thread_dim.y; | 1296 | + linear_idx, {core_info.thread_dim_x, core_info.thread_dim_y, |
| 1310 | - stop_info.thread_idx_z = linear_idx / (thread_dim.x * thread_dim.y); | 1297 | + core_info.thread_dim_z}); |
| 1311 | process->SetDeviceStopInfoCached(stop_info); | 1298 | process->SetDeviceStopInfoCached(stop_info); |
| 1312 | // 切换线程后,刷新与线程相关的寄存器缓存 | 1299 | // 切换线程后,刷新与线程相关的寄存器缓存 |
| 1313 | RegisterContextSP reg_ctx_sp(thread->GetRegisterContext()); | 1300 | RegisterContextSP reg_ctx_sp(thread->GetRegisterContext()); |
| @@ -191,7 +191,7 @@ public: | |||
| 191 | } | 191 | } |
| 192 | 192 | ||
| 193 | // 按照名称和长度对寄存器索引排序 | 193 | // 按照名称和长度对寄存器索引排序 |
| 194 | - std::sort(reg_indices.begin(), reg_indices.end(), | 194 | + std::sort(reg_indices.begin(), reg_indices.end(), |
| 195 | [reg_ctx](uint32_t a, uint32_t b) { | 195 | [reg_ctx](uint32_t a, uint32_t b) { |
| 196 | const RegisterInfo *info_a = reg_ctx->GetRegisterInfoAtIndex(a); | 196 | const RegisterInfo *info_a = reg_ctx->GetRegisterInfoAtIndex(a); |
| 197 | const RegisterInfo *info_b = reg_ctx->GetRegisterInfoAtIndex(b); | 197 | const RegisterInfo *info_b = reg_ctx->GetRegisterInfoAtIndex(b); |
| @@ -205,7 +205,7 @@ public: | |||
| 205 | } | 205 | } |
| 206 | return len_a < len_b; | 206 | return len_a < len_b; |
| 207 | }); | 207 | }); |
| 208 | - | 208 | + |
| 209 | for (uint32_t reg : reg_indices) { | 209 | for (uint32_t reg : reg_indices) { |
| 210 | const RegisterInfo *reg_info = reg_ctx->GetRegisterInfoAtIndex(reg); | 210 | const RegisterInfo *reg_info = reg_ctx->GetRegisterInfoAtIndex(reg); |
| 211 | if (reg_info && DumpRegister(exe_ctx, strm, *reg_ctx, *reg_info, | 211 | if (reg_info && DumpRegister(exe_ctx, strm, *reg_ctx, *reg_info, |
| @@ -243,12 +243,6 @@ protected: | |||
| 243 | size_t num_register_sets = 1; | 243 | size_t num_register_sets = 1; |
| 244 | const size_t set_array_size = m_command_options.set_indexes.GetSize(); | 244 | const size_t set_array_size = m_command_options.set_indexes.GetSize(); |
| 245 | if (set_array_size > 0) { | 245 | if (set_array_size > 0) { |
| 246 | - | ||
| 247 | - if (process->DeviceCoredumpEnable() || process->IsStopInDevice()) { | ||
| 248 | - result.AppendError("Ascend device does not support setting register index."); | ||
| 249 | - return; | ||
| 250 | - } | ||
| 251 | - | ||
| 252 | for (size_t i = 0; i < set_array_size; ++i) { | 246 | for (size_t i = 0; i < set_array_size; ++i) { |
| 253 | set_idx = | 247 | set_idx = |
| 254 | m_command_options.set_indexes[i]->GetValueAs<uint64_t>().value_or( | 248 | m_command_options.set_indexes[i]->GetValueAs<uint64_t>().value_or( |
| @@ -269,22 +263,18 @@ protected: | |||
| 269 | } | 263 | } |
| 270 | } | 264 | } |
| 271 | } else { | 265 | } else { |
| 272 | - | ||
| 273 | - if (process->IsStopInDevice() && !process->DeviceCoredumpEnable()) { | ||
| 274 | - if (m_command_options.alternate_name) { | ||
| 275 | - result.AppendError("Ascend device dose not support setting register alternate name."); | ||
| 276 | - } | ||
| 277 | - if (m_command_options.dump_all_sets) { | ||
| 278 | - DumpRegisterSetWithSort(m_exe_ctx, strm, reg_ctx, set_idx, | ||
| 279 | - !m_command_options.dump_all_sets.GetCurrentValue()); | ||
| 280 | - } | ||
| 281 | - return; | ||
| 282 | - } | ||
| 283 | - | ||
| 284 | if (m_command_options.dump_all_sets) | 266 | if (m_command_options.dump_all_sets) |
| 285 | num_register_sets = reg_ctx->GetRegisterSetCount(); | 267 | num_register_sets = reg_ctx->GetRegisterSetCount(); |
| 286 | 268 | ||
| 287 | for (set_idx = 0; set_idx < num_register_sets; ++set_idx) { | 269 | for (set_idx = 0; set_idx < num_register_sets; ++set_idx) { |
| 270 | + | ||
| 271 | + if (process->IsStopInDevice()) { | ||
| 272 | + DumpRegisterSetWithSort( | ||
| 273 | + m_exe_ctx, strm, reg_ctx, set_idx, | ||
| 274 | + !m_command_options.dump_all_sets.GetCurrentValue()); | ||
| 275 | + continue; | ||
| 276 | + } | ||
| 277 | + | ||
| 288 | // When dump_all_sets option is set, dump primitive as well as | 278 | // When dump_all_sets option is set, dump primitive as well as |
| 289 | // derived registers. | 279 | // derived registers. |
| 290 | DumpRegisterSet(m_exe_ctx, strm, reg_ctx, set_idx, | 280 | DumpRegisterSet(m_exe_ctx, strm, reg_ctx, set_idx, |
| @@ -229,7 +229,7 @@ void AscendProcessLinux::HandleMsg(Socket *client_socket, const std::string &msg | |||
| 229 | } | 229 | } |
| 230 | auto it = m_socket_device_pid.find(client_socket); | 230 | auto it = m_socket_device_pid.find(client_socket); |
| 231 | if (it == m_socket_device_pid.end()) { | 231 | if (it == m_socket_device_pid.end()) { |
| 232 | - LLDB_LOG(log, "receive this device id for the fisrt time, message is: {0}, original length is {1}", | 232 | + LLDB_LOG(log, "receive this device id for the first time, message is: {0}, original length is {1}", |
| 233 | display_msg, msg.length()); | 233 | display_msg, msg.length()); |
| 234 | } else { | 234 | } else { |
| 235 | LLDB_LOG(log, "receive message for device id: {0}, pid: {1}, message is: {2}", | 235 | LLDB_LOG(log, "receive message for device id: {0}, pid: {1}, message is: {2}", |
| @@ -657,7 +657,7 @@ void AscendProcessLinux::HandleProcessState(const DebugRecvInfo &info) { | |||
| 657 | if (info.cmd_type == CmdType::INTERRUPT_EVENT) { | 657 | if (info.cmd_type == CmdType::INTERRUPT_EVENT) { |
| 658 | const InterruptEvent *param = (const InterruptEvent*)info.recv_msg; | 658 | const InterruptEvent *param = (const InterruptEvent*)info.recv_msg; |
| 659 | InterruptEvent event = *param; | 659 | InterruptEvent event = *param; |
| 660 | - if (param->pos_type == InterruptPosType::STARS_VEC_INTERRUPT_SIMD) { | 660 | + if (param->pos_type == InterruptPosType::VEC_INTERRUPT_SIMD) { |
| 661 | LLDB_LOG(log, "latest vf start pc={0:x}", m_latest_vf_start_pc); | 661 | LLDB_LOG(log, "latest vf start pc={0:x}", m_latest_vf_start_pc); |
| 662 | FixSimdPC(event.pc); | 662 | FixSimdPC(event.pc); |
| 663 | } | 663 | } |
| @@ -666,7 +666,7 @@ void AscendProcessLinux::HandleProcessState(const DebugRecvInfo &info) { | |||
| 666 | (uint8_t)param->pos_type, param->thread_info.thread_dim_x, param->thread_info.thread_dim_y, param->thread_info.thread_dim_z, | 666 | (uint8_t)param->pos_type, param->thread_info.thread_dim_x, param->thread_info.thread_dim_y, param->thread_info.thread_dim_z, |
| 667 | param->thread_info.thread_id, param->pc); | 667 | param->thread_info.thread_id, param->pc); |
| 668 | std::lock_guard<std::mutex> guard(m_status_mtx); | 668 | std::lock_guard<std::mutex> guard(m_status_mtx); |
| 669 | - if (event.pos_type == InterruptPosType::STARS_VEC_INTERRUPT_SIMT) { | 669 | + if (event.pos_type == InterruptPosType::VEC_INTERRUPT_SIMT) { |
| 670 | TryUpdateThreadIndex(event); | 670 | TryUpdateThreadIndex(event); |
| 671 | } | 671 | } |
| 672 | if (param->status == CoreStatus::BRKPT) { | 672 | if (param->status == CoreStatus::BRKPT) { |
| @@ -816,7 +816,7 @@ void AscendProcessLinux::SetThreadOnFocus(const uint32_t &linear_idx) { | |||
| 816 | thread->SetStopThreadIdx(m_pos_info.thread_pos.x, | 816 | thread->SetStopThreadIdx(m_pos_info.thread_pos.x, |
| 817 | m_pos_info.thread_pos.y, | 817 | m_pos_info.thread_pos.y, |
| 818 | m_pos_info.thread_pos.z); | 818 | m_pos_info.thread_pos.z); |
| 819 | - | 819 | + |
| 820 | } | 820 | } |
| 821 | 821 | ||
| 822 | } | 822 | } |
| @@ -859,9 +859,9 @@ Status AscendProcessLinux::GetCoresInfo(std::vector<CoreInfo> &info) { | |||
| 859 | if (error.Fail()) { | 859 | if (error.Fail()) { |
| 860 | return error; | 860 | return error; |
| 861 | } | 861 | } |
| 862 | - | 862 | + |
| 863 | for (auto &core_info: info) { | 863 | for (auto &core_info: info) { |
| 864 | - if (core_info.pos_type == InterruptPosType::STARS_VEC_INTERRUPT_SIMD) { | 864 | + if (core_info.pos_type == InterruptPosType::VEC_INTERRUPT_SIMD) { |
| 865 | FixSimdPC(core_info.pc); | 865 | FixSimdPC(core_info.pc); |
| 866 | } | 866 | } |
| 867 | } | 867 | } |
| @@ -952,7 +952,7 @@ Status AscendProcessLinux::ReadDeviceRegisterList(std::vector<std::string> ®_ | |||
| 952 | if (m_device_context == nullptr) { | 952 | if (m_device_context == nullptr) { |
| 953 | return Status("device context is null!"); | 953 | return Status("device context is null!"); |
| 954 | } | 954 | } |
| 955 | - return m_device_context->ReadRegisterList(reg_list, m_pos_info.core_id, m_pos_info.core_type); | 955 | + return Status("Unsupport read device register list"); |
| 956 | } | 956 | } |
| 957 | 957 | ||
| 958 | Status AscendProcessLinux::ReadMemoryWithoutTrap(lldb::addr_t addr, void *buf, size_t size, | 958 | Status AscendProcessLinux::ReadMemoryWithoutTrap(lldb::addr_t addr, void *buf, size_t size, |
| @@ -17,32 +17,6 @@ Ascend310PDeviceContext::Ascend310PDeviceContext(const ::pid_t pid, const uint32 | |||
| 17 | m_reg_info_up = std::make_unique<RegisterInfoPOSIX_ascend310P>(ArchSpec("hiipu64")); | 17 | m_reg_info_up = std::make_unique<RegisterInfoPOSIX_ascend310P>(ArchSpec("hiipu64")); |
| 18 | } | 18 | } |
| 19 | 19 | ||
| 20 | -Status Ascend310PDeviceContext::GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr) { | ||
| 21 | - Status error; | ||
| 22 | - const auto ®ister_map = RegisterInfoPOSIX_ascend310P::GetRegExtractor().register_map; | ||
| 23 | - auto reg_info = register_map.find(reg_name.str()); | ||
| 24 | - if (reg_info == register_map.end()) { | ||
| 25 | - error.SetErrorStringWithFormatv( | ||
| 26 | - "Can not get addr, register name: {0}", reg_name); | ||
| 27 | - return error; | ||
| 28 | - } | ||
| 29 | - addr = reg_info->second.addr; | ||
| 30 | - return error; | ||
| 31 | -} | ||
| 32 | - | ||
| 33 | -Status Ascend310PDeviceContext::GetRegisterList(std::vector<std::string> ®_list, CoreType core_type) { | ||
| 34 | - Status error; | ||
| 35 | - if (core_type == CoreType::UNKNOWN_CORE_TYPE) { | ||
| 36 | - error.SetErrorString("GetRegisterList failed due to unknown core type."); | ||
| 37 | - return error; | ||
| 38 | - } | ||
| 39 | - const auto ®ister_map = RegisterInfoPOSIX_ascend310P::GetRegExtractor().register_map; | ||
| 40 | - for(const auto &item : register_map) { | ||
| 41 | - reg_list.push_back(item.first); | ||
| 42 | - } | ||
| 43 | - return error; | ||
| 44 | -} | ||
| 45 | - | ||
| 46 | Status Ascend310PDeviceContext::CheckRegisterAddr(CoreType core_type, uint64_t addr) const { | 20 | Status Ascend310PDeviceContext::CheckRegisterAddr(CoreType core_type, uint64_t addr) const { |
| 47 | Status error; | 21 | Status error; |
| 48 | const auto ®ister_map = RegisterInfoPOSIX_ascend310P::GetRegExtractor().register_map; | 22 | const auto ®ister_map = RegisterInfoPOSIX_ascend310P::GetRegExtractor().register_map; |
| @@ -149,7 +123,7 @@ size_t Ascend310PDeviceContext::ReadLocalMemory( | |||
| 149 | auto mem_type = DeviceAddressClassToMemType(memory_type_info.address_class); | 123 | auto mem_type = DeviceAddressClassToMemType(memory_type_info.address_class); |
| 150 | LLDB_LOG(log, "{0} read local memory: element_size={1}, mem_type={2}", | 124 | LLDB_LOG(log, "{0} read local memory: element_size={1}, mem_type={2}", |
| 151 | __FUNCTION__, memory_type_info.element_size, static_cast<uint32_t>(mem_type)); | 125 | __FUNCTION__, memory_type_info.element_size, static_cast<uint32_t>(mem_type)); |
| 152 | - | 126 | + |
| 153 | if (mem_type == MemType::L0A || mem_type == MemType::L0B) { | 127 | if (mem_type == MemType::L0A || mem_type == MemType::L0B) { |
| 154 | return ReadL0ABMemory(addr, size, memory_type_info, pos_info, data); | 128 | return ReadL0ABMemory(addr, size, memory_type_info, pos_info, data); |
| 155 | } else if (mem_type != MemType::L0C || | 129 | } else if (mem_type != MemType::L0C || |
| @@ -15,8 +15,6 @@ public: | |||
| 15 | Ascend310PDeviceContext(const ::pid_t pid, const uint32_t device_id); | 15 | Ascend310PDeviceContext(const ::pid_t pid, const uint32_t device_id); |
| 16 | ~Ascend310PDeviceContext() = default; | 16 | ~Ascend310PDeviceContext() = default; |
| 17 | SocType GetSocType() override { return m_soc_type; } | 17 | SocType GetSocType() override { return m_soc_type; } |
| 18 | - Status GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr) override; | ||
| 19 | - Status GetRegisterList(std::vector<std::string> ®_list, CoreType core_type) override; | ||
| 20 | Status CheckRegisterAddr(CoreType core_type, uint64_t addr) const override; | 18 | Status CheckRegisterAddr(CoreType core_type, uint64_t addr) const override; |
| 21 | 19 | ||
| 22 | MemType GetStackMemType() const override; | 20 | MemType GetStackMemType() const override; |
| @@ -20,44 +20,18 @@ Ascend910BDeviceContext::Ascend910BDeviceContext(const ::pid_t pid, const uint32 | |||
| 20 | m_reg_info_up = std::make_unique<RegisterInfoPOSIX_ascend910B>(ArchSpec("hiipu64")); | 20 | m_reg_info_up = std::make_unique<RegisterInfoPOSIX_ascend910B>(ArchSpec("hiipu64")); |
| 21 | } | 21 | } |
| 22 | 22 | ||
| 23 | -Status Ascend910BDeviceContext::GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr) { | 23 | +MemType Ascend910BDeviceContext::GetStackMemType() const { |
| 24 | - Status error; | 24 | + return MemType::OUT_MEM; |
| 25 | - const auto ®ister_map = RegisterInfoPOSIX_ascend910B::GetRegExtractor().register_map; | ||
| 26 | - auto reg_info = register_map.find(reg_name.str()); | ||
| 27 | - if (reg_info == register_map.end()) { | ||
| 28 | - error.SetErrorStringWithFormatv( | ||
| 29 | - "Can not get addr, register name: {0}", reg_name); | ||
| 30 | - return error; | ||
| 31 | - } | ||
| 32 | - if ((1U << static_cast<int>(core_type)) & reg_info->second.core_type_support_mask) { | ||
| 33 | - addr = reg_info->second.addr; | ||
| 34 | - } else { | ||
| 35 | - error.SetErrorStringWithFormatv( | ||
| 36 | - "Can not get addr, register {0} is not support", reg_name); | ||
| 37 | - } | ||
| 38 | - return error; | ||
| 39 | } | 25 | } |
| 40 | 26 | ||
| 41 | -Status Ascend910BDeviceContext::GetRegisterList(std::vector<std::string> ®_list, CoreType core_type) { | 27 | +Status Ascend910BDeviceContext::CheckRegisterAddr(CoreType core_type, |
| 28 | + uint64_t addr) const { | ||
| 42 | Status error; | 29 | Status error; |
| 43 | - if (core_type == CoreType::UNKNOWN_CORE_TYPE) { | 30 | + const auto ®ister_map = |
| 44 | - error.SetErrorString("GetRegisterList failed due to unknown core type."); | 31 | + RegisterInfoPOSIX_ascend910B::GetRegExtractor().register_map; |
| 45 | - return error; | ||
| 46 | - } | ||
| 47 | - const auto ®ister_map = RegisterInfoPOSIX_ascend910B::GetRegExtractor().register_map; | ||
| 48 | - for(const auto &item : register_map) { | ||
| 49 | - if ((1U << static_cast<int>(core_type)) & item.second.core_type_support_mask) { | ||
| 50 | - reg_list.push_back(item.first); | ||
| 51 | - } | ||
| 52 | - } | ||
| 53 | - return error; | ||
| 54 | -} | ||
| 55 | - | ||
| 56 | -Status Ascend910BDeviceContext::CheckRegisterAddr(CoreType core_type, uint64_t addr) const { | ||
| 57 | - Status error; | ||
| 58 | - const auto ®ister_map = RegisterInfoPOSIX_ascend910B::GetRegExtractor().register_map; | ||
| 59 | for (const auto &item : register_map) { | 32 | for (const auto &item : register_map) { |
| 60 | - if ((1U << static_cast<int>(core_type)) & item.second.core_type_support_mask) { | 33 | + if ((1U << static_cast<int>(core_type)) & |
| 34 | + item.second.core_type_support_mask) { | ||
| 61 | if (item.second.addr == addr) { | 35 | if (item.second.addr == addr) { |
| 62 | return error; | 36 | return error; |
| 63 | } | 37 | } |
| @@ -67,10 +41,6 @@ Status Ascend910BDeviceContext::CheckRegisterAddr(CoreType core_type, uint64_t a | |||
| 67 | return error; | 41 | return error; |
| 68 | } | 42 | } |
| 69 | 43 | ||
| 70 | -MemType Ascend910BDeviceContext::GetStackMemType() const { | ||
| 71 | - return MemType::OUT_MEM; | ||
| 72 | -} | ||
| 73 | - | ||
| 74 | size_t Ascend910BDeviceContext::ReadLocalMemory(lldb::addr_t addr, size_t size, const MemoryTypeInfo &memory_type_info, | 44 | size_t Ascend910BDeviceContext::ReadLocalMemory(lldb::addr_t addr, size_t size, const MemoryTypeInfo &memory_type_info, |
| 75 | const InterruptPosInfo &pos_info, void *data) { | 45 | const InterruptPosInfo &pos_info, void *data) { |
| 76 | auto mem_type = DeviceAddressClassToMemType(memory_type_info.address_class); | 46 | auto mem_type = DeviceAddressClassToMemType(memory_type_info.address_class); |
| @@ -15,8 +15,6 @@ public: | |||
| 15 | Ascend910BDeviceContext(const ::pid_t pid, const uint32_t device_id); | 15 | Ascend910BDeviceContext(const ::pid_t pid, const uint32_t device_id); |
| 16 | ~Ascend910BDeviceContext() = default; | 16 | ~Ascend910BDeviceContext() = default; |
| 17 | SocType GetSocType() override { return m_soc_type; } | 17 | SocType GetSocType() override { return m_soc_type; } |
| 18 | - Status GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr) override; | ||
| 19 | - Status GetRegisterList(std::vector<std::string> ®_list, CoreType core_type) override; | ||
| 20 | Status CheckRegisterAddr(CoreType core_type, uint64_t addr) const override; | 18 | Status CheckRegisterAddr(CoreType core_type, uint64_t addr) const override; |
| 21 | 19 | ||
| 22 | MemType GetStackMemType() const override; | 20 | MemType GetStackMemType() const override; |
| @@ -5,10 +5,10 @@ | |||
| 5 | 5 | ||
| 6 | 6 | ||
| 7 | 7 | ||
| 8 | - | 8 | + |
| 9 | using namespace lldb_private; | 9 | using namespace lldb_private; |
| 10 | using namespace lldb; | 10 | using namespace lldb; |
| 11 | - | 11 | + |
| 12 | namespace debug_ts { | 12 | namespace debug_ts { |
| 13 | 13 | ||
| 14 | struct DeviceCoreMask { | 14 | struct DeviceCoreMask { |
| @@ -17,12 +17,12 @@ struct DeviceCoreMask { | |||
| 17 | uint64_t aiv_bitmap0; | 17 | uint64_t aiv_bitmap0; |
| 18 | uint64_t aiv_bitmap1; | 18 | uint64_t aiv_bitmap1; |
| 19 | }; | 19 | }; |
| 20 | - | 20 | + |
| 21 | struct CoreMaskParam { | 21 | struct CoreMaskParam { |
| 22 | uint32_t magic {0U}; | 22 | uint32_t magic {0U}; |
| 23 | DeviceCoreMask cores; | 23 | DeviceCoreMask cores; |
| 24 | }; | 24 | }; |
| 25 | - | 25 | + |
| 26 | // single step 和 resume共用 | 26 | // single step 和 resume共用 |
| 27 | struct ControlUnitParam { | 27 | struct ControlUnitParam { |
| 28 | CoreMaskParam core_info; | 28 | CoreMaskParam core_info; |
| @@ -48,58 +48,28 @@ struct HardBreakpointParam { | |||
| 48 | uint64_t virt_addr; | 48 | uint64_t virt_addr; |
| 49 | DeviceCoreMask core_info; // 使能哪些core做断点设置 | 49 | DeviceCoreMask core_info; // 使能哪些core做断点设置 |
| 50 | }; | 50 | }; |
| 51 | - | 51 | + |
| 52 | struct WarpInfoParam { | 52 | struct WarpInfoParam { |
| 53 | uint8_t core_type; | 53 | uint8_t core_type; |
| 54 | uint8_t bkpt_type; | 54 | uint8_t bkpt_type; |
| 55 | uint8_t core_id; | 55 | uint8_t core_id; |
| 56 | uint8_t warp_id; | 56 | uint8_t warp_id; |
| 57 | }; | 57 | }; |
| 58 | - | 58 | + |
| 59 | 59 | ||
| 60 | - | 60 | + |
| 61 | } // namespace debug_ts | 61 | } // namespace debug_ts |
| 62 | - | 62 | + |
| 63 | using namespace debug_ts; | 63 | using namespace debug_ts; |
| 64 | - | 64 | + |
| 65 | Ascend950DeviceContext::Ascend950DeviceContext(const ::pid_t pid, const uint32_t device_id): | 65 | Ascend950DeviceContext::Ascend950DeviceContext(const ::pid_t pid, const uint32_t device_id): |
| 66 | DeviceContext(pid, device_id) { | 66 | DeviceContext(pid, device_id) { |
| 67 | m_soc_type = SocType::ASCEND950; | 67 | m_soc_type = SocType::ASCEND950; |
| 68 | m_reg_info_up = std::make_unique<RegisterInfoPOSIX_ascend950>(ArchSpec("hiipu64")); | 68 | m_reg_info_up = std::make_unique<RegisterInfoPOSIX_ascend950>(ArchSpec("hiipu64")); |
| 69 | } | 69 | } |
| 70 | - | ||
| 71 | -Status Ascend950DeviceContext::GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr) { | ||
| 72 | - Status error; | ||
| 73 | - const auto ®ister_map = RegisterInfoPOSIX_ascend950::GetRegExtractor().register_map; | ||
| 74 | - auto reg_info = register_map.find(reg_name.str()); | ||
| 75 | - if (reg_info == register_map.end()) { | ||
| 76 | - error.SetErrorStringWithFormatv( | ||
| 77 | - "Can not get addr, register name: {0}", reg_name); | ||
| 78 | - } | ||
| 79 | - if ((1U << static_cast<int>(core_type)) & reg_info->second.core_type_support_mask) { | ||
| 80 | - addr = reg_info->second.addr; | ||
| 81 | - } else { | ||
| 82 | - error.SetErrorStringWithFormatv( | ||
| 83 | - "Can not get addr, register {0} is not support", reg_name); | ||
| 84 | - } | ||
| 85 | - return error; | ||
| 86 | -} | ||
| 87 | - | ||
| 88 | -Status Ascend950DeviceContext::GetRegisterList(std::vector<std::string> ®_list, CoreType core_type) { | ||
| 89 | - Status error; | ||
| 90 | - if (core_type == CoreType::UNKNOWN_CORE_TYPE) { | ||
| 91 | - error.SetErrorString("GetRegisterList failed due to unknown core type."); | ||
| 92 | - return error; | ||
| 93 | - } | ||
| 94 | - const auto ®ister_map = RegisterInfoPOSIX_ascend950::GetRegExtractor().register_map; | ||
| 95 | - for(const auto &item : register_map) { | ||
| 96 | - if ((1U << static_cast<int>(core_type)) & item.second.core_type_support_mask) { | ||
| 97 | - reg_list.push_back(item.first); | ||
| 98 | - } | ||
| 99 | - } | ||
| 100 | - return error; | ||
| 101 | -} | ||
| 102 | 70 | ||
| 71 | +// we should prevent user read custom addr in client | ||
| 72 | +// or not let DeviceContext::ReadRegister() export to public | ||
| 103 | Status Ascend950DeviceContext::CheckRegisterAddr(CoreType core_type, uint64_t addr) const { | 73 | Status Ascend950DeviceContext::CheckRegisterAddr(CoreType core_type, uint64_t addr) const { |
| 104 | Status error; | 74 | Status error; |
| 105 | const auto ®ister_map = RegisterInfoPOSIX_ascend950::GetRegExtractor().register_map; | 75 | const auto ®ister_map = RegisterInfoPOSIX_ascend950::GetRegExtractor().register_map; |
| @@ -171,18 +141,18 @@ inline auto FormatCoresLog(const DeviceCoreMask &cores) { | |||
| 171 | return llvm::formatv("aic_bitmap0={0:x}, aic_bitmap1={1:x}, aiv_bitmap0={2:x}, aiv_bitmap1={3:x}", | 141 | return llvm::formatv("aic_bitmap0={0:x}, aic_bitmap1={1:x}, aiv_bitmap0={2:x}, aiv_bitmap1={3:x}", |
| 172 | cores.aic_bitmap0, cores.aic_bitmap1, cores.aiv_bitmap0, cores.aiv_bitmap1); | 142 | cores.aic_bitmap0, cores.aic_bitmap1, cores.aiv_bitmap0, cores.aiv_bitmap1); |
| 173 | } | 143 | } |
| 174 | - | 144 | + |
| 175 | Status Ascend950DeviceContext::Resume(const InterruptPosInfo &pos_info) const { | 145 | Status Ascend950DeviceContext::Resume(const InterruptPosInfo &pos_info) const { |
| 176 | ControlUnitParam param; | 146 | ControlUnitParam param; |
| 177 | param.core_info = GenCoreMask(pos_info); | 147 | param.core_info = GenCoreMask(pos_info); |
| 178 | - if (pos_info.pos_type == InterruptPosType::STARS_VEC_INTERRUPT_SIMT) { | 148 | + if (pos_info.pos_type == InterruptPosType::VEC_INTERRUPT_SIMT) { |
| 179 | - if (pos_info.single_warp_run) { | 149 | + if (pos_info.single_warp_run) { |
| 180 | - param.thread_id_x = pos_info.thread_pos.x; | 150 | + param.thread_id_x = pos_info.thread_pos.x; |
| 181 | - param.thread_id_y = pos_info.thread_pos.y; | 151 | + param.thread_id_y = pos_info.thread_pos.y; |
| 182 | - param.thread_id_z = pos_info.thread_pos.z; | 152 | + param.thread_id_z = pos_info.thread_pos.z; |
| 183 | - } else { | 153 | + } else { |
| 184 | - param.enable_all_warp = 1; | 154 | + param.enable_all_warp = 1; |
| 185 | - } | 155 | + } |
| 186 | } | 156 | } |
| 187 | param.pos_type = pos_info.pos_type; | 157 | param.pos_type = pos_info.pos_type; |
| 188 | Log *log = GetLog(LLDBLog::Process); | 158 | Log *log = GetLog(LLDBLog::Process); |
| @@ -194,18 +164,18 @@ Status Ascend950DeviceContext::Resume(const InterruptPosInfo &pos_info) const { | |||
| 194 | static_cast<uint8_t>(param.pos_type)); | 164 | static_cast<uint8_t>(param.pos_type)); |
| 195 | return BaseSqCqComm(CmdType::RESUME_DEVICE, (uint8_t*)¶m, sizeof(param)); | 165 | return BaseSqCqComm(CmdType::RESUME_DEVICE, (uint8_t*)¶m, sizeof(param)); |
| 196 | } | 166 | } |
| 197 | - | 167 | + |
| 198 | Status Ascend950DeviceContext::SingleStep(const InterruptPosInfo &pos_info) const { | 168 | Status Ascend950DeviceContext::SingleStep(const InterruptPosInfo &pos_info) const { |
| 199 | ControlUnitParam param{}; | 169 | ControlUnitParam param{}; |
| 200 | param.core_info = GenCoreMask(pos_info); | 170 | param.core_info = GenCoreMask(pos_info); |
| 201 | - if (pos_info.pos_type == InterruptPosType::STARS_VEC_INTERRUPT_SIMT) { | 171 | + if (pos_info.pos_type == InterruptPosType::VEC_INTERRUPT_SIMT) { |
| 202 | - if (pos_info.single_warp_run) { | 172 | + if (pos_info.single_warp_run) { |
| 203 | - param.thread_id_x = pos_info.thread_pos.x; | 173 | + param.thread_id_x = pos_info.thread_pos.x; |
| 204 | - param.thread_id_y = pos_info.thread_pos.y; | 174 | + param.thread_id_y = pos_info.thread_pos.y; |
| 205 | - param.thread_id_z = pos_info.thread_pos.z; | 175 | + param.thread_id_z = pos_info.thread_pos.z; |
| 206 | - } else { | 176 | + } else { |
| 207 | - param.enable_all_warp = 1; | 177 | + param.enable_all_warp = 1; |
| 208 | - } | 178 | + } |
| 209 | } | 179 | } |
| 210 | param.pos_type = pos_info.pos_type; | 180 | param.pos_type = pos_info.pos_type; |
| 211 | Log *log = GetLog(LLDBLog::Process); | 181 | Log *log = GetLog(LLDBLog::Process); |
| @@ -248,7 +218,7 @@ Status Ascend950DeviceContext::SetHardwareBreakpoint( | |||
| 248 | static_cast<uint8_t>(pos_info.pos_type)); | 218 | static_cast<uint8_t>(pos_info.pos_type)); |
| 249 | return BaseSqCqComm(CmdType::SET_HARD_BREAKPOINT, (uint8_t*)¶m, sizeof(param)); | 219 | return BaseSqCqComm(CmdType::SET_HARD_BREAKPOINT, (uint8_t*)¶m, sizeof(param)); |
| 250 | } | 220 | } |
| 251 | - | 221 | + |
| 252 | Status Ascend950DeviceContext::RemoveHardwareBreakpoint( | 222 | Status Ascend950DeviceContext::RemoveHardwareBreakpoint( |
| 253 | lldb::addr_t addr, uint16_t stream_id, const InterruptPosInfo &pos_info) const { | 223 | lldb::addr_t addr, uint16_t stream_id, const InterruptPosInfo &pos_info) const { |
| 254 | HardBreakpointParam param; | 224 | HardBreakpointParam param; |
| @@ -264,8 +234,9 @@ Status Ascend950DeviceContext::RemoveHardwareBreakpoint( | |||
| 264 | return BaseSqCqComm(CmdType::UNSET_HARD_BREAKPOINT, (uint8_t*)¶m, sizeof(param)); | 234 | return BaseSqCqComm(CmdType::UNSET_HARD_BREAKPOINT, (uint8_t*)¶m, sizeof(param)); |
| 265 | } | 235 | } |
| 266 | 236 | ||
| 267 | - Status Ascend950DeviceContext::GetWarpsInfo(std::vector<WarpInfo> &warps_info, | 237 | +Status |
| 268 | - const InterruptPosInfo &m_pos_info) const { | 238 | +Ascend950DeviceContext::GetWarpsInfo(std::vector<WarpInfo> &warps_info, |
| 239 | + const InterruptPosInfo &m_pos_info) const { | ||
| 269 | warps_info.clear(); | 240 | warps_info.clear(); |
| 270 | Status error; | 241 | Status error; |
| 271 | Log *log = GetLog(LLDBLog::Process); | 242 | Log *log = GetLog(LLDBLog::Process); |
| @@ -1,13 +1,13 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (c) Huawei Technologies Co., Ltd. 2025-2025. All rights reserved. | 2 | * Copyright (c) Huawei Technologies Co., Ltd. 2025-2025. All rights reserved. |
| 3 | */ | 3 | */ |
| 4 | - | 4 | + |
| 5 | 5 | ||
| 6 | 6 | ||
| 7 | 7 | ||
| 8 | - | 8 | + |
| 9 | 9 | ||
| 10 | - | 10 | + |
| 11 | namespace lldb_private { | 11 | namespace lldb_private { |
| 12 | 12 | ||
| 13 | 13 | ||
| @@ -16,10 +16,9 @@ public: | |||
| 16 | Ascend950DeviceContext(const ::pid_t pid, const uint32_t device_id); | 16 | Ascend950DeviceContext(const ::pid_t pid, const uint32_t device_id); |
| 17 | ~Ascend950DeviceContext() = default; | 17 | ~Ascend950DeviceContext() = default; |
| 18 | SocType GetSocType() override { return m_soc_type; } | 18 | SocType GetSocType() override { return m_soc_type; } |
| 19 | - Status GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr) override; | 19 | + |
| 20 | - Status GetRegisterList(std::vector<std::string> ®_list, CoreType core_type) override; | ||
| 21 | Status CheckRegisterAddr(CoreType core_type, uint64_t addr) const override; | 20 | Status CheckRegisterAddr(CoreType core_type, uint64_t addr) const override; |
| 22 | - | 21 | + |
| 23 | MemType GetStackMemType() const override; | 22 | MemType GetStackMemType() const override; |
| 24 | 23 | ||
| 25 | Status InvalidInstrCache(const lldb::addr_t &addr, | 24 | Status InvalidInstrCache(const lldb::addr_t &addr, |
| @@ -28,12 +27,12 @@ public: | |||
| 28 | Status GetDeviceInfo(DeviceInfo &device_info) override; | 27 | Status GetDeviceInfo(DeviceInfo &device_info) override; |
| 29 | 28 | ||
| 30 | Status Resume(const InterruptPosInfo &pos_info) const override; | 29 | Status Resume(const InterruptPosInfo &pos_info) const override; |
| 31 | - | 30 | + |
| 32 | Status SingleStep(const InterruptPosInfo &pos_info) const override; | 31 | Status SingleStep(const InterruptPosInfo &pos_info) const override; |
| 33 | - | 32 | + |
| 34 | Status RemoveHardwareBreakpoint( | 33 | Status RemoveHardwareBreakpoint( |
| 35 | lldb::addr_t addr, uint16_t stream_id, const InterruptPosInfo &pos_info) const override; | 34 | lldb::addr_t addr, uint16_t stream_id, const InterruptPosInfo &pos_info) const override; |
| 36 | - | 35 | + |
| 37 | Status SetHardwareBreakpoint(lldb::addr_t addr, uint16_t stream_id, const InterruptPosInfo &pos_info) const override; | 36 | Status SetHardwareBreakpoint(lldb::addr_t addr, uint16_t stream_id, const InterruptPosInfo &pos_info) const override; |
| 38 | 37 | ||
| 39 | Status GetWarpsInfo(std::vector<WarpInfo> &warps_info, const InterruptPosInfo &m_pos_info) const override; | 38 | Status GetWarpsInfo(std::vector<WarpInfo> &warps_info, const InterruptPosInfo &m_pos_info) const override; |
| @@ -42,8 +41,8 @@ public: | |||
| 42 | private: | 41 | private: |
| 43 | SocType m_soc_type; | 42 | SocType m_soc_type; |
| 44 | }; | 43 | }; |
| 45 | - | 44 | + |
| 46 | } // namespace lldb_private | 45 | } // namespace lldb_private |
| 47 | - | 46 | + |
| 48 | 47 | ||
| 49 | 48 | ||
| @@ -493,8 +493,8 @@ Status DeviceContext::ReadRegister(const RegisterInfo *reg_info, const Interrupt | |||
| 493 | } | 493 | } |
| 494 | 494 | ||
| 495 | 495 | ||
| 496 | -Status DeviceContext::ReadRegister(uint64_t addr, const RegisterInfo *reg_info, | 496 | +Status DeviceContext::ReadRegister(uint64_t addr, const RegisterInfo *reg_info, |
| 497 | - uint32_t core_id, CoreType core_type, | 497 | + uint32_t core_id, CoreType core_type, |
| 498 | RegisterValue ®_value) const { | 498 | RegisterValue ®_value) const { |
| 499 | Status error; | 499 | Status error; |
| 500 | Log *log = GetLog(LLDBLog::Process); | 500 | Log *log = GetLog(LLDBLog::Process); |
| @@ -516,7 +516,7 @@ Status DeviceContext::ReadRegister(uint64_t addr, const RegisterInfo *reg_info, | |||
| 516 | return error; | 516 | return error; |
| 517 | } | 517 | } |
| 518 | 518 | ||
| 519 | - reg_value.SetFromMemoryData(*reg_info, buffer_sp->GetBytes(), | 519 | + reg_value.SetFromMemoryData(*reg_info, buffer_sp->GetBytes(), |
| 520 | reg_info->byte_size, eByteOrderLittle, error); | 520 | reg_info->byte_size, eByteOrderLittle, error); |
| 521 | if (log) { | 521 | if (log) { |
| 522 | StreamString ss; | 522 | StreamString ss; |
| @@ -532,14 +532,6 @@ Status DeviceContext::ReadRegister(uint64_t addr, const RegisterInfo *reg_info, | |||
| 532 | return error; | 532 | return error; |
| 533 | } | 533 | } |
| 534 | 534 | ||
| 535 | -Status DeviceContext::ReadRegisterList(std::vector<std::string> ®_list, uint32_t core_id, CoreType core_type) { | ||
| 536 | - Status error; | ||
| 537 | - Log *log = GetLog(LLDBLog::Process); | ||
| 538 | - error = GetRegisterList(reg_list, core_type); | ||
| 539 | - LLDB_LOGF(log, "Read Register List core_id=%d core_type=%d", core_id, int(core_type)); | ||
| 540 | - return error; | ||
| 541 | -} | ||
| 542 | - | ||
| 543 | Status DeviceContext::GetDeviceInfo(DeviceInfo &device_info) { | 535 | Status DeviceContext::GetDeviceInfo(DeviceInfo &device_info) { |
| 544 | Status error; | 536 | Status error; |
| 545 | TsDeviceInfo info; | 537 | TsDeviceInfo info; |
| @@ -606,7 +598,7 @@ bool DeviceContext::UseSpecifiedCore(uint32_t aic_mask, uint64_t aiv_mask, CoreM | |||
| 606 | return true; | 598 | return true; |
| 607 | } | 599 | } |
| 608 | 600 | ||
| 609 | -Status DeviceContext::InvalidInstrCache(const addr_t &addr, | 601 | +Status DeviceContext::InvalidInstrCache(const addr_t &addr, |
| 610 | const InterruptPosInfo &pos_info, uint8_t redirect_ifu) const { | 602 | const InterruptPosInfo &pos_info, uint8_t redirect_ifu) const { |
| 611 | Status error; | 603 | Status error; |
| 612 | InvalidCacheParam param; | 604 | InvalidCacheParam param; |
| @@ -727,7 +719,7 @@ Status DeviceContext::TaskKill(uint32_t stream_id) { | |||
| 727 | 719 | ||
| 728 | MemType DeviceContext::DeviceAddressClassToMemType(DeviceAddressClass address_class) const { | 720 | MemType DeviceContext::DeviceAddressClassToMemType(DeviceAddressClass address_class) const { |
| 729 | if (address_class == DeviceAddressClass::STACK) { | 721 | if (address_class == DeviceAddressClass::STACK) { |
| 730 | - // stack is located in different memory space in different chips | 722 | + // stack is located in different memory space in different chips |
| 731 | return GetStackMemType(); | 723 | return GetStackMemType(); |
| 732 | } | 724 | } |
| 733 | static std::map<DeviceAddressClass, MemType> address_class_mem_type_map = { | 725 | static std::map<DeviceAddressClass, MemType> address_class_mem_type_map = { |
| @@ -81,7 +81,7 @@ struct CoreMaskInfo { | |||
| 81 | uint32_t aic_mask {0U}; | 81 | uint32_t aic_mask {0U}; |
| 82 | uint64_t aiv_mask {0U}; | 82 | uint64_t aiv_mask {0U}; |
| 83 | }; | 83 | }; |
| 84 | - | 84 | + |
| 85 | struct InvalidCacheParam { | 85 | struct InvalidCacheParam { |
| 86 | uint8_t enable_all; | 86 | uint8_t enable_all; |
| 87 | uint8_t redirect_ifu; | 87 | uint8_t redirect_ifu; |
| @@ -91,7 +91,7 @@ struct InvalidCacheParam { | |||
| 91 | }; | 91 | }; |
| 92 | 92 | ||
| 93 | // ============ ts END ================== | 93 | // ============ ts END ================== |
| 94 | - | 94 | + |
| 95 | class DeviceContext : public RegisterDataInterface { | 95 | class DeviceContext : public RegisterDataInterface { |
| 96 | public: | 96 | public: |
| 97 | 97 | ||
| @@ -108,7 +108,7 @@ public: | |||
| 108 | virtual Status Resume(const InterruptPosInfo &pos_info) const; | 108 | virtual Status Resume(const InterruptPosInfo &pos_info) const; |
| 109 | virtual size_t ReadMemory(lldb::addr_t addr, size_t size, const MemoryTypeInfo &memory_type_info, | 109 | virtual size_t ReadMemory(lldb::addr_t addr, size_t size, const MemoryTypeInfo &memory_type_info, |
| 110 | const InterruptPosInfo &pos_info, void *out); | 110 | const InterruptPosInfo &pos_info, void *out); |
| 111 | - | 111 | + |
| 112 | virtual Status SingleStep(const InterruptPosInfo &pos_info) const; | 112 | virtual Status SingleStep(const InterruptPosInfo &pos_info) const; |
| 113 | 113 | ||
| 114 | virtual Status SetSoftwareBreakpoint(lldb::addr_t addr); | 114 | virtual Status SetSoftwareBreakpoint(lldb::addr_t addr); |
| @@ -122,14 +122,13 @@ public: | |||
| 122 | return Status("Unsupport hardware breakpoint."); | 122 | return Status("Unsupport hardware breakpoint."); |
| 123 | } | 123 | } |
| 124 | 124 | ||
| 125 | - // used by AscendProcessLinux | 125 | + // used by AscendProcessLinux |
| 126 | Status ReadRegister(const RegisterInfo *reg_info, const InterruptPosInfo &pos_info, RegisterValue &value) const; | 126 | Status ReadRegister(const RegisterInfo *reg_info, const InterruptPosInfo &pos_info, RegisterValue &value) const; |
| 127 | 127 | ||
| 128 | // implement RegisterDataInterface, just read data from driver | 128 | // implement RegisterDataInterface, just read data from driver |
| 129 | Status ReadRegister(uint64_t addr, const RegisterInfo *reg_info, | 129 | Status ReadRegister(uint64_t addr, const RegisterInfo *reg_info, |
| 130 | uint32_t core_id, CoreType core_type, RegisterValue &value) const override; | 130 | uint32_t core_id, CoreType core_type, RegisterValue &value) const override; |
| 131 | 131 | ||
| 132 | - virtual Status ReadRegisterList(std::vector<std::string> ®_list, uint32_t core_id, CoreType core_type); | ||
| 133 | virtual Status GetDeviceInfo(DeviceInfo &device_info); | 132 | virtual Status GetDeviceInfo(DeviceInfo &device_info); |
| 134 | virtual Status GetCoresInfo(std::vector<CoreInfo> &cores_info); | 133 | virtual Status GetCoresInfo(std::vector<CoreInfo> &cores_info); |
| 135 | virtual Status GetWarpsInfo(std::vector<WarpInfo> &warps_info, const InterruptPosInfo &m_pos_info) const { | 134 | virtual Status GetWarpsInfo(std::vector<WarpInfo> &warps_info, const InterruptPosInfo &m_pos_info) const { |
| @@ -138,17 +137,15 @@ public: | |||
| 138 | virtual Status GetWarpInfo(WarpInfo &info, uint16_t warp_id, const InterruptPosInfo &m_pos_info) const { | 137 | virtual Status GetWarpInfo(WarpInfo &info, uint16_t warp_id, const InterruptPosInfo &m_pos_info) const { |
| 139 | return Status("Unsupport query warp info."); | 138 | return Status("Unsupport query warp info."); |
| 140 | } | 139 | } |
| 141 | - virtual Status GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr) = 0; | ||
| 142 | - virtual Status GetRegisterList(std::vector<std::string> ®_list, CoreType core_type) = 0; | ||
| 143 | - | ||
| 144 | // some register may be unavaliable in aiv or aic, so we need do a check | 140 | // some register may be unavaliable in aiv or aic, so we need do a check |
| 145 | virtual Status CheckRegisterAddr(CoreType core_type, uint64_t addr) const = 0; | 141 | virtual Status CheckRegisterAddr(CoreType core_type, uint64_t addr) const = 0; |
| 146 | virtual void SetBreakpointCallback(const Callback &callback); | 142 | virtual void SetBreakpointCallback(const Callback &callback); |
| 147 | 143 | ||
| 148 | virtual bool StartListenThread(); | 144 | virtual bool StartListenThread(); |
| 149 | virtual Status EnableDebugMode(); | 145 | virtual Status EnableDebugMode(); |
| 150 | - virtual Status InvalidInstrCache(const lldb::addr_t &addr, | 146 | + virtual Status InvalidInstrCache(const lldb::addr_t &addr, |
| 151 | - const InterruptPosInfo &pos_info, uint8_t redirect_ifu = 0) const; | 147 | + const InterruptPosInfo &pos_info, |
| 148 | + uint8_t redirect_ifu = 0) const; | ||
| 152 | virtual size_t ReadLocalMemory(lldb::addr_t addr, size_t size, const MemoryTypeInfo &memory_type_info, | 149 | virtual size_t ReadLocalMemory(lldb::addr_t addr, size_t size, const MemoryTypeInfo &memory_type_info, |
| 153 | const InterruptPosInfo &pos_info, void *data); | 150 | const InterruptPosInfo &pos_info, void *data); |
| 154 | virtual size_t ReadGlobalMemory(lldb::addr_t addr, size_t size, void *data); | 151 | virtual size_t ReadGlobalMemory(lldb::addr_t addr, size_t size, void *data); |
| @@ -39,10 +39,6 @@ std::map<std::string, DeviceRegisterInfo> RegisterInfoPOSIX_ascend::GetRegisterM | |||
| 39 | return m_register_map; | 39 | return m_register_map; |
| 40 | } | 40 | } |
| 41 | 41 | ||
| 42 | -Status RegisterInfoPOSIX_ascend::GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr) { | ||
| 43 | - return Status(); | ||
| 44 | -} | ||
| 45 | - | ||
| 46 | Status RegisterInfoPOSIX_ascend::ReadRegister(const RegisterInfo *reg_info, const InterruptPosInfo &pos_info, | 42 | Status RegisterInfoPOSIX_ascend::ReadRegister(const RegisterInfo *reg_info, const InterruptPosInfo &pos_info, |
| 47 | const RegisterDataInterface *reg_data_reader, RegisterValue &value) const { | 43 | const RegisterDataInterface *reg_data_reader, RegisterValue &value) const { |
| 48 | Status error; | 44 | Status error; |
| @@ -50,104 +50,361 @@ enum DWARF_ASCEND_REGNUM { | |||
| 50 | dwarf_x30_ascend, | 50 | dwarf_x30_ascend, |
| 51 | dwarf_x31_ascend, | 51 | dwarf_x31_ascend, |
| 52 | // VA0-VA7 | 52 | // VA0-VA7 |
| 53 | - dwarf_va0_ascend = 96, dwarf_va1_ascend, dwarf_va2_ascend, dwarf_va3_ascend, | 53 | + dwarf_va0_ascend = 96, |
| 54 | - dwarf_va4_ascend, dwarf_va5_ascend, dwarf_va6_ascend, dwarf_va7_ascend, | 54 | + dwarf_va1_ascend, |
| 55 | + dwarf_va2_ascend, | ||
| 56 | + dwarf_va3_ascend, | ||
| 57 | + dwarf_va4_ascend, | ||
| 58 | + dwarf_va5_ascend, | ||
| 59 | + dwarf_va6_ascend, | ||
| 60 | + dwarf_va7_ascend, | ||
| 55 | // V0-V31 | 61 | // V0-V31 |
| 56 | - dwarf_v0_ascend = 105, dwarf_v1_ascend, dwarf_v2_ascend, dwarf_v3_ascend, | 62 | + dwarf_v0_ascend = 105, |
| 57 | - dwarf_v4_ascend, dwarf_v5_ascend, dwarf_v6_ascend, dwarf_v7_ascend, | 63 | + dwarf_v1_ascend, |
| 58 | - dwarf_v8_ascend, dwarf_v9_ascend, dwarf_v10_ascend, dwarf_v11_ascend, | 64 | + dwarf_v2_ascend, |
| 59 | - dwarf_v12_ascend, dwarf_v13_ascend, dwarf_v14_ascend, dwarf_v15_ascend, | 65 | + dwarf_v3_ascend, |
| 60 | - dwarf_v16_ascend, dwarf_v17_ascend, dwarf_v18_ascend, dwarf_v19_ascend, | 66 | + dwarf_v4_ascend, |
| 61 | - dwarf_v20_ascend, dwarf_v21_ascend, dwarf_v22_ascend, dwarf_v23_ascend, | 67 | + dwarf_v5_ascend, |
| 62 | - dwarf_v24_ascend, dwarf_v25_ascend, dwarf_v26_ascend, dwarf_v27_ascend, | 68 | + dwarf_v6_ascend, |
| 63 | - dwarf_v28_ascend, dwarf_v29_ascend, dwarf_v30_ascend, dwarf_v31_ascend, | 69 | + dwarf_v7_ascend, |
| 70 | + dwarf_v8_ascend, | ||
| 71 | + dwarf_v9_ascend, | ||
| 72 | + dwarf_v10_ascend, | ||
| 73 | + dwarf_v11_ascend, | ||
| 74 | + dwarf_v12_ascend, | ||
| 75 | + dwarf_v13_ascend, | ||
| 76 | + dwarf_v14_ascend, | ||
| 77 | + dwarf_v15_ascend, | ||
| 78 | + dwarf_v16_ascend, | ||
| 79 | + dwarf_v17_ascend, | ||
| 80 | + dwarf_v18_ascend, | ||
| 81 | + dwarf_v19_ascend, | ||
| 82 | + dwarf_v20_ascend, | ||
| 83 | + dwarf_v21_ascend, | ||
| 84 | + dwarf_v22_ascend, | ||
| 85 | + dwarf_v23_ascend, | ||
| 86 | + dwarf_v24_ascend, | ||
| 87 | + dwarf_v25_ascend, | ||
| 88 | + dwarf_v26_ascend, | ||
| 89 | + dwarf_v27_ascend, | ||
| 90 | + dwarf_v28_ascend, | ||
| 91 | + dwarf_v29_ascend, | ||
| 92 | + dwarf_v30_ascend, | ||
| 93 | + dwarf_v31_ascend, | ||
| 64 | // sreg | 94 | // sreg |
| 65 | - dwarf_s0_ascend = 137, dwarf_s1_ascend, dwarf_s2_ascend, dwarf_s3_ascend, | 95 | + dwarf_s0_ascend = 137, |
| 66 | - dwarf_s4_ascend, dwarf_s5_ascend, dwarf_s6_ascend, dwarf_s7_ascend, | 96 | + dwarf_s1_ascend, |
| 67 | - dwarf_s8_ascend, dwarf_s9_ascend, dwarf_s10_ascend, dwarf_s11_ascend, | 97 | + dwarf_s2_ascend, |
| 68 | - dwarf_s12_ascend, dwarf_s13_ascend, dwarf_s14_ascend, dwarf_s15_ascend, | 98 | + dwarf_s3_ascend, |
| 69 | - dwarf_s16_ascend, dwarf_s17_ascend, dwarf_s18_ascend, dwarf_s19_ascend, | 99 | + dwarf_s4_ascend, |
| 70 | - dwarf_s20_ascend, dwarf_s21_ascend, dwarf_s22_ascend, dwarf_s23_ascend, | 100 | + dwarf_s5_ascend, |
| 71 | - dwarf_s24_ascend, dwarf_s25_ascend, dwarf_s26_ascend, dwarf_s27_ascend, | 101 | + dwarf_s6_ascend, |
| 72 | - dwarf_s28_ascend, dwarf_s29_ascend, dwarf_s30_ascend, dwarf_s31_ascend, | 102 | + dwarf_s7_ascend, |
| 73 | - dwarf_s32_ascend, dwarf_s33_ascend, dwarf_s34_ascend, dwarf_s35_ascend, | 103 | + dwarf_s8_ascend, |
| 74 | - dwarf_s36_ascend, dwarf_s37_ascend, dwarf_s38_ascend, dwarf_s39_ascend, | 104 | + dwarf_s9_ascend, |
| 75 | - dwarf_s40_ascend, dwarf_s41_ascend, dwarf_s42_ascend, dwarf_s43_ascend, | 105 | + dwarf_s10_ascend, |
| 76 | - dwarf_s44_ascend, dwarf_s45_ascend, dwarf_s46_ascend, dwarf_s47_ascend, | 106 | + dwarf_s11_ascend, |
| 77 | - dwarf_s48_ascend, dwarf_s49_ascend, dwarf_s50_ascend, dwarf_s51_ascend, | 107 | + dwarf_s12_ascend, |
| 78 | - dwarf_s52_ascend, dwarf_s53_ascend, dwarf_s54_ascend, dwarf_s55_ascend, | 108 | + dwarf_s13_ascend, |
| 79 | - dwarf_s56_ascend, dwarf_s57_ascend, dwarf_s58_ascend, dwarf_s59_ascend, | 109 | + dwarf_s14_ascend, |
| 80 | - dwarf_s60_ascend, dwarf_s61_ascend, dwarf_s62_ascend, dwarf_s63_ascend, | 110 | + dwarf_s15_ascend, |
| 111 | + dwarf_s16_ascend, | ||
| 112 | + dwarf_s17_ascend, | ||
| 113 | + dwarf_s18_ascend, | ||
| 114 | + dwarf_s19_ascend, | ||
| 115 | + dwarf_s20_ascend, | ||
| 116 | + dwarf_s21_ascend, | ||
| 117 | + dwarf_s22_ascend, | ||
| 118 | + dwarf_s23_ascend, | ||
| 119 | + dwarf_s24_ascend, | ||
| 120 | + dwarf_s25_ascend, | ||
| 121 | + dwarf_s26_ascend, | ||
| 122 | + dwarf_s27_ascend, | ||
| 123 | + dwarf_s28_ascend, | ||
| 124 | + dwarf_s29_ascend, | ||
| 125 | + dwarf_s30_ascend, | ||
| 126 | + dwarf_s31_ascend, | ||
| 127 | + dwarf_s32_ascend, | ||
| 128 | + dwarf_s33_ascend, | ||
| 129 | + dwarf_s34_ascend, | ||
| 130 | + dwarf_s35_ascend, | ||
| 131 | + dwarf_s36_ascend, | ||
| 132 | + dwarf_s37_ascend, | ||
| 133 | + dwarf_s38_ascend, | ||
| 134 | + dwarf_s39_ascend, | ||
| 135 | + dwarf_s40_ascend, | ||
| 136 | + dwarf_s41_ascend, | ||
| 137 | + dwarf_s42_ascend, | ||
| 138 | + dwarf_s43_ascend, | ||
| 139 | + dwarf_s44_ascend, | ||
| 140 | + dwarf_s45_ascend, | ||
| 141 | + dwarf_s46_ascend, | ||
| 142 | + dwarf_s47_ascend, | ||
| 143 | + dwarf_s48_ascend, | ||
| 144 | + dwarf_s49_ascend, | ||
| 145 | + dwarf_s50_ascend, | ||
| 146 | + dwarf_s51_ascend, | ||
| 147 | + dwarf_s52_ascend, | ||
| 148 | + dwarf_s53_ascend, | ||
| 149 | + dwarf_s54_ascend, | ||
| 150 | + dwarf_s55_ascend, | ||
| 151 | + dwarf_s56_ascend, | ||
| 152 | + dwarf_s57_ascend, | ||
| 153 | + dwarf_s58_ascend, | ||
| 154 | + dwarf_s59_ascend, | ||
| 155 | + dwarf_s60_ascend, | ||
| 156 | + dwarf_s61_ascend, | ||
| 157 | + dwarf_s62_ascend, | ||
| 158 | + dwarf_s63_ascend, | ||
| 81 | 159 | ||
| 82 | - dwarf_s64_ascend = 201, dwarf_s65_ascend, dwarf_s66_ascend, dwarf_s67_ascend, | 160 | + dwarf_s64_ascend = 201, |
| 83 | - dwarf_s68_ascend, dwarf_s69_ascend, dwarf_s70_ascend, dwarf_s71_ascend, | 161 | + dwarf_s65_ascend, |
| 84 | - dwarf_s72_ascend, dwarf_s73_ascend, dwarf_s74_ascend, dwarf_s75_ascend, | 162 | + dwarf_s66_ascend, |
| 85 | - dwarf_s76_ascend, dwarf_s77_ascend, dwarf_s78_ascend, dwarf_s79_ascend, | 163 | + dwarf_s67_ascend, |
| 86 | - dwarf_s80_ascend, dwarf_s81_ascend, dwarf_s82_ascend, dwarf_s83_ascend, | 164 | + dwarf_s68_ascend, |
| 87 | - dwarf_s84_ascend, dwarf_s85_ascend, dwarf_s86_ascend, dwarf_s87_ascend, | 165 | + dwarf_s69_ascend, |
| 88 | - dwarf_s88_ascend, dwarf_s89_ascend, dwarf_s90_ascend, dwarf_s91_ascend, | 166 | + dwarf_s70_ascend, |
| 89 | - dwarf_s92_ascend, dwarf_s93_ascend, dwarf_s94_ascend, dwarf_s95_ascend, | 167 | + dwarf_s71_ascend, |
| 168 | + dwarf_s72_ascend, | ||
| 169 | + dwarf_s73_ascend, | ||
| 170 | + dwarf_s74_ascend, | ||
| 171 | + dwarf_s75_ascend, | ||
| 172 | + dwarf_s76_ascend, | ||
| 173 | + dwarf_s77_ascend, | ||
| 174 | + dwarf_s78_ascend, | ||
| 175 | + dwarf_s79_ascend, | ||
| 176 | + dwarf_s80_ascend, | ||
| 177 | + dwarf_s81_ascend, | ||
| 178 | + dwarf_s82_ascend, | ||
| 179 | + dwarf_s83_ascend, | ||
| 180 | + dwarf_s84_ascend, | ||
| 181 | + dwarf_s85_ascend, | ||
| 182 | + dwarf_s86_ascend, | ||
| 183 | + dwarf_s87_ascend, | ||
| 184 | + dwarf_s88_ascend, | ||
| 185 | + dwarf_s89_ascend, | ||
| 186 | + dwarf_s90_ascend, | ||
| 187 | + dwarf_s91_ascend, | ||
| 188 | + dwarf_s92_ascend, | ||
| 189 | + dwarf_s93_ascend, | ||
| 190 | + dwarf_s94_ascend, | ||
| 191 | + dwarf_s95_ascend, | ||
| 90 | // A0-A7 | 192 | // A0-A7 |
| 91 | - dwarf_a0_ascend = 233, dwarf_a1_ascend, dwarf_a2_ascend, dwarf_a3_ascend, | 193 | + dwarf_a0_ascend = 233, |
| 92 | - dwarf_a4_ascend, dwarf_a5_ascend, dwarf_a6_ascend, dwarf_a7_ascend, | 194 | + dwarf_a1_ascend, |
| 195 | + dwarf_a2_ascend, | ||
| 196 | + dwarf_a3_ascend, | ||
| 197 | + dwarf_a4_ascend, | ||
| 198 | + dwarf_a5_ascend, | ||
| 199 | + dwarf_a6_ascend, | ||
| 200 | + dwarf_a7_ascend, | ||
| 93 | // P0-P7 | 201 | // P0-P7 |
| 94 | - dwarf_p0_ascend = 241, dwarf_p1_ascend, dwarf_p2_ascend, dwarf_p3_ascend, | 202 | + dwarf_p0_ascend = 241, |
| 95 | - dwarf_p4_ascend, dwarf_p5_ascend, dwarf_p6_ascend, dwarf_p7_ascend, | 203 | + dwarf_p1_ascend, |
| 204 | + dwarf_p2_ascend, | ||
| 205 | + dwarf_p3_ascend, | ||
| 206 | + dwarf_p4_ascend, | ||
| 207 | + dwarf_p5_ascend, | ||
| 208 | + dwarf_p6_ascend, | ||
| 209 | + dwarf_p7_ascend, | ||
| 96 | // ULD0-ULD7 | 210 | // ULD0-ULD7 |
| 97 | - dwarf_uld0_ascend = 257, dwarf_uld1_ascend, dwarf_uld2_ascend, dwarf_uld3_ascend, | 211 | + dwarf_uld0_ascend = 257, |
| 212 | + dwarf_uld1_ascend, | ||
| 213 | + dwarf_uld2_ascend, | ||
| 214 | + dwarf_uld3_ascend, | ||
| 98 | // UST0-UST7 | 215 | // UST0-UST7 |
| 99 | - dwarf_ust0_ascend = 261, dwarf_ust1_ascend, dwarf_ust2_ascend, dwarf_ust3_ascend, | 216 | + dwarf_ust0_ascend = 261, |
| 217 | + dwarf_ust1_ascend, | ||
| 218 | + dwarf_ust2_ascend, | ||
| 219 | + dwarf_ust3_ascend, | ||
| 100 | // simt | 220 | // simt |
| 101 | - dwarf_r0_ascend = 265, dwarf_r1_ascend, dwarf_r2_ascend, dwarf_r3_ascend, | 221 | + dwarf_r0_ascend = 265, |
| 102 | - dwarf_r4_ascend, dwarf_r5_ascend, dwarf_r6_ascend, dwarf_r7_ascend, | 222 | + dwarf_r1_ascend, |
| 103 | - dwarf_r8_ascend, dwarf_r9_ascend, dwarf_r10_ascend, dwarf_r11_ascend, | 223 | + dwarf_r2_ascend, |
| 104 | - dwarf_r12_ascend, dwarf_r13_ascend, dwarf_r14_ascend, dwarf_r15_ascend, | 224 | + dwarf_r3_ascend, |
| 105 | - dwarf_r16_ascend, dwarf_r17_ascend, dwarf_r18_ascend, dwarf_r19_ascend, | 225 | + dwarf_r4_ascend, |
| 106 | - dwarf_r20_ascend, dwarf_r21_ascend, dwarf_r22_ascend, dwarf_r23_ascend, | 226 | + dwarf_r5_ascend, |
| 107 | - dwarf_r24_ascend, dwarf_r25_ascend, dwarf_r26_ascend, dwarf_r27_ascend, | 227 | + dwarf_r6_ascend, |
| 108 | - dwarf_r28_ascend, dwarf_r29_ascend, dwarf_r30_ascend, dwarf_r31_ascend, | 228 | + dwarf_r7_ascend, |
| 109 | - dwarf_r32_ascend, dwarf_r33_ascend, dwarf_r34_ascend, dwarf_r35_ascend, | 229 | + dwarf_r8_ascend, |
| 110 | - dwarf_r36_ascend, dwarf_r37_ascend, dwarf_r38_ascend, dwarf_r39_ascend, | 230 | + dwarf_r9_ascend, |
| 111 | - dwarf_r40_ascend, dwarf_r41_ascend, dwarf_r42_ascend, dwarf_r43_ascend, | 231 | + dwarf_r10_ascend, |
| 112 | - dwarf_r44_ascend, dwarf_r45_ascend, dwarf_r46_ascend, dwarf_r47_ascend, | 232 | + dwarf_r11_ascend, |
| 113 | - dwarf_r48_ascend, dwarf_r49_ascend, dwarf_r50_ascend, dwarf_r51_ascend, | 233 | + dwarf_r12_ascend, |
| 114 | - dwarf_r52_ascend, dwarf_r53_ascend, dwarf_r54_ascend, dwarf_r55_ascend, | 234 | + dwarf_r13_ascend, |
| 115 | - dwarf_r56_ascend, dwarf_r57_ascend, dwarf_r58_ascend, dwarf_r59_ascend, | 235 | + dwarf_r14_ascend, |
| 116 | - dwarf_r60_ascend, dwarf_r61_ascend, dwarf_r62_ascend, dwarf_r63_ascend, | 236 | + dwarf_r15_ascend, |
| 117 | - dwarf_r64_ascend, dwarf_r65_ascend, dwarf_r66_ascend, dwarf_r67_ascend, | 237 | + dwarf_r16_ascend, |
| 118 | - dwarf_r68_ascend, dwarf_r69_ascend, dwarf_r70_ascend, dwarf_r71_ascend, | 238 | + dwarf_r17_ascend, |
| 119 | - dwarf_r72_ascend, dwarf_r73_ascend, dwarf_r74_ascend, dwarf_r75_ascend, | 239 | + dwarf_r18_ascend, |
| 120 | - dwarf_r76_ascend, dwarf_r77_ascend, dwarf_r78_ascend, dwarf_r79_ascend, | 240 | + dwarf_r19_ascend, |
| 121 | - dwarf_r80_ascend, dwarf_r81_ascend, dwarf_r82_ascend, dwarf_r83_ascend, | 241 | + dwarf_r20_ascend, |
| 122 | - dwarf_r84_ascend, dwarf_r85_ascend, dwarf_r86_ascend, dwarf_r87_ascend, | 242 | + dwarf_r21_ascend, |
| 123 | - dwarf_r88_ascend, dwarf_r89_ascend, dwarf_r90_ascend, dwarf_r91_ascend, | 243 | + dwarf_r22_ascend, |
| 124 | - dwarf_r92_ascend, dwarf_r93_ascend, dwarf_r94_ascend, dwarf_r95_ascend, | 244 | + dwarf_r23_ascend, |
| 125 | - dwarf_r96_ascend, dwarf_r97_ascend, dwarf_r98_ascend, dwarf_r99_ascend, | 245 | + dwarf_r24_ascend, |
| 126 | - dwarf_r100_ascend, dwarf_r101_ascend, dwarf_r102_ascend, dwarf_r103_ascend, | 246 | + dwarf_r25_ascend, |
| 127 | - dwarf_r104_ascend, dwarf_r105_ascend, dwarf_r106_ascend, dwarf_r107_ascend, | 247 | + dwarf_r26_ascend, |
| 128 | - dwarf_r108_ascend, dwarf_r109_ascend, dwarf_r110_ascend, dwarf_r111_ascend, | 248 | + dwarf_r27_ascend, |
| 129 | - dwarf_r112_ascend, dwarf_r113_ascend, dwarf_r114_ascend, dwarf_r115_ascend, | 249 | + dwarf_r28_ascend, |
| 130 | - dwarf_r116_ascend, dwarf_r117_ascend, dwarf_r118_ascend, dwarf_r119_ascend, | 250 | + dwarf_r29_ascend, |
| 131 | - dwarf_r120_ascend, dwarf_r121_ascend, dwarf_r122_ascend, dwarf_r123_ascend, | 251 | + dwarf_r30_ascend, |
| 132 | - dwarf_r124_ascend, dwarf_r125_ascend, dwarf_r126_ascend, | 252 | + dwarf_r31_ascend, |
| 253 | + dwarf_r32_ascend, | ||
| 254 | + dwarf_r33_ascend, | ||
| 255 | + dwarf_r34_ascend, | ||
| 256 | + dwarf_r35_ascend, | ||
| 257 | + dwarf_r36_ascend, | ||
| 258 | + dwarf_r37_ascend, | ||
| 259 | + dwarf_r38_ascend, | ||
| 260 | + dwarf_r39_ascend, | ||
| 261 | + dwarf_r40_ascend, | ||
| 262 | + dwarf_r41_ascend, | ||
| 263 | + dwarf_r42_ascend, | ||
| 264 | + dwarf_r43_ascend, | ||
| 265 | + dwarf_r44_ascend, | ||
| 266 | + dwarf_r45_ascend, | ||
| 267 | + dwarf_r46_ascend, | ||
| 268 | + dwarf_r47_ascend, | ||
| 269 | + dwarf_r48_ascend, | ||
| 270 | + dwarf_r49_ascend, | ||
| 271 | + dwarf_r50_ascend, | ||
| 272 | + dwarf_r51_ascend, | ||
| 273 | + dwarf_r52_ascend, | ||
| 274 | + dwarf_r53_ascend, | ||
| 275 | + dwarf_r54_ascend, | ||
| 276 | + dwarf_r55_ascend, | ||
| 277 | + dwarf_r56_ascend, | ||
| 278 | + dwarf_r57_ascend, | ||
| 279 | + dwarf_r58_ascend, | ||
| 280 | + dwarf_r59_ascend, | ||
| 281 | + dwarf_r60_ascend, | ||
| 282 | + dwarf_r61_ascend, | ||
| 283 | + dwarf_r62_ascend, | ||
| 284 | + dwarf_r63_ascend, | ||
| 285 | + dwarf_r64_ascend, | ||
| 286 | + dwarf_r65_ascend, | ||
| 287 | + dwarf_r66_ascend, | ||
| 288 | + dwarf_r67_ascend, | ||
| 289 | + dwarf_r68_ascend, | ||
| 290 | + dwarf_r69_ascend, | ||
| 291 | + dwarf_r70_ascend, | ||
| 292 | + dwarf_r71_ascend, | ||
| 293 | + dwarf_r72_ascend, | ||
| 294 | + dwarf_r73_ascend, | ||
| 295 | + dwarf_r74_ascend, | ||
| 296 | + dwarf_r75_ascend, | ||
| 297 | + dwarf_r76_ascend, | ||
| 298 | + dwarf_r77_ascend, | ||
| 299 | + dwarf_r78_ascend, | ||
| 300 | + dwarf_r79_ascend, | ||
| 301 | + dwarf_r80_ascend, | ||
| 302 | + dwarf_r81_ascend, | ||
| 303 | + dwarf_r82_ascend, | ||
| 304 | + dwarf_r83_ascend, | ||
| 305 | + dwarf_r84_ascend, | ||
| 306 | + dwarf_r85_ascend, | ||
| 307 | + dwarf_r86_ascend, | ||
| 308 | + dwarf_r87_ascend, | ||
| 309 | + dwarf_r88_ascend, | ||
| 310 | + dwarf_r89_ascend, | ||
| 311 | + dwarf_r90_ascend, | ||
| 312 | + dwarf_r91_ascend, | ||
| 313 | + dwarf_r92_ascend, | ||
| 314 | + dwarf_r93_ascend, | ||
| 315 | + dwarf_r94_ascend, | ||
| 316 | + dwarf_r95_ascend, | ||
| 317 | + dwarf_r96_ascend, | ||
| 318 | + dwarf_r97_ascend, | ||
| 319 | + dwarf_r98_ascend, | ||
| 320 | + dwarf_r99_ascend, | ||
| 321 | + dwarf_r100_ascend, | ||
| 322 | + dwarf_r101_ascend, | ||
| 323 | + dwarf_r102_ascend, | ||
| 324 | + dwarf_r103_ascend, | ||
| 325 | + dwarf_r104_ascend, | ||
| 326 | + dwarf_r105_ascend, | ||
| 327 | + dwarf_r106_ascend, | ||
| 328 | + dwarf_r107_ascend, | ||
| 329 | + dwarf_r108_ascend, | ||
| 330 | + dwarf_r109_ascend, | ||
| 331 | + dwarf_r110_ascend, | ||
| 332 | + dwarf_r111_ascend, | ||
| 333 | + dwarf_r112_ascend, | ||
| 334 | + dwarf_r113_ascend, | ||
| 335 | + dwarf_r114_ascend, | ||
| 336 | + dwarf_r115_ascend, | ||
| 337 | + dwarf_r116_ascend, | ||
| 338 | + dwarf_r117_ascend, | ||
| 339 | + dwarf_r118_ascend, | ||
| 340 | + dwarf_r119_ascend, | ||
| 341 | + dwarf_r120_ascend, | ||
| 342 | + dwarf_r121_ascend, | ||
| 343 | + dwarf_r122_ascend, | ||
| 344 | + dwarf_r123_ascend, | ||
| 345 | + dwarf_r124_ascend, | ||
| 346 | + dwarf_r125_ascend, | ||
| 347 | + dwarf_r126_ascend, | ||
| 133 | dwarf_rx_max_id = dwarf_r126_ascend, | 348 | dwarf_rx_max_id = dwarf_r126_ascend, |
| 134 | // sreg | 349 | // sreg |
| 135 | - dwarf_tpes0_ascend = 457, dwarf_tpes1_ascend, dwarf_tpes2_ascend, dwarf_tpes3_ascend, | 350 | + dwarf_tpes0_ascend = 457, |
| 136 | - dwarf_tpes4_ascend, dwarf_tpes5_ascend, dwarf_tpes6_ascend, dwarf_tpes7_ascend, | 351 | + dwarf_tpes1_ascend, |
| 137 | - dwarf_tpes8_ascend, dwarf_tpes9_ascend, dwarf_tpes10_ascend, dwarf_tpes11_ascend, | 352 | + dwarf_tpes2_ascend, |
| 138 | - dwarf_tpes12_ascend, dwarf_tpes13_ascend, dwarf_tpes14_ascend, dwarf_tpes15_ascend, | 353 | + dwarf_tpes3_ascend, |
| 139 | - dwarf_tpes16_ascend, dwarf_tpes17_ascend, dwarf_tpes18_ascend, dwarf_tpes19_ascend, | 354 | + dwarf_tpes4_ascend, |
| 140 | - dwarf_tpes20_ascend, dwarf_tpes21_ascend, dwarf_tpes22_ascend, dwarf_tpes23_ascend, | 355 | + dwarf_tpes5_ascend, |
| 141 | - dwarf_tpes24_ascend, dwarf_tpes25_ascend, dwarf_tpes26_ascend, dwarf_tpes27_ascend, | 356 | + dwarf_tpes6_ascend, |
| 142 | - dwarf_tpes28_ascend, dwarf_tpes29_ascend, dwarf_tpes30_ascend, dwarf_tpes31_ascend, | 357 | + dwarf_tpes7_ascend, |
| 358 | + dwarf_tpes8_ascend, | ||
| 359 | + dwarf_tpes9_ascend, | ||
| 360 | + dwarf_tpes10_ascend, | ||
| 361 | + dwarf_tpes11_ascend, | ||
| 362 | + dwarf_tpes12_ascend, | ||
| 363 | + dwarf_tpes13_ascend, | ||
| 364 | + dwarf_tpes14_ascend, | ||
| 365 | + dwarf_tpes15_ascend, | ||
| 366 | + dwarf_tpes16_ascend, | ||
| 367 | + dwarf_tpes17_ascend, | ||
| 368 | + dwarf_tpes18_ascend, | ||
| 369 | + dwarf_tpes19_ascend, | ||
| 370 | + dwarf_tpes20_ascend, | ||
| 371 | + dwarf_tpes21_ascend, | ||
| 372 | + dwarf_tpes22_ascend, | ||
| 373 | + dwarf_tpes23_ascend, | ||
| 374 | + dwarf_tpes24_ascend, | ||
| 375 | + dwarf_tpes25_ascend, | ||
| 376 | + dwarf_tpes26_ascend, | ||
| 377 | + dwarf_tpes27_ascend, | ||
| 378 | + dwarf_tpes28_ascend, | ||
| 379 | + dwarf_tpes29_ascend, | ||
| 380 | + dwarf_tpes30_ascend, | ||
| 381 | + dwarf_tpes31_ascend, | ||
| 143 | 382 | ||
| 144 | - dwarf_tpesl0_ascend = 489, dwarf_tpesl1_ascend, dwarf_tpesl2_ascend, dwarf_tpesl3_ascend, | 383 | + dwarf_tpesl0_ascend = 489, |
| 145 | - dwarf_tpesl4_ascend, dwarf_tpesl5_ascend, dwarf_tpesl6_ascend, dwarf_tpesl7_ascend, | 384 | + dwarf_tpesl1_ascend, |
| 146 | - dwarf_tpesl8_ascend, dwarf_tpesl9_ascend, dwarf_tpesl10_ascend, dwarf_tpesl11_ascend, | 385 | + dwarf_tpesl2_ascend, |
| 147 | - dwarf_tpesl12_ascend, dwarf_tpesl13_ascend, dwarf_tpesl14_ascend, dwarf_tpesl15_ascend, | 386 | + dwarf_tpesl3_ascend, |
| 387 | + dwarf_tpesl4_ascend, | ||
| 388 | + dwarf_tpesl5_ascend, | ||
| 389 | + dwarf_tpesl6_ascend, | ||
| 390 | + dwarf_tpesl7_ascend, | ||
| 391 | + dwarf_tpesl8_ascend, | ||
| 392 | + dwarf_tpesl9_ascend, | ||
| 393 | + dwarf_tpesl10_ascend, | ||
| 394 | + dwarf_tpesl11_ascend, | ||
| 395 | + dwarf_tpesl12_ascend, | ||
| 396 | + dwarf_tpesl13_ascend, | ||
| 397 | + dwarf_tpesl14_ascend, | ||
| 398 | + dwarf_tpesl15_ascend, | ||
| 148 | 399 | ||
| 149 | - dwarf_tpesll0_ascend = 505, dwarf_tpesll1_ascend, dwarf_tpesll2_ascend, dwarf_tpesll3_ascend, | 400 | + dwarf_tpesll0_ascend = 505, |
| 150 | - dwarf_tpesll4_ascend, dwarf_tpesll5_ascend, dwarf_tpesll6_ascend, dwarf_tpesll7_ascend, | 401 | + dwarf_tpesll1_ascend, |
| 402 | + dwarf_tpesll2_ascend, | ||
| 403 | + dwarf_tpesll3_ascend, | ||
| 404 | + dwarf_tpesll4_ascend, | ||
| 405 | + dwarf_tpesll5_ascend, | ||
| 406 | + dwarf_tpesll6_ascend, | ||
| 407 | + dwarf_tpesll7_ascend, | ||
| 151 | 408 | ||
| 152 | dwarf_sx_max_id = dwarf_tpesll7_ascend, | 409 | dwarf_sx_max_id = dwarf_tpesll7_ascend, |
| 153 | // used as a placeholder | 410 | // used as a placeholder |
| @@ -239,7 +496,7 @@ struct ErrInfoReg { | |||
| 239 | uint32_t reg_num; | 496 | uint32_t reg_num; |
| 240 | // pair.first: the valid bits of error info register | 497 | // pair.first: the valid bits of error info register |
| 241 | // pair.second: the valid bits to replace original pc register | 498 | // pair.second: the valid bits to replace original pc register |
| 242 | - std::vector<std::pair<uint32_t, uint32_t>> pc_mask_map; | 499 | + std::vector<std::pair<uint64_t, uint64_t>> pc_mask_map; |
| 243 | }; | 500 | }; |
| 244 | 501 | ||
| 245 | // Find xx_err_info register by aic_error_reg mask bit | 502 | // Find xx_err_info register by aic_error_reg mask bit |
| @@ -270,8 +527,9 @@ struct RegExtractor { | |||
| 270 | 527 | ||
| 271 | class RegisterDataInterface { | 528 | class RegisterDataInterface { |
| 272 | public: | 529 | public: |
| 273 | - virtual Status ReadRegister(uint64_t addr, const RegisterInfo* reg_info, | 530 | + virtual Status ReadRegister(uint64_t addr, const RegisterInfo *reg_info, |
| 274 | - uint32_t core_id, CoreType core_type, RegisterValue &value) const = 0; | 531 | + uint32_t core_id, CoreType core_type, |
| 532 | + RegisterValue &value) const = 0; | ||
| 275 | }; | 533 | }; |
| 276 | 534 | ||
| 277 | class RegisterInfoPOSIX_ascend: public RegisterInfoInterface { | 535 | class RegisterInfoPOSIX_ascend: public RegisterInfoInterface { |
| @@ -292,7 +550,9 @@ public: | |||
| 292 | 550 | ||
| 293 | virtual std::map<std::string, DeviceRegisterInfo> GetRegisterMap(); | 551 | virtual std::map<std::string, DeviceRegisterInfo> GetRegisterMap(); |
| 294 | 552 | ||
| 295 | - virtual Status GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr); | 553 | + virtual Status GetRegisterAddr(const llvm::StringRef reg_name, |
| 554 | + CoreType core_type, InterruptPosType pos_type, | ||
| 555 | + uint64_t &addr) = 0; | ||
| 296 | 556 | ||
| 297 | virtual const std::vector<std::vector<ErrRegMask>> *GetAicErrorRegTable() { return nullptr; } | 557 | virtual const std::vector<std::vector<ErrRegMask>> *GetAicErrorRegTable() { return nullptr; } |
| 298 | 558 | ||
| @@ -274,8 +274,9 @@ const RegisterSet* RegisterInfoPOSIX_ascend310P::GetRegisterSet(size_t set_index | |||
| 274 | return nullptr; | 274 | return nullptr; |
| 275 | } | 275 | } |
| 276 | 276 | ||
| 277 | -Status RegisterInfoPOSIX_ascend310P::GetRegisterAddr(const llvm::StringRef reg_name, | 277 | +Status RegisterInfoPOSIX_ascend310P::GetRegisterAddr( |
| 278 | - CoreType core_type, uint64_t &addr) { | 278 | + const llvm::StringRef reg_name, CoreType core_type, |
| 279 | + InterruptPosType pos_type, uint64_t &addr) { | ||
| 279 | Status error; | 280 | Status error; |
| 280 | auto reg_info = m_register_map.find(reg_name.str()); | 281 | auto reg_info = m_register_map.find(reg_name.str()); |
| 281 | if (reg_info == m_register_map.end()) { | 282 | if (reg_info == m_register_map.end()) { |
| @@ -13,7 +13,8 @@ public: | |||
| 13 | 13 | ||
| 14 | const RegisterSet *GetRegisterSet(size_t reg_set) const override; | 14 | const RegisterSet *GetRegisterSet(size_t reg_set) const override; |
| 15 | 15 | ||
| 16 | - Status GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr) override; | 16 | + Status GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, |
| 17 | + InterruptPosType pos_type, uint64_t &addr) override; | ||
| 17 | 18 | ||
| 18 | static const RegExtractor& GetRegExtractor(); | 19 | static const RegExtractor& GetRegExtractor(); |
| 19 | }; | 20 | }; |
| @@ -97,27 +97,27 @@ enum LLDB_ASCEND_RENUM { | |||
| 97 | k_num_dbg_registers_ascend, | 97 | k_num_dbg_registers_ascend, |
| 98 | // Above registers is used for both coredump and onboard. | 98 | // Above registers is used for both coredump and onboard. |
| 99 | // If you add a new shared register, please insert it before this line. | 99 | // If you add a new shared register, please insert it before this line. |
| 100 | - lldb_aic_error_0 = k_num_dbg_registers_ascend, | 100 | + lldb_aic_error_0 = k_num_dbg_registers_ascend, |
| 101 | lldb_aic_error_1, | 101 | lldb_aic_error_1, |
| 102 | - lldb_aic_error_2, | 102 | + lldb_aic_error_2, |
| 103 | - lldb_aic_error_3, | 103 | + lldb_aic_error_3, |
| 104 | - lldb_aic_error_4, | 104 | + lldb_aic_error_4, |
| 105 | - lldb_aic_error_5, | 105 | + lldb_aic_error_5, |
| 106 | lldb_biu_err_info_0, | 106 | lldb_biu_err_info_0, |
| 107 | - lldb_biu_err_info_1, | 107 | + lldb_biu_err_info_1, |
| 108 | - lldb_ccu_err_info_0, | 108 | + lldb_ccu_err_info_0, |
| 109 | - lldb_ccu_err_info_1, | 109 | + lldb_ccu_err_info_1, |
| 110 | - lldb_cube_err_info, | 110 | + lldb_cube_err_info, |
| 111 | - lldb_biu_err_info_2, | 111 | + lldb_biu_err_info_2, |
| 112 | - lldb_ifu_err_info_0, | 112 | + lldb_ifu_err_info_0, |
| 113 | - lldb_ifu_err_info_1, | 113 | + lldb_ifu_err_info_1, |
| 114 | - lldb_mte_err_info_0, | 114 | + lldb_mte_err_info_0, |
| 115 | - lldb_mte_err_info_1, | 115 | + lldb_mte_err_info_1, |
| 116 | - lldb_vec_err_info_0, | 116 | + lldb_vec_err_info_0, |
| 117 | - lldb_vec_err_info_1, | 117 | + lldb_vec_err_info_1, |
| 118 | - lldb_fixp_err_info_0, | 118 | + lldb_fixp_err_info_0, |
| 119 | - lldb_su_dc_ecc_1bit_err_info, | 119 | + lldb_su_dc_ecc_1bit_err_info, |
| 120 | - lldb_fixp_err_info_1, | 120 | + lldb_fixp_err_info_1, |
| 121 | k_num_registers_ascend | 121 | k_num_registers_ascend |
| 122 | }; | 122 | }; |
| 123 | 123 | ||
| @@ -156,16 +156,16 @@ static const uint32_t g_dbg_regnums[] = { | |||
| 156 | LLDB_INVALID_REGNUM}; | 156 | LLDB_INVALID_REGNUM}; |
| 157 | 157 | ||
| 158 | static const uint32_t g_aic_err_regnums[] = { | 158 | static const uint32_t g_aic_err_regnums[] = { |
| 159 | - lldb_aic_error_0, lldb_aic_error_1, lldb_aic_error_2, | 159 | + lldb_aic_error_0, lldb_aic_error_1, lldb_aic_error_2, |
| 160 | lldb_aic_error_3, lldb_aic_error_4, lldb_aic_error_5, | 160 | lldb_aic_error_3, lldb_aic_error_4, lldb_aic_error_5, |
| 161 | LLDB_INVALID_REGNUM}; | 161 | LLDB_INVALID_REGNUM}; |
| 162 | 162 | ||
| 163 | static const uint32_t g_err_info_regnums[] = { | 163 | static const uint32_t g_err_info_regnums[] = { |
| 164 | - lldb_biu_err_info_0, lldb_biu_err_info_1, lldb_ccu_err_info_0, | 164 | + lldb_biu_err_info_0, lldb_biu_err_info_1, lldb_ccu_err_info_0, |
| 165 | - lldb_ccu_err_info_1, lldb_cube_err_info, lldb_biu_err_info_2, | 165 | + lldb_ccu_err_info_1, lldb_cube_err_info, lldb_biu_err_info_2, |
| 166 | - lldb_ifu_err_info_0, lldb_ifu_err_info_1, lldb_mte_err_info_0, | 166 | + lldb_ifu_err_info_0, lldb_ifu_err_info_1, lldb_mte_err_info_0, |
| 167 | - lldb_mte_err_info_1, lldb_vec_err_info_0, lldb_vec_err_info_1, | 167 | + lldb_mte_err_info_1, lldb_vec_err_info_0, lldb_vec_err_info_1, |
| 168 | - lldb_fixp_err_info_0, lldb_su_dc_ecc_1bit_err_info, lldb_fixp_err_info_1, | 168 | + lldb_fixp_err_info_0, lldb_su_dc_ecc_1bit_err_info, lldb_fixp_err_info_1, |
| 169 | LLDB_INVALID_REGNUM}; | 169 | LLDB_INVALID_REGNUM}; |
| 170 | 170 | ||
| 171 | static const RegisterSet g_reg_sets_ascend910b[k_num_register_sets_default] = { | 171 | static const RegisterSet g_reg_sets_ascend910b[k_num_register_sets_default] = { |
| @@ -485,11 +485,8 @@ const vector<vector<ErrRegMask>> *RegisterInfoPOSIXCore_ascend910B::GetAicErrorR | |||
| 485 | 485 | ||
| 486 | const RegExtractor &RegisterInfoPOSIX_ascend910B::GetRegExtractor() { | 486 | const RegExtractor &RegisterInfoPOSIX_ascend910B::GetRegExtractor() { |
| 487 | static RegExtractor instance(REGISTER_910B_INFO, k_num_dbg_registers_ascend); | 487 | static RegExtractor instance(REGISTER_910B_INFO, k_num_dbg_registers_ascend); |
| 488 | - static std::once_flag flag{}; | 488 | + LLDB_LOG_ONCE(GetLog(LLDBLog::Process), "raw_register_infos_size={0}", |
| 489 | - std::call_once(flag, []() { | 489 | + instance.raw_register_infos.size()); |
| 490 | - LLDB_LOGF(GetLog(LLDBLog::Process), "raw_register_infos_size=%lu", | ||
| 491 | - instance.raw_register_infos.size()); | ||
| 492 | - }); | ||
| 493 | return instance; | 490 | return instance; |
| 494 | } | 491 | } |
| 495 | 492 | ||
| @@ -514,8 +511,9 @@ const RegisterSet* RegisterInfoPOSIX_ascend910B::GetRegisterSet(size_t set_index | |||
| 514 | return nullptr; | 511 | return nullptr; |
| 515 | } | 512 | } |
| 516 | 513 | ||
| 517 | -Status RegisterInfoPOSIX_ascend910B::GetRegisterAddr(const llvm::StringRef reg_name, | 514 | +Status RegisterInfoPOSIX_ascend910B::GetRegisterAddr( |
| 518 | - CoreType core_type, uint64_t &addr) { | 515 | + const llvm::StringRef reg_name, CoreType core_type, |
| 516 | + InterruptPosType pos_type, uint64_t &addr) { | ||
| 519 | Status error; | 517 | Status error; |
| 520 | auto reg_info = m_register_map.find(reg_name.str()); | 518 | auto reg_info = m_register_map.find(reg_name.str()); |
| 521 | if (reg_info == m_register_map.end()) { | 519 | if (reg_info == m_register_map.end()) { |
| @@ -535,11 +533,7 @@ Status RegisterInfoPOSIX_ascend910B::GetRegisterAddr(const llvm::StringRef reg_n | |||
| 535 | 533 | ||
| 536 | const RegExtractor &RegisterInfoPOSIXCore_ascend910B::GetRegExtractor() { | 534 | const RegExtractor &RegisterInfoPOSIXCore_ascend910B::GetRegExtractor() { |
| 537 | static RegExtractor instance(REGISTER_910B_INFO, k_num_registers_ascend); | 535 | static RegExtractor instance(REGISTER_910B_INFO, k_num_registers_ascend); |
| 538 | - static std::once_flag flag{}; | 536 | + LLDB_LOG_ONCE(GetLog(LLDBLog::Process), "raw_register_infos_size={0}",instance.raw_register_infos.size() ); |
| 539 | - std::call_once(flag, []() { | ||
| 540 | - LLDB_LOGF(GetLog(LLDBLog::Process), "raw_register_infos_size=%lu", | ||
| 541 | - instance.raw_register_infos.size()); | ||
| 542 | - }); | ||
| 543 | return instance; | 537 | return instance; |
| 544 | } | 538 | } |
| 545 | 539 | ||
| @@ -20,7 +20,8 @@ protected: | |||
| 20 | const std::map<std::string, DeviceRegisterInfo>& register_map); | 20 | const std::map<std::string, DeviceRegisterInfo>& register_map); |
| 21 | 21 | ||
| 22 | const RegisterSet* GetRegisterSet(size_t reg_set) const override; | 22 | const RegisterSet* GetRegisterSet(size_t reg_set) const override; |
| 23 | - Status GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr) override; | 23 | + Status GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, |
| 24 | + InterruptPosType pos_type, uint64_t &addr) override; | ||
| 24 | }; | 25 | }; |
| 25 | 26 | ||
| 26 | // Both classes are in this file since they share the register table, defined in the .cpp. | 27 | // Both classes are in this file since they share the register table, defined in the .cpp. |
| @@ -9,12 +9,38 @@ | |||
| 9 | using namespace lldb_private; | 9 | using namespace lldb_private; |
| 10 | using namespace lldb; | 10 | using namespace lldb; |
| 11 | using namespace std; | 11 | using namespace std; |
| 12 | - | 12 | + |
| 13 | +namespace { | ||
| 14 | + | ||
| 15 | +// bitmap:0|1|2|3 | ||
| 16 | +// aic|aiv|simd_vf|simt_vf | ||
| 17 | +// don't care pos_type | ||
| 13 | constexpr uint8_t AIC_MASK = 1U << static_cast<int>(CoreType::AIC); | 18 | constexpr uint8_t AIC_MASK = 1U << static_cast<int>(CoreType::AIC); |
| 14 | constexpr uint8_t AIV_MASK = 1U << static_cast<int>(CoreType::AIV); | 19 | constexpr uint8_t AIV_MASK = 1U << static_cast<int>(CoreType::AIV); |
| 15 | constexpr uint8_t MIX_MASK = AIC_MASK | AIV_MASK; | 20 | constexpr uint8_t MIX_MASK = AIC_MASK | AIV_MASK; |
| 16 | - | 21 | + |
| 17 | -namespace { | 22 | +// only show on SIMD/SIMT |
| 23 | +constexpr uint8_t SIMD_MASK_OFFSET = 2; | ||
| 24 | +constexpr uint8_t SIMT_MASK_OFFSET = 3; | ||
| 25 | +constexpr uint8_t SIMD_VF_MASK = 1U << SIMD_MASK_OFFSET; | ||
| 26 | +constexpr uint8_t SIMT_VF_MASK = 1U << SIMT_MASK_OFFSET; | ||
| 27 | + | ||
| 28 | +bool IsRegisterSupport(CoreType core_type, InterruptPosType pos_type, | ||
| 29 | + uint8_t mask) { | ||
| 30 | + // if mask not belong to simd/simt, only consider core_type | ||
| 31 | + if ((mask & AIC_MASK) || (mask & AIV_MASK)) { | ||
| 32 | + return mask & (1U << static_cast<int>(core_type)); | ||
| 33 | + } | ||
| 34 | + if (pos_type == InterruptPosType::VEC_INTERRUPT_SIMD) { | ||
| 35 | + return mask & SIMD_VF_MASK; | ||
| 36 | + } | ||
| 37 | + if (pos_type == InterruptPosType::VEC_INTERRUPT_SIMT) { | ||
| 38 | + return mask & SIMT_VF_MASK; | ||
| 39 | + } | ||
| 40 | + // su but register is vf | ||
| 41 | + return false; | ||
| 42 | +} | ||
| 43 | + | ||
| 18 | enum LLDB_ASCEND_RENUM { | 44 | enum LLDB_ASCEND_RENUM { |
| 19 | k_first_gpr_ascend, | 45 | k_first_gpr_ascend, |
| 20 | lldb_x0_ascend = k_first_gpr_ascend, lldb_x1_ascend, lldb_x2_ascend, lldb_x3_ascend, | 46 | lldb_x0_ascend = k_first_gpr_ascend, lldb_x1_ascend, lldb_x2_ascend, lldb_x3_ascend, |
| @@ -59,7 +85,7 @@ enum LLDB_ASCEND_RENUM { | |||
| 59 | lldb_p7_ascend, lldb_uld0_ascend, lldb_uld1_ascend, lldb_uld2_ascend, | 85 | lldb_p7_ascend, lldb_uld0_ascend, lldb_uld1_ascend, lldb_uld2_ascend, |
| 60 | lldb_uld3_ascend, lldb_ust0_ascend, lldb_ust1_ascend, lldb_ust2_ascend, | 86 | lldb_uld3_ascend, lldb_ust0_ascend, lldb_ust1_ascend, lldb_ust2_ascend, |
| 61 | lldb_ust3_ascend, lldb_ust_flag_0_ascend, lldb_ust_flag_1_ascend, lldb_ust_flag_2_ascend, | 87 | lldb_ust3_ascend, lldb_ust_flag_0_ascend, lldb_ust_flag_1_ascend, lldb_ust_flag_2_ascend, |
| 62 | - lldb_ust_flag_3_ascend, | 88 | + lldb_ust_flag_3_ascend, |
| 63 | // 32 bit | 89 | // 32 bit |
| 64 | lldb_sreg_first, | 90 | lldb_sreg_first, |
| 65 | lldb_tpes0_ascend = lldb_sreg_first, lldb_tpes1_ascend, lldb_tpes2_ascend, lldb_tpes3_ascend, | 91 | lldb_tpes0_ascend = lldb_sreg_first, lldb_tpes1_ascend, lldb_tpes2_ascend, lldb_tpes3_ascend, |
| @@ -526,7 +552,7 @@ static const DeviceRegisterInfo REGISTER_950_INFO[] = { | |||
| 526 | {ASCEND_REG(LOOP4_STRIDE_NDDMA, lldb_loop4_stride_nddma_ascend), MTE_ID << ID_OFFSET | 2UL << 48 | 28, AIV_MASK}, | 552 | {ASCEND_REG(LOOP4_STRIDE_NDDMA, lldb_loop4_stride_nddma_ascend), MTE_ID << ID_OFFSET | 2UL << 48 | 28, AIV_MASK}, |
| 527 | {ASCEND_REG(PCIE_RD_CTRL, lldb_pcie_rd_ctrl_ascend), MTE_ID << ID_OFFSET | 2UL << 48 | 29, AIV_MASK}, | 553 | {ASCEND_REG(PCIE_RD_CTRL, lldb_pcie_rd_ctrl_ascend), MTE_ID << ID_OFFSET | 2UL << 48 | 29, AIV_MASK}, |
| 528 | {ASCEND_REG(PCIE_WR_CTRL, lldb_pcie_wr_ctrl_ascend), MTE_ID << ID_OFFSET | 2UL << 48 | 30, AIV_MASK}, | 554 | {ASCEND_REG(PCIE_WR_CTRL, lldb_pcie_wr_ctrl_ascend), MTE_ID << ID_OFFSET | 2UL << 48 | 30, AIV_MASK}, |
| 529 | - | 555 | + |
| 530 | {ASCEND_GPR_NBYTES_VEC_FORMAT_UINT32(V0, v0, 256), VEC_ID << ID_OFFSET | 2UL << 48, AIV_MASK}, | 556 | {ASCEND_GPR_NBYTES_VEC_FORMAT_UINT32(V0, v0, 256), VEC_ID << ID_OFFSET | 2UL << 48, AIV_MASK}, |
| 531 | {ASCEND_GPR_NBYTES_VEC_FORMAT_UINT32(V1, v1, 256), VEC_ID << ID_OFFSET | 2UL << 48 | 16, AIV_MASK}, | 557 | {ASCEND_GPR_NBYTES_VEC_FORMAT_UINT32(V1, v1, 256), VEC_ID << ID_OFFSET | 2UL << 48 | 16, AIV_MASK}, |
| 532 | {ASCEND_GPR_NBYTES_VEC_FORMAT_UINT32(V2, v2, 256), VEC_ID << ID_OFFSET | 2UL << 48 | 32, AIV_MASK}, | 558 | {ASCEND_GPR_NBYTES_VEC_FORMAT_UINT32(V2, v2, 256), VEC_ID << ID_OFFSET | 2UL << 48 | 32, AIV_MASK}, |
| @@ -962,7 +988,7 @@ static const DeviceRegisterInfo REGISTER_950_INFO[] = { | |||
| 962 | {ASCEND_GPR_NBYTES(R124, r124, 4), VEC_ID << ID_OFFSET | 9UL << 48 | 81920, AIV_MASK}, | 988 | {ASCEND_GPR_NBYTES(R124, r124, 4), VEC_ID << ID_OFFSET | 9UL << 48 | 81920, AIV_MASK}, |
| 963 | {ASCEND_GPR_NBYTES(R125, r125, 4), VEC_ID << ID_OFFSET | 9UL << 48 | 81920, AIV_MASK}, | 989 | {ASCEND_GPR_NBYTES(R125, r125, 4), VEC_ID << ID_OFFSET | 9UL << 48 | 81920, AIV_MASK}, |
| 964 | {ASCEND_GPR_NBYTES(R126, r126, 4), VEC_ID << ID_OFFSET | 9UL << 48 | 81920, AIV_MASK}, | 990 | {ASCEND_GPR_NBYTES(R126, r126, 4), VEC_ID << ID_OFFSET | 9UL << 48 | 81920, AIV_MASK}, |
| 965 | - | 991 | + |
| 966 | {ASCEND_REG(FMATRIX, lldb_fmatrix_ascend), L1_ID << ID_OFFSET | 0, AIC_MASK}, | 992 | {ASCEND_REG(FMATRIX, lldb_fmatrix_ascend), L1_ID << ID_OFFSET | 0, AIC_MASK}, |
| 967 | {ASCEND_REG(PADDING_L1, lldb_padding_l1_ascend), L1_ID << ID_OFFSET | 1, AIC_MASK}, | 993 | {ASCEND_REG(PADDING_L1, lldb_padding_l1_ascend), L1_ID << ID_OFFSET | 1, AIC_MASK}, |
| 968 | {ASCEND_REG(L0_SET_VALUE_L1, lldb_l0_set_value_l1_ascend), L1_ID << ID_OFFSET | 2, AIC_MASK}, | 994 | {ASCEND_REG(L0_SET_VALUE_L1, lldb_l0_set_value_l1_ascend), L1_ID << ID_OFFSET | 2, AIC_MASK}, |
| @@ -1026,8 +1052,8 @@ static const DeviceRegisterInfo REGISTER_950_INFO[] = { | |||
| 1026 | }; | 1052 | }; |
| 1027 | 1053 | ||
| 1028 | // Returns uint32_t with bits [start, end] = 1 | 1054 | // Returns uint32_t with bits [start, end] = 1 |
| 1029 | -inline constexpr uint32_t GenMask(uint32_t start, uint32_t end) { | 1055 | +inline constexpr uint64_t GenMask(uint32_t start, uint32_t end) { |
| 1030 | - return static_cast<uint32_t>(((1UL << (end - start + 1)) - 1) << start); | 1056 | + return static_cast<uint64_t>(((1UL << (end - start + 1)) - 1) << start); |
| 1031 | } | 1057 | } |
| 1032 | 1058 | ||
| 1033 | inline void AddMaskCommon(uint32_t mask, uint32_t err_info_reg_num, vector<ErrRegMask> &err_infos) { | 1059 | inline void AddMaskCommon(uint32_t mask, uint32_t err_info_reg_num, vector<ErrRegMask> &err_infos) { |
| @@ -1104,7 +1130,7 @@ const vector<vector<ErrRegMask>> *RegisterInfoPOSIXCore_ascend950::GetAicErrorRe | |||
| 1104 | addMask(lldb_l1_err_info_t0_1, GenMask(0, 21)); | 1130 | addMask(lldb_l1_err_info_t0_1, GenMask(0, 21)); |
| 1105 | return &table; | 1131 | return &table; |
| 1106 | } | 1132 | } |
| 1107 | - | 1133 | + |
| 1108 | const RegExtractor &RegisterInfoPOSIX_ascend950::GetRegExtractor() { | 1134 | const RegExtractor &RegisterInfoPOSIX_ascend950::GetRegExtractor() { |
| 1109 | static RegExtractor instance(REGISTER_950_INFO, k_num_dbg_registers_ascend); | 1135 | static RegExtractor instance(REGISTER_950_INFO, k_num_dbg_registers_ascend); |
| 1110 | static std::once_flag flag{}; | 1136 | static std::once_flag flag{}; |
| @@ -1121,7 +1147,7 @@ const RegisterInfo *RegisterInfoPOSIX_ascend950::GetRegisterInfoAt(uint32_t reg_ | |||
| 1121 | } | 1147 | } |
| 1122 | return nullptr; | 1148 | return nullptr; |
| 1123 | } | 1149 | } |
| 1124 | - | 1150 | + |
| 1125 | RegisterInfoPOSIX_ascend950::RegisterInfoPOSIX_ascend950(const ArchSpec &target_arch) | 1151 | RegisterInfoPOSIX_ascend950::RegisterInfoPOSIX_ascend950(const ArchSpec &target_arch) |
| 1126 | : RegisterInfoPOSIX_ascend(target_arch, k_num_dbg_registers_ascend, | 1152 | : RegisterInfoPOSIX_ascend(target_arch, k_num_dbg_registers_ascend, |
| 1127 | k_last_gpr_ascend - k_first_gpr_ascend + 1, | 1153 | k_last_gpr_ascend - k_first_gpr_ascend + 1, |
| @@ -1132,22 +1158,24 @@ RegisterInfoPOSIX_ascend950::RegisterInfoPOSIX_ascend950(const ArchSpec &target_ | |||
| 1132 | size_t RegisterInfoPOSIX_ascend950::GetRegisterSetCount() const { | 1158 | size_t RegisterInfoPOSIX_ascend950::GetRegisterSetCount() const { |
| 1133 | return k_num_register_sets_default; | 1159 | return k_num_register_sets_default; |
| 1134 | } | 1160 | } |
| 1135 | - | 1161 | + |
| 1136 | const RegisterSet* RegisterInfoPOSIX_ascend950::GetRegisterSet(size_t set_index) const { | 1162 | const RegisterSet* RegisterInfoPOSIX_ascend950::GetRegisterSet(size_t set_index) const { |
| 1137 | if (set_index < GetRegisterSetCount()) | 1163 | if (set_index < GetRegisterSetCount()) |
| 1138 | return &g_reg_sets_ascend950[set_index]; | 1164 | return &g_reg_sets_ascend950[set_index]; |
| 1139 | return nullptr; | 1165 | return nullptr; |
| 1140 | } | 1166 | } |
| 1141 | - | 1167 | + |
| 1142 | -Status RegisterInfoPOSIX_ascend950::GetRegisterAddr(const llvm::StringRef reg_name, | 1168 | +Status RegisterInfoPOSIX_ascend950::GetRegisterAddr( |
| 1143 | - CoreType core_type, uint64_t &addr) { | 1169 | + const llvm::StringRef reg_name, CoreType core_type, |
| 1170 | + InterruptPosType pos_type, uint64_t &addr) { | ||
| 1144 | Status error; | 1171 | Status error; |
| 1145 | auto reg_info = m_register_map.find(reg_name.str()); | 1172 | auto reg_info = m_register_map.find(reg_name.str()); |
| 1146 | if (reg_info == m_register_map.end()) { | 1173 | if (reg_info == m_register_map.end()) { |
| 1147 | error.SetErrorStringWithFormatv( | 1174 | error.SetErrorStringWithFormatv( |
| 1148 | "Can not get addr, register name: {0}", reg_name); | 1175 | "Can not get addr, register name: {0}", reg_name); |
| 1149 | } | 1176 | } |
| 1150 | - if ((1U << static_cast<int>(core_type)) & reg_info->second.core_type_support_mask) { | 1177 | + if (IsRegisterSupport(core_type, pos_type, |
| 1178 | + reg_info->second.core_type_support_mask)) { | ||
| 1151 | addr = reg_info->second.addr; | 1179 | addr = reg_info->second.addr; |
| 1152 | } else { | 1180 | } else { |
| 1153 | error.SetErrorStringWithFormatv( | 1181 | error.SetErrorStringWithFormatv( |
| @@ -1211,7 +1239,7 @@ RegisterInfoPOSIXCore_ascend950::RegisterInfoPOSIXCore_ascend950(const ArchSpec | |||
| 1211 | GetRegExtractor().raw_register_infos.data(), | 1239 | GetRegExtractor().raw_register_infos.data(), |
| 1212 | GetRegExtractor().register_map) { | 1240 | GetRegExtractor().register_map) { |
| 1213 | } | 1241 | } |
| 1214 | - | 1242 | + |
| 1215 | RegisterInfoPOSIX_ascend950::RegisterInfoPOSIX_ascend950(const ArchSpec &target_arch, uint32_t register_info_count, | 1243 | RegisterInfoPOSIX_ascend950::RegisterInfoPOSIX_ascend950(const ArchSpec &target_arch, uint32_t register_info_count, |
| 1216 | uint32_t register_gpr_count, const RegisterInfo *register_info_p, | 1244 | uint32_t register_gpr_count, const RegisterInfo *register_info_p, |
| 1217 | const std::map<std::string, DeviceRegisterInfo>& register_map) | 1245 | const std::map<std::string, DeviceRegisterInfo>& register_map) |
| @@ -1226,7 +1254,7 @@ Status RegisterInfoPOSIX_ascend950::ReadVXReg( | |||
| 1226 | Log *log = GetLog(LLDBLog::Process); | 1254 | Log *log = GetLog(LLDBLog::Process); |
| 1227 | // simd is 256bit | 1255 | // simd is 256bit |
| 1228 | constexpr uint16_t vl_size = 256; | 1256 | constexpr uint16_t vl_size = 256; |
| 1229 | - constexpr uint8_t read_count = vl_size / 32; | 1257 | + constexpr uint8_t read_count = vl_size / 32; |
| 1230 | DataBufferHeap buffer; | 1258 | DataBufferHeap buffer; |
| 1231 | Status error; | 1259 | Status error; |
| 1232 | if (m_register_map.find(reg_info->name) == m_register_map.end()) { | 1260 | if (m_register_map.find(reg_info->name) == m_register_map.end()) { |
| @@ -1422,14 +1450,14 @@ static const RegisterSet g_core_reg_sets[k_num_register_sets] = { | |||
| 1422 | {"AicErrorRegisters", "aic_err_reg", k_num_aic_error_registers, g_aic_error_regnums}, | 1450 | {"AicErrorRegisters", "aic_err_reg", k_num_aic_error_registers, g_aic_error_regnums}, |
| 1423 | {"ErrorInfoRegisters", "err_info_reg", k_num_err_info_registers, g_err_info_regnums}, | 1451 | {"ErrorInfoRegisters", "err_info_reg", k_num_err_info_registers, g_err_info_regnums}, |
| 1424 | }; | 1452 | }; |
| 1425 | - | 1453 | + |
| 1426 | const RegisterSet* RegisterInfoPOSIXCore_ascend950::GetRegisterSet(size_t set_index) const { | 1454 | const RegisterSet* RegisterInfoPOSIXCore_ascend950::GetRegisterSet(size_t set_index) const { |
| 1427 | if (set_index < GetRegisterSetCount()) | 1455 | if (set_index < GetRegisterSetCount()) |
| 1428 | return &g_core_reg_sets[set_index]; | 1456 | return &g_core_reg_sets[set_index]; |
| 1429 | LLDB_LOGF(GetLog(LLDBLog::Thread), "get A2/A3 core register set failed"); | 1457 | LLDB_LOGF(GetLog(LLDBLog::Thread), "get A2/A3 core register set failed"); |
| 1430 | return nullptr; | 1458 | return nullptr; |
| 1431 | } | 1459 | } |
| 1432 | - | 1460 | + |
| 1433 | size_t RegisterInfoPOSIXCore_ascend950::GetRegisterSetCount() const { | 1461 | size_t RegisterInfoPOSIXCore_ascend950::GetRegisterSetCount() const { |
| 1434 | return k_num_register_sets; | 1462 | return k_num_register_sets; |
| 1435 | } | 1463 | } |
| @@ -5,7 +5,7 @@ | |||
| 5 | 5 | ||
| 6 | 6 | ||
| 7 | 7 | ||
| 8 | - | 8 | + |
| 9 | class RegisterInfoPOSIX_ascend950 : public RegisterInfoPOSIX_ascend { | 9 | class RegisterInfoPOSIX_ascend950 : public RegisterInfoPOSIX_ascend { |
| 10 | public: | 10 | public: |
| 11 | struct BaseRegGroup { | 11 | struct BaseRegGroup { |
| @@ -16,7 +16,10 @@ public: | |||
| 16 | 16 | ||
| 17 | RegisterInfoPOSIX_ascend950(const ArchSpec &target_arch); | 17 | RegisterInfoPOSIX_ascend950(const ArchSpec &target_arch); |
| 18 | const RegisterSet* GetRegisterSet(size_t reg_set) const override; | 18 | const RegisterSet* GetRegisterSet(size_t reg_set) const override; |
| 19 | - Status GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, uint64_t &addr) override; | 19 | + |
| 20 | + Status GetRegisterAddr(const llvm::StringRef reg_name, CoreType core_type, | ||
| 21 | + InterruptPosType pos_type, uint64_t &addr) override; | ||
| 22 | + | ||
| 20 | static const RegExtractor &GetRegExtractor(); | 23 | static const RegExtractor &GetRegExtractor(); |
| 21 | 24 | ||
| 22 | Status ReadRegister(const RegisterInfo *reg_info, const InterruptPosInfo &pos_info, | 25 | Status ReadRegister(const RegisterInfo *reg_info, const InterruptPosInfo &pos_info, |
| @@ -64,14 +67,14 @@ private: | |||
| 64 | class RegisterInfoPOSIXCore_ascend950 : public RegisterInfoPOSIX_ascend950 { | 67 | class RegisterInfoPOSIXCore_ascend950 : public RegisterInfoPOSIX_ascend950 { |
| 65 | public: | 68 | public: |
| 66 | static const RegExtractor& GetRegExtractor(); | 69 | static const RegExtractor& GetRegExtractor(); |
| 67 | - | 70 | + |
| 68 | public: | 71 | public: |
| 69 | RegisterInfoPOSIXCore_ascend950(const ArchSpec &target_arch); | 72 | RegisterInfoPOSIXCore_ascend950(const ArchSpec &target_arch); |
| 70 | - | 73 | + |
| 71 | const RegisterSet* GetRegisterSet(size_t reg_set) const override; | 74 | const RegisterSet* GetRegisterSet(size_t reg_set) const override; |
| 72 | 75 | ||
| 73 | const std::vector<std::vector<ErrRegMask>> *GetAicErrorRegTable() override; | 76 | const std::vector<std::vector<ErrRegMask>> *GetAicErrorRegTable() override; |
| 74 | - | 77 | + |
| 75 | size_t GetRegisterSetCount() const override; | 78 | size_t GetRegisterSetCount() const override; |
| 76 | }; | 79 | }; |
| 77 | 80 | ||
| @@ -28,6 +28,7 @@ enum class GlobalDataType : uint16_t { | |||
| 28 | ARGS = 101, | 28 | ARGS = 101, |
| 29 | STACK = 102, | 29 | STACK = 102, |
| 30 | DEVICE_KERNEL_OBJECT = 103, // device侧GM中算子.o数据 | 30 | DEVICE_KERNEL_OBJECT = 103, // device侧GM中算子.o数据 |
| 31 | + VF_STACK = 104, | ||
| 31 | MAX | 32 | MAX |
| 32 | }; | 33 | }; |
| 33 | 34 | ||
| @@ -72,7 +73,7 @@ struct GlobalMemInfo { | |||
| 72 | struct LocalMemInfo { | 73 | struct LocalMemInfo { |
| 73 | uint64_t size; //内存大小 | 74 | uint64_t size; //内存大小 |
| 74 | uint32_t section_index; // 对应哪个.ascend.local section | 75 | uint32_t section_index; // 对应哪个.ascend.local section |
| 75 | - uint32_t global_section_index; //对应哪个.ascend.gloabl section, 只有dcache有效 | 76 | + uint32_t global_section_index; //对应哪个.ascend.global section, 只有dcache有效 |
| 76 | MemType type; // L0AL1等 | 77 | MemType type; // L0AL1等 |
| 77 | uint32_t reserve; | 78 | uint32_t reserve; |
| 78 | }; | 79 | }; |
| @@ -112,6 +113,29 @@ struct LocalMemory { | |||
| 112 | std::vector<uint8_t> data; | 113 | std::vector<uint8_t> data; |
| 113 | }; | 114 | }; |
| 114 | 115 | ||
| 116 | +struct ThreadDim { | ||
| 117 | + uint16_t x; | ||
| 118 | + uint16_t y; | ||
| 119 | + uint16_t z; | ||
| 120 | +}; | ||
| 121 | + | ||
| 122 | +struct FocusPosInfo { | ||
| 123 | + CoreType core_type; | ||
| 124 | + // core id is unique for all aic and aic | ||
| 125 | + CoreIDType core_id; | ||
| 126 | + InterruptPosType pos_type{InterruptPosType::SU_INTERRUPT}; | ||
| 127 | + ThreadDim thread_dim; | ||
| 128 | + ThreadPos thread_pos; | ||
| 129 | +}; | ||
| 130 | + | ||
| 131 | +inline ThreadPos LinearIdxToThreadPos(uint32_t linear_idx, const ThreadDim &thread_dim) { | ||
| 132 | + ThreadPos pos; | ||
| 133 | + pos.x = linear_idx % thread_dim.x; | ||
| 134 | + pos.y = (linear_idx / thread_dim.x) % thread_dim.y; | ||
| 135 | + pos.z = linear_idx / (thread_dim.x * thread_dim.y); | ||
| 136 | + return pos; | ||
| 137 | +} | ||
| 138 | + | ||
| 115 | struct SummaryInfo { | 139 | struct SummaryInfo { |
| 116 | std::vector<CoreIDType> aiv_id; | 140 | std::vector<CoreIDType> aiv_id; |
| 117 | std::vector<CoreIDType> aic_id; | 141 | std::vector<CoreIDType> aic_id; |
| @@ -124,8 +148,7 @@ struct SummaryInfo { | |||
| 124 | std::unordered_map<CoreIDType, std::unordered_map<lldb_private::MemType, std::vector<LocalMemory>>> local_mems; | 148 | std::unordered_map<CoreIDType, std::unordered_map<lldb_private::MemType, std::vector<LocalMemory>>> local_mems; |
| 125 | // map key is core_id, addr | 149 | // map key is core_id, addr |
| 126 | std::unordered_map<CoreIDType, std::unordered_map<uint64_t, std::unique_ptr<RegDataBase>>> reg_data; | 150 | std::unordered_map<CoreIDType, std::unordered_map<uint64_t, std::unique_ptr<RegDataBase>>> reg_data; |
| 127 | - CoreIDType focus_core_id; | 151 | + FocusPosInfo focus_pos_info; |
| 128 | - CoreType focus_core_type; | ||
| 129 | uint64_t base_pc; | 152 | uint64_t base_pc; |
| 130 | }; | 153 | }; |
| 131 | 154 | ||
| @@ -157,6 +180,7 @@ static std::unordered_map<GlobalDataType, std::string> GlobalDataTypeToStr { | |||
| 157 | {GlobalDataType::ARGS, "ARGS"}, | 180 | {GlobalDataType::ARGS, "ARGS"}, |
| 158 | {GlobalDataType::STACK, "STACK"}, | 181 | {GlobalDataType::STACK, "STACK"}, |
| 159 | {GlobalDataType::DEVICE_KERNEL_OBJECT, "DEVICE_KERNEL_OBJECT"}, | 182 | {GlobalDataType::DEVICE_KERNEL_OBJECT, "DEVICE_KERNEL_OBJECT"}, |
| 183 | + {GlobalDataType::VF_STACK, "VF_STACK"}, | ||
| 160 | {GlobalDataType::MAX, "NULL"} | 184 | {GlobalDataType::MAX, "NULL"} |
| 161 | }; | 185 | }; |
| 162 | 186 | ||
| @@ -171,7 +195,8 @@ static std::unordered_map<GlobalDataType, std::string> GlobalDataTypeToMemTypeSt | |||
| 171 | {GlobalDataType::SHAPE_TENSOR, "GM"}, | 195 | {GlobalDataType::SHAPE_TENSOR, "GM"}, |
| 172 | {GlobalDataType::ARGS, "GM/DCACHE"}, | 196 | {GlobalDataType::ARGS, "GM/DCACHE"}, |
| 173 | {GlobalDataType::STACK, "GM/DCACHE"}, | 197 | {GlobalDataType::STACK, "GM/DCACHE"}, |
| 174 | - {GlobalDataType::DEVICE_KERNEL_OBJECT, "GM"} | 198 | + {GlobalDataType::DEVICE_KERNEL_OBJECT, "GM"}, |
| 199 | + {GlobalDataType::VF_STACK, "GM"}, | ||
| 175 | }; | 200 | }; |
| 176 | 201 | ||
| 177 | static std::unordered_map<MemType, std::string> LocalDataTypeToStr { | 202 | static std::unordered_map<MemType, std::string> LocalDataTypeToStr { |
| @@ -195,7 +220,8 @@ static std::unordered_map<DeviceAddressClass, std::vector<GlobalDataType>> Addre | |||
| 195 | GlobalDataType::SHAPE_TENSOR, | 220 | GlobalDataType::SHAPE_TENSOR, |
| 196 | GlobalDataType::ARGS, | 221 | GlobalDataType::ARGS, |
| 197 | GlobalDataType::DEVICE_KERNEL_OBJECT, | 222 | GlobalDataType::DEVICE_KERNEL_OBJECT, |
| 198 | - GlobalDataType::STACK}} | 223 | + GlobalDataType::STACK, |
| 224 | + GlobalDataType::VF_STACK}} | ||
| 199 | }; | 225 | }; |
| 200 | 226 | ||
| 201 | static std::unordered_map<DeviceAddressClass, MemType> AddressClassLocalDataTypeMap = { | 227 | static std::unordered_map<DeviceAddressClass, MemType> AddressClassLocalDataTypeMap = { |
| @@ -185,6 +185,70 @@ Status ProcessElfCoreDevice::DoLoadCore() { | |||
| 185 | return error; | 185 | return error; |
| 186 | } | 186 | } |
| 187 | 187 | ||
| 188 | +Status ProcessElfCoreDevice::GetThreadDim(RegisterContextSP reg_ctx_sp, | ||
| 189 | + ThreadDim &thread_dim) { | ||
| 190 | + Status error; | ||
| 191 | + if (m_summary_info.chip_type == DevdrvChipType::CHIP_CLOUD_V4 && | ||
| 192 | + m_summary_info.focus_pos_info.core_type == CoreType::AIV) { | ||
| 193 | + RegisterValue value; | ||
| 194 | + const static std::vector<std::string> reg_names{ | ||
| 195 | + "VTHREADDIM_X", "VTHREADDIM_Y", "VTHREADDIM_Z"}; | ||
| 196 | + std::vector<uint16_t> dims; | ||
| 197 | + | ||
| 198 | + for (const auto ®_name : reg_names) { | ||
| 199 | + const auto *reg_info = reg_ctx_sp->GetRegisterInfoByName(reg_name); | ||
| 200 | + if (!reg_info) { | ||
| 201 | + error.SetErrorStringWithFormatv("Get register info for {0} failed.", | ||
| 202 | + reg_name); | ||
| 203 | + return error; | ||
| 204 | + } | ||
| 205 | + if (!reg_ctx_sp->ReadRegister(reg_info, value)) { | ||
| 206 | + error.SetErrorStringWithFormatv("Read register value for {0} failed.", | ||
| 207 | + reg_name); | ||
| 208 | + return error; | ||
| 209 | + } | ||
| 210 | + // 12bit | ||
| 211 | + dims.push_back(value.GetAsUInt16() & 0xfff); | ||
| 212 | + } | ||
| 213 | + thread_dim.x = dims[0]; | ||
| 214 | + thread_dim.y = dims[1]; | ||
| 215 | + thread_dim.z = dims[2]; | ||
| 216 | + return error; | ||
| 217 | + } | ||
| 218 | + error.SetErrorStringWithFormatv( | ||
| 219 | + "Unsupport soc or core_type for get thread dim"); | ||
| 220 | + return error; | ||
| 221 | +} | ||
| 222 | + | ||
| 223 | +void ProcessElfCoreDevice::FocusToActiveThreadInWarp(uint8_t warp_id) { | ||
| 224 | + Log *log = GetLog(LLDBLog::Process); | ||
| 225 | + ThreadSP thread = GetThreadList().GetSelectedThread(); | ||
| 226 | + if (!thread) { | ||
| 227 | + LLDB_LOG(log, "Empty thread, stop focus to named error aicore"); | ||
| 228 | + return; | ||
| 229 | + } | ||
| 230 | + RegisterContextSP reg_ctx_sp = thread->GetRegisterContext(); | ||
| 231 | + if (!reg_ctx_sp) { | ||
| 232 | + LLDB_LOG(log, "Get register context failed."); | ||
| 233 | + return; | ||
| 234 | + } | ||
| 235 | + const auto *reg_info = reg_ctx_sp->GetRegisterInfoByName("EXECMASK"); | ||
| 236 | + if (!reg_info) { | ||
| 237 | + LLDB_LOG(log, "Get exec mask register info failed."); | ||
| 238 | + return; | ||
| 239 | + } | ||
| 240 | + RegisterValue value; | ||
| 241 | + if (!reg_ctx_sp->ReadRegister(reg_info, value)) { | ||
| 242 | + LLDB_LOG(log, "Get exec mask register value failed."); | ||
| 243 | + return; | ||
| 244 | + } | ||
| 245 | + uint32_t exec_mask = value.GetAsUInt32(); | ||
| 246 | + uint16_t thread_idx = | ||
| 247 | + warp_id * 32 + (exec_mask ? __builtin_ctz(exec_mask) : 0); | ||
| 248 | + m_device_stop_info.thread_pos = LinearIdxToThreadPos( | ||
| 249 | + thread_idx, m_summary_info.focus_pos_info.thread_dim); | ||
| 250 | +} | ||
| 251 | + | ||
| 188 | void ProcessElfCoreDevice::FocusToAnyKnownErrorAiCore() { | 252 | void ProcessElfCoreDevice::FocusToAnyKnownErrorAiCore() { |
| 189 | Log *log = GetLog(LLDBLog::Process); | 253 | Log *log = GetLog(LLDBLog::Process); |
| 190 | ThreadSP thread = GetThreadList().GetSelectedThread(); | 254 | ThreadSP thread = GetThreadList().GetSelectedThread(); |
| @@ -198,11 +262,11 @@ void ProcessElfCoreDevice::FocusToAnyKnownErrorAiCore() { | |||
| 198 | LLDB_LOG(log, "Cast register context to posix core ascend register context failed."); | 262 | LLDB_LOG(log, "Cast register context to posix core ascend register context failed."); |
| 199 | return; | 263 | return; |
| 200 | } | 264 | } |
| 201 | - auto old_focus_core_id = m_summary_info.focus_core_id; | 265 | + auto old_focus_core_id = m_summary_info.focus_pos_info.core_id; |
| 202 | - auto old_focus_core_type = m_summary_info.focus_core_type; | 266 | + auto old_focus_core_type = m_summary_info.focus_pos_info.core_type; |
| 203 | for (auto core_id: m_summary_info.aic_id) { | 267 | for (auto core_id: m_summary_info.aic_id) { |
| 204 | - m_summary_info.focus_core_id = core_id; | 268 | + m_summary_info.focus_pos_info.core_id = core_id; |
| 205 | - m_summary_info.focus_core_type = CoreType::AIC; | 269 | + m_summary_info.focus_pos_info.core_type = CoreType::AIC; |
| 206 | string reg_name = core_reg_ctx->GetStopErrorRegister(); | 270 | string reg_name = core_reg_ctx->GetStopErrorRegister(); |
| 207 | if (!reg_name.empty()) { | 271 | if (!reg_name.empty()) { |
| 208 | thread->RefreshStackFramePC(); | 272 | thread->RefreshStackFramePC(); |
| @@ -210,29 +274,72 @@ void ProcessElfCoreDevice::FocusToAnyKnownErrorAiCore() { | |||
| 210 | } | 274 | } |
| 211 | } | 275 | } |
| 212 | for (auto core_id: m_summary_info.aiv_id) { | 276 | for (auto core_id: m_summary_info.aiv_id) { |
| 213 | - m_summary_info.focus_core_id = core_id; | 277 | + m_summary_info.focus_pos_info.core_id = core_id; |
| 214 | - m_summary_info.focus_core_type = CoreType::AIV; | 278 | + m_summary_info.focus_pos_info.core_type = CoreType::AIV; |
| 215 | string reg_name = core_reg_ctx->GetStopErrorRegister(); | 279 | string reg_name = core_reg_ctx->GetStopErrorRegister(); |
| 216 | if (!reg_name.empty()) { | 280 | if (!reg_name.empty()) { |
| 217 | thread->RefreshStackFramePC(); | 281 | thread->RefreshStackFramePC(); |
| 218 | return; | 282 | return; |
| 219 | } | 283 | } |
| 220 | } | 284 | } |
| 221 | - m_summary_info.focus_core_id = old_focus_core_id; | 285 | + m_summary_info.focus_pos_info.core_id = old_focus_core_id; |
| 222 | - m_summary_info.focus_core_type = old_focus_core_type; | 286 | + m_summary_info.focus_pos_info.core_type = old_focus_core_type; |
| 223 | } | 287 | } |
| 224 | - | 288 | + |
| 289 | +InterruptPosType | ||
| 290 | +ProcessElfCoreDevice::GetPosType(RegisterContextSP reg_ctx_sp) { | ||
| 291 | + Log *log = GetLog(LLDBLog::Process); | ||
| 292 | + if (m_summary_info.chip_type == DevdrvChipType::CHIP_CLOUD_V4 && | ||
| 293 | + m_summary_info.focus_pos_info.core_type == CoreType::AIV) { | ||
| 294 | + const static vector<string> vec_err_names{"VEC_ERROR_T0_0", | ||
| 295 | + "VEC_ERROR_T0_2"}; | ||
| 296 | + bool is_vf_err = false; | ||
| 297 | + RegisterValue value; | ||
| 298 | + for (const auto &name : vec_err_names) { | ||
| 299 | + const auto *err_reg_info = reg_ctx_sp->GetRegisterInfoByName(name); | ||
| 300 | + if (!err_reg_info) { | ||
| 301 | + break; | ||
| 302 | + } | ||
| 303 | + if (!reg_ctx_sp->ReadRegister(err_reg_info, value)) { | ||
| 304 | + break; | ||
| 305 | + } | ||
| 306 | + if (value.GetAsUInt32() > 0) { | ||
| 307 | + is_vf_err = true; | ||
| 308 | + break; | ||
| 309 | + } | ||
| 310 | + } | ||
| 311 | + if (!is_vf_err) { | ||
| 312 | + return InterruptPosType::SU_INTERRUPT; | ||
| 313 | + } | ||
| 314 | + const auto *reg_info = | ||
| 315 | + reg_ctx_sp->GetRegisterInfoByName("VEC_ERR_INFO_T0_5"); | ||
| 316 | + if (!reg_info) { | ||
| 317 | + return InterruptPosType::VEC_INTERRUPT_SIMD; | ||
| 318 | + } | ||
| 319 | + if (!reg_ctx_sp->ReadRegister(reg_info, value)) { | ||
| 320 | + LLDB_LOG(log, "Get pos type failed: read register {0} failed.", | ||
| 321 | + reg_info->name); | ||
| 322 | + return InterruptPosType::VEC_INTERRUPT_SIMD; | ||
| 323 | + } | ||
| 324 | + if (value.GetAsUInt32() & 1) { | ||
| 325 | + return InterruptPosType::VEC_INTERRUPT_SIMT; | ||
| 326 | + } | ||
| 327 | + return InterruptPosType::VEC_INTERRUPT_SIMD; | ||
| 328 | + } | ||
| 329 | + return InterruptPosType::SU_INTERRUPT; | ||
| 330 | +} | ||
| 331 | + | ||
| 225 | void ProcessElfCoreDevice::UpdateStopInfo(bool focus_named_error_core) { | 332 | void ProcessElfCoreDevice::UpdateStopInfo(bool focus_named_error_core) { |
| 226 | Log *log = GetLog(LLDBLog::Process); | 333 | Log *log = GetLog(LLDBLog::Process); |
| 227 | if (focus_named_error_core) { | 334 | if (focus_named_error_core) { |
| 228 | FocusToAnyKnownErrorAiCore(); | 335 | FocusToAnyKnownErrorAiCore(); |
| 229 | } | 336 | } |
| 230 | DeviceStopInfo stop_info; | 337 | DeviceStopInfo stop_info; |
| 231 | - stop_info.core_id = m_summary_info.focus_core_id; | 338 | + stop_info.core_id = m_summary_info.focus_pos_info.core_id; |
| 232 | - if (m_summary_info.focus_core_type == CoreType::AIV) { | 339 | + if (m_summary_info.focus_pos_info.core_type == CoreType::AIV) { |
| 233 | stop_info.core_id = stop_info.core_id - GetMaxAicID(m_summary_info.chip_type); | 340 | stop_info.core_id = stop_info.core_id - GetMaxAicID(m_summary_info.chip_type); |
| 234 | } | 341 | } |
| 235 | - stop_info.core_type = m_summary_info.focus_core_type; | 342 | + stop_info.core_type = m_summary_info.focus_pos_info.core_type; |
| 236 | ThreadSP thread = GetThreadList().GetSelectedThread(); | 343 | ThreadSP thread = GetThreadList().GetSelectedThread(); |
| 237 | string desc = "Unknown Error"; | 344 | string desc = "Unknown Error"; |
| 238 | std::shared_ptr<void> defer(nullptr, [&stop_info, this, log, &desc] (std::nullptr_t&) { | 345 | std::shared_ptr<void> defer(nullptr, [&stop_info, this, log, &desc] (std::nullptr_t&) { |
| @@ -257,6 +364,31 @@ void ProcessElfCoreDevice::UpdateStopInfo(bool focus_named_error_core) { | |||
| 257 | } | 364 | } |
| 258 | auto splits = llvm::StringRef(reg_name).split('_'); | 365 | auto splits = llvm::StringRef(reg_name).split('_'); |
| 259 | desc = string(splits.first) + "_ERROR"; | 366 | desc = string(splits.first) + "_ERROR"; |
| 367 | + if (m_summary_info.chip_type == DevdrvChipType::CHIP_CLOUD_V4 && | ||
| 368 | + stop_info.core_type == CoreType::AIV && | ||
| 369 | + GetPosType(reg_ctx_sp) == InterruptPosType::VEC_INTERRUPT_SIMT) { | ||
| 370 | + const auto *err_info_reg = | ||
| 371 | + core_reg_ctx->GetRegisterInfoByName("VEC_ERRINFO_T0_5"); | ||
| 372 | + if (!err_info_reg) { | ||
| 373 | + return; | ||
| 374 | + } | ||
| 375 | + RegisterValue value; | ||
| 376 | + if (!core_reg_ctx->ReadRegister(err_info_reg, value)) { | ||
| 377 | + return; | ||
| 378 | + } | ||
| 379 | + uint32_t reg_val = value.GetAsUInt32(); | ||
| 380 | + uint8_t is_simt = reg_val & 1; | ||
| 381 | + if (is_simt) { | ||
| 382 | + uint8_t warp_id = (reg_val >> 1) & 0b111111; | ||
| 383 | + Status error = | ||
| 384 | + GetThreadDim(core_reg_ctx, m_summary_info.focus_pos_info.thread_dim); | ||
| 385 | + if (error.Fail()) { | ||
| 386 | + LLDB_LOG(log, "Got threadim failed: {0}", error); | ||
| 387 | + return; | ||
| 388 | + } | ||
| 389 | + FocusToActiveThreadInWarp(warp_id); | ||
| 390 | + } | ||
| 391 | + } | ||
| 260 | } | 392 | } |
| 261 | 393 | ||
| 262 | Status ProcessElfCoreDevice::ParseSection() { | 394 | Status ProcessElfCoreDevice::ParseSection() { |
| @@ -337,11 +469,11 @@ Status ProcessElfCoreDevice::ParseDevTable(const SectionSP& section, ConstString | |||
| 337 | aiv_bitmap1 = aiv_bitmap1 >> 1; | 469 | aiv_bitmap1 = aiv_bitmap1 >> 1; |
| 338 | } | 470 | } |
| 339 | if (!m_summary_info.aic_id.empty()) { | 471 | if (!m_summary_info.aic_id.empty()) { |
| 340 | - m_summary_info.focus_core_id = m_summary_info.aic_id[0]; | 472 | + m_summary_info.focus_pos_info.core_id = m_summary_info.aic_id[0]; |
| 341 | - m_summary_info.focus_core_type = CoreType::AIC; | 473 | + m_summary_info.focus_pos_info.core_type = CoreType::AIC; |
| 342 | } else if (!m_summary_info.aiv_id.empty()) { | 474 | } else if (!m_summary_info.aiv_id.empty()) { |
| 343 | - m_summary_info.focus_core_id = m_summary_info.aiv_id[0]; | 475 | + m_summary_info.focus_pos_info.core_id = m_summary_info.aiv_id[0]; |
| 344 | - m_summary_info.focus_core_type = CoreType::AIV; | 476 | + m_summary_info.focus_pos_info.core_type = CoreType::AIV; |
| 345 | } else { | 477 | } else { |
| 346 | error.SetErrorString("core id is empty"); | 478 | error.SetErrorString("core id is empty"); |
| 347 | } | 479 | } |
| @@ -367,7 +499,8 @@ static Status ParseSingleGlobalAuxInfo(GlobalMemInfo &global_mem_info, | |||
| 367 | return error; | 499 | return error; |
| 368 | } | 500 | } |
| 369 | global_mem_info.reserve = data.GetU16(&offset); | 501 | global_mem_info.reserve = data.GetU16(&offset); |
| 370 | - if (global_mem_info.type == GlobalDataType::STACK) { | 502 | + if (global_mem_info.type == GlobalDataType::STACK || |
| 503 | + global_mem_info.type == GlobalDataType::VF_STACK) { | ||
| 371 | global_mem_info.coreInfo.coreId = data.GetU16(&offset); | 504 | global_mem_info.coreInfo.coreId = data.GetU16(&offset); |
| 372 | } else if (IsTensorType(global_mem_info.type)) { | 505 | } else if (IsTensorType(global_mem_info.type)) { |
| 373 | global_mem_info.shape.dim = data.GetU32(&offset); | 506 | global_mem_info.shape.dim = data.GetU32(&offset); |
| @@ -584,8 +717,9 @@ Status ProcessElfCoreDevice::ParseOneLocalAuxInfo(const SectionSP& section, uint | |||
| 584 | } | 717 | } |
| 585 | LocalMemory local_memory{local_mem_info, 0, true}; | 718 | LocalMemory local_memory{local_mem_info, 0, true}; |
| 586 | if (local_mem_info.type == lldb_private::MemType::DCACHE) { | 719 | if (local_mem_info.type == lldb_private::MemType::DCACHE) { |
| 587 | - if (m_summary_info.global_section_to_memory.find(local_mem_info.global_section_index) | 720 | + if (m_summary_info.global_section_to_memory.find( |
| 588 | - != m_summary_info.global_section_to_memory.end()) { | 721 | + local_mem_info.global_section_index) != |
| 722 | + m_summary_info.global_section_to_memory.end()) { | ||
| 589 | GlobalMemory global_mem = m_summary_info.global_section_to_memory[local_mem_info.global_section_index]; | 723 | GlobalMemory global_mem = m_summary_info.global_section_to_memory[local_mem_info.global_section_index]; |
| 590 | local_memory.addr = global_mem.global_mem_info.addr; | 724 | local_memory.addr = global_mem.global_mem_info.addr; |
| 591 | local_memory.valid = global_mem.valid; | 725 | local_memory.valid = global_mem.valid; |
| @@ -667,12 +801,17 @@ size_t ProcessElfCoreDevice::ReadMemory(lldb::addr_t addr, void *buf, size_t siz | |||
| 667 | size_t ProcessElfCoreDevice::DoReadMemory(addr_t addr, void *buf, size_t size, | 801 | size_t ProcessElfCoreDevice::DoReadMemory(addr_t addr, void *buf, size_t size, |
| 668 | const MemoryReaderParamClient ¶m, Status &error) { | 802 | const MemoryReaderParamClient ¶m, Status &error) { |
| 669 | Log *log = GetLog(LLDBLog::Process); | 803 | Log *log = GetLog(LLDBLog::Process); |
| 670 | - LLDB_LOG(log, "Read memory: addr={0:x}, size={1}, core_id={2}, core_type={3}, address_class={4}", | 804 | + LLDB_LOG(log, |
| 671 | - addr, size, m_summary_info.focus_core_id, static_cast<uint8_t>(m_summary_info.focus_core_type), | 805 | + "Read memory: addr={0:x}, size={1}, core_id={2}, core_type={3}, " |
| 806 | + "address_class={4}", | ||
| 807 | + addr, size, m_summary_info.focus_pos_info.core_id, | ||
| 808 | + static_cast<uint8_t>(m_summary_info.focus_pos_info.core_type), | ||
| 672 | static_cast<uint32_t>(param.address_class)); | 809 | static_cast<uint32_t>(param.address_class)); |
| 673 | MemoryReaderParamClient newParam = param; | 810 | MemoryReaderParamClient newParam = param; |
| 674 | if (param.address_class == DeviceAddressClass::STACK) { | 811 | if (param.address_class == DeviceAddressClass::STACK) { |
| 675 | - addr = TranslateStackVaToDmaAddr(m_summary_info.focus_core_id, m_summary_info.focus_core_type, addr); | 812 | + addr = TranslateStackVaToDmaAddr(m_summary_info.focus_pos_info.core_id, |
| 813 | + m_summary_info.focus_pos_info.core_type, | ||
| 814 | + addr); | ||
| 676 | newParam.address_class = DeviceAddressClass::DCACHE; | 815 | newParam.address_class = DeviceAddressClass::DCACHE; |
| 677 | LLDB_LOG(log, "After translate stack addr, Read stack memory from dcache."); | 816 | LLDB_LOG(log, "After translate stack addr, Read stack memory from dcache."); |
| 678 | } | 817 | } |
| @@ -685,8 +824,11 @@ size_t ProcessElfCoreDevice::DoReadMemory(addr_t addr, void *buf, size_t size, | |||
| 685 | error.SetErrorStringWithFormat( | 824 | error.SetErrorStringWithFormat( |
| 686 | "Memory type is unknown, read memory from coredump file failed, please check command: ascend info summary"); | 825 | "Memory type is unknown, read memory from coredump file failed, please check command: ascend info summary"); |
| 687 | } | 826 | } |
| 688 | - LLDB_LOG(log, "Read memory: addr={0:x}, size={1}, core_id={2}, core_type={3}, address_class={4}, readSize={5}", | 827 | + LLDB_LOG(log, |
| 689 | - addr, size, m_summary_info.focus_core_id, static_cast<uint8_t>(m_summary_info.focus_core_type), | 828 | + "Read memory: addr={0:x}, size={1}, core_id={2}, core_type={3}, " |
| 829 | + "address_class={4}, readSize={5}", | ||
| 830 | + addr, size, m_summary_info.focus_pos_info.core_id, | ||
| 831 | + static_cast<uint8_t>(m_summary_info.focus_pos_info.core_type), | ||
| 690 | static_cast<uint8_t>(newParam.address_class), readSize); | 832 | static_cast<uint8_t>(newParam.address_class), readSize); |
| 691 | return readSize; | 833 | return readSize; |
| 692 | } | 834 | } |
| @@ -701,9 +843,12 @@ size_t ProcessElfCoreDevice::ReadGlobalMemory(DeviceAddressClass address_class, | |||
| 701 | } | 843 | } |
| 702 | } | 844 | } |
| 703 | for (const auto &global_mem : global_mems) { | 845 | for (const auto &global_mem : global_mems) { |
| 704 | - if (addr >= global_mem.global_mem_info.addr && | 846 | + if (addr >= global_mem.global_mem_info.addr && |
| 705 | - global_mem.global_mem_info.addr <= std::numeric_limits<uint64_t>::max() - global_mem.global_mem_info.size && | 847 | + global_mem.global_mem_info.addr <= |
| 706 | - addr < global_mem.global_mem_info.addr + global_mem.global_mem_info.size) { | 848 | + std::numeric_limits<uint64_t>::max() - |
| 849 | + global_mem.global_mem_info.size && | ||
| 850 | + addr < | ||
| 851 | + global_mem.global_mem_info.addr + global_mem.global_mem_info.size) { | ||
| 707 | size = min(size, global_mem.global_mem_info.addr + global_mem.global_mem_info.size - addr); | 852 | size = min(size, global_mem.global_mem_info.addr + global_mem.global_mem_info.size - addr); |
| 708 | if (!global_mem.valid) { | 853 | if (!global_mem.valid) { |
| 709 | error.SetErrorString("this memory data is invalid, please check command: ascend info summary"); | 854 | error.SetErrorString("this memory data is invalid, please check command: ascend info summary"); |
| @@ -713,7 +858,7 @@ size_t ProcessElfCoreDevice::ReadGlobalMemory(DeviceAddressClass address_class, | |||
| 713 | *((uint8_t *)buf + i) = global_mem.data[i + (addr - global_mem.global_mem_info.addr)]; | 858 | *((uint8_t *)buf + i) = global_mem.data[i + (addr - global_mem.global_mem_info.addr)]; |
| 714 | } | 859 | } |
| 715 | return size; | 860 | return size; |
| 716 | - } | 861 | + } |
| 717 | } | 862 | } |
| 718 | error.SetErrorString("addr is not in range, please check command: ascend info summary"); | 863 | error.SetErrorString("addr is not in range, please check command: ascend info summary"); |
| 719 | return 0; | 864 | return 0; |
| @@ -721,12 +866,15 @@ size_t ProcessElfCoreDevice::ReadGlobalMemory(DeviceAddressClass address_class, | |||
| 721 | 866 | ||
| 722 | size_t ProcessElfCoreDevice::ReadLocalMemory(lldb_private::MemType local_data_type, | 867 | size_t ProcessElfCoreDevice::ReadLocalMemory(lldb_private::MemType local_data_type, |
| 723 | addr_t addr, size_t size, void *buf, Status &error) { | 868 | addr_t addr, size_t size, void *buf, Status &error) { |
| 724 | - if (m_summary_info.local_mems.find(m_summary_info.focus_core_id) == m_summary_info.local_mems.end()) { | 869 | + if (m_summary_info.local_mems.find(m_summary_info.focus_pos_info.core_id) == |
| 725 | - error.SetErrorStringWithFormatv( | 870 | + m_summary_info.local_mems.end()) { |
| 726 | - "Focus core id local memory data is not in coredump file, core id is {0}", m_summary_info.focus_core_id); | 871 | + error.SetErrorStringWithFormatv("Focus core id local memory data is not in " |
| 872 | + "coredump file, core id is {0}", | ||
| 873 | + m_summary_info.focus_pos_info.core_id); | ||
| 727 | return 0; | 874 | return 0; |
| 728 | } | 875 | } |
| 729 | - auto mem_info = m_summary_info.local_mems[m_summary_info.focus_core_id]; | 876 | + auto mem_info = |
| 877 | + m_summary_info.local_mems[m_summary_info.focus_pos_info.core_id]; | ||
| 730 | if (mem_info.find(local_data_type) == mem_info.end()) { | 878 | if (mem_info.find(local_data_type) == mem_info.end()) { |
| 731 | error.SetErrorStringWithFormat( | 879 | error.SetErrorStringWithFormat( |
| 732 | "Memory type is not in this core id data, local data type is %s", LocalDataTypeToStr[local_data_type].c_str()); | 880 | "Memory type is not in this core id data, local data type is %s", LocalDataTypeToStr[local_data_type].c_str()); |
| @@ -738,9 +886,11 @@ size_t ProcessElfCoreDevice::ReadLocalMemory(lldb_private::MemType local_data_ty | |||
| 738 | error.SetErrorString("this memory data is invalid, please check command: ascend info summary"); | 886 | error.SetErrorString("this memory data is invalid, please check command: ascend info summary"); |
| 739 | return 0; | 887 | return 0; |
| 740 | } | 888 | } |
| 741 | - if (addr >= local_mem.addr && | 889 | + if (addr >= local_mem.addr && |
| 742 | - local_mem.addr <= std::numeric_limits<uint64_t>::max() - local_mem.local_mem_info.size && | 890 | + local_mem.addr <= std::numeric_limits<uint64_t>::max() - |
| 743 | - addr >= local_mem.addr && addr < local_mem.addr + local_mem.local_mem_info.size) { | 891 | + local_mem.local_mem_info.size && |
| 892 | + addr >= local_mem.addr && | ||
| 893 | + addr < local_mem.addr + local_mem.local_mem_info.size) { | ||
| 744 | size = min(size, local_mem.addr + local_mem.local_mem_info.size - addr); | 894 | size = min(size, local_mem.addr + local_mem.local_mem_info.size - addr); |
| 745 | const uint8_t *src = local_mem.data.data() + (addr - local_mem.addr); | 895 | const uint8_t *src = local_mem.data.data() + (addr - local_mem.addr); |
| 746 | uint8_t *dst = (uint8_t *)buf; | 896 | uint8_t *dst = (uint8_t *)buf; |
| @@ -757,8 +907,8 @@ Status ProcessElfCoreDevice::SetAicOnFocus(const uint32_t &core_id) { | |||
| 757 | // aic core_id is always correct. | 907 | // aic core_id is always correct. |
| 758 | if (find(m_summary_info.aic_id.begin(), m_summary_info.aic_id.end(), | 908 | if (find(m_summary_info.aic_id.begin(), m_summary_info.aic_id.end(), |
| 759 | core_id) != m_summary_info.aic_id.end()) { | 909 | core_id) != m_summary_info.aic_id.end()) { |
| 760 | - m_summary_info.focus_core_id = core_id; | 910 | + m_summary_info.focus_pos_info.core_id = core_id; |
| 761 | - m_summary_info.focus_core_type = CoreType::AIC; | 911 | + m_summary_info.focus_pos_info.core_type = CoreType::AIC; |
| 762 | UpdateStopInfo(); | 912 | UpdateStopInfo(); |
| 763 | } else { | 913 | } else { |
| 764 | error.SetErrorString("Switch AIC failed, please check command: ascend info summary"); | 914 | error.SetErrorString("Switch AIC failed, please check command: ascend info summary"); |
| @@ -772,8 +922,8 @@ Status ProcessElfCoreDevice::SetAivOnFocus(const uint32_t &core_id) { | |||
| 772 | CoreIDType aiv_core_id = core_id + GetMaxAicID(m_summary_info.chip_type); | 922 | CoreIDType aiv_core_id = core_id + GetMaxAicID(m_summary_info.chip_type); |
| 773 | if (find(m_summary_info.aiv_id.begin(), m_summary_info.aiv_id.end(), | 923 | if (find(m_summary_info.aiv_id.begin(), m_summary_info.aiv_id.end(), |
| 774 | aiv_core_id) != m_summary_info.aiv_id.end()) { | 924 | aiv_core_id) != m_summary_info.aiv_id.end()) { |
| 775 | - m_summary_info.focus_core_id = aiv_core_id; | 925 | + m_summary_info.focus_pos_info.core_id = aiv_core_id; |
| 776 | - m_summary_info.focus_core_type = CoreType::AIV; | 926 | + m_summary_info.focus_pos_info.core_type = CoreType::AIV; |
| 777 | UpdateStopInfo(); | 927 | UpdateStopInfo(); |
| 778 | } else { | 928 | } else { |
| 779 | error.SetErrorString("Switch AIV failed, please check command: ascend info summary"); | 929 | error.SetErrorString("Switch AIV failed, please check command: ascend info summary"); |
| @@ -823,28 +973,41 @@ Status ProcessElfCoreDevice::GetCoresInfo(std::vector<CoreInfo> &info) { | |||
| 823 | if (!reg_ctx_sp) { | 973 | if (!reg_ctx_sp) { |
| 824 | error.SetErrorStringWithFormatv("Got empty register context."); | 974 | error.SetErrorStringWithFormatv("Got empty register context."); |
| 825 | } | 975 | } |
| 826 | - auto old_focus_core_id = m_summary_info.focus_core_id; | 976 | + auto old_focus_core_id = m_summary_info.focus_pos_info.core_id; |
| 827 | - auto old_focus_core_type = m_summary_info.focus_core_type; | 977 | + auto old_focus_core_type = m_summary_info.focus_pos_info.core_type; |
| 828 | for (auto core_id: m_summary_info.aic_id) { | 978 | for (auto core_id: m_summary_info.aic_id) { |
| 829 | - m_summary_info.focus_core_id = core_id; | 979 | + m_summary_info.focus_pos_info.core_id = core_id; |
| 830 | - m_summary_info.focus_core_type = CoreType::AIC; | 980 | + m_summary_info.focus_pos_info.core_type = CoreType::AIC; |
| 831 | CoreInfo core_info; | 981 | CoreInfo core_info; |
| 832 | core_info.core_id = core_id; | 982 | core_info.core_id = core_id; |
| 833 | core_info.core_type = CoreType::AIC; | 983 | core_info.core_type = CoreType::AIC; |
| 834 | core_info.pc = reg_ctx_sp->GetPC(UINT64_MAX); | 984 | core_info.pc = reg_ctx_sp->GetPC(UINT64_MAX); |
| 835 | info.push_back(core_info); | 985 | info.push_back(core_info); |
| 836 | } | 986 | } |
| 987 | + Log *log = GetLog(LLDBLog::Process); | ||
| 837 | for (auto core_id: m_summary_info.aiv_id) { | 988 | for (auto core_id: m_summary_info.aiv_id) { |
| 838 | - m_summary_info.focus_core_id = core_id; | 989 | + m_summary_info.focus_pos_info.core_id = core_id; |
| 839 | - m_summary_info.focus_core_type = CoreType::AIV; | 990 | + m_summary_info.focus_pos_info.core_type = CoreType::AIV; |
| 840 | CoreInfo core_info; | 991 | CoreInfo core_info; |
| 841 | core_info.core_id = core_id - GetMaxAicID(m_summary_info.chip_type); | 992 | core_info.core_id = core_id - GetMaxAicID(m_summary_info.chip_type); |
| 842 | core_info.core_type = CoreType::AIV; | 993 | core_info.core_type = CoreType::AIV; |
| 843 | core_info.pc = reg_ctx_sp->GetPC(UINT64_MAX); | 994 | core_info.pc = reg_ctx_sp->GetPC(UINT64_MAX); |
| 995 | + core_info.pos_type = GetPosType(reg_ctx_sp); | ||
| 996 | + if (core_info.pos_type == InterruptPosType::VEC_INTERRUPT_SIMT) { | ||
| 997 | + ThreadDim thread_dim{}; | ||
| 998 | + error = GetThreadDim(reg_ctx_sp, thread_dim); | ||
| 999 | + if (error.Success()) { | ||
| 1000 | + core_info.thread_dim_x = thread_dim.x; | ||
| 1001 | + core_info.thread_dim_y = thread_dim.y; | ||
| 1002 | + core_info.thread_dim_z = thread_dim.z; | ||
| 1003 | + } else { | ||
| 1004 | + LLDB_LOG(log, "Get thread dim failed: {0}", error); | ||
| 1005 | + } | ||
| 1006 | + } | ||
| 844 | info.push_back(core_info); | 1007 | info.push_back(core_info); |
| 845 | } | 1008 | } |
| 846 | - m_summary_info.focus_core_id = old_focus_core_id; | 1009 | + m_summary_info.focus_pos_info.core_id = old_focus_core_id; |
| 847 | - m_summary_info.focus_core_type = old_focus_core_type; | 1010 | + m_summary_info.focus_pos_info.core_type = old_focus_core_type; |
| 848 | return error; | 1011 | return error; |
| 849 | } | 1012 | } |
| 850 | 1013 | ||
| @@ -856,4 +1019,58 @@ Status ProcessElfCoreDevice::GetKernelInfo(KernelInfo &info) { | |||
| 856 | return error; | 1019 | return error; |
| 857 | } | 1020 | } |
| 858 | 1021 | ||
| 1022 | +Status ProcessElfCoreDevice::GetWarpsInfo(std::vector<WarpInfo> &info) { | ||
| 1023 | + Status error; | ||
| 1024 | + ThreadSP thread_sp = GetThreadList().GetSelectedThread(); | ||
| 1025 | + if (!thread_sp) { | ||
| 1026 | + error.SetErrorStringWithFormatv("Got empty thread."); | ||
| 1027 | + return error; | ||
| 1028 | + } | ||
| 1029 | + RegisterContextSP reg_ctx_sp = thread_sp->GetRegisterContext(); | ||
| 1030 | + if (!reg_ctx_sp) { | ||
| 1031 | + error.SetErrorStringWithFormatv("Got empty register context."); | ||
| 1032 | + return error; | ||
| 1033 | + } | ||
| 1034 | + ThreadDim thread_dim; | ||
| 1035 | + error = GetThreadDim(reg_ctx_sp, thread_dim); | ||
| 1036 | + if (error.Fail()) { | ||
| 1037 | + error.SetErrorStringWithFormatv("GetThreadDim failed: {0}", error); | ||
| 1038 | + return error; | ||
| 1039 | + } | ||
| 1040 | + Log *log = GetLog(LLDBLog::Process); | ||
| 1041 | + LLDB_LOG(log, "Get thread_dim=({0},{1},{2})", thread_dim.x, thread_dim.y, | ||
| 1042 | + thread_dim.z); | ||
| 1043 | + constexpr uint16_t max_thread_num = 64 * 32; | ||
| 1044 | + if (1ULL * thread_dim.x * thread_dim.y * thread_dim.z > max_thread_num) { | ||
| 1045 | + error.SetErrorStringWithFormatv( | ||
| 1046 | + "Invalid thread dim:({0},{1},{2}), Their product is > {3}.", | ||
| 1047 | + thread_dim.x, thread_dim.y, thread_dim.z, max_thread_num); | ||
| 1048 | + return error; | ||
| 1049 | + } | ||
| 1050 | + uint8_t warp_num = (thread_dim.x * thread_dim.y * thread_dim.z + 31) / 32; | ||
| 1051 | + auto old_thread_pos = m_summary_info.focus_pos_info.thread_pos; | ||
| 1052 | + info.clear(); | ||
| 1053 | + for (uint8_t warp_id = 0; warp_id < warp_num; warp_id++) { | ||
| 1054 | + m_summary_info.focus_pos_info.thread_pos = | ||
| 1055 | + LinearIdxToThreadPos(warp_id * 32U, thread_dim); | ||
| 1056 | + WarpInfo warp_info{}; | ||
| 1057 | + warp_info.warp_id = warp_id; | ||
| 1058 | + warp_info.core_id = m_summary_info.focus_pos_info.core_id - | ||
| 1059 | + GetMaxAicID(m_summary_info.chip_type); | ||
| 1060 | + warp_info.warp_num = warp_num; | ||
| 1061 | + RegisterValue value; | ||
| 1062 | + const auto *reg_info = reg_ctx_sp->GetRegisterInfoByName("EXECMASK"); | ||
| 1063 | + if (reg_info && reg_ctx_sp->ReadRegister(reg_info, value)) { | ||
| 1064 | + warp_info.exec_mask = value.GetAsUInt32(); | ||
| 1065 | + } | ||
| 1066 | + reg_info = reg_ctx_sp->GetRegisterInfoByName("SIMT_PC"); | ||
| 1067 | + if (reg_info && reg_ctx_sp->ReadRegister(reg_info, value)) { | ||
| 1068 | + warp_info.simt_pc = value.GetAsUInt64(); | ||
| 1069 | + } | ||
| 1070 | + info.push_back(warp_info); | ||
| 1071 | + } | ||
| 1072 | + m_summary_info.focus_pos_info.thread_pos = old_thread_pos; | ||
| 1073 | + return error; | ||
| 1074 | +} | ||
| 1075 | + | ||
| 859 | 1076 | ||
| @@ -50,7 +50,9 @@ public: | |||
| 50 | DataExtractor GetAuxvData() override; | 50 | DataExtractor GetAuxvData() override; |
| 51 | 51 | ||
| 52 | Status GetCoresInfo(std::vector<CoreInfo> &info) override; | 52 | Status GetCoresInfo(std::vector<CoreInfo> &info) override; |
| 53 | - | 53 | + |
| 54 | + Status GetWarpsInfo(std::vector<WarpInfo> &info) override; | ||
| 55 | + | ||
| 54 | // Update which pipe_err we got, depends on register values. | 56 | // Update which pipe_err we got, depends on register values. |
| 55 | void UpdateStopInfo(bool focus_known_error_core = false) override; | 57 | void UpdateStopInfo(bool focus_known_error_core = false) override; |
| 56 | 58 | ||
| @@ -87,6 +89,12 @@ private: | |||
| 87 | 89 | ||
| 88 | void FocusToAnyKnownErrorAiCore(); | 90 | void FocusToAnyKnownErrorAiCore(); |
| 89 | 91 | ||
| 92 | + Status GetThreadDim(lldb::RegisterContextSP reg_ctx_sp, device_core::ThreadDim &thread_dim); | ||
| 93 | + | ||
| 94 | + void FocusToActiveThreadInWarp(uint8_t warp_id); | ||
| 95 | + | ||
| 96 | + InterruptPosType GetPosType(lldb::RegisterContextSP reg_ctx_sp); | ||
| 97 | + | ||
| 90 | private: | 98 | private: |
| 91 | device_core::SummaryInfo m_summary_info; | 99 | device_core::SummaryInfo m_summary_info; |
| 92 | SectionList m_section_list; | 100 | SectionList m_section_list; |
| @@ -40,15 +40,16 @@ RegisterContextPOSIXCore_ascend::RegisterContextPOSIXCore_ascend( | |||
| 40 | m_register_info(std::move(register_info)) {} | 40 | m_register_info(std::move(register_info)) {} |
| 41 | 41 | ||
| 42 | // Extract mask0 bits from reg_value, and replace mask1 bits in pc with those bits. | 42 | // Extract mask0 bits from reg_value, and replace mask1 bits in pc with those bits. |
| 43 | -inline void ReplacePCBit(uint32_t reg_value, uint32_t mask0, uint32_t mask1, uint64_t &pc) { | 43 | +inline void ReplacePCBit(uint32_t reg_value, uint64_t mask0, uint64_t mask1, |
| 44 | + uint64_t &pc) { | ||
| 44 | Log *log = GetLog(LLDBLog::Thread); | 45 | Log *log = GetLog(LLDBLog::Thread); |
| 45 | - if (__builtin_popcount(mask0) != __builtin_popcount(mask1)) { | 46 | + if (__builtin_popcountll(mask0) != __builtin_popcountll(mask1)) { |
| 46 | LLDB_LOG(log, "Internel error: invalid mask, stop replacing, please check err_info_reg map table define."); | 47 | LLDB_LOG(log, "Internel error: invalid mask, stop replacing, please check err_info_reg map table define."); |
| 47 | return; | 48 | return; |
| 48 | } | 49 | } |
| 49 | - uint32_t pc0 = reg_value & mask0; | 50 | + uint64_t pc0 = reg_value & mask0; |
| 50 | - uint32_t l0 = __builtin_ctz(mask0); | 51 | + uint64_t l0 = __builtin_ctzll(mask0); |
| 51 | - uint32_t l1 = __builtin_ctz(mask1); | 52 | + uint64_t l1 = __builtin_ctzll(mask1); |
| 52 | if (l0 > l1) { | 53 | if (l0 > l1) { |
| 53 | pc0 >>= (l0 - l1); | 54 | pc0 >>= (l0 - l1); |
| 54 | } else { | 55 | } else { |
| @@ -56,7 +57,7 @@ inline void ReplacePCBit(uint32_t reg_value, uint32_t mask0, uint32_t mask1, uin | |||
| 56 | } | 57 | } |
| 57 | pc = (pc & ~(1ULL * mask1)) | pc0; | 58 | pc = (pc & ~(1ULL * mask1)) | pc0; |
| 58 | } | 59 | } |
| 59 | - | 60 | + |
| 60 | void RegisterContextPOSIXCore_ascend::FixPCByErrorInfoReg( | 61 | void RegisterContextPOSIXCore_ascend::FixPCByErrorInfoReg( |
| 61 | const ErrRegMask &err_map, uint64_t &pc) { | 62 | const ErrRegMask &err_map, uint64_t &pc) { |
| 62 | Log *log = GetLog(LLDBLog::Thread); | 63 | Log *log = GetLog(LLDBLog::Thread); |
| @@ -76,10 +77,9 @@ void RegisterContextPOSIXCore_ascend::FixPCByErrorInfoReg( | |||
| 76 | } | 77 | } |
| 77 | } | 78 | } |
| 78 | 79 | ||
| 79 | -bool RegisterContextPOSIXCore_ascend::CheckAicErrorRegisterIsValid(size_t num_registers, | 80 | +bool RegisterContextPOSIXCore_ascend::CheckAicErrorRegisterIsValid( |
| 80 | - const vector<vector<ErrRegMask>> *error_table, | 81 | + size_t num_registers, const vector<vector<ErrRegMask>> *error_table, |
| 81 | - const RegisterSet *const reg_set, | 82 | + const RegisterSet *const reg_set, ErrRegMask &err_reg_mask) { |
| 82 | - ErrRegMask &err_reg_mask) { | ||
| 83 | uint32_t reg_num = 0; | 83 | uint32_t reg_num = 0; |
| 84 | Log *log = GetLog(LLDBLog::Thread); | 84 | Log *log = GetLog(LLDBLog::Thread); |
| 85 | for (size_t reg_idx = 0; reg_idx < num_registers; ++reg_idx) { | 85 | for (size_t reg_idx = 0; reg_idx < num_registers; ++reg_idx) { |
| @@ -90,7 +90,8 @@ bool RegisterContextPOSIXCore_ascend::CheckAicErrorRegisterIsValid(size_t num_re | |||
| 90 | continue; | 90 | continue; |
| 91 | } | 91 | } |
| 92 | uint32_t err_u32_value = err_reg_value.GetAsUInt32(); | 92 | uint32_t err_u32_value = err_reg_value.GetAsUInt32(); |
| 93 | - LLDB_LOG(log, "Got aic_err_{0} register value={1:x}.", reg_idx, err_u32_value); | 93 | + LLDB_LOG(log, "Got {0} register value={1:x}.", reg_info->name, |
| 94 | + err_u32_value); | ||
| 94 | for (const auto &err_map: (*error_table)[reg_idx]) { | 95 | for (const auto &err_map: (*error_table)[reg_idx]) { |
| 95 | if ((err_u32_value & err_map.mask) == 0) | 96 | if ((err_u32_value & err_map.mask) == 0) |
| 96 | continue; | 97 | continue; |
| @@ -122,8 +123,8 @@ string RegisterContextPOSIXCore_ascend::GetStopErrorRegister() { | |||
| 122 | if (string(reg_set->short_name) != "aic_err_reg") { | 123 | if (string(reg_set->short_name) != "aic_err_reg") { |
| 123 | continue; | 124 | continue; |
| 124 | } | 125 | } |
| 125 | - LLDB_LOG(log, "Got aic_err_reg set."); | ||
| 126 | const size_t num_registers = reg_set->num_registers; | 126 | const size_t num_registers = reg_set->num_registers; |
| 127 | + LLDB_LOG_ONCE(log, "Got aic_err_reg set, num={0}.", num_registers); | ||
| 127 | ErrRegMask err_reg_mask; | 128 | ErrRegMask err_reg_mask; |
| 128 | if (!CheckAicErrorRegisterIsValid(num_registers, error_table, reg_set, err_reg_mask)) { | 129 | if (!CheckAicErrorRegisterIsValid(num_registers, error_table, reg_set, err_reg_mask)) { |
| 129 | LLDB_LOG(log, "There are different error type in AIC_ERROR_X register" | 130 | LLDB_LOG(log, "There are different error type in AIC_ERROR_X register" |
| @@ -181,11 +182,11 @@ void RegisterContextPOSIXCore_ascend::FixPC(uint64_t &pc) { | |||
| 181 | } | 182 | } |
| 182 | 183 | ||
| 183 | Status RegisterContextPOSIXCore_ascend::ReadRegister( | 184 | Status RegisterContextPOSIXCore_ascend::ReadRegister( |
| 184 | - uint64_t addr, const RegisterInfo* reg_info, | 185 | + uint64_t addr, const RegisterInfo *reg_info, uint32_t core_id, |
| 185 | - uint32_t core_id, CoreType core_type, RegisterValue &value) const { | 186 | + CoreType core_type, RegisterValue &value) const { |
| 186 | Status error; | 187 | Status error; |
| 187 | const auto& summary_info = *m_summary_info; | 188 | const auto& summary_info = *m_summary_info; |
| 188 | - const auto data_index = summary_info.focus_core_id; | 189 | + const auto data_index = summary_info.focus_pos_info.core_id; |
| 189 | if (summary_info.reg_data.find(data_index) == summary_info.reg_data.end() || | 190 | if (summary_info.reg_data.find(data_index) == summary_info.reg_data.end() || |
| 190 | summary_info.reg_data.at(data_index).find(addr) == | 191 | summary_info.reg_data.at(data_index).find(addr) == |
| 191 | summary_info.reg_data.at(data_index).end()) { | 192 | summary_info.reg_data.at(data_index).end()) { |
| @@ -200,8 +201,16 @@ Status RegisterContextPOSIXCore_ascend::ReadRegister( | |||
| 200 | reg_info->name, addr, data_index); | 201 | reg_info->name, addr, data_index); |
| 201 | return error; | 202 | return error; |
| 202 | } | 203 | } |
| 204 | + Log *log = GetLog(LLDBLog::Thread); | ||
| 203 | const auto &core_reg_info = summary_info.reg_data.at(data_index).at(addr); | 205 | const auto &core_reg_info = summary_info.reg_data.at(data_index).at(addr); |
| 204 | - value.SetBytes(core_reg_info->GetValue(), core_reg_info->reg_size, lldb::eByteOrderLittle); | 206 | + if (core_reg_info->reg_size < reg_info->byte_size) { |
| 207 | + LLDB_LOG( | ||
| 208 | + log, | ||
| 209 | + "Warning: for reg {0}, core file byte size={1}<expect byte size={1}", | ||
| 210 | + reg_info->name, core_reg_info->reg_size, reg_info->byte_size); | ||
| 211 | + } | ||
| 212 | + value.SetFromMemoryData(*reg_info, core_reg_info->GetValue(), | ||
| 213 | + reg_info->byte_size, lldb::eByteOrderLittle, error); | ||
| 205 | return error; | 214 | return error; |
| 206 | } | 215 | } |
| 207 | 216 | ||
| @@ -214,14 +223,16 @@ bool RegisterContextPOSIXCore_ascend::ReadRegister(const RegisterInfo *reg_info, | |||
| 214 | if (reg_info && reg_info->kinds[lldb::eRegisterKindLLDB] < register_map.size()) { | 223 | if (reg_info && reg_info->kinds[lldb::eRegisterKindLLDB] < register_map.size()) { |
| 215 | const auto *reg_name = reg_info->name; | 224 | const auto *reg_name = reg_info->name; |
| 216 | uint64_t addr; | 225 | uint64_t addr; |
| 217 | - Status error = m_register_info->GetRegisterAddr(reg_name, m_summary_info->focus_core_type, addr); | 226 | + Status error = m_register_info->GetRegisterAddr( |
| 227 | + reg_name, m_summary_info->focus_pos_info.core_type, | ||
| 228 | + m_summary_info->focus_pos_info.pos_type, addr); | ||
| 218 | if (error.Fail()) { | 229 | if (error.Fail()) { |
| 219 | LLDB_LOG(log, "Get addr for register_name={0} failed", reg_name); | 230 | LLDB_LOG(log, "Get addr for register_name={0} failed", reg_name); |
| 220 | return false; | 231 | return false; |
| 221 | } | 232 | } |
| 222 | // added pos_info; | 233 | // added pos_info; |
| 223 | InterruptPosInfo pos_info{}; | 234 | InterruptPosInfo pos_info{}; |
| 224 | - pos_info.core_type = m_summary_info->focus_core_type; | 235 | + pos_info.core_type = m_summary_info->focus_pos_info.core_type; |
| 225 | error = m_register_info->ReadRegister(reg_info, pos_info, this, value); | 236 | error = m_register_info->ReadRegister(reg_info, pos_info, this, value); |
| 226 | if (error.Fail()) { | 237 | if (error.Fail()) { |
| 227 | LLDB_LOG(log, "Read register {0} failed: {1}", reg_name, error); | 238 | LLDB_LOG(log, "Read register {0} failed: {1}", reg_name, error); |
| @@ -229,10 +240,10 @@ bool RegisterContextPOSIXCore_ascend::ReadRegister(const RegisterInfo *reg_info, | |||
| 229 | } | 240 | } |
| 230 | // use error register to fix pc | 241 | // use error register to fix pc |
| 231 | if (reg_info->kinds[lldb::eRegisterKindGeneric] == LLDB_REGNUM_GENERIC_PC) { | 242 | if (reg_info->kinds[lldb::eRegisterKindGeneric] == LLDB_REGNUM_GENERIC_PC) { |
| 232 | - uint64_t pc = value.GetAsUInt64(); | 243 | + uint64_t pc = value.GetAsUInt64(); |
| 233 | - FixPC(pc); | 244 | + FixPC(pc); |
| 234 | - LLDB_LOG(log, "Update pc from {0:x} to {1:x}", value.GetAsUInt64(), pc); | 245 | + LLDB_LOG(log, "Update pc from {0:x} to {1:x}", value.GetAsUInt64(), pc); |
| 235 | - value.SetUInt64(pc); | 246 | + value.SetUInt64(pc); |
| 236 | } | 247 | } |
| 237 | } else { | 248 | } else { |
| 238 | return false; | 249 | return false; |
| @@ -2541,11 +2541,11 @@ StateType ProcessGDBRemote::SetThreadStopInfo(StringExtractor &stop_packet) { | |||
| 2541 | } else if (key.compare("kernel_name") == 0) { | 2541 | } else if (key.compare("kernel_name") == 0) { |
| 2542 | stop_info.kernel_name = value.str(); | 2542 | stop_info.kernel_name = value.str(); |
| 2543 | }else if (key.compare("thread_x") == 0) { | 2543 | }else if (key.compare("thread_x") == 0) { |
| 2544 | - value.getAsInteger(16, stop_info.thread_idx_x); | 2544 | + value.getAsInteger(16, stop_info.thread_pos.x); |
| 2545 | } else if (key.compare("thread_y") == 0) { | 2545 | } else if (key.compare("thread_y") == 0) { |
| 2546 | - value.getAsInteger(16, stop_info.thread_idx_y); | 2546 | + value.getAsInteger(16, stop_info.thread_pos.y); |
| 2547 | } else if (key.compare("thread_z") == 0) { | 2547 | } else if (key.compare("thread_z") == 0) { |
| 2548 | - value.getAsInteger(16, stop_info.thread_idx_z); | 2548 | + value.getAsInteger(16, stop_info.thread_pos.z); |
| 2549 | } else if (key.compare("soc_type") == 0) { | 2549 | } else if (key.compare("soc_type") == 0) { |
| 2550 | int integer_value; | 2550 | int integer_value; |
| 2551 | if(!value.getAsInteger(RADIX_HEX, integer_value)) { | 2551 | if(!value.getAsInteger(RADIX_HEX, integer_value)) { |
| @@ -2959,7 +2959,7 @@ Status ProcessGDBRemote::FlashErase(lldb::addr_t addr, size_t size) { | |||
| 2959 | return status; | 2959 | return status; |
| 2960 | 2960 | ||
| 2961 | // The gdb spec doesn't say if erasures are allowed across multiple regions, | 2961 | // The gdb spec doesn't say if erasures are allowed across multiple regions, |
| 2962 | - // but we'll disallow it to be safe and to keep the logic simple by worring | 2962 | + // but we'll disallow it to be safe and to keep the logic simple by worrying |
| 2963 | // about only one region's block size. DoMemoryWrite is this function's | 2963 | // about only one region's block size. DoMemoryWrite is this function's |
| 2964 | // primary user, and it can easily keep writes within a single memory region | 2964 | // primary user, and it can easily keep writes within a single memory region |
| 2965 | if (addr + size > region.GetRange().GetRangeEnd()) { | 2965 | if (addr + size > region.GetRange().GetRangeEnd()) { |
| @@ -4475,7 +4475,7 @@ static FieldEnum::Enumerators ParseEnumEvalues(const XMLNode &enum_node) { | |||
| 4475 | Log *log(GetLog(GDBRLog::Process)); | 4475 | Log *log(GetLog(GDBRLog::Process)); |
| 4476 | // We will use the last instance of each value. Also we preserve the order | 4476 | // We will use the last instance of each value. Also we preserve the order |
| 4477 | // of declaration in the XML, as it may not be numerical. | 4477 | // of declaration in the XML, as it may not be numerical. |
| 4478 | - // For example, hardware may intially release with two states that softwware | 4478 | + // For example, hardware may initially release with two states that softwware |
| 4479 | // can read from a register field: | 4479 | // can read from a register field: |
| 4480 | // 0 = startup, 1 = running | 4480 | // 0 = startup, 1 = running |
| 4481 | // If in a future hardware release, the designers added a pre-startup state: | 4481 | // If in a future hardware release, the designers added a pre-startup state: |
| @@ -6585,9 +6585,9 @@ bool Process::IsStopInSimtKernel() { | |||
| 6585 | } | 6585 | } |
| 6586 | for (uint32_t i = 0; i < infos.size(); ++i) { | 6586 | for (uint32_t i = 0; i < infos.size(); ++i) { |
| 6587 | CoreInfo core_info = infos[i]; | 6587 | CoreInfo core_info = infos[i]; |
| 6588 | - if (core_info.core_id == m_device_stop_info.core_id && | 6588 | + if (core_info.core_id == m_device_stop_info.core_id && |
| 6589 | core_info.core_type == m_device_stop_info.core_type) { | 6589 | core_info.core_type == m_device_stop_info.core_type) { |
| 6590 | - return core_info.pos_type == InterruptPosType::STARS_VEC_INTERRUPT_SIMT; | 6590 | + return core_info.pos_type == InterruptPosType::VEC_INTERRUPT_SIMT; |
| 6591 | } | 6591 | } |
| 6592 | } | 6592 | } |
| 6593 | return false; | 6593 | return false; |
| @@ -6610,7 +6610,7 @@ void Process::ShowDeviceStopInfoCached(Stream &stream) { | |||
| 6610 | } else { | 6610 | } else { |
| 6611 | core_type_str = "unknown"; | 6611 | core_type_str = "unknown"; |
| 6612 | } | 6612 | } |
| 6613 | - | 6613 | + |
| 6614 | std::string name = GetSimpleKernelName(m_device_stop_info.kernel_name); | 6614 | std::string name = GetSimpleKernelName(m_device_stop_info.kernel_name); |
| 6615 | if (name.empty()) { | 6615 | if (name.empty()) { |
| 6616 | stream.Printf("[Switching to focus on CoreId %u, Type %s]\n", | 6616 | stream.Printf("[Switching to focus on CoreId %u, Type %s]\n", |
| @@ -6619,8 +6619,8 @@ void Process::ShowDeviceStopInfoCached(Stream &stream) { | |||
| 6619 | if (IsStopInSimtKernel()) { | 6619 | if (IsStopInSimtKernel()) { |
| 6620 | stream.Printf("[Switching to focus on Kernel %s, CoreId %u, Type %s, Thread (%u, %u, %u)]\n", | 6620 | stream.Printf("[Switching to focus on Kernel %s, CoreId %u, Type %s, Thread (%u, %u, %u)]\n", |
| 6621 | name.c_str(), m_device_stop_info.core_id, | 6621 | name.c_str(), m_device_stop_info.core_id, |
| 6622 | - core_type_str.c_str(), m_device_stop_info.thread_idx_x, | 6622 | + core_type_str.c_str(), m_device_stop_info.thread_pos.x, |
| 6623 | - m_device_stop_info.thread_idx_y, m_device_stop_info.thread_idx_z); | 6623 | + m_device_stop_info.thread_pos.y, m_device_stop_info.thread_pos.z); |
| 6624 | }else { | 6624 | }else { |
| 6625 | stream.Printf("[Switching to focus on Kernel %s, CoreId %u, Type %s]\n", | 6625 | stream.Printf("[Switching to focus on Kernel %s, CoreId %u, Type %s]\n", |
| 6626 | name.c_str(), m_device_stop_info.core_id, | 6626 | name.c_str(), m_device_stop_info.core_id, |
| @@ -6645,7 +6645,7 @@ void Process::RefreshStopReason(lldb::ThreadSP &threadSp) { | |||
| 6645 | return; | 6645 | return; |
| 6646 | } | 6646 | } |
| 6647 | if (m_single_core_mode) { | 6647 | if (m_single_core_mode) { |
| 6648 | - std::string key = std::to_string(static_cast<uint8_t>(m_device_stop_info.core_type)) | 6648 | + std::string key = std::to_string(static_cast<uint8_t>(m_device_stop_info.core_type)) |
| 6649 | + '_' + std::to_string(m_device_stop_info.core_id); | 6649 | + '_' + std::to_string(m_device_stop_info.core_id); |
| 6650 | m_device_core_stop_reason[key] = reason; | 6650 | m_device_core_stop_reason[key] = reason; |
| 6651 | } else { | 6651 | } else { |
| @@ -30,7 +30,7 @@ | |||
| 30 | 30 | ||
| 31 | 31 | ||
| 32 | 32 | ||
| 33 | - | 33 | + |
| 34 | using namespace lldb; | 34 | using namespace lldb; |
| 35 | using namespace lldb_private; | 35 | using namespace lldb_private; |
| 36 | using namespace lldb_private::process_linux; | 36 | using namespace lldb_private::process_linux; |
| @@ -46,15 +46,6 @@ public: | |||
| 46 | Status Init() override { return Status(); } | 46 | Status Init() override { return Status(); } |
| 47 | bool StartListenThread() override { return true; } | 47 | bool StartListenThread() override { return true; } |
| 48 | Status EnableDebugMode() override { return Status(); } | 48 | Status EnableDebugMode() override { return Status(); } |
| 49 | - | ||
| 50 | - Status GetRegisterAddr(const llvm::StringRef reg_name, | ||
| 51 | - CoreType core_type, uint64_t &addr) override { | ||
| 52 | - return Status("Not implemented"); | ||
| 53 | - } | ||
| 54 | - Status GetRegisterList(std::vector<std::string> ®_list, | ||
| 55 | - CoreType core_type) override { | ||
| 56 | - return Status("Not implemented"); | ||
| 57 | - } | ||
| 58 | Status CheckRegisterAddr(CoreType core_type, uint64_t addr) const override { | 49 | Status CheckRegisterAddr(CoreType core_type, uint64_t addr) const override { |
| 59 | return Status(); | 50 | return Status(); |
| 60 | } | 51 | } |
| @@ -104,14 +95,14 @@ public: | |||
| 104 | EXPECT_CALL(*fake_system_func, open(_, _)).WillRepeatedly(__real_open); | 95 | EXPECT_CALL(*fake_system_func, open(_, _)).WillRepeatedly(__real_open); |
| 105 | EXPECT_CALL(*fake_system_func, ioctl(_, _, _)).WillRepeatedly(__real_ioctl); | 96 | EXPECT_CALL(*fake_system_func, ioctl(_, _, _)).WillRepeatedly(__real_ioctl); |
| 106 | } | 97 | } |
| 107 | - | 98 | + |
| 108 | virtual void TearDown() { | 99 | virtual void TearDown() { |
| 109 | fake_system_func.reset(); | 100 | fake_system_func.reset(); |
| 110 | } | 101 | } |
| 111 | - | 102 | + |
| 112 | static std::unique_ptr<FakeSystemCallFunc> fake_system_func; | 103 | static std::unique_ptr<FakeSystemCallFunc> fake_system_func; |
| 113 | }; | 104 | }; |
| 114 | - | 105 | + |
| 115 | std::unique_ptr<FakeSystemCallFunc> AscendProcessLinuxTest::fake_system_func; | 106 | std::unique_ptr<FakeSystemCallFunc> AscendProcessLinuxTest::fake_system_func; |
| 116 | 107 | ||
| 117 | extern "C" | 108 | extern "C" |
| @@ -121,15 +112,15 @@ extern "C" | |||
| 121 | return AscendProcessLinuxTest::fake_system_func->open(a, b); | 112 | return AscendProcessLinuxTest::fake_system_func->open(a, b); |
| 122 | } else { | 113 | } else { |
| 123 | return __real_open(a, b); | 114 | return __real_open(a, b); |
| 124 | - } | 115 | + } |
| 125 | } | 116 | } |
| 126 | - | 117 | + |
| 127 | int __wrap_ioctl(int a, unsigned long int b, DebugInfo &c) { | 118 | int __wrap_ioctl(int a, unsigned long int b, DebugInfo &c) { |
| 128 | if (AscendProcessLinuxTest::fake_system_func) { | 119 | if (AscendProcessLinuxTest::fake_system_func) { |
| 129 | return AscendProcessLinuxTest::fake_system_func->ioctl(a, b, c); | 120 | return AscendProcessLinuxTest::fake_system_func->ioctl(a, b, c); |
| 130 | } else { | 121 | } else { |
| 131 | return __real_ioctl(a, b, c); | 122 | return __real_ioctl(a, b, c); |
| 132 | - } | 123 | + } |
| 133 | } | 124 | } |
| 134 | } | 125 | } |
| 135 | 126 | ||
| @@ -196,6 +187,6 @@ TEST_F(AscendProcessLinuxTest, SetBreakpoint) { | |||
| 196 | uint32_t size = 8; | 187 | uint32_t size = 8; |
| 197 | EXPECT_THAT_ERROR(process->SetBreakpoint(addr, size, llvm::Triple::ArchType::hiipu64, false). | 188 | EXPECT_THAT_ERROR(process->SetBreakpoint(addr, size, llvm::Triple::ArchType::hiipu64, false). |
| 198 | ToError(), llvm::Succeeded()); | 189 | ToError(), llvm::Succeeded()); |
| 199 | -} | 190 | +} |
| 200 | 191 | ||
| 201 | 192 | ||