已合并
cleancode #2235
AtomGit-Bot创建于 2025年3月6日
cleancode #2235
已合并
从refs/pull/2235/head合入到master
共 11 个文件变更+908-829
| @@ -30,209 +30,225 @@ at::Tensor& clamp_out_npu_nocheck( | |||
| 30 | at::Tensor& result, | 30 | at::Tensor& result, |
| 31 | const at::Tensor& self, | 31 | const at::Tensor& self, |
| 32 | at::Scalar min, | 32 | at::Scalar min, |
| 33 | - at::Scalar max) { | 33 | + at::Scalar max) |
| 34 | - at_npu::native::OpCommand cmd; | 34 | +{ |
| 35 | - cmd.Name("ClipByValueV2") | 35 | + at_npu::native::OpCommand cmd; |
| 36 | - .Input(self) | 36 | + cmd.Name("ClipByValueV2") |
| 37 | - .Input(min, self.scalar_type()) | 37 | + .Input(self) |
| 38 | - .Input(max, self.scalar_type()) | 38 | + .Input(min, self.scalar_type()) |
| 39 | - .Output(result) | 39 | + .Input(max, self.scalar_type()) |
| 40 | - .Run(); | 40 | + .Output(result) |
| 41 | - return result; | 41 | + .Run(); |
| 42 | + return result; | ||
| 42 | } | 43 | } |
| 43 | 44 | ||
| 44 | at::Tensor& clamp_min_out_npu_nocheck( | 45 | at::Tensor& clamp_min_out_npu_nocheck( |
| 45 | at::Tensor& result, | 46 | at::Tensor& result, |
| 46 | const at::Tensor& self, | 47 | const at::Tensor& self, |
| 47 | - at::Scalar min) { | 48 | + at::Scalar min) |
| 48 | - // Set max according to self.dtype() | 49 | +{ |
| 49 | - at::Scalar max; | 50 | + // Set max according to self.dtype() |
| 50 | - if (self.dtype() == at::kInt || self.dtype() == at::kLong) { | 51 | + at::Scalar max; |
| 51 | - max = INT_MAX; | 52 | + if (self.dtype() == at::kInt || self.dtype() == at::kLong) { |
| 52 | - } else if (self.dtype() == at::kFloat) { | 53 | + max = INT_MAX; |
| 53 | - max = FLT_MAX; | 54 | + } else if (self.dtype() == at::kFloat) { |
| 54 | - } else { | 55 | + max = FLT_MAX; |
| 55 | - max = NPU_HALF_MAX; | 56 | + } else { |
| 56 | - } | 57 | + max = NPU_HALF_MAX; |
| 57 | - clamp_out_npu_nocheck(result, self, min, max); | 58 | + } |
| 58 | - return result; | 59 | + clamp_out_npu_nocheck(result, self, min, max); |
| 60 | + return result; | ||
| 59 | } | 61 | } |
| 60 | 62 | ||
| 61 | at::Tensor& clamp_max_out_npu_nocheck( | 63 | at::Tensor& clamp_max_out_npu_nocheck( |
| 62 | at::Tensor& result, | 64 | at::Tensor& result, |
| 63 | const at::Tensor& self, | 65 | const at::Tensor& self, |
| 64 | - at::Scalar max) { | 66 | + at::Scalar max) |
| 65 | - // Set max according to self.dtype() | 67 | +{ |
| 66 | - at::Scalar min; | 68 | + // Set max according to self.dtype() |
| 67 | - if (self.dtype() == at::kInt || self.dtype() == at::kLong) { | 69 | + at::Scalar min; |
| 68 | - min = INT_MIN; | 70 | + if (self.dtype() == at::kInt || self.dtype() == at::kLong) { |
| 69 | - } else if (self.dtype() == at::kFloat) { | 71 | + min = INT_MIN; |
| 70 | - min = -FLT_MAX; | 72 | + } else if (self.dtype() == at::kFloat) { |
| 71 | - } else { | 73 | + min = -FLT_MAX; |
| 72 | - min = NPU_HALF_MIN; | 74 | + } else { |
| 73 | - } | 75 | + min = NPU_HALF_MIN; |
| 74 | - clamp_out_npu_nocheck(result, self, min, max); | 76 | + } |
| 75 | - return result; | 77 | + clamp_out_npu_nocheck(result, self, min, max); |
| 78 | + return result; | ||
| 76 | } | 79 | } |
| 77 | 80 | ||
| 78 | at::Tensor& clamp_out_npu_nocheck( | 81 | at::Tensor& clamp_out_npu_nocheck( |
| 79 | at::Tensor& result, | 82 | at::Tensor& result, |
| 80 | const at::Tensor& self, | 83 | const at::Tensor& self, |
| 81 | const at::Tensor& min, | 84 | const at::Tensor& min, |
| 82 | - const at::Tensor& max) { | 85 | + const at::Tensor& max) |
| 83 | - at_npu::native::OpCommand cmd; | 86 | +{ |
| 84 | - cmd.Name("ClipByValueV2") | 87 | + at_npu::native::OpCommand cmd; |
| 85 | - .Input(self) | 88 | + cmd.Name("ClipByValueV2") |
| 86 | - .Input(min) | 89 | + .Input(self) |
| 87 | - .Input(max) | 90 | + .Input(min) |
| 88 | - .Output(result) | 91 | + .Input(max) |
| 89 | - .Run(); | 92 | + .Output(result) |
| 90 | - return result; | 93 | + .Run(); |
| 94 | + return result; | ||
| 91 | } | 95 | } |
| 92 | 96 | ||
| 93 | // clamp.Tensor | 97 | // clamp.Tensor |
| 94 | at::Tensor& clamp_min_out_npu_nocheck( | 98 | at::Tensor& clamp_min_out_npu_nocheck( |
| 95 | at::Tensor& result, | 99 | at::Tensor& result, |
| 96 | const at::Tensor& self, | 100 | const at::Tensor& self, |
| 97 | - const at::Tensor& min) { | 101 | + const at::Tensor& min) |
| 98 | - at::Tensor max; | 102 | +{ |
| 99 | - at::Tensor ones_tensor = at::ones(self.sizes(), self.options()); | 103 | + at::Tensor max; |
| 100 | - if (self.dtype() == at::kInt || self.dtype() == at::kLong) { | 104 | + at::Tensor ones_tensor = at::ones(self.sizes(), self.options()); |
| 101 | - max = ones_tensor * INT_MAX; | 105 | + if (self.dtype() == at::kInt || self.dtype() == at::kLong) { |
| 102 | - } else if (self.dtype() == at::kFloat) { | 106 | + max = ones_tensor * INT_MAX; |
| 103 | - max = ones_tensor * FLT_MAX; | 107 | + } else if (self.dtype() == at::kFloat) { |
| 104 | - } else { | 108 | + max = ones_tensor * FLT_MAX; |
| 105 | - max = ones_tensor * NPU_HALF_MAX; | 109 | + } else { |
| 106 | - } | 110 | + max = ones_tensor * NPU_HALF_MAX; |
| 107 | - return clamp_out_npu_nocheck(result, self, min, max); | 111 | + } |
| 112 | + return clamp_out_npu_nocheck(result, self, min, max); | ||
| 108 | } | 113 | } |
| 109 | 114 | ||
| 110 | at::Tensor& clamp_max_out_npu_nocheck( | 115 | at::Tensor& clamp_max_out_npu_nocheck( |
| 111 | at::Tensor& result, | 116 | at::Tensor& result, |
| 112 | const at::Tensor& self, | 117 | const at::Tensor& self, |
| 113 | - const at::Tensor& max) { | 118 | + const at::Tensor& max) |
| 114 | - // Set min according to self.dtype() | 119 | +{ |
| 115 | - at::Tensor min; | 120 | + // Set min according to self.dtype() |
| 116 | - at::Tensor ones_tensor = at::ones(self.sizes(), self.options()); | 121 | + at::Tensor min; |
| 117 | - if (self.dtype() == at::kInt || self.dtype() == at::kLong) { | 122 | + at::Tensor ones_tensor = at::ones(self.sizes(), self.options()); |
| 118 | - min = ones_tensor * INT_MIN; | 123 | + if (self.dtype() == at::kInt || self.dtype() == at::kLong) { |
| 119 | - } else if (self.dtype() == at::kFloat) { | 124 | + min = ones_tensor * INT_MIN; |
| 120 | - min = ones_tensor * (-FLT_MAX); | 125 | + } else if (self.dtype() == at::kFloat) { |
| 121 | - } else { | 126 | + min = ones_tensor * (-FLT_MAX); |
| 122 | - min = ones_tensor * NPU_HALF_MIN; | 127 | + } else { |
| 123 | - } | 128 | + min = ones_tensor * NPU_HALF_MIN; |
| 124 | - return clamp_out_npu_nocheck(result, self, min, max); | 129 | + } |
| 130 | + return clamp_out_npu_nocheck(result, self, min, max); | ||
| 125 | } | 131 | } |
| 126 | } // namespace | 132 | } // namespace |
| 127 | 133 | ||
| 128 | at::Tensor& clamp_min_out( | 134 | at::Tensor& clamp_min_out( |
| 129 | const at::Tensor& self, | 135 | const at::Tensor& self, |
| 130 | const at::Scalar& min, | 136 | const at::Scalar& min, |
| 131 | - at::Tensor& result) { | 137 | + at::Tensor& result) |
| 132 | - npu_preparation::CheckOut( | 138 | +{ |
| 133 | - {self}, | 139 | + npu_preparation::CheckOut( |
| 134 | - result, | 140 | + {self}, |
| 135 | - self); | 141 | + result, |
| 136 | - if (!npu_utils::check_match(&result)) { | 142 | + self); |
| 137 | - at::Tensor contiguous_result = npu_utils::format_contiguous(result); | 143 | + if (!npu_utils::check_match(&result)) { |
| 138 | - clamp_min_out_npu_nocheck(contiguous_result, self, min); | 144 | + at::Tensor contiguous_result = npu_utils::format_contiguous(result); |
| 139 | - npu_utils::format_fresh_view(result, contiguous_result); | 145 | + clamp_min_out_npu_nocheck(contiguous_result, self, min); |
| 140 | - } else { | 146 | + npu_utils::format_fresh_view(result, contiguous_result); |
| 141 | - clamp_min_out_npu_nocheck(result, self, min); | 147 | + } else { |
| 142 | - } | 148 | + clamp_min_out_npu_nocheck(result, self, min); |
| 143 | - return result; | 149 | + } |
| 150 | + return result; | ||
| 144 | } | 151 | } |
| 145 | 152 | ||
| 146 | at::Tensor& clamp_max_out( | 153 | at::Tensor& clamp_max_out( |
| 147 | const at::Tensor& self, | 154 | const at::Tensor& self, |
| 148 | const at::Scalar& max, | 155 | const at::Scalar& max, |
| 149 | - at::Tensor& result) { | 156 | + at::Tensor& result) |
| 150 | - npu_preparation::CheckOut( | 157 | +{ |
| 151 | - {self}, | 158 | + npu_preparation::CheckOut( |
| 152 | - result, | 159 | + {self}, |
| 153 | - self); | 160 | + result, |
| 154 | - if (!npu_utils::check_match(&result)) { | 161 | + self); |
| 155 | - at::Tensor contiguous_result = npu_utils::format_contiguous(result); | 162 | + if (!npu_utils::check_match(&result)) { |
| 156 | - clamp_max_out_npu_nocheck(contiguous_result, self, max); | 163 | + at::Tensor contiguous_result = npu_utils::format_contiguous(result); |
| 157 | - npu_utils::format_fresh_view(result, contiguous_result); | 164 | + clamp_max_out_npu_nocheck(contiguous_result, self, max); |
| 158 | - } else { | 165 | + npu_utils::format_fresh_view(result, contiguous_result); |
| 159 | - clamp_max_out_npu_nocheck(result, self, max); | 166 | + } else { |
| 160 | - } | 167 | + clamp_max_out_npu_nocheck(result, self, max); |
| 161 | - return result; | 168 | + } |
| 169 | + return result; | ||
| 162 | } | 170 | } |
| 163 | 171 | ||
| 164 | at::Tensor& clamp_out( | 172 | at::Tensor& clamp_out( |
| 165 | const at::Tensor& self, | 173 | const at::Tensor& self, |
| 166 | const c10::optional<at::Scalar>& min, | 174 | const c10::optional<at::Scalar>& min, |
| 167 | const c10::optional<at::Scalar>& max, | 175 | const c10::optional<at::Scalar>& max, |
| 168 | - at::Tensor& result) { | 176 | + at::Tensor& result) |
| 169 | - TORCH_CHECK(min.has_value() || max.has_value(), "torch.clamp: At least one of 'min' or 'max' must not be None" | 177 | +{ |
| 170 | - + OPS_ERROR(ErrCode::VALUE)); | 178 | + TORCH_CHECK(min.has_value() || max.has_value(), "torch.clamp: At least one of 'min' or 'max' must not be None" |
| 171 | - if (!min.has_value()) { | 179 | + + OPS_ERROR(ErrCode::VALUE)); |
| 172 | - at::Scalar max_value = max.value(); | 180 | + if (!min.has_value()) { |
| 173 | - return acl_op::clamp_max_out(self, max_value, result); | 181 | + at::Scalar max_value = max.value(); |
| 174 | - } else if (!max.has_value()) { | 182 | + return acl_op::clamp_max_out(self, max_value, result); |
| 175 | - at::Scalar min_value = min.value(); | 183 | + } else if (!max.has_value()) { |
| 176 | - return acl_op::clamp_min_out(self, min_value, result); | 184 | + at::Scalar min_value = min.value(); |
| 177 | - } else { | 185 | + return acl_op::clamp_min_out(self, min_value, result); |
| 178 | - at::Scalar min_value = min.value(); | ||
| 179 | - at::Scalar max_value = max.value(); | ||
| 180 | - npu_preparation::CheckOut( | ||
| 181 | - {self}, | ||
| 182 | - result, | ||
| 183 | - self); | ||
| 184 | - if (!npu_utils::check_match(&result)) { | ||
| 185 | - at::Tensor contiguous_result = npu_utils::format_contiguous(result); | ||
| 186 | - clamp_out_npu_nocheck(contiguous_result, self, min_value, max_value); | ||
| 187 | - npu_utils::format_fresh_view(result, contiguous_result); | ||
| 188 | } else { | 186 | } else { |
| 189 | - clamp_out_npu_nocheck(result, self, min_value, max_value); | 187 | + at::Scalar min_value = min.value(); |
| 188 | + at::Scalar max_value = max.value(); | ||
| 189 | + npu_preparation::CheckOut( | ||
| 190 | + {self}, | ||
| 191 | + result, | ||
| 192 | + self); | ||
| 193 | + if (!npu_utils::check_match(&result)) { | ||
| 194 | + at::Tensor contiguous_result = npu_utils::format_contiguous(result); | ||
| 195 | + clamp_out_npu_nocheck(contiguous_result, self, min_value, max_value); | ||
| 196 | + npu_utils::format_fresh_view(result, contiguous_result); | ||
| 197 | + } else { | ||
| 198 | + clamp_out_npu_nocheck(result, self, min_value, max_value); | ||
| 199 | + } | ||
| 200 | + return result; | ||
| 190 | } | 201 | } |
| 191 | - return result; | ||
| 192 | - } | ||
| 193 | } | 202 | } |
| 194 | 203 | ||
| 195 | -at::Tensor clamp_min(const at::Tensor& self, const at::Scalar& min) { | 204 | +at::Tensor clamp_min(const at::Tensor& self, const at::Scalar& min) |
| 196 | - at::Tensor result = npu_preparation::apply_tensor(self); | 205 | +{ |
| 197 | - return acl_op::clamp_min_out(self, min, result); | 206 | + at::Tensor result = npu_preparation::apply_tensor(self); |
| 207 | + return acl_op::clamp_min_out(self, min, result); | ||
| 198 | } | 208 | } |
| 199 | 209 | ||
| 200 | -at::Tensor& clamp_min_(at::Tensor& self, const at::Scalar& min) { | 210 | +at::Tensor& clamp_min_(at::Tensor& self, const at::Scalar& min) |
| 201 | - return acl_op::clamp_min_out(self, min, self); | 211 | +{ |
| 212 | + return acl_op::clamp_min_out(self, min, self); | ||
| 202 | } | 213 | } |
| 203 | 214 | ||
| 204 | -at::Tensor clamp_max(const at::Tensor& self, const at::Scalar& max) { | 215 | +at::Tensor clamp_max(const at::Tensor& self, const at::Scalar& max) |
| 205 | - at::Tensor result = npu_preparation::apply_tensor(self); | 216 | +{ |
| 206 | - return acl_op::clamp_max_out(self, max, result); | 217 | + at::Tensor result = npu_preparation::apply_tensor(self); |
| 218 | + return acl_op::clamp_max_out(self, max, result); | ||
| 207 | } | 219 | } |
| 208 | 220 | ||
| 209 | -at::Tensor& clamp_max_(at::Tensor& self, const at::Scalar& max) { | 221 | +at::Tensor& clamp_max_(at::Tensor& self, const at::Scalar& max) |
| 210 | - return acl_op::clamp_max_out(self, max, self); | 222 | +{ |
| 223 | + return acl_op::clamp_max_out(self, max, self); | ||
| 211 | } | 224 | } |
| 212 | 225 | ||
| 213 | at::Tensor clamp( | 226 | at::Tensor clamp( |
| 214 | const at::Tensor& self, | 227 | const at::Tensor& self, |
| 215 | const c10::optional<at::Scalar>& min, | 228 | const c10::optional<at::Scalar>& min, |
| 216 | - const c10::optional<at::Scalar>& max) { | 229 | + const c10::optional<at::Scalar>& max) |
| 217 | - at::Tensor result = npu_preparation::apply_tensor(self); | 230 | +{ |
| 218 | - return acl_op::clamp_out(self, min, max, result); | 231 | + at::Tensor result = npu_preparation::apply_tensor(self); |
| 232 | + return acl_op::clamp_out(self, min, max, result); | ||
| 219 | } | 233 | } |
| 220 | 234 | ||
| 221 | at::Tensor& clamp_( | 235 | at::Tensor& clamp_( |
| 222 | at::Tensor& self, | 236 | at::Tensor& self, |
| 223 | const c10::optional<at::Scalar>& min, | 237 | const c10::optional<at::Scalar>& min, |
| 224 | - const c10::optional<at::Scalar>& max) { | 238 | + const c10::optional<at::Scalar>& max) |
| 225 | - return acl_op::clamp_out(self, min, max, self); | 239 | +{ |
| 240 | + return acl_op::clamp_out(self, min, max, self); | ||
| 226 | } | 241 | } |
| 227 | 242 | ||
| 228 | at::Tensor& clamp_min_out( | 243 | at::Tensor& clamp_min_out( |
| 229 | const at::Tensor& self, | 244 | const at::Tensor& self, |
| 230 | const at::Tensor& min, | 245 | const at::Tensor& min, |
| 231 | - at::Tensor& result) { | 246 | + at::Tensor& result) |
| 247 | +{ | ||
| 232 | auto high_dtype = at::native::result_type(self, min); | 248 | auto high_dtype = at::native::result_type(self, min); |
| 233 | auto result_dtype = result.scalar_type(); | 249 | auto result_dtype = result.scalar_type(); |
| 234 | TORCH_CHECK(canCast(high_dtype, result_dtype), | 250 | TORCH_CHECK(canCast(high_dtype, result_dtype), |
| 235 | - "result type ", high_dtype, " can't be cast to the desired output type ", result_dtype, OPS_ERROR(ErrCode::TYPE)); | 251 | + "result type ", high_dtype, " can't be cast to the desired output type ", result_dtype, OPS_ERROR(ErrCode::TYPE)); |
| 236 | TORCH_CHECK(result_dtype != at::kBool, "'clamp_npu' not implemented for 'Bool'" + OPS_ERROR(ErrCode::TYPE)); | 252 | TORCH_CHECK(result_dtype != at::kBool, "'clamp_npu' not implemented for 'Bool'" + OPS_ERROR(ErrCode::TYPE)); |
| 237 | 253 | ||
| 238 | at::Tensor self_cp = self.scalar_type() == result_dtype ? self : at_npu::native::custom_ops::npu_dtype_cast(self, result_dtype); | 254 | at::Tensor self_cp = self.scalar_type() == result_dtype ? self : at_npu::native::custom_ops::npu_dtype_cast(self, result_dtype); |
| @@ -257,14 +273,15 @@ at::Tensor& clamp_min_out( | |||
| 257 | at::Tensor& clamp_max_out( | 273 | at::Tensor& clamp_max_out( |
| 258 | const at::Tensor& self, | 274 | const at::Tensor& self, |
| 259 | const at::Tensor& max, | 275 | const at::Tensor& max, |
| 260 | - at::Tensor& result) { | 276 | + at::Tensor& result) |
| 277 | +{ | ||
| 261 | auto high_dtype = at::native::result_type(self, max); | 278 | auto high_dtype = at::native::result_type(self, max); |
| 262 | auto result_dtype = result.scalar_type(); | 279 | auto result_dtype = result.scalar_type(); |
| 263 | TORCH_CHECK(canCast(high_dtype, result_dtype), | 280 | TORCH_CHECK(canCast(high_dtype, result_dtype), |
| 264 | - "result type ", high_dtype, " can't be cast to the desired output type ", result_dtype, | 281 | + "result type ", high_dtype, " can't be cast to the desired output type ", result_dtype, |
| 265 | - OPS_ERROR(ErrCode::TYPE)); | 282 | + OPS_ERROR(ErrCode::TYPE)); |
| 266 | TORCH_CHECK(result_dtype != at::kBool, "'clamp_npu' not implemented for 'Bool'" | 283 | TORCH_CHECK(result_dtype != at::kBool, "'clamp_npu' not implemented for 'Bool'" |
| 267 | - + OPS_ERROR(ErrCode::TYPE)); | 284 | + + OPS_ERROR(ErrCode::TYPE)); |
| 268 | 285 | ||
| 269 | at::Tensor self_cp = self.scalar_type() == result_dtype ? self : at_npu::native::custom_ops::npu_dtype_cast(self, result_dtype); | 286 | at::Tensor self_cp = self.scalar_type() == result_dtype ? self : at_npu::native::custom_ops::npu_dtype_cast(self, result_dtype); |
| 270 | at::Tensor max_cp = max.scalar_type() == result_dtype ? max : at_npu::native::custom_ops::npu_dtype_cast(max, result_dtype); | 287 | at::Tensor max_cp = max.scalar_type() == result_dtype ? max : at_npu::native::custom_ops::npu_dtype_cast(max, result_dtype); |
| @@ -289,9 +306,10 @@ at::Tensor& clamp_out( | |||
| 289 | const at::Tensor& self, | 306 | const at::Tensor& self, |
| 290 | const c10::optional<at::Tensor>& min, | 307 | const c10::optional<at::Tensor>& min, |
| 291 | const c10::optional<at::Tensor>& max, | 308 | const c10::optional<at::Tensor>& max, |
| 292 | - at::Tensor& result) { | 309 | + at::Tensor& result) |
| 310 | +{ | ||
| 293 | TORCH_CHECK(min.has_value() || max.has_value(), "torch.clamp: At least one of 'min' or 'max' must not be None" | 311 | TORCH_CHECK(min.has_value() || max.has_value(), "torch.clamp: At least one of 'min' or 'max' must not be None" |
| 294 | - + OPS_ERROR(ErrCode::VALUE)); | 312 | + + OPS_ERROR(ErrCode::VALUE)); |
| 295 | if (!min.has_value()) { | 313 | if (!min.has_value()) { |
| 296 | const at::Tensor& max_value = max.value(); | 314 | const at::Tensor& max_value = max.value(); |
| 297 | return acl_op::clamp_max_out(self, max_value, result); | 315 | return acl_op::clamp_max_out(self, max_value, result); |
| @@ -305,10 +323,10 @@ at::Tensor& clamp_out( | |||
| 305 | auto high_dtype = at::native::result_type(tensors); | 323 | auto high_dtype = at::native::result_type(tensors); |
| 306 | auto result_dtype = result.scalar_type(); | 324 | auto result_dtype = result.scalar_type(); |
| 307 | TORCH_CHECK(canCast(high_dtype, result_dtype), | 325 | TORCH_CHECK(canCast(high_dtype, result_dtype), |
| 308 | - "result type ", high_dtype, " can't be cast to the desired output type ", result_dtype, | 326 | + "result type ", high_dtype, " can't be cast to the desired output type ", result_dtype, |
| 309 | - OPS_ERROR(ErrCode::TYPE)); | 327 | + OPS_ERROR(ErrCode::TYPE)); |
| 310 | TORCH_CHECK(result_dtype != at::kBool, "'clamp_npu' not implemented for 'Bool'" | 328 | TORCH_CHECK(result_dtype != at::kBool, "'clamp_npu' not implemented for 'Bool'" |
| 311 | - + OPS_ERROR(ErrCode::TYPE)); | 329 | + + OPS_ERROR(ErrCode::TYPE)); |
| 312 | 330 | ||
| 313 | at::Tensor self_cp = self.scalar_type() == result_dtype ? self : | 331 | at::Tensor self_cp = self.scalar_type() == result_dtype ? self : |
| 314 | at_npu::native::custom_ops::npu_dtype_cast(self, result_dtype); | 332 | at_npu::native::custom_ops::npu_dtype_cast(self, result_dtype); |
| @@ -337,36 +355,42 @@ at::Tensor& clamp_out( | |||
| 337 | } | 355 | } |
| 338 | } | 356 | } |
| 339 | 357 | ||
| 340 | -at::Tensor clamp_min(const at::Tensor& self, const at::Tensor& min) { | 358 | +at::Tensor clamp_min(const at::Tensor& self, const at::Tensor& min) |
| 341 | - at::Tensor result = npu_preparation::apply_tensor(self); | 359 | +{ |
| 342 | - return acl_op::clamp_min_out(self, min, result); | 360 | + at::Tensor result = npu_preparation::apply_tensor(self); |
| 361 | + return acl_op::clamp_min_out(self, min, result); | ||
| 343 | } | 362 | } |
| 344 | 363 | ||
| 345 | -at::Tensor& clamp_min_(at::Tensor& self, const at::Tensor& min) { | 364 | +at::Tensor& clamp_min_(at::Tensor& self, const at::Tensor& min) |
| 346 | - return acl_op::clamp_min_out(self, min, self); | 365 | +{ |
| 366 | + return acl_op::clamp_min_out(self, min, self); | ||
| 347 | } | 367 | } |
| 348 | 368 | ||
| 349 | -at::Tensor clamp_max(const at::Tensor& self, const at::Tensor& max) { | 369 | +at::Tensor clamp_max(const at::Tensor& self, const at::Tensor& max) |
| 350 | - at::Tensor result = npu_preparation::apply_tensor(self); | 370 | +{ |
| 351 | - return acl_op::clamp_max_out(self, max, result); | 371 | + at::Tensor result = npu_preparation::apply_tensor(self); |
| 372 | + return acl_op::clamp_max_out(self, max, result); | ||
| 352 | } | 373 | } |
| 353 | 374 | ||
| 354 | -at::Tensor& clamp_max_(at::Tensor& self, const at::Tensor& max) { | 375 | +at::Tensor& clamp_max_(at::Tensor& self, const at::Tensor& max) |
| 355 | - return acl_op::clamp_max_out(self, max, self); | 376 | +{ |
| 377 | + return acl_op::clamp_max_out(self, max, self); | ||
| 356 | } | 378 | } |
| 357 | 379 | ||
| 358 | at::Tensor clamp( | 380 | at::Tensor clamp( |
| 359 | const at::Tensor& self, | 381 | const at::Tensor& self, |
| 360 | const c10::optional<at::Tensor>& min, | 382 | const c10::optional<at::Tensor>& min, |
| 361 | - const c10::optional<at::Tensor>& max) { | 383 | + const c10::optional<at::Tensor>& max) |
| 362 | - at::Tensor result = npu_preparation::apply_tensor(self); | 384 | +{ |
| 363 | - return acl_op::clamp_out(self, min, max, result); | 385 | + at::Tensor result = npu_preparation::apply_tensor(self); |
| 386 | + return acl_op::clamp_out(self, min, max, result); | ||
| 364 | } | 387 | } |
| 365 | 388 | ||
| 366 | at::Tensor& clamp_( | 389 | at::Tensor& clamp_( |
| 367 | at::Tensor& self, | 390 | at::Tensor& self, |
| 368 | const c10::optional<at::Tensor>& min, | 391 | const c10::optional<at::Tensor>& min, |
| 369 | - const c10::optional<at::Tensor>& max) { | 392 | + const c10::optional<at::Tensor>& max) |
| 370 | - return acl_op::clamp_out(self, min, max, self); | 393 | +{ |
| 394 | + return acl_op::clamp_out(self, min, max, self); | ||
| 371 | } | 395 | } |
| 372 | } // namespace acl_op | 396 | } // namespace acl_op |
| @@ -29,121 +29,127 @@ at::Tensor& dropout_do_mask_with_byte_mask( | |||
| 29 | at::Tensor& result, | 29 | at::Tensor& result, |
| 30 | const at::Tensor& self, | 30 | const at::Tensor& self, |
| 31 | const at::Tensor& mask, | 31 | const at::Tensor& mask, |
| 32 | - at::Scalar prob) { | 32 | + at::Scalar prob) |
| 33 | - at_npu::native::OpCommand cmd; | 33 | +{ |
| 34 | - cmd.Name("DropOutDoMaskV3") | 34 | + at_npu::native::OpCommand cmd; |
| 35 | - .Input(self) | 35 | + cmd.Name("DropOutDoMaskV3") |
| 36 | - .Input(mask) | 36 | + .Input(self) |
| 37 | - .Input(prob, self.scalar_type(), npu_compile_type::MEMORY_HOST_COMPILE_DEPENDENT) | 37 | + .Input(mask) |
| 38 | - .Output(result) | 38 | + .Input(prob, self.scalar_type(), npu_compile_type::MEMORY_HOST_COMPILE_DEPENDENT) |
| 39 | - .Run(); | 39 | + .Output(result) |
| 40 | - return result; | 40 | + .Run(); |
| 41 | + return result; | ||
| 41 | } | 42 | } |
| 42 | 43 | ||
| 43 | -at::Tensor dropout_gen_byte_mask(const at::Tensor& self, at::Scalar prob) { | 44 | +at::Tensor dropout_gen_byte_mask(const at::Tensor& self, at::Scalar prob) |
| 44 | - at::IntArrayRef self_shape = self.sizes(); | 45 | +{ |
| 45 | - at::Tensor mask = npu_preparation::apply_tensor_with_format( | 46 | + at::IntArrayRef self_shape = self.sizes(); |
| 46 | - self_shape, | 47 | + at::Tensor mask = npu_preparation::apply_tensor_with_format( |
| 47 | - self.options().dtype(at::kByte), | 48 | + self_shape, |
| 48 | - ACL_FORMAT_ND); | 49 | + self.options().dtype(at::kByte), |
| 49 | - at_npu::native::OpCommand cmd; | 50 | + ACL_FORMAT_ND); |
| 50 | - // If either seed or seed2 are set to be non-zero, the random number generator | 51 | + at_npu::native::OpCommand cmd; |
| 51 | - // is seeded by the given seed. Otherwise, it is seeded by a random seed. | 52 | + // If either seed or seed2 are set to be non-zero, the random number generator |
| 52 | - // DropOutGenMaskV3 use seed and seed2 to generator a seed, like this: | 53 | + // is seeded by the given seed. Otherwise, it is seeded by a random seed. |
| 53 | - // seed2 seed | 54 | + // DropOutGenMaskV3 use seed and seed2 to generator a seed, like this: |
| 54 | - // 127~64 63~0 | 55 | + // seed2 seed |
| 55 | - // so, we set seed2 = 0 to ensure the seed which user set is equal to the seed | 56 | + // 127~64 63~0 |
| 56 | - // used by the operator DropOutGenMaskV3 | 57 | + // so, we set seed2 = 0 to ensure the seed which user set is equal to the seed |
| 57 | - const auto gen = at_npu::detail::getDefaultNPUGenerator(); | 58 | + // used by the operator DropOutGenMaskV3 |
| 58 | - const int64_t seed = static_cast<int64_t>(gen.current_seed()); | 59 | + const auto gen = at_npu::detail::getDefaultNPUGenerator(); |
| 59 | - const int64_t seed2 = 0; | 60 | + const int64_t seed = static_cast<int64_t>(gen.current_seed()); |
| 60 | - cmd.Name("DropOutGenMaskV3") | 61 | + const int64_t seed2 = 0; |
| 61 | - .Input(self_shape) | 62 | + cmd.Name("DropOutGenMaskV3") |
| 62 | - .Input(prob, self.scalar_type(), npu_compile_type::MEMORY_HOST_COMPILE_DEPENDENT) | 63 | + .Input(self_shape) |
| 63 | - .Output(mask) | 64 | + .Input(prob, self.scalar_type(), npu_compile_type::MEMORY_HOST_COMPILE_DEPENDENT) |
| 64 | - .Attr("seed", seed) | 65 | + .Output(mask) |
| 65 | - .Attr("seed2", seed2) | 66 | + .Attr("seed", seed) |
| 66 | - .Run(); | 67 | + .Attr("seed2", seed2) |
| 67 | - return mask; | 68 | + .Run(); |
| 69 | + return mask; | ||
| 68 | } | 70 | } |
| 69 | 71 | ||
| 70 | std::tuple<at::Tensor, at::Tensor> dropout_out_nocheck( | 72 | std::tuple<at::Tensor, at::Tensor> dropout_out_nocheck( |
| 71 | at::Tensor result, | 73 | at::Tensor result, |
| 72 | const at::Tensor& self, | 74 | const at::Tensor& self, |
| 73 | - double p) { | 75 | + double p) |
| 74 | - at::Tensor self_cp = npu_utils::format_contiguous(self); | 76 | +{ |
| 75 | - TORCH_CHECK( | 77 | + at::Tensor self_cp = npu_utils::format_contiguous(self); |
| 76 | - p >= 0 && p <= 1, | 78 | + TORCH_CHECK( |
| 77 | - "dropout probability has to be between 0 and 1, but got ", p, | 79 | + p >= 0 && p <= 1, |
| 78 | - OPS_ERROR(ErrCode::VALUE)); | 80 | + "dropout probability has to be between 0 and 1, but got ", p, |
| 79 | - TORCH_CHECK( | 81 | + OPS_ERROR(ErrCode::VALUE)); |
| 80 | - at::isFloatingType(self_cp.scalar_type()), | 82 | + TORCH_CHECK( |
| 81 | - "dropout only supports floating-point dtypes" + OPS_ERROR(ErrCode::TYPE)); | 83 | + at::isFloatingType(self_cp.scalar_type()), |
| 84 | + "dropout only supports floating-point dtypes" + OPS_ERROR(ErrCode::TYPE)); | ||
| 82 | 85 | ||
| 83 | - double retain = 1. - p; | 86 | + double retain = 1. - p; |
| 84 | - at::Scalar prob = at::Scalar(retain); | 87 | + at::Scalar prob = at::Scalar(retain); |
| 85 | - at::Tensor mask; | 88 | + at::Tensor mask; |
| 86 | - auto original_stream = c10_npu::getCurrentNPUStream(); | 89 | + auto original_stream = c10_npu::getCurrentNPUStream(); |
| 87 | - { | 90 | + { |
| 88 | - // During the life cycle of this raii instance, the calcu stream is set as the | 91 | + // During the life cycle of this raii instance, the calcu stream is set as the |
| 89 | - // secondary stream, and tasks are distributed to the secondary stream. At the | 92 | + // secondary stream, and tasks are distributed to the secondary stream. At the |
| 90 | - // same time, according to the one-stream-one-pool principle, memory is also | 93 | + // same time, according to the one-stream-one-pool principle, memory is also |
| 91 | - // alloced from the pool of the secondary stream. | 94 | + // alloced from the pool of the secondary stream. |
| 92 | - c10_npu::SecondaryStreamGuard guard(c10_npu::getCurrentSecondaryStream()); | 95 | + c10_npu::SecondaryStreamGuard guard(c10_npu::getCurrentSecondaryStream()); |
| 93 | - mask = dropout_gen_byte_mask(self_cp, prob); | 96 | + mask = dropout_gen_byte_mask(self_cp, prob); |
| 94 | - } | 97 | + } |
| 95 | - // When tasks on multiple streams read and write the same block of memory, | 98 | + // When tasks on multiple streams read and write the same block of memory, |
| 96 | - // recordStream needs to be called to ensure the correctness of memory reuse. | 99 | + // recordStream needs to be called to ensure the correctness of memory reuse. |
| 97 | - c10_npu::NPUCachingAllocator::recordStream(mask.storage().data_ptr(), original_stream); | 100 | + c10_npu::NPUCachingAllocator::recordStream(mask.storage().data_ptr(), original_stream); |
| 98 | - dropout_do_mask_with_byte_mask(result, self_cp, mask, prob); | 101 | + dropout_do_mask_with_byte_mask(result, self_cp, mask, prob); |
| 99 | 102 | ||
| 100 | - return std::tie(result, mask); | 103 | + return std::tie(result, mask); |
| 101 | } | 104 | } |
| 102 | } // namespace | 105 | } // namespace |
| 103 | 106 | ||
| 104 | at::Tensor _dropout_with_byte_mask_backward( | 107 | at::Tensor _dropout_with_byte_mask_backward( |
| 105 | const at::Tensor& grad_output, | 108 | const at::Tensor& grad_output, |
| 106 | const at::Tensor& mask, | 109 | const at::Tensor& mask, |
| 107 | - double scale) { | 110 | + double p) |
| 108 | - TORCH_CHECK( | 111 | +{ |
| 109 | - at::isFloatingType(grad_output.scalar_type()), | 112 | + TORCH_CHECK( |
| 110 | - "dropoutbackward only supports floating-point dtypes" + OPS_ERROR(ErrCode::TYPE)); | 113 | + at::isFloatingType(grad_output.scalar_type()), |
| 111 | - TORCH_CHECK( | 114 | + "dropoutbackward only supports floating-point dtypes" + OPS_ERROR(ErrCode::TYPE)); |
| 112 | - mask.scalar_type() == at::ScalarType::Byte, | 115 | + TORCH_CHECK( |
| 113 | - "mask should be torch.uint8 dtype" + OPS_ERROR(ErrCode::TYPE)); | 116 | + mask.scalar_type() == at::ScalarType::Byte, |
| 114 | - double retain = 1. - scale; | 117 | + "mask should be torch.uint8 dtype" + OPS_ERROR(ErrCode::TYPE)); |
| 115 | - at::Tensor result = npu_preparation::apply_tensor(grad_output); | 118 | + double retain = 1. - p; |
| 119 | + at::Tensor result = npu_preparation::apply_tensor(grad_output); | ||
| 116 | 120 | ||
| 117 | - at_npu::native::OpCommand cmd; | 121 | + at_npu::native::OpCommand cmd; |
| 118 | - cmd.Name("DropOutDoMaskV3") | 122 | + cmd.Name("DropOutDoMaskV3") |
| 119 | - .Input(grad_output) | 123 | + .Input(grad_output) |
| 120 | - .Input(mask) | 124 | + .Input(mask) |
| 121 | - .Input(at::Scalar(retain), grad_output.scalar_type(), npu_compile_type::MEMORY_HOST_COMPILE_DEPENDENT) | 125 | + .Input(at::Scalar(retain), grad_output.scalar_type(), npu_compile_type::MEMORY_HOST_COMPILE_DEPENDENT) |
| 122 | - .Output(result) | 126 | + .Output(result) |
| 123 | - .Run(); | 127 | + .Run(); |
| 124 | 128 | ||
| 125 | - return result; | 129 | + return result; |
| 126 | } | 130 | } |
| 127 | 131 | ||
| 128 | std::tuple<at::Tensor, at::Tensor> _dropout_with_byte_mask( | 132 | std::tuple<at::Tensor, at::Tensor> _dropout_with_byte_mask( |
| 129 | const at::Tensor& self, | 133 | const at::Tensor& self, |
| 130 | - double p) { | 134 | + double p) |
| 131 | - at::Tensor result = npu_preparation::apply_tensor(self); | 135 | +{ |
| 132 | - return dropout_out_nocheck(result, self, p); | 136 | + at::Tensor result = npu_preparation::apply_tensor(self); |
| 137 | + return dropout_out_nocheck(result, self, p); | ||
| 133 | } | 138 | } |
| 134 | 139 | ||
| 135 | -at::Tensor dropout_with_byte_mask(const at::Tensor& self, double p, bool train) { | 140 | +at::Tensor dropout_with_byte_mask(const at::Tensor& self, double p, bool train) |
| 136 | - TORCH_CHECK( | 141 | +{ |
| 137 | - torch_npu::utils::is_npu(self), | 142 | + TORCH_CHECK( |
| 138 | - "dropout_with_byte_mask only supports device for NPU!" + OPS_ERROR(ErrCode::NOT_SUPPORT)); | 143 | + torch_npu::utils::is_npu(self), |
| 139 | - if (p == 0 || !train || self.numel() == 0) { | 144 | + "dropout_with_byte_mask only supports device for NPU!" + OPS_ERROR(ErrCode::NOT_SUPPORT)); |
| 140 | - return self; | 145 | + if (p == 0 || !train || self.numel() == 0) { |
| 141 | - } | 146 | + return self; |
| 142 | - if (p == 1) { | 147 | + } |
| 143 | - return self.mul(at::zeros(self.sizes(), self.options())); | 148 | + if (p == 1) { |
| 144 | - } | 149 | + return self.mul(at::zeros(self.sizes(), self.options())); |
| 145 | - auto results = at_npu::native::custom_ops::_dropout_with_byte_mask(self, p); | 150 | + } |
| 146 | - return std::get<0>(results); | 151 | + auto results = at_npu::native::custom_ops::_dropout_with_byte_mask(self, p); |
| 152 | + return std::get<0>(results); | ||
| 147 | } | 153 | } |
| 148 | 154 | ||
| 149 | } // namespace acl_op | 155 | } // namespace acl_op |
| @@ -22,8 +22,8 @@ using npu_utils = at_npu::native::NpuUtils; | |||
| 22 | 22 | ||
| 23 | namespace { | 23 | namespace { |
| 24 | 24 | ||
| 25 | -at::Tensor &max_unpool3d_backward_out_npu_nocheck(at::Tensor &grad_input, const at::Tensor &grad_output, | 25 | +at::Tensor& max_unpool3d_backward_out_npu_nocheck(at::Tensor& grad_input, const at::Tensor& grad_output, |
| 26 | - const at::Tensor &indices) | 26 | + const at::Tensor& indices) |
| 27 | { | 27 | { |
| 28 | int64_t N = 1; | 28 | int64_t N = 1; |
| 29 | int64_t C = indices.size(0); | 29 | int64_t C = indices.size(0); |
| @@ -50,14 +50,14 @@ at::Tensor &max_unpool3d_backward_out_npu_nocheck(at::Tensor &grad_input, const | |||
| 50 | } // namespace | 50 | } // namespace |
| 51 | 51 | ||
| 52 | 52 | ||
| 53 | -at::Tensor &max_unpool3d_backward_out( | 53 | +at::Tensor& max_unpool3d_backward_out( |
| 54 | - const at::Tensor &grad_output, | 54 | + const at::Tensor& grad_output, |
| 55 | - const at::Tensor &self, | 55 | + const at::Tensor& self, |
| 56 | - const at::Tensor &indices, | 56 | + const at::Tensor& indices, |
| 57 | at::IntArrayRef output_size, | 57 | at::IntArrayRef output_size, |
| 58 | at::IntArrayRef stride, | 58 | at::IntArrayRef stride, |
| 59 | at::IntArrayRef padding, | 59 | at::IntArrayRef padding, |
| 60 | - at::Tensor &grad_input) | 60 | + at::Tensor& grad_input) |
| 61 | { | 61 | { |
| 62 | TORCH_CHECK(output_size.size() == 3, "There should be exactly 3 elements (depth, height, width) in output_size", | 62 | TORCH_CHECK(output_size.size() == 3, "There should be exactly 3 elements (depth, height, width) in output_size", |
| 63 | OPS_ERROR(ErrCode::PARAM)); | 63 | OPS_ERROR(ErrCode::PARAM)); |
| @@ -76,9 +76,9 @@ at::Tensor &max_unpool3d_backward_out( | |||
| 76 | } | 76 | } |
| 77 | 77 | ||
| 78 | at::Tensor max_unpool3d_backward( | 78 | at::Tensor max_unpool3d_backward( |
| 79 | - const at::Tensor &grad_output, | 79 | + const at::Tensor& grad_output, |
| 80 | - const at::Tensor &self, | 80 | + const at::Tensor& self, |
| 81 | - const at::Tensor &indices, | 81 | + const at::Tensor& indices, |
| 82 | at::IntArrayRef output_size, | 82 | at::IntArrayRef output_size, |
| 83 | at::IntArrayRef stride, | 83 | at::IntArrayRef stride, |
| 84 | at::IntArrayRef padding) | 84 | at::IntArrayRef padding) |
| @@ -104,19 +104,20 @@ at::Tensor& max_unpool3d_backward_out( | |||
| 104 | at::IntArrayRef output_size, | 104 | at::IntArrayRef output_size, |
| 105 | at::IntArrayRef stride, | 105 | at::IntArrayRef stride, |
| 106 | at::IntArrayRef padding, | 106 | at::IntArrayRef padding, |
| 107 | - at::Tensor& grad_input) { | 107 | + at::Tensor& grad_input) |
| 108 | - npu_preparation::CheckOut( | 108 | +{ |
| 109 | - {grad_output, self, indices}, | 109 | + npu_preparation::CheckOut( |
| 110 | - grad_input, | 110 | + {grad_output, self, indices}, |
| 111 | - self); | 111 | + grad_input, |
| 112 | - if (!npu_utils::check_match(&grad_input)) { | 112 | + self); |
| 113 | - at::Tensor contiguous_result = npu_utils::format_contiguous(grad_input); | 113 | + if (!npu_utils::check_match(&grad_input)) { |
| 114 | - max_unpool3d_backward_out_npu_nocheck(contiguous_result, grad_output, indices); | 114 | + at::Tensor contiguous_result = npu_utils::format_contiguous(grad_input); |
| 115 | - npu_utils::format_fresh_view(grad_input, contiguous_result); | 115 | + max_unpool3d_backward_out_npu_nocheck(contiguous_result, grad_output, indices); |
| 116 | - } else { | 116 | + npu_utils::format_fresh_view(grad_input, contiguous_result); |
| 117 | - max_unpool3d_backward_out_npu_nocheck(grad_input, grad_output, indices); | 117 | + } else { |
| 118 | - } | 118 | + max_unpool3d_backward_out_npu_nocheck(grad_input, grad_output, indices); |
| 119 | - return grad_input; | 119 | + } |
| 120 | + return grad_input; | ||
| 120 | } | 121 | } |
| 121 | 122 | ||
| 122 | at::Tensor max_unpool3d_backward( | 123 | at::Tensor max_unpool3d_backward( |
| @@ -125,23 +126,24 @@ at::Tensor max_unpool3d_backward( | |||
| 125 | const at::Tensor& indices, | 126 | const at::Tensor& indices, |
| 126 | at::IntArrayRef output_size, | 127 | at::IntArrayRef output_size, |
| 127 | at::IntArrayRef stride, | 128 | at::IntArrayRef stride, |
| 128 | - at::IntArrayRef padding) { | 129 | + at::IntArrayRef padding) |
| 129 | - TORCH_CHECK( | 130 | +{ |
| 130 | - output_size.size() == 3, | 131 | + TORCH_CHECK( |
| 131 | - "There should be exactly 3 elements (depth, height, width) in output_size"); | 132 | + output_size.size() == 3, |
| 132 | - TORCH_CHECK( | 133 | + "There should be exactly 3 elements (depth, height, width) in output_size"); |
| 133 | - (self.ndimension() == 4 || self.ndimension() == 5), | 134 | + TORCH_CHECK( |
| 134 | - "Input to max_unpooling2d should be a 4d or 5d Tensor"); | 135 | + (self.ndimension() == 4 || self.ndimension() == 5), |
| 135 | - TORCH_CHECK( | 136 | + "Input to max_unpooling2d should be a 4d or 5d Tensor"); |
| 136 | - self.sizes() == indices.sizes(), | 137 | + TORCH_CHECK( |
| 137 | - "Shape of indices should match shape of input"); | 138 | + self.sizes() == indices.sizes(), |
| 138 | - TORCH_CHECK(self.numel() > 0, "Input must be non-empty"); | 139 | + "Shape of indices should match shape of input"); |
| 140 | + TORCH_CHECK(self.numel() > 0, "Input must be non-empty"); | ||
| 139 | 141 | ||
| 140 | - at::Tensor grad_input = npu_preparation::apply_tensor(self); | 142 | + at::Tensor grad_input = npu_preparation::apply_tensor(self); |
| 141 | 143 | ||
| 142 | - max_unpool3d_backward_out_npu_nocheck(grad_input, grad_output, indices); | 144 | + max_unpool3d_backward_out_npu_nocheck(grad_input, grad_output, indices); |
| 143 | 145 | ||
| 144 | - return grad_input; | 146 | + return grad_input; |
| 145 | } | 147 | } |
| 146 | 148 | ||
| 147 | } // namespace acl_op | 149 | } // namespace acl_op |
| @@ -23,146 +23,157 @@ using npu_utils = at_npu::native::NpuUtils; | |||
| 23 | 23 | ||
| 24 | namespace { | 24 | namespace { |
| 25 | // pow.Tensor_Tensor_out | 25 | // pow.Tensor_Tensor_out |
| 26 | -at::Tensor& pow_tensor_tensor_out_npu_nocheck(at::Tensor& result, const at::Tensor& self, const at::Tensor& exp) { | 26 | +at::Tensor& pow_tensor_tensor_out_npu_nocheck(at::Tensor& result, const at::Tensor& self, const at::Tensor& exp) |
| 27 | - at_npu::native::OpCommand cmd; | 27 | +{ |
| 28 | - cmd.Name("Pow") | 28 | + at_npu::native::OpCommand cmd; |
| 29 | - .Input(self) | 29 | + cmd.Name("Pow") |
| 30 | - .Input(exp) | 30 | + .Input(self) |
| 31 | - .Output(result) | 31 | + .Input(exp) |
| 32 | - .Run(); | 32 | + .Output(result) |
| 33 | + .Run(); | ||
| 33 | 34 | ||
| 34 | - return result; | 35 | + return result; |
| 35 | } | 36 | } |
| 36 | 37 | ||
| 37 | // pow.Tensor_Scalar_out | 38 | // pow.Tensor_Scalar_out |
| 38 | -at::Tensor& pow_tensor_scalar_out_npu_nocheck(at::Tensor& result, const at::Tensor& self, at::Scalar exp) { | 39 | +at::Tensor& pow_tensor_scalar_out_npu_nocheck(at::Tensor& result, const at::Tensor& self, at::Scalar exp) |
| 39 | - at_npu::native::OpCommand cmd; | 40 | +{ |
| 40 | - if (exp.toFloat() == 2.0) { | 41 | + at_npu::native::OpCommand cmd; |
| 41 | - cmd.Name("Square") | 42 | + if (exp.toFloat() == 2.0) { |
| 42 | - .Input(self) | 43 | + cmd.Name("Square") |
| 43 | - .Output(result) | 44 | + .Input(self) |
| 44 | - .Run(); | 45 | + .Output(result) |
| 45 | - } else { | 46 | + .Run(); |
| 46 | - cmd.Name("Pow") | 47 | + } else { |
| 47 | - .Input(self) | 48 | + cmd.Name("Pow") |
| 48 | - .Input(exp, self.scalar_type()) | 49 | + .Input(self) |
| 49 | - .Output(result) | 50 | + .Input(exp, self.scalar_type()) |
| 50 | - .Run(); | 51 | + .Output(result) |
| 51 | - } | 52 | + .Run(); |
| 52 | - return result; | 53 | + } |
| 54 | + return result; | ||
| 53 | } | 55 | } |
| 54 | 56 | ||
| 55 | // pow.Scalar_out | 57 | // pow.Scalar_out |
| 56 | -at::Tensor& pow_scalar_out_npu_nocheck(at::Tensor& result, at::Scalar self, const at::Tensor& exp) { | 58 | +at::Tensor& pow_scalar_out_npu_nocheck(at::Tensor& result, at::Scalar self, const at::Tensor& exp) |
| 57 | - at_npu::native::OpCommand cmd; | 59 | +{ |
| 58 | - cmd.Name("Pow") | 60 | + at_npu::native::OpCommand cmd; |
| 59 | - .Input(self, exp.scalar_type()) | 61 | + cmd.Name("Pow") |
| 60 | - .Input(exp) | 62 | + .Input(self, exp.scalar_type()) |
| 61 | - .Output(result) | 63 | + .Input(exp) |
| 62 | - .Run(); | 64 | + .Output(result) |
| 65 | + .Run(); | ||
| 63 | 66 | ||
| 64 | - return result; | 67 | + return result; |
| 65 | } | 68 | } |
| 66 | } // namespace | 69 | } // namespace |
| 67 | 70 | ||
| 68 | // pow.Tensor_Tensor_out | 71 | // pow.Tensor_Tensor_out |
| 69 | -at::Tensor& pow_out(const at::Tensor& self, const at::Tensor& exp, at::Tensor& result) { | 72 | +at::Tensor& pow_out(const at::Tensor& self, const at::Tensor& exp, at::Tensor& result) |
| 70 | - auto output_size = op_infer::broadcast_ops_npu_output_size(self, exp); | 73 | +{ |
| 71 | - npu_preparation::CheckOut( | 74 | + auto output_size = op_infer::broadcast_ops_npu_output_size(self, exp); |
| 72 | - {self, exp}, | 75 | + npu_preparation::CheckOut( |
| 73 | - result, | 76 | + {self, exp}, |
| 74 | - self, | 77 | + result, |
| 75 | - output_size); | 78 | + self, |
| 79 | + output_size); | ||
| 76 | 80 | ||
| 77 | - if (!npu_utils::check_match(&result)) { | 81 | + if (!npu_utils::check_match(&result)) { |
| 78 | - at::Tensor contiguous_result = npu_utils::format_contiguous(result); | 82 | + at::Tensor contiguous_result = npu_utils::format_contiguous(result); |
| 79 | - pow_tensor_tensor_out_npu_nocheck(contiguous_result, self, exp); | 83 | + pow_tensor_tensor_out_npu_nocheck(contiguous_result, self, exp); |
| 80 | - npu_utils::format_fresh_view(result, contiguous_result); | 84 | + npu_utils::format_fresh_view(result, contiguous_result); |
| 81 | - } else { | 85 | + } else { |
| 82 | - pow_tensor_tensor_out_npu_nocheck(result, self, exp); | 86 | + pow_tensor_tensor_out_npu_nocheck(result, self, exp); |
| 83 | - } | 87 | + } |
| 84 | - return result; | 88 | + return result; |
| 85 | } | 89 | } |
| 86 | 90 | ||
| 87 | // pow.Tensor_Scalar_out | 91 | // pow.Tensor_Scalar_out |
| 88 | -at::Tensor& pow_out(const at::Tensor& self, const at::Scalar& exp, at::Tensor& result) { | 92 | +at::Tensor& pow_out(const at::Tensor& self, const at::Scalar& exp, at::Tensor& result) |
| 89 | - npu_preparation::CheckOut( | 93 | +{ |
| 90 | - {self}, | 94 | + npu_preparation::CheckOut( |
| 91 | - result, | 95 | + {self}, |
| 92 | - self); | 96 | + result, |
| 97 | + self); | ||
| 93 | 98 | ||
| 94 | - auto exp_value = exp.toFloat(); | 99 | + auto exp_value = exp.toFloat(); |
| 95 | - if (exp_value == 0.0) { | 100 | + if (exp_value == 0.0) { |
| 96 | - return result.fill_(1); | 101 | + return result.fill_(1); |
| 97 | - } else if (exp_value == 1.0) { | 102 | + } else if (exp_value == 1.0) { |
| 98 | - return result.copy_(self); | 103 | + return result.copy_(self); |
| 99 | - } | 104 | + } |
| 100 | 105 | ||
| 101 | - if (!npu_utils::check_match(&result)) { | 106 | + if (!npu_utils::check_match(&result)) { |
| 102 | - at::Tensor contiguous_result = npu_utils::format_contiguous(result); | 107 | + at::Tensor contiguous_result = npu_utils::format_contiguous(result); |
| 103 | - pow_tensor_scalar_out_npu_nocheck(contiguous_result, self, exp); | 108 | + pow_tensor_scalar_out_npu_nocheck(contiguous_result, self, exp); |
| 104 | - npu_utils::format_fresh_view(result, contiguous_result); | 109 | + npu_utils::format_fresh_view(result, contiguous_result); |
| 105 | - } else { | 110 | + } else { |
| 106 | - pow_tensor_scalar_out_npu_nocheck(result, self, exp); | 111 | + pow_tensor_scalar_out_npu_nocheck(result, self, exp); |
| 107 | - } | 112 | + } |
| 108 | - return result; | 113 | + return result; |
| 109 | } | 114 | } |
| 110 | 115 | ||
| 111 | // pow.Scalar_out | 116 | // pow.Scalar_out |
| 112 | -at::Tensor& pow_out(const at::Scalar& self, const at::Tensor& exp, at::Tensor& result) { | 117 | +at::Tensor& pow_out(const at::Scalar& self, const at::Tensor& exp, at::Tensor& result) |
| 113 | - npu_preparation::CheckOut( | 118 | +{ |
| 114 | - {exp}, | 119 | + npu_preparation::CheckOut( |
| 115 | - result, | 120 | + {exp}, |
| 116 | - exp); | 121 | + result, |
| 122 | + exp); | ||
| 117 | 123 | ||
| 118 | - if (!npu_utils::check_match(&result)) { | 124 | + if (!npu_utils::check_match(&result)) { |
| 119 | - at::Tensor contiguous_result = npu_utils::format_contiguous(result); | 125 | + at::Tensor contiguous_result = npu_utils::format_contiguous(result); |
| 120 | - pow_scalar_out_npu_nocheck(contiguous_result, self, exp); | 126 | + pow_scalar_out_npu_nocheck(contiguous_result, self, exp); |
| 121 | - npu_utils::format_fresh_view(result, contiguous_result); | 127 | + npu_utils::format_fresh_view(result, contiguous_result); |
| 122 | - } else { | 128 | + } else { |
| 123 | - pow_scalar_out_npu_nocheck(result, self, exp); | 129 | + pow_scalar_out_npu_nocheck(result, self, exp); |
| 124 | - } | 130 | + } |
| 125 | - return result; | 131 | + return result; |
| 126 | } | 132 | } |
| 127 | 133 | ||
| 128 | -at::Tensor pow(const at::Tensor& self, const at::Tensor& exp) { | 134 | +at::Tensor pow(const at::Tensor& self, const at::Tensor& exp) |
| 129 | - auto output_size = op_infer::broadcast_ops_npu_output_size(self, exp); | 135 | +{ |
| 130 | - at::Tensor result = npu_preparation::apply_tensor(self, output_size); | 136 | + auto output_size = op_infer::broadcast_ops_npu_output_size(self, exp); |
| 131 | - pow_tensor_tensor_out_npu_nocheck(result, self, exp); | 137 | + at::Tensor result = npu_preparation::apply_tensor(self, output_size); |
| 132 | - return result; | 138 | + pow_tensor_tensor_out_npu_nocheck(result, self, exp); |
| 139 | + return result; | ||
| 133 | } | 140 | } |
| 134 | 141 | ||
| 135 | -at::Tensor pow(const at::Tensor& self, const at::Scalar& exp) { | 142 | +at::Tensor pow(const at::Tensor& self, const at::Scalar& exp) |
| 136 | - auto result_type = at::result_type(self, exp); | 143 | +{ |
| 137 | - at::Tensor result = npu_preparation::apply_tensor(self, self.options().dtype(result_type)); | 144 | + auto result_type = at::result_type(self, exp); |
| 145 | + at::Tensor result = npu_preparation::apply_tensor(self, self.options().dtype(result_type)); | ||
| 138 | 146 | ||
| 139 | - auto exp_value = exp.toFloat(); | 147 | + auto exp_value = exp.toFloat(); |
| 140 | - if (exp_value == 0.0) { | 148 | + if (exp_value == 0.0) { |
| 141 | - return result.fill_(1); | 149 | + return result.fill_(1); |
| 142 | - } else if (exp_value == 1.0) { | 150 | + } else if (exp_value == 1.0) { |
| 143 | - return result.copy_(self); | 151 | + return result.copy_(self); |
| 144 | - } | 152 | + } |
| 145 | 153 | ||
| 146 | - at::Tensor self_copy = (self.scalar_type() != result_type) ? at_npu::native::custom_ops::npu_dtype_cast(self, result_type) : self; | 154 | + at::Tensor self_copy = (self.scalar_type() != result_type) ? at_npu::native::custom_ops::npu_dtype_cast(self, result_type) : self; |
| 147 | - pow_tensor_scalar_out_npu_nocheck(result, self_copy, exp); | 155 | + pow_tensor_scalar_out_npu_nocheck(result, self_copy, exp); |
| 148 | - return result; | 156 | + return result; |
| 149 | } | 157 | } |
| 150 | 158 | ||
| 151 | -at::Tensor pow(const at::Scalar& self, const at::Tensor& exp) { | 159 | +at::Tensor pow(const at::Scalar& self, const at::Tensor& exp) |
| 152 | - auto result_type = at::result_type(exp, self); | 160 | +{ |
| 153 | - at::Tensor result = npu_preparation::apply_tensor(exp, exp.options().dtype(result_type)); | 161 | + auto result_type = at::result_type(exp, self); |
| 154 | - at::Tensor exp_copy = (exp.scalar_type() != result_type) ? at_npu::native::custom_ops::npu_dtype_cast(exp, result_type) : exp; | 162 | + at::Tensor result = npu_preparation::apply_tensor(exp, exp.options().dtype(result_type)); |
| 155 | - pow_scalar_out_npu_nocheck(result, self, exp_copy); | 163 | + at::Tensor exp_copy = (exp.scalar_type() != result_type) ? at_npu::native::custom_ops::npu_dtype_cast(exp, result_type) : exp; |
| 156 | - return result; | 164 | + pow_scalar_out_npu_nocheck(result, self, exp_copy); |
| 165 | + return result; | ||
| 157 | } | 166 | } |
| 158 | 167 | ||
| 159 | -at::Tensor& pow_(at::Tensor& self, const at::Tensor& exp) { | 168 | +at::Tensor& pow_(at::Tensor& self, const at::Tensor& exp) |
| 160 | - acl_op::pow_out(self, exp, self); | 169 | +{ |
| 161 | - return self; | 170 | + acl_op::pow_out(self, exp, self); |
| 171 | + return self; | ||
| 162 | } | 172 | } |
| 163 | 173 | ||
| 164 | -at::Tensor& pow_(at::Tensor& self, const at::Scalar& exp) { | 174 | +at::Tensor& pow_(at::Tensor& self, const at::Scalar& exp) |
| 165 | - acl_op::pow_out(self, exp, self); | 175 | +{ |
| 166 | - return self; | 176 | + acl_op::pow_out(self, exp, self); |
| 177 | + return self; | ||
| 167 | } | 178 | } |
| 168 | } // namespace at_npu | 179 | } // namespace at_npu |
| @@ -27,208 +27,219 @@ namespace { | |||
| 27 | at::Tensor& remainder_out_scalar_npu_nocheck( | 27 | at::Tensor& remainder_out_scalar_npu_nocheck( |
| 28 | at::Tensor& result, | 28 | at::Tensor& result, |
| 29 | const at::Tensor& self, | 29 | const at::Tensor& self, |
| 30 | - const at::Scalar other) { | 30 | + const at::Scalar other) |
| 31 | - at_npu::native::OpCommand cmd; | 31 | +{ |
| 32 | - cmd.Name("FloorMod") | 32 | + at_npu::native::OpCommand cmd; |
| 33 | - .Input(self) | 33 | + cmd.Name("FloorMod") |
| 34 | - .Input(other, self.scalar_type()) | 34 | + .Input(self) |
| 35 | - .Output(result) | 35 | + .Input(other, self.scalar_type()) |
| 36 | - .Run(); | 36 | + .Output(result) |
| 37 | + .Run(); | ||
| 37 | 38 | ||
| 38 | - return result; | 39 | + return result; |
| 39 | } | 40 | } |
| 40 | 41 | ||
| 41 | at::Tensor& remainder_out_scalar_npu_nocheck( | 42 | at::Tensor& remainder_out_scalar_npu_nocheck( |
| 42 | at::Tensor& result, | 43 | at::Tensor& result, |
| 43 | const at::Scalar& self, | 44 | const at::Scalar& self, |
| 44 | - const at::Tensor& other) { | 45 | + const at::Tensor& other) |
| 45 | - at_npu::native::OpCommand cmd; | 46 | +{ |
| 46 | - cmd.Name("FloorMod") | 47 | + at_npu::native::OpCommand cmd; |
| 47 | - .Input(self, other.scalar_type()) | 48 | + cmd.Name("FloorMod") |
| 48 | - .Input(other) | 49 | + .Input(self, other.scalar_type()) |
| 49 | - .Output(result) | 50 | + .Input(other) |
| 50 | - .Run(); | 51 | + .Output(result) |
| 51 | - return result; | 52 | + .Run(); |
| 53 | + return result; | ||
| 52 | } | 54 | } |
| 53 | 55 | ||
| 54 | at::Tensor& remainder_out_tensor_npu_nocheck( | 56 | at::Tensor& remainder_out_tensor_npu_nocheck( |
| 55 | at::Tensor& result, | 57 | at::Tensor& result, |
| 56 | const at::Tensor& self, | 58 | const at::Tensor& self, |
| 57 | - const at::Tensor& other) { | 59 | + const at::Tensor& other) |
| 58 | - auto unified_result = npu_preparation::binary_op_check(result, self, other, true); | 60 | +{ |
| 59 | - at_npu::native::OpCommand cmd; | 61 | + auto unified_result = npu_preparation::binary_op_check(result, self, other, true); |
| 60 | - cmd.Name("FloorMod") | 62 | + at_npu::native::OpCommand cmd; |
| 61 | - .Expect(unified_result) | 63 | + cmd.Name("FloorMod") |
| 62 | - .Input(self) | 64 | + .Expect(unified_result) |
| 63 | - .Input(other) | 65 | + .Input(self) |
| 64 | - .Output(result) | 66 | + .Input(other) |
| 65 | - .Run(); | 67 | + .Output(result) |
| 66 | - return result; | 68 | + .Run(); |
| 69 | + return result; | ||
| 67 | } | 70 | } |
| 68 | 71 | ||
| 69 | at::Tensor& remainder_out_scalar( | 72 | at::Tensor& remainder_out_scalar( |
| 70 | at::Tensor& result, | 73 | at::Tensor& result, |
| 71 | const at::Scalar& self, | 74 | const at::Scalar& self, |
| 72 | - const at::Tensor& other) { | 75 | + const at::Tensor& other) |
| 73 | - at::ScalarType calculate_type = at::native::result_type(other, self); | 76 | +{ |
| 74 | - at::ScalarType result_type = result.scalar_type(); | 77 | + at::ScalarType calculate_type = at::native::result_type(other, self); |
| 75 | - TORCH_CHECK(canCast(calculate_type, result_type), "result type ", calculate_type, | 78 | + at::ScalarType result_type = result.scalar_type(); |
| 76 | - " can't be cast to the desired output type ", result_type, OPS_ERROR(ErrCode::TYPE)); | 79 | + TORCH_CHECK(canCast(calculate_type, result_type), "result type ", calculate_type, |
| 80 | + " can't be cast to the desired output type ", result_type, OPS_ERROR(ErrCode::TYPE)); | ||
| 77 | 81 | ||
| 78 | - at::Tensor other_cast = (other.dtype() == calculate_type) ? other : | 82 | + at::Tensor other_cast = (other.dtype() == calculate_type) ? other : |
| 79 | - at_npu::native::custom_ops::npu_dtype_cast(other, calculate_type); | 83 | + at_npu::native::custom_ops::npu_dtype_cast(other, calculate_type); |
| 80 | - at::Tensor result_cast = (result_type == calculate_type) ? result : | 84 | + at::Tensor result_cast = (result_type == calculate_type) ? result : |
| 81 | - at_npu::native::custom_ops::npu_dtype_cast(result, calculate_type); | 85 | + at_npu::native::custom_ops::npu_dtype_cast(result, calculate_type); |
| 82 | 86 | ||
| 83 | - npu_preparation::CheckOut( | 87 | + npu_preparation::CheckOut( |
| 84 | - {other}, | 88 | + {other}, |
| 85 | - result, | 89 | + result, |
| 86 | - result, | 90 | + result, |
| 87 | - other.sizes()); | 91 | + other.sizes()); |
| 88 | 92 | ||
| 89 | - if (!npu_utils::check_match(&result_cast)) { | 93 | + if (!npu_utils::check_match(&result_cast)) { |
| 90 | - at::Tensor contiguous_result = npu_utils::format_contiguous(result_cast); | 94 | + at::Tensor contiguous_result = npu_utils::format_contiguous(result_cast); |
| 91 | - remainder_out_scalar_npu_nocheck(contiguous_result, self, other_cast); | 95 | + remainder_out_scalar_npu_nocheck(contiguous_result, self, other_cast); |
| 92 | - npu_utils::format_fresh_view(result_cast, contiguous_result); | 96 | + npu_utils::format_fresh_view(result_cast, contiguous_result); |
| 93 | - } else { | 97 | + } else { |
| 94 | - remainder_out_scalar_npu_nocheck(result_cast, self, other_cast); | 98 | + remainder_out_scalar_npu_nocheck(result_cast, self, other_cast); |
| 95 | - } | 99 | + } |
| 96 | 100 | ||
| 97 | - if (result_type != calculate_type) { | 101 | + if (result_type != calculate_type) { |
| 98 | - result_cast = at_npu::native::custom_ops::npu_dtype_cast(result_cast, result_type); | 102 | + result_cast = at_npu::native::custom_ops::npu_dtype_cast(result_cast, result_type); |
| 99 | - result.copy_(result_cast); | 103 | + result.copy_(result_cast); |
| 100 | - } | 104 | + } |
| 101 | - return result; | 105 | + return result; |
| 102 | } | 106 | } |
| 103 | } // namespace | 107 | } // namespace |
| 104 | 108 | ||
| 105 | at::Tensor& remainder_out( | 109 | at::Tensor& remainder_out( |
| 106 | const at::Tensor& self, | 110 | const at::Tensor& self, |
| 107 | const at::Scalar& other, | 111 | const at::Scalar& other, |
| 108 | - at::Tensor& result) { | 112 | + at::Tensor& result) |
| 109 | - npu_preparation::CheckOut( | 113 | +{ |
| 110 | - {self}, | 114 | + npu_preparation::CheckOut( |
| 111 | - result, | 115 | + {self}, |
| 112 | - result, | 116 | + result, |
| 113 | - self.sizes()); | 117 | + result, |
| 118 | + self.sizes()); | ||
| 114 | 119 | ||
| 115 | - at::ScalarType calculate_type = at::native::result_type(self, other); | 120 | + at::ScalarType calculate_type = at::native::result_type(self, other); |
| 116 | - at::ScalarType result_type = result.scalar_type(); | 121 | + at::ScalarType result_type = result.scalar_type(); |
| 117 | - TORCH_CHECK(canCast(calculate_type, result_type), "result type ", calculate_type, | 122 | + TORCH_CHECK(canCast(calculate_type, result_type), "result type ", calculate_type, |
| 118 | - " can't be cast to the desired output type ", result_type, OPS_ERROR(ErrCode::TYPE)); | 123 | + " can't be cast to the desired output type ", result_type, OPS_ERROR(ErrCode::TYPE)); |
| 119 | 124 | ||
| 120 | - at::Tensor self_cast = (self.dtype() == calculate_type) ? self : | 125 | + at::Tensor self_cast = (self.dtype() == calculate_type) ? self : |
| 121 | - at_npu::native::custom_ops::npu_dtype_cast(self, calculate_type); | 126 | + at_npu::native::custom_ops::npu_dtype_cast(self, calculate_type); |
| 122 | - at::Tensor result_cast = (result_type == calculate_type) ? result : | 127 | + at::Tensor result_cast = (result_type == calculate_type) ? result : |
| 123 | - at_npu::native::custom_ops::npu_dtype_cast(result, calculate_type); | 128 | + at_npu::native::custom_ops::npu_dtype_cast(result, calculate_type); |
| 124 | - if (!npu_utils::check_match(&result_cast)) { | 129 | + if (!npu_utils::check_match(&result_cast)) { |
| 125 | - at::Tensor contiguous_result = npu_utils::format_contiguous(result_cast); | 130 | + at::Tensor contiguous_result = npu_utils::format_contiguous(result_cast); |
| 126 | - remainder_out_scalar_npu_nocheck(contiguous_result, self_cast, other); | 131 | + remainder_out_scalar_npu_nocheck(contiguous_result, self_cast, other); |
| 127 | - npu_utils::format_fresh_view(result_cast, contiguous_result); | 132 | + npu_utils::format_fresh_view(result_cast, contiguous_result); |
| 128 | - } else { | 133 | + } else { |
| 129 | - remainder_out_scalar_npu_nocheck(result_cast, self_cast, other); | 134 | + remainder_out_scalar_npu_nocheck(result_cast, self_cast, other); |
| 130 | - } | 135 | + } |
| 131 | 136 | ||
| 132 | - if (result_type != calculate_type) { | 137 | + if (result_type != calculate_type) { |
| 133 | - result_cast = at_npu::native::custom_ops::npu_dtype_cast(result_cast, result_type); | 138 | + result_cast = at_npu::native::custom_ops::npu_dtype_cast(result_cast, result_type); |
| 134 | - result.copy_(result_cast); | 139 | + result.copy_(result_cast); |
| 135 | - } | 140 | + } |
| 136 | - return result; | 141 | + return result; |
| 137 | } | 142 | } |
| 138 | 143 | ||
| 139 | at::Tensor& remainder_out( | 144 | at::Tensor& remainder_out( |
| 140 | const at::Tensor& self, | 145 | const at::Tensor& self, |
| 141 | const at::Tensor& other, | 146 | const at::Tensor& other, |
| 142 | - at::Tensor& result) { | 147 | + at::Tensor& result) |
| 143 | - if (npu_preparation::IsCPUScalar(other)) { | 148 | +{ |
| 144 | - return acl_op::remainder_out(self, other.item(), result); | 149 | + if (npu_preparation::IsCPUScalar(other)) { |
| 145 | - } else if (npu_preparation::IsCPUScalar(self)) { | 150 | + return acl_op::remainder_out(self, other.item(), result); |
| 146 | - return remainder_out_scalar(result, self.item(), other); | 151 | + } else if (npu_preparation::IsCPUScalar(self)) { |
| 147 | - } else { | 152 | + return remainder_out_scalar(result, self.item(), other); |
| 148 | - auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); | ||
| 149 | - npu_preparation::CheckOut( | ||
| 150 | - {self, other}, | ||
| 151 | - result, | ||
| 152 | - result, | ||
| 153 | - output_size); | ||
| 154 | - | ||
| 155 | - at::ScalarType calculate_type = at::native::result_type(self, other); | ||
| 156 | - at::ScalarType result_type = result.scalar_type(); | ||
| 157 | - TORCH_CHECK(canCast(calculate_type, result_type), "result type ", calculate_type, | ||
| 158 | - " can't be cast to the desired output type ", result_type, OPS_ERROR(ErrCode::TYPE)); | ||
| 159 | - | ||
| 160 | - TORCH_CHECK(self.device() == other.device(), | ||
| 161 | - "Expected all tensors to be on the same device, but found at least two devices, ", | ||
| 162 | - self.device(), " and ", other.device(), OPS_ERROR(ErrCode::PARAM)); | ||
| 163 | - | ||
| 164 | - at::Tensor self_cast = | ||
| 165 | - (self.dtype() == calculate_type) ? self : at_npu::native::custom_ops::npu_dtype_cast(self, calculate_type); | ||
| 166 | - at::Tensor other_cast = | ||
| 167 | - (other.dtype() == calculate_type) ? other : at_npu::native::custom_ops::npu_dtype_cast(other, calculate_type); | ||
| 168 | - at::Tensor result_cast = | ||
| 169 | - (result_type == calculate_type) ? result : at_npu::native::custom_ops::npu_dtype_cast(result, calculate_type); | ||
| 170 | - if (!npu_utils::check_match(&result_cast)) { | ||
| 171 | - at::Tensor contiguous_result = npu_utils::format_contiguous(result_cast); | ||
| 172 | - remainder_out_tensor_npu_nocheck(contiguous_result, self_cast, other_cast); | ||
| 173 | - npu_utils::format_fresh_view(result_cast, contiguous_result); | ||
| 174 | } else { | 153 | } else { |
| 175 | - remainder_out_tensor_npu_nocheck(result_cast, self_cast, other_cast); | 154 | + auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); |
| 176 | - } | 155 | + npu_preparation::CheckOut( |
| 156 | + {self, other}, | ||
| 157 | + result, | ||
| 158 | + result, | ||
| 159 | + output_size); | ||
| 177 | 160 | ||
| 178 | - if (result_type != calculate_type) { | 161 | + at::ScalarType calculate_type = at::native::result_type(self, other); |
| 179 | - result_cast = at_npu::native::custom_ops::npu_dtype_cast(result_cast, result_type); | 162 | + at::ScalarType result_type = result.scalar_type(); |
| 180 | - result.copy_(result_cast); | 163 | + TORCH_CHECK(canCast(calculate_type, result_type), "result type ", calculate_type, |
| 164 | + " can't be cast to the desired output type ", result_type, OPS_ERROR(ErrCode::TYPE)); | ||
| 165 | + | ||
| 166 | + TORCH_CHECK(self.device() == other.device(), | ||
| 167 | + "Expected all tensors to be on the same device, but found at least two devices, ", | ||
| 168 | + self.device(), " and ", other.device(), OPS_ERROR(ErrCode::PARAM)); | ||
| 169 | + | ||
| 170 | + at::Tensor self_cast = | ||
| 171 | + (self.dtype() == calculate_type) ? self : at_npu::native::custom_ops::npu_dtype_cast(self, calculate_type); | ||
| 172 | + at::Tensor other_cast = | ||
| 173 | + (other.dtype() == calculate_type) ? other : at_npu::native::custom_ops::npu_dtype_cast(other, calculate_type); | ||
| 174 | + at::Tensor result_cast = | ||
| 175 | + (result_type == calculate_type) ? result : at_npu::native::custom_ops::npu_dtype_cast(result, calculate_type); | ||
| 176 | + if (!npu_utils::check_match(&result_cast)) { | ||
| 177 | + at::Tensor contiguous_result = npu_utils::format_contiguous(result_cast); | ||
| 178 | + remainder_out_tensor_npu_nocheck(contiguous_result, self_cast, other_cast); | ||
| 179 | + npu_utils::format_fresh_view(result_cast, contiguous_result); | ||
| 180 | + } else { | ||
| 181 | + remainder_out_tensor_npu_nocheck(result_cast, self_cast, other_cast); | ||
| 182 | + } | ||
| 183 | + | ||
| 184 | + if (result_type != calculate_type) { | ||
| 185 | + result_cast = at_npu::native::custom_ops::npu_dtype_cast(result_cast, result_type); | ||
| 186 | + result.copy_(result_cast); | ||
| 187 | + } | ||
| 188 | + return result; | ||
| 181 | } | 189 | } |
| 182 | - return result; | ||
| 183 | - } | ||
| 184 | } | 190 | } |
| 185 | 191 | ||
| 186 | -at::Tensor remainder(const at::Tensor& self, const at::Tensor& other) { | 192 | +at::Tensor remainder(const at::Tensor& self, const at::Tensor& other) |
| 187 | - if (npu_preparation::IsCPUScalar(other)) { | 193 | +{ |
| 188 | - return acl_op::remainder(self, other.item()); | 194 | + if (npu_preparation::IsCPUScalar(other)) { |
| 189 | - } else if (npu_preparation::IsCPUScalar(self)) { | 195 | + return acl_op::remainder(self, other.item()); |
| 190 | - return acl_op::remainder(self.item(), other); | 196 | + } else if (npu_preparation::IsCPUScalar(self)) { |
| 191 | - } else { | 197 | + return acl_op::remainder(self.item(), other); |
| 192 | - TORCH_CHECK(self.device() == other.device(), | 198 | + } else { |
| 193 | - "Expected all tensors to be on the same device, but found at least two devices, ", | 199 | + TORCH_CHECK(self.device() == other.device(), |
| 194 | - self.device(), " and ", other.device(), OPS_ERROR(ErrCode::PARAM)); | 200 | + "Expected all tensors to be on the same device, but found at least two devices, ", |
| 201 | + self.device(), " and ", other.device(), OPS_ERROR(ErrCode::PARAM)); | ||
| 195 | 202 | ||
| 203 | + at::ScalarType calculate_type = at::native::result_type(self, other); | ||
| 204 | + at::Tensor self_cast = | ||
| 205 | + (self.dtype() == calculate_type) ? self : at_npu::native::custom_ops::npu_dtype_cast(self, calculate_type); | ||
| 206 | + at::Tensor other_cast = | ||
| 207 | + (other.dtype() == calculate_type) ? other : at_npu::native::custom_ops::npu_dtype_cast(other, calculate_type); | ||
| 208 | + | ||
| 209 | + auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); | ||
| 210 | + at::Tensor result = npu_preparation::apply_tensor(self_cast, output_size); | ||
| 211 | + remainder_out_tensor_npu_nocheck(result, self_cast, other_cast); | ||
| 212 | + return result; | ||
| 213 | + } | ||
| 214 | +} | ||
| 215 | + | ||
| 216 | +at::Tensor remainder(const at::Tensor& self, const at::Scalar& other) | ||
| 217 | +{ | ||
| 196 | at::ScalarType calculate_type = at::native::result_type(self, other); | 218 | at::ScalarType calculate_type = at::native::result_type(self, other); |
| 197 | - at::Tensor self_cast = | 219 | + at::Tensor self_cast = (self.dtype() == calculate_type) ? self : |
| 198 | - (self.dtype() == calculate_type) ? self : at_npu::native::custom_ops::npu_dtype_cast(self, calculate_type); | 220 | + at_npu::native::custom_ops::npu_dtype_cast(self, calculate_type); |
| 199 | - at::Tensor other_cast = | 221 | + at::Tensor result = npu_preparation::apply_tensor(self_cast); |
| 200 | - (other.dtype() == calculate_type) ? other : at_npu::native::custom_ops::npu_dtype_cast(other, calculate_type); | 222 | + remainder_out_scalar_npu_nocheck(result, self_cast, other); |
| 201 | - | ||
| 202 | - auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); | ||
| 203 | - at::Tensor result = npu_preparation::apply_tensor(self_cast, output_size); | ||
| 204 | - remainder_out_tensor_npu_nocheck(result, self_cast, other_cast); | ||
| 205 | return result; | 223 | return result; |
| 206 | - } | ||
| 207 | } | 224 | } |
| 208 | 225 | ||
| 209 | -at::Tensor remainder(const at::Tensor& self, const at::Scalar& other) { | 226 | +at::Tensor& remainder_(at::Tensor& self, const at::Tensor& other) |
| 210 | - at::ScalarType calculate_type = at::native::result_type(self, other); | 227 | +{ |
| 211 | - at::Tensor self_cast = (self.dtype() == calculate_type) ? self : | 228 | + return acl_op::remainder_out(self, other, self); |
| 212 | - at_npu::native::custom_ops::npu_dtype_cast(self, calculate_type); | ||
| 213 | - at::Tensor result = npu_preparation::apply_tensor(self_cast); | ||
| 214 | - remainder_out_scalar_npu_nocheck(result, self_cast, other); | ||
| 215 | - return result; | ||
| 216 | } | 229 | } |
| 217 | 230 | ||
| 218 | -at::Tensor& remainder_(at::Tensor& self, const at::Tensor& other) { | 231 | +at::Tensor& remainder_(at::Tensor& self, const at::Scalar& other) |
| 219 | - return acl_op::remainder_out(self, other, self); | 232 | +{ |
| 233 | + return acl_op::remainder_out(self, other, self); | ||
| 220 | } | 234 | } |
| 221 | 235 | ||
| 222 | -at::Tensor& remainder_(at::Tensor& self, const at::Scalar& other) { | 236 | +at::Tensor remainder(const at::Scalar& self, const at::Tensor& other) |
| 223 | - return acl_op::remainder_out(self, other, self); | 237 | +{ |
| 224 | -} | 238 | + at::ScalarType calculate_type = at::native::result_type(other, self); |
| 225 | - | 239 | + at::Tensor other_cast = (other.dtype() == calculate_type) ? other : |
| 226 | -at::Tensor remainder(const at::Scalar& self, const at::Tensor& other) { | 240 | + at_npu::native::custom_ops::npu_dtype_cast(other, calculate_type); |
| 227 | - at::ScalarType calculate_type = at::native::result_type(other, self); | 241 | + at::Tensor result = npu_preparation::apply_tensor(other_cast); |
| 228 | - at::Tensor other_cast = (other.dtype() == calculate_type) ? other : | 242 | + remainder_out_scalar_npu_nocheck(result, self, other_cast); |
| 229 | - at_npu::native::custom_ops::npu_dtype_cast(other, calculate_type); | 243 | + return result; |
| 230 | - at::Tensor result = npu_preparation::apply_tensor(other_cast); | ||
| 231 | - remainder_out_scalar_npu_nocheck(result, self, other_cast); | ||
| 232 | - return result; | ||
| 233 | } | 244 | } |
| 234 | } // namespace acl_op | 245 | } // namespace acl_op |
| @@ -27,26 +27,27 @@ at::SmallVector<int64_t, SIZE> upsample_trilinear3d_backward_infer_size( | |||
| 27 | at::IntArrayRef input_size, | 27 | at::IntArrayRef input_size, |
| 28 | c10::optional<double> scales_d, | 28 | c10::optional<double> scales_d, |
| 29 | c10::optional<double> scales_h, | 29 | c10::optional<double> scales_h, |
| 30 | - c10::optional<double> scales_w) { | 30 | + c10::optional<double> scales_w) |
| 31 | - TORCH_CHECK( | 31 | +{ |
| 32 | - output_size.size() == 3, | 32 | + TORCH_CHECK( |
| 33 | - "It is expected output_size equals to 3, but got size ", | 33 | + output_size.size() == 3, |
| 34 | - output_size.size(), OPS_ERROR(ErrCode::PARAM)); | 34 | + "It is expected output_size equals to 3, but got size ", |
| 35 | + output_size.size(), OPS_ERROR(ErrCode::PARAM)); | ||
| 35 | 36 | ||
| 36 | - TORCH_CHECK( | 37 | + TORCH_CHECK( |
| 37 | - input_size.size() == 5, | 38 | + input_size.size() == 5, |
| 38 | - "It is expected input_size equals to 5, but got size ", | 39 | + "It is expected input_size equals to 5, but got size ", |
| 39 | - input_size.size(), OPS_ERROR(ErrCode::PARAM)); | 40 | + input_size.size(), OPS_ERROR(ErrCode::PARAM)); |
| 40 | 41 | ||
| 41 | - int64_t nbatch = input_size[0]; | 42 | + int64_t nbatch = input_size[0]; |
| 42 | - int64_t channels = input_size[1]; | 43 | + int64_t channels = input_size[1]; |
| 43 | - int64_t input_depth = input_size[2]; | 44 | + int64_t input_depth = input_size[2]; |
| 44 | - int64_t input_height = input_size[3]; | 45 | + int64_t input_height = input_size[3]; |
| 45 | - int64_t input_width = input_size[4]; | 46 | + int64_t input_width = input_size[4]; |
| 46 | 47 | ||
| 47 | - at::SmallVector<int64_t, SIZE> output_sizes = | 48 | + at::SmallVector<int64_t, SIZE> output_sizes = |
| 48 | - {nbatch, channels, input_depth, input_height, input_width}; | 49 | + {nbatch, channels, input_depth, input_height, input_width}; |
| 49 | - return output_sizes; | 50 | + return output_sizes; |
| 50 | } | 51 | } |
| 51 | 52 | ||
| 52 | at::Tensor& upsample_trilinear3d_backward_out_nocheck( | 53 | at::Tensor& upsample_trilinear3d_backward_out_nocheck( |
| @@ -57,17 +58,18 @@ at::Tensor& upsample_trilinear3d_backward_out_nocheck( | |||
| 57 | bool align_corners, | 58 | bool align_corners, |
| 58 | c10::optional<double> scales_d, | 59 | c10::optional<double> scales_d, |
| 59 | c10::optional<double> scales_h, | 60 | c10::optional<double> scales_h, |
| 60 | - c10::optional<double> scales_w) { | 61 | + c10::optional<double> scales_w) |
| 61 | - at_npu::native::OpCommand cmd; | 62 | +{ |
| 62 | - cmd.Name("UpsampleTrilinear3dGrad") | 63 | + at_npu::native::OpCommand cmd; |
| 63 | - .Input(grad_output) | 64 | + cmd.Name("UpsampleTrilinear3dGrad") |
| 64 | - .Output(out) | 65 | + .Input(grad_output) |
| 65 | - .Attr("input_size", input_size) | 66 | + .Output(out) |
| 66 | - .Attr("output_size", output_size) | 67 | + .Attr("input_size", input_size) |
| 67 | - .Attr("align_corners", align_corners) | 68 | + .Attr("output_size", output_size) |
| 68 | - .Run(); | 69 | + .Attr("align_corners", align_corners) |
| 70 | + .Run(); | ||
| 69 | 71 | ||
| 70 | - return out; | 72 | + return out; |
| 71 | } | 73 | } |
| 72 | } // namespace | 74 | } // namespace |
| 73 | 75 | ||
| @@ -79,25 +81,26 @@ at::Tensor& upsample_trilinear3d_backward_out( | |||
| 79 | c10::optional<double> scales_d, | 81 | c10::optional<double> scales_d, |
| 80 | c10::optional<double> scales_h, | 82 | c10::optional<double> scales_h, |
| 81 | c10::optional<double> scales_w, | 83 | c10::optional<double> scales_w, |
| 82 | - at::Tensor& grad_input) { | 84 | + at::Tensor& grad_input) |
| 83 | - auto op_infer_output_size = upsample_trilinear3d_backward_infer_size( | 85 | +{ |
| 84 | - output_size, input_size, scales_d, scales_h, scales_w); | 86 | + auto op_infer_output_size = upsample_trilinear3d_backward_infer_size( |
| 85 | - npu_preparation::CheckOut( | 87 | + output_size, input_size, scales_d, scales_h, scales_w); |
| 86 | - {grad_output}, | 88 | + npu_preparation::CheckOut( |
| 87 | - grad_input, | 89 | + {grad_output}, |
| 88 | - grad_output, | 90 | + grad_input, |
| 89 | - op_infer_output_size); | 91 | + grad_output, |
| 92 | + op_infer_output_size); | ||
| 90 | 93 | ||
| 91 | - if (!npu_utils::check_match(&grad_input)) { | 94 | + if (!npu_utils::check_match(&grad_input)) { |
| 92 | - auto contiguous_out = npu_utils::format_contiguous(grad_input); | 95 | + auto contiguous_out = npu_utils::format_contiguous(grad_input); |
| 93 | - upsample_trilinear3d_backward_out_nocheck( | 96 | + upsample_trilinear3d_backward_out_nocheck( |
| 94 | - grad_input, grad_output, output_size, input_size, align_corners, scales_d, scales_h, scales_w); | 97 | + grad_input, grad_output, output_size, input_size, align_corners, scales_d, scales_h, scales_w); |
| 95 | - npu_utils::format_fresh_view(grad_input, contiguous_out); | 98 | + npu_utils::format_fresh_view(grad_input, contiguous_out); |
| 96 | - } else { | 99 | + } else { |
| 97 | - upsample_trilinear3d_backward_out_nocheck( | 100 | + upsample_trilinear3d_backward_out_nocheck( |
| 98 | - grad_input, grad_output, output_size, input_size, align_corners, scales_d, scales_h, scales_w); | 101 | + grad_input, grad_output, output_size, input_size, align_corners, scales_d, scales_h, scales_w); |
| 99 | - } | 102 | + } |
| 100 | - return grad_input; | 103 | + return grad_input; |
| 101 | } | 104 | } |
| 102 | 105 | ||
| 103 | at::Tensor upsample_trilinear3d_backward( | 106 | at::Tensor upsample_trilinear3d_backward( |
| @@ -107,13 +110,14 @@ at::Tensor upsample_trilinear3d_backward( | |||
| 107 | bool align_corners, | 110 | bool align_corners, |
| 108 | c10::optional<double> scales_d, | 111 | c10::optional<double> scales_d, |
| 109 | c10::optional<double> scales_h, | 112 | c10::optional<double> scales_h, |
| 110 | - c10::optional<double> scales_w) { | 113 | + c10::optional<double> scales_w) |
| 111 | - auto op_infer_output_size = upsample_trilinear3d_backward_infer_size( | 114 | +{ |
| 112 | - output_size, input_size, scales_d, scales_h, scales_w); | 115 | + auto op_infer_output_size = upsample_trilinear3d_backward_infer_size( |
| 113 | - at::Tensor result = npu_preparation::apply_tensor(grad_output, op_infer_output_size); | 116 | + output_size, input_size, scales_d, scales_h, scales_w); |
| 114 | - upsample_trilinear3d_backward_out_nocheck( | 117 | + at::Tensor result = npu_preparation::apply_tensor(grad_output, op_infer_output_size); |
| 115 | - result, grad_output, output_size, input_size, align_corners, scales_d, scales_h, scales_w); | 118 | + upsample_trilinear3d_backward_out_nocheck( |
| 116 | - return result; | 119 | + result, grad_output, output_size, input_size, align_corners, scales_d, scales_h, scales_w); |
| 120 | + return result; | ||
| 117 | } | 121 | } |
| 118 | 122 | ||
| 119 | 123 | ||
| @@ -122,19 +126,20 @@ at::Tensor upsample_trilinear3d_backward( | |||
| 122 | c10::optional<at::IntArrayRef> output_size, | 126 | c10::optional<at::IntArrayRef> output_size, |
| 123 | at::IntArrayRef input_size, | 127 | at::IntArrayRef input_size, |
| 124 | bool align_corners, | 128 | bool align_corners, |
| 125 | - c10::optional<at::ArrayRef<double>> scale_factors) { | 129 | + c10::optional<at::ArrayRef<double>> scale_factors) |
| 130 | +{ | ||
| 126 | TORCH_CHECK( | 131 | TORCH_CHECK( |
| 127 | input_size.size() == 5, | 132 | input_size.size() == 5, |
| 128 | "It is expected input_size equals to 5, but got size ", | 133 | "It is expected input_size equals to 5, but got size ", |
| 129 | input_size.size(), OPS_ERROR(ErrCode::PARAM)); | 134 | input_size.size(), OPS_ERROR(ErrCode::PARAM)); |
| 130 | 135 | ||
| 131 | - auto osize = op_infer::upsample_infershape_with_scale(input_size, output_size, scale_factors); | 136 | + auto osize = op_infer::upsample_infershape_with_scale(input_size, output_size, scale_factors); |
| 132 | - auto scales_d = op_plugin::utils::get_scale_value(scale_factors, 0); | 137 | + auto scales_d = op_plugin::utils::get_scale_value(scale_factors, 0); |
| 133 | - auto scales_h = op_plugin::utils::get_scale_value(scale_factors, 1); | 138 | + auto scales_h = op_plugin::utils::get_scale_value(scale_factors, 1); |
| 134 | - auto scales_w = op_plugin::utils::get_scale_value(scale_factors, 2); | 139 | + auto scales_w = op_plugin::utils::get_scale_value(scale_factors, 2); |
| 135 | 140 | ||
| 136 | - return acl_op::upsample_trilinear3d_backward( | 141 | + return acl_op::upsample_trilinear3d_backward( |
| 137 | - grad_output, osize, input_size, align_corners, scales_d, scales_h, scales_w); | 142 | + grad_output, osize, input_size, align_corners, scales_d, scales_h, scales_w); |
| 138 | } | 143 | } |
| 139 | 144 | ||
| 140 | 145 | ||
| @@ -21,134 +21,143 @@ using npu_preparation = at_npu::native::OpPreparation; | |||
| 21 | using npu_op_command = at_npu::native::OpCommand; | 21 | using npu_op_command = at_npu::native::OpCommand; |
| 22 | 22 | ||
| 23 | namespace { | 23 | namespace { |
| 24 | -at::Tensor& not_out_npu(at::Tensor& result, const at::Tensor& self) { | 24 | +at::Tensor& not_out_npu(at::Tensor& result, const at::Tensor& self) |
| 25 | - npu_op_command cmd; | 25 | +{ |
| 26 | - cmd.Name("LogicalNot") | ||
| 27 | - .Input(self) | ||
| 28 | - .Output(result) | ||
| 29 | - .Run(); | ||
| 30 | - return result; | ||
| 31 | -} | ||
| 32 | - | ||
| 33 | -at::Tensor& not_out_npu(at::Tensor& result, const at::Scalar self) { | ||
| 34 | - npu_op_command cmd; | ||
| 35 | - cmd.Name("LogicalNot") | ||
| 36 | - .Input(self, self.type()) | ||
| 37 | - .Output(result) | ||
| 38 | - .Run(); | ||
| 39 | - return result; | ||
| 40 | -} | ||
| 41 | - | ||
| 42 | -at::Tensor& and_out_npu(at::Tensor& result, const at::Tensor& self, const at::Tensor& other) { | ||
| 43 | - npu_op_command cmd; | ||
| 44 | - cmd.Name("LogicalAnd") | ||
| 45 | - .Input(self) | ||
| 46 | - .Input(other) | ||
| 47 | - .Output(result) | ||
| 48 | - .Run(); | ||
| 49 | - return result; | ||
| 50 | -} | ||
| 51 | - | ||
| 52 | -at::Tensor& and_out_npu(at::Tensor& result, const at::Tensor& self, const at::Scalar& other) { | ||
| 53 | - npu_op_command cmd; | ||
| 54 | - cmd.Name("LogicalAnd") | ||
| 55 | - .Input(self) | ||
| 56 | - .Input(other, self.scalar_type()) | ||
| 57 | - .Output(result) | ||
| 58 | - .Run(); | ||
| 59 | - return result; | ||
| 60 | -} | ||
| 61 | - | ||
| 62 | -at::Tensor& or_out_npu(at::Tensor& result, const at::Tensor& self, const at::Scalar& other) { | ||
| 63 | - npu_op_command cmd; | ||
| 64 | - cmd.Name("LogicalOr") | ||
| 65 | - .Input(self) | ||
| 66 | - .Input(other, self.scalar_type()) | ||
| 67 | - .Output(result) | ||
| 68 | - .Run(); | ||
| 69 | - return result; | ||
| 70 | -} | ||
| 71 | - | ||
| 72 | -at::Tensor& xor_out_npu( | ||
| 73 | - at::Tensor& result, | ||
| 74 | - const at::Tensor& self, | ||
| 75 | - const at::Tensor& other) { | ||
| 76 | - auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); | ||
| 77 | - if (self.dtype() == at::ScalarType::Bool) { | ||
| 78 | - auto not_self_result = npu_preparation::apply_tensor(self, output_size); | ||
| 79 | - not_out_npu(not_self_result, self); | ||
| 80 | - | ||
| 81 | - auto not_other_result = npu_preparation::apply_tensor(self, output_size); | ||
| 82 | - not_out_npu(not_other_result, other); | ||
| 83 | - | ||
| 84 | - auto not_self_and_other = npu_preparation::apply_tensor(self, output_size); | ||
| 85 | - and_out_npu(not_self_and_other, not_self_result, other); | ||
| 86 | - | ||
| 87 | - auto self_and_not_other = npu_preparation::apply_tensor(self, output_size); | ||
| 88 | - and_out_npu(self_and_not_other, self, not_other_result); | ||
| 89 | - | ||
| 90 | npu_op_command cmd; | 26 | npu_op_command cmd; |
| 91 | - cmd.Name("LogicalOr") | 27 | + cmd.Name("LogicalNot") |
| 92 | - .Input(not_self_and_other) | 28 | + .Input(self) |
| 93 | - .Input(self_and_not_other) | ||
| 94 | .Output(result) | 29 | .Output(result) |
| 95 | .Run(); | 30 | .Run(); |
| 96 | - } else { | 31 | + return result; |
| 32 | +} | ||
| 33 | + | ||
| 34 | +at::Tensor& not_out_npu(at::Tensor& result, const at::Scalar self) | ||
| 35 | +{ | ||
| 97 | npu_op_command cmd; | 36 | npu_op_command cmd; |
| 98 | - cmd.Name("BitwiseXor") | 37 | + cmd.Name("LogicalNot") |
| 38 | + .Input(self, self.type()) | ||
| 39 | + .Output(result) | ||
| 40 | + .Run(); | ||
| 41 | + return result; | ||
| 42 | +} | ||
| 43 | + | ||
| 44 | +at::Tensor& and_out_npu(at::Tensor& result, const at::Tensor& self, const at::Tensor& other) | ||
| 45 | +{ | ||
| 46 | + npu_op_command cmd; | ||
| 47 | + cmd.Name("LogicalAnd") | ||
| 99 | .Input(self) | 48 | .Input(self) |
| 100 | .Input(other) | 49 | .Input(other) |
| 101 | .Output(result) | 50 | .Output(result) |
| 102 | .Run(); | 51 | .Run(); |
| 103 | - } | 52 | + return result; |
| 104 | - return result; | 53 | +} |
| 54 | + | ||
| 55 | +at::Tensor& and_out_npu(at::Tensor& result, const at::Tensor& self, const at::Scalar& other) | ||
| 56 | +{ | ||
| 57 | + npu_op_command cmd; | ||
| 58 | + cmd.Name("LogicalAnd") | ||
| 59 | + .Input(self) | ||
| 60 | + .Input(other, self.scalar_type()) | ||
| 61 | + .Output(result) | ||
| 62 | + .Run(); | ||
| 63 | + return result; | ||
| 64 | +} | ||
| 65 | + | ||
| 66 | +at::Tensor& or_out_npu(at::Tensor& result, const at::Tensor& self, const at::Scalar& other) | ||
| 67 | +{ | ||
| 68 | + npu_op_command cmd; | ||
| 69 | + cmd.Name("LogicalOr") | ||
| 70 | + .Input(self) | ||
| 71 | + .Input(other, self.scalar_type()) | ||
| 72 | + .Output(result) | ||
| 73 | + .Run(); | ||
| 74 | + return result; | ||
| 105 | } | 75 | } |
| 106 | 76 | ||
| 107 | at::Tensor& xor_out_npu( | 77 | at::Tensor& xor_out_npu( |
| 108 | at::Tensor& result, | 78 | at::Tensor& result, |
| 109 | const at::Tensor& self, | 79 | const at::Tensor& self, |
| 110 | - const at::Scalar& other) { | 80 | + const at::Tensor& other) |
| 111 | - if (self.dtype() == at::ScalarType::Bool) { | 81 | +{ |
| 112 | - auto not_self_result = npu_preparation::apply_tensor(self); | 82 | + auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); |
| 113 | - not_out_npu(not_self_result, self); | 83 | + if (self.dtype() == at::ScalarType::Bool) { |
| 84 | + auto not_self_result = npu_preparation::apply_tensor(self, output_size); | ||
| 85 | + not_out_npu(not_self_result, self); | ||
| 114 | 86 | ||
| 115 | - auto not_self_or_other = npu_preparation::apply_tensor(self); | 87 | + auto not_other_result = npu_preparation::apply_tensor(self, output_size); |
| 116 | - or_out_npu(not_self_or_other, not_self_result, other); | 88 | + not_out_npu(not_other_result, other); |
| 117 | 89 | ||
| 118 | - auto not_not_self_or_other = npu_preparation::apply_tensor(self); | 90 | + auto not_self_and_other = npu_preparation::apply_tensor(self, output_size); |
| 119 | - not_out_npu(not_not_self_or_other, not_self_or_other); | 91 | + and_out_npu(not_self_and_other, not_self_result, other); |
| 120 | 92 | ||
| 121 | - auto not_self_and_other = npu_preparation::apply_tensor(self); | 93 | + auto self_and_not_other = npu_preparation::apply_tensor(self, output_size); |
| 122 | - and_out_npu(not_self_and_other, not_self_result, other); | 94 | + and_out_npu(self_and_not_other, self, not_other_result); |
| 123 | 95 | ||
| 124 | - npu_op_command cmd; | 96 | + npu_op_command cmd; |
| 125 | - cmd.Name("LogicalOr") | 97 | + cmd.Name("LogicalOr") |
| 126 | - .Input(not_self_and_other) | 98 | + .Input(not_self_and_other) |
| 127 | - .Input(not_not_self_or_other) | 99 | + .Input(self_and_not_other) |
| 128 | - .Output(result) | 100 | + .Output(result) |
| 129 | - .Run(); | 101 | + .Run(); |
| 130 | - } else { | 102 | + } else { |
| 131 | - npu_op_command cmd; | 103 | + npu_op_command cmd; |
| 132 | - cmd.Name("BitwiseXor") | 104 | + cmd.Name("BitwiseXor") |
| 133 | - .Input(self) | 105 | + .Input(self) |
| 134 | - .Input(other, self.scalar_type()) | 106 | + .Input(other) |
| 135 | - .Output(result) | 107 | + .Output(result) |
| 136 | - .Run(); | 108 | + .Run(); |
| 137 | - } | 109 | + } |
| 138 | - return result; | 110 | + return result; |
| 111 | +} | ||
| 112 | + | ||
| 113 | +at::Tensor& xor_out_npu( | ||
| 114 | + at::Tensor& result, | ||
| 115 | + const at::Tensor& self, | ||
| 116 | + const at::Scalar& other) | ||
| 117 | +{ | ||
| 118 | + if (self.dtype() == at::ScalarType::Bool) { | ||
| 119 | + auto not_self_result = npu_preparation::apply_tensor(self); | ||
| 120 | + not_out_npu(not_self_result, self); | ||
| 121 | + | ||
| 122 | + auto not_self_or_other = npu_preparation::apply_tensor(self); | ||
| 123 | + or_out_npu(not_self_or_other, not_self_result, other); | ||
| 124 | + | ||
| 125 | + auto not_not_self_or_other = npu_preparation::apply_tensor(self); | ||
| 126 | + not_out_npu(not_not_self_or_other, not_self_or_other); | ||
| 127 | + | ||
| 128 | + auto not_self_and_other = npu_preparation::apply_tensor(self); | ||
| 129 | + and_out_npu(not_self_and_other, not_self_result, other); | ||
| 130 | + | ||
| 131 | + npu_op_command cmd; | ||
| 132 | + cmd.Name("LogicalOr") | ||
| 133 | + .Input(not_self_and_other) | ||
| 134 | + .Input(not_not_self_or_other) | ||
| 135 | + .Output(result) | ||
| 136 | + .Run(); | ||
| 137 | + } else { | ||
| 138 | + npu_op_command cmd; | ||
| 139 | + cmd.Name("BitwiseXor") | ||
| 140 | + .Input(self) | ||
| 141 | + .Input(other, self.scalar_type()) | ||
| 142 | + .Output(result) | ||
| 143 | + .Run(); | ||
| 144 | + } | ||
| 145 | + return result; | ||
| 139 | } | 146 | } |
| 140 | } // namespace | 147 | } // namespace |
| 141 | 148 | ||
| 142 | -at::Tensor __xor__(const at::Tensor& self, const at::Tensor& other) { | 149 | +at::Tensor __xor__(const at::Tensor& self, const at::Tensor& other) |
| 143 | - auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); | 150 | +{ |
| 144 | - at::Tensor result = npu_preparation::apply_tensor(self, output_size); | 151 | + auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); |
| 145 | - xor_out_npu(result, self, other); | 152 | + at::Tensor result = npu_preparation::apply_tensor(self, output_size); |
| 146 | - return result; | 153 | + xor_out_npu(result, self, other); |
| 154 | + return result; | ||
| 147 | } | 155 | } |
| 148 | 156 | ||
| 149 | -at::Tensor __xor__(const at::Tensor& self, const at::Scalar& other) { | 157 | +at::Tensor __xor__(const at::Tensor& self, const at::Scalar& other) |
| 150 | - at::Tensor result = npu_preparation::apply_tensor(self); | 158 | +{ |
| 151 | - xor_out_npu(result, self, other); | 159 | + at::Tensor result = npu_preparation::apply_tensor(self); |
| 152 | - return result; | 160 | + xor_out_npu(result, self, other); |
| 161 | + return result; | ||
| 153 | } | 162 | } |
| 154 | } // namespace acl_op | 163 | } // namespace acl_op |
| @@ -27,29 +27,30 @@ std::tuple<at::Tensor, at::Tensor> _ctc_loss( | |||
| 27 | at::IntArrayRef input_lengths_list, | 27 | at::IntArrayRef input_lengths_list, |
| 28 | at::IntArrayRef target_lengths_list, | 28 | at::IntArrayRef target_lengths_list, |
| 29 | int64_t blank, | 29 | int64_t blank, |
| 30 | - bool zero_infinity) { | 30 | + bool zero_infinity) |
| 31 | - DO_COMPATIBILITY(aclnnCtcLoss, acl_op::_ctc_loss(log_probs, targets, input_lengths_list, target_lengths_list, blank, | 31 | +{ |
| 32 | - zero_infinity)); | 32 | + DO_COMPATIBILITY(aclnnCtcLoss, acl_op::_ctc_loss(log_probs, targets, input_lengths_list, target_lengths_list, blank, |
| 33 | + zero_infinity)); | ||
| 33 | 34 | ||
| 34 | - int64_t max_length = 0; | 35 | + int64_t max_length = 0; |
| 35 | - for (auto &i : target_lengths_list) { | 36 | + for (auto& i : target_lengths_list) { |
| 36 | - if (i > max_length) { | 37 | + if (i > max_length) { |
| 37 | - max_length = i; | 38 | + max_length = i; |
| 39 | + } | ||
| 38 | } | 40 | } |
| 39 | - } | ||
| 40 | 41 | ||
| 41 | - // calculate the output size | 42 | + // calculate the output size |
| 42 | - auto outputSizes = op_infer::ctc_loss_npu_output_size(log_probs, max_length); | 43 | + auto outputSizes = op_infer::ctc_loss_npu_output_size(log_probs, max_length); |
| 43 | 44 | ||
| 44 | - // construct the output tensor of the NPU | 45 | + // construct the output tensor of the NPU |
| 45 | - at::Tensor neg_log_likelihood = npu_preparation::apply_tensor_without_format(log_probs, std::get<0>(outputSizes)); | 46 | + at::Tensor neg_log_likelihood = npu_preparation::apply_tensor_without_format(log_probs, std::get<0>(outputSizes)); |
| 46 | - at::Tensor log_alpha = npu_preparation::apply_tensor_without_format(log_probs, std::get<1>(outputSizes)); | 47 | + at::Tensor log_alpha = npu_preparation::apply_tensor_without_format(log_probs, std::get<1>(outputSizes)); |
| 47 | 48 | ||
| 48 | - // calculate the output result of the NPU | 49 | + // calculate the output result of the NPU |
| 49 | - EXEC_NPU_CMD(aclnnCtcLoss, log_probs, targets, input_lengths_list, target_lengths_list, | 50 | + EXEC_NPU_CMD(aclnnCtcLoss, log_probs, targets, input_lengths_list, target_lengths_list, |
| 50 | - blank, zero_infinity, neg_log_likelihood, log_alpha); | 51 | + blank, zero_infinity, neg_log_likelihood, log_alpha); |
| 51 | 52 | ||
| 52 | - return std::tuple<at::Tensor, at::Tensor>(neg_log_likelihood, log_alpha); | 53 | + return std::tuple<at::Tensor, at::Tensor>(neg_log_likelihood, log_alpha); |
| 53 | } | 54 | } |
| 54 | 55 | ||
| 55 | at::Tensor ctc_loss( | 56 | at::Tensor ctc_loss( |
| @@ -59,35 +60,36 @@ at::Tensor ctc_loss( | |||
| 59 | at::IntArrayRef target_lengths_list, | 60 | at::IntArrayRef target_lengths_list, |
| 60 | int64_t blank, | 61 | int64_t blank, |
| 61 | int64_t reduction, | 62 | int64_t reduction, |
| 62 | - bool zero_infinity) { | 63 | + bool zero_infinity) |
| 63 | - DO_COMPATIBILITY(aclnnCtcLoss, acl_op::ctc_loss(log_probs, targets, input_lengths_list, target_lengths_list, blank, | 64 | +{ |
| 64 | - reduction, zero_infinity)); | 65 | + DO_COMPATIBILITY(aclnnCtcLoss, acl_op::ctc_loss(log_probs, targets, input_lengths_list, target_lengths_list, blank, |
| 65 | - at::Tensor res = std::get<0>(at::_ctc_loss( | 66 | + reduction, zero_infinity)); |
| 66 | - log_probs, | 67 | + at::Tensor res = std::get<0>(at::_ctc_loss( |
| 67 | - targets, | 68 | + log_probs, |
| 68 | - input_lengths_list, | 69 | + targets, |
| 69 | - target_lengths_list, | 70 | + input_lengths_list, |
| 70 | - blank, | 71 | + target_lengths_list, |
| 71 | - zero_infinity)); | 72 | + blank, |
| 73 | + zero_infinity)); | ||
| 72 | 74 | ||
| 73 | - if (zero_infinity) { | 75 | + if (zero_infinity) { |
| 74 | - res = at::where( | 76 | + res = at::where( |
| 75 | - res == at::Scalar(std::numeric_limits<double>::infinity()), | 77 | + res == at::Scalar(std::numeric_limits<double>::infinity()), |
| 76 | - at::zeros({}, res.options()), | 78 | + at::zeros({}, res.options()), |
| 77 | - res); | 79 | + res); |
| 78 | - } | 80 | + } |
| 79 | 81 | ||
| 80 | - if (reduction == at::Reduction::Mean) { | 82 | + if (reduction == at::Reduction::Mean) { |
| 81 | - std::vector<int64_t> target_lengths_vector = target_lengths_list.vec(); | 83 | + std::vector<int64_t> target_lengths_vector = target_lengths_list.vec(); |
| 82 | - auto target_lengths_tensor = npu_preparation::copy_tensor_host_to_device( | 84 | + auto target_lengths_tensor = npu_preparation::copy_tensor_host_to_device( |
| 83 | - at::from_blob(target_lengths_vector.data(), {target_lengths_vector.size()}, at::kLong)).clamp_min(1); | 85 | + at::from_blob(target_lengths_vector.data(), {target_lengths_vector.size()}, at::kLong)).clamp_min(1); |
| 84 | - at::Tensor target_lengths_tensor_ = target_lengths_tensor.to(res.dtype()); | 86 | + at::Tensor target_lengths_tensor_ = target_lengths_tensor.to(res.dtype()); |
| 85 | - return (res / target_lengths_tensor_).mean(); | 87 | + return (res / target_lengths_tensor_).mean(); |
| 86 | - } else if (reduction == at::Reduction::Sum) { | 88 | + } else if (reduction == at::Reduction::Sum) { |
| 87 | - return res.sum(); | 89 | + return res.sum(); |
| 88 | - } | 90 | + } |
| 89 | 91 | ||
| 90 | - return res; | 92 | + return res; |
| 91 | } | 93 | } |
| 92 | 94 | ||
| 93 | at::Tensor ctc_loss( | 95 | at::Tensor ctc_loss( |
| @@ -37,7 +37,7 @@ void _split_and_exec_npu_cmd_mul(at::TensorList &tensors1, at::TensorList &tenso | |||
| 37 | } | 37 | } |
| 38 | 38 | ||
| 39 | size_t remaining_count = tensor_count % max_tensor_count; | 39 | size_t remaining_count = tensor_count % max_tensor_count; |
| 40 | - if (remaining_count) { | 40 | + if (remaining_count != 0) { |
| 41 | at::TensorList temp_tensors1(tensors1.data() + loop_time * max_tensor_count, remaining_count); | 41 | at::TensorList temp_tensors1(tensors1.data() + loop_time * max_tensor_count, remaining_count); |
| 42 | at::TensorList temp_tensors2(tensors2.data() + loop_time * max_tensor_count, remaining_count); | 42 | at::TensorList temp_tensors2(tensors2.data() + loop_time * max_tensor_count, remaining_count); |
| 43 | at::TensorList temp_result(result_list.data() + loop_time * max_tensor_count, remaining_count); | 43 | at::TensorList temp_result(result_list.data() + loop_time * max_tensor_count, remaining_count); |
| @@ -109,7 +109,7 @@ void _split_and_exec_npu_cmd_mul_scalarlist(at::TensorList &tensors1, at::ArrayR | |||
| 109 | } | 109 | } |
| 110 | 110 | ||
| 111 | size_t remaining_count = tensor_count % max_tensor_count; | 111 | size_t remaining_count = tensor_count % max_tensor_count; |
| 112 | - if (remaining_count) { | 112 | + if (remaining_count != 0) { |
| 113 | at::TensorList temp_tensors1(tensors1.data() + loop_time * max_tensor_count, remaining_count); | 113 | at::TensorList temp_tensors1(tensors1.data() + loop_time * max_tensor_count, remaining_count); |
| 114 | at::ArrayRef<at::Scalar> temp_scalars(scalars.data() + loop_time * max_tensor_count, remaining_count); | 114 | at::ArrayRef<at::Scalar> temp_scalars(scalars.data() + loop_time * max_tensor_count, remaining_count); |
| 115 | at::TensorList temp_result(result_list.data() + loop_time * max_tensor_count, remaining_count); | 115 | at::TensorList temp_result(result_list.data() + loop_time * max_tensor_count, remaining_count); |
| @@ -147,7 +147,8 @@ std::vector<at::Tensor> _foreach_mul(at::TensorList tensors, at::ArrayRef<at::Sc | |||
| 147 | 147 | ||
| 148 | void _foreach_mul_(at::TensorList tensors, at::ArrayRef<at::Scalar> scalars) | 148 | void _foreach_mul_(at::TensorList tensors, at::ArrayRef<at::Scalar> scalars) |
| 149 | { | 149 | { |
| 150 | - DO_COMPATIBILITY(aclnnForeachMulScalarList, at::native::foreach_tensor_mul_scalarlist_kernel_slow_(tensors, scalars)); | 150 | + DO_COMPATIBILITY(aclnnForeachMulScalarList, |
| 151 | + at::native::foreach_tensor_mul_scalarlist_kernel_slow_(tensors, scalars)); | ||
| 151 | static const bool is_support_nd_out = (c10_npu::GetSocVersion() >= c10_npu::SocVersion::Ascend910B1 && | 152 | static const bool is_support_nd_out = (c10_npu::GetSocVersion() >= c10_npu::SocVersion::Ascend910B1 && |
| 152 | c10_npu::GetSocVersion() < c10_npu::SocVersion::Ascend310B1) || | 153 | c10_npu::GetSocVersion() < c10_npu::SocVersion::Ascend310B1) || |
| 153 | (c10_npu::GetSocVersion() > c10_npu::SocVersion::Ascend310B4); | 154 | (c10_npu::GetSocVersion() > c10_npu::SocVersion::Ascend310B4); |
| @@ -19,11 +19,11 @@ | |||
| 19 | namespace op_api { | 19 | namespace op_api { |
| 20 | using npu_preparation = at_npu::native::OpPreparation; | 20 | using npu_preparation = at_npu::native::OpPreparation; |
| 21 | 21 | ||
| 22 | -at::ScalarType get_output_dtype(const at::Tensor &x1, const c10::optional<at::Tensor> &dequant_scale) | 22 | +at::ScalarType get_output_dtype(const at::Tensor& x1, const c10::optional<at::Tensor>& dequant_scale) |
| 23 | { | 23 | { |
| 24 | auto output_dtype = x1.scalar_type() == at::kChar ? at::ScalarType::Half : x1.scalar_type(); | 24 | auto output_dtype = x1.scalar_type() == at::kChar ? at::ScalarType::Half : x1.scalar_type(); |
| 25 | if (dequant_scale.has_value()) { | 25 | if (dequant_scale.has_value()) { |
| 26 | - const at::Tensor &dequant = dequant_scale.value(); | 26 | + const at::Tensor& dequant = dequant_scale.value(); |
| 27 | if (dequant.scalar_type() == at::kBFloat16) { | 27 | if (dequant.scalar_type() == at::kBFloat16) { |
| 28 | output_dtype = at::kBFloat16; | 28 | output_dtype = at::kBFloat16; |
| 29 | } | 29 | } |
| @@ -31,14 +31,14 @@ at::ScalarType get_output_dtype(const at::Tensor &x1, const c10::optional<at::Te | |||
| 31 | return output_dtype; | 31 | return output_dtype; |
| 32 | } | 32 | } |
| 33 | 33 | ||
| 34 | -void check_params(const at::Tensor &x1, const at::Tensor &x2, | 34 | +void check_params(const at::Tensor& x1, const at::Tensor& x2, |
| 35 | - const c10::optional<at::Tensor> &antiquant_scale, | 35 | + const c10::optional<at::Tensor>& antiquant_scale, |
| 36 | - const c10::optional<at::Tensor> &antiquant_offset, | 36 | + const c10::optional<at::Tensor>& antiquant_offset, |
| 37 | - const c10::optional<at::Tensor> &x3, | 37 | + const c10::optional<at::Tensor>& x3, |
| 38 | - const c10::optional<at::Tensor> &dequant_scale, | 38 | + const c10::optional<at::Tensor>& dequant_scale, |
| 39 | - const c10::optional<at::Tensor> &pertoken_scale, | 39 | + const c10::optional<at::Tensor>& pertoken_scale, |
| 40 | - const c10::optional<at::Tensor> &comm_quant_scale_1, | 40 | + const c10::optional<at::Tensor>& comm_quant_scale_1, |
| 41 | - const c10::optional<at::Tensor> &comm_quant_scale_2) | 41 | + const c10::optional<at::Tensor>& comm_quant_scale_2) |
| 42 | { | 42 | { |
| 43 | // check shape: shape of x1:[s,m,k], shape of x2:[k,n], k_x1 == k_x2 | 43 | // check shape: shape of x1:[s,m,k], shape of x2:[k,n], k_x1 == k_x2 |
| 44 | TORCH_CHECK(x2.dim() == 2, "x2 needs to be 2D, but got: ", x2.dim(), "D", OPS_ERROR(ErrCode::VALUE)); | 44 | TORCH_CHECK(x2.dim() == 2, "x2 needs to be 2D, but got: ", x2.dim(), "D", OPS_ERROR(ErrCode::VALUE)); |
| @@ -76,7 +76,7 @@ void check_params(const at::Tensor &x1, const at::Tensor &x2, | |||
| 76 | output_size[x1.dim() - 1] = x2.size(1); | 76 | output_size[x1.dim() - 1] = x2.size(1); |
| 77 | // A8W8: dtype of output should be half or bfloat16. | 77 | // A8W8: dtype of output should be half or bfloat16. |
| 78 | auto output_dtype = get_output_dtype(x1, dequant_scale); | 78 | auto output_dtype = get_output_dtype(x1, dequant_scale); |
| 79 | - const at::Tensor &x3_real = x3.value(); | 79 | + const at::Tensor& x3_real = x3.value(); |
| 80 | TORCH_CHECK(x3_real.sizes().equals(output_size), "x3 with shape ", x3_real.sizes(), | 80 | TORCH_CHECK(x3_real.sizes().equals(output_size), "x3 with shape ", x3_real.sizes(), |
| 81 | " doesn't match the output shape ", output_size, OPS_ERROR(ErrCode::PARAM)); | 81 | " doesn't match the output shape ", output_size, OPS_ERROR(ErrCode::PARAM)); |
| 82 | TORCH_CHECK(x3_real.scalar_type() == output_dtype, "x3 with dtype ", x3_real.scalar_type(), | 82 | TORCH_CHECK(x3_real.scalar_type() == output_dtype, "x3 with dtype ", x3_real.scalar_type(), |
| @@ -88,7 +88,7 @@ void check_params(const at::Tensor &x1, const at::Tensor &x2, | |||
| 88 | TORCH_CHECK((dequant_scale.has_value()), | 88 | TORCH_CHECK((dequant_scale.has_value()), |
| 89 | "when has pertoken_scale, dequantScale shoulden't be null", OPS_ERROR(ErrCode::TYPE)); | 89 | "when has pertoken_scale, dequantScale shoulden't be null", OPS_ERROR(ErrCode::TYPE)); |
| 90 | 90 | ||
| 91 | - const at::Tensor &pertoken_scale_real = pertoken_scale.value(); | 91 | + const at::Tensor& pertoken_scale_real = pertoken_scale.value(); |
| 92 | TORCH_CHECK(pertoken_scale_real.dim() == 1, "pertoken_scale with shape ", pertoken_scale_real.sizes(), | 92 | TORCH_CHECK(pertoken_scale_real.dim() == 1, "pertoken_scale with shape ", pertoken_scale_real.sizes(), |
| 93 | " pertoken_scale dim should be 1.", OPS_ERROR(ErrCode::PARAM)); | 93 | " pertoken_scale dim should be 1.", OPS_ERROR(ErrCode::PARAM)); |
| 94 | 94 | ||
| @@ -109,8 +109,8 @@ void check_params(const at::Tensor &x1, const at::Tensor &x2, | |||
| 109 | (!comm_quant_scale_1.has_value() && !comm_quant_scale_2.has_value()), | 109 | (!comm_quant_scale_1.has_value() && !comm_quant_scale_2.has_value()), |
| 110 | "comm_quant_scale_1 and comm_quant_scale_2 should both be null or not null", OPS_ERROR(ErrCode::TYPE)); | 110 | "comm_quant_scale_1 and comm_quant_scale_2 should both be null or not null", OPS_ERROR(ErrCode::TYPE)); |
| 111 | if (comm_quant_scale_1.has_value() && comm_quant_scale_2.has_value()) { | 111 | if (comm_quant_scale_1.has_value() && comm_quant_scale_2.has_value()) { |
| 112 | - const at::Tensor &comm_quant_scale_1_real = comm_quant_scale_1.value(); | 112 | + const at::Tensor& comm_quant_scale_1_real = comm_quant_scale_1.value(); |
| 113 | - const at::Tensor &comm_quant_scale_2_real = comm_quant_scale_2.value(); | 113 | + const at::Tensor& comm_quant_scale_2_real = comm_quant_scale_2.value(); |
| 114 | TORCH_CHECK((comm_quant_scale_1_real.dim() == 2 && comm_quant_scale_2_real.dim() == 2) || (comm_quant_scale_1_real.dim() == 1 && | 114 | TORCH_CHECK((comm_quant_scale_1_real.dim() == 2 && comm_quant_scale_2_real.dim() == 2) || (comm_quant_scale_1_real.dim() == 1 && |
| 115 | comm_quant_scale_2_real.dim() == 1), "comm_quant_scale_1 and comm_quant_scale_2 both need to be 1D or 2D, but got: comm_quant_scale_1", | 115 | comm_quant_scale_2_real.dim() == 1), "comm_quant_scale_1 and comm_quant_scale_2 both need to be 1D or 2D, but got: comm_quant_scale_1", |
| 116 | comm_quant_scale_1_real.dim(), "D, comm_quant_scale_2", comm_quant_scale_2_real.dim(), "D", OPS_ERROR(ErrCode::VALUE)); | 116 | comm_quant_scale_1_real.dim(), "D, comm_quant_scale_2", comm_quant_scale_2_real.dim(), "D", OPS_ERROR(ErrCode::VALUE)); |
| @@ -126,14 +126,14 @@ void check_params(const at::Tensor &x1, const at::Tensor &x2, | |||
| 126 | } | 126 | } |
| 127 | } | 127 | } |
| 128 | 128 | ||
| 129 | -at::Tensor npu_mm_all_reduce_base(const at::Tensor &x1, const at::Tensor &x2, c10::string_view hcom, | 129 | +at::Tensor npu_mm_all_reduce_base(const at::Tensor& x1, const at::Tensor& x2, c10::string_view hcom, |
| 130 | - c10::string_view reduce_op, const c10::optional<at::Tensor> &bias, | 130 | + c10::string_view reduce_op, const c10::optional<at::Tensor>& bias, |
| 131 | - const c10::optional<at::Tensor> &antiquant_scale, | 131 | + const c10::optional<at::Tensor>& antiquant_scale, |
| 132 | - const c10::optional<at::Tensor> &antiquant_offset, | 132 | + const c10::optional<at::Tensor>& antiquant_offset, |
| 133 | - const c10::optional<at::Tensor> &x3, const c10::optional<at::Tensor> &dequant_scale, | 133 | + const c10::optional<at::Tensor>& x3, const c10::optional<at::Tensor>& dequant_scale, |
| 134 | - const c10::optional<at::Tensor> &pertoken_scale, | 134 | + const c10::optional<at::Tensor>& pertoken_scale, |
| 135 | - const c10::optional<at::Tensor> &comm_quant_scale_1, | 135 | + const c10::optional<at::Tensor>& comm_quant_scale_1, |
| 136 | - const c10::optional<at::Tensor> &comm_quant_scale_2, | 136 | + const c10::optional<at::Tensor>& comm_quant_scale_2, |
| 137 | int64_t antiquant_group_size, int64_t comm_turn) | 137 | int64_t antiquant_group_size, int64_t comm_turn) |
| 138 | { | 138 | { |
| 139 | check_params(x1, x2, antiquant_scale, antiquant_offset, x3, dequant_scale, pertoken_scale, comm_quant_scale_1, comm_quant_scale_2); | 139 | check_params(x1, x2, antiquant_scale, antiquant_offset, x3, dequant_scale, pertoken_scale, comm_quant_scale_1, comm_quant_scale_2); |
| @@ -144,12 +144,12 @@ at::Tensor npu_mm_all_reduce_base(const at::Tensor &x1, const at::Tensor &x2, c1 | |||
| 144 | auto output_dtype = get_output_dtype(x1, dequant_scale); | 144 | auto output_dtype = get_output_dtype(x1, dequant_scale); |
| 145 | auto result = at_npu::native::OpPreparation::apply_tensor_without_format(output_size, | 145 | auto result = at_npu::native::OpPreparation::apply_tensor_without_format(output_size, |
| 146 | x1.options().dtype(output_dtype)); | 146 | x1.options().dtype(output_dtype)); |
| 147 | - char *reduce_op_ptr = const_cast<char *>(reduce_op.data()); | 147 | + char* reduce_op_ptr = const_cast<char*>(reduce_op.data()); |
| 148 | - char *hcom_ptr = const_cast<char *>(hcom.data()); | 148 | + char* hcom_ptr = const_cast<char*>(hcom.data()); |
| 149 | - const at::Tensor &bias_real = bias.value_or(at::Tensor()); | 149 | + const at::Tensor& bias_real = bias.value_or(at::Tensor()); |
| 150 | - const at::Tensor &x3_real = x3.value_or(at::Tensor()); | 150 | + const at::Tensor& x3_real = x3.value_or(at::Tensor()); |
| 151 | - const at::Tensor &comm_quant_scale_1_real = comm_quant_scale_1.value_or(at::Tensor()); | 151 | + const at::Tensor& comm_quant_scale_1_real = comm_quant_scale_1.value_or(at::Tensor()); |
| 152 | - const at::Tensor &comm_quant_scale_2_real = comm_quant_scale_2.value_or(at::Tensor()); | 152 | + const at::Tensor& comm_quant_scale_2_real = comm_quant_scale_2.value_or(at::Tensor()); |
| 153 | int64_t stream_mode = ACL_STOP_ON_FAILURE; | 153 | int64_t stream_mode = ACL_STOP_ON_FAILURE; |
| 154 | // a8w8: x1\x2 kChar; a16w8: x2 kChar; | 154 | // a8w8: x1\x2 kChar; a16w8: x2 kChar; |
| 155 | if (!isIntegralType(x1.scalar_type()) && !isIntegralType(x2.scalar_type())) { | 155 | if (!isIntegralType(x1.scalar_type()) && !isIntegralType(x2.scalar_type())) { |
| @@ -160,14 +160,14 @@ at::Tensor npu_mm_all_reduce_base(const at::Tensor &x1, const at::Tensor &x2, c1 | |||
| 160 | } | 160 | } |
| 161 | } | 161 | } |
| 162 | if (isIntegralType(x1.scalar_type()) && isIntegralType(x2.scalar_type())) { | 162 | if (isIntegralType(x1.scalar_type()) && isIntegralType(x2.scalar_type())) { |
| 163 | - const at::Tensor &dequant_scale_real = dequant_scale.value_or(at::Tensor()); | 163 | + const at::Tensor& dequant_scale_real = dequant_scale.value_or(at::Tensor()); |
| 164 | if (comm_quant_scale_1.has_value() && comm_quant_scale_2.has_value()) { | 164 | if (comm_quant_scale_1.has_value() && comm_quant_scale_2.has_value()) { |
| 165 | - const at::Tensor &pertoken_scale_real = pertoken_scale.value_or(at::Tensor()); | 165 | + const at::Tensor& pertoken_scale_real = pertoken_scale.value_or(at::Tensor()); |
| 166 | EXEC_NPU_CMD(aclnnQuantMatmulAllReduceV3, x1, x2, bias_real, x3_real, dequant_scale_real, | 166 | EXEC_NPU_CMD(aclnnQuantMatmulAllReduceV3, x1, x2, bias_real, x3_real, dequant_scale_real, |
| 167 | pertoken_scale_real, comm_quant_scale_1_real, comm_quant_scale_2_real, hcom_ptr, | 167 | pertoken_scale_real, comm_quant_scale_1_real, comm_quant_scale_2_real, hcom_ptr, |
| 168 | reduce_op_ptr, comm_turn, stream_mode, result); | 168 | reduce_op_ptr, comm_turn, stream_mode, result); |
| 169 | } else if (pertoken_scale.has_value()) { | 169 | } else if (pertoken_scale.has_value()) { |
| 170 | - const at::Tensor &pertoken_scale_real = pertoken_scale.value_or(at::Tensor()); | 170 | + const at::Tensor& pertoken_scale_real = pertoken_scale.value_or(at::Tensor()); |
| 171 | EXEC_NPU_CMD(aclnnQuantMatmulAllReduceV2, x1, x2, bias_real, x3_real, dequant_scale_real, pertoken_scale_real, hcom_ptr, reduce_op_ptr, | 171 | EXEC_NPU_CMD(aclnnQuantMatmulAllReduceV2, x1, x2, bias_real, x3_real, dequant_scale_real, pertoken_scale_real, hcom_ptr, reduce_op_ptr, |
| 172 | comm_turn, stream_mode, result); | 172 | comm_turn, stream_mode, result); |
| 173 | } else { | 173 | } else { |
| @@ -175,8 +175,8 @@ at::Tensor npu_mm_all_reduce_base(const at::Tensor &x1, const at::Tensor &x2, c1 | |||
| 175 | } | 175 | } |
| 176 | } | 176 | } |
| 177 | if (!isIntegralType(x1.scalar_type()) && isIntegralType(x2.scalar_type())) { | 177 | if (!isIntegralType(x1.scalar_type()) && isIntegralType(x2.scalar_type())) { |
| 178 | - const at::Tensor &antiquant_scale_real = antiquant_scale.value_or(at::Tensor()); | 178 | + const at::Tensor& antiquant_scale_real = antiquant_scale.value_or(at::Tensor()); |
| 179 | - const at::Tensor &antiquant_offset_real = antiquant_offset.value_or(at::Tensor()); | 179 | + const at::Tensor& antiquant_offset_real = antiquant_offset.value_or(at::Tensor()); |
| 180 | EXEC_NPU_CMD(aclnnWeightQuantMatmulAllReduce, x1, x2, bias_real, antiquant_scale_real, antiquant_offset_real, | 180 | EXEC_NPU_CMD(aclnnWeightQuantMatmulAllReduce, x1, x2, bias_real, antiquant_scale_real, antiquant_offset_real, |
| 181 | x3_real, hcom_ptr, reduce_op_ptr, comm_turn, stream_mode, antiquant_group_size, result); | 181 | x3_real, hcom_ptr, reduce_op_ptr, comm_turn, stream_mode, antiquant_group_size, result); |
| 182 | } | 182 | } |
| @@ -19,7 +19,8 @@ | |||
| 19 | 19 | ||
| 20 | namespace op_api { | 20 | namespace op_api { |
| 21 | 21 | ||
| 22 | -at::Tensor minimum(const at::Tensor& self, const at::Tensor& other) { | 22 | +at::Tensor minimum(const at::Tensor& self, const at::Tensor& other) |
| 23 | +{ | ||
| 23 | DO_COMPATIBILITY(aclnnMinimum, acl_op::minimum(self, other)); | 24 | DO_COMPATIBILITY(aclnnMinimum, acl_op::minimum(self, other)); |
| 24 | auto result_type = at::result_type(self, other); | 25 | auto result_type = at::result_type(self, other); |
| 25 | auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); | 26 | auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); |
| @@ -28,7 +29,8 @@ at::Tensor minimum(const at::Tensor& self, const at::Tensor& other) { | |||
| 28 | return op_api::minimum_out(self, other, result); | 29 | return op_api::minimum_out(self, other, result); |
| 29 | } | 30 | } |
| 30 | 31 | ||
| 31 | -at::Tensor& minimum_out(const at::Tensor& self, const at::Tensor& other, at::Tensor& result) { | 32 | +at::Tensor& minimum_out(const at::Tensor& self, const at::Tensor& other, at::Tensor& result) |
| 33 | +{ | ||
| 32 | DO_COMPATIBILITY(aclnnMinimum, acl_op::minimum_out(self, other, result)); | 34 | DO_COMPATIBILITY(aclnnMinimum, acl_op::minimum_out(self, other, result)); |
| 33 | at::Tensor cp_other = other; | 35 | at::Tensor cp_other = other; |
| 34 | at::Tensor cp_self = self; | 36 | at::Tensor cp_self = self; |
| @@ -46,13 +48,14 @@ at::Tensor& minimum_out(const at::Tensor& self, const at::Tensor& other, at::Ten | |||
| 46 | } | 48 | } |
| 47 | 49 | ||
| 48 | 50 | ||
| 49 | -at::Tensor min(const at::Tensor& self) { | 51 | +at::Tensor min(const at::Tensor& self) |
| 50 | - DO_COMPATIBILITY(aclnnMin, acl_op::min(self)); | 52 | +{ |
| 51 | - at::SmallVector<int64_t, op_infer::SIZE> dims = op_plugin::utils::get_dimlist_for_tensor(self); | 53 | + DO_COMPATIBILITY(aclnnMin, acl_op::min(self)); |
| 52 | - auto output_size = op_infer::reduce_ops_npu_output_size(self, dims, false); | 54 | + at::SmallVector<int64_t, op_infer::SIZE> dims = op_plugin::utils::get_dimlist_for_tensor(self); |
| 53 | - at::Tensor result = at_npu::native::OpPreparation::apply_tensor_without_format(self, output_size); | 55 | + auto output_size = op_infer::reduce_ops_npu_output_size(self, dims, false); |
| 54 | - EXEC_NPU_CMD(aclnnMin, self, result); | 56 | + at::Tensor result = at_npu::native::OpPreparation::apply_tensor_without_format(self, output_size); |
| 55 | - return result; | 57 | + EXEC_NPU_CMD(aclnnMin, self, result); |
| 58 | + return result; | ||
| 56 | } | 59 | } |
| 57 | 60 | ||
| 58 | std::tuple<at::Tensor&, at::Tensor&> min_out( | 61 | std::tuple<at::Tensor&, at::Tensor&> min_out( |
| @@ -60,33 +63,36 @@ std::tuple<at::Tensor&, at::Tensor&> min_out( | |||
| 60 | int64_t dim, | 63 | int64_t dim, |
| 61 | bool keepdim, | 64 | bool keepdim, |
| 62 | at::Tensor& output, | 65 | at::Tensor& output, |
| 63 | - at::Tensor& indices) { | 66 | + at::Tensor& indices) |
| 64 | - DO_COMPATIBILITY(aclnnMinDim, acl_op::min_out(self, dim, keepdim, output, indices)); | 67 | +{ |
| 65 | - at::SmallVector<int64_t, op_infer::SIZE> dims = {dim}; | 68 | + DO_COMPATIBILITY(aclnnMinDim, acl_op::min_out(self, dim, keepdim, output, indices)); |
| 66 | - auto output_size = op_infer::reduce_ops_npu_output_size(self, dims, keepdim); | 69 | + at::SmallVector<int64_t, op_infer::SIZE> dims = {dim}; |
| 67 | - at_npu::native::OpPreparation::check_tensor({self}, output, self.scalar_type(), output_size); | 70 | + auto output_size = op_infer::reduce_ops_npu_output_size(self, dims, keepdim); |
| 68 | - at_npu::native::OpPreparation::check_tensor({self}, indices, at::ScalarType::Long, output_size); | 71 | + at_npu::native::OpPreparation::check_tensor({self}, output, self.scalar_type(), output_size); |
| 69 | - EXEC_NPU_CMD(aclnnMinDim, self, dim, keepdim, output, indices); | 72 | + at_npu::native::OpPreparation::check_tensor({self}, indices, at::ScalarType::Long, output_size); |
| 70 | - return std::tie(output, indices); | 73 | + EXEC_NPU_CMD(aclnnMinDim, self, dim, keepdim, output, indices); |
| 74 | + return std::tie(output, indices); | ||
| 71 | } | 75 | } |
| 72 | 76 | ||
| 73 | -std::tuple<at::Tensor, at::Tensor> min(const at::Tensor& self, int64_t dim, bool keepdim) { | 77 | +std::tuple<at::Tensor, at::Tensor> min(const at::Tensor& self, int64_t dim, bool keepdim) |
| 74 | - DO_COMPATIBILITY(aclnnMinDim, acl_op::min(self, dim, keepdim)); | 78 | +{ |
| 75 | - at::SmallVector<int64_t, op_infer::SIZE> dims = {dim}; | 79 | + DO_COMPATIBILITY(aclnnMinDim, acl_op::min(self, dim, keepdim)); |
| 76 | - auto output_size = op_infer::reduce_ops_npu_output_size(self, dims, keepdim); | 80 | + at::SmallVector<int64_t, op_infer::SIZE> dims = {dim}; |
| 77 | - at::Tensor outputs = at_npu::native::OpPreparation::apply_tensor_without_format(output_size, self.options()); | 81 | + auto output_size = op_infer::reduce_ops_npu_output_size(self, dims, keepdim); |
| 78 | - at::Tensor indices = at_npu::native::OpPreparation::apply_tensor_without_format( | 82 | + at::Tensor outputs = at_npu::native::OpPreparation::apply_tensor_without_format(output_size, self.options()); |
| 79 | - output_size, self.options().dtype(at::ScalarType::Long)); | 83 | + at::Tensor indices = at_npu::native::OpPreparation::apply_tensor_without_format( |
| 80 | - EXEC_NPU_CMD(aclnnMinDim, self, dim, keepdim, outputs, indices); | 84 | + output_size, self.options().dtype(at::ScalarType::Long)); |
| 81 | - return std::tie(outputs, indices); | 85 | + EXEC_NPU_CMD(aclnnMinDim, self, dim, keepdim, outputs, indices); |
| 86 | + return std::tie(outputs, indices); | ||
| 82 | } | 87 | } |
| 83 | 88 | ||
| 84 | -at::Tensor& min_out(const at::Tensor& self, const at::Tensor& other, at::Tensor& result) { | 89 | +at::Tensor& min_out(const at::Tensor& self, const at::Tensor& other, at::Tensor& result) |
| 85 | - DO_COMPATIBILITY(aclnnMinimum, acl_op::min_out(self, other, result)); | 90 | +{ |
| 86 | - auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); | 91 | + DO_COMPATIBILITY(aclnnMinimum, acl_op::min_out(self, other, result)); |
| 87 | - at_npu::native::OpPreparation::check_tensor({self, other}, result, result.scalar_type(), output_size); | 92 | + auto output_size = op_infer::broadcast_ops_npu_output_size(self, other); |
| 88 | - EXEC_NPU_CMD(aclnnMinimum, self, other, result); | 93 | + at_npu::native::OpPreparation::check_tensor({self, other}, result, result.scalar_type(), output_size); |
| 89 | - return result; | 94 | + EXEC_NPU_CMD(aclnnMinimum, self, other, result); |
| 95 | + return result; | ||
| 90 | } | 96 | } |
| 91 | 97 | ||
| 92 | std::tuple<at::Tensor&, at::Tensor&> min_out( | 98 | std::tuple<at::Tensor&, at::Tensor&> min_out( |
| @@ -94,14 +100,16 @@ std::tuple<at::Tensor&, at::Tensor&> min_out( | |||
| 94 | at::Dimname dim, | 100 | at::Dimname dim, |
| 95 | bool keepdim, | 101 | bool keepdim, |
| 96 | at::Tensor& output, | 102 | at::Tensor& output, |
| 97 | - at::Tensor& indices) { | 103 | + at::Tensor& indices) |
| 98 | - DO_COMPATIBILITY(aclnnMinDim, acl_op::min_out(self, dim, keepdim, output, indices)); | 104 | +{ |
| 99 | - return op_api::min_out(self, dimname_to_position(self, dim), keepdim, output, indices); | 105 | + DO_COMPATIBILITY(aclnnMinDim, acl_op::min_out(self, dim, keepdim, output, indices)); |
| 106 | + return op_api::min_out(self, dimname_to_position(self, dim), keepdim, output, indices); | ||
| 100 | } | 107 | } |
| 101 | 108 | ||
| 102 | -std::tuple<at::Tensor, at::Tensor> min(const at::Tensor& self, at::Dimname dim, bool keepdim) { | 109 | +std::tuple<at::Tensor, at::Tensor> min(const at::Tensor& self, at::Dimname dim, bool keepdim) |
| 103 | - DO_COMPATIBILITY(aclnnMinDim, acl_op::min(self, dim, keepdim)); | 110 | +{ |
| 104 | - return op_api::min(self, dimname_to_position(self, dim), keepdim); | 111 | + DO_COMPATIBILITY(aclnnMinDim, acl_op::min(self, dim, keepdim)); |
| 112 | + return op_api::min(self, dimname_to_position(self, dim), keepdim); | ||
| 105 | } | 113 | } |
| 106 | 114 | ||
| 107 | } | 115 | } |