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已合并
[5/N] cleancode #2302
zqwen创建于 2025年3月18日
[5/N] cleancode #2302
已合并
zqwen创建于 2025年3月18日
从refs/pull/2302/head合入到master
共 18 个文件变更+430-382
Mop_plugin/ops/aclops/KlDivBackwardKernelNpu.cpp+29-27
@@ -26,32 +26,33 @@ at::Tensor kl_div_backward(
26 const at::Tensor& self,26 const at::Tensor& self,
27 const at::Tensor& target,27 const at::Tensor& target,
28 int64_t reduction,28 int64_t reduction,
29- bool log_target) {29+ bool log_target)
30- auto output_size = op_infer::input_same_output_size(self);30+{
31- at::Tensor grad_input = npu_preparation::apply_tensor(output_size, self.options(), self);31+ auto output_size = op_infer::input_same_output_size(self);
32- std::string reduction_str;32+ at::Tensor grad_input = npu_preparation::apply_tensor(output_size, self.options(), self);
33- if (reduction == at::Reduction::Mean) {33+ std::string reduction_str;
34- reduction_str = "batchmean";34+ if (reduction == at::Reduction::Mean) {
35- } else if (reduction == at::Reduction::Sum) {35+ reduction_str = "batchmean";
36- reduction_str = "sum";36+ } else if (reduction == at::Reduction::Sum) {
37- } else if (reduction == at::Reduction::None) {37+ reduction_str = "sum";
38- reduction_str = "none";38+ } else if (reduction == at::Reduction::None) {
39- }39+ reduction_str = "none";
40- at_npu::native::OpCommand cmd;40+ }
41- cmd.Name("KlDivLossGrad")41+ at_npu::native::OpCommand cmd;
42- .Input(grad_output)42+ cmd.Name("KlDivLossGrad")
43- .Input(self)43+ .Input(grad_output)
44- .Input(target)44+ .Input(self)
45- .Output(grad_input)45+ .Input(target)
46- .Attr("reduction", reduction_str)46+ .Output(grad_input)
47- .Attr("log_target", log_target)47+ .Attr("reduction", reduction_str)
48- .Run();48+ .Attr("log_target", log_target)
49- if (reduction == at::Reduction::Mean) {49+ .Run();
50- auto input_shape = self.sizes();50+ if (reduction == at::Reduction::Mean) {
51- int batch_square_size = c10::multiply_integers(input_shape) / input_shape[0];51+ auto input_shape = self.sizes();
52- grad_input.div_(batch_square_size);52+ int batch_square_size = c10::multiply_integers(input_shape) / input_shape[0];
53- }53+ grad_input.div_(batch_square_size);
54- return grad_input;54+ }
55+ return grad_input;
55}56}
56#endif57#endif
57 58 
@@ -61,7 +62,8 @@ at::Tensor kl_div_backward(
61 const at::Tensor& self,62 const at::Tensor& self,
62 const at::Tensor& target,63 const at::Tensor& target,
63 int64_t reduction,64 int64_t reduction,
64- bool log_target) {65+ bool log_target)
66+{
65 auto output_size = op_infer::input_same_output_size(self);67 auto output_size = op_infer::input_same_output_size(self);
66 at::Tensor grad_input = npu_preparation::apply_tensor(output_size, self.options(), self);68 at::Tensor grad_input = npu_preparation::apply_tensor(output_size, self.options(), self);
67 std::string reduction_str = "none";69 std::string reduction_str = "none";
Mop_plugin/ops/aclops/LeakyReluKernelNpu.cpp+31-27
@@ -22,41 +22,45 @@ using npu_preparation = at_npu::native::OpPreparation;
22using npu_utils = at_npu::native::NpuUtils;22using npu_utils = at_npu::native::NpuUtils;
23 23 
24namespace {24namespace {
25-at::Tensor& leaky_relu_out_nocheck(at::Tensor& result, const at::Tensor& self, at::Scalar negval) {25+at::Tensor& leaky_relu_out_nocheck(at::Tensor& result, const at::Tensor& self, at::Scalar negval)
26- at_npu::native::OpCommand cmd;26+{
27- cmd.Name("LeakyRelu")27+ at_npu::native::OpCommand cmd;
28- .Input(self)28+ cmd.Name("LeakyRelu")
29- .Output(result)29+ .Input(self)
30- .Attr("negative_slope", negval)30+ .Output(result)
31- .Run();31+ .Attr("negative_slope", negval)
32+ .Run();
32 33 
33- return result;34+ return result;
34}35}
35} // namespace36} // namespace
36 37 
37-at::Tensor& leaky_relu_out(const at::Tensor& self, const at::Scalar& negval, at::Tensor& result) {38+at::Tensor& leaky_relu_out(const at::Tensor& self, const at::Scalar& negative_slope, at::Tensor& out)
38- npu_preparation::CheckOut(39+{
39- {self},40+ npu_preparation::CheckOut(
40- result,41+ {self},
41- self);42+ out,
43+ self);
42 44 
43- if (!npu_utils::check_match(&result)) {45+ if (!npu_utils::check_match(&out)) {
44- at::Tensor contiguous_result = npu_utils::format_contiguous(result);46+ at::Tensor contiguous_result = npu_utils::format_contiguous(out);
45- leaky_relu_out_nocheck(contiguous_result, self, negval);47+ leaky_relu_out_nocheck(contiguous_result, self, negative_slope);
46- npu_utils::format_fresh_view(result, contiguous_result);48+ npu_utils::format_fresh_view(out, contiguous_result);
47- } else {49+ } else {
48- leaky_relu_out_nocheck(result, self, negval);50+ leaky_relu_out_nocheck(out, self, negative_slope);
49- }51+ }
50- return result;52+ return out;
51}53}
52 54 
53-at::Tensor leaky_relu(const at::Tensor& self, const at::Scalar& negval) {55+at::Tensor leaky_relu(const at::Tensor& self, const at::Scalar& negative_slope)
54- at::Tensor result = npu_preparation::apply_tensor(self);56+{
55- leaky_relu_out_nocheck(result, self, negval);57+ at::Tensor result = npu_preparation::apply_tensor(self);
56- return result;58+ leaky_relu_out_nocheck(result, self, negative_slope);
59+ return result;
57}60}
58 61 
59-at::Tensor& leaky_relu_(at::Tensor& self, const at::Scalar& neg_val) {62+at::Tensor& leaky_relu_(at::Tensor& self, const at::Scalar& negative_slope)
60- return acl_op::leaky_relu_out(self, neg_val, self);63+{
64+ return acl_op::leaky_relu_out(self, negative_slope, self);
61}65}
62} // namespace acl_op66} // namespace acl_op
Mop_plugin/ops/aclops/Log10KernelNpu.cpp+34-30
@@ -22,42 +22,46 @@ using npu_preparation = at_npu::native::OpPreparation;
22using npu_utils = at_npu::native::NpuUtils;22using npu_utils = at_npu::native::NpuUtils;
23 23 
24namespace {24namespace {
25-at::Tensor& log10_out_npu_nocheck(at::Tensor& result, const at::Tensor& self) {25+at::Tensor& log10_out_npu_nocheck(at::Tensor& result, const at::Tensor& self)
26- at_npu::native::OpCommand cmd;26+{
27- cmd.Name("Log")27+ at_npu::native::OpCommand cmd;
28- .Input(self)28+ cmd.Name("Log")
29- .Output(result)29+ .Input(self)
30- .Attr("base", (float)10.0)30+ .Output(result)
31- .Attr("scale", (float)1.0)31+ .Attr("base", static_cast<float>(10.0))
32- .Attr("shift", (float)0.0)32+ .Attr("scale", static_cast<float>(1.0))
33- .Run();33+ .Attr("shift", static_cast<float>(0.0))
34- return result;34+ .Run();
35+ return result;
35}36}
36} // namespace37} // namespace
37 38 
38-at::Tensor& log10_out(const at::Tensor& self, at::Tensor& result) {39+at::Tensor& log10_out(const at::Tensor& self, at::Tensor& out)
39- npu_preparation::CheckOut(40+{
40- {self},41+ npu_preparation::CheckOut(
41- result,42+ {self},
42- self);43+ out,
44+ self);
43 45 
44- if (!npu_utils::check_match(&result)) {46+ if (!npu_utils::check_match(&out)) {
45- at::Tensor contiguous_result = npu_utils::format_contiguous(result);47+ at::Tensor contiguous_result = npu_utils::format_contiguous(out);
46- log10_out_npu_nocheck(contiguous_result, self);48+ log10_out_npu_nocheck(contiguous_result, self);
47- npu_utils::format_fresh_view(result, contiguous_result);49+ npu_utils::format_fresh_view(out, contiguous_result);
48- } else {50+ } else {
51+ log10_out_npu_nocheck(out, self);
52+ }
53+ return out;
54+}
55+ 
56+at::Tensor log10(const at::Tensor& self)
57+{
58+ at::Tensor result = npu_preparation::apply_tensor(self);
49 log10_out_npu_nocheck(result, self);59 log10_out_npu_nocheck(result, self);
50- }60+ return result;
51- return result;
52}61}
53 62 
54-at::Tensor log10(const at::Tensor& self) {63+at::Tensor& log10_(at::Tensor& self)
55- at::Tensor result = npu_preparation::apply_tensor(self);64+{
56- log10_out_npu_nocheck(result, self);65+ return acl_op::log10_out(self, self);
57- return result;
58-}
59- 
60-at::Tensor& log10_(at::Tensor& self) {
61- return acl_op::log10_out(self, self);
62}66}
63} // namespace acl_op67} // namespace acl_op
Mop_plugin/ops/aclops/MaxUnpool2dKernelNpu.cpp+7-7
@@ -77,19 +77,19 @@ at::Tensor &max_unpool2d_out_nocheck(at::Tensor &output, const at::Tensor &self,
77} // namespace77} // namespace
78 78 
79at::Tensor &max_unpool2d_out(const at::Tensor &self, const at::Tensor &indices, at::IntArrayRef output_size,79at::Tensor &max_unpool2d_out(const at::Tensor &self, const at::Tensor &indices, at::IntArrayRef output_size,
80- at::Tensor &output)80+ at::Tensor &out)
81{81{
82 max_unpool2d_check(self, indices, output_size);82 max_unpool2d_check(self, indices, output_size);
83- npu_preparation::CheckOut({self, indices}, output, self, {0});83+ npu_preparation::CheckOut({self, indices}, out, self, {0});
84- if (!npu_utils::check_match(&output)) {84+ if (!npu_utils::check_match(&out)) {
85- at::Tensor contiguous_output = npu_utils::format_contiguous(output);85+ at::Tensor contiguous_output = npu_utils::format_contiguous(out);
86 max_unpool2d_out_nocheck(contiguous_output, self, indices, output_size);86 max_unpool2d_out_nocheck(contiguous_output, self, indices, output_size);
87- npu_utils::format_fresh_view(output, contiguous_output);87+ npu_utils::format_fresh_view(out, contiguous_output);
88 } else {88 } else {
89- max_unpool2d_out_nocheck(output, self, indices, output_size);89+ max_unpool2d_out_nocheck(out, self, indices, output_size);
90 }90 }
91 91 
92- return output;92+ return out;
93}93}
94 94 
95at::Tensor max_unpool2d(const at::Tensor &self, const at::Tensor &indices, at::IntArrayRef output_size)95at::Tensor max_unpool2d(const at::Tensor &self, const at::Tensor &indices, at::IntArrayRef output_size)
Mop_plugin/ops/aclops/OnehotNpu.cpp+34-32
@@ -27,47 +27,49 @@ at::Tensor& one_hot_out_npu(
27 int64_t axis,27 int64_t axis,
28 int64_t depth,28 int64_t depth,
29 at::Scalar on_value,29 at::Scalar on_value,
30- at::Scalar off_value) {30+ at::Scalar off_value)
31- at::Tensor self_copy = at_npu::native::custom_ops::npu_dtype_cast(self, at::kInt);31+{
32- at::Tensor on_tmp = npu_preparation::apply_tensor(32+ at::Tensor self_copy = at_npu::native::custom_ops::npu_dtype_cast(self, at::kInt);
33- {1},33+ at::Tensor on_tmp = npu_preparation::apply_tensor(
34- self_copy.options().dtype(at::ScalarType::Float),34+ {1},
35- self_copy);35+ self_copy.options().dtype(at::ScalarType::Float),
36- acl_op::fill_(on_tmp, on_value);36+ self_copy);
37+ acl_op::fill_(on_tmp, on_value);
37 38 
38- at::Tensor off_tmp = npu_preparation::apply_tensor(39+ at::Tensor off_tmp = npu_preparation::apply_tensor(
39- {1},40+ {1},
40- self_copy.options().dtype(at::ScalarType::Float),41+ self_copy.options().dtype(at::ScalarType::Float),
41- self_copy);42+ self_copy);
42- acl_op::fill_(off_tmp, off_value);43+ acl_op::fill_(off_tmp, off_value);
43 44 
44- at_npu::native::OpCommand cmd;45+ at_npu::native::OpCommand cmd;
45- cmd.Name("OneHotD")46+ cmd.Name("OneHotD")
46- .Input(self_copy)47+ .Input(self_copy)
47- .Input(on_tmp)48+ .Input(on_tmp)
48- .Input(off_tmp)49+ .Input(off_tmp)
49- .Output(result)50+ .Output(result)
50- .Attr("axis", axis)51+ .Attr("axis", axis)
51- .Attr("depth", depth)52+ .Attr("depth", depth)
52- .Run();53+ .Run();
53- return result;54+ return result;
54}55}
55} // namespace56} // namespace
56 57 
57at::Tensor npu_one_hot(58at::Tensor npu_one_hot(
58 const at::Tensor& self,59 const at::Tensor& self,
59- int64_t axis,60+ int64_t num_classes,
60 int64_t depth,61 int64_t depth,
61 const at::Scalar& on_value,62 const at::Scalar& on_value,
62- const at::Scalar& off_value) {63+ const at::Scalar& off_value)
63- auto output_size = op_infer::array_to_small_vector(self.sizes());64+{
64- output_size.emplace_back(depth);65+ auto output_size = op_infer::array_to_small_vector(self.sizes());
66+ output_size.emplace_back(depth);
65 67 
66- at::Tensor result = npu_preparation::apply_tensor(68+ at::Tensor result = npu_preparation::apply_tensor(
67- output_size,69+ output_size,
68- self.options().dtype(at::ScalarType::Float),70+ self.options().dtype(at::ScalarType::Float),
69- self);71+ self);
70- one_hot_out_npu(result, self, axis, depth, on_value, off_value);72+ one_hot_out_npu(result, self, num_classes, depth, on_value, off_value);
71- return result;73+ return result;
72}74}
73} // namespace acl_op75} // namespace acl_op
Mop_plugin/ops/aclops/PsRoiPoolingKernelNpu.cpp+12-9
@@ -28,13 +28,14 @@ at::Tensor& ps_roi_pooling_npu_nocheck(
28 const at::Tensor& rois,28 const at::Tensor& rois,
29 double spatial_scale,29 double spatial_scale,
30 int64_t group_size,30 int64_t group_size,
31- int64_t output_dim) {31+ int64_t output_dim)
32+{
32 npu_op_command cmd;33 npu_op_command cmd;
33 cmd.Name("PSROIPoolingV2")34 cmd.Name("PSROIPoolingV2")
34 .Input(self, "x")35 .Input(self, "x")
35 .Input(rois)36 .Input(rois)
36 .Output(result, "y")37 .Output(result, "y")
37- .Attr("spatial_scale", (float)spatial_scale)38+ .Attr("spatial_scale", static_cast<float>(spatial_scale))
38 .Attr("output_dim", output_dim)39 .Attr("output_dim", output_dim)
39 .Attr("group_size", group_size)40 .Attr("group_size", group_size)
40 .Run();41 .Run();
@@ -51,7 +52,7 @@ at::Tensor &ps_roi_pooling_backward_npu_nocheck(at::Tensor &input_grad, const at
51 .Input(output_grad, "x")52 .Input(output_grad, "x")
52 .Input(rois)53 .Input(rois)
53 .Output(input_grad, "y")54 .Output(input_grad, "y")
54- .Attr("spatial_scale", (float)spatial_scale)55+ .Attr("spatial_scale", static_cast<float>(spatial_scale))
55 .Attr("group_size", group_size)56 .Attr("group_size", group_size)
56 .Attr("output_dim", output_dim)57 .Attr("output_dim", output_dim)
57 .Attr("input_size", input_size)58 .Attr("input_size", input_size)
@@ -80,15 +81,16 @@ at::Tensor npu_ps_roi_pooling_backward(const at::Tensor &output_grad, const at::
80#if VERSION_BETWEEN(V2R0, VERSION_NEWEST)81#if VERSION_BETWEEN(V2R0, VERSION_NEWEST)
81at::Tensor npu_ps_roi_pooling_backward_symint(const at::Tensor &output_grad, const at::Tensor &rois,82at::Tensor npu_ps_roi_pooling_backward_symint(const at::Tensor &output_grad, const at::Tensor &rois,
82 double spatial_scale, int64_t group_size, int64_t output_dim,83 double spatial_scale, int64_t group_size, int64_t output_dim,
83- c10::SymIntArrayRef input_size_symint)84+ c10::SymIntArrayRef input_size)
84{85{
85- at::IntArrayRef input_size = c10::asIntArrayRefUnchecked(input_size_symint);86+ at::IntArrayRef input_size_int = c10::asIntArrayRefUnchecked(input_size);
86- TORCH_CHECK(input_size.size() >= 2, "The length of param 'input_size' must be greater than or equal to 2." + OPS_ERROR(ErrCode::PARAM));87+ TORCH_CHECK(input_size_int.size() >= 2,
87- auto output_size = {rois.size(0), group_size * group_size * output_dim, input_size[0], input_size[1]};88+ "The length of param 'input_size' must be greater than or equal to 2." + OPS_ERROR(ErrCode::PARAM));
89+ auto output_size = {rois.size(0), group_size * group_size * output_dim, input_size_int[0], input_size_int[1]};
88 90 
89 at::Tensor input_grad = npu_preparation::apply_tensor(output_grad, output_size);91 at::Tensor input_grad = npu_preparation::apply_tensor(output_grad, output_size);
90 ps_roi_pooling_backward_npu_nocheck(input_grad, output_grad, rois, spatial_scale, group_size, output_dim,92 ps_roi_pooling_backward_npu_nocheck(input_grad, output_grad, rois, spatial_scale, group_size, output_dim,
91- input_size);93+ input_size_int);
92 94 
93 return input_grad;95 return input_grad;
94}96}
@@ -99,7 +101,8 @@ at::Tensor npu_ps_roi_pooling(
99 const at::Tensor& rois,101 const at::Tensor& rois,
100 double spatial_scale,102 double spatial_scale,
101 int64_t group_size,103 int64_t group_size,
102- int64_t output_dim) {104+ int64_t output_dim)
105+{
103 TORCH_CHECK(rois.dim() >= 3,106 TORCH_CHECK(rois.dim() >= 3,
104 "rois only supports at least 3D tensors, rois got: ", rois.dim(), "D"107 "rois only supports at least 3D tensors, rois got: ", rois.dim(), "D"
105 + OPS_ERROR(ErrCode::PARAM));108 + OPS_ERROR(ErrCode::PARAM));
Mop_plugin/ops/aclops/QuantConv2DKernelNpu.cpp+8-6
@@ -6,7 +6,6 @@
6// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.6// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
7// See the License for the specific language governing permissions and7// See the License for the specific language governing permissions and
8// limitations under the License.8// limitations under the License.
9-#include <vector>
10#include "op_plugin/AclOpsInterface.h"9#include "op_plugin/AclOpsInterface.h"
11#include "op_plugin/utils/OpAdapter.h"10#include "op_plugin/utils/OpAdapter.h"
12 11 
@@ -29,7 +28,8 @@ at::Tensor npu_quant_conv2d_out(const at::Tensor& input, const at::Tensor& weigh
29{28{
30 TORCH_CHECK(stride.size() >= ATTRS_DIM, "stride has to contain more than 2 elements, but got ", stride.size());29 TORCH_CHECK(stride.size() >= ATTRS_DIM, "stride has to contain more than 2 elements, but got ", stride.size());
31 TORCH_CHECK(pad.size() >= ATTRS_DIM, "padding has to contain more than 2 elements, but got ", pad.size());30 TORCH_CHECK(pad.size() >= ATTRS_DIM, "padding has to contain more than 2 elements, but got ", pad.size());
32- TORCH_CHECK(dilation.size() >= ATTRS_DIM, "dilation has to contain more than 2 elements, but got ", dilation.size());31+ TORCH_CHECK(dilation.size() >= ATTRS_DIM, "dilation has to contain more than 2 elements, but got ",
32+ dilation.size());
33 TORCH_CHECK(output_dtype == at::ScalarType::Half, "only support float16 as outputdtype");33 TORCH_CHECK(output_dtype == at::ScalarType::Half, "only support float16 as outputdtype");
34 34 
35 const at::Tensor &bias = c10::value_or_else(bias_opt, [] { return at::Tensor(); });35 const at::Tensor &bias = c10::value_or_else(bias_opt, [] { return at::Tensor(); });
@@ -54,9 +54,9 @@ at::Tensor npu_quant_conv2d_out(const at::Tensor& input, const at::Tensor& weigh
54 .Attr("pads", paddings)54 .Attr("pads", paddings)
55 .Attr("dilations", dilations)55 .Attr("dilations", dilations)
56 .Attr("groups", groups)56 .Attr("groups", groups)
57- .Attr("data_format", (string)"NCHW")57+ .Attr("data_format", static_cast<std::string>("NCHW"))
58 .Attr("offset_x", offset_x)58 .Attr("offset_x", offset_x)
59- .Attr("round_mode", (string)"rint")59+ .Attr("round_mode", static_cast<std::string>("rint"))
60 .Run();60 .Run();
61 61 
62 return output;62 return output;
@@ -73,7 +73,8 @@ at::Tensor npu_quant_conv2d(const at::Tensor& input, const at::Tensor& weight, c
73 TORCH_CHECK(weight.dim() >= TENSORS_DIM, "weight has to more than 4D, but got Tensor of dimension ", weight.dim());73 TORCH_CHECK(weight.dim() >= TENSORS_DIM, "weight has to more than 4D, but got Tensor of dimension ", weight.dim());
74 TORCH_CHECK(strides.size() >= ATTRS_DIM, "stride has to contain more than 2 elements, but got ", strides.size());74 TORCH_CHECK(strides.size() >= ATTRS_DIM, "stride has to contain more than 2 elements, but got ", strides.size());
75 TORCH_CHECK(pads.size() >= ATTRS_DIM, "padding has to contain more than 2 elements, but got ", pads.size());75 TORCH_CHECK(pads.size() >= ATTRS_DIM, "padding has to contain more than 2 elements, but got ", pads.size());
76- TORCH_CHECK(dilations.size() >= ATTRS_DIM, "dilation has to contain more than 2 elements, but got ", dilations.size());76+ TORCH_CHECK(dilations.size() >= ATTRS_DIM, "dilation has to contain more than 2 elements, but got ",
77+ dilations.size());
77 TORCH_CHECK(weight.size(WEIGHT_W_INDEX) != 0, "4th dim of weight cannot be 0");78 TORCH_CHECK(weight.size(WEIGHT_W_INDEX) != 0, "4th dim of weight cannot be 0");
78 TORCH_CHECK(strides[0] * strides[1] != 0, "Stride cannot contain 0")79 TORCH_CHECK(strides[0] * strides[1] != 0, "Stride cannot contain 0")
79 80 
@@ -93,7 +94,8 @@ at::Tensor npu_quant_conv2d(const at::Tensor& input, const at::Tensor& weight, c
93 c10::TensorOptions options = input.options().dtype(at::kHalf);94 c10::TensorOptions options = input.options().dtype(at::kHalf);
94 at::Tensor result = npu_preparation::apply_tensor_with_format(output_size, options, ACL_FORMAT_NCHW);95 at::Tensor result = npu_preparation::apply_tensor_with_format(output_size, options, ACL_FORMAT_NCHW);
95 96 
96- acl_op::npu_quant_conv2d_out(input, weight, scale, strides, pads, dilations, groups, offset_x, round_mode, result, output_dtype, bias, offset);97+ acl_op::npu_quant_conv2d_out(input, weight, scale, strides, pads, dilations, groups, offset_x, round_mode,
98+ result, output_dtype, bias, offset);
97 return result;99 return result;
98}100}
99#endif101#endif
Mop_plugin/ops/aclops/ReplicationPad2dBackwardKernelNpu.cpp+8-8
@@ -56,7 +56,7 @@ at::Tensor &replication_pad2d_backward_out_npu_nocheck(at::Tensor &grad_input, c
56 .Input(grad_output_cp)56 .Input(grad_output_cp)
57 .Input(vector_int, at::kInt)57 .Input(vector_int, at::kInt)
58 .Output(grad_input)58 .Output(grad_input)
59- .Attr("mode", (string) "edge")59+ .Attr("mode", static_cast<std::string>("edge"))
60 .Attr("paddings_contiguous", true)60 .Attr("paddings_contiguous", true)
61 .Run();61 .Run();
62 62 
@@ -67,7 +67,7 @@ at::Tensor &replication_pad2d_backward_out_npu_nocheck(at::Tensor &grad_input, c
67}67}
68} // namespace68} // namespace
69 69 
70-at::Tensor &replication_pad2d_backward_out(const at::Tensor &grad_output, const at::Tensor &input,70+at::Tensor &replication_pad2d_backward_out(const at::Tensor &grad_output, const at::Tensor &self,
71 at::IntArrayRef padding, at::Tensor &grad_input)71 at::IntArrayRef padding, at::Tensor &grad_input)
72{72{
73 if (check_padding(padding)) {73 if (check_padding(padding)) {
@@ -75,25 +75,25 @@ at::Tensor &replication_pad2d_backward_out(const at::Tensor &grad_output, const
75 return grad_input;75 return grad_input;
76 }76 }
77 77 
78- npu_preparation::CheckOut({input, grad_output}, grad_input, input);78+ npu_preparation::CheckOut({self, grad_output}, grad_input, self);
79 if (!npu_utils::check_match(&grad_input)) {79 if (!npu_utils::check_match(&grad_input)) {
80 at::Tensor contiguous_result = npu_utils::format_contiguous(grad_input);80 at::Tensor contiguous_result = npu_utils::format_contiguous(grad_input);
81- replication_pad2d_backward_out_npu_nocheck(contiguous_result, grad_output, input, padding);81+ replication_pad2d_backward_out_npu_nocheck(contiguous_result, grad_output, self, padding);
82 npu_utils::format_fresh_view(grad_input, contiguous_result);82 npu_utils::format_fresh_view(grad_input, contiguous_result);
83 } else {83 } else {
84- replication_pad2d_backward_out_npu_nocheck(grad_input, grad_output, input, padding);84+ replication_pad2d_backward_out_npu_nocheck(grad_input, grad_output, self, padding);
85 }85 }
86 return grad_input;86 return grad_input;
87}87}
88 88 
89-at::Tensor replication_pad2d_backward(const at::Tensor &grad_output, const at::Tensor &input, at::IntArrayRef padding)89+at::Tensor replication_pad2d_backward(const at::Tensor &grad_output, const at::Tensor &self, at::IntArrayRef padding)
90{90{
91- at::Tensor grad_input = npu_preparation::apply_tensor(input);91+ at::Tensor grad_input = npu_preparation::apply_tensor(self);
92 if (check_padding(padding)) {92 if (check_padding(padding)) {
93 grad_input.copy_(grad_output);93 grad_input.copy_(grad_output);
94 return grad_input;94 return grad_input;
95 }95 }
96- replication_pad2d_backward_out_npu_nocheck(grad_input, grad_output, input, padding);96+ replication_pad2d_backward_out_npu_nocheck(grad_input, grad_output, self, padding);
97 return grad_input;97 return grad_input;
98}98}
99 99 
Mop_plugin/ops/aclops/ReshapeKernelNpu.cpp+20-18
@@ -23,28 +23,30 @@ using npu_preparation = at_npu::native::OpPreparation;
23using calcu_op_util = at_npu::native::CalcuOpUtil;23using calcu_op_util = at_npu::native::CalcuOpUtil;
24 24 
25at::Tensor& npu_reshape_out(25at::Tensor& npu_reshape_out(
26- const at::Tensor& src,26+ const at::Tensor& self,
27 at::IntArrayRef shape,27 at::IntArrayRef shape,
28 bool can_refresh,28 bool can_refresh,
29- at::Tensor& result) {29+ at::Tensor& out)
30- if (can_refresh) {30+{
31- at_npu::native::StorageDescHelper::SetDesc(31+ if (can_refresh) {
32- result,32+ at_npu::native::StorageDescHelper::SetDesc(
33- op_infer::array_to_small_vector(result.sizes()),33+ out,
34- op_infer::array_to_small_vector(result.strides()));34+ op_infer::array_to_small_vector(out.sizes()),
35- } else {35+ op_infer::array_to_small_vector(out.strides()));
36- at_npu::native::copy_d2d_by_memcpy(36+ } else {
37- result,37+ at_npu::native::copy_d2d_by_memcpy(
38- src,38+ out,
39- at_npu::native::NPUNativeFunctions::get_storage_size(result));39+ self,
40- }40+ at_npu::native::NPUNativeFunctions::get_storage_size(out));
41- return result;41+ }
42+ return out;
42}43}
43 44 
44-at::Tensor npu_reshape(const at::Tensor& self, at::IntArrayRef shape, bool can_refresh) {45+at::Tensor npu_reshape(const at::Tensor& self, at::IntArrayRef shape, bool can_refresh)
45- at::Tensor result = npu_preparation::apply_tensor(self, shape);46+{
46- acl_op::npu_reshape_out(self, shape, can_refresh, result);47+ at::Tensor result = npu_preparation::apply_tensor(self, shape);
48+ acl_op::npu_reshape_out(self, shape, can_refresh, result);
47 49 
48- return result;50+ return result;
49}51}
50} // namespace acl_op52} // namespace acl_op
Mop_plugin/ops/aclops/RotatedIouKernelNpu.cpp+21-19
@@ -28,37 +28,39 @@ at::Tensor& rotated_iou_npu_nocheck(
28 int64_t mode,28 int64_t mode,
29 bool is_cross,29 bool is_cross,
30 double v_threshold,30 double v_threshold,
31- double e_threshold) {31+ double e_threshold)
32- string mode_str = (mode == 0) ? "iou" : "iof";32+{
33+ string mode_str = (mode == 0) ? "iou" : "iof";
33 34 
34- at_npu::native::OpCommand cmd;35+ at_npu::native::OpCommand cmd;
35- cmd.Name("RotatedIou")36+ cmd.Name("RotatedIou")
36- .Input(boxes)37+ .Input(boxes)
37- .Input(query_boxes)38+ .Input(query_boxes)
38- .Output(iou)39+ .Output(iou)
39- .Attr("trans", trans)40+ .Attr("trans", trans)
40- .Attr("mode", mode_str)41+ .Attr("mode", mode_str)
41- .Attr("is_cross", is_cross)42+ .Attr("is_cross", is_cross)
42- .Attr("value", static_cast<float>(v_threshold))43+ .Attr("value", static_cast<float>(v_threshold))
43- .Attr("value", static_cast<float>(e_threshold))44+ .Attr("value", static_cast<float>(e_threshold))
44- .Run();45+ .Run();
45- return iou;46+ return iou;
46}47}
47} // namespace48} // namespace
48 49 
49at::Tensor npu_rotated_iou(50at::Tensor npu_rotated_iou(
50- const at::Tensor& boxes,51+ const at::Tensor& self,
51 const at::Tensor& query_boxes,52 const at::Tensor& query_boxes,
52 bool trans,53 bool trans,
53 int64_t mode,54 int64_t mode,
54 bool is_cross,55 bool is_cross,
55 double v_threshold,56 double v_threshold,
56- double e_threshold) {57+ double e_threshold)
57- TORCH_CHECK(boxes.ndimension() == 3 && query_boxes.ndimension() == 3, OPS_ERROR(ErrCode::PARAM));58+{
59+ TORCH_CHECK(self.ndimension() == 3 && query_boxes.ndimension() == 3, OPS_ERROR(ErrCode::PARAM));
58 60 
59- auto origin_dtype = boxes.scalar_type();61+ auto origin_dtype = self.scalar_type();
60 62 
61- at::Tensor boxes_cp = boxes.permute({0, 2, 1});63+ at::Tensor boxes_cp = self.permute({0, 2, 1});
62 if (origin_dtype == at::kHalf) {64 if (origin_dtype == at::kHalf) {
63 boxes_cp = at_npu::native::custom_ops::npu_dtype_cast(boxes_cp, at::kFloat);65 boxes_cp = at_npu::native::custom_ops::npu_dtype_cast(boxes_cp, at::kFloat);
64 }66 }
Mop_plugin/ops/aclops/RsqrtKernelNpu.cpp+29-25
@@ -22,37 +22,41 @@ using npu_utils = at_npu::native::NpuUtils;
22 22 
23namespace {23namespace {
24 24 
25-at::Tensor& rsqrt_out_npu_nocheck(at::Tensor& result, const at::Tensor& self) {25+at::Tensor& rsqrt_out_npu_nocheck(at::Tensor& result, const at::Tensor& self)
26- at_npu::native::OpCommand cmd;26+{
27- cmd.Name("Rsqrt")27+ at_npu::native::OpCommand cmd;
28- .Input(self)28+ cmd.Name("Rsqrt")
29- .Output(result)29+ .Input(self)
30- .Run();30+ .Output(result)
31- return result;31+ .Run();
32+ return result;
32}33}
33} // namespace34} // namespace
34 35 
35-at::Tensor& rsqrt_out(const at::Tensor& self, at::Tensor& result) {36+at::Tensor& rsqrt_out(const at::Tensor& self, at::Tensor& out)
36- npu_preparation::CheckOut({self}, result, self);37+{
37- if (!npu_utils::check_match(&result)) {38+ npu_preparation::CheckOut({self}, out, self);
38- at::Tensor contiguous_result = npu_utils::format_contiguous(result);39+ if (!npu_utils::check_match(&out)) {
39- rsqrt_out_npu_nocheck(contiguous_result, self);40+ at::Tensor contiguous_result = npu_utils::format_contiguous(out);
40- npu_utils::format_fresh_view(result, contiguous_result);41+ rsqrt_out_npu_nocheck(contiguous_result, self);
41- } else {42+ npu_utils::format_fresh_view(out, contiguous_result);
43+ } else {
44+ rsqrt_out_npu_nocheck(out, self);
45+ }
46+ return out;
47+}
48+ 
49+at::Tensor rsqrt(const at::Tensor& self)
50+{
51+ at::Tensor result = npu_preparation::apply_tensor(self);
42 rsqrt_out_npu_nocheck(result, self);52 rsqrt_out_npu_nocheck(result, self);
43- }53+ return result;
44- return result;
45}54}
46 55 
47-at::Tensor rsqrt(const at::Tensor& self) {56+at::Tensor& rsqrt_(at::Tensor& self)
48- at::Tensor result = npu_preparation::apply_tensor(self);57+{
49- rsqrt_out_npu_nocheck(result, self);58+ acl_op::rsqrt_out(self, self);
50- return result;59+ return self;
51-}
52- 
53-at::Tensor& rsqrt_(at::Tensor& self) {
54- acl_op::rsqrt_out(self, self);
55- return self;
56}60}
57 61 
58} // namespace acl_op62} // namespace acl_op
Mop_plugin/ops/aclops/SiluKernelNpu.cpp+65-55
@@ -26,88 +26,98 @@ using npu_utils = at_npu::native::NpuUtils;
26 26 
27namespace {27namespace {
28 28 
29-at::Tensor& silu_out_npu_nocheck(at::Tensor& result, const at::Tensor& self) {29+at::Tensor& silu_out_npu_nocheck(at::Tensor& result, const at::Tensor& self)
30- at_npu::native::OpCommand cmd;30+{
31- cmd.Name("Swish")31+ at_npu::native::OpCommand cmd;
32- .Input(self)32+ cmd.Name("Swish")
33- .Output(result)33+ .Input(self)
34- .Attr("scale", (float)1.0)34+ .Output(result)
35- .Run();35+ .Attr("scale", static_cast<float>(1.0))
36- return result;36+ .Run();
37+ return result;
37}38}
38 39 
39-at::Tensor& silu_out_npu(const at::Tensor& self, at::Tensor& result) {40+at::Tensor& silu_out_npu(const at::Tensor& self, at::Tensor& result)
40- npu_preparation::CheckOut(41+{
41- {self},42+ npu_preparation::CheckOut(
42- result,43+ {self},
43- self);44+ result,
45+ self);
46+ 
47+ if (!npu_utils::check_match(&result)) {
48+ at::Tensor contiguous_result = npu_utils::format_contiguous(result);
49+ silu_out_npu_nocheck(contiguous_result, self);
50+ npu_utils::format_fresh_view(result, contiguous_result);
51+ } else {
52+ silu_out_npu_nocheck(result, self);
53+ }
54+ 
55+ return result;
56+}
57+ 
58+at::Tensor silu_kernel_npu(const at::Tensor& self)
59+{
60+ at::Tensor result = npu_preparation::apply_tensor(self);
44 61 
45- if (!npu_utils::check_match(&result)) {
46- at::Tensor contiguous_result = npu_utils::format_contiguous(result);
47- silu_out_npu_nocheck(contiguous_result, self);
48- npu_utils::format_fresh_view(result, contiguous_result);
49- } else {
50 silu_out_npu_nocheck(result, self);62 silu_out_npu_nocheck(result, self);
51- }
52 63 
53- return result;64+ return result;
54-}
55- 
56-at::Tensor silu_kernel_npu(const at::Tensor& self) {
57- at::Tensor result = npu_preparation::apply_tensor(self);
58- 
59- silu_out_npu_nocheck(result, self);
60- 
61- return result;
62}65}
63 66 
64at::Tensor& silu_backward_out_npu_nocheck(67at::Tensor& silu_backward_out_npu_nocheck(
65 at::Tensor& result,68 at::Tensor& result,
66 const at::Tensor& grad_output,69 const at::Tensor& grad_output,
67 const at::Tensor& x0,70 const at::Tensor& x0,
68- const at::Tensor& x1) {71+ const at::Tensor& x1)
69- at_npu::native::OpCommand cmd;72+{
70- cmd.Name("SwishGrad")73+ at_npu::native::OpCommand cmd;
71- .Input(grad_output)74+ cmd.Name("SwishGrad")
72- .Input(x0)75+ .Input(grad_output)
73- .Input(x1)76+ .Input(x0)
74- .Output(result)77+ .Input(x1)
75- .Run();78+ .Output(result)
79+ .Run();
76 80 
77- return result;81+ return result;
78}82}
79 83 
80} // namespace84} // namespace
81 85 
82-at::Tensor& npu_silu_(at::Tensor& self) {86+at::Tensor& npu_silu_(at::Tensor& self)
83- silu_out_npu(self, self);87+{
84- return self;88+ silu_out_npu(self, self);
89+ return self;
85}90}
86 91 
87-at::Tensor npu_silu_backward(const at::Tensor& grad_output, const at::Tensor& x0, const at::Tensor& x1) {92+at::Tensor npu_silu_backward(const at::Tensor& grad_output, const at::Tensor& x0, const at::Tensor& x1)
88- at::Tensor grad_input = npu_preparation::apply_tensor(grad_output);93+{
89- silu_backward_out_npu_nocheck(grad_input, grad_output, x0, x1);94+ at::Tensor grad_input = npu_preparation::apply_tensor(grad_output);
95+ silu_backward_out_npu_nocheck(grad_input, grad_output, x0, x1);
90 96 
91- return grad_input;97+ return grad_input;
92}98}
93 99 
94-at::Tensor npu_silu(const at::Tensor& self) {100+at::Tensor npu_silu(const at::Tensor& self)
95- return silu_kernel_npu(self);101+{
102+ return silu_kernel_npu(self);
96}103}
97 104 
98-at::Tensor& silu_out(const at::Tensor& self, at::Tensor& result) {105+at::Tensor& silu_out(const at::Tensor& self, at::Tensor& out)
99- silu_out_npu(self, result);106+{
100- return result;107+ silu_out_npu(self, out);
108+ return out;
101}109}
102 110 
103-at::Tensor silu(const at::Tensor& self) {111+at::Tensor silu(const at::Tensor& self)
104- return silu_kernel_npu(self);112+{
113+ return silu_kernel_npu(self);
105}114}
106 115 
107-at::Tensor& silu_(at::Tensor& self) {116+at::Tensor& silu_(at::Tensor& self)
108- at::Tensor result = silu_kernel_npu(self);117+{
109- self.copy_(result);118+ at::Tensor result = silu_kernel_npu(self);
110- return self;119+ self.copy_(result);
120+ return self;
111}121}
112 122 
113} // namespace acl_op123} // namespace acl_op
Mop_plugin/ops/aclops/SlowConvDilated2DKernelNpu.cpp+6-5
@@ -24,10 +24,11 @@ at::Tensor slow_conv_dilated2d(
24 const at::Tensor& self,24 const at::Tensor& self,
25 const at::Tensor& weight,25 const at::Tensor& weight,
26 at::IntArrayRef kernel_size,26 at::IntArrayRef kernel_size,
27- const c10::optional<at::Tensor>& bias_opt,27+ const c10::optional<at::Tensor>& bias,
28 at::IntArrayRef stride,28 at::IntArrayRef stride,
29 at::IntArrayRef padding,29 at::IntArrayRef padding,
30- at::IntArrayRef dilation) {30+ at::IntArrayRef dilation)
31+{
31 TORCH_CHECK(dilation.size() >= 2, "slow_conv_dilated2d expected dilation greater than or equal to 2D,"32 TORCH_CHECK(dilation.size() >= 2, "slow_conv_dilated2d expected dilation greater than or equal to 2D,"
32 " but input dilation has sizes ", dilation.size(), OPS_ERROR(ErrCode::PARAM));33 " but input dilation has sizes ", dilation.size(), OPS_ERROR(ErrCode::PARAM));
33 TORCH_CHECK(padding.size() >= 2, "slow_conv_dilated2d expected dilation greater than or equal to 2D,"34 TORCH_CHECK(padding.size() >= 2, "slow_conv_dilated2d expected dilation greater than or equal to 2D,"
@@ -42,7 +43,7 @@ at::Tensor slow_conv_dilated2d(
42 auto output_size = op_infer::slow_conv_dilated2d_npu_output_size(self, weight, stride, padding, dilation);43 auto output_size = op_infer::slow_conv_dilated2d_npu_output_size(self, weight, stride, padding, dilation);
43 int64_t result_format = self.dtype() == at::kHalf ? ACL_FORMAT_NC1HWC0 : ACL_FORMAT_ND;44 int64_t result_format = self.dtype() == at::kHalf ? ACL_FORMAT_NC1HWC0 : ACL_FORMAT_ND;
44 at::Tensor result = npu_preparation::apply_tensor_with_format(output_size, self.options(), result_format);45 at::Tensor result = npu_preparation::apply_tensor_with_format(output_size, self.options(), result_format);
45- const at::Tensor& bias = c10::value_or_else(bias_opt, [] {return at::Tensor();});46+ const at::Tensor& bias_value = c10::value_or_else(bias, [] {return at::Tensor();});
46 int64_t groups = 1;47 int64_t groups = 1;
47 c10::SmallVector<int64_t, N> strides_size = {1, 1, stride[0], stride[1]};48 c10::SmallVector<int64_t, N> strides_size = {1, 1, stride[0], stride[1]};
48 c10::SmallVector<int64_t, N> paddings = {padding[0], padding[0], padding[1], padding[1]};49 c10::SmallVector<int64_t, N> paddings = {padding[0], padding[0], padding[1], padding[1]};
@@ -52,8 +53,8 @@ at::Tensor slow_conv_dilated2d(
52 cmd.Name("Conv2D")53 cmd.Name("Conv2D")
53 .Input(self, "x")54 .Input(self, "x")
54 .Input(weight, "filter");55 .Input(weight, "filter");
55- if (bias.defined()) {56+ if (bias_value.defined()) {
56- cmd.Input(bias);57+ cmd.Input(bias_value);
57 }58 }
58 cmd.Output(result, "y")59 cmd.Output(result, "y")
59 .Attr("strides", strides_size)60 .Attr("strides", strides_size)
Mop_plugin/ops/aclops/SoftplusKernelNpu.cpp+29-26
@@ -26,15 +26,16 @@ at::Tensor& softplus_out_nocheck(
26 at::Tensor& result,26 at::Tensor& result,
27 const at::Tensor& self,27 const at::Tensor& self,
28 at::Scalar beta,28 at::Scalar beta,
29- at::Scalar threshold) {29+ at::Scalar threshold)
30- at_npu::native::OpCommand cmd;30+{
31- cmd.Name("SoftplusV2")31+ at_npu::native::OpCommand cmd;
32- .Input(self)32+ cmd.Name("SoftplusV2")
33- .Output(result)33+ .Input(self)
34- .Attr("beta", beta)34+ .Output(result)
35- .Attr("threshold", threshold)35+ .Attr("beta", beta)
36- .Run();36+ .Attr("threshold", threshold)
37- return result;37+ .Run();
38+ return result;
38}39}
39} // namespace40} // namespace
40 41 
@@ -42,28 +43,30 @@ at::Tensor& softplus_out(
42 const at::Tensor& self,43 const at::Tensor& self,
43 const at::Scalar& beta,44 const at::Scalar& beta,
44 const at::Scalar& threshold,45 const at::Scalar& threshold,
45- at::Tensor& result) {46+ at::Tensor& out)
46- npu_preparation::CheckOut(47+{
47- {self},48+ npu_preparation::CheckOut(
48- result,49+ {self},
49- self);50+ out,
50- if (!npu_utils::check_match(&result)) {51+ self);
51- at::Tensor contiguous_result = npu_utils::format_contiguous(result);52+ if (!npu_utils::check_match(&out)) {
52- softplus_out_nocheck(contiguous_result, self, beta, threshold);53+ at::Tensor contiguous_result = npu_utils::format_contiguous(out);
53- npu_utils::format_fresh_view(result, contiguous_result);54+ softplus_out_nocheck(contiguous_result, self, beta, threshold);
54- } else {55+ npu_utils::format_fresh_view(out, contiguous_result);
55- softplus_out_nocheck(result, self, beta, threshold);56+ } else {
56- }57+ softplus_out_nocheck(out, self, beta, threshold);
57- return result;58+ }
59+ return out;
58}60}
59 61 
60at::Tensor softplus(62at::Tensor softplus(
61 const at::Tensor& self,63 const at::Tensor& self,
62 const at::Scalar& beta,64 const at::Scalar& beta,
63- const at::Scalar& threshold) {65+ const at::Scalar& threshold)
64- at::Tensor result = npu_preparation::apply_tensor(self);66+{
65- softplus_out_nocheck(result, self, beta, threshold);67+ at::Tensor result = npu_preparation::apply_tensor(self);
66- return result;68+ softplus_out_nocheck(result, self, beta, threshold);
69+ return result;
67}70}
68 71 
69} // namespace acl_op72} // namespace acl_op
Mop_plugin/ops/aclops/SqrtKernelNpu.cpp+29-25
@@ -21,36 +21,40 @@ using npu_preparation = at_npu::native::OpPreparation;
21using npu_utils = at_npu::native::NpuUtils;21using npu_utils = at_npu::native::NpuUtils;
22 22 
23namespace {23namespace {
24-at::Tensor& sqrt_out_npu_nocheck(at::Tensor& result, const at::Tensor& self) {24+at::Tensor& sqrt_out_npu_nocheck(at::Tensor& result, const at::Tensor& self)
25- at_npu::native::OpCommand cmd;25+{
26- cmd.Name("Sqrt")26+ at_npu::native::OpCommand cmd;
27- .Input(self)27+ cmd.Name("Sqrt")
28- .Output(result)28+ .Input(self)
29- .Run();29+ .Output(result)
30- return result;30+ .Run();
31+ return result;
31}32}
32} // namespace33} // namespace
33 34 
34-at::Tensor& sqrt_out(const at::Tensor& self, at::Tensor& result) {35+at::Tensor& sqrt_out(const at::Tensor& self, at::Tensor& out)
35- npu_preparation::CheckOut({self}, result, self);36+{
36- if (!npu_utils::check_match(&result)) {37+ npu_preparation::CheckOut({self}, out, self);
37- at::Tensor contiguous_result = npu_utils::format_contiguous(result);38+ if (!npu_utils::check_match(&out)) {
38- sqrt_out_npu_nocheck(contiguous_result, self);39+ at::Tensor contiguous_result = npu_utils::format_contiguous(out);
39- npu_utils::format_fresh_view(result, contiguous_result);40+ sqrt_out_npu_nocheck(contiguous_result, self);
40- } else {41+ npu_utils::format_fresh_view(out, contiguous_result);
42+ } else {
43+ sqrt_out_npu_nocheck(out, self);
44+ }
45+ return out;
46+}
47+ 
48+at::Tensor sqrt(const at::Tensor& self)
49+{
50+ at::Tensor result = npu_preparation::apply_tensor(self);
51+ 
41 sqrt_out_npu_nocheck(result, self);52 sqrt_out_npu_nocheck(result, self);
42- }53+ return result;
43- return result;
44}54}
45 55 
46-at::Tensor sqrt(const at::Tensor& self) {56+at::Tensor& sqrt_(at::Tensor& self)
47- at::Tensor result = npu_preparation::apply_tensor(self);57+{
48- 58+ return acl_op::sqrt_out(self, self);
49- sqrt_out_npu_nocheck(result, self);
50- return result;
51-}
52- 
53-at::Tensor& sqrt_(at::Tensor& self) {
54- return acl_op::sqrt_out(self, self);
55}59}
56} // namespace acl_op60} // namespace acl_op
Mop_plugin/ops/opapi/AffineGridGeneratorKernelNpuOpApi.cpp+14-13
@@ -18,19 +18,20 @@
18#include "op_plugin/utils/op_api_common.h"18#include "op_plugin/utils/op_api_common.h"
19 19 
20namespace op_api {20namespace op_api {
21-at::Tensor affine_grid_generator(const at::Tensor& theta, at::IntArrayRef size, bool align_corners) {21+at::Tensor affine_grid_generator(const at::Tensor& theta, at::IntArrayRef size, bool align_corners)
22- DO_COMPATIBILITY(aclnnAffineGrid, acl_op::affine_grid_generator(theta, size, align_corners));22+{
23- TORCH_CHECK(size.size() == 4 || size.size() == 5, "AffineGridGenerator needs 4d or 5d size(input)."23+ DO_COMPATIBILITY(aclnnAffineGrid, acl_op::affine_grid_generator(theta, size, align_corners));
24- + OPS_ERROR(ErrCode::PARAM));24+ TORCH_CHECK(size.size() == 4 || size.size() == 5, "AffineGridGenerator needs 4d or 5d size(input)."
25- at::SmallVector<int64_t, SIZE> outputSize = {};25+ + OPS_ERROR(ErrCode::PARAM));
26- if (size.size() == 4) {26+ at::SmallVector<int64_t, SIZE> outputSize = {};
27- outputSize = {size[0], size[2], size[3], 2};27+ if (size.size() == 4) {
28- } else {28+ outputSize = {size[0], size[2], size[3], 2};
29- outputSize = {size[0], size[2], size[3], size[4], 3};29+ } else {
30- }30+ outputSize = {size[0], size[2], size[3], size[4], 3};
31+ }
31 32 
32- at::Tensor result = at_npu::native::OpPreparation::apply_tensor_without_format(theta, outputSize);33+ at::Tensor result = at_npu::native::OpPreparation::apply_tensor_without_format(theta, outputSize);
33- EXEC_NPU_CMD(aclnnAffineGrid, theta, size, align_corners, result);34+ EXEC_NPU_CMD(aclnnAffineGrid, theta, size, align_corners, result);
34- return result;35+ return result;
35}36}
36}37}
Mop_plugin/ops/opapi/AnyKernelNpuOpApi.cpp+47-43
@@ -20,60 +20,64 @@
20namespace op_api {20namespace op_api {
21using npu_preparation = at_npu::native::OpPreparation;21using npu_preparation = at_npu::native::OpPreparation;
22 22 
23-at::Tensor& any_out(const at::Tensor& self, int64_t dim, bool keepdim, at::Tensor& result) {23+at::Tensor& any_out(const at::Tensor& self, int64_t dim, bool keepdim, at::Tensor& out)
24- DO_COMPATIBILITY(aclnnAny, acl_op::any_out(self, dim, keepdim, result));24+{
25- c10::SmallVector<int64_t, op_infer::N> dim_list = {dim};25+ DO_COMPATIBILITY(aclnnAny, acl_op::any_out(self, dim, keepdim, out));
26+ c10::SmallVector<int64_t, op_infer::N> dim_list = {dim};
26 27 
27- // check result for return28+ // check result for return
28- auto output_size = op_infer::reduce_ops_npu_output_size(self, dim_list, keepdim);29+ auto output_size = op_infer::reduce_ops_npu_output_size(self, dim_list, keepdim);
29- npu_preparation::check_tensor({self}, result, result, output_size);30+ npu_preparation::check_tensor({self}, out, out, output_size);
30 31 
31- // calculate the output result of the NPU32+ // calculate the output result of the NPU
32- at::IntArrayRef dims(dim);33+ at::IntArrayRef dims(dim);
33- EXEC_NPU_CMD(aclnnAny, self, dims, keepdim, result);34+ EXEC_NPU_CMD(aclnnAny, self, dims, keepdim, out);
34- return result;35+ return out;
35}36}
36 37 
37-at::Tensor& any_out(const at::Tensor& self, at::Tensor& result) {38+at::Tensor& any_out(const at::Tensor& self, at::Tensor& out)
38- DO_COMPATIBILITY(aclnnAny, acl_op::any_out(self, result));39+{
39- at::SmallVector<int64_t, op_infer::N> dim_list = op_plugin::utils::get_dimlist_for_tensor(self);40+ DO_COMPATIBILITY(aclnnAny, acl_op::any_out(self, out));
40- bool keep_dim = false;41+ at::SmallVector<int64_t, op_infer::N> dim_list = op_plugin::utils::get_dimlist_for_tensor(self);
42+ bool keep_dim = false;
41 43 
42- // check result for return44+ // check result for return
43- auto output_size = op_infer::reduce_ops_npu_output_size(self, dim_list, keep_dim);45+ auto output_size = op_infer::reduce_ops_npu_output_size(self, dim_list, keep_dim);
44- npu_preparation::check_tensor({self}, result, result, output_size);46+ npu_preparation::check_tensor({self}, out, out, output_size);
45- at::IntArrayRef dims(dim_list);47+ at::IntArrayRef dims(dim_list);
46- EXEC_NPU_CMD(aclnnAny, self, dims, keep_dim, result);48+ EXEC_NPU_CMD(aclnnAny, self, dims, keep_dim, out);
47- return result;49+ return out;
48}50}
49 51 
50-at::Tensor any(const at::Tensor& self, int64_t dim, bool keepdim) {52+at::Tensor any(const at::Tensor& self, int64_t dim, bool keepdim)
51- DO_COMPATIBILITY(aclnnAny, acl_op::any(self, dim, keepdim));53+{
54+ DO_COMPATIBILITY(aclnnAny, acl_op::any(self, dim, keepdim));
52 55 
53- // calculate the output size56+ // calculate the output size
54- at::IntArrayRef dims(dim);57+ at::IntArrayRef dims(dim);
55- auto output_size = op_infer::reduce_ops_npu_output_size(self, dims, keepdim);58+ auto output_size = op_infer::reduce_ops_npu_output_size(self, dims, keepdim);
56- auto output_dtype = (self.scalar_type() == at::ScalarType::Byte) ? at::ScalarType::Byte : at::ScalarType::Bool;59+ auto output_dtype = (self.scalar_type() == at::ScalarType::Byte) ? at::ScalarType::Byte : at::ScalarType::Bool;
57- auto options = self.options().dtype(output_dtype);60+ auto options = self.options().dtype(output_dtype);
58 61 
59- // construct the output tensor of the NPU62+ // construct the output tensor of the NPU
60- at::Tensor result = npu_preparation::apply_tensor_without_format(output_size, options);63+ at::Tensor result = npu_preparation::apply_tensor_without_format(output_size, options);
61- EXEC_NPU_CMD(aclnnAny, self, dims, keepdim, result);64+ EXEC_NPU_CMD(aclnnAny, self, dims, keepdim, result);
62- return result;65+ return result;
63}66}
64 67 
65-at::Tensor any(const at::Tensor& self) {68+at::Tensor any(const at::Tensor& self)
66- DO_COMPATIBILITY(aclnnAny, acl_op::any(self));69+{
67- at::SmallVector<int64_t, op_infer::N> dim_list = op_plugin::utils::get_dimlist_for_tensor(self);70+ DO_COMPATIBILITY(aclnnAny, acl_op::any(self));
68- bool keep_dim = false;71+ at::SmallVector<int64_t, op_infer::N> dim_list = op_plugin::utils::get_dimlist_for_tensor(self);
69- auto output_size = op_infer::reduce_ops_npu_output_size(self, dim_list, keep_dim);72+ bool keep_dim = false;
70- auto output_dtype = (self.scalar_type() == at::ScalarType::Byte) ? at::ScalarType::Byte : at::ScalarType::Bool;73+ auto output_size = op_infer::reduce_ops_npu_output_size(self, dim_list, keep_dim);
71- auto options = self.options().dtype(output_dtype);74+ auto output_dtype = (self.scalar_type() == at::ScalarType::Byte) ? at::ScalarType::Byte : at::ScalarType::Bool;
75+ auto options = self.options().dtype(output_dtype);
72 76 
73- // construct the output tensor of the NPU77+ // construct the output tensor of the NPU
74- at::Tensor result = npu_preparation::apply_tensor_without_format(output_size, options);78+ at::Tensor result = npu_preparation::apply_tensor_without_format(output_size, options);
75- at::IntArrayRef dims(dim_list);79+ at::IntArrayRef dims(dim_list);
76- EXEC_NPU_CMD(aclnnAny, self, dims, keep_dim, result);80+ EXEC_NPU_CMD(aclnnAny, self, dims, keep_dim, result);
77- return result;81+ return result;
78}82}
79}83}
Mop_plugin/ops/opapi/AvgPool2dKernelNpuOpApi.cpp+7-7
@@ -17,7 +17,6 @@
17#include "op_plugin/OpApiInterface.h"17#include "op_plugin/OpApiInterface.h"
18#include "op_plugin/utils/op_api_common.h"18#include "op_plugin/utils/op_api_common.h"
19#include "op_plugin/utils/KernelNpuOutputSize.h"19#include "op_plugin/utils/KernelNpuOutputSize.h"
20-#include "torch_npu/csrc/core/npu/NpuVariables.h"
21 20 
22namespace op_api {21namespace op_api {
23using small_vector = c10::SmallVector<int64_t, op_infer::SIZE>;22using small_vector = c10::SmallVector<int64_t, op_infer::SIZE>;
@@ -44,7 +43,8 @@ small_vector calc_output_size_with_generalized_attrs(const at::Tensor &self, at:
44 bool count_include_pad, c10::optional<int64_t> divisor_override)43 bool count_include_pad, c10::optional<int64_t> divisor_override)
45{44{
46 // generalize kernels, strides and paddings to 2D-shape45 // generalize kernels, strides and paddings to 2D-shape
47- TORCH_CHECK(!kernel_size.empty(), "kernel_size must either be a single int, or a tuple of two ints", OPS_ERROR(ErrCode::PARAM));46+ TORCH_CHECK(!kernel_size.empty(), "kernel_size must either be a single int, or a tuple of two ints",
47+ OPS_ERROR(ErrCode::PARAM));
48 const int64_t k_h = kernel_size[0];48 const int64_t k_h = kernel_size[0];
49 const int64_t k_w = kernel_size.size() == 1 ? k_h : kernel_size[1];49 const int64_t k_w = kernel_size.size() == 1 ? k_h : kernel_size[1];
50 c10::SmallVector<int64_t, op_infer::SIZE> kernel_sizes = {k_h, k_w};50 c10::SmallVector<int64_t, op_infer::SIZE> kernel_sizes = {k_h, k_w};
@@ -71,19 +71,19 @@ small_vector calc_output_size_with_generalized_attrs(const at::Tensor &self, at:
71 71 
72at::Tensor &avg_pool2d_out(const at::Tensor &self, at::IntArrayRef kernel_size, at::IntArrayRef stride,72at::Tensor &avg_pool2d_out(const at::Tensor &self, at::IntArrayRef kernel_size, at::IntArrayRef stride,
73 at::IntArrayRef padding, bool ceil_mode, bool count_include_pad,73 at::IntArrayRef padding, bool ceil_mode, bool count_include_pad,
74- c10::optional<int64_t> divisor_override, at::Tensor &result)74+ c10::optional<int64_t> divisor_override, at::Tensor &out)
75{75{
76 c10::SmallVector<int64_t, op_infer::SIZE> output_size = calc_output_size_with_generalized_attrs(76 c10::SmallVector<int64_t, op_infer::SIZE> output_size = calc_output_size_with_generalized_attrs(
77 self, kernel_size, stride, padding, ceil_mode, count_include_pad, divisor_override);77 self, kernel_size, stride, padding, ceil_mode, count_include_pad, divisor_override);
78- at_npu::native::OpPreparation::check_tensor({self}, result, self, output_size);78+ at_npu::native::OpPreparation::check_tensor({self}, out, self, output_size);
79 79 
80 DO_COMPATIBILITY(aclnnAvgPool2d, acl_op::avg_pool2d_out(self, kernel_size, stride, padding, ceil_mode,80 DO_COMPATIBILITY(aclnnAvgPool2d, acl_op::avg_pool2d_out(self, kernel_size, stride, padding, ceil_mode,
81- count_include_pad, divisor_override, result));81+ count_include_pad, divisor_override, out));
82 82 
83- avg_pool2d_out_npu_nocheck_opapi(result, self, kernel_size, stride, padding, ceil_mode, count_include_pad,83+ avg_pool2d_out_npu_nocheck_opapi(out, self, kernel_size, stride, padding, ceil_mode, count_include_pad,
84 divisor_override);84 divisor_override);
85 85 
86- return result;86+ return out;
87}87}
88 88 
89at::Tensor avg_pool2d(const at::Tensor &self, at::IntArrayRef kernel_size, at::IntArrayRef stride,89at::Tensor avg_pool2d(const at::Tensor &self, at::IntArrayRef kernel_size, at::IntArrayRef stride,