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已合并
[Task] cleancode 2/N. #2326
AtomGit-Bot创建于 2025年3月20日
[Task] cleancode 2/N. #2326
已合并
AtomGit-Bot创建于 2025年3月20日
从refs/pull/2326/head合入到master
共 22 个文件变更+300-289
Mop_plugin/ops/aclops/ArgmaxKernelNpu.cpp+8-8
@@ -35,7 +35,7 @@ at::Tensor& argmax_out_nocheck(at::Tensor& result, const at::Tensor& input, at::
35}35}
36}36}
37 37 
38-at::Tensor& argmax_out(const at::Tensor& self, at::optional<int64_t> dim, bool keepdim, at::Tensor& result)38+at::Tensor& argmax_out(const at::Tensor& self, at::optional<int64_t> dim, bool keepdim, at::Tensor& out)
39{39{
40 at::Tensor input = dim.has_value() ? self : self.reshape({-1});40 at::Tensor input = dim.has_value() ? self : self.reshape({-1});
41 int64_t dim_value = dim.has_value() ? dim.value() : 0;41 int64_t dim_value = dim.has_value() ? dim.value() : 0;
@@ -43,20 +43,20 @@ at::Tensor& argmax_out(const at::Tensor& self, at::optional<int64_t> dim, bool k
43 auto output_size = op_infer::reduce_ops_npu_output_size(input, dim_value, keepdim_value);43 auto output_size = op_infer::reduce_ops_npu_output_size(input, dim_value, keepdim_value);
44 npu_preparation::CheckOut(44 npu_preparation::CheckOut(
45 {self},45 {self},
46- result,46+ out,
47- npu_preparation::get_tensor_npu_format(result),47+ npu_preparation::get_tensor_npu_format(out),
48 at::kLong,48 at::kLong,
49 output_size);49 output_size);
50 at::Scalar dim_scalar = dim_value;50 at::Scalar dim_scalar = dim_value;
51- at::Tensor result_cast = at_npu::native::custom_ops::npu_dtype_cast(result, at::kInt);51+ at::Tensor result_cast = at_npu::native::custom_ops::npu_dtype_cast(out, at::kInt);
52 argmax_out_nocheck(result_cast, input, dim_scalar, keepdim_value);52 argmax_out_nocheck(result_cast, input, dim_scalar, keepdim_value);
53- if (!npu_utils::check_match(&result)) {53+ if (!npu_utils::check_match(&out)) {
54 at::Tensor contiguous_result = at_npu::native::custom_ops::npu_dtype_cast(result_cast, at::kLong);54 at::Tensor contiguous_result = at_npu::native::custom_ops::npu_dtype_cast(result_cast, at::kLong);
55- npu_utils::format_fresh_view(result, contiguous_result);55+ npu_utils::format_fresh_view(out, contiguous_result);
56 } else {56 } else {
57- result = at_npu::native::custom_ops::npu_dtype_cast(result_cast, at::kLong);57+ out = at_npu::native::custom_ops::npu_dtype_cast(result_cast, at::kLong);
58 }58 }
59- return result;59+ return out;
60}60}
61 61 
62} // namespace acl_op62} // namespace acl_op
Mop_plugin/ops/aclops/BatchNormBackwardKernelNpu.cpp+154-149
@@ -35,21 +35,22 @@ std::tuple<at::Tensor&, at::Tensor&> batch_norm_backward_training_update_nocheck
35 const at::Tensor& save_mean,35 const at::Tensor& save_mean,
36 const at::Tensor& save_invstd,36 const at::Tensor& save_invstd,
37 bool train,37 bool train,
38- double eps) {38+ double eps)
39- at_npu::native::OpCommand cmd;39+{
40+ at_npu::native::OpCommand cmd;
40 41 
41- string name = (self.dim() == 5) ? "BN3DTrainingUpdateGrad" : "BNTrainingUpdateGrad";42+ string name = (self.dim() == 5) ? "BN3DTrainingUpdateGrad" : "BNTrainingUpdateGrad";
42- cmd.Name(name)43+ cmd.Name(name)
43- .Input(grad_out, "grads")44+ .Input(grad_out, "grads")
44- .Input(self, "x")45+ .Input(self, "x")
45- .Input(save_mean, "batch_mean")46+ .Input(save_mean, "batch_mean")
46- .Input(save_invstd, "batch_variance")47+ .Input(save_invstd, "batch_variance")
47- .Output(grad_weight, "diff_scale")48+ .Output(grad_weight, "diff_scale")
48- .Output(grad_bias, "diff_offset")49+ .Output(grad_bias, "diff_offset")
49- .Attr("epsilon", static_cast<float>(eps))50+ .Attr("epsilon", static_cast<float>(eps))
50- .Run();51+ .Run();
51 52 
52- return std::tuple<at::Tensor&, at::Tensor&>(grad_weight, grad_bias);53+ return std::tuple<at::Tensor&, at::Tensor&>(grad_weight, grad_bias);
53}54}
54 55 
55at::Tensor& batch_norm_backward_training_reduce_nocheck(56at::Tensor& batch_norm_backward_training_reduce_nocheck(
@@ -64,33 +65,34 @@ at::Tensor& batch_norm_backward_training_reduce_nocheck(
64 const at::Tensor& save_mean,65 const at::Tensor& save_mean,
65 const at::Tensor& save_invstd,66 const at::Tensor& save_invstd,
66 bool train,67 bool train,
67- double eps) {68+ double eps)
68- at_npu::native::OpCommand cmd;69+{
70+ at_npu::native::OpCommand cmd;
69 71 
70- string name = (self.dim() == 5) ? "BN3DTrainingReduceGrad" : "BNTrainingReduceGrad";72+ string name = (self.dim() == 5) ? "BN3DTrainingReduceGrad" : "BNTrainingReduceGrad";
71- at::Tensor weight_cp = weight;73+ at::Tensor weight_cp = weight;
72- auto self_format = npu_preparation::get_tensor_npu_format(self);74+ auto self_format = npu_preparation::get_tensor_npu_format(self);
73- auto weight_format = npu_preparation::get_tensor_npu_format(weight);75+ auto weight_format = npu_preparation::get_tensor_npu_format(weight);
74 76 
75- bool check_bn_5hd = (self_format == ACL_FORMAT_NC1HWC0 && weight_format == ACL_FORMAT_ND) ? true : false;77+ bool check_bn_5hd = (self_format == ACL_FORMAT_NC1HWC0 && weight_format == ACL_FORMAT_ND) ? true : false;
76- if (check_bn_5hd) {78+ if (check_bn_5hd) {
77- npu_format_helper::unsafe_format_cast(weight_cp, ACL_FORMAT_ND, ACL_FORMAT_NC1HWC0);79+ npu_format_helper::unsafe_format_cast(weight_cp, ACL_FORMAT_ND, ACL_FORMAT_NC1HWC0);
78- }80+ }
79- cmd.Name(name)81+ cmd.Name(name)
80- .Input(grad_out, "grads")82+ .Input(grad_out, "grads")
81- .Input(self, "x")83+ .Input(self, "x")
82- .Input(grad_weight, "diff_scale")84+ .Input(grad_weight, "diff_scale")
83- .Input(grad_bias, "diff_offset")85+ .Input(grad_bias, "diff_offset")
84- .Input(weight_cp, "scale")86+ .Input(weight_cp, "scale")
85- .Input(save_mean, "batch_mean")87+ .Input(save_mean, "batch_mean")
86- .Input(save_invstd, "batch_variance")88+ .Input(save_invstd, "batch_variance")
87- .Output(grad_input, "y")89+ .Output(grad_input, "y")
88- .Attr("epsilon", static_cast<float>(eps))90+ .Attr("epsilon", static_cast<float>(eps))
89- .Run();91+ .Run();
90- if (check_bn_5hd) {92+ if (check_bn_5hd) {
91- npu_format_helper::unsafe_format_cast(weight_cp, ACL_FORMAT_NC1HWC0, ACL_FORMAT_ND);93+ npu_format_helper::unsafe_format_cast(weight_cp, ACL_FORMAT_NC1HWC0, ACL_FORMAT_ND);
92- }94+ }
93- return grad_input;95+ return grad_input;
94}96}
95 97 
96at::Tensor& batch_norm_backward_infer_nocheck(98at::Tensor& batch_norm_backward_infer_nocheck(
@@ -105,17 +107,18 @@ at::Tensor& batch_norm_backward_infer_nocheck(
105 const at::Tensor& save_mean,107 const at::Tensor& save_mean,
106 const at::Tensor& save_invstd,108 const at::Tensor& save_invstd,
107 bool train,109 bool train,
108- double eps) {110+ double eps)
109- at_npu::native::OpCommand cmd;111+{
110- cmd.Name("BNInferGrad")112+ at_npu::native::OpCommand cmd;
111- .Input(grad_out, "grads")113+ cmd.Name("BNInferGrad")
112- .Input(weight, "scale")114+ .Input(grad_out, "grads")
113- .Input(running_var, "batch_variance")115+ .Input(weight, "scale")
114- .Output(grad_input, "x_backprop")116+ .Input(running_var, "batch_variance")
115- .Attr("epsilon", static_cast<float>(eps))117+ .Output(grad_input, "x_backprop")
116- .Run();118+ .Attr("epsilon", static_cast<float>(eps))
119+ .Run();
117 120 
118- return grad_input;121+ return grad_input;
119}122}
120 123 
121std::tuple<at::Tensor&, at::Tensor&, at::Tensor&> batch_norm_backward_impl(124std::tuple<at::Tensor&, at::Tensor&, at::Tensor&> batch_norm_backward_impl(
@@ -131,25 +134,26 @@ std::tuple<at::Tensor&, at::Tensor&, at::Tensor&> batch_norm_backward_impl(
131 const at::Tensor& save_invstd,134 const at::Tensor& save_invstd,
132 bool train,135 bool train,
133 double eps,136 double eps,
134- std::array<bool, 3> grad_input_mask) {137+ std::array<bool, 3> grad_input_mask)
135- // note: when not train, save_mean/save_invstd replaced by running_mean/running_var138+{
136- at::Tensor mean = train ? save_mean : running_mean;139+ // note: when not train, save_mean/save_invstd replaced by running_mean/running_var
137- at::Tensor invstd = train ? save_invstd : running_var;140+ at::Tensor mean = train ? save_mean : running_mean;
141+ at::Tensor invstd = train ? save_invstd : running_var;
138 142 
139- batch_norm_backward_training_update_nocheck(grad_weight, grad_bias, grad_out, self, weight, running_mean, running_var,143+ batch_norm_backward_training_update_nocheck(grad_weight, grad_bias, grad_out, self, weight, running_mean, running_var,
140- mean, invstd, train, eps);144+ mean, invstd, train, eps);
141 145 
142- if (grad_input_mask[0]) {146+ if (grad_input_mask[0]) {
143- if (!train) {147+ if (!train) {
144- batch_norm_backward_infer_nocheck(grad_input, grad_weight, grad_bias, grad_out, self, weight, running_mean,148+ batch_norm_backward_infer_nocheck(grad_input, grad_weight, grad_bias, grad_out, self, weight, running_mean,
145- running_var, mean, invstd, train, eps);149+ running_var, mean, invstd, train, eps);
146- } else {150+ } else {
147- batch_norm_backward_training_reduce_nocheck(grad_input, grad_weight, grad_bias, grad_out, self, weight,151+ batch_norm_backward_training_reduce_nocheck(grad_input, grad_weight, grad_bias, grad_out, self, weight,
148- running_mean, running_var, mean, invstd, train, eps);152+ running_mean, running_var, mean, invstd, train, eps);
153+ }
149 }154 }
150- }
151 155 
152- return std::tuple<at::Tensor&, at::Tensor&, at::Tensor&>(grad_input, grad_weight, grad_bias);156+ return std::tuple<at::Tensor&, at::Tensor&, at::Tensor&>(grad_input, grad_weight, grad_bias);
153}157}
154} // namespace158} // namespace
155 159 
@@ -163,100 +167,101 @@ std::tuple<at::Tensor, at::Tensor, at::Tensor> native_batch_norm_backward(
163 const c10::optional<at::Tensor>& save_invstd_opt,167 const c10::optional<at::Tensor>& save_invstd_opt,
164 bool train,168 bool train,
165 double eps,169 double eps,
166- std::array<bool, 3> grad_input_mask) {170+ std::array<bool, 3> grad_input_mask)
167- const at::Tensor& weight = c10::value_or_else(weight_opt, [] { return at::Tensor(); });171+{
168- const at::Tensor& running_mean = c10::value_or_else(running_mean_opt, [] { return at::Tensor(); });172+ const at::Tensor& weight = c10::value_or_else(weight_opt, [] { return at::Tensor(); });
169- const at::Tensor& running_var = c10::value_or_else(running_var_opt, [] { return at::Tensor(); });173+ const at::Tensor& running_mean = c10::value_or_else(running_mean_opt, [] { return at::Tensor(); });
170- const at::Tensor& save_mean = c10::value_or_else(save_mean_opt, [] { return at::Tensor(); });174+ const at::Tensor& running_var = c10::value_or_else(running_var_opt, [] { return at::Tensor(); });
171- const at::Tensor& save_invstd = c10::value_or_else(save_invstd_opt, [] { return at::Tensor(); });175+ const at::Tensor& save_mean = c10::value_or_else(save_mean_opt, [] { return at::Tensor(); });
176+ const at::Tensor& save_invstd = c10::value_or_else(save_invstd_opt, [] { return at::Tensor(); });
172 177 
173- at::Tensor self_reshape;178+ at::Tensor self_reshape;
174- at::Tensor grad_out_reshape;179+ at::Tensor grad_out_reshape;
175- c10::SmallVector<int64_t, N> self_shape = op_infer::array_to_small_vector(self.sizes());180+ c10::SmallVector<int64_t, N> self_shape = op_infer::array_to_small_vector(self.sizes());
176 181 
177- if (grad_out.dim() <= 4) {182+ if (grad_out.dim() <= 4) {
178- c10::SmallVector<int64_t, N> nchw_shape(self_shape);183+ c10::SmallVector<int64_t, N> nchw_shape(self_shape);
179- nchw_shape.resize(4, 1);184+ nchw_shape.resize(4, 1);
180- self_reshape = self.reshape(nchw_shape);185+ self_reshape = self.reshape(nchw_shape);
181- grad_out_reshape = grad_out.reshape(nchw_shape);186+ grad_out_reshape = grad_out.reshape(nchw_shape);
182- } else if (train && grad_out.dim() == 5) {187+ } else if (train && grad_out.dim() == 5) {
183- // Use 3D BN ops for training, merging axes is not required.188+ // Use 3D BN ops for training, merging axes is not required.
184- self_reshape = self;189+ self_reshape = self;
185- grad_out_reshape = grad_out;190+ grad_out_reshape = grad_out;
186- } else {191+ } else {
187- // Infering uses 2dInfer Op, case no matched 3DInfer Op192+ // Infering uses 2dInfer Op, case no matched 3DInfer Op
188- // ncdhw -> ndchw193+ // ncdhw -> ndchw
189- self_reshape = self.permute({0, 2, 1, 3, 4});194+ self_reshape = self.permute({0, 2, 1, 3, 4});
190- grad_out_reshape = grad_out.permute({0, 2, 1, 3, 4});195+ grad_out_reshape = grad_out.permute({0, 2, 1, 3, 4});
191- // nchw=(n*d, c, h, w)196+ // nchw=(n*d, c, h, w)
192- c10::SmallVector<int64_t, N> nchw_shape =197+ c10::SmallVector<int64_t, N> nchw_shape =
193- {self_shape[0] * self_shape[2], self_shape[1], self_shape[3], self_shape[4]};198+ {self_shape[0] * self_shape[2], self_shape[1], self_shape[3], self_shape[4]};
194- // ndchw -> nchw199+ // ndchw -> nchw
195- self_reshape = self_reshape.reshape(nchw_shape);200+ self_reshape = self_reshape.reshape(nchw_shape);
196- grad_out_reshape = grad_out_reshape.reshape(nchw_shape);201+ grad_out_reshape = grad_out_reshape.reshape(nchw_shape);
197- }
198- 
199- int64_t dim_c = self_reshape.size(1);
200- at::TensorOptions options = self.options().dtype(at::ScalarType::Float);
201- 
202- at::Tensor weight_cp = weight;
203- at::Tensor running_mean_cp = running_mean;
204- at::Tensor running_var_cp = running_var;
205- 
206- at::Tensor weight_tensor = weight.defined() ? weight_cp : at::ones({dim_c}, options);
207- at::Tensor running_mean_tensor = running_mean.defined() ? running_mean_cp : at::zeros({dim_c}, options);
208- at::Tensor running_var_tensor = running_var.defined() ? running_var_cp : at::ones({dim_c}, options);
209- 
210- at::Tensor grad_input = npu_preparation::apply_tensor(self_reshape.sizes(), self_reshape.options(), self_reshape);
211- at::Tensor grad_weight = (grad_out.dim() == 5) ?
212- npu_preparation::apply_tensor(weight_tensor, weight_tensor.options().dtype(at::ScalarType::Float)) :
213- npu_preparation::apply_tensor(
214- weight_tensor.sizes(), weight_tensor.options().dtype(at::ScalarType::Float), grad_out);
215- at::Tensor grad_bias = (grad_out.dim() == 5) ?
216- npu_preparation::apply_tensor(weight_tensor, weight_tensor.options().dtype(at::ScalarType::Float)) :
217- npu_preparation::apply_tensor(
218- weight_tensor.sizes(), weight_tensor.options().dtype(at::ScalarType::Float), grad_out);
219- 
220- batch_norm_backward_impl(grad_input, grad_weight, grad_bias, grad_out_reshape, self_reshape, weight_tensor,
221- running_mean_tensor, running_var_tensor, save_mean, save_invstd, train, eps, grad_input_mask);
222- 
223- at::Tensor undefine_grad_input;
224- at::Tensor undefine_grad_weight;
225- at::Tensor undefine_grad_bias;
226- 
227- if (grad_input_mask[0]) {
228- if (!train && self.dim() == 5) {
229- // NCHW -> NDCHW ->NCDHW
230- std::swap(self_shape[1], self_shape[2]);
231- grad_input = grad_input.view(self_shape);
232- grad_input = npu_utils::format_contiguous(grad_input);
233- grad_input = grad_input.permute({0, 2, 1, 3, 4}).clone();
234- } else if (self.dim() < 5) {
235- grad_input = grad_input.view(self_shape);
236- grad_input = npu_utils::format_contiguous(grad_input);
237 }202 }
238- } else {
239- grad_input = undefine_grad_input;
240- }
241 203 
242- if (!grad_input_mask[1]) {204+ int64_t dim_c = self_reshape.size(1);
243- grad_weight = undefine_grad_weight;205+ at::TensorOptions options = self.options().dtype(at::ScalarType::Float);
244- }
245 206 
246- if (!grad_input_mask[2]) {207+ at::Tensor weight_cp = weight;
247- grad_bias = undefine_grad_bias;208+ at::Tensor running_mean_cp = running_mean;
248- }209+ at::Tensor running_var_cp = running_var;
249 210 
250- if (grad_weight.defined()) {211+ at::Tensor weight_tensor = weight.defined() ? weight_cp : at::ones({dim_c}, options);
251- auto weight_format = npu_preparation::get_tensor_npu_format(weight);212+ at::Tensor running_mean_tensor = running_mean.defined() ? running_mean_cp : at::zeros({dim_c}, options);
252- auto grad_weight_format = npu_preparation::get_tensor_npu_format(grad_weight);213+ at::Tensor running_var_tensor = running_var.defined() ? running_var_cp : at::ones({dim_c}, options);
253- if (grad_weight_format == ACL_FORMAT_NC1HWC0 && weight_format == ACL_FORMAT_ND) {214+ 
254- npu_format_helper::unsafe_format_cast(grad_weight, ACL_FORMAT_NC1HWC0, ACL_FORMAT_ND);215+ at::Tensor grad_input = npu_preparation::apply_tensor(self_reshape.sizes(), self_reshape.options(), self_reshape);
255- npu_format_helper::unsafe_format_cast(grad_bias, ACL_FORMAT_NC1HWC0, ACL_FORMAT_ND);216+ at::Tensor grad_weight = (grad_out.dim() == 5) ?
217+ npu_preparation::apply_tensor(weight_tensor, weight_tensor.options().dtype(at::ScalarType::Float)) :
218+ npu_preparation::apply_tensor(
219+ weight_tensor.sizes(), weight_tensor.options().dtype(at::ScalarType::Float), grad_out);
220+ at::Tensor grad_bias = (grad_out.dim() == 5) ?
221+ npu_preparation::apply_tensor(weight_tensor, weight_tensor.options().dtype(at::ScalarType::Float)) :
222+ npu_preparation::apply_tensor(
223+ weight_tensor.sizes(), weight_tensor.options().dtype(at::ScalarType::Float), grad_out);
224+ 
225+ batch_norm_backward_impl(grad_input, grad_weight, grad_bias, grad_out_reshape, self_reshape, weight_tensor,
226+ running_mean_tensor, running_var_tensor, save_mean, save_invstd, train, eps, grad_input_mask);
227+ 
228+ at::Tensor undefine_grad_input;
229+ at::Tensor undefine_grad_weight;
230+ at::Tensor undefine_grad_bias;
231+ 
232+ if (grad_input_mask[0]) {
233+ if (!train && self.dim() == 5) {
234+ // NCHW -> NDCHW ->NCDHW
235+ std::swap(self_shape[1], self_shape[2]);
236+ grad_input = grad_input.view(self_shape);
237+ grad_input = npu_utils::format_contiguous(grad_input);
238+ grad_input = grad_input.permute({0, 2, 1, 3, 4}).clone();
239+ } else if (self.dim() < 5) {
240+ grad_input = grad_input.view(self_shape);
241+ grad_input = npu_utils::format_contiguous(grad_input);
242+ }
243+ } else {
244+ grad_input = undefine_grad_input;
256 }245 }
257- }
258 246 
259- return std::make_tuple(grad_input, grad_weight, grad_bias);247+ if (!grad_input_mask[1]) {
248+ grad_weight = undefine_grad_weight;
249+ }
250+ 
251+ if (!grad_input_mask[2]) {
252+ grad_bias = undefine_grad_bias;
253+ }
254+ 
255+ if (grad_weight.defined()) {
256+ auto weight_format = npu_preparation::get_tensor_npu_format(weight);
257+ auto grad_weight_format = npu_preparation::get_tensor_npu_format(grad_weight);
258+ if (grad_weight_format == ACL_FORMAT_NC1HWC0 && weight_format == ACL_FORMAT_ND) {
259+ npu_format_helper::unsafe_format_cast(grad_weight, ACL_FORMAT_NC1HWC0, ACL_FORMAT_ND);
260+ npu_format_helper::unsafe_format_cast(grad_bias, ACL_FORMAT_NC1HWC0, ACL_FORMAT_ND);
261+ }
262+ }
263+ 
264+ return std::make_tuple(grad_input, grad_weight, grad_bias);
260}265}
261 266 
262} // namespace acl_op267} // namespace acl_op
Mop_plugin/ops/aclops/GeluKernelNpu.cpp+1-1
@@ -40,7 +40,7 @@ at::Tensor& gelu_out(const at::Tensor& self, at::Tensor& result)
40#endif40#endif
41 41 
42#if VERSION_BETWEEN(V2R0, VERSION_NEWEST)42#if VERSION_BETWEEN(V2R0, VERSION_NEWEST)
43-at::Tensor gelu(const at::Tensor& self, c10::string_view approximate)43+at::Tensor gelu(const at::Tensor& self, c10::string_view gelu)
44{44{
45 return gelu_common_nocheck(self);45 return gelu_common_nocheck(self);
46}46}
Mop_plugin/ops/aclops/GroupNormKernelNpu.cpp+5-5
@@ -105,8 +105,8 @@ std::tuple<at::Tensor, at::Tensor, at::Tensor> native_group_norm_swish_out_npu(
105 105 
106std::tuple<at::Tensor, at::Tensor, at::Tensor> native_group_norm(106std::tuple<at::Tensor, at::Tensor, at::Tensor> native_group_norm(
107 const at::Tensor& X,107 const at::Tensor& X,
108- const c10::optional<at::Tensor>& gamma_opt,108+ const c10::optional<at::Tensor>& weight,
109- const c10::optional<at::Tensor>& beta_opt,109+ const c10::optional<at::Tensor>& bias,
110 int64_t N,110 int64_t N,
111 int64_t C,111 int64_t C,
112 int64_t HxW,112 int64_t HxW,
@@ -118,8 +118,8 @@ std::tuple<at::Tensor, at::Tensor, at::Tensor> native_group_norm(
118 at::Tensor variance = npu_preparation::apply_tensor_with_format({N, group}, X.options(), ACL_FORMAT_ND);118 at::Tensor variance = npu_preparation::apply_tensor_with_format({N, group}, X.options(), ACL_FORMAT_ND);
119 at::Tensor rstd = npu_preparation::apply_tensor_with_format({N, group}, X.options(), ACL_FORMAT_ND);119 at::Tensor rstd = npu_preparation::apply_tensor_with_format({N, group}, X.options(), ACL_FORMAT_ND);
120 // DO_COMPATIBILITY is used to determine whether GroupNormSwish exists120 // DO_COMPATIBILITY is used to determine whether GroupNormSwish exists
121- DO_COMPATIBILITY(aclnnGroupNormSwish, acl_op::native_group_norm_out_npu(result, mean, variance, rstd, X, gamma_opt,121+ DO_COMPATIBILITY(aclnnGroupNormSwish, acl_op::native_group_norm_out_npu(result, mean, variance, rstd, X, weight,
122- beta_opt, group, eps, C));122+ bias, group, eps, C));
123- return native_group_norm_swish_out_npu(result, mean, variance, rstd, X, gamma_opt, beta_opt, group, eps, C);123+ return native_group_norm_swish_out_npu(result, mean, variance, rstd, X, weight, bias, group, eps, C);
124}124}
125} // namespace acl_op125} // namespace acl_op
Mop_plugin/ops/aclops/LogicalAndKernelNpu.cpp+6-6
@@ -49,21 +49,21 @@ at::Tensor &logical_and_out_npu_nocheck(at::Tensor &result, const at::Tensor &se
49}49}
50} // namespace50} // namespace
51 51 
52-at::Tensor &logical_and_out(const at::Tensor &self, const at::Tensor &other, at::Tensor &result)52+at::Tensor &logical_and_out(const at::Tensor &self, const at::Tensor &other, at::Tensor &out)
53{53{
54 auto output_size = op_infer::broadcast_ops_npu_output_size(self, other);54 auto output_size = op_infer::broadcast_ops_npu_output_size(self, other);
55- npu_preparation::CheckOut({self}, result, npu_preparation::get_tensor_npu_format(self), result.scalar_type(),55+ npu_preparation::CheckOut({self}, out, npu_preparation::get_tensor_npu_format(self), out.scalar_type(),
56 output_size);56 output_size);
57 57 
58- if (npu_utils::check_match(&result) && (result.dtype() == at::kBool)) {58+ if (npu_utils::check_match(&out) && (out.dtype() == at::kBool)) {
59- logical_and_out_npu_nocheck(result, self, other);59+ logical_and_out_npu_nocheck(out, self, other);
60 } else {60 } else {
61 auto result_copy = npu_preparation::ApplyTensorWithSizes(output_size, self.options().dtype(at::kBool));61 auto result_copy = npu_preparation::ApplyTensorWithSizes(output_size, self.options().dtype(at::kBool));
62 logical_and_out_npu_nocheck(result_copy, self, other);62 logical_and_out_npu_nocheck(result_copy, self, other);
63 result_copy = at_npu::native::custom_ops::npu_dtype_cast(result_copy, self.scalar_type());63 result_copy = at_npu::native::custom_ops::npu_dtype_cast(result_copy, self.scalar_type());
64- npu_utils::format_fresh_view(result, result_copy);64+ npu_utils::format_fresh_view(out, result_copy);
65 }65 }
66- return result;66+ return out;
67}67}
68 68 
69at::Tensor logical_and(const at::Tensor &self, const at::Tensor &other)69at::Tensor logical_and(const at::Tensor &self, const at::Tensor &other)
Mop_plugin/ops/aclops/LogicalOrKernelNpu.cpp+7-7
@@ -43,20 +43,20 @@ at::Tensor &logical_or_out_npu_nocheck(at::Tensor &result, const at::Tensor &sel
43}43}
44} // namespace44} // namespace
45 45 
46-at::Tensor &logical_or_out(const at::Tensor &self, const at::Tensor &other, at::Tensor &result)46+at::Tensor &logical_or_out(const at::Tensor &self, const at::Tensor &other, at::Tensor &out)
47{47{
48 auto output_size = op_infer::broadcast_ops_npu_output_size(self, other);48 auto output_size = op_infer::broadcast_ops_npu_output_size(self, other);
49- npu_preparation::CheckOut({self, other}, result, npu_preparation::get_tensor_npu_format(self), result.scalar_type(),49+ npu_preparation::CheckOut({self, other}, out, npu_preparation::get_tensor_npu_format(self), out.scalar_type(),
50 output_size);50 output_size);
51 51 
52- if (!npu_utils::check_match(&result)) {52+ if (!npu_utils::check_match(&out)) {
53- at::Tensor contiguous_result = npu_utils::format_contiguous(result);53+ at::Tensor contiguous_result = npu_utils::format_contiguous(out);
54 logical_or_out_npu_nocheck(contiguous_result, self, other);54 logical_or_out_npu_nocheck(contiguous_result, self, other);
55- npu_utils::format_fresh_view(result, contiguous_result);55+ npu_utils::format_fresh_view(out, contiguous_result);
56 } else {56 } else {
57- logical_or_out_npu_nocheck(result, self, other);57+ logical_or_out_npu_nocheck(out, self, other);
58 }58 }
59- return result;59+ return out;
60}60}
61 61 
62at::Tensor logical_or(const at::Tensor &self, const at::Tensor &other)62at::Tensor logical_or(const at::Tensor &self, const at::Tensor &other)
Mop_plugin/ops/aclops/NLLLoss2dBackwardKernelNpu.cpp+4-4
@@ -45,13 +45,13 @@ at::Tensor &nll_loss2d_backward_out_nocheck(at::Tensor &grad_input, const at::Te
45} // namespace45} // namespace
46 46 
47at::Tensor &nll_loss2d_backward_out(const at::Tensor &grad_output, const at::Tensor &self, const at::Tensor &target,47at::Tensor &nll_loss2d_backward_out(const at::Tensor &grad_output, const at::Tensor &self, const at::Tensor &target,
48- const c10::optional<at::Tensor> &weight_opt, int64_t reduction,48+ const c10::optional<at::Tensor> &weight, int64_t reduction,
49 int64_t ignore_index, const at::Tensor &total_weight, at::Tensor &grad_input)49 int64_t ignore_index, const at::Tensor &total_weight, at::Tensor &grad_input)
50{50{
51- at::Tensor weight = c10::value_or_else(weight_opt, [] { return at::Tensor(); });51+ at::Tensor weight_ = c10::value_or_else(weight, [] { return at::Tensor(); });
52 at::Tensor weight_tensor = at::ones(self.size(1), self.options());52 at::Tensor weight_tensor = at::ones(self.size(1), self.options());
53- if (weight.defined()) {53+ if (weight_.defined()) {
54- weight_tensor = npu_utils::format_contiguous(weight);54+ weight_tensor = npu_utils::format_contiguous(weight_);
55 }55 }
56 56 
57 if (ignore_index >= 0 && ignore_index < self.size(1)) {57 if (ignore_index >= 0 && ignore_index < self.size(1)) {
Mop_plugin/ops/aclops/PolarKernelNpu.cpp+4-4
@@ -19,17 +19,17 @@
19 19 
20namespace acl_op {20namespace acl_op {
21 21 
22-at::Tensor& polar_out(const at::Tensor& abs, const at::Tensor& angle, at::Tensor& result)22+at::Tensor& polar_out(const at::Tensor& abs, const at::Tensor& angle, at::Tensor& out)
23{23{
24 TORCH_WARN_ONCE(24 TORCH_WARN_ONCE(
25 "Warning: kernel [polar.out] is not supported by NPU currently. Now this kernel is running on CPU.");25 "Warning: kernel [polar.out] is not supported by NPU currently. Now this kernel is running on CPU.");
26 auto abs_cpu = abs.cpu();26 auto abs_cpu = abs.cpu();
27 auto angle_cpu = angle.cpu();27 auto angle_cpu = angle.cpu();
28- auto result_cpu = result.cpu();28+ auto result_cpu = out.cpu();
29 result_cpu = at::polar_out(result_cpu, abs_cpu, angle_cpu);29 result_cpu = at::polar_out(result_cpu, abs_cpu, angle_cpu);
30 30 
31- result.copy_(result_cpu.to(result.device()));31+ out.copy_(result_cpu.to(out.device()));
32- return result;32+ return out;
33}33}
34 34 
35at::Tensor polar(const at::Tensor& abs, const at::Tensor& angle)35at::Tensor polar(const at::Tensor& abs, const at::Tensor& angle)
Mop_plugin/ops/aclops/QuantizePerTensorKernelNpu.cpp+1-1
@@ -41,7 +41,7 @@ at::Tensor& quantize_per_tensor_out_nocheck(
41 .Input(scales)41 .Input(scales)
42 .Input(zero_points)42 .Input(zero_points)
43 .Output(result)43 .Output(result)
44- .Attr("axis", (int64_t)1)44+ .Attr("axis", static_cast<int64_t>(1))
45 .Attr("dtype", dtype_str)45 .Attr("dtype", dtype_str)
46 .Run();46 .Run();
47 47 
Mop_plugin/ops/aclops/SmoothL1LossKernelNpu.cpp+7-7
@@ -44,20 +44,20 @@ at::Tensor &smooth_l1_loss_out_npu_nocheck(at::Tensor &result, const at::Tensor
44} // namespace44} // namespace
45 45 
46at::Tensor &smooth_l1_loss_out(const at::Tensor &self, const at::Tensor &target, int64_t reduction, double beta,46at::Tensor &smooth_l1_loss_out(const at::Tensor &self, const at::Tensor &target, int64_t reduction, double beta,
47- at::Tensor &result)47+ at::Tensor &out)
48{48{
49 auto output_size = op_infer::smooth_l1_loss_npu_output_size(self, reduction);49 auto output_size = op_infer::smooth_l1_loss_npu_output_size(self, reduction);
50- npu_preparation::CheckOut({self, target}, result, npu_preparation::get_tensor_npu_format(self), self.scalar_type(),50+ npu_preparation::CheckOut({self, target}, out, npu_preparation::get_tensor_npu_format(self), self.scalar_type(),
51 output_size);51 output_size);
52 52 
53- if (!npu_utils::check_match(&result)) {53+ if (!npu_utils::check_match(&out)) {
54- at::Tensor contiguous_result = npu_utils::format_contiguous(result);54+ at::Tensor contiguous_result = npu_utils::format_contiguous(out);
55 smooth_l1_loss_out_npu_nocheck(contiguous_result, self, target, reduction, beta);55 smooth_l1_loss_out_npu_nocheck(contiguous_result, self, target, reduction, beta);
56- npu_utils::format_fresh_view(result, contiguous_result);56+ npu_utils::format_fresh_view(out, contiguous_result);
57 } else {57 } else {
58- smooth_l1_loss_out_npu_nocheck(result, self, target, reduction, beta);58+ smooth_l1_loss_out_npu_nocheck(out, self, target, reduction, beta);
59 }59 }
60- return result;60+ return out;
61}61}
62 62 
63at::Tensor smooth_l1_loss(const at::Tensor &self, const at::Tensor &target, int64_t reduction, double beta)63at::Tensor smooth_l1_loss(const at::Tensor &self, const at::Tensor &target, int64_t reduction, double beta)
Mop_plugin/ops/aclops/SoftplusBackwardKernelNpu.cpp+19-17
@@ -26,19 +26,20 @@ at::Tensor& softplus_backward_out(
26 const at::Tensor& self,26 const at::Tensor& self,
27 const at::Scalar& beta,27 const at::Scalar& beta,
28 const at::Scalar& threshold,28 const at::Scalar& threshold,
29- at::Tensor& grad_input) {29+ at::Tensor& grad_input)
30- npu_preparation::CheckOut(30+{
31- {grad_output, self},31+ npu_preparation::CheckOut(
32- grad_input,32+ {grad_output, self},
33- self);33+ grad_input,
34- if (!npu_utils::check_match(&grad_input)) {34+ self);
35- at::Tensor contiguous_result = npu_utils::format_contiguous(grad_input);35+ if (!npu_utils::check_match(&grad_input)) {
36- softplus_backward_out_common_nocheck(contiguous_result, grad_output, self, beta, threshold);36+ at::Tensor contiguous_result = npu_utils::format_contiguous(grad_input);
37- npu_utils::format_fresh_view(grad_input, contiguous_result);37+ softplus_backward_out_common_nocheck(contiguous_result, grad_output, self, beta, threshold);
38- } else {38+ npu_utils::format_fresh_view(grad_input, contiguous_result);
39- softplus_backward_out_common_nocheck(grad_input, grad_output, self, beta, threshold);39+ } else {
40- }40+ softplus_backward_out_common_nocheck(grad_input, grad_output, self, beta, threshold);
41- return grad_input;41+ }
42+ return grad_input;
42}43}
43 44 
44#if VERSION_BETWEEN(V2R0, V2R0)45#if VERSION_BETWEEN(V2R0, V2R0)
@@ -46,10 +47,11 @@ at::Tensor softplus_backward(
46 const at::Tensor& grad_output,47 const at::Tensor& grad_output,
47 const at::Tensor& self,48 const at::Tensor& self,
48 const at::Scalar& beta,49 const at::Scalar& beta,
49- const at::Scalar& threshold) {50+ const at::Scalar& threshold)
50- at::Tensor result = npu_preparation::apply_tensor(self);51+{
51- softplus_backward_out_common_nocheck(result, grad_output, self, beta, threshold);52+ at::Tensor result = npu_preparation::apply_tensor(self);
52- return result;53+ softplus_backward_out_common_nocheck(result, grad_output, self, beta, threshold);
54+ return result;
53}55}
54#endif56#endif
55} // namespace acl_op57} // namespace acl_op
Mop_plugin/ops/aclops/SymeigKernelNpu.cpp+21-20
@@ -22,29 +22,30 @@ namespace acl_op {
22std::tuple<at::Tensor, at::Tensor> _symeig_helper(22std::tuple<at::Tensor, at::Tensor> _symeig_helper(
23 const at::Tensor& self,23 const at::Tensor& self,
24 bool eigenvectors,24 bool eigenvectors,
25- bool upper) {25+ bool upper)
26- auto self_sizes = self.sizes().vec();26+{
27- self_sizes.pop_back();27+ auto self_sizes = self.sizes().vec();
28- auto eigvals = at::empty(self_sizes, self.options());28+ self_sizes.pop_back();
29+ auto eigvals = at::empty(self_sizes, self.options());
29 30 
30- if (self.numel() == 0) {31+ if (self.numel() == 0) {
31- return std::tuple<at::Tensor, at::Tensor>(eigvals, at::empty_like(self, LEGACY_CONTIGUOUS_MEMORY_FORMAT));32+ return std::tuple<at::Tensor, at::Tensor>(eigvals, at::empty_like(self, LEGACY_CONTIGUOUS_MEMORY_FORMAT));
32- }33+ }
33 34 
34- auto self_working_copy = self.clone();35+ auto self_working_copy = self.clone();
35- at_npu::native::OpCommand cmd;36+ at_npu::native::OpCommand cmd;
36- cmd.Name("SelfAdjointEig")37+ cmd.Name("SelfAdjointEig")
37- .Input(self)38+ .Input(self)
38- .Output(eigvals)39+ .Output(eigvals)
39- .Output(self_working_copy)40+ .Output(self_working_copy)
40- .Attr("compute_v", true)41+ .Attr("compute_v", true)
41- .Run();42+ .Run();
42 43 
43- if (eigenvectors) {44+ if (eigenvectors) {
44- return std::tuple<at::Tensor, at::Tensor>(eigvals, self_working_copy);45+ return std::tuple<at::Tensor, at::Tensor>(eigvals, self_working_copy);
45- } else {46+ } else {
46- return std::tuple<at::Tensor, at::Tensor>(eigvals, at::empty({0}, self.options()));47+ return std::tuple<at::Tensor, at::Tensor>(eigvals, at::empty({0}, self.options()));
47- }48+ }
48}49}
49#endif50#endif
50 51 
Mop_plugin/ops/opapi/ArgmaxKernelNpuOpApi.cpp+3-3
@@ -42,7 +42,7 @@ static at::Tensor& argmax_exec(const at::Tensor& self, at::optional<int64_t> dim
42 return result;42 return result;
43}43}
44 44 
45-at::Tensor& argmax_out(const at::Tensor& self, at::optional<int64_t> dim, bool keepdim, at::Tensor& result)45+at::Tensor& argmax_out(const at::Tensor& self, at::optional<int64_t> dim, bool keepdim, at::Tensor& out)
46{46{
47 if (dim.has_value()) {47 if (dim.has_value()) {
48 auto dim_ = at::maybe_wrap_dim(dim.value(), self.dim());48 auto dim_ = at::maybe_wrap_dim(dim.value(), self.dim());
@@ -54,7 +54,7 @@ at::Tensor& argmax_out(const at::Tensor& self, at::optional<int64_t> dim, bool k
54 } else {54 } else {
55 TORCH_CHECK_INDEX(self.numel() != 0, "argmax(): Expected reduction dim to be specified for input.numel() == 0.");55 TORCH_CHECK_INDEX(self.numel() != 0, "argmax(): Expected reduction dim to be specified for input.numel() == 0.");
56 }56 }
57- DO_COMPATIBILITY(aclnnArgMax, acl_op::argmax_out(self, dim, keepdim, result));57+ DO_COMPATIBILITY(aclnnArgMax, acl_op::argmax_out(self, dim, keepdim, out));
58- return argmax_exec(self, dim, keepdim, result, true);58+ return argmax_exec(self, dim, keepdim, out, true);
59}59}
60}60}
Mop_plugin/ops/opapi/ComplexKernelNpuOpApi.cpp+5-5
@@ -19,14 +19,14 @@
19namespace op_api {19namespace op_api {
20using npu_preparation = at_npu::native::OpPreparation;20using npu_preparation = at_npu::native::OpPreparation;
21 21 
22-at::Tensor &complex_out(const at::Tensor &real, const at::Tensor &imag, at::Tensor &result)22+at::Tensor &complex_out(const at::Tensor &real, const at::Tensor &imag, at::Tensor &out)
23{23{
24- DO_COMPATIBILITY(aclnnComplex, acl_op::complex_out(real, imag, result));24+ DO_COMPATIBILITY(aclnnComplex, acl_op::complex_out(real, imag, out));
25 auto outputSize = op_infer::broadcast_ops_npu_output_size(real, imag);25 auto outputSize = op_infer::broadcast_ops_npu_output_size(real, imag);
26- npu_preparation::check_tensor({real}, result, result.scalar_type(), outputSize);26+ npu_preparation::check_tensor({real}, out, out.scalar_type(), outputSize);
27 // calculate the output result of the NPU27 // calculate the output result of the NPU
28- EXEC_NPU_CMD(aclnnComplex, real, imag, result);28+ EXEC_NPU_CMD(aclnnComplex, real, imag, out);
29- return result;29+ return out;
30}30}
31 31 
32at::Tensor complex(const at::Tensor &real, const at::Tensor &imag)32at::Tensor complex(const at::Tensor &real, const at::Tensor &imag)
Mop_plugin/ops/opapi/CummaxKernelNpuOpApi.cpp+6-5
@@ -20,12 +20,13 @@
20namespace op_api {20namespace op_api {
21using npu_preparation = at_npu::native::OpPreparation;21using npu_preparation = at_npu::native::OpPreparation;
22 22 
23-void _cummax_helper(const at::Tensor& self, at::Tensor& values, at::Tensor& indices, int64_t dim) {23+void _cummax_helper(const at::Tensor& self, at::Tensor& values, at::Tensor& indices, int64_t dim)
24- DO_COMPATIBILITY(aclnnCummax, acl_op::_cummax_helper(self, values, indices, dim));24+{
25- npu_preparation::check_tensor({self}, values, values.scalar_type(), self.sizes());25+ DO_COMPATIBILITY(aclnnCummax, acl_op::_cummax_helper(self, values, indices, dim));
26- npu_preparation::check_tensor({self}, indices, indices.scalar_type(), self.sizes());26+ npu_preparation::check_tensor({self}, values, values.scalar_type(), self.sizes());
27+ npu_preparation::check_tensor({self}, indices, indices.scalar_type(), self.sizes());
27 28 
28- EXEC_NPU_CMD(aclnnCummax, self, dim, values, indices);29+ EXEC_NPU_CMD(aclnnCummax, self, dim, values, indices);
29}30}
30 31 
31}32}
Mop_plugin/ops/opapi/CumminKernelNpuOpApi.cpp+4-4
@@ -21,10 +21,10 @@ namespace op_api {
21using npu_preparation = at_npu::native::OpPreparation;21using npu_preparation = at_npu::native::OpPreparation;
22 22 
23void _cummin_helper(const at::Tensor& self, at::Tensor& values, at::Tensor& indices, int64_t dim) {23void _cummin_helper(const at::Tensor& self, at::Tensor& values, at::Tensor& indices, int64_t dim) {
24- DO_COMPATIBILITY(aclnnCummin, acl_op::_cummin_helper(self, values, indices, dim));24+ DO_COMPATIBILITY(aclnnCummin, acl_op::_cummin_helper(self, values, indices, dim));
25- npu_preparation::check_tensor({self}, values, values.scalar_type(), self.sizes());25+ npu_preparation::check_tensor({self}, values, values.scalar_type(), self.sizes());
26- npu_preparation::check_tensor({self}, indices, indices.scalar_type(), self.sizes());26+ npu_preparation::check_tensor({self}, indices, indices.scalar_type(), self.sizes());
27- EXEC_NPU_CMD(aclnnCummin, self, dim, values, indices);27+ EXEC_NPU_CMD(aclnnCummin, self, dim, values, indices);
28}28}
29 29 
30}30}
Mop_plugin/ops/opapi/LayerNormKernelNpuOpApi.cpp+8-8
@@ -22,12 +22,12 @@ namespace op_api {
22 22 
23std::tuple<at::Tensor, at::Tensor, at::Tensor> native_layer_norm(const at::Tensor &input,23std::tuple<at::Tensor, at::Tensor, at::Tensor> native_layer_norm(const at::Tensor &input,
24 at::IntArrayRef normalized_shape,24 at::IntArrayRef normalized_shape,
25- const c10::optional<at::Tensor> &weight_ex,25+ const c10::optional<at::Tensor> &weight,
26- const c10::optional<at::Tensor> &bias_ex, double eps)26+ const c10::optional<at::Tensor> &bias, double eps)
27{27{
28- DO_COMPATIBILITY(aclnnLayerNorm, acl_op::native_layer_norm(input, normalized_shape, weight_ex, bias_ex, eps));28+ DO_COMPATIBILITY(aclnnLayerNorm, acl_op::native_layer_norm(input, normalized_shape, weight, bias, eps));
29- const at::Tensor &weight_op = c10::value_or_else(weight_ex, [] { return at::Tensor(); });29+ const at::Tensor &weight_op = c10::value_or_else(weight, [] { return at::Tensor(); });
30- const at::Tensor &bias_op = c10::value_or_else(bias_ex, [] { return at::Tensor(); });30+ const at::Tensor &bias_op = c10::value_or_else(bias, [] { return at::Tensor(); });
31 const int normalized_ndim = static_cast<int>(normalized_shape.size());31 const int normalized_ndim = static_cast<int>(normalized_shape.size());
32 TORCH_CHECK(normalized_ndim >= 1, "Expected normalized_shape to be at least 1-dimensional, i.e., ",32 TORCH_CHECK(normalized_ndim >= 1, "Expected normalized_shape to be at least 1-dimensional, i.e., ",
33 "containing at least one element, but got normalized_shape = ", normalized_shape,33 "containing at least one element, but got normalized_shape = ", normalized_shape,
@@ -41,9 +41,9 @@ std::tuple<at::Tensor, at::Tensor, at::Tensor> native_layer_norm(const at::Tenso
41 " and normalized_shape = ", normalized_shape,41 " and normalized_shape = ", normalized_shape,
42 OPS_ERROR(ErrCode::PARAM));42 OPS_ERROR(ErrCode::PARAM));
43 43 
44- at::Tensor weight =44+ at::Tensor input_weight =
45 weight_op.defined() ? weight_op.resize_(normalized_shape) : at::ones(normalized_shape, input.options());45 weight_op.defined() ? weight_op.resize_(normalized_shape) : at::ones(normalized_shape, input.options());
46- at::Tensor bias =46+ at::Tensor input_bias =
47 bias_op.defined() ? bias_op.resize_(normalized_shape) : at::zeros(normalized_shape, input.options());47 bias_op.defined() ? bias_op.resize_(normalized_shape) : at::zeros(normalized_shape, input.options());
48 48 
49 // construct output for hostapi49 // construct output for hostapi
@@ -89,7 +89,7 @@ std::tuple<at::Tensor, at::Tensor, at::Tensor> native_layer_norm(const at::Tenso
89 at_npu::native::OpPreparation::apply_tensor_without_format(mean_shape, input.options().dtype(acc_type));89 at_npu::native::OpPreparation::apply_tensor_without_format(mean_shape, input.options().dtype(acc_type));
90 }90 }
91 // call HostAPI function91 // call HostAPI function
92- EXEC_NPU_CMD(aclnnLayerNorm, input, normalized_shape, weight, bias, eps, output, mean_out, rstd_out);92+ EXEC_NPU_CMD(aclnnLayerNorm, input, normalized_shape, input_weight, input_bias, eps, output, mean_out, rstd_out);
93 return std::tie(output, mean_out, rstd_out);93 return std::tie(output, mean_out, rstd_out);
94}94}
95 95 
Mop_plugin/ops/opapi/MmKernelNpuOpApi.cpp+6-6
@@ -34,16 +34,16 @@ at::Tensor mm(const at::Tensor &self, const at::Tensor &mat2)
34 return result;34 return result;
35}35}
36 36 
37-at::Tensor &mm_out(const at::Tensor &self, const at::Tensor &mat2, at::Tensor &result)37+at::Tensor &mm_out(const at::Tensor &self, const at::Tensor &mat2, at::Tensor &out)
38{38{
39 auto names = at::namedinference::compute_matmul_outnames(self, mat2);39 auto names = at::namedinference::compute_matmul_outnames(self, mat2);
40- DO_COMPATIBILITY(aclnnMm, acl_op::mm_out(self, mat2, result));40+ DO_COMPATIBILITY(aclnnMm, acl_op::mm_out(self, mat2, out));
41 auto output_size = {self.size(0), mat2.size(1)};41 auto output_size = {self.size(0), mat2.size(1)};
42- npu_preparation::check_tensor({self, mat2}, result, self.scalar_type(), output_size);42+ npu_preparation::check_tensor({self, mat2}, out, self.scalar_type(), output_size);
43 int8_t cube_math_type = npu_preparation::get_cube_math_type(at_npu::native::env::IsAllowMatmulHF32());43 int8_t cube_math_type = npu_preparation::get_cube_math_type(at_npu::native::env::IsAllowMatmulHF32());
44- EXEC_NPU_CMD(aclnnMm, self, mat2, result, cube_math_type);44+ EXEC_NPU_CMD(aclnnMm, self, mat2, out, cube_math_type);
45- at::namedinference::propagate_names_if_nonempty(result, names);45+ at::namedinference::propagate_names_if_nonempty(out, names);
46- return result;46+ return out;
47}47}
48 48 
49}49}
Mop_plugin/ops/opapi/MvKernelNpuOpApi.cpp+7-7
@@ -21,15 +21,15 @@
21namespace op_api {21namespace op_api {
22using npu_preparation = at_npu::native::OpPreparation;22using npu_preparation = at_npu::native::OpPreparation;
23 23 
24-at::Tensor &mv_out(const at::Tensor &self, const at::Tensor &vec, at::Tensor &result)24+at::Tensor &mv_out(const at::Tensor &self, const at::Tensor &vec, at::Tensor &out)
25{25{
26- DO_COMPATIBILITY(aclnnMv, acl_op::mv_out(self, vec, result));26+ DO_COMPATIBILITY(aclnnMv, acl_op::mv_out(self, vec, out));
27- auto names = at::namedinference::propagate_names_for_addmv(self, vec, result);27+ auto names = at::namedinference::propagate_names_for_addmv(self, vec, out);
28- npu_preparation::check_tensor({self, vec}, result, result.scalar_type(), {self.size(0)});28+ npu_preparation::check_tensor({self, vec}, out, out.scalar_type(), {self.size(0)});
29 int8_t cube_math_type = npu_preparation::get_cube_math_type(at_npu::native::env::IsAllowMatmulHF32());29 int8_t cube_math_type = npu_preparation::get_cube_math_type(at_npu::native::env::IsAllowMatmulHF32());
30- EXEC_NPU_CMD(aclnnMv, self, vec, result, cube_math_type);30+ EXEC_NPU_CMD(aclnnMv, self, vec, out, cube_math_type);
31- at::namedinference::propagate_names_if_nonempty(result, names);31+ at::namedinference::propagate_names_if_nonempty(out, names);
32- return result;32+ return out;
33}33}
34 34 
35at::Tensor mv(const at::Tensor &self, const at::Tensor &vec)35at::Tensor mv(const at::Tensor &self, const at::Tensor &vec)
Mop_plugin/ops/opapi/SmoothL1LossKernelNpuOpApi.cpp+6-6
@@ -21,15 +21,15 @@ namespace op_api {
21using npu_preparation = at_npu::native::OpPreparation;21using npu_preparation = at_npu::native::OpPreparation;
22 22 
23at::Tensor &smooth_l1_loss_out(const at::Tensor &self, const at::Tensor &target, int64_t reduction, double beta,23at::Tensor &smooth_l1_loss_out(const at::Tensor &self, const at::Tensor &target, int64_t reduction, double beta,
24- at::Tensor &result)24+ at::Tensor &out)
25{25{
26- DO_COMPATIBILITY(aclnnSmoothL1Loss, acl_op::smooth_l1_loss_out(self, target, reduction, beta, result));26+ DO_COMPATIBILITY(aclnnSmoothL1Loss, acl_op::smooth_l1_loss_out(self, target, reduction, beta, out));
27 auto outputSize = op_infer::smooth_l1_loss_npu_output_size(self, reduction);27 auto outputSize = op_infer::smooth_l1_loss_npu_output_size(self, reduction);
28- npu_preparation::check_tensor({self, target}, result, result.scalar_type(), outputSize);28+ npu_preparation::check_tensor({self, target}, out, out.scalar_type(), outputSize);
29- npu_preparation::check_memory({self, target}, {result});29+ npu_preparation::check_memory({self, target}, {out});
30 float sigma = static_cast<float>(beta);30 float sigma = static_cast<float>(beta);
31- EXEC_NPU_CMD(aclnnSmoothL1Loss, self, target, reduction, sigma, result);31+ EXEC_NPU_CMD(aclnnSmoothL1Loss, self, target, reduction, sigma, out);
32- return result;32+ return out;
33}33}
34 34 
35at::Tensor smooth_l1_loss(const at::Tensor &self, const at::Tensor &target, int64_t reduction, double beta)35at::Tensor smooth_l1_loss(const at::Tensor &self, const at::Tensor &target, int64_t reduction, double beta)
Mop_plugin/ops/opapi/SoftmaxKernelNpuOpApi.cpp+13-11
@@ -20,19 +20,21 @@
20 20 
21namespace op_api {21namespace op_api {
22 22 
23-at::Tensor softmax(const at::Tensor& self, int64_t dim, c10::optional<at::ScalarType> dtype) {23+at::Tensor softmax(const at::Tensor& self, int64_t dim, c10::optional<at::ScalarType> dtype)
24- DO_COMPATIBILITY(aclnnSoftmax, acl_op::softmax(self, dim, dtype));24+{
25- auto result = [&]() {25+ DO_COMPATIBILITY(aclnnSoftmax, acl_op::softmax(self, dim, dtype));
26- at::NoNamesGuard guard;26+ auto result = [&]() {
27- at::Tensor converted = dtype.has_value() ? at_npu::native::custom_ops::npu_dtype_cast(self, dtype.value()) : self;27+ at::NoNamesGuard guard;
28- return at::_softmax(converted, dim, false);28+ at::Tensor converted = dtype.has_value() ? at_npu::native::custom_ops::npu_dtype_cast(self, dtype.value()) : self;
29- }();29+ return at::_softmax(converted, dim, false);
30- at::namedinference::propagate_names(result, self);30+ }();
31- return result;31+ at::namedinference::propagate_names(result, self);
32+ return result;
32}33}
33 34 
34-at::Tensor softmax(const at::Tensor& self, at::Dimname dim, c10::optional<at::ScalarType> dtype) {35+at::Tensor softmax(const at::Tensor& self, at::Dimname dim, c10::optional<at::ScalarType> dtype)
35- return op_api::softmax(self, dimname_to_position(self, dim), dtype);36+{
37+ return op_api::softmax(self, dimname_to_position(self, dim), dtype);
36}38}
37 39 
38}40}
Mop_plugin/ops/opapi/UpsampleLinear1dKernelNpuOpApi.cpp+5-5
@@ -22,17 +22,17 @@ using npu_preparation = at_npu::native::OpPreparation;
22constexpr int DEFAULT_SCALES = -1;22constexpr int DEFAULT_SCALES = -1;
23 23 
24at::Tensor &upsample_linear1d_out(const at::Tensor &self, at::IntArrayRef output_size, bool align_corners,24at::Tensor &upsample_linear1d_out(const at::Tensor &self, at::IntArrayRef output_size, bool align_corners,
25- c10::optional<double> scales, at::Tensor &result)25+ c10::optional<double> scales, at::Tensor &out)
26{26{
27 DO_COMPATIBILITY(aclnnUpsampleLinear1d,27 DO_COMPATIBILITY(aclnnUpsampleLinear1d,
28- acl_op::upsample_linear1d_out(self, output_size, align_corners, scales, result));28+ acl_op::upsample_linear1d_out(self, output_size, align_corners, scales, out));
29 29 
30 auto outsize = op_infer::upsample_linear1d_npu_output_size(self, output_size);30 auto outsize = op_infer::upsample_linear1d_npu_output_size(self, output_size);
31- npu_preparation::check_tensor({self}, result, self, outsize);31+ npu_preparation::check_tensor({self}, out, self, outsize);
32 double scales_h_attr = scales.value_or(DEFAULT_SCALES);32 double scales_h_attr = scales.value_or(DEFAULT_SCALES);
33 33 
34- EXEC_NPU_CMD(aclnnUpsampleLinear1d, self, output_size, align_corners, scales_h_attr, result);34+ EXEC_NPU_CMD(aclnnUpsampleLinear1d, self, output_size, align_corners, scales_h_attr, out);
35- return result;35+ return out;
36}36}
37 37 
38at::Tensor upsample_linear1d(const at::Tensor &self, at::IntArrayRef output_size, bool align_corners,38at::Tensor upsample_linear1d(const at::Tensor &self, at::IntArrayRef output_size, bool align_corners,