修改AllGatherMatmul&MatmulAllReduceScatter&MatmulAllReduce算子的comm_mode默认值为ai

Mop_plugin/ops/opapi/AllGatherBaseMatmulKernelNpuOpApi.cpp+1-2

	@@ -48,8 +48,7 @@ std::tuple<at::Tensor, at::Tensor> npu_all_gather_base_mm(const at::Tensor &self
48	"The K-axis in the two inputs of Matmul must be equal, but in reality, the K-axis of x1 is ",	48	"The K-axis in the two inputs of Matmul must be equal, but in reality, the K-axis of x1 is ",
49	self.size(1), " and the K-axis of x2 is ", x2.size(0), "." + OPS_ERROR(ErrCode::PARAM));	49	self.size(1), " and the K-axis of x2 is ", x2.size(0), "." + OPS_ERROR(ErrCode::PARAM));
50	bool isSocBelowAscend950 = (c10_npu::GetSocVersion() < c10_npu::SocVersion::Ascend950);	50	bool isSocBelowAscend950 = (c10_npu::GetSocVersion() < c10_npu::SocVersion::Ascend950);
51	- std::string default_comm_mode = isSocBelowAscend950 ? "ai_cpu" : "";	51	+ c10::string_view comm_mode_value = comm_mode.value_or("ai_cpu");
52	- c10::string_view comm_mode_value = comm_mode.value_or(default_comm_mode);
53	auto out_gather_mm_size = get_output_size_gather_mm(self, x2, world_size, gather_index);	52	auto out_gather_mm_size = get_output_size_gather_mm(self, x2, world_size, gather_index);
54	auto out_gather_size = get_output_size_gather(self, x2, world_size, gather_index);	53	auto out_gather_size = get_output_size_gather(self, x2, world_size, gather_index);
55	bool has_quant = x2_scale.has_value();	54	bool has_quant = x2_scale.has_value();

Mop_plugin/ops/opapi/AllGatherQuantMatmulKernelNpuOpApi.cpp+8-21

	@@ -88,27 +88,14 @@ std::tuple<at::Tensor, at::Tensor, at::Tensor> npu_all_gather_quant_mm(
88	gather_out_size, self.options().dtype(gather_out_scalar_type)) : at::empty({0}, self.options());	88	gather_out_size, self.options().dtype(gather_out_scalar_type)) : at::empty({0}, self.options());
89	at::Tensor amax = amax_output ? npu_preparation::apply_tensor_without_format(	89	at::Tensor amax = amax_output ? npu_preparation::apply_tensor_without_format(
90	amax_size, self.options().dtype(amax_dtype)) : at::Tensor();	90	amax_size, self.options().dtype(amax_dtype)) : at::Tensor();
91	- TensorWrapper x1_wrapper = {	91	+ TensorWrapper x1_wrapper = make_wrapper(self, x1_dtype);
92	- self, (x1_dtype.has_value()) ? c10_npu::GetAclDataType(x1_dtype.value())	92	+ TensorWrapper x2_wrapper = make_wrapper(x2, x2_dtype);
93	- : npu_preparation::convert_to_acl_data_type(self.scalar_type())};	93	+ TensorWrapper gather_out_wrapper = make_wrapper(gather_out, gather_out_dtype);
94	- TensorWrapper x2_wrapper = {x2, (x2_dtype.has_value())	94	+ const at::Tensor &x1_scale_real = x1_scale.value_or(at::Tensor());
95	- ? c10_npu::GetAclDataType(x2_dtype.value())	95	+ const at::Tensor &x2_scale_real = x2_scale.value_or(at::Tensor());
96	- : npu_preparation::convert_to_acl_data_type(x2.scalar_type())};	96	+ TensorWrapper x1_scale_wrapper = make_wrapper(x1_scale_real, x1_scale_dtype);
97	- TensorWrapper gather_out_wrapper = {	97	+ TensorWrapper x2_scale_wrapper = make_wrapper(x2_scale_real, x2_scale_dtype);
98	- gather_out, (gather_out_dtype.has_value())	98	+ c10::string_view comm_mode_value = comm_mode.value_or("ai_cpu");
99	- ? c10_npu::GetAclDataType(gather_out_dtype.value())
100	- : npu_preparation::convert_to_acl_data_type(gather_out_scalar_type)};
101	- auto x1_scale_scalar_dtype = x1_scale.has_value() ? x1_scale.value().scalar_type() : at::kFloat;
102	- auto x2_scale_scalar_dtype = x2_scale.has_value() ? x2_scale.value().scalar_type() : at::kFloat;
103	- TensorWrapper x1_scale_wrapper = {x1_scale.value_or(at::Tensor()),
104	- (x1_scale_dtype.has_value())
105	- ? c10_npu::GetAclDataType(x1_scale_dtype.value())
106	- : npu_preparation::convert_to_acl_data_type(x1_scale_scalar_dtype)};
107	- TensorWrapper x2_scale_wrapper = {x2_scale.value_or(at::Tensor()),
108	- (x2_scale_dtype.has_value())
109	- ? c10_npu::GetAclDataType(x2_scale_dtype.value())
110	- : npu_preparation::convert_to_acl_data_type(x2_scale_scalar_dtype)};
111	- c10::string_view comm_mode_value = comm_mode.value_or("");
112	char comm_mode_ptr = const_cast<char >(comm_mode_value.data());	99	char comm_mode_ptr = const_cast<char >(comm_mode_value.data());
113	EXEC_NPU_CMD(aclnnAllGatherMatmulV2, x1_wrapper, x2_wrapper, bias_value, x1_scale_wrapper, x2_scale_wrapper,	100	EXEC_NPU_CMD(aclnnAllGatherMatmulV2, x1_wrapper, x2_wrapper, bias_value, x1_scale_wrapper, x2_scale_wrapper,
114	quant_scale_value, block_size, hcom_value, gather_index, comm_turn, stream_mode, group_size, comm_mode_ptr,	101	quant_scale_value, block_size, hcom_value, gather_index, comm_turn, stream_mode, group_size, comm_mode_ptr,

Mop_plugin/ops/opapi/MatmulAllReduceBaseKernelNpuOpApi.cpp+1-1

	@@ -175,7 +175,7 @@ at::Tensor npu_mm_all_reduce_base(const at::Tensor& x1, const at::Tensor& x2, c1
175	int64_t comm_quant_mode, c10::optional<c10::string_view> comm_mode)	175	int64_t comm_quant_mode, c10::optional<c10::string_view> comm_mode)
176	{	176	{
177	bool is_comm_mode = comm_mode.has_value();	177	bool is_comm_mode = comm_mode.has_value();
178	- c10::string_view comm_mode_value = comm_mode.value_or("");	178	+ c10::string_view comm_mode_value = comm_mode.value_or("ai_cpu");
179	char comm_mode_ptr = const_cast<char >(comm_mode_value.data());	179	char comm_mode_ptr = const_cast<char >(comm_mode_value.data());
180	bool is_a8 = (x1_dtype.has_value() ?	180	bool is_a8 = (x1_dtype.has_value() ?
181	(x1_dtype.value() == static_cast<int>(c10_npu::DType::HIFLOAT8)) : false) \|\|	181	(x1_dtype.value() == static_cast<int>(c10_npu::DType::HIFLOAT8)) : false) \|\|

Mop_plugin/ops/opapi/MatmulReduceScatterBaseKernelNpuOpApi.cpp+1-2

	@@ -33,8 +33,7 @@ at::Tensor npu_mm_reduce_scatter_base(const at::Tensor & self, const at::Tensor
33	TORCH_CHECK(self.size(0) % world_size == 0, "The M-axis in input of Matmul should be be divisible by world_size."	33	TORCH_CHECK(self.size(0) % world_size == 0, "The M-axis in input of Matmul should be be divisible by world_size."
34	+ OPS_ERROR(ErrCode::PARAM));	34	+ OPS_ERROR(ErrCode::PARAM));
35	bool isSocBelowAscend950 = (c10_npu::GetSocVersion() < c10_npu::SocVersion::Ascend950);	35	bool isSocBelowAscend950 = (c10_npu::GetSocVersion() < c10_npu::SocVersion::Ascend950);
36	- std::string default_comm_mode = isSocBelowAscend950 ? "ai_cpu" : "";	36	+ c10::string_view comm_mode_value = comm_mode.value_or("ai_cpu");
37	- c10::string_view comm_mode_value = comm_mode.value_or(default_comm_mode);
38	auto output_size = {self.size(0) / world_size, x2.size(1)};	37	auto output_size = {self.size(0) / world_size, x2.size(1)};
39	auto result_dtype = self.scalar_type();	38	auto result_dtype = self.scalar_type();
40	bool has_quant = x2_scale.has_value();	39	bool has_quant = x2_scale.has_value();

Mop_plugin/ops/opapi/QuantMatmulReduceScatterKernelNpuOpApi.cpp+9-17

	@@ -42,7 +42,9 @@ std::tuple<at::Tensor, at::Tensor> npu_quant_mm_reduce_scatter(
42	TORCH_CHECK(world_size != 0, "world_size cannot be zero", OPS_ERROR(ErrCode::PARAM));	42	TORCH_CHECK(world_size != 0, "world_size cannot be zero", OPS_ERROR(ErrCode::PARAM));
43	TORCH_CHECK(self.size(0) % world_size == 0, "The M-axis in input of Matmul should be be divisible by world_size",	43	TORCH_CHECK(self.size(0) % world_size == 0, "The M-axis in input of Matmul should be be divisible by world_size",
44	OPS_ERROR(ErrCode::PARAM));	44	OPS_ERROR(ErrCode::PARAM));
45	- c10::string_view comm_mode_value = comm_mode.value_or("");	45	+ bool isSocBelowAscend950 = (c10_npu::GetSocVersion() < c10_npu::SocVersion::Ascend950);
		46	+ c10::string_view default_comm_mode = isSocBelowAscend950 ? "aiv" : "ai_cpu";
		47	+ c10::string_view comm_mode_value = comm_mode.value_or(default_comm_mode);
46	at::IntArrayRef group_size_list = group_sizes.value_or(at::IntArrayRef{});	48	at::IntArrayRef group_size_list = group_sizes.value_or(at::IntArrayRef{});
47	int64_t group_size = op_plugin::utils::check_and_get_group_size(group_size_list);	49	int64_t group_size = op_plugin::utils::check_and_get_group_size(group_size_list);
48	TORCH_CHECK(group_size != -1, "Invalid group_sizes.", OPS_ERROR(ErrCode::PARAM));	50	TORCH_CHECK(group_size != -1, "Invalid group_sizes.", OPS_ERROR(ErrCode::PARAM));
	@@ -77,22 +79,12 @@ std::tuple<at::Tensor, at::Tensor> npu_quant_mm_reduce_scatter(
77	if (amax_output) {	79	if (amax_output) {
78	amax_output_result = npu_preparation::apply_tensor_without_format({1}, self.options().dtype(at::kFloat));	80	amax_output_result = npu_preparation::apply_tensor_without_format({1}, self.options().dtype(at::kFloat));
79	}	81	}
80	- TensorWrapper x1_wrapper = {self, (x1_dtype.has_value())	82	+ TensorWrapper x1_wrapper = make_wrapper(self, x1_dtype);
81	- ? c10_npu::GetAclDataType(x1_dtype.value())	83	+ TensorWrapper x2_wrapper = make_wrapper(x2, x2_dtype);
82	- : npu_preparation::convert_to_acl_data_type(self.scalar_type())};	84	+ const at::Tensor &x1_scale_real = x1_scale.value_or(at::Tensor());
83	- TensorWrapper x2_wrapper = {x2, (x2_dtype.has_value())	85	+ const at::Tensor &x2_scale_real = x2_scale.value_or(at::Tensor());
84	- ? c10_npu::GetAclDataType(x2_dtype.value())	86	+ TensorWrapper x1_scale_wrapper = make_wrapper(x1_scale_real, x1_scale_dtype);
85	- : npu_preparation::convert_to_acl_data_type(x2.scalar_type())};	87	+ TensorWrapper x2_scale_wrapper = make_wrapper(x2_scale_real, x2_scale_dtype);
86	- auto x1_scale_scalar_dtype = x1_scale.has_value() ? x1_scale.value().scalar_type() : at::kFloat;
87	- auto x2_scale_scalar_dtype = x2_scale.has_value() ? x2_scale.value().scalar_type() : at::kFloat;
88	- TensorWrapper x1_scale_wrapper = {x1_scale.value_or(at::Tensor()),
89	- (x1_scale_dtype.has_value())
90	- ? c10_npu::GetAclDataType(x1_scale_dtype.value())
91	- : npu_preparation::convert_to_acl_data_type(x1_scale_scalar_dtype)};
92	- TensorWrapper x2_scale_wrapper = {x2_scale.value_or(at::Tensor()),
93	- (x2_scale_dtype.has_value())
94	- ? c10_npu::GetAclDataType(x2_scale_dtype.value())
95	- : npu_preparation::convert_to_acl_data_type(x2_scale_scalar_dtype)};
96	EXEC_NPU_CMD(aclnnMatmulReduceScatterV2, x1_wrapper, x2_wrapper, bias_real, x1_scale_wrapper, x2_scale_wrapper,	88	EXEC_NPU_CMD(aclnnMatmulReduceScatterV2, x1_wrapper, x2_wrapper, bias_real, x1_scale_wrapper, x2_scale_wrapper,
97	quant_scale_real, block_size, hcom_ptr, reduce_op_ptr, comm_turn, stream_mode, group_size, comm_mode_ptr,	89	quant_scale_real, block_size, hcom_ptr, reduce_op_ptr, comm_turn, stream_mode, group_size, comm_mode_ptr,
98	result, amax_output_result);	90	result, amax_output_result);