[master][Fix] Fix static check errors detected by CODESPELL-pytorch-AtomGit

M.github/workflows/_build-and-test.yml+1-1

	@@ -14,7 +14,7 @@ on:
14	image:	14	image:
15	required: true	15	required: true
16	type: string	16	type: string
17	- description: The docker iamge which will be loaded	17	+ description: The docker image which will be loaded
18		18
19	jobs:	19	jobs:
20	build-and-test:	20	build-and-test:

M.github/workflows/manual.yml+1-1

	@@ -17,7 +17,7 @@ on:
17	required: true	17	required: true
18	type: string	18	type: string
19	default: 'ascendai/cann:7.1-openeuler2203sp2'	19	default: 'ascendai/cann:7.1-openeuler2203sp2'
20	- description: The docker iamge which will be loaded	20	+ description: The docker image which will be loaded
21		21
22	jobs:	22	jobs:
23	linux-py3_8-fetch-and-rebase:	23	linux-py3_8-fetch-and-rebase:

M.lintrunner.toml+29-44

	@@ -1153,50 +1153,35 @@ command = [
1153	# '@{{PATHSFILE}}',	1153	# '@{{PATHSFILE}}',
1154	# ]	1154	# ]
1155		1155
1156	-# [[linter]]	1156	+[[linter]]
1157	-# code = 'CODESPELL'	1157	+code = 'CODESPELL'
1158	-# command = [	1158	+command = [
1159	-# 'uv',	1159	+ 'uv',
1160	-# 'run',	1160	+ 'run',
1161	-# '--script',	1161	+ '--script',
1162	-# 'tools/linter/adapters/codespell_linter.py',	1162	+ 'tools/linter/adapters/codespell_linter.py',
1163	-# '--',	1163	+ '--',
1164	-# '@{{PATHSFILE}}'	1164	+ '@{{PATHSFILE}}'
1165	-# ]	1165	+]
1166	-# include_patterns = [	1166	+include_patterns = [
1167	-# '**',	1167	+ '**',
1168	-# ]	1168	+]
1169	-# exclude_patterns = [	1169	+exclude_patterns = [
1170	-# # We don't care too much about files in this directory, don't enforce	1170	+ # We don't care too much about files in this directory, don't enforce
1171	-# # spelling on them	1171	+ # spelling on them
1172	-# 'caffe2/**',	1172	+ 'caffe2/**',
1173	-# 'fb/**',	1173	+ 'fb/**',
1174	-# '/fb/',	1174	+ '/fb/',
1175	-# 'test/npu/test_fault_mode.py',	1175	+ 'third_party/**',
1176	-# 'torch_npu/utils/_dynamo.py',	1176	+ 'test/dynamo/cpython/**',
1177	-# 'test/npu/test_resnet.py',	1177	+ 'torch_npu/_vendor/**',
1178	-# 'test/npu/test_public_bindings.py',	1178	+ 'torch_npu/_inductor/fx_passes/serialized_patterns/**',
1179	-# 'test/npu/test_compatibility.py',	1179	+ 'torch_npu/_inductor/autoheuristic/artifacts/**',
1180	-# 'third_party/**',	1180	+ 'torch_npu/_inductor/kernel/vendored_templates/cutedsl/kernels/**',
1181	-# 'test/dynamo/cpython/**',	1181	+ 'torch_npu/_inductor/kernel/vendored_templates/cutedsl/dense_blockscaled_gemm_persistent.py',
1182	-# 'torch_npu/_vendor/**',	1182	+ 'torch_npu/utils/model_dump/preact.mjs',
1183	-# 'torch_npu/_inductor/fx_passes/serialized_patterns/**',	1183	+]
1184	-# 'torch_npu/_inductor/autoheuristic/artifacts/**',	1184	+is_formatter = true
1185	-# 'torch_npu/_inductor/kernel/vendored_templates/cutedsl/kernels/**',
1186	-# 'torch_npu/_inductor/kernel/vendored_templates/cutedsl/dense_blockscaled_gemm_persistent.py',
1187	-# 'torch_npu/utils/model_dump/preact.mjs',
1188	-# # NPUGraph logs files
1189	-# 'torch_npu/_logging/_internal.py',
1190	-# 'torch_npu/csrc/core/npu/NPUGraph.cpp',
1191	-# 'torch_npu/csrc/core/npu/NPUGraph.h',
1192	-# 'torch_npu/csrc/npu/Graph.cpp',
1193	-# 'torch_npu/csrc/core/npu/NPUCachingAllocator.cpp',
1194	-# 'torch_npu/csrc/core/npu/NPUWorkspaceAllocator.cpp',
1195	-# 'torch_npu/npu/_graph_tree.py',
1196	-# 'torch_npu/npu/graphs.py',
1197	-# 'torch_npu/utils/_graph_tree.py',
1198	-# ]
1199	-# is_formatter = true
1200		1185
1201	# # usort + ruff-format	1186	# # usort + ruff-format
1202	# [[linter]]	1187	# [[linter]]

Mci/access_control/strategy/core.py+1-1

	@@ -4,7 +4,7 @@ from .base import AccurateTest
4		4
5	class CoreTestStrategy(AccurateTest):	5	class CoreTestStrategy(AccurateTest):
6	"""	6	"""
7	- Determine whether the core tests should be runned	7	+ Determine whether the core tests should be run
8	"""	8	"""
9	def __init__(self):	9	def __init__(self):
10	super().__init__()	10	super().__init__()

Mtest/custom_ops/test_npu_conv2d.py+2-2

	@@ -21,7 +21,7 @@ class TestNpuConv2d(TestCase):
21		21
22	def test_npu_conv2d_fp16(self):	22	def test_npu_conv2d_fp16(self):
23	shape_format = [	23	shape_format = [
24	- # input, weigth, bias, stride, padding, dilation, groups	24	+ # input, weight, bias, stride, padding, dilation, groups
25	[[np.float16, 0, [16, 128, 112, 112]], [np.float16, 0, [256, 128, 3, 3]], [np.float16, 2, [256]], [1, 1],	25	[[np.float16, 0, [16, 128, 112, 112]], [np.float16, 0, [256, 128, 3, 3]], [np.float16, 2, [256]], [1, 1],
26	[1, 1], [1, 1], 1],	26	[1, 1], [1, 1], 1],
27	[[np.float16, 0, [1024, 232, 7, 7]], [np.float16, 0, [232, 232, 1, 1]], [np.float16, 2, [232]], [1, 2],	27	[[np.float16, 0, [1024, 232, 7, 7]], [np.float16, 0, [232, 232, 1, 1]], [np.float16, 2, [232]], [1, 2],
	@@ -51,7 +51,7 @@ class TestNpuConv2d(TestCase):
51		51
52	def test_npu_conv2d_fp32(self):	52	def test_npu_conv2d_fp32(self):
53	shape_format = [	53	shape_format = [
54	- # input, weigth, bias, stride, padding, dilation, groups	54	+ # input, weight, bias, stride, padding, dilation, groups
55	[[np.float32, 0, [16, 128, 112, 112]], [np.float32, 0, [256, 128, 3, 3]], [np.float32, 2, [256]], [1, 1],	55	[[np.float32, 0, [16, 128, 112, 112]], [np.float32, 0, [256, 128, 3, 3]], [np.float32, 2, [256]], [1, 1],
56	[1, 1], [1, 1], 1],	56	[1, 1], [1, 1], 1],
57	[[np.float32, 0, [1024, 232, 7, 7]], [np.float32, 0, [232, 232, 1, 1]], [np.float32, 2, [232]], [1, 2],	57	[[np.float32, 0, [1024, 232, 7, 7]], [np.float32, 0, [232, 232, 1, 1]], [np.float32, 2, [232]], [1, 2],

Mtest/custom_ops/test_npu_conv3d.py+2-2

Mtest/custom_ops/test_npu_iou.py+1-1

	@@ -10,7 +10,7 @@ class TestNpuIou(TestCase):
10	def box_area(boxes):	10	def box_area(boxes):
11	return (boxes[:, 2] - boxes[:, 0]) * (boxes[:, 3] - boxes[:, 1])	11	return (boxes[:, 2] - boxes[:, 0]) * (boxes[:, 3] - boxes[:, 1])
12		12
13	- # Logics here have some differents from torchvision.	13	+ # Logics here have some differences from torchvision.
14	lt = torch.max(bboxes[:, :2], gtboxes[:, None, :2])	14	lt = torch.max(bboxes[:, :2], gtboxes[:, None, :2])
15	rb = torch.min(bboxes[:, 2:], gtboxes[:, None, 2:])	15	rb = torch.min(bboxes[:, 2:], gtboxes[:, None, 2:])
16	wh = torch.clamp(rb - lt, min=0)	16	wh = torch.clamp(rb - lt, min=0)

Mtest/custom_ops/test_npu_transpose2d.py+1-1

	@@ -22,7 +22,7 @@ class TestNpuConv2d(TestCase):
22		22
23	def test_npu_conv_transpose2d(self):	23	def test_npu_conv_transpose2d(self):
24	shape_format = [	24	shape_format = [
25	- # input, weigth, bias, stride, padding, output_padding, dilation, groups	25	+ # input, weight, bias, stride, padding, output_padding, dilation, groups
26	[[np.float16, 0, [1, 3, 3, 3]], [np.float16, 0, [3, 2, 3, 3]], [np.float16, 2, [2]], [1, 1], [0, 0], [0, 0],	26	[[np.float16, 0, [1, 3, 3, 3]], [np.float16, 0, [3, 2, 3, 3]], [np.float16, 2, [2]], [1, 1], [0, 0], [0, 0],
27	[1, 1], 1],	27	[1, 1], 1],
28	[[np.float32, 0, [1, 3, 3, 3]], [np.float32, 0, [3, 2, 3, 3]], [np.float32, 2, [2]], [1, 1], [0, 0], [0, 0],	28	[[np.float32, 0, [1, 3, 3, 3]], [np.float32, 0, [3, 2, 3, 3]], [np.float32, 2, [2]], [1, 1], [0, 0], [0, 0],

Mtest/distributed/pipelining/schedule_registry.py+1-1

	@@ -45,7 +45,7 @@ class ScheduleVShaped(PipelineScheduleMulti):
45	)	45	)
46		46
47	# Go through one microbatch	47	# Go through one microbatch
48	- # Note(whc) - it might be easier to work with thes schedules by writing them as a list of	48	+ # Note(whc) - it might be easier to work with these schedules by writing them as a list of
49	# ["0F0", ...] and then parsing them in the test infra to turn them into actions.	49	# ["0F0", ...] and then parsing them in the test infra to turn them into actions.
50	self.pipeline_order = {	50	self.pipeline_order = {
51	0: [	51	0: [

Mtest/distributed/test_flight_recorder.py+1-1

	@@ -50,7 +50,7 @@ class HCCLTraceTestBase(MultiProcessTestCase):
50		50
51	def _join_processes(self, fn):	51	def _join_processes(self, fn):
52	# We need to patch sys.exit() as skip_if will use sys.exit() and	52	# We need to patch sys.exit() as skip_if will use sys.exit() and
53	- # the exit code from the this process will not be catched.	53	+ # the exit code from the this process will not be caught.
54	with mock.patch("sys.exit") as exit_mock:	54	with mock.patch("sys.exit") as exit_mock:
55	fn()	55	fn()
56	super()._join_processes(fn)	56	super()._join_processes(fn)

Mtest/distributed/test_get_p2p_stream_id.py+1-1

	@@ -100,7 +100,7 @@ class P2PStreamIdTest(TestCase):
100	peer = 1 - rank	100	peer = 1 - rank
101	p2p_stream_id = backend.get_p2p_stream_id(device, peer, 0)	101	p2p_stream_id = backend.get_p2p_stream_id(device, peer, 0)
102		102
103	- # Verify P2P Stream ID is invaild	103	+ # Verify P2P Stream ID is invalid
104	assert0 = True if p2p_stream_id == -1 else False	104	assert0 = True if p2p_stream_id == -1 else False
105		105
106	c2p.put(assert0)	106	c2p.put(assert0)

Mtest/dynamo/test_trace_rules.py+1-1

	@@ -106,7 +106,7 @@ def gen_allowed_objs_and_ids(record=False, c_binding_only=True) -> AllowedObject
106	torch_name_rule_map = dict()	106	torch_name_rule_map = dict()
107		107
108	# In some platforms, these functions were loaded as classes instead of functions.	108	# In some platforms, these functions were loaded as classes instead of functions.
109	- # To mitigate these weired cases, we need this special check.	109	+ # To mitigate these weird cases, we need this special check.
110	def is_special_functions(obj):	110	def is_special_functions(obj):
111	return hashable(obj) and obj in {	111	return hashable(obj) and obj in {
112	torch._C._cuda_isCurrentStreamCapturing,	112	torch._C._cuda_isCurrentStreamCapturing,

Mtest/jit/test_freezing.py+3-3

Mtest/jit/test_npu.py+2-2

	@@ -266,7 +266,7 @@ class TestCUDA(JitTestCase):
266	default_stream_id : int	266	default_stream_id : int
267	user_stream_id : int	267	user_stream_id : int
268		268
269	- # The test aims at checking different stream proporties.	269	+ # The test aims at checking different stream properties.
270	@torch.jit.script	270	@torch.jit.script
271	def test_get_stream():	271	def test_get_stream():
272	device_index = torch.npu.current_device()	272	device_index = torch.npu.current_device()
	@@ -422,7 +422,7 @@ class TestCUDA(JitTestCase):
422		422
423	# Record the NPU event for operation torch.mm on the current stream	423	# Record the NPU event for operation torch.mm on the current stream
424	# and then test if the elapsed time is greater than 0. This test is also	424	# and then test if the elapsed time is greater than 0. This test is also
425	- # an adaption from eager mdoe NPU tests available at test/test_npu.py	425	+ # an adaption from eager mode NPU tests available at test/test_npu.py
426	@torch.jit.script	426	@torch.jit.script
427	def test_event():	427	def test_event():
428	device_index = torch.npu.current_device()	428	device_index = torch.npu.current_device()

Mtest/nn/test_parametrization.py+4-4

	@@ -173,7 +173,7 @@ class TestNNParametrization(NNTestCase):
173	self.assertTrue(parametrize.is_parametrized(model, "bias"))	173	self.assertTrue(parametrize.is_parametrized(model, "bias"))
174	self.assertEqual(model.bias[0].item(), 0.)	174	self.assertEqual(model.bias[0].item(), 0.)
175	self.assertEqual(model.bias[-1].item(), 0.)	175	self.assertEqual(model.bias[-1].item(), 0.)
176	- self.assertEqual(len(list(model.parameters())), 2) # Nothing weird has happpened	176	+ self.assertEqual(len(list(model.parameters())), 2) # Nothing weird has happened
177	# Should not throw	177	# Should not throw
178		178
179	sgd = torch.optim.SGD(model.parameters(), lr=0.01)	179	sgd = torch.optim.SGD(model.parameters(), lr=0.01)
	@@ -1239,7 +1239,7 @@ class TestNNParametrization(NNTestCase):
1239	eval_out0 = wrapped_m(input1)	1239	eval_out0 = wrapped_m(input1)
1240	# assert eval gives same result as last training iteration	1240	# assert eval gives same result as last training iteration
1241	self.assertEqual(eval_out0, last_train_out)	1241	self.assertEqual(eval_out0, last_train_out)
1242	- # assert doing more iteartion in eval don't change things	1242	+ # assert doing more iteration in eval don't change things
1243	self.assertEqual(eval_out0, wrapped_m(input1))	1243	self.assertEqual(eval_out0, wrapped_m(input1))
1244	self.assertEqual(last_train_u, spectral_norm_m._u)	1244	self.assertEqual(last_train_u, spectral_norm_m._u)
1245	self.assertEqual(last_train_v, spectral_norm_m._v)	1245	self.assertEqual(last_train_v, spectral_norm_m._v)
	@@ -1446,7 +1446,7 @@ class TestNNParametrization(NNTestCase):
1446	if can_initialize:	1446	if can_initialize:
1447	assert_weight_allclose_Q(m.weight, w_init)	1447	assert_weight_allclose_Q(m.weight, w_init)
1448		1448
1449	- # Intializing with a given orthogonal matrix works	1449	+ # Initializing with a given orthogonal matrix works
1450	X = torch.randn_like(m.weight)	1450	X = torch.randn_like(m.weight)
1451	if wide_matrix:	1451	if wide_matrix:
1452	X = X.mT	1452	X = X.mT
	@@ -1461,7 +1461,7 @@ class TestNNParametrization(NNTestCase):
1461	with self.assertRaisesRegex(NotImplementedError, msg):	1461	with self.assertRaisesRegex(NotImplementedError, msg):
1462	m.weight = w_new	1462	m.weight = w_new
1463		1463
1464	- # Intializing with a non-orthogonal matrix makes m.weight be the Q part of the given matrix	1464	+ # Initializing with a non-orthogonal matrix makes m.weight be the Q part of the given matrix
1465	w_new = torch.randn_like(m.weight)	1465	w_new = torch.randn_like(m.weight)
1466	if can_initialize:	1466	if can_initialize:
1467	m.weight = w_new	1467	m.weight = w_new

Mtest/test_npu_multinpu.py+2-2

	@@ -921,7 +921,7 @@ class TestNpuMultiNpu(TestCase):
921		921
922	@unittest.skipIf(not TEST_MULTINPU, "only one NPU detected")	922	@unittest.skipIf(not TEST_MULTINPU, "only one NPU detected")
923	def test_caching_pinned_memory_multi_gpu(self):	923	def test_caching_pinned_memory_multi_gpu(self):
924	- # checks that the events preventing pinned memory from being re-used	924	+ # checks that the events preventing pinned memory from being reused
925	# too early are recorded on the correct NPU	925	# too early are recorded on the correct NPU
926	cycles_per_ms = get_cycles_per_ms()	926	cycles_per_ms = get_cycles_per_ms()
927		927
	@@ -936,7 +936,7 @@ class TestNpuMultiNpu(TestCase):
936		936
937	del t	937	del t
938	t = torch.FloatTensor([2]).pin_memory()	938	t = torch.FloatTensor([2]).pin_memory()
939	- self.assertNotEqual(t.data_ptr(), ptr, msg='allocation re-used too soon')	939	+ self.assertNotEqual(t.data_ptr(), ptr, msg='allocation reused too soon')
940		940
941	with torch_npu.npu.device(0):	941	with torch_npu.npu.device(0):
942	gpu_tensor0.copy_(t, non_blocking=True)	942	gpu_tensor0.copy_(t, non_blocking=True)

Mtest/unsupported_test_cases/disabled_tests_type.json+7-7

Mtools/linter/dictionary.txt+2-0

	@@ -11,6 +11,7 @@ bStores
11	BU	11	BU
12	CANN	12	CANN
13	cann	13	cann
		14	+ccompiler
14	contiguities	15	contiguities
15	contiguity	16	contiguity
16	coo	17	coo
	@@ -64,6 +65,7 @@ subtile
64	subtiles	65	subtiles
65	supercede	66	supercede
66	supercedes	67	supercedes
		68	+tbe
67	te	69	te
68	THW	70	THW
69	tne	71	tne

Mtorch_npu/_afd/__init__.py+1-1

	@@ -22,7 +22,7 @@ def create_schedule_context_holder(
22	A holder class for managing scheduling context in distributed inference.	22	A holder class for managing scheduling context in distributed inference.
23		23
24	Args:	24	Args:
25	- schedule_mode: Scheduling mode identifier, 0:schedule ffn, 1:shcedule attention	25	+ schedule_mode: Scheduling mode identifier, 0:schedule ffn, 1:schedule attention
26	session_num: Number of sessions	26	session_num: Number of sessions
27	micro_batch_num: Number of micro batches	27	micro_batch_num: Number of micro batches
28	micro_batch_size: micro batch size	28	micro_batch_size: micro batch size

Mtorch_npu/contrib/module/fusedcolorjitter.py+1-1

	@@ -69,7 +69,7 @@ class _FusedColorJitterApply(object):
69	elif C == 1:	69	elif C == 1:
70	img = img.repeat(3, axis=-1)	70	img = img.repeat(3, axis=-1)
71	else:	71	else:
72	- raise ValueError('Unknow format using.. Currnet shape is {}'.format(img.shape) +	72	+ raise ValueError('Unknow format using.. Current shape is {}'.format(img.shape) +
73	ops_error(ErrCode.VALUE))	73	ops_error(ErrCode.VALUE))
74	H, W, C = img.shape	74	H, W, C = img.shape
75	img = np.matmul(img.reshape(-1, 3), transform_matrix) + transform_offset	75	img = np.matmul(img.reshape(-1, 3), transform_matrix) + transform_offset

Mtorch_npu/contrib/module/prefetcher.py+1-1

	@@ -6,7 +6,7 @@ class Prefetcher(object):
6		6
7		7
8	Args:	8	Args:
9	- loder (torch.utils.data.DataLoader or DataLoader like iterator):	9	+ loader (torch.utils.data.DataLoader or DataLoader like iterator):
10	Using to generate inputs after preprocessing.	10	Using to generate inputs after preprocessing.
11	stream (torch.npu.Stream): Default None.	11	stream (torch.npu.Stream): Default None.
12	Because of the limitation of NPU's memory mechanism,	12	Because of the limitation of NPU's memory mechanism,

Mtorch_npu/csrc/aten/common/CopyKernel.cpp+1-1

	@@ -348,7 +348,7 @@ at::Tensor copy_d2d_format_cast(at::Tensor& dst, const at::Tensor& src)
348	if (!FormatCastHelper::IsSameGroupType(src, dst)) {	348	if (!FormatCastHelper::IsSameGroupType(src, dst)) {
349	bool res = FormatCastHelper::format_cast_between_group(dst, src, copy_d2d_format_cast);	349	bool res = FormatCastHelper::format_cast_between_group(dst, src, copy_d2d_format_cast);
350	if (!res) {	350	if (!res) {
351	- AT_ERROR("unsupport cast from ", srcFormat, " to ", dstFormat);	351	+ AT_ERROR("unsupported cast from ", srcFormat, " to ", dstFormat);
352	}	352	}
353	return dst;	353	return dst;
354	}	354	}

Mtorch_npu/csrc/aten/common/DLConvertor.h+1-1

	@@ -4,7 +4,7 @@
4	#include <ATen/Tensor.h>	4	#include <ATen/Tensor.h>
5	#include "third_party/dlpack/dlpack.h"	5	#include "third_party/dlpack/dlpack.h"
6		6
7	-// this convertor will:	7	+// this converter will:
8	// 1) take a Tensor object and wrap it in the DLPack tensor	8	// 1) take a Tensor object and wrap it in the DLPack tensor
9	// 2) take a dlpack tensor and convert it to the ATen Tensor	9	// 2) take a dlpack tensor and convert it to the ATen Tensor
10		10

Mtorch_npu/csrc/aten/common/FormatCastHelper.cpp+1-1

	@@ -49,7 +49,7 @@ bool FormatCastHelper::format_cast_between_group(
49	// src base format (src format) -> dst base format	49	// src base format (src format) -> dst base format
50	// dst base format -> dst format	50	// dst base format -> dst format
51	auto src_base_format = FormatHelper::GetBaseFormat(src);	51	auto src_base_format = FormatHelper::GetBaseFormat(src);
52	- format_cast_as_base_format(src, FormatHelper::GetBaseFormat(dst)); // prepare: covert src to dst base format	52	+ format_cast_as_base_format(src, FormatHelper::GetBaseFormat(dst)); // prepare: convert src to dst base format
53	format_cast_inside_group(dst, src); // src base format (src format) -> dst base format	53	format_cast_inside_group(dst, src); // src base format (src format) -> dst base format
54	format_cast_as_base_format(src, src_base_format); // recover: dst base format -> dst format	54	format_cast_as_base_format(src, src_base_format); // recover: dst base format -> dst format
55	return true;	55	return true;

Mtorch_npu/csrc/aten/common/FormatCastKernelNpu.cpp+4-4

	@@ -223,7 +223,7 @@ at::Tensor format_cast_impl_out_npu(at::Tensor& dst, const at::Tensor& src)
223	if (!FormatCastHelper::IsSameGroupType(src, dst)) {	223	if (!FormatCastHelper::IsSameGroupType(src, dst)) {
224	bool res = FormatCastHelper::format_cast_between_group(dst, src, format_cast_impl_out_npu);	224	bool res = FormatCastHelper::format_cast_between_group(dst, src, format_cast_impl_out_npu);
225	if (!res) {	225	if (!res) {
226	- AT_ERROR("unsupport cast from ", srcFormat, " to ", dstFormat);	226	+ AT_ERROR("unsupported cast from ", srcFormat, " to ", dstFormat);
227	}	227	}
228	return dst;	228	return dst;
229	}	229	}
	@@ -266,7 +266,7 @@ at::Tensor& NPUNativeFunctions::npu_format_cast_(at::Tensor& self, const at::Ten
266	return self;	266	return self;
267	}	267	}
268		268
269	-// conver self to acl_format, write the result into new result tensor	269	+// convert self to acl_format, write the result into new result tensor
270	at::Tensor npu_format_cast_impl(	270	at::Tensor npu_format_cast_impl(
271	const at::Tensor& src,	271	const at::Tensor& src,
272	int64_t acl_format)	272	int64_t acl_format)
	@@ -284,7 +284,7 @@ at::Tensor npu_format_cast_impl(
284	return dst;	284	return dst;
285	}	285	}
286		286
287	-// conver self to dst'format, write the result into new result tensor	287	+// convert self to dst'format, write the result into new result tensor
288	at::Tensor NPUNativeFunctions::npu_format_cast(	288	at::Tensor NPUNativeFunctions::npu_format_cast(
289	const at::Tensor& self,	289	const at::Tensor& self,
290	const at::Tensor& dst,	290	const at::Tensor& dst,
	@@ -296,7 +296,7 @@ at::Tensor NPUNativeFunctions::npu_format_cast(
296	return custom_ops::npu_format_cast(self, dst_format, customize_dtype, input_dtype);	296	return custom_ops::npu_format_cast(self, dst_format, customize_dtype, input_dtype);
297	}	297	}
298		298
299	-// conver self to acl_format, write the result into self	299	+// convert self to acl_format, write the result into self
300	at::Tensor& NPUNativeFunctions::npu_format_cast_(	300	at::Tensor& NPUNativeFunctions::npu_format_cast_(
301	at::Tensor& self,	301	at::Tensor& self,
302	int64_t acl_format,	302	int64_t acl_format,

Mtorch_npu/csrc/aten/common/NpuFastReshape.cpp+1-1

	@@ -29,7 +29,7 @@ void npu_fast_reshape_(at::Tensor& tensor)
29	return;	29	return;
30	}	30	}
31		31
32	- // refresh matadata to input tensor	32	+ // refresh metadata to input tensor
33	StorageDescHelper::ReflushDescBySelf(tensor);	33	StorageDescHelper::ReflushDescBySelf(tensor);
34	auto base_format = InferFormat::GuessBaseFormat(tensor.sizes());	34	auto base_format = InferFormat::GuessBaseFormat(tensor.sizes());
35	NPUNativeFunctions::npu_format_cast_(tensor, base_format);	35	NPUNativeFunctions::npu_format_cast_(tensor, base_format);

Mtorch_npu/csrc/aten/common/SetNpu.cpp+1-1

	@@ -46,7 +46,7 @@ at::Tensor& NPUNativeFunctions::set_(
46	if (CheckStorageDesc(self, src)) {	46	if (CheckStorageDesc(self, src)) {
47	StorageDescHelper::SetDesc(self, size, stride);	47	StorageDescHelper::SetDesc(self, size, stride);
48	} else {	48	} else {
49	- // Check input tensor propertys. If conditions are not met, NPUStorageDesc	49	+ // Check input tensor properties. If conditions are not met, NPUStorageDesc
50	// base_sizes_ change to 1D. Conditions:	50	// base_sizes_ change to 1D. Conditions:
51	// 1. Tensor storage_offset == 0	51	// 1. Tensor storage_offset == 0
52	// 2. Tnput tensor is contiguous	52	// 2. Tnput tensor is contiguous

Mtorch_npu/csrc/aten/common/TensorFactories.cpp+1-1

	@@ -420,7 +420,7 @@ at::Tensor NPUNativeFunctions::unsafe_empty_with_format(
420	// the specified internal format is preserved.	420	// the specified internal format is preserved.
421	if ((!keep_format) && at_npu::native::env::CheckForbidInternalFormat()) {	421	if ((!keep_format) && at_npu::native::env::CheckForbidInternalFormat()) {
422	dst_format = static_cast<int64_t>(FormatHelper::GetBaseFormat(static_cast<aclFormat>(dst_format)));	422	dst_format = static_cast<int64_t>(FormatHelper::GetBaseFormat(static_cast<aclFormat>(dst_format)));
423	- TORCH_WARN_ONCE("Cannot create tensor with interal format while allow_internel_format=False, "	423	+ TORCH_WARN_ONCE("Cannot create tensor with internal format while allow_internal_format=False, "
424	"tensor will be created with base format.");	424	"tensor will be created with base format.");
425	}	425	}
426		426

Mtorch_npu/csrc/core/NPUSerialization.cpp+1-1

	@@ -27,7 +27,7 @@ void npu_info_serialization(const at::Tensor &t, std::unordered_map<std::string,
27		27
28	void npu_info_deserialization(const at::Tensor &t, std::unordered_map<std::string, bool> &map)	28	void npu_info_deserialization(const at::Tensor &t, std::unordered_map<std::string, bool> &map)
29	{	29	{
30	- // Set the true stroage description	30	+ // Set the true storage description
31	at_npu::native::StorageDescHelper::SetDescForSerialization(t, map);	31	at_npu::native::StorageDescHelper::SetDescForSerialization(t, map);
32		32
33	auto str_to_aclFormat = [](std::string str) -> aclFormat {	33	auto str_to_aclFormat = [](std::string str) -> aclFormat {

Mtorch_npu/csrc/core/npu/NPUAllocatorConfig.cpp+1-1

	@@ -44,7 +44,7 @@ NPUAllocatorConfig& NPUAllocatorConfig::instance()
44	c10::utils::set_env("PYTORCH_ALLOC_CONF", env.value().c_str(), true);	44	c10::utils::set_env("PYTORCH_ALLOC_CONF", env.value().c_str(), true);
45	}	45	}
46	if (!env.has_value()) {	46	if (!env.has_value()) {
47	- TORCH_NPU_MEMORY_LOGI("PYTORCH_NPU_ALLOC_CONF and PYTORCH_ALLOC_CONF not setted, use default configuration.");	47	+ TORCH_NPU_MEMORY_LOGI("PYTORCH_NPU_ALLOC_CONF and PYTORCH_ALLOC_CONF not set, use default configuration.");
48	return;	48	return;
49	}	49	}
50	TORCH_NPU_MEMORY_LOGI("Get alloc conf env: %s", env.value().c_str());	50	TORCH_NPU_MEMORY_LOGI("Get alloc conf env: %s", env.value().c_str());

Mtorch_npu/csrc/core/npu/NPUPeerToPeerAccess.cpp+2-2

	@@ -17,7 +17,7 @@ NpuP2pCtrl::NpuP2pCtrl()
17	device_enabled_count_.resize(num_devices_, 0);	17	device_enabled_count_.resize(num_devices_, 0);
18		18
19	p2p_access_enabled_cache_.clear();	19	p2p_access_enabled_cache_.clear();
20	- p2p_access_enabled_cache_.resize(num_devices_ * num_devices_, P2pStatus::UNKONWN);	20	+ p2p_access_enabled_cache_.resize(num_devices_ * num_devices_, P2pStatus::UNKNOWN);
21		21
22	for (const auto i : c10::irange(num_devices_)) {	22	for (const auto i : c10::irange(num_devices_)) {
23	// device self-connections are not counted	23	// device self-connections are not counted
	@@ -51,7 +51,7 @@ bool NpuP2pCtrl::get_p2p_access(int32_t source_dev, int32_t dest_dev, bool& flag
51	auto &cache_s2d = p2p_access_enabled_cache_[source_dev * num_devices_ + dest_dev];	51	auto &cache_s2d = p2p_access_enabled_cache_[source_dev * num_devices_ + dest_dev];
52	auto &cache_d2s = p2p_access_enabled_cache_[dest_dev * num_devices_ + source_dev];	52	auto &cache_d2s = p2p_access_enabled_cache_[dest_dev * num_devices_ + source_dev];
53		53
54	- if (cache_s2d != P2pStatus::UNKONWN) {	54	+ if (cache_s2d != P2pStatus::UNKNOWN) {
55	return static_cast<bool>(cache_s2d);	55	return static_cast<bool>(cache_s2d);
56	}	56	}
57		57

Mtorch_npu/csrc/core/npu/NPUPeerToPeerAccess.h+1-1

	@@ -10,7 +10,7 @@ class NpuP2pCtrl {
10	public:	10	public:
11	// Values include "1" (copy allowed), "0" (copy not allowed), and "-1" (unknown).	11	// Values include "1" (copy allowed), "0" (copy not allowed), and "-1" (unknown).
12	enum class P2pStatus : int8_t {	12	enum class P2pStatus : int8_t {
13	- UNKONWN = -1,	13	+ UNKNOWN = -1,
14	COPY_NOT_ALLOWED = 0,	14	COPY_NOT_ALLOWED = 0,
15	COPY_ALLOWED = 1	15	COPY_ALLOWED = 1
16	};	16	};

Mtorch_npu/csrc/core/npu/NPUQueue.cpp+18-18

	@@ -371,7 +371,7 @@ bool Repository::WriteQueue(void *cur_paras)
371	}	371	}
372		372
373	__sync_synchronize();	373	__sync_synchronize();
374	- manager().Copy(datas, write_idx.idx, cur_paras);	374	+ manager().Copy(data, write_idx.idx, cur_paras);
375	__sync_synchronize();	375	__sync_synchronize();
376		376
377	TORCH_NPU_QUEUE_LOGD("WriteQueue: write success, %s, device = %d, write_idx = %u, read_idx = %u, status = %d",	377	TORCH_NPU_QUEUE_LOGD("WriteQueue: write success, %s, device = %d, write_idx = %u, read_idx = %u, status = %d",
	@@ -444,20 +444,20 @@ bool Repository::ReadQueue()
444		444
445	__sync_synchronize();	445	__sync_synchronize();
446	#ifndef BUILD_LIBTORCH	446	#ifndef BUILD_LIBTORCH
447	- at_npu::native::NpuUtils::ProfReportMarkDataToNpuProfiler(2, datas, read_idx.idx);	447	+ at_npu::native::NpuUtils::ProfReportMarkDataToNpuProfiler(2, data, read_idx.idx);
448	- auto ret = manager().Call(datas, read_idx.idx);	448	+ auto ret = manager().Call(data, read_idx.idx);
449	- at_npu::native::NpuUtils::ProfReportMarkDataToNpuProfiler(3, datas, read_idx.idx);	449	+ at_npu::native::NpuUtils::ProfReportMarkDataToNpuProfiler(3, data, read_idx.idx);
450	#else	450	#else
451	- auto ret = manager().Call(datas, read_idx.idx);	451	+ auto ret = manager().Call(data, read_idx.idx);
452	#endif	452	#endif
453	if (ret != 0) {	453	if (ret != 0) {
454	- repo_error = get_func_error_msg(manager().getCurrentParams(datas, read_idx.idx));	454	+ repo_error = get_func_error_msg(manager().getCurrentParams(data, read_idx.idx));
455	ASCEND_LOGE("---Thread---%llu: device = %d, write_idx = %u, read_idx = %u, status = %d, ret = %d",	455	ASCEND_LOGE("---Thread---%llu: device = %d, write_idx = %u, read_idx = %u, status = %d, ret = %d",
456	std::this_thread::get_id(), device_idx, write_idx.idx, read_idx.idx, GetStatus(), ret);	456	std::this_thread::get_id(), device_idx, write_idx.idx, read_idx.idx, GetStatus(), ret);
457	TORCH_NPU_QUEUE_LOGI("ReadQueue: read failed, %s, device = %d, write_idx = %u, read_idx = %u, status = %d, ret = %d",	457	TORCH_NPU_QUEUE_LOGI("ReadQueue: read failed, %s, device = %d, write_idx = %u, read_idx = %u, status = %d, ret = %d",
458	repo_error.c_str(), device_idx, write_idx.idx, read_idx.idx, GetStatus(), ret);	458	repo_error.c_str(), device_idx, write_idx.idx, read_idx.idx, GetStatus(), ret);
459	while (!IsEmptyQueue()) { // ignore other tasks	459	while (!IsEmptyQueue()) { // ignore other tasks
460	- manager().Release(datas, read_idx.idx, releaseQueue);	460	+ manager().Release(data, read_idx.idx, releaseQueue);
461	read_idx.idx = (read_idx.idx + 1) & (kQueueCapacity - 1);	461	read_idx.idx = (read_idx.idx + 1) & (kQueueCapacity - 1);
462	}	462	}
463	std::string err_msg;	463	std::string err_msg;
	@@ -481,11 +481,11 @@ bool Repository::ReadQueue()
481	return false;	481	return false;
482	}	482	}
483		483
484	- manager().Release(datas, read_idx.idx, releaseQueue);	484	+ manager().Release(data, read_idx.idx, releaseQueue);
485	__sync_synchronize();	485	__sync_synchronize();
486		486
487	TORCH_NPU_QUEUE_LOGD("ReadQueue: read success, %s, device = %d, write_idx = %u, read_idx = %u, status = %d",	487	TORCH_NPU_QUEUE_LOGD("ReadQueue: read success, %s, device = %d, write_idx = %u, read_idx = %u, status = %d",
488	- get_func_error_msg(manager().getCurrentParams(datas, read_idx.idx)).c_str(), device_idx, write_idx.idx, read_idx.idx, GetStatus());	488	+ get_func_error_msg(manager().getCurrentParams(data, read_idx.idx)).c_str(), device_idx, write_idx.idx, read_idx.idx, GetStatus());
489	read_idx.idx = (read_idx.idx + 1) & (kQueueCapacity - 1);	489	read_idx.idx = (read_idx.idx + 1) & (kQueueCapacity - 1);
490		490
491	if (GetStatus() == RepoStatus::STOP_EXIT) {	491	if (GetStatus() == RepoStatus::STOP_EXIT) {
	@@ -736,7 +736,7 @@ void Repository::Dequeue()
736		736
737	void Repository::ReleaseResource()	737	void Repository::ReleaseResource()
738	{	738	{
739	- manager().DeInit(datas);	739	+ manager().DeInit(data);
740	if (efd_read > 0) {	740	if (efd_read > 0) {
741	close(efd_read);	741	close(efd_read);
742	efd_read = -1;	742	efd_read = -1;
	@@ -811,8 +811,8 @@ void StartConsume(Repository *repo, c10::DeviceIndex device_id)
811		811
812	void Repository::InitRepo(c10::DeviceIndex device_id)	812	void Repository::InitRepo(c10::DeviceIndex device_id)
813	{	813	{
814	- if (datas == nullptr) {	814	+ if (data == nullptr) {
815	- datas = manager().Init(kQueueCapacity);	815	+ data = manager().Init(kQueueCapacity);
816	ASCEND_LOGI("TaskQueue is enable");	816	ASCEND_LOGI("TaskQueue is enable");
817	}	817	}
818		818
	@@ -835,7 +835,7 @@ std::string Repository::GetPara()
835	return "EmptyQueue";	835	return "EmptyQueue";
836	}	836	}
837	__sync_synchronize();	837	__sync_synchronize();
838	- std::string repo_para = get_func_error_msg(manager().getCurrentParams(datas, read_idx.idx));	838	+ std::string repo_para = get_func_error_msg(manager().getCurrentParams(data, read_idx.idx));
839	__sync_synchronize();	839	__sync_synchronize();
840	return repo_para;	840	return repo_para;
841	}	841	}
	@@ -847,7 +847,7 @@ bool ReleaseQueue::WriteToReleaseQueue(void *cur_paras)
847	return false;	847	return false;
848	}	848	}
849	__sync_synchronize();	849	__sync_synchronize();
850	- releaseManager().CopyRealseParam(datas, write_idx.idx, cur_paras);	850	+ releaseManager().CopyRealseParam(data, write_idx.idx, cur_paras);
851		851
852	__sync_synchronize();	852	__sync_synchronize();
853	write_idx.idx = (write_idx.idx + 1) & (kReleaseQueueCapacity - 1);	853	write_idx.idx = (write_idx.idx + 1) & (kReleaseQueueCapacity - 1);
	@@ -877,7 +877,7 @@ bool ReleaseQueue::ReadFromReleaseQueue()
877	}	877	}
878		878
879	__sync_synchronize();	879	__sync_synchronize();
880	- releaseManager().ReleaseParam(datas, read_idx.idx);	880	+ releaseManager().ReleaseParam(data, read_idx.idx);
881		881
882	__sync_synchronize();	882	__sync_synchronize();
883	read_idx.idx = (read_idx.idx + 1) & (kReleaseQueueCapacity - 1);	883	read_idx.idx = (read_idx.idx + 1) & (kReleaseQueueCapacity - 1);
	@@ -919,8 +919,8 @@ void StartRelease(ReleaseQueue *releaseQue)
919		919
920	void ReleaseQueue::InitReleaseQueue(c10::DeviceIndex device_id)	920	void ReleaseQueue::InitReleaseQueue(c10::DeviceIndex device_id)
921	{	921	{
922	- if (datas == nullptr) {	922	+ if (data == nullptr) {
923	- datas = releaseManager().Init(kReleaseQueueCapacity);	923	+ data = releaseManager().Init(kReleaseQueueCapacity);
924	}	924	}
925		925
926	initialized = true;	926	initialized = true;
	@@ -938,7 +938,7 @@ ReleaseQueue::~ReleaseQueue()
938	releaser.join();	938	releaser.join();
939	}	939	}
940	}	940	}
941	- releaseManager().DeInit(datas);	941	+ releaseManager().DeInit(data);
942	}	942	}
943		943
944	bool ReleaseQueue::IsFullQueue() const	944	bool ReleaseQueue::IsFullQueue() const

Mtorch_npu/csrc/core/npu/NPUQueue.h+2-2

	@@ -74,7 +74,7 @@ private:
74	void ChangeStatus(RepoStatus expected, RepoStatus desired);	74	void ChangeStatus(RepoStatus expected, RepoStatus desired);
75		75
76	private:	76	private:
77	- void* datas = nullptr;	77	+ void* data = nullptr;
78	std::thread releaser;	78	std::thread releaser;
79	c10::DeviceIndex device_idx;	79	c10::DeviceIndex device_idx;
80		80
	@@ -141,7 +141,7 @@ private:
141	void ThrowDeviceError(RepoStatus current_status, void* cur_paras);	141	void ThrowDeviceError(RepoStatus current_status, void* cur_paras);
142		142
143	private:	143	private:
144	- void* datas = nullptr;	144	+ void* data = nullptr;
145	std::thread consumer;	145	std::thread consumer;
146	int efd_read;	146	int efd_read;
147	int efd_write;	147	int efd_write;

Mtorch_npu/csrc/core/npu/NPUSwappedMemoryAllocator.cpp+1-1

	@@ -67,7 +67,7 @@ void* registerSvmMem(void* ptr, size_t size, bool is_support_consistency)
67	TORCH_CHECK(false, "AclrtHostRegister failed.", PTA_ERROR(ErrCode::ACL));	67	TORCH_CHECK(false, "AclrtHostRegister failed.", PTA_ERROR(ErrCode::ACL));
68	}	68	}
69	if (alignedPtr != svmPtr) {	69	if (alignedPtr != svmPtr) {
70	- ASCEND_LOGW("The svmPtr(0x%llx) is not equel to alignedPtr(0x%llx), then the memory pointed by svmPtr can not be printed directly on host ", svmPtr, alignedPtr)	70	+ ASCEND_LOGW("The svmPtr(0x%llx) is not equal to alignedPtr(0x%llx), then the memory pointed by svmPtr can not be printed directly on host ", svmPtr, alignedPtr)
71	}	71	}
72		72
73	HostPtr hostPtr;	73	HostPtr hostPtr;

Mtorch_npu/csrc/core/npu/sys_ctrl/npu_sys_ctrl.cpp+1-1

	@@ -334,7 +334,7 @@ NpuSysCtrl::SysStatus NpuSysCtrl::Finalize()
334	NPU_CHECK_WARN(aclmdlFinalizeDump());	334	NPU_CHECK_WARN(aclmdlFinalizeDump());
335	}	335	}
336		336
337	- // call release fn by priotity	337	+ // call release fn by priority
338	for (const auto &iter: release_fn_) {	338	for (const auto &iter: release_fn_) {
339	const auto &fn_vec = iter.second;	339	const auto &fn_vec = iter.second;
340	for (const auto &fn: fn_vec) {	340	for (const auto &fn: fn_vec) {

Mtorch_npu/csrc/framework/FormatHelper.h+4-4

	@@ -28,9 +28,9 @@ public:
28	// Default assumption: the original format are ND, NCHW or NDHWC.	28	// Default assumption: the original format are ND, NCHW or NDHWC.
29	// So, if original size are 4D, it maybe NCHW or ND and so on.	29	// So, if original size are 4D, it maybe NCHW or ND and so on.
30	// The format can be split into two parts:	30	// The format can be split into two parts:
31	- // 1. The storage size can be infered between NC1HWC0, NHWC, NC1HWC0_C04, NCHW.	31	+ // 1. The storage size can be inferred between NC1HWC0, NHWC, NC1HWC0_C04, NCHW.
32	- // 2. The storage size can be infered between NDC1HWC0 and NDHWC/NCDHW.	32	+ // 2. The storage size can be inferred between NDC1HWC0 and NDHWC/NCDHW.
33	- // The storage size can not be infered between different groups.	33	+ // The storage size can not be inferred between different groups.
34	template <typename sizeType>	34	template <typename sizeType>
35	static FormatShape GetStorageSizes(aclFormat format, sizeType ori_size, caffe2::TypeMeta dtype);	35	static FormatShape GetStorageSizes(aclFormat format, sizeType ori_size, caffe2::TypeMeta dtype);
36	// GetStorageSizes used to calculate the storage sizes of op at npu device at different format.	36	// GetStorageSizes used to calculate the storage sizes of op at npu device at different format.
	@@ -70,7 +70,7 @@ FormatShape FormatHelper::GetStorageSizes(aclFormat format, sizeType ori_size, c
70	return itr->second.func(ori_size, dtype.itemsize());	70	return itr->second.func(ori_size, dtype.itemsize());
71	}	71	}
72	}	72	}
73	- AT_ERROR("unsupport InferShape with format ", GetFormatName(format), "with shape", ori_size);	73	+ AT_ERROR("unsupported InferShape with format ", GetFormatName(format), "with shape", ori_size);
74	return {};	74	return {};
75	}	75	}
76		76

Mtorch_npu/csrc/framework/InferFormat.cpp+1-1

	@@ -35,7 +35,7 @@ std::tuple<aclFormat, aclFormat> InferFormat::GuessFormatUnit(const c10::IntArra
35	return std::make_tuple(ACL_FORMAT_NCHW, ACL_FORMAT_NCHW);	35	return std::make_tuple(ACL_FORMAT_NCHW, ACL_FORMAT_NCHW);
36	} else {	36	} else {
37	if (baseFormat == ACL_FORMAT_NCDHW) {	37	if (baseFormat == ACL_FORMAT_NCDHW) {
38	- // scence: Dimensionality reduction: NCDHW->NCHW, for example: max/min	38	+ // scenario: Dimensionality reduction: NCDHW->NCHW, for example: max/min
39	// NOTE(NPU Dimensionality reduction)	39	// NOTE(NPU Dimensionality reduction)
40	if (size.size() == 4) {	40	if (size.size() == 4) {
41	return std::make_tuple(ACL_FORMAT_NCHW, ACL_FORMAT_NCHW);	41	return std::make_tuple(ACL_FORMAT_NCHW, ACL_FORMAT_NCHW);

Mtorch_npu/csrc/framework/InferFormat.h+1-1

	@@ -37,7 +37,7 @@ public:
37	// not effect the storage data.	37	// not effect the storage data.
38	static FormatShape GuessStorageSizeWhenConvertFormat(const at::Tensor &tensor);	38	static FormatShape GuessStorageSizeWhenConvertFormat(const at::Tensor &tensor);
39	// This api is used to judge if tensor is reasonable when size changes.	39	// This api is used to judge if tensor is reasonable when size changes.
40	- // solution: tranform to base format to fix it.	40	+ // solution: transform to base format to fix it.
41	// fix: NCHW \| 5HD -> NCDHW \| NCDHW or ND \| ND	41	// fix: NCHW \| 5HD -> NCDHW \| NCDHW or ND \| ND
42	// unsqueeze/squeeze/select/flatten/view will change meta data, they will call	42	// unsqueeze/squeeze/select/flatten/view will change meta data, they will call
43	// as_strided and view	43	// as_strided and view

Mtorch_npu/csrc/framework/LazyInitAclops.cpp+1-1

	@@ -196,7 +196,7 @@ void InitializeJitCompilationMode()
196	}	196	}
197	}	197	}
198		198
199	-// set default jit_Compile value from Get acl defalut value	199	+// set default jit_Compile value from Get acl default value
200	void GetAndSetDefaultJitCompileByAcl()	200	void GetAndSetDefaultJitCompileByAcl()
201	{	201	{
202	if (IsJitCompileModeSetted()) {	202	if (IsJitCompileModeSetted()) {

Mtorch_npu/csrc/framework/OpCmdHelper.h+1-1

	@@ -10,7 +10,7 @@
10	namespace at_npu {	10	namespace at_npu {
11	namespace native {	11	namespace native {
12		12
13	-// covert pytorch tensor to acl tensor.	13	+// convert pytorch tensor to acl tensor.
14	class OpCmdHelper {	14	class OpCmdHelper {
15	public:	15	public:
16	static std::tuple<aclTensorDesc , aclDataBuffer > CovertTensorToAclInput(const at::Tensor &tensor,	16	static std::tuple<aclTensorDesc , aclDataBuffer > CovertTensorToAclInput(const at::Tensor &tensor,

Mtorch_npu/csrc/framework/OpCommand.cpp+1-1

	@@ -344,7 +344,7 @@ OpCommand& OpCommand::AddTensorInput(at::Tensor &tensor, at::ScalarType forceSca
344	if (commonType.has_value() && commonType.value() != tensor.scalar_type()) {	344	if (commonType.has_value() && commonType.value() != tensor.scalar_type()) {
345	tensor = custom_ops::_npu_dtype_cast(tensor, commonType.value());	345	tensor = custom_ops::_npu_dtype_cast(tensor, commonType.value());
346	}	346	}
347	- // as for dim=0, the dtype of tensor can not be `uint16` because of `TBE`	347	+ // as for dim=0, the dtype of tensor can not be `uint16` because of the backend
348	if (torch_npu::NPUBridge::GetNpuStorageImplDesc(tensor).storage_sizes_.empty()) {	348	if (torch_npu::NPUBridge::GetNpuStorageImplDesc(tensor).storage_sizes_.empty()) {
349	if (torch_npu::utils::is_npu(tensor)) {	349	if (torch_npu::utils::is_npu(tensor)) {
350	res = OpCmdHelper::CovertNPUTensorWithZeroDimToAclInput(tensor, descName);	350	res = OpCmdHelper::CovertNPUTensorWithZeroDimToAclInput(tensor, descName);

Mtorch_npu/csrc/framework/contiguous/indexing_opt.cpp+1-1

	@@ -52,7 +52,7 @@ private:
52	}	52	}
53		53
54	// indexing信息获取部分	54	// indexing信息获取部分
55	- // Get step info(for indexing step at index aixs should > 1)	55	+ // Get step info(for indexing step at index axis should > 1)
56	for (const auto i : c10::irange(indexing_size.size())) {	56	for (const auto i : c10::irange(indexing_size.size())) {
57	step.emplace_back(indexing_stride[i] / base_stride[i]);	57	step.emplace_back(indexing_stride[i] / base_stride[i]);
58	}	58	}

Mtorch_npu/csrc/framework/utils/CalcuOpUtil.cpp+1-1

	@@ -204,7 +204,7 @@ c10::Scalar CalcuOpUtil::ConvertTensorToScalar(const at::Tensor &tensor)
204	c10::Scalar scalar(value);	204	c10::Scalar scalar(value);
205	expScalar = scalar;	205	expScalar = scalar;
206	} else {	206	} else {
207	- ASCEND_LOGE("unsupport scalar type! ");	207	+ ASCEND_LOGE("unsupported scalar type! ");
208	NPU_CHECK_ERROR(ACL_ERROR_UNSUPPORTED_DATA_TYPE);	208	NPU_CHECK_ERROR(ACL_ERROR_UNSUPPORTED_DATA_TYPE);
209	}	209	}
210		210

Mtorch_npu/csrc/framework/utils/OpPreparation.cpp+1-1

	@@ -282,7 +282,7 @@ at::Tensor OpPreparation::apply_tensor_with_format(c10::IntArrayRef sizes,
282	OPS_ERROR(ErrCode::TYPE));	282	OPS_ERROR(ErrCode::TYPE));
283	auto fixFormat = InferFormat::GuessStorageFormat(sizes, static_cast<aclFormat>(format));	283	auto fixFormat = InferFormat::GuessStorageFormat(sizes, static_cast<aclFormat>(format));
284	if (options.dtype_opt() == at::ScalarType::Double && !FormatHelper::IsBaseFormatType(static_cast<aclFormat>(format))) {	284	if (options.dtype_opt() == at::ScalarType::Double && !FormatHelper::IsBaseFormatType(static_cast<aclFormat>(format))) {
285	- ASCEND_LOGW("NPU don't support create double dtype tensor with inner format, repalce with base format.");	285	+ ASCEND_LOGW("NPU don't support create double dtype tensor with inner format, replace with base format.");
286	fixFormat = FormatHelper::GetBaseFormat(static_cast<aclFormat>(format));	286	fixFormat = FormatHelper::GetBaseFormat(static_cast<aclFormat>(format));
287	}	287	}
288	return NPUNativeFunctions::unsafe_empty_with_format(sizes,	288	return NPUNativeFunctions::unsafe_empty_with_format(sizes,

Mtorch_npu/csrc/inductor/aoti_runtime/model.h+2-2

	@@ -145,7 +145,7 @@ public:
145	if (run_finished_) {	145	if (run_finished_) {
146	auto code = aclrtDestroyEvent(*run_finished_);	146	auto code = aclrtDestroyEvent(*run_finished_);
147	if (code != ACL_SUCCESS) {	147	if (code != ACL_SUCCESS) {
148	- std::cerr << "Failed to destroy NPU event in AOTInductor model erorr code: " << code << std::endl;	148	+ std::cerr << "Failed to destroy NPU event in AOTInductor model error code: " << code << std::endl;
149	}	149	}
150	}	150	}
151	#endif // USE_NPU	151	#endif // USE_NPU
	@@ -616,7 +616,7 @@ protected:
616	bool include_weights;	616	bool include_weights;
617		617
618	// Record if the model finishes an inference run so that its owning	618	// Record if the model finishes an inference run so that its owning
619	- // AOTModelContainer can re-use this instance.	619	+ // AOTModelContainer can reuse this instance.
620	#if defined(USE_NPU)	620	#if defined(USE_NPU)
621	std::optional<aclrtEvent> run_finished_;	621	std::optional<aclrtEvent> run_finished_;
622	#else	622	#else

Mtorch_npu/csrc/inductor/mlir/hacl_rt.h+7-7

Mtorch_npu/csrc/npu/NPUPluggableAllocator.cpp+1-1

	@@ -151,7 +151,7 @@ c10::DataPtr NPUPluggableAllocator::allocate(size_t size)
151		151
152	c10::DataPtr NPUPluggableAllocator::allocate_with_aligned(size_t size, size_t base_addr_aligned_kb) const	152	c10::DataPtr NPUPluggableAllocator::allocate_with_aligned(size_t size, size_t base_addr_aligned_kb) const
153	{	153	{
154	- TORCH_CHECK(false, "NPUPluggableAllocator does't has allocate_with_aligned", PTA_ERROR(ErrCode::NOT_SUPPORT));	154	+ TORCH_CHECK(false, "NPUPluggableAllocator doesn't has allocate_with_aligned", PTA_ERROR(ErrCode::NOT_SUPPORT));
155	return c10::DataPtr();	155	return c10::DataPtr();
156	}	156	}
157		157

Mtorch_npu/csrc/npu/NPUPluggableAllocator.h+1-1

	@@ -128,7 +128,7 @@ protected:
128	std::function<void(int, c10_npu::MempoolId_t, std::function<bool(aclrtStream)>)> begin_allocate_to_pool_fn_;	128	std::function<void(int, c10_npu::MempoolId_t, std::function<bool(aclrtStream)>)> begin_allocate_to_pool_fn_;
129	std::function<void(int, c10_npu::MempoolId_t)> end_allocate_to_pool_fn_;	129	std::function<void(int, c10_npu::MempoolId_t)> end_allocate_to_pool_fn_;
130	std::function<void(int, c10_npu::MempoolId_t)> release_pool_fn_;	130	std::function<void(int, c10_npu::MempoolId_t)> release_pool_fn_;
131	- // We do the bookeeping here in order to simplify custom allocators	131	+ // We do the bookkeeping here in order to simplify custom allocators
132	std::unordered_map<void*, _AllocationMetadata> allocation_metadata_;	132	std::unordered_map<void*, _AllocationMetadata> allocation_metadata_;
133		133
134	bool initialized_ = false;	134	bool initialized_ = false;

Mtorch_npu/csrc/profiler/profiler_python.cpp+2-2

	@@ -332,7 +332,7 @@ void PythonTracer::start(size_t max_threads)
332	frame = PyFrame_GetBack(frame);	332	frame = PyFrame_GetBack(frame);
333	++depth;	333	++depth;
334	}	334	}
335	- // record py call before proflier start	335	+ // record py call before profiler start
336	for (auto it = current_stack.rbegin(); it != current_stack.rend(); it++) {	336	for (auto it = current_stack.rbegin(); it != current_stack.rend(); it++) {
337	start_py_call_info_[reinterpret_cast<uintptr_t>(ctx)].emplace_back(genPyCallHashId(*it));	337	start_py_call_info_[reinterpret_cast<uintptr_t>(ctx)].emplace_back(genPyCallHashId(*it));
338	}	338	}
	@@ -367,7 +367,7 @@ void PythonTracer::startOne()
367	frame = PyFrame_GetBack(frame);	367	frame = PyFrame_GetBack(frame);
368	++depth;	368	++depth;
369	}	369	}
370	- // record py call before proflier start	370	+ // record py call before profiler start
371	for (auto it = current_stack.rbegin(); it != current_stack.rend(); it++) {	371	for (auto it = current_stack.rbegin(); it != current_stack.rend(); it++) {
372	start_py_call_info_[reinterpret_cast<uintptr_t>(ctx)].emplace_back(genPyCallHashId(*it));	372	start_py_call_info_[reinterpret_cast<uintptr_t>(ctx)].emplace_back(genPyCallHashId(*it));
373	}	373	}

Mtorch_npu/csrc/profiler/utils.cpp+2-2

	@@ -33,14 +33,14 @@ static bool validateInput(
33	{	33	{
34	std::stringstream ss;	34	std::stringstream ss;
35	if (inputs.size() < min_size) {	35	if (inputs.size() < min_size) {
36	- ss << "Failed to save extra arguments for flops compuation of op " << op_name << ", min size: " << min_size <<	36	+ ss << "Failed to save extra arguments for flops computation of op " << op_name << ", min size: " << min_size <<
37	", actual size: " << inputs.size();	37	", actual size: " << inputs.size();
38	TORCH_NPU_WARN(ss.str());	38	TORCH_NPU_WARN(ss.str());
39	return false;	39	return false;
40	}	40	}
41	for (auto index : should_be_tensor) {	41	for (auto index : should_be_tensor) {
42	if (!inputs[index].isTensor()) {	42	if (!inputs[index].isTensor()) {
43	- ss << "Failed to save extra arguments for flops compuation of op " << op_name << ", input[" << index <<	43	+ ss << "Failed to save extra arguments for flops computation of op " << op_name << ", input[" << index <<
44	"] must be a tensor.";	44	"] must be a tensor.";
45	TORCH_NPU_WARN(ss.str());	45	TORCH_NPU_WARN(ss.str());
46	return false;	46	return false;

Mtorch_npu/csrc/toolkit/profiler/src/data_dumper.cpp+2-2

	@@ -125,7 +125,7 @@ void DataDumper::Dump(const std::map<std::string, std::vector<uint8_t>> &dataMap
125	auto iter = fd_map_.find(dump_file);	125	auto iter = fd_map_.find(dump_file);
126	if (iter == fd_map_.end()) {	126	if (iter == fd_map_.end()) {
127	if (!Utils::IsFileExist(dump_file) && !Utils::CreateFile(dump_file)) {	127	if (!Utils::IsFileExist(dump_file) && !Utils::CreateFile(dump_file)) {
128	- ASCEND_LOGE("DataDumper cerate file failed: %s", dump_file.c_str());	128	+ ASCEND_LOGE("DataDumper create file failed: %s", dump_file.c_str());
129	continue;	129	continue;
130	}	130	}
131	fd = fopen(dump_file.c_str(), "ab");	131	fd = fopen(dump_file.c_str(), "ab");
	@@ -284,7 +284,7 @@ void TraceDataDumper::Dump(const std::string &file_name, const std::vector<uint8
284	auto iter = fd_map_.find(dump_file);	284	auto iter = fd_map_.find(dump_file);
285	if (iter == fd_map_.end()) {	285	if (iter == fd_map_.end()) {
286	if (!Utils::IsFileExist(dump_file) && !Utils::CreateFile(dump_file)) {	286	if (!Utils::IsFileExist(dump_file) && !Utils::CreateFile(dump_file)) {
287	- ASCEND_LOGE("TraceDataDumper cerate file failed: %s", dump_file.c_str());	287	+ ASCEND_LOGE("TraceDataDumper create file failed: %s", dump_file.c_str());
288	return;	288	return;
289	}	289	}
290	fd = fopen(dump_file.c_str(), "ab");	290	fd = fopen(dump_file.c_str(), "ab");

	@@ -21,7 +21,7 @@ class TestNpuConv3d(TestCase):
21		21
22	def test_npu_conv3d_fp16(self):	22	def test_npu_conv3d_fp16(self):
23	shape_format = [	23	shape_format = [
24	- # input, weigth, bias, stride, padding, dilation, groups	24	+ # input, weight, bias, stride, padding, dilation, groups
25	[[np.float16, 30, [1, 128, 4, 14, 14]], [np.float16, 30, [1, 128, 3, 3, 3]], None, [1, 1, 1], [1, 1, 1],	25	[[np.float16, 30, [1, 128, 4, 14, 14]], [np.float16, 30, [1, 128, 3, 3, 3]], None, [1, 1, 1], [1, 1, 1],
26	[1, 1, 1], 1],	26	[1, 1, 1], 1],
27	[[np.float16, 30, [1, 64, 4, 14, 14]], [np.float16, 30, [1, 64, 3, 3, 3]], None, [1, 1, 1], [2, 2, 2],	27	[[np.float16, 30, [1, 64, 4, 14, 14]], [np.float16, 30, [1, 64, 3, 3, 3]], None, [1, 1, 1], [2, 2, 2],
	@@ -53,7 +53,7 @@ class TestNpuConv3d(TestCase):
53	torch.npu.config.allow_internal_format = True	53	torch.npu.config.allow_internal_format = True
54	torch.npu.set_compile_mode(jit_compile=True)	54	torch.npu.set_compile_mode(jit_compile=True)
55	shape_format = [	55	shape_format = [
56	- # input, weigth, bias, stride, padding, dilation, groups	56	+ # input, weight, bias, stride, padding, dilation, groups
57	[[np.float32, 30, [1, 128, 4, 14, 14]], [np.float32, 30, [1, 128, 3, 3, 3]], None, [1, 1, 1], [1, 1, 1],	57	[[np.float32, 30, [1, 128, 4, 14, 14]], [np.float32, 30, [1, 128, 3, 3, 3]], None, [1, 1, 1], [1, 1, 1],
58	[1, 1, 1], 1],	58	[1, 1, 1], 1],
59	[[np.float32, 30, [1, 64, 4, 14, 14]], [np.float32, 30, [1, 64, 3, 3, 3]], None, [1, 1, 1], [2, 2, 2],	59	[[np.float32, 30, [1, 64, 4, 14, 14]], [np.float32, 30, [1, 64, 3, 3, 3]], None, [1, 1, 1], [2, 2, 2],

	@@ -441,7 +441,7 @@ class TestFreezing(JitTestCase):
441	self.assertTrue(mf.hasattr('sub1'))	441	self.assertTrue(mf.hasattr('sub1'))
442	self.assertTrue(mf.sub1.hasattr('a'))	442	self.assertTrue(mf.sub1.hasattr('a'))
443	self.assertFalse(mf.sub1.hasattr('b'))	443	self.assertFalse(mf.sub1.hasattr('b'))
444	- # sub2 is fully folded becasue self.sub1 and self.sub2.sub are not alias (Scripting bug)	444	+ # sub2 is fully folded because self.sub1 and self.sub2.sub are not alias (Scripting bug)
445	self.assertFalse(mf.hasattr('sub2'))	445	self.assertFalse(mf.hasattr('sub2'))
446	input_ = torch.randn(2, 2)	446	input_ = torch.randn(2, 2)
447	output = m.forward(input_)	447	output = m.forward(input_)
	@@ -2915,7 +2915,7 @@ class TestFrozenOptimizations(JitTestCase):
2915	scripted = torch.jit.freeze(torch.jit.script(mod))	2915	scripted = torch.jit.freeze(torch.jit.script(mod))
2916	optimized = torch.jit.optimize_for_inference(scripted)	2916	optimized = torch.jit.optimize_for_inference(scripted)
2917	inp = torch.rand([1, 8, 8, 8])	2917	inp = torch.rand([1, 8, 8, 8])
2918	- # a1 cant be inplaced for first use, can for second	2918	+ # a1 can't be inplaced for first use, can for second
2919	FileCheck().check("ScalarMul(").check("ScalarMul_").run(optimized.graph)	2919	FileCheck().check("ScalarMul(").check("ScalarMul_").run(optimized.graph)
2920	self.assertEqual(optimized(inp), mod(inp))	2920	self.assertEqual(optimized(inp), mod(inp))
2921		2921
	@@ -3005,7 +3005,7 @@ class TestMKLDNNReinplacing(JitTestCase):
3005		3005
3006	def forward(self, x):	3006	def forward(self, x):
3007	# x can't be inplaced because its a return value,	3007	# x can't be inplaced because its a return value,
3008	- # check that the inplacing pass doesnt try to inplace	3008	+ # check that the inplacing pass doesn't try to inplace
3009	# self.tensor because its always alive	3009	# self.tensor because its always alive
3010	return x * self.tensor, x	3010	return x * self.tensor, x
3011		3011

	@@ -1,8 +1,8 @@
1	{	1	{
2	- "test_addcdiv_npu_complex128 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupport complex128"},	2	+ "test_addcdiv_npu_complex128 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupported complex128"},
3	- "test_addcdiv_npu_complex64 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupport complex64"},	3	+ "test_addcdiv_npu_complex64 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupported complex64"},
4	- "test_addcmul_npu_complex128 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupport complex128"},	4	+ "test_addcmul_npu_complex128 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupported complex128"},
5	- "test_addcmul_npu_complex64 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupport complex64"},	5	+ "test_addcmul_npu_complex64 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupported complex64"},
6	"test_addcmul_npu_int16 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnAddcmul not implemented for DT_INT16"},	6	"test_addcmul_npu_int16 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnAddcmul not implemented for DT_INT16"},
7	"test_advancedindex_mixed_devices_error_npu (__main__.TestDevicePrecisionPRIVATEUSE1)": {"ERROR_MSG_UNMATCH": "assertRaisesRegex error"},	7	"test_advancedindex_mixed_devices_error_npu (__main__.TestDevicePrecisionPRIVATEUSE1)": {"ERROR_MSG_UNMATCH": "assertRaisesRegex error"},
8	"test_assertRaisesRegex_ignore_msg_non_native_device_npu (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"ERROR_MSG_UNMATCH": "assertRaisesRegex error"},	8	"test_assertRaisesRegex_ignore_msg_non_native_device_npu (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"ERROR_MSG_UNMATCH": "assertRaisesRegex error"},
	@@ -14,9 +14,9 @@
14	"test_conv_transposed_backward_agnostic_to_memory_format_npu (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"NOT_SUPPORT": "Conv3DTranspose not support input size's shape [-1] and [-2]"},	14	"test_conv_transposed_backward_agnostic_to_memory_format_npu (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"NOT_SUPPORT": "Conv3DTranspose not support input size's shape [-1] and [-2]"},
15	"test_copy__npu_bfloat16 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnIsClose not implemented for DT_BFLOAT16"},	15	"test_copy__npu_bfloat16 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnIsClose not implemented for DT_BFLOAT16"},
16	"test_copy__npu_bool (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnInplaceNormal implemented for DT_COMPLEX128"},	16	"test_copy__npu_bool (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnInplaceNormal implemented for DT_COMPLEX128"},
17	- "test_copy__npu_complex128 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupport complex128"},	17	+ "test_copy__npu_complex128 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupported complex128"},
18	- "test_copy__npu_complex32 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupport complex32"},	18	+ "test_copy__npu_complex32 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupported complex32"},
19	- "test_copy__npu_complex64 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupport complex64"},	19	+ "test_copy__npu_complex64 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "unsupported complex64"},
20	"test_copy__npu_float16 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnIsClose/aclnnCast not implemented for DT_BFLOAT16"},	20	"test_copy__npu_float16 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnIsClose/aclnnCast not implemented for DT_BFLOAT16"},
21	"test_copy__npu_float32 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnIsClose/aclnnCast not implemented for DT_BFLOAT16"},	21	"test_copy__npu_float32 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnIsClose/aclnnCast not implemented for DT_BFLOAT16"},
22	"test_copy__npu_float64 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnIsClose/aclnnCast not implemented for DT_BFLOAT16"},	22	"test_copy__npu_float64 (__main__.TestTorchDeviceTypePRIVATEUSE1)": {"DTYPE": "aclnnIsClose/aclnnCast not implemented for DT_BFLOAT16"},

	@@ -32,7 +32,7 @@ typedef enum tagRtError {
32	RT_ERROR_MEMORY_ALLOCATION = 0x2, // memory allocation fail	32	RT_ERROR_MEMORY_ALLOCATION = 0x2, // memory allocation fail
33	RT_ERROR_INVALID_RESOURCE_HANDLE = 0x3, // invalid handle	33	RT_ERROR_INVALID_RESOURCE_HANDLE = 0x3, // invalid handle
34	RT_ERROR_INVALID_DEVICE_POINTER = 0x4, // invalid device point	34	RT_ERROR_INVALID_DEVICE_POINTER = 0x4, // invalid device point
35	- RT_ERROR_INVALID_MEMCPY_DIRECTION = 0x5, // invalid memory copy dirction	35	+ RT_ERROR_INVALID_MEMCPY_DIRECTION = 0x5, // invalid memory copy direction
36	RT_ERROR_INVALID_DEVICE = 0x6, // invalid device	36	RT_ERROR_INVALID_DEVICE = 0x6, // invalid device
37	RT_ERROR_NO_DEVICE = 0x7, // no valid device	37	RT_ERROR_NO_DEVICE = 0x7, // no valid device
38	RT_ERROR_CMD_OCCUPY_FAILURE = 0x8, // command occpuy failure	38	RT_ERROR_CMD_OCCUPY_FAILURE = 0x8, // command occpuy failure
	@@ -51,7 +51,7 @@ typedef enum tagRtError {
51	RT_ERROR_DEVICE_POWER_UP_FAIL = 0x15,	51	RT_ERROR_DEVICE_POWER_UP_FAIL = 0x15,
52	RT_ERROR_DEVICE_POWER_DOWN_FAIL = 0x16,	52	RT_ERROR_DEVICE_POWER_DOWN_FAIL = 0x16,
53	RT_ERROR_FEATURE_NOT_SUPPROT = 0x17,	53	RT_ERROR_FEATURE_NOT_SUPPROT = 0x17,
54	- RT_ERROR_KERNEL_DUPLICATE = 0x18, // register same kernel repeatly	54	+ RT_ERROR_KERNEL_DUPLICATE = 0x18, // register same kernel repeatedly
55	RT_ERROR_MODEL_STREAM_EXE_FAILED = 0x91, // the model stream failed	55	RT_ERROR_MODEL_STREAM_EXE_FAILED = 0x91, // the model stream failed
56	RT_ERROR_MODEL_LOAD_FAILED = 0x94, // the model stream failed	56	RT_ERROR_MODEL_LOAD_FAILED = 0x94, // the model stream failed
57	RT_ERROR_END_OF_SEQUENCE = 0x95, // end of sequence	57	RT_ERROR_END_OF_SEQUENCE = 0x95, // end of sequence
	@@ -165,9 +165,9 @@ RTS_API rtError_t rtFunctionRegister(void binHandle, const void stubFunc, cons
165	* @ingroup rt_kernel	165	* @ingroup rt_kernel
166	* @brief launch kernel to device	166	* @brief launch kernel to device
167	* @param [in] stubFunc stub function	167	* @param [in] stubFunc stub function
168	- * @param [in] blockDim block dimentions	168	+ * @param [in] blockDim block dimensions
169	- * @param [in] args argments address for kernel function	169	+ * @param [in] args arguments address for kernel function
170	- * @param [in] argsSize argements size	170	+ * @param [in] argsSize arguments size
171	* @param [in] smDesc shared memory description	171	* @param [in] smDesc shared memory description
172	* @param [in] stream associated stream	172	* @param [in] stream associated stream
173	* @return RT_ERROR_NONE for ok, errno for failed	173	* @return RT_ERROR_NONE for ok, errno for failed
	@@ -191,8 +191,8 @@ typedef struct tagRtArgsEx {
191	* @ingroup rt_kernel	191	* @ingroup rt_kernel
192	* @brief launch kernel and tiling to device	192	* @brief launch kernel and tiling to device
193	* @param [in] stubFunc stub function	193	* @param [in] stubFunc stub function
194	- * @param [in] blockDim block dimentions	194	+ * @param [in] blockDim block dimensions
195	- * @param [in] argsInfo argments address for kernel function	195	+ * @param [in] argsInfo arguments address for kernel function
196	* @param [in] smDesc shared memory description	196	* @param [in] smDesc shared memory description
197	* @param [in] stream associated stream	197	* @param [in] stream associated stream
198	* @param [in] flag not use, set 0	198	* @param [in] flag not use, set 0