add vector_int4x2_t type for reg load CAPI-asc-devkit-AtomGit

Mdocs/api/context/c_api/reg/reg_load/asc_gather_datablock.md+2-0

	@@ -31,6 +31,7 @@
31	__simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, vector_uint32_t index, vector_bool mask)	31	__simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, vector_uint32_t index, vector_bool mask)
32	__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, vector_uint32_t index, vector_bool mask)	32	__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, vector_uint32_t index, vector_bool mask)
33	__simd_callee__ inline void asc_gather_datablock(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src, vector_uint32_t index, vector_bool mask)	33	__simd_callee__ inline void asc_gather_datablock(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src, vector_uint32_t index, vector_bool mask)
		34	+ __simd_callee__ inline void asc_gather_datablock(vector_int4x2_t& dst, __ubuf__ int4b_t* src, vector_uint32_t index, vector_bool mask)
34	```	35	```
35	- 无掩码控制，默认收集所有索引对应的数据块	36	- 无掩码控制，默认收集所有索引对应的数据块
36	```cpp	37	```cpp
	@@ -50,6 +51,7 @@
50	__simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, vector_uint32_t index)	51	__simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, vector_uint32_t index)
51	__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, vector_uint32_t index)	52	__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, vector_uint32_t index)
52	__simd_callee__ inline void asc_gather_datablock(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src, vector_uint32_t index)	53	__simd_callee__ inline void asc_gather_datablock(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src, vector_uint32_t index)
		54	+ __simd_callee__ inline void asc_gather_datablock(vector_int4x2_t& dst, __ubuf__ int4b_t* src, vector_uint32_t index)
53	```	55	```
54		56
55	## 参数说明	57	## 参数说明

Mdocs/api/context/c_api/reg/reg_load/asc_load.md+1-0

	@@ -31,6 +31,7 @@ __simd_callee__ inline void asc_load(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t
31	__simd_callee__ inline void asc_load(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src)	31	__simd_callee__ inline void asc_load(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src)
32	__simd_callee__ inline void asc_load(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src)	32	__simd_callee__ inline void asc_load(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src)
33	__simd_callee__ inline void asc_load(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src)	33	__simd_callee__ inline void asc_load(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src)
		34	+__simd_callee__ inline void asc_load(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
34	```	35	```
35		36
36	## 参数说明	37	## 参数说明

Mdocs/api/context/c_api/reg/reg_load/asc_loadalign/asc_loadalign_v1.md+8-0

Mdocs/api/context/c_api/reg/reg_load/asc_loadalign/asc_loadalign_v2.md+8-0

Mdocs/api/context/c_api/reg/reg_load/asc_loadalign/asc_loadalign_v3.md+8-0

Mdocs/api/context/c_api/reg/reg_load/asc_loadalign/asc_loadalign_v4.md+8-0

Mdocs/api/context/c_api/reg/reg_load/asc_loadalign/asc_loadalign_v5.md+2-0

	@@ -30,6 +30,7 @@ __simd_callee__ inline void asc_loadalign(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4
30	__simd_callee__ inline void asc_loadalign(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	30	__simd_callee__ inline void asc_loadalign(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
31	__simd_callee__ inline void asc_loadalign(vector_half& dst, __ubuf__ half* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	31	__simd_callee__ inline void asc_loadalign(vector_half& dst, __ubuf__ half* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
32	__simd_callee__ inline void asc_loadalign(vector_float& dst, __ubuf__ float* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	32	__simd_callee__ inline void asc_loadalign(vector_float& dst, __ubuf__ float* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
		33	+__simd_callee__ inline void asc_loadalign(vector_int4x2_t& dst, __ubuf__ int4b_t* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
33	// repeat stride模式搬出，同时开启硬件自动Post Update模式	34	// repeat stride模式搬出，同时开启硬件自动Post Update模式
34	__simd_callee__ inline void asc_loadalign_postupdate(vector_int8_t& dst, __ubuf__ int8_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	35	__simd_callee__ inline void asc_loadalign_postupdate(vector_int8_t& dst, __ubuf__ int8_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
35	__simd_callee__ inline void asc_loadalign_postupdate(vector_uint8_t& dst, __ubuf__ uint8_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	36	__simd_callee__ inline void asc_loadalign_postupdate(vector_uint8_t& dst, __ubuf__ uint8_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
	@@ -47,6 +48,7 @@ __simd_callee__ inline void asc_loadalign_postupdate(vector_fp4x2_e2m1_t& dst, _
47	__simd_callee__ inline void asc_loadalign_postupdate(vector_hifloat8_t& dst, __ubuf__ hifloat8_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	48	__simd_callee__ inline void asc_loadalign_postupdate(vector_hifloat8_t& dst, __ubuf__ hifloat8_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
48	__simd_callee__ inline void asc_loadalign_postupdate(vector_half& dst, __ubuf__ half*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	49	__simd_callee__ inline void asc_loadalign_postupdate(vector_half& dst, __ubuf__ half*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
49	__simd_callee__ inline void asc_loadalign_postupdate(vector_float& dst, __ubuf__ float*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	50	__simd_callee__ inline void asc_loadalign_postupdate(vector_float& dst, __ubuf__ float*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
		51	+__simd_callee__ inline void asc_loadalign_postupdate(vector_int4x2_t& dst, __ubuf__ int4b_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
50	```	52	```
51		53
52	## 参数说明	54	## 参数说明

Mdocs/api/context/c_api/reg/reg_load/asc_loadunalign.md+1-0

	@@ -31,6 +31,7 @@ __simd_callee__ inline void asc_loadunalign(vector_fp8_e8m0_t& dst, vector_load_
31	__simd_callee__ inline void asc_loadunalign(vector_fp4x2_e2m1_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e2m1_t *src1)	31	__simd_callee__ inline void asc_loadunalign(vector_fp4x2_e2m1_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e2m1_t *src1)
32	__simd_callee__ inline void asc_loadunalign(vector_fp4x2_e1m2_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e1m2_t *src1)	32	__simd_callee__ inline void asc_loadunalign(vector_fp4x2_e1m2_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e1m2_t *src1)
33	__simd_callee__ inline void asc_loadunalign(vector_hifloat8_t& dst, vector_load_unalign& src0, __ubuf__ hifloat8_t *src1)	33	__simd_callee__ inline void asc_loadunalign(vector_hifloat8_t& dst, vector_load_unalign& src0, __ubuf__ hifloat8_t *src1)
		34	+__simd_callee__ inline void asc_loadunalign(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1)
34	```	35	```
35		36
36	## 参数说明	37	## 参数说明

Mdocs/api/context/c_api/reg/reg_load/asc_loadunalign_postupdate.md+2-0

	@@ -32,6 +32,7 @@ __simd_callee__ inline void asc_loadunalign_postupdate(vector_int32_t& dst, vect
32	__simd_callee__ inline void asc_loadunalign_postupdate(vector_uint32_t& dst, vector_load_unalign& src0, __ubuf__ uint32_t *src1, uint32_t count)	32	__simd_callee__ inline void asc_loadunalign_postupdate(vector_uint32_t& dst, vector_load_unalign& src0, __ubuf__ uint32_t *src1, uint32_t count)
33	__simd_callee__ inline void asc_loadunalign_postupdate(vector_float& dst, vector_load_unalign& src0, __ubuf__ float *src1, uint32_t count)	33	__simd_callee__ inline void asc_loadunalign_postupdate(vector_float& dst, vector_load_unalign& src0, __ubuf__ float *src1, uint32_t count)
34	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int64_t& dst, vector_load_unalign& src0, __ubuf__ int64_t *src1, uint32_t count)	34	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int64_t& dst, vector_load_unalign& src0, __ubuf__ int64_t *src1, uint32_t count)
		35	+__simd_callee__ inline void asc_loadunalign_postupdate(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1, uint32_t count)
35	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int8_t& dst, vector_load_unalign& src0, __ubuf__ int8_t *src1, iter_reg offset, uint32_t count)	36	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int8_t& dst, vector_load_unalign& src0, __ubuf__ int8_t *src1, iter_reg offset, uint32_t count)
36	__simd_callee__ inline void asc_loadunalign_postupdate(vector_uint8_t& dst, vector_load_unalign& src0, __ubuf__ uint8_t *src1, iter_reg offset, uint32_t count)	37	__simd_callee__ inline void asc_loadunalign_postupdate(vector_uint8_t& dst, vector_load_unalign& src0, __ubuf__ uint8_t *src1, iter_reg offset, uint32_t count)
37	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp4x2_e2m1_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e2m1_t *src1, iter_reg offset, uint32_t count)	38	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp4x2_e2m1_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e2m1_t *src1, iter_reg offset, uint32_t count)
	@@ -48,6 +49,7 @@ __simd_callee__ inline void asc_loadunalign_postupdate(vector_int32_t& dst, vect
48	__simd_callee__ inline void asc_loadunalign_postupdate(vector_uint32_t& dst, vector_load_unalign& src0, __ubuf__ uint32_t *src1, iter_reg offset, uint32_t count)	49	__simd_callee__ inline void asc_loadunalign_postupdate(vector_uint32_t& dst, vector_load_unalign& src0, __ubuf__ uint32_t *src1, iter_reg offset, uint32_t count)
49	__simd_callee__ inline void asc_loadunalign_postupdate(vector_float& dst, vector_load_unalign& src0, __ubuf__ float *src1, iter_reg offset, uint32_t count)	50	__simd_callee__ inline void asc_loadunalign_postupdate(vector_float& dst, vector_load_unalign& src0, __ubuf__ float *src1, iter_reg offset, uint32_t count)
50	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int64_t& dst, vector_load_unalign& src0, __ubuf__ int64_t *src1, iter_reg offset, uint32_t count)	51	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int64_t& dst, vector_load_unalign& src0, __ubuf__ int64_t *src1, iter_reg offset, uint32_t count)
		52	+__simd_callee__ inline void asc_loadunalign_postupdate(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1, iter_reg offset, uint32_t count)
51	```	53	```
52		54
53	## 参数说明	55	## 参数说明

Mdocs/api/context/c_api/reg/reg_load/asc_loadunalign_pre.md+2-0

	@@ -34,6 +34,7 @@ __simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf
34	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ uint32_t* src)	34	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ uint32_t* src)
35	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ float* src)	35	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ float* src)
36	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int64_t* src)	36	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int64_t* src)
		37	+__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int4b_t* src)
37	// 带iter_reg入参	38	// 带iter_reg入参
38	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int8_t* src, iter_reg offset)	39	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int8_t* src, iter_reg offset)
39	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ uint8_t* src, iter_reg offset)	40	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ uint8_t* src, iter_reg offset)
	@@ -51,6 +52,7 @@ __simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf
51	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ uint32_t* src, iter_reg offset)	52	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ uint32_t* src, iter_reg offset)
52	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ float* src, iter_reg offset)	53	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ float* src, iter_reg offset)
53	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int64_t* src, iter_reg offset)	54	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int64_t* src, iter_reg offset)
		55	+__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int4b_t* src, iter_reg offset)
54	```	56	```
55		57
56	## 参数说明	58	## 参数说明

Mimpl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl.h+222-2

	@@ -1936,7 +1936,13 @@ __simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e1m2_t& dst, __ubu
1936	asc_gather_datablock_impl(dst, src, index, mask);	1936	asc_gather_datablock_impl(dst, src, index, mask);
1937	}	1937	}
1938		1938
1939	-__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t &dst, __ubuf__ fp8_e8m0_t* src,	1939	+__simd_callee__ inline void asc_gather_datablock(vector_int4x2_t& dst, __ubuf__ int4b_t* src,
		1940	+ vector_uint32_t index, vector_bool mask)
		1941	+{
		1942	+ asc_gather_datablock_impl(dst, src, index, mask);
		1943	+}
		1944	+
		1945	+__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t &dst, __ubuf__ fp8_e8m0_t* src,
1940	vector_uint32_t index, vector_bool mask)	1946	vector_uint32_t index, vector_bool mask)
1941	{	1947	{
1942	asc_gather_datablock_impl(dst, src, index, mask);	1948	asc_gather_datablock_impl(dst, src, index, mask);
	@@ -2033,7 +2039,14 @@ __simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e1m2_t& dst, __ubu
2033	{	2039	{
2034	asc_gather_datablock_impl(dst, src, index);	2040	asc_gather_datablock_impl(dst, src, index);
2035	}	2041	}
2036	-__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src,	2042	+
		2043	+__simd_callee__ inline void asc_gather_datablock(vector_int4x2_t& dst, __ubuf__ int4b_t* src,
		2044	+ vector_uint32_t index)
		2045	+{
		2046	+ asc_gather_datablock_impl(dst, src, index);
		2047	+}
		2048	+
		2049	+__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src,
2037	vector_uint32_t index)	2050	vector_uint32_t index)
2038	{	2051	{
2039	asc_gather_datablock_impl(dst, src, index);	2052	asc_gather_datablock_impl(dst, src, index);
	@@ -2071,6 +2084,11 @@ __simd_callee__ inline void asc_loadalign(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4
2071	asc_loadalign_impl(dst, src);	2084	asc_loadalign_impl(dst, src);
2072	}	2085	}
2073		2086
		2087	+__simd_callee__ inline void asc_loadalign(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		2088	+{
		2089	+ asc_loadalign_impl(dst, src);
		2090	+}
		2091	+
2074	__simd_callee__ inline void asc_loadalign(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	2092	__simd_callee__ inline void asc_loadalign(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
2075	{	2093	{
2076	asc_loadalign_impl(dst, src);	2094	asc_loadalign_impl(dst, src);
	@@ -2161,6 +2179,11 @@ __simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e1m2_t& dst, __ubuf__
2161	asc_loadalign_brc_impl(dst, src);	2179	asc_loadalign_brc_impl(dst, src);
2162	}	2180	}
2163		2181
		2182	+__simd_callee__ inline void asc_loadalign_brc(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		2183	+{
		2184	+ asc_loadalign_brc_impl(dst, src);
		2185	+}
		2186	+
2164	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	2187	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
2165	{	2188	{
2166	asc_loadalign_brc_impl(dst, src);	2189	asc_loadalign_brc_impl(dst, src);
	@@ -2236,6 +2259,11 @@ __simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e1m2_t& dst, __u
2236	asc_loadalign_upsample_impl(dst, src);	2259	asc_loadalign_upsample_impl(dst, src);
2237	}	2260	}
2238		2261
		2262	+__simd_callee__ inline void asc_loadalign_upsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		2263	+{
		2264	+ asc_loadalign_upsample_impl(dst, src);
		2265	+}
		2266	+
2239	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	2267	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
2240	{	2268	{
2241	asc_loadalign_upsample_impl(dst, src);	2269	asc_loadalign_upsample_impl(dst, src);
	@@ -2301,6 +2329,11 @@ __simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e1m2_t& dst, _
2301	asc_loadalign_downsample_impl(dst, src);	2329	asc_loadalign_downsample_impl(dst, src);
2302	}	2330	}
2303		2331
		2332	+__simd_callee__ inline void asc_loadalign_downsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		2333	+{
		2334	+ asc_loadalign_downsample_impl(dst, src);
		2335	+}
		2336	+
2304	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	2337	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
2305	{	2338	{
2306	asc_loadalign_downsample_impl(dst, src);	2339	asc_loadalign_downsample_impl(dst, src);
	@@ -2366,6 +2399,11 @@ __simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e1m2_t& dst, __ubu
2366	asc_loadalign_unpack_impl(dst, src);	2399	asc_loadalign_unpack_impl(dst, src);
2367	}	2400	}
2368		2401
		2402	+__simd_callee__ inline void asc_loadalign_unpack(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		2403	+{
		2404	+ asc_loadalign_unpack_impl(dst, src);
		2405	+}
		2406	+
2369	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	2407	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
2370	{	2408	{
2371	asc_loadalign_unpack_impl(dst, src);	2409	asc_loadalign_unpack_impl(dst, src);
	@@ -2441,6 +2479,11 @@ __simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e1m2_t& dst, __
2441	asc_loadalign_unpack_v2_impl(dst, src);	2479	asc_loadalign_unpack_v2_impl(dst, src);
2442	}	2480	}
2443		2481
		2482	+__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		2483	+{
		2484	+ asc_loadalign_unpack_v2_impl(dst, src);
		2485	+}
		2486	+
2444	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	2487	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
2445	{	2488	{
2446	asc_loadalign_unpack_v2_impl(dst, src);	2489	asc_loadalign_unpack_v2_impl(dst, src);
	@@ -2481,6 +2524,11 @@ __simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e1m2_t& dst, __ubu
2481	asc_loadalign_brc_v2_impl(dst, src);	2524	asc_loadalign_brc_v2_impl(dst, src);
2482	}	2525	}
2483		2526
		2527	+__simd_callee__ inline void asc_loadalign_brc_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		2528	+{
		2529	+ asc_loadalign_brc_v2_impl(dst, src);
		2530	+}
		2531	+
2484	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	2532	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
2485	{	2533	{
2486	asc_loadalign_brc_v2_impl(dst, src);	2534	asc_loadalign_brc_v2_impl(dst, src);
	@@ -2591,6 +2639,11 @@ __simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e1m2_t& dst0, vec
2591	asc_loadalign_deintlv_impl(dst0, dst1, src);	2639	asc_loadalign_deintlv_impl(dst0, dst1, src);
2592	}	2640	}
2593		2641
		2642	+__simd_callee__ inline void asc_loadalign_deintlv(vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t* src)
		2643	+{
		2644	+ asc_loadalign_deintlv_impl(dst0, dst1, src);
		2645	+}
		2646	+
2594	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src)	2647	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src)
2595	{	2648	{
2596	asc_loadalign_deintlv_impl(dst0, dst1, src);	2649	asc_loadalign_deintlv_impl(dst0, dst1, src);
	@@ -2666,6 +2719,11 @@ __simd_callee__ inline void asc_loadalign(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4
2666	asc_loadalign_impl(dst, src, offset);	2719	asc_loadalign_impl(dst, src, offset);
2667	}	2720	}
2668		2721
		2722	+__simd_callee__ inline void asc_loadalign(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		2723	+{
		2724	+ asc_loadalign_impl(dst, src, offset);
		2725	+}
		2726	+
2669	__simd_callee__ inline void asc_loadalign(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	2727	__simd_callee__ inline void asc_loadalign(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
2670	{	2728	{
2671	asc_loadalign_impl(dst, src, offset);	2729	asc_loadalign_impl(dst, src, offset);
	@@ -2747,6 +2805,11 @@ __simd_callee__ inline void asc_loadalign(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4
2747	asc_loadalign_impl(dst, src, offset);	2805	asc_loadalign_impl(dst, src, offset);
2748	}	2806	}
2749		2807
		2808	+__simd_callee__ inline void asc_loadalign(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
		2809	+{
		2810	+ asc_loadalign_impl(dst, src, offset);
		2811	+}
		2812	+
2750	__simd_callee__ inline void asc_loadalign(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)	2813	__simd_callee__ inline void asc_loadalign(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)
2751	{	2814	{
2752	asc_loadalign_impl(dst, src, offset);	2815	asc_loadalign_impl(dst, src, offset);
	@@ -2832,6 +2895,11 @@ __simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e2m1_t& dst, __ubuf__
2832	asc_loadalign_brc_impl(dst, src, offset);	2895	asc_loadalign_brc_impl(dst, src, offset);
2833	}	2896	}
2834		2897
		2898	+__simd_callee__ inline void asc_loadalign_brc(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
		2899	+{
		2900	+ asc_loadalign_brc_impl(dst, src, offset);
		2901	+}
		2902	+
2835	__simd_callee__ inline void asc_loadalign_brc(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)	2903	__simd_callee__ inline void asc_loadalign_brc(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)
2836	{	2904	{
2837	asc_loadalign_brc_impl(dst, src, offset);	2905	asc_loadalign_brc_impl(dst, src, offset);
	@@ -2910,6 +2978,11 @@ __simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e2m1_t& dst, __u
2910	asc_loadalign_upsample_impl(dst, src, offset);	2978	asc_loadalign_upsample_impl(dst, src, offset);
2911	}	2979	}
2912		2980
		2981	+__simd_callee__ inline void asc_loadalign_upsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
		2982	+{
		2983	+ asc_loadalign_upsample_impl(dst, src, offset);
		2984	+}
		2985	+
2913	__simd_callee__ inline void asc_loadalign_upsample(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)	2986	__simd_callee__ inline void asc_loadalign_upsample(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)
2914	{	2987	{
2915	asc_loadalign_upsample_impl(dst, src, offset);	2988	asc_loadalign_upsample_impl(dst, src, offset);
	@@ -2981,6 +3054,11 @@ __simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e2m1_t& dst, _
2981	asc_loadalign_downsample_impl(dst, src, offset);	3054	asc_loadalign_downsample_impl(dst, src, offset);
2982	}	3055	}
2983		3056
		3057	+__simd_callee__ inline void asc_loadalign_downsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
		3058	+{
		3059	+ asc_loadalign_downsample_impl(dst, src, offset);
		3060	+}
		3061	+
2984	__simd_callee__ inline void asc_loadalign_downsample(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)	3062	__simd_callee__ inline void asc_loadalign_downsample(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)
2985	{	3063	{
2986	asc_loadalign_downsample_impl(dst, src, offset);	3064	asc_loadalign_downsample_impl(dst, src, offset);
	@@ -3052,6 +3130,11 @@ __simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e2m1_t& dst0, vec
3052	asc_loadalign_deintlv_impl(dst0, dst1, src, offset);	3130	asc_loadalign_deintlv_impl(dst0, dst1, src, offset);
3053	}	3131	}
3054		3132
		3133	+__simd_callee__ inline void asc_loadalign_deintlv(vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t* src, iter_reg offset)
		3134	+{
		3135	+ asc_loadalign_deintlv_impl(dst0, dst1, src, offset);
		3136	+}
		3137	+
3055	__simd_callee__ inline void asc_loadalign_deintlv(vector_uint8_t& dst0, vector_uint8_t& dst1, __ubuf__ uint8_t* src, iter_reg offset)	3138	__simd_callee__ inline void asc_loadalign_deintlv(vector_uint8_t& dst0, vector_uint8_t& dst1, __ubuf__ uint8_t* src, iter_reg offset)
3056	{	3139	{
3057	asc_loadalign_deintlv_impl(dst0, dst1, src, offset);	3140	asc_loadalign_deintlv_impl(dst0, dst1, src, offset);
	@@ -3128,6 +3211,11 @@ __simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e2m1_t& dst, __ubu
3128	asc_loadalign_unpack_impl(dst, src, offset);	3211	asc_loadalign_unpack_impl(dst, src, offset);
3129	}	3212	}
3130		3213
		3214	+__simd_callee__ inline void asc_loadalign_unpack(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
		3215	+{
		3216	+ asc_loadalign_unpack_impl(dst, src, offset);
		3217	+}
		3218	+
3131	__simd_callee__ inline void asc_loadalign_unpack(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)	3219	__simd_callee__ inline void asc_loadalign_unpack(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)
3132	{	3220	{
3133	asc_loadalign_unpack_impl(dst, src, offset);	3221	asc_loadalign_unpack_impl(dst, src, offset);
	@@ -3204,6 +3292,11 @@ __simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e2m1_t& dst, __
3204	asc_loadalign_unpack_v2_impl(dst, src, offset);	3292	asc_loadalign_unpack_v2_impl(dst, src, offset);
3205	}	3293	}
3206		3294
		3295	+__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
		3296	+{
		3297	+ asc_loadalign_unpack_v2_impl(dst, src, offset);
		3298	+}
		3299	+
3207	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)	3300	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)
3208	{	3301	{
3209	asc_loadalign_unpack_v2_impl(dst, src, offset);	3302	asc_loadalign_unpack_v2_impl(dst, src, offset);
	@@ -3245,6 +3338,11 @@ __simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e2m1_t& dst, __ubu
3245	asc_loadalign_brc_v2_impl(dst, src, offset);	3338	asc_loadalign_brc_v2_impl(dst, src, offset);
3246	}	3339	}
3247		3340
		3341	+__simd_callee__ inline void asc_loadalign_brc_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
		3342	+{
		3343	+ asc_loadalign_brc_v2_impl(dst, src, offset);
		3344	+}
		3345	+
3248	__simd_callee__ inline void asc_loadalign_brc_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)	3346	__simd_callee__ inline void asc_loadalign_brc_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset)
3249	{	3347	{
3250	asc_loadalign_brc_v2_impl(dst, src, offset);	3348	asc_loadalign_brc_v2_impl(dst, src, offset);
	@@ -3368,6 +3466,11 @@ __simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e1m2_t& dst, __ubuf__
3368	asc_loadalign_brc_impl(dst, src, offset);	3466	asc_loadalign_brc_impl(dst, src, offset);
3369	}	3467	}
3370		3468
		3469	+__simd_callee__ inline void asc_loadalign_brc(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		3470	+{
		3471	+ asc_loadalign_brc_impl(dst, src, offset);
		3472	+}
		3473	+
3371	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	3474	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
3372	{	3475	{
3373	asc_loadalign_brc_impl(dst, src, offset);	3476	asc_loadalign_brc_impl(dst, src, offset);
	@@ -3443,6 +3546,11 @@ __simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e1m2_t& dst, __u
3443	asc_loadalign_upsample_impl(dst, src, offset);	3546	asc_loadalign_upsample_impl(dst, src, offset);
3444	}	3547	}
3445		3548
		3549	+__simd_callee__ inline void asc_loadalign_upsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		3550	+{
		3551	+ asc_loadalign_upsample_impl(dst, src, offset);
		3552	+}
		3553	+
3446	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	3554	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
3447	{	3555	{
3448	asc_loadalign_upsample_impl(dst, src, offset);	3556	asc_loadalign_upsample_impl(dst, src, offset);
	@@ -3503,6 +3611,11 @@ __simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e1m2_t& dst, _
3503	asc_loadalign_downsample_impl(dst, src, offset);	3611	asc_loadalign_downsample_impl(dst, src, offset);
3504	}	3612	}
3505		3613
		3614	+__simd_callee__ inline void asc_loadalign_downsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		3615	+{
		3616	+ asc_loadalign_downsample_impl(dst, src, offset);
		3617	+}
		3618	+
3506	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	3619	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
3507	{	3620	{
3508	asc_loadalign_downsample_impl(dst, src, offset);	3621	asc_loadalign_downsample_impl(dst, src, offset);
	@@ -3563,6 +3676,11 @@ __simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e1m2_t& dst, __ubu
3563	asc_loadalign_unpack_impl(dst, src, offset);	3676	asc_loadalign_unpack_impl(dst, src, offset);
3564	}	3677	}
3565		3678
		3679	+__simd_callee__ inline void asc_loadalign_unpack(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		3680	+{
		3681	+ asc_loadalign_unpack_impl(dst, src, offset);
		3682	+}
		3683	+
3566	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	3684	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
3567	{	3685	{
3568	asc_loadalign_unpack_impl(dst, src, offset);	3686	asc_loadalign_unpack_impl(dst, src, offset);
	@@ -3638,6 +3756,11 @@ __simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e1m2_t& dst, __
3638	asc_loadalign_unpack_v2_impl(dst, src, offset);	3756	asc_loadalign_unpack_v2_impl(dst, src, offset);
3639	}	3757	}
3640		3758
		3759	+__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		3760	+{
		3761	+ asc_loadalign_unpack_v2_impl(dst, src, offset);
		3762	+}
		3763	+
3641	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	3764	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
3642	{	3765	{
3643	asc_loadalign_unpack_v2_impl(dst, src, offset);	3766	asc_loadalign_unpack_v2_impl(dst, src, offset);
	@@ -3678,6 +3801,11 @@ __simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e1m2_t& dst, __ubu
3678	asc_loadalign_brc_v2_impl(dst, src, offset);	3801	asc_loadalign_brc_v2_impl(dst, src, offset);
3679	}	3802	}
3680		3803
		3804	+__simd_callee__ inline void asc_loadalign_brc_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		3805	+{
		3806	+ asc_loadalign_brc_v2_impl(dst, src, offset);
		3807	+}
		3808	+
3681	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	3809	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
3682	{	3810	{
3683	asc_loadalign_brc_v2_impl(dst, src, offset);	3811	asc_loadalign_brc_v2_impl(dst, src, offset);
	@@ -3788,6 +3916,11 @@ __simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e1m2_t& dst0, vec
3788	asc_loadalign_deintlv_impl(dst0, dst1, src, offset);	3916	asc_loadalign_deintlv_impl(dst0, dst1, src, offset);
3789	}	3917	}
3790		3918
		3919	+__simd_callee__ inline void asc_loadalign_deintlv(vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t* src, int32_t offset)
		3920	+{
		3921	+ asc_loadalign_deintlv_impl(dst0, dst1, src, offset);
		3922	+}
		3923	+
3791	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src, int32_t offset)	3924	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src, int32_t offset)
3792	{	3925	{
3793	asc_loadalign_deintlv_impl(dst0, dst1, src, offset);	3926	asc_loadalign_deintlv_impl(dst0, dst1, src, offset);
	@@ -3865,6 +3998,11 @@ __simd_callee__ inline void asc_loadalign_postupdate(
3865	asc_loadalign_postupdate_impl(dst, src, offset);	3998	asc_loadalign_postupdate_impl(dst, src, offset);
3866	}	3999	}
3867		4000
		4001	+__simd_callee__ inline void asc_loadalign_postupdate(vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		4002	+{
		4003	+ asc_loadalign_postupdate_impl(dst, src, offset);
		4004	+}
		4005	+
3868	__simd_callee__ inline void asc_loadalign_postupdate(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	4006	__simd_callee__ inline void asc_loadalign_postupdate(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
3869	{	4007	{
3870	asc_loadalign_postupdate_impl(dst, src, offset);	4008	asc_loadalign_postupdate_impl(dst, src, offset);
	@@ -3964,6 +4102,12 @@ __simd_callee__ inline void asc_loadalign_brc_postupdate(
3964	asc_loadalign_brc_postupdate_impl(dst, src, offset);	4102	asc_loadalign_brc_postupdate_impl(dst, src, offset);
3965	}	4103	}
3966		4104
		4105	+__simd_callee__ inline void asc_loadalign_brc_postupdate(
		4106	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		4107	+{
		4108	+ asc_loadalign_brc_postupdate_impl(dst, src, offset);
		4109	+}
		4110	+
3967	__simd_callee__ inline void asc_loadalign_brc_postupdate(	4111	__simd_callee__ inline void asc_loadalign_brc_postupdate(
3968	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset)	4112	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset)
3969	{	4113	{
	@@ -4041,6 +4185,12 @@ __simd_callee__ inline void asc_loadalign_upsample_postupdate(
4041	asc_loadalign_upsample_postupdate_impl(dst, src, offset);	4185	asc_loadalign_upsample_postupdate_impl(dst, src, offset);
4042	}	4186	}
4043		4187
		4188	+__simd_callee__ inline void asc_loadalign_upsample_postupdate(
		4189	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		4190	+{
		4191	+ asc_loadalign_upsample_postupdate_impl(dst, src, offset);
		4192	+}
		4193	+
4044	__simd_callee__ inline void asc_loadalign_upsample_postupdate(	4194	__simd_callee__ inline void asc_loadalign_upsample_postupdate(
4045	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	4195	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
4046	{	4196	{
	@@ -4117,6 +4267,12 @@ __simd_callee__ inline void asc_loadalign_downsample_postupdate(
4117	asc_loadalign_downsample_postupdate_impl(dst, src, offset);	4267	asc_loadalign_downsample_postupdate_impl(dst, src, offset);
4118	}	4268	}
4119		4269
		4270	+__simd_callee__ inline void asc_loadalign_downsample_postupdate(
		4271	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		4272	+{
		4273	+ asc_loadalign_downsample_postupdate_impl(dst, src, offset);
		4274	+}
		4275	+
4120	__simd_callee__ inline void asc_loadalign_downsample_postupdate(	4276	__simd_callee__ inline void asc_loadalign_downsample_postupdate(
4121	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	4277	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
4122	{	4278	{
	@@ -4192,6 +4348,12 @@ __simd_callee__ inline void asc_loadalign_unpack_postupdate(
4192	asc_loadalign_unpack_postupdate_impl(dst, src, offset);	4348	asc_loadalign_unpack_postupdate_impl(dst, src, offset);
4193	}	4349	}
4194		4350
		4351	+__simd_callee__ inline void asc_loadalign_unpack_postupdate(
		4352	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		4353	+{
		4354	+ asc_loadalign_unpack_postupdate_impl(dst, src, offset);
		4355	+}
		4356	+
4195	__simd_callee__ inline void asc_loadalign_unpack_postupdate(	4357	__simd_callee__ inline void asc_loadalign_unpack_postupdate(
4196	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	4358	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
4197	{	4359	{
	@@ -4278,6 +4440,12 @@ __simd_callee__ inline void asc_loadalign_unpack_postupdate_v2(
4278	asc_loadalign_unpack_postupdate_v2_impl(dst, src, offset);	4440	asc_loadalign_unpack_postupdate_v2_impl(dst, src, offset);
4279	}	4441	}
4280		4442
		4443	+__simd_callee__ inline void asc_loadalign_unpack_postupdate_v2(
		4444	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		4445	+{
		4446	+ asc_loadalign_unpack_postupdate_v2_impl(dst, src, offset);
		4447	+}
		4448	+
4281	__simd_callee__ inline void asc_loadalign_unpack_postupdate_v2(	4449	__simd_callee__ inline void asc_loadalign_unpack_postupdate_v2(
4282	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	4450	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
4283	{	4451	{
	@@ -4324,6 +4492,12 @@ __simd_callee__ inline void asc_loadalign_brc_postupdate_v2(
4324	asc_loadalign_brc_postupdate_v2_impl(dst, src, offset);	4492	asc_loadalign_brc_postupdate_v2_impl(dst, src, offset);
4325	}	4493	}
4326		4494
		4495	+__simd_callee__ inline void asc_loadalign_brc_postupdate_v2(
		4496	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		4497	+{
		4498	+ asc_loadalign_brc_postupdate_v2_impl(dst, src, offset);
		4499	+}
		4500	+
4327	__simd_callee__ inline void asc_loadalign_brc_postupdate_v2(	4501	__simd_callee__ inline void asc_loadalign_brc_postupdate_v2(
4328	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	4502	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
4329	{	4503	{
	@@ -4448,6 +4622,12 @@ __simd_callee__ inline void asc_loadalign_deintlv_postupdate(
4448	asc_loadalign_deintlv_postupdate_impl(dst0, dst1, src, offset);	4622	asc_loadalign_deintlv_postupdate_impl(dst0, dst1, src, offset);
4449	}	4623	}
4450		4624
		4625	+__simd_callee__ inline void asc_loadalign_deintlv_postupdate(
		4626	+ vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t*& src, int32_t offset)
		4627	+{
		4628	+ asc_loadalign_deintlv_postupdate_impl(dst0, dst1, src, offset);
		4629	+}
		4630	+
4451	__simd_callee__ inline void asc_loadalign_deintlv_postupdate(	4631	__simd_callee__ inline void asc_loadalign_deintlv_postupdate(
4452	vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	4632	vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
4453	{	4633	{
	@@ -4585,6 +4765,11 @@ __simd_callee__ inline void asc_loadalign(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4
4585	asc_loadalign_impl(dst, src, block_stride, repeat_stride, mask);	4765	asc_loadalign_impl(dst, src, block_stride, repeat_stride, mask);
4586	}	4766	}
4587		4767
		4768	+__simd_callee__ inline void asc_loadalign(vector_int4x2_t& dst, __ubuf__ int4b_t* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
		4769	+{
		4770	+ asc_loadalign_impl(dst, src, block_stride, repeat_stride, mask);
		4771	+}
		4772	+
4588	__simd_callee__ inline void asc_loadalign(vector_half& dst, __ubuf__ half* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	4773	__simd_callee__ inline void asc_loadalign(vector_half& dst, __ubuf__ half* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
4589	{	4774	{
4590	asc_loadalign_impl(dst, src, block_stride, repeat_stride, mask);	4775	asc_loadalign_impl(dst, src, block_stride, repeat_stride, mask);
	@@ -4665,6 +4850,11 @@ __simd_callee__ inline void asc_loadalign_postupdate(vector_fp4x2_e2m1_t& dst, _
4665	asc_loadalign_postupdate_impl(dst, src, block_stride, repeat_stride, mask);	4850	asc_loadalign_postupdate_impl(dst, src, block_stride, repeat_stride, mask);
4666	}	4851	}
4667		4852
		4853	+__simd_callee__ inline void asc_loadalign_postupdate(vector_int4x2_t& dst, __ubuf__ int4b_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
		4854	+{
		4855	+ asc_loadalign_postupdate_impl(dst, src, block_stride, repeat_stride, mask);
		4856	+}
		4857	+
4668	__simd_callee__ inline void asc_loadalign_postupdate(vector_half& dst, __ubuf__ half*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	4858	__simd_callee__ inline void asc_loadalign_postupdate(vector_half& dst, __ubuf__ half*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
4669	{	4859	{
4670	asc_loadalign_postupdate_impl(dst, src, block_stride, repeat_stride, mask);	4860	asc_loadalign_postupdate_impl(dst, src, block_stride, repeat_stride, mask);
	@@ -4696,6 +4886,11 @@ __simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf
4696	asc_loadunalign_pre_impl(dst, src);	4886	asc_loadunalign_pre_impl(dst, src);
4697	}	4887	}
4698		4888
		4889	+__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int4b_t* src)
		4890	+{
		4891	+ asc_loadunalign_pre_impl(dst, src);
		4892	+}
		4893	+
4699	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src)	4894	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src)
4700	{	4895	{
4701	asc_loadunalign_pre_impl(dst, src);	4896	asc_loadunalign_pre_impl(dst, src);
	@@ -4776,6 +4971,11 @@ __simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf
4776	asc_loadunalign_pre_impl(dst, src, offset);	4971	asc_loadunalign_pre_impl(dst, src, offset);
4777	}	4972	}
4778		4973
		4974	+__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int4b_t* src, iter_reg offset)
		4975	+{
		4976	+ asc_loadunalign_pre_impl(dst, src, offset);
		4977	+}
		4978	+
4779	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src, iter_reg offset)	4979	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src, iter_reg offset)
4780	{	4980	{
4781	asc_loadunalign_pre_impl(dst, src, offset);	4981	asc_loadunalign_pre_impl(dst, src, offset);
	@@ -4917,6 +5117,11 @@ __simd_callee__ inline void asc_loadunalign(vector_fp4x2_e1m2_t& dst, vector_loa
4917	asc_loadunalign_impl(dst, src0, src1);	5117	asc_loadunalign_impl(dst, src0, src1);
4918	}	5118	}
4919		5119
		5120	+__simd_callee__ inline void asc_loadunalign(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1)
		5121	+{
		5122	+ asc_loadunalign_impl(dst, src0, src1);
		5123	+}
		5124	+
4920	// ==========asc_loadunalign_postupdate(u8/s8/half/u16/s16/float/u32/s32/s64/bf16/e4m3/e5m2/e2m1/e1m2/e8m0)=========	5125	// ==========asc_loadunalign_postupdate(u8/s8/half/u16/s16/float/u32/s32/s64/bf16/e4m3/e5m2/e2m1/e1m2/e8m0)=========
4921	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int8_t& dst, vector_load_unalign& src0, __ubuf__ int8_t *src1, uint32_t count)	5126	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int8_t& dst, vector_load_unalign& src0, __ubuf__ int8_t *src1, uint32_t count)
4922	{	5127	{
	@@ -4993,6 +5198,11 @@ __simd_callee__ inline void asc_loadunalign_postupdate(vector_fp4x2_e1m2_t& dst,
4993	asc_loadunalign_postupdate_impl(dst, src0, src1, count);	5198	asc_loadunalign_postupdate_impl(dst, src0, src1, count);
4994	}	5199	}
4995		5200
		5201	+__simd_callee__ inline void asc_loadunalign_postupdate(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1, uint32_t count)
		5202	+{
		5203	+ asc_loadunalign_postupdate_impl(dst, src0, src1, count);
		5204	+}
		5205	+
4996	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, uint32_t count)	5206	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, uint32_t count)
4997	{	5207	{
4998	asc_loadunalign_postupdate_impl(dst, src0, src1, count);	5208	asc_loadunalign_postupdate_impl(dst, src0, src1, count);
	@@ -5073,6 +5283,11 @@ __simd_callee__ inline void asc_loadunalign_postupdate(vector_fp4x2_e1m2_t& dst,
5073	asc_loadunalign_postupdate_impl(dst, src0, src1, offset, count);	5283	asc_loadunalign_postupdate_impl(dst, src0, src1, offset, count);
5074	}	5284	}
5075		5285
		5286	+__simd_callee__ inline void asc_loadunalign_postupdate(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1, iter_reg offset, uint32_t count)
		5287	+{
		5288	+ asc_loadunalign_postupdate_impl(dst, src0, src1, offset, count);
		5289	+}
		5290	+
5076	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, iter_reg offset, uint32_t count)	5291	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, iter_reg offset, uint32_t count)
5077	{	5292	{
5078	asc_loadunalign_postupdate_impl(dst, src0, src1, offset, count);	5293	asc_loadunalign_postupdate_impl(dst, src0, src1, offset, count);
	@@ -5159,6 +5374,11 @@ __simd_callee__ inline void asc_load(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1
5159	asc_load_impl(dst, src);	5374	asc_load_impl(dst, src);
5160	}	5375	}
5161		5376
		5377	+__simd_callee__ inline void asc_load(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		5378	+{
		5379	+ asc_load_impl(dst, src);
		5380	+}
		5381	+
5162	// ==========asc_storealign(u8/s8/half/u16/s16/float/u32/s32/bf16/f8e4m3/f8e5m2/f8e8m0)=========	5382	// ==========asc_storealign(u8/s8/half/u16/s16/float/u32/s32/bf16/f8e4m3/f8e5m2/f8e8m0)=========
5163	__simd_callee__ inline void asc_storealign(__ubuf__ int8_t* dst_align32b, vector_int8_t src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	5383	__simd_callee__ inline void asc_storealign(__ubuf__ int8_t* dst_align32b, vector_int8_t src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
5164	{	5384	{

Mimpl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_gather_datablock_impl.h+18-0

	@@ -159,6 +159,15 @@ __simd_callee__ inline void asc_gather_datablock_impl(vector_fp4x2_e1m2_t& dst,
159	}	159	}
160	}	160	}
161		161
		162	+__simd_callee__ inline void asc_gather_datablock_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src,
		163	+ vector_uint32_t index, vector_bool mask)
		164	+{
		165	+ if ASC_IS_AIV {
		166	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		167	+ vgatherb(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, index, mask);
		168	+ }
		169	+}
		170	+
162	__simd_callee__ inline void asc_gather_datablock_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src,	171	__simd_callee__ inline void asc_gather_datablock_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src,
163	vector_uint32_t index, vector_bool mask)	172	vector_uint32_t index, vector_bool mask)
164	{	173	{
	@@ -292,6 +301,15 @@ __simd_callee__ inline void asc_gather_datablock_impl(vector_fp4x2_e1m2_t& dst,
292	}	301	}
293	}	302	}
294		303
		304	+__simd_callee__ inline void asc_gather_datablock_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src,
		305	+ vector_uint32_t index)
		306	+{
		307	+ if ASC_IS_AIV {
		308	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		309	+ vgatherb(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, index);
		310	+ }
		311	+}
		312	+
295	__simd_callee__ inline void asc_gather_datablock_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src,	313	__simd_callee__ inline void asc_gather_datablock_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src,
296	vector_uint32_t index)	314	vector_uint32_t index)
297	{	315	{

Mimpl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_load_impl.h+9-0

	@@ -162,4 +162,13 @@ __simd_callee__ inline void asc_load_impl(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4
162	}	162	}
163	}	163	}
164		164
		165	+__simd_callee__ inline void asc_load_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		166	+{
		167	+ if ASC_IS_AIV {
		168	+ vector_load_unalign ureg;
		169	+ asc_loadunalign_pre_impl(ureg, src);
		170	+ asc_loadunalign_impl(dst, ureg, src);
		171	+ }
		172	+}
		173	+
165	#endif	174	#endif

Mimpl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadalign_impl.h+136-0

	@@ -56,6 +56,14 @@ __simd_callee__ inline void asc_loadalign_impl(vector_fp4x2_e1m2_t& dst, __ubuf_
56	}	56	}
57	}	57	}
58		58
		59	+__simd_callee__ inline void asc_loadalign_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		60	+{
		61	+ if ASC_IS_AIV {
		62	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		63	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, 0, NORM);
		64	+ }
		65	+}
		66	+
59	__simd_callee__ inline void asc_loadalign_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	67	__simd_callee__ inline void asc_loadalign_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
60	{	68	{
61	if ASC_IS_AIV {	69	if ASC_IS_AIV {
	@@ -188,6 +196,14 @@ __simd_callee__ inline void asc_loadalign_brc_impl(vector_fp4x2_e1m2_t& dst, __u
188	}	196	}
189	}	197	}
190		198
		199	+__simd_callee__ inline void asc_loadalign_brc_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		200	+{
		201	+ if ASC_IS_AIV {
		202	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		203	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, 0, BRC_B8);
		204	+ }
		205	+}
		206	+
191	__simd_callee__ inline void asc_loadalign_brc_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	207	__simd_callee__ inline void asc_loadalign_brc_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
192	{	208	{
193	if ASC_IS_AIV {	209	if ASC_IS_AIV {
	@@ -299,6 +315,14 @@ __simd_callee__ inline void asc_loadalign_upsample_impl(vector_fp4x2_e1m2_t& dst
299	}	315	}
300	}	316	}
301		317
		318	+__simd_callee__ inline void asc_loadalign_upsample_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		319	+{
		320	+ if ASC_IS_AIV {
		321	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		322	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, 0, US_B8);
		323	+ }
		324	+}
		325	+
302	__simd_callee__ inline void asc_loadalign_upsample_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	326	__simd_callee__ inline void asc_loadalign_upsample_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
303	{	327	{
304	if ASC_IS_AIV {	328	if ASC_IS_AIV {
	@@ -396,6 +420,14 @@ __simd_callee__ inline void asc_loadalign_downsample_impl(vector_fp4x2_e1m2_t& d
396	}	420	}
397	}	421	}
398		422
		423	+__simd_callee__ inline void asc_loadalign_downsample_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		424	+{
		425	+ if ASC_IS_AIV {
		426	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		427	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, 0, DS_B8);
		428	+ }
		429	+}
		430	+
399	__simd_callee__ inline void asc_loadalign_downsample_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	431	__simd_callee__ inline void asc_loadalign_downsample_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
400	{	432	{
401	if ASC_IS_AIV {	433	if ASC_IS_AIV {
	@@ -493,6 +525,14 @@ __simd_callee__ inline void asc_loadalign_unpack_impl(vector_fp4x2_e1m2_t& dst,
493	}	525	}
494	}	526	}
495		527
		528	+__simd_callee__ inline void asc_loadalign_unpack_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		529	+{
		530	+ if ASC_IS_AIV {
		531	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		532	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, 0, UNPK_B8);
		533	+ }
		534	+}
		535	+
496	__simd_callee__ inline void asc_loadalign_unpack_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	536	__simd_callee__ inline void asc_loadalign_unpack_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
497	{	537	{
498	if ASC_IS_AIV {	538	if ASC_IS_AIV {
	@@ -604,6 +644,14 @@ __simd_callee__ inline void asc_loadalign_unpack_v2_impl(vector_fp4x2_e1m2_t& ds
604	}	644	}
605	}	645	}
606		646
		647	+__simd_callee__ inline void asc_loadalign_unpack_v2_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		648	+{
		649	+ if ASC_IS_AIV {
		650	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		651	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, 0, UNPK4_B8);
		652	+ }
		653	+}
		654	+
607	__simd_callee__ inline void asc_loadalign_unpack_v2_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	655	__simd_callee__ inline void asc_loadalign_unpack_v2_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
608	{	656	{
609	if ASC_IS_AIV {	657	if ASC_IS_AIV {
	@@ -666,6 +714,14 @@ __simd_callee__ inline void asc_loadalign_brc_v2_impl(vector_fp4x2_e1m2_t& dst,
666	}	714	}
667	}	715	}
668		716
		717	+__simd_callee__ inline void asc_loadalign_brc_v2_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
		718	+{
		719	+ if ASC_IS_AIV {
		720	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		721	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, 0, BLK);
		722	+ }
		723	+}
		724	+
669	__simd_callee__ inline void asc_loadalign_brc_v2_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)	725	__simd_callee__ inline void asc_loadalign_brc_v2_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src)
670	{	726	{
671	if ASC_IS_AIV {	727	if ASC_IS_AIV {
	@@ -827,6 +883,14 @@ __simd_callee__ inline void asc_loadalign_deintlv_impl(vector_fp4x2_e1m2_t& dst0
827	}	883	}
828	}	884	}
829		885
		886	+__simd_callee__ inline void asc_loadalign_deintlv_impl(vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t* src)
		887	+{
		888	+ if ASC_IS_AIV {
		889	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		890	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst0), reinterpret_cast<vector_fp4x2_e1m2_t&>(dst1), src_tmp, 0, DINTLV_B8);
		891	+ }
		892	+}
		893	+
830	__simd_callee__ inline void asc_loadalign_deintlv_impl(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src)	894	__simd_callee__ inline void asc_loadalign_deintlv_impl(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src)
831	{	895	{
832	if ASC_IS_AIV {	896	if ASC_IS_AIV {
	@@ -939,6 +1003,14 @@ __simd_callee__ inline void asc_loadalign_impl(vector_fp4x2_e1m2_t& dst, __ubuf_
939	}	1003	}
940	}	1004	}
941		1005
		1006	+__simd_callee__ inline void asc_loadalign_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		1007	+{
		1008	+ if ASC_IS_AIV {
		1009	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		1010	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, NORM);
		1011	+ }
		1012	+}
		1013	+
942	__simd_callee__ inline void asc_loadalign_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	1014	__simd_callee__ inline void asc_loadalign_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
943	{	1015	{
944	if ASC_IS_AIV {	1016	if ASC_IS_AIV {
	@@ -1071,6 +1143,14 @@ __simd_callee__ inline void asc_loadalign_brc_impl(vector_fp4x2_e1m2_t& dst, __u
1071	}	1143	}
1072	}	1144	}
1073		1145
		1146	+__simd_callee__ inline void asc_loadalign_brc_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		1147	+{
		1148	+ if ASC_IS_AIV {
		1149	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		1150	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, BRC_B8);
		1151	+ }
		1152	+}
		1153	+
1074	__simd_callee__ inline void asc_loadalign_brc_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	1154	__simd_callee__ inline void asc_loadalign_brc_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
1075	{	1155	{
1076	if ASC_IS_AIV {	1156	if ASC_IS_AIV {
	@@ -1182,6 +1262,14 @@ __simd_callee__ inline void asc_loadalign_upsample_impl(vector_fp4x2_e1m2_t& dst
1182	}	1262	}
1183	}	1263	}
1184		1264
		1265	+__simd_callee__ inline void asc_loadalign_upsample_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		1266	+{
		1267	+ if ASC_IS_AIV {
		1268	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		1269	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, US_B8);
		1270	+ }
		1271	+}
		1272	+
1185	__simd_callee__ inline void asc_loadalign_upsample_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	1273	__simd_callee__ inline void asc_loadalign_upsample_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
1186	{	1274	{
1187	if ASC_IS_AIV {	1275	if ASC_IS_AIV {
	@@ -1279,6 +1367,14 @@ __simd_callee__ inline void asc_loadalign_downsample_impl(vector_fp4x2_e1m2_t& d
1279	}	1367	}
1280	}	1368	}
1281		1369
		1370	+__simd_callee__ inline void asc_loadalign_downsample_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		1371	+{
		1372	+ if ASC_IS_AIV {
		1373	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		1374	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, DS_B8);
		1375	+ }
		1376	+}
		1377	+
1282	__simd_callee__ inline void asc_loadalign_downsample_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	1378	__simd_callee__ inline void asc_loadalign_downsample_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
1283	{	1379	{
1284	if ASC_IS_AIV {	1380	if ASC_IS_AIV {
	@@ -1377,6 +1473,14 @@ __simd_callee__ inline void asc_loadalign_unpack_impl(vector_fp4x2_e1m2_t& dst,
1377	}	1473	}
1378	}	1474	}
1379		1475
		1476	+__simd_callee__ inline void asc_loadalign_unpack_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		1477	+{
		1478	+ if ASC_IS_AIV {
		1479	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		1480	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, UNPK_B8);
		1481	+ }
		1482	+}
		1483	+
1380	__simd_callee__ inline void asc_loadalign_unpack_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	1484	__simd_callee__ inline void asc_loadalign_unpack_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
1381	{	1485	{
1382	if ASC_IS_AIV {	1486	if ASC_IS_AIV {
	@@ -1488,6 +1592,14 @@ __simd_callee__ inline void asc_loadalign_unpack_v2_impl(vector_fp4x2_e1m2_t& ds
1488	}	1592	}
1489	}	1593	}
1490		1594
		1595	+__simd_callee__ inline void asc_loadalign_unpack_v2_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		1596	+{
		1597	+ if ASC_IS_AIV {
		1598	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		1599	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, UNPK4_B8);
		1600	+ }
		1601	+}
		1602	+
1491	__simd_callee__ inline void asc_loadalign_unpack_v2_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	1603	__simd_callee__ inline void asc_loadalign_unpack_v2_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
1492	{	1604	{
1493	if ASC_IS_AIV {	1605	if ASC_IS_AIV {
	@@ -1550,6 +1662,14 @@ __simd_callee__ inline void asc_loadalign_brc_v2_impl(vector_fp4x2_e1m2_t& dst,
1550	}	1662	}
1551	}	1663	}
1552		1664
		1665	+__simd_callee__ inline void asc_loadalign_brc_v2_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		1666	+{
		1667	+ if ASC_IS_AIV {
		1668	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		1669	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, BLK);
		1670	+ }
		1671	+}
		1672	+
1553	__simd_callee__ inline void asc_loadalign_brc_v2_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)	1673	__simd_callee__ inline void asc_loadalign_brc_v2_impl(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset)
1554	{	1674	{
1555	if ASC_IS_AIV {	1675	if ASC_IS_AIV {
	@@ -1711,6 +1831,14 @@ __simd_callee__ inline void asc_loadalign_deintlv_impl(vector_fp4x2_e1m2_t& dst0
1711	}	1831	}
1712	}	1832	}
1713		1833
		1834	+__simd_callee__ inline void asc_loadalign_deintlv_impl(vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t* src, int32_t offset)
		1835	+{
		1836	+ if ASC_IS_AIV {
		1837	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		1838	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst0), reinterpret_cast<vector_fp4x2_e1m2_t&>(dst1), src_tmp, offset, DINTLV_B8);
		1839	+ }
		1840	+}
		1841	+
1714	__simd_callee__ inline void asc_loadalign_deintlv_impl(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src, int32_t offset)	1842	__simd_callee__ inline void asc_loadalign_deintlv_impl(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src, int32_t offset)
1715	{	1843	{
1716	if ASC_IS_AIV {	1844	if ASC_IS_AIV {
	@@ -1887,6 +2015,14 @@ __simd_callee__ inline void asc_loadalign_impl(vector_fp4x2_e1m2_t& dst, __ubuf_
1887	}	2015	}
1888	}	2016	}
1889		2017
		2018	+__simd_callee__ inline void asc_loadalign_impl(vector_int4x2_t& dst, __ubuf__ int4b_t* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
		2019	+{
		2020	+ if ASC_IS_AIV {
		2021	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		2022	+ vsldb(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, (block_stride << 16u \| repeat_stride & 0xFFFFU), mask);
		2023	+ }
		2024	+}
		2025	+
1890	__simd_callee__ inline void asc_loadalign_impl(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	2026	__simd_callee__ inline void asc_loadalign_impl(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
1891	{	2027	{
1892	if ASC_IS_AIV {	2028	if ASC_IS_AIV {

Mimpl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadalign_postupdate_impl.h+80-0

	@@ -58,6 +58,15 @@ __simd_callee__ inline void asc_loadalign_postupdate_impl(
58	}	58	}
59	}	59	}
60		60
		61	+__simd_callee__ inline void asc_loadalign_postupdate_impl(
		62	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		63	+{
		64	+ if ASC_IS_AIV {
		65	+ __ubuf__ float4_e1m2x2_t& src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t&>(src);
		66	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, NORM, POST_UPDATE);
		67	+ }
		68	+}
		69	+
61	__simd_callee__ inline void asc_loadalign_postupdate_impl(	70	__simd_callee__ inline void asc_loadalign_postupdate_impl(
62	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	71	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
63	{	72	{
	@@ -199,6 +208,15 @@ __simd_callee__ inline void asc_loadalign_brc_postupdate_impl(
199	}	208	}
200	}	209	}
201		210
		211	+__simd_callee__ inline void asc_loadalign_brc_postupdate_impl(
		212	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		213	+{
		214	+ if ASC_IS_AIV {
		215	+ __ubuf__ float4_e1m2x2_t& src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t&>(src);
		216	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, BRC_B8, POST_UPDATE);
		217	+ }
		218	+}
		219	+
202	__simd_callee__ inline void asc_loadalign_brc_postupdate_impl(	220	__simd_callee__ inline void asc_loadalign_brc_postupdate_impl(
203	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	221	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
204	{	222	{
	@@ -324,6 +342,15 @@ __simd_callee__ inline void asc_loadalign_upsample_postupdate_impl(
324	}	342	}
325	}	343	}
326		344
		345	+__simd_callee__ inline void asc_loadalign_upsample_postupdate_impl(
		346	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		347	+{
		348	+ if ASC_IS_AIV {
		349	+ __ubuf__ float4_e1m2x2_t& src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t&>(src);
		350	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, US_B8, POST_UPDATE);
		351	+ }
		352	+}
		353	+
327	__simd_callee__ inline void asc_loadalign_upsample_postupdate_impl(	354	__simd_callee__ inline void asc_loadalign_upsample_postupdate_impl(
328	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	355	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
329	{	356	{
	@@ -435,6 +462,15 @@ __simd_callee__ inline void asc_loadalign_downsample_postupdate_impl(
435	}	462	}
436	}	463	}
437		464
		465	+__simd_callee__ inline void asc_loadalign_downsample_postupdate_impl(
		466	+ vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset)
		467	+{
		468	+ if ASC_IS_AIV {
		469	+ __ubuf__ float4_e1m2x2_t& src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t&>(src);
		470	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, DS_B8, POST_UPDATE);
		471	+ }
		472	+}
		473	+
438	__simd_callee__ inline void asc_loadalign_downsample_postupdate_impl(	474	__simd_callee__ inline void asc_loadalign_downsample_postupdate_impl(
439	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	475	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
440	{	476	{
	@@ -546,6 +582,15 @@ __simd_callee__ inline void asc_loadalign_unpack_postupdate_impl(
546	}	582	}
547	}	583	}
548		584
		585	+__simd_callee__ inline void asc_loadalign_unpack_postupdate_impl(
		586	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		587	+{
		588	+ if ASC_IS_AIV {
		589	+ __ubuf__ float4_e1m2x2_t& src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t&>(src);
		590	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, UNPK_B8, POST_UPDATE);
		591	+ }
		592	+}
		593	+
549	__simd_callee__ inline void asc_loadalign_unpack_postupdate_impl(	594	__simd_callee__ inline void asc_loadalign_unpack_postupdate_impl(
550	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	595	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
551	{	596	{
	@@ -672,6 +717,15 @@ __simd_callee__ inline void asc_loadalign_unpack_postupdate_v2_impl(
672	}	717	}
673	}	718	}
674		719
		720	+__simd_callee__ inline void asc_loadalign_unpack_postupdate_v2_impl(
		721	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		722	+{
		723	+ if ASC_IS_AIV {
		724	+ __ubuf__ float4_e1m2x2_t& src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t&>(src);
		725	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, UNPK4_B8, POST_UPDATE);
		726	+ }
		727	+}
		728	+
675	__simd_callee__ inline void asc_loadalign_unpack_postupdate_v2_impl(	729	__simd_callee__ inline void asc_loadalign_unpack_postupdate_v2_impl(
676	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	730	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
677	{	731	{
	@@ -743,6 +797,15 @@ __simd_callee__ inline void asc_loadalign_brc_postupdate_v2_impl(
743	}	797	}
744	}	798	}
745		799
		800	+__simd_callee__ inline void asc_loadalign_brc_postupdate_v2_impl(
		801	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset)
		802	+{
		803	+ if ASC_IS_AIV {
		804	+ __ubuf__ float4_e1m2x2_t& src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t&>(src);
		805	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, offset, BLK, POST_UPDATE);
		806	+ }
		807	+}
		808	+
746	__simd_callee__ inline void asc_loadalign_brc_postupdate_v2_impl(	809	__simd_callee__ inline void asc_loadalign_brc_postupdate_v2_impl(
747	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	810	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
748	{	811	{
	@@ -925,6 +988,15 @@ __simd_callee__ inline void asc_loadalign_deintlv_postupdate_impl(
925	}	988	}
926	}	989	}
927		990
		991	+__simd_callee__ inline void asc_loadalign_deintlv_postupdate_impl(
		992	+ vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t*& src, int32_t offset)
		993	+{
		994	+ if ASC_IS_AIV {
		995	+ __ubuf__ float4_e1m2x2_t& src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t&>(src);
		996	+ vlds(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst0), reinterpret_cast<vector_fp4x2_e1m2_t&>(dst1), src_tmp, offset, DINTLV_B8, POST_UPDATE);
		997	+ }
		998	+}
		999	+
928	__simd_callee__ inline void asc_loadalign_deintlv_postupdate_impl(	1000	__simd_callee__ inline void asc_loadalign_deintlv_postupdate_impl(
929	vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t*& src, int32_t offset)	1001	vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t*& src, int32_t offset)
930	{	1002	{
	@@ -1115,6 +1187,14 @@ __simd_callee__ inline void asc_loadalign_postupdate_impl(vector_fp4x2_e1m2_t& d
1115	}	1187	}
1116	}	1188	}
1117		1189
		1190	+__simd_callee__ inline void asc_loadalign_postupdate_impl(vector_int4x2_t& dst, __ubuf__ int4b_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
		1191	+{
		1192	+ if ASC_IS_AIV {
		1193	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		1194	+ vsldb(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src_tmp, (block_stride << 16u \| repeat_stride & 0xFFFFU), mask, POST_UPDATE);
		1195	+ }
		1196	+}
		1197	+
1118	__simd_callee__ inline void asc_loadalign_postupdate_impl(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)	1198	__simd_callee__ inline void asc_loadalign_postupdate_impl(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask)
1119	{	1199	{
1120	if ASC_IS_AIV {	1200	if ASC_IS_AIV {

Mimpl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadalign_v2_impl.h+954-890

Mimpl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadunalign_impl.h+8-0

	@@ -134,4 +134,12 @@ __simd_callee__ inline void asc_loadunalign_impl(vector_fp4x2_e1m2_t& dst, vecto
134	}	134	}
135	}	135	}
136		136
		137	+__simd_callee__ inline void asc_loadunalign_impl(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1)
		138	+{
		139	+ if ASC_IS_AIV {
		140	+ __ubuf__ float4_e1m2x2_t* src1_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src1);
		141	+ vldus(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src0, src1_tmp);
		142	+ }
		143	+}
		144	+
137	#endif	145	#endif

Mimpl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadunalign_postupdate_impl.h+16-0

	@@ -135,6 +135,14 @@ __simd_callee__ inline void asc_loadunalign_postupdate_impl(vector_fp4x2_e1m2_t&
135	}	135	}
136	}	136	}
137		137
		138	+__simd_callee__ inline void asc_loadunalign_postupdate_impl(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1, uint32_t count)
		139	+{
		140	+ if ASC_IS_AIV {
		141	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src1);
		142	+ vldus(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src0, src_tmp, count, POST_UPDATE);
		143	+ }
		144	+}
		145	+
138	__simd_callee__ inline void asc_loadunalign_postupdate_impl(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, uint32_t count)	146	__simd_callee__ inline void asc_loadunalign_postupdate_impl(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, uint32_t count)
139	{	147	{
140	if ASC_IS_AIV {	148	if ASC_IS_AIV {
	@@ -254,6 +262,14 @@ __simd_callee__ inline void asc_loadunalign_postupdate_impl(vector_fp4x2_e1m2_t&
254	}	262	}
255	}	263	}
256		264
		265	+__simd_callee__ inline void asc_loadunalign_postupdate_impl(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1, iter_reg offset, uint32_t count)
		266	+{
		267	+ if ASC_IS_AIV {
		268	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src1);
		269	+ vldu(reinterpret_cast<vector_fp4x2_e1m2_t&>(dst), src0, offset, src_tmp, count);
		270	+ }
		271	+}
		272	+
257	__simd_callee__ inline void asc_loadunalign_postupdate_impl(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, iter_reg offset, uint32_t count)	273	__simd_callee__ inline void asc_loadunalign_postupdate_impl(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, iter_reg offset, uint32_t count)
258	{	274	{
259	if ASC_IS_AIV {	275	if ASC_IS_AIV {

Mimpl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadunalign_pre_impl.h+16-0

	@@ -55,6 +55,14 @@ __simd_callee__ inline void asc_loadunalign_pre_impl(vector_load_unalign& dst, _
55	}	55	}
56	}	56	}
57		57
		58	+__simd_callee__ inline void asc_loadunalign_pre_impl(vector_load_unalign& dst, __ubuf__ int4b_t* src)
		59	+{
		60	+ if ASC_IS_AIV {
		61	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		62	+ vldas(dst, src_tmp);
		63	+ }
		64	+}
		65	+
58	__simd_callee__ inline void asc_loadunalign_pre_impl(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src)	66	__simd_callee__ inline void asc_loadunalign_pre_impl(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src)
59	{	67	{
60	if ASC_IS_AIV {	68	if ASC_IS_AIV {
	@@ -172,6 +180,14 @@ __simd_callee__ inline void asc_loadunalign_pre_impl(vector_load_unalign& dst, _
172	}	180	}
173	}	181	}
174		182
		183	+__simd_callee__ inline void asc_loadunalign_pre_impl(vector_load_unalign& dst, __ubuf__ int4b_t* src, iter_reg offset)
		184	+{
		185	+ if ASC_IS_AIV {
		186	+ __ubuf__ float4_e1m2x2_t* src_tmp = reinterpret_cast<__ubuf__ float4_e1m2x2_t*>(src);
		187	+ vlda(dst, src_tmp, offset);
		188	+ }
		189	+}
		190	+
175	__simd_callee__ inline void asc_loadunalign_pre_impl(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src, iter_reg offset)	191	__simd_callee__ inline void asc_loadunalign_pre_impl(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src, iter_reg offset)
176	{	192	{
177	if ASC_IS_AIV {	193	if ASC_IS_AIV {

Minclude/c_api/reg_compute/reg_load.h+93-0

	@@ -154,6 +154,9 @@ __simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e2m1_t& dst, __ubu
154	__simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src,	154	__simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src,
155	vector_uint32_t index, vector_bool mask);	155	vector_uint32_t index, vector_bool mask);
156		156
		157	+__simd_callee__ inline void asc_gather_datablock(vector_int4x2_t& dst, __ubuf__ int4b_t* src,
		158	+ vector_uint32_t index, vector_bool mask);
		159	+
157	__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t *src,	160	__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t *src,
158	vector_uint32_t index, vector_bool mask);	161	vector_uint32_t index, vector_bool mask);
159		162
	@@ -204,6 +207,9 @@ __simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e2m1_t& dst, __ubu
204	__simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src,	207	__simd_callee__ inline void asc_gather_datablock(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src,
205	vector_uint32_t index);	208	vector_uint32_t index);
206		209
		210	+__simd_callee__ inline void asc_gather_datablock(vector_int4x2_t& dst, __ubuf__ int4b_t* src,
		211	+ vector_uint32_t index);
		212	+
207	__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src,	213	__simd_callee__ inline void asc_gather_datablock(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src,
208	vector_uint32_t index);	214	vector_uint32_t index);
209		215
	@@ -221,6 +227,8 @@ __simd_callee__ inline void asc_loadalign(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4
221		227
222	__simd_callee__ inline void asc_loadalign(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);	228	__simd_callee__ inline void asc_loadalign(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);
223		229
		230	+__simd_callee__ inline void asc_loadalign(vector_int4x2_t& dst, __ubuf__ int4b_t* src);
		231	+
224	__simd_callee__ inline void asc_loadalign(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);	232	__simd_callee__ inline void asc_loadalign(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);
225		233
226	__simd_callee__ inline void asc_loadalign(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);	234	__simd_callee__ inline void asc_loadalign(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);
	@@ -255,6 +263,8 @@ __simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e2m1_t& dst, __ubuf__
255		263
256	__simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);	264	__simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);
257		265
		266	+__simd_callee__ inline void asc_loadalign_brc(vector_int4x2_t& dst, __ubuf__ int4b_t* src);
		267	+
258	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);	268	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);
259		269
260	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);	270	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);
	@@ -285,6 +295,8 @@ __simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e2m1_t& dst, __u
285		295
286	__simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);	296	__simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);
287		297
		298	+__simd_callee__ inline void asc_loadalign_upsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src);
		299	+
288	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);	300	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);
289		301
290	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);	302	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);
	@@ -309,6 +321,8 @@ __simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e2m1_t& dst, _
309		321
310	__simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);	322	__simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);
311		323
		324	+__simd_callee__ inline void asc_loadalign_downsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src);
		325	+
312	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);	326	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);
313		327
314	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);	328	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);
	@@ -333,6 +347,8 @@ __simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e2m1_t& dst, __ubu
333		347
334	__simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);	348	__simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);
335		349
		350	+__simd_callee__ inline void asc_loadalign_unpack(vector_int4x2_t& dst, __ubuf__ int4b_t* src);
		351	+
336	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);	352	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);
337		353
338	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);	354	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);
	@@ -363,6 +379,8 @@ __simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e2m1_t& dst, __
363		379
364	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);	380	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);
365		381
		382	+__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src);
		383	+
366	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);	384	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);
367		385
368	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);	386	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);
	@@ -379,6 +397,8 @@ __simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e2m1_t& dst, __ubu
379		397
380	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);	398	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);
381		399
		400	+__simd_callee__ inline void asc_loadalign_brc_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src);
		401	+
382	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);	402	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);
383		403
384	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);	404	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);
	@@ -423,6 +443,8 @@ __simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e2m1_t& dst0, vec
423		443
424	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e1m2_t& dst0, vector_fp4x2_e1m2_t& dst1, __ubuf__ fp4x2_e1m2_t* src);	444	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e1m2_t& dst0, vector_fp4x2_e1m2_t& dst1, __ubuf__ fp4x2_e1m2_t* src);
425		445
		446	+__simd_callee__ inline void asc_loadalign_deintlv(vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t* src);
		447	+
426	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src);	448	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src);
427		449
428	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e5m2_t& dst0, vector_fp8_e5m2_t& dst1, __ubuf__ fp8_e5m2_t* src);	450	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e5m2_t& dst0, vector_fp8_e5m2_t& dst1, __ubuf__ fp8_e5m2_t* src);
	@@ -453,6 +475,8 @@ __simd_callee__ inline void asc_loadalign(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4
453		475
454	__simd_callee__ inline void asc_loadalign(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);	476	__simd_callee__ inline void asc_loadalign(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);
455		477
		478	+__simd_callee__ inline void asc_loadalign(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset);
		479	+
456	__simd_callee__ inline void asc_loadalign(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);	480	__simd_callee__ inline void asc_loadalign(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);
457		481
458	__simd_callee__ inline void asc_loadalign(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);	482	__simd_callee__ inline void asc_loadalign(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);
	@@ -487,6 +511,8 @@ __simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e2m1_t& dst, __ubuf__
487		511
488	__simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);	512	__simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);
489		513
		514	+__simd_callee__ inline void asc_loadalign_brc(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset);
		515	+
490	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);	516	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);
491		517
492	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);	518	__simd_callee__ inline void asc_loadalign_brc(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);
	@@ -517,6 +543,8 @@ __simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e2m1_t& dst, __u
517		543
518	__simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);	544	__simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);
519		545
		546	+__simd_callee__ inline void asc_loadalign_upsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset);
		547	+
520	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);	548	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);
521		549
522	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);	550	__simd_callee__ inline void asc_loadalign_upsample(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);
	@@ -541,6 +569,8 @@ __simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e2m1_t& dst, _
541		569
542	__simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);	570	__simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);
543		571
		572	+__simd_callee__ inline void asc_loadalign_downsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset);
		573	+
544	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);	574	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);
545		575
546	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);	576	__simd_callee__ inline void asc_loadalign_downsample(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);
	@@ -565,6 +595,8 @@ __simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e2m1_t& dst, __ubu
565		595
566	__simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);	596	__simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);
567		597
		598	+__simd_callee__ inline void asc_loadalign_unpack(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset);
		599	+
568	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);	600	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);
569		601
570	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);	602	__simd_callee__ inline void asc_loadalign_unpack(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);
	@@ -595,6 +627,8 @@ __simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e2m1_t& dst, __
595		627
596	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);	628	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);
597		629
		630	+__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset);
		631	+
598	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);	632	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);
599		633
600	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);	634	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);
	@@ -611,6 +645,8 @@ __simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e2m1_t& dst, __ubu
611		645
612	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);	646	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);
613		647
		648	+__simd_callee__ inline void asc_loadalign_brc_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src, int32_t offset);
		649	+
614	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);	650	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, int32_t offset);
615		651
616	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);	652	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, int32_t offset);
	@@ -655,6 +691,8 @@ __simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e2m1_t& dst0, vec
655		691
656	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e1m2_t& dst0, vector_fp4x2_e1m2_t& dst1, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);	692	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e1m2_t& dst0, vector_fp4x2_e1m2_t& dst1, __ubuf__ fp4x2_e1m2_t* src, int32_t offset);
657		693
		694	+__simd_callee__ inline void asc_loadalign_deintlv(vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t* src, int32_t offset);
		695	+
658	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src, int32_t offset);	696	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t* src, int32_t offset);
659		697
660	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e5m2_t& dst0, vector_fp8_e5m2_t& dst1, __ubuf__ fp8_e5m2_t* src, int32_t offset);	698	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp8_e5m2_t& dst0, vector_fp8_e5m2_t& dst1, __ubuf__ fp8_e5m2_t* src, int32_t offset);
	@@ -689,6 +727,8 @@ __simd_callee__ inline void asc_loadalign_postupdate(
689		727
690	__simd_callee__ inline void asc_loadalign_postupdate(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);	728	__simd_callee__ inline void asc_loadalign_postupdate(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);
691		729
		730	+__simd_callee__ inline void asc_loadalign_postupdate(vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset);
		731	+
692	__simd_callee__ inline void asc_loadalign_postupdate(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);	732	__simd_callee__ inline void asc_loadalign_postupdate(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);
693		733
694	__simd_callee__ inline void asc_loadalign_postupdate(	734	__simd_callee__ inline void asc_loadalign_postupdate(
	@@ -727,6 +767,9 @@ __simd_callee__ inline void asc_loadalign_brc_postupdate(
727	__simd_callee__ inline void asc_loadalign_brc_postupdate(	767	__simd_callee__ inline void asc_loadalign_brc_postupdate(
728	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);	768	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);
729		769
		770	+__simd_callee__ inline void asc_loadalign_brc_postupdate(
		771	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset);
		772	+
730	__simd_callee__ inline void asc_loadalign_brc_postupdate(	773	__simd_callee__ inline void asc_loadalign_brc_postupdate(
731	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);	774	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);
732		775
	@@ -766,6 +809,9 @@ __simd_callee__ inline void asc_loadalign_upsample_postupdate(
766	__simd_callee__ inline void asc_loadalign_upsample_postupdate(	809	__simd_callee__ inline void asc_loadalign_upsample_postupdate(
767	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);	810	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);
768		811
		812	+__simd_callee__ inline void asc_loadalign_upsample_postupdate(
		813	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset);
		814	+
769	__simd_callee__ inline void asc_loadalign_upsample_postupdate(	815	__simd_callee__ inline void asc_loadalign_upsample_postupdate(
770	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);	816	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);
771		817
	@@ -801,6 +847,9 @@ __simd_callee__ inline void asc_loadalign_downsample_postupdate(
801	__simd_callee__ inline void asc_loadalign_downsample_postupdate(	847	__simd_callee__ inline void asc_loadalign_downsample_postupdate(
802	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);	848	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);
803		849
		850	+__simd_callee__ inline void asc_loadalign_downsample_postupdate(
		851	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset);
		852	+
804	__simd_callee__ inline void asc_loadalign_downsample_postupdate(	853	__simd_callee__ inline void asc_loadalign_downsample_postupdate(
805	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);	854	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);
806		855
	@@ -835,6 +884,9 @@ __simd_callee__ inline void asc_loadalign_unpack_postupdate(
835	__simd_callee__ inline void asc_loadalign_unpack_postupdate(	884	__simd_callee__ inline void asc_loadalign_unpack_postupdate(
836	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);	885	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);
837		886
		887	+__simd_callee__ inline void asc_loadalign_unpack_postupdate(
		888	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset);
		889	+
838	__simd_callee__ inline void asc_loadalign_unpack_postupdate(	890	__simd_callee__ inline void asc_loadalign_unpack_postupdate(
839	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);	891	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);
840		892
	@@ -878,6 +930,9 @@ __simd_callee__ inline void asc_loadalign_unpack_postupdate_v2(
878	__simd_callee__ inline void asc_loadalign_unpack_postupdate_v2(	930	__simd_callee__ inline void asc_loadalign_unpack_postupdate_v2(
879	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);	931	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);
880		932
		933	+__simd_callee__ inline void asc_loadalign_unpack_postupdate_v2(
		934	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset);
		935	+
881	__simd_callee__ inline void asc_loadalign_unpack_postupdate_v2(	936	__simd_callee__ inline void asc_loadalign_unpack_postupdate_v2(
882	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);	937	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);
883		938
	@@ -901,6 +956,9 @@ __simd_callee__ inline void asc_loadalign_brc_postupdate_v2(
901	__simd_callee__ inline void asc_loadalign_brc_postupdate_v2(	956	__simd_callee__ inline void asc_loadalign_brc_postupdate_v2(
902	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);	957	vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t*& src, int32_t offset);
903		958
		959	+__simd_callee__ inline void asc_loadalign_brc_postupdate_v2(
		960	+ vector_int4x2_t& dst, __ubuf__ int4b_t*& src, int32_t offset);
		961	+
904	__simd_callee__ inline void asc_loadalign_brc_postupdate_v2(	962	__simd_callee__ inline void asc_loadalign_brc_postupdate_v2(
905	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);	963	vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t*& src, int32_t offset);
906		964
	@@ -963,6 +1021,9 @@ __simd_callee__ inline void asc_loadalign_deintlv_postupdate(
963	__simd_callee__ inline void asc_loadalign_deintlv_postupdate(	1021	__simd_callee__ inline void asc_loadalign_deintlv_postupdate(
964	vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t*& src, int32_t offset);	1022	vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, __ubuf__ fp8_e8m0_t*& src, int32_t offset);
965		1023
		1024	+__simd_callee__ inline void asc_loadalign_deintlv_postupdate(
		1025	+ vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t*& src, int32_t offset);
		1026	+
966	__simd_callee__ inline void asc_loadalign_deintlv_postupdate(	1027	__simd_callee__ inline void asc_loadalign_deintlv_postupdate(
967	vector_fp8_e5m2_t& dst0, vector_fp8_e5m2_t& dst1, __ubuf__ fp8_e5m2_t*& src, int32_t offset);	1028	vector_fp8_e5m2_t& dst0, vector_fp8_e5m2_t& dst1, __ubuf__ fp8_e5m2_t*& src, int32_t offset);
968		1029
	@@ -1022,6 +1083,8 @@ __simd_callee__ inline void asc_loadalign(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4
1022		1083
1023	__simd_callee__ inline void asc_loadalign(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);	1084	__simd_callee__ inline void asc_loadalign(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);
1024		1085
		1086	+__simd_callee__ inline void asc_loadalign(vector_int4x2_t& dst, __ubuf__ int4b_t* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);
		1087	+
1025	__simd_callee__ inline void asc_loadalign(vector_half& dst, __ubuf__ half* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);	1088	__simd_callee__ inline void asc_loadalign(vector_half& dst, __ubuf__ half* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);
1026		1089
1027	__simd_callee__ inline void asc_loadalign(vector_float& dst, __ubuf__ float* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);	1090	__simd_callee__ inline void asc_loadalign(vector_float& dst, __ubuf__ float* src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);
	@@ -1054,6 +1117,8 @@ __simd_callee__ inline void asc_loadalign_postupdate(vector_fp4x2_e1m2_t& dst, _
1054		1117
1055	__simd_callee__ inline void asc_loadalign_postupdate(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);	1118	__simd_callee__ inline void asc_loadalign_postupdate(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);
1056		1119
		1120	+__simd_callee__ inline void asc_loadalign_postupdate(vector_int4x2_t& dst, __ubuf__ int4b_t*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);
		1121	+
1057	__simd_callee__ inline void asc_loadalign_postupdate(vector_half& dst, __ubuf__ half*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);	1122	__simd_callee__ inline void asc_loadalign_postupdate(vector_half& dst, __ubuf__ half*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);
1058		1123
1059	__simd_callee__ inline void asc_loadalign_postupdate(vector_float& dst, __ubuf__ float*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);	1124	__simd_callee__ inline void asc_loadalign_postupdate(vector_float& dst, __ubuf__ float*& src, uint16_t block_stride, uint16_t repeat_stride, vector_bool mask);
	@@ -1067,6 +1132,8 @@ __simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf
1067		1132
1068	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp4x2_e1m2_t* src);	1133	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp4x2_e1m2_t* src);
1069		1134
		1135	+__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int4b_t* src);
		1136	+
1070	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src);	1137	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src);
1071		1138
1072	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e5m2_t* src);	1139	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e5m2_t* src);
	@@ -1099,6 +1166,8 @@ __simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf
1099		1166
1100	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset);	1167	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset);
1101		1168
		1169	+__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ int4b_t* src, iter_reg offset);
		1170	+
1102	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src, iter_reg offset);	1171	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e8m0_t* src, iter_reg offset);
1103		1172
1104	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e5m2_t* src, iter_reg offset);	1173	__simd_callee__ inline void asc_loadunalign_pre(vector_load_unalign& dst, __ubuf__ fp8_e5m2_t* src, iter_reg offset);
	@@ -1156,6 +1225,8 @@ __simd_callee__ inline void asc_loadunalign(vector_fp4x2_e2m1_t& dst, vector_loa
1156		1225
1157	__simd_callee__ inline void asc_loadunalign(vector_fp4x2_e1m2_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e1m2_t *src1);	1226	__simd_callee__ inline void asc_loadunalign(vector_fp4x2_e1m2_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e1m2_t *src1);
1158		1227
		1228	+__simd_callee__ inline void asc_loadunalign(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1);
		1229	+
1159	// ==========asc_loadunalign_postupdate(u8/s8/half/u16/s16/float/u32/s32/s64/bf16/e4m3/e5m2/e2m1/e1m2)=========	1230	// ==========asc_loadunalign_postupdate(u8/s8/half/u16/s16/float/u32/s32/s64/bf16/e4m3/e5m2/e2m1/e1m2)=========
1160	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int8_t& dst, vector_load_unalign& src0, __ubuf__ int8_t *src1, uint32_t count);	1231	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int8_t& dst, vector_load_unalign& src0, __ubuf__ int8_t *src1, uint32_t count);
1161		1232
	@@ -1187,6 +1258,8 @@ __simd_callee__ inline void asc_loadunalign_postupdate(vector_fp4x2_e2m1_t& dst,
1187		1258
1188	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp4x2_e1m2_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e1m2_t *src1, uint32_t count);	1259	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp4x2_e1m2_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e1m2_t *src1, uint32_t count);
1189		1260
		1261	+__simd_callee__ inline void asc_loadunalign_postupdate(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1, uint32_t count);
		1262	+
1190	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, uint32_t count);	1263	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, uint32_t count);
1191		1264
1192	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int8_t& dst, vector_load_unalign& src0, __ubuf__ int8_t *src1, iter_reg offset, uint32_t count);	1265	__simd_callee__ inline void asc_loadunalign_postupdate(vector_int8_t& dst, vector_load_unalign& src0, __ubuf__ int8_t *src1, iter_reg offset, uint32_t count);
	@@ -1219,6 +1292,8 @@ __simd_callee__ inline void asc_loadunalign_postupdate(vector_fp4x2_e2m1_t& dst,
1219		1292
1220	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp4x2_e1m2_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e1m2_t *src1, iter_reg offset, uint32_t count);	1293	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp4x2_e1m2_t& dst, vector_load_unalign& src0, __ubuf__ fp4x2_e1m2_t *src1, iter_reg offset, uint32_t count);
1221		1294
		1295	+__simd_callee__ inline void asc_loadunalign_postupdate(vector_int4x2_t& dst, vector_load_unalign& src0, __ubuf__ int4b_t *src1, iter_reg offset, uint32_t count);
		1296	+
1222	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, iter_reg offset, uint32_t count);	1297	__simd_callee__ inline void asc_loadunalign_postupdate(vector_fp8_e8m0_t& dst, vector_load_unalign& src0, __ubuf__ fp8_e8m0_t *src1, iter_reg offset, uint32_t count);
1223		1298
1224	// ==========asc_load(u8/s8/half/u16/s16/float/u32/s32/s64/bf16/e4m3/e5m2/e8m0/e2m1/e1m2)=========	1299	// ==========asc_load(u8/s8/half/u16/s16/float/u32/s32/s64/bf16/e4m3/e5m2/e8m0/e2m1/e1m2)=========
	@@ -1254,10 +1329,14 @@ __simd_callee__ inline void asc_load(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2
1254		1329
1255	__simd_callee__ inline void asc_load(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);	1330	__simd_callee__ inline void asc_load(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);
1256		1331
		1332	+__simd_callee__ inline void asc_load(vector_int4x2_t& dst, __ubuf__ int4b_t* src);
		1333	+
1257	__simd_callee__ inline void asc_loadalign(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset);	1334	__simd_callee__ inline void asc_loadalign(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset);
1258		1335
1259	__simd_callee__ inline void asc_loadalign(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);	1336	__simd_callee__ inline void asc_loadalign(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);
1260		1337
		1338	+__simd_callee__ inline void asc_loadalign(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset);
		1339	+
1261	__simd_callee__ inline void asc_loadalign(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);	1340	__simd_callee__ inline void asc_loadalign(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);
1262		1341
1263	__simd_callee__ inline void asc_loadalign(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);	1342	__simd_callee__ inline void asc_loadalign(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);
	@@ -1290,6 +1369,8 @@ __simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e1m2_t& dst, __ubuf__
1290		1369
1291	__simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);	1370	__simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);
1292		1371
		1372	+__simd_callee__ inline void asc_loadalign_brc(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset);
		1373	+
1293	__simd_callee__ inline void asc_loadalign_brc(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);	1374	__simd_callee__ inline void asc_loadalign_brc(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);
1294		1375
1295	__simd_callee__ inline void asc_loadalign_brc(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);	1376	__simd_callee__ inline void asc_loadalign_brc(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);
	@@ -1322,6 +1403,8 @@ __simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e1m2_t& dst, __u
1322		1403
1323	__simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);	1404	__simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);
1324		1405
		1406	+__simd_callee__ inline void asc_loadalign_upsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset);
		1407	+
1325	__simd_callee__ inline void asc_loadalign_upsample(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);	1408	__simd_callee__ inline void asc_loadalign_upsample(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);
1326		1409
1327	__simd_callee__ inline void asc_loadalign_upsample(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);	1410	__simd_callee__ inline void asc_loadalign_upsample(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);
	@@ -1346,6 +1429,8 @@ __simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e1m2_t& dst, _
1346		1429
1347	__simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);	1430	__simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);
1348		1431
		1432	+__simd_callee__ inline void asc_loadalign_downsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset);
		1433	+
1349	__simd_callee__ inline void asc_loadalign_downsample(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);	1434	__simd_callee__ inline void asc_loadalign_downsample(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);
1350		1435
1351	__simd_callee__ inline void asc_loadalign_downsample(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);	1436	__simd_callee__ inline void asc_loadalign_downsample(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);
	@@ -1370,6 +1455,8 @@ __simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e1m2_t& dst0, vec
1370		1455
1371	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e2m1_t& dst0, vector_fp4x2_e2m1_t& dst1, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);	1456	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e2m1_t& dst0, vector_fp4x2_e2m1_t& dst1, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);
1372		1457
		1458	+__simd_callee__ inline void asc_loadalign_deintlv(vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t* src, iter_reg offset);
		1459	+
1373	__simd_callee__ inline void asc_loadalign_deintlv(vector_uint8_t& dst0, vector_uint8_t& dst1, __ubuf__ uint8_t* src, iter_reg offset);	1460	__simd_callee__ inline void asc_loadalign_deintlv(vector_uint8_t& dst0, vector_uint8_t& dst1, __ubuf__ uint8_t* src, iter_reg offset);
1374		1461
1375	__simd_callee__ inline void asc_loadalign_deintlv(vector_int8_t& dst0, vector_int8_t& dst1, __ubuf__ int8_t* src, iter_reg offset);	1462	__simd_callee__ inline void asc_loadalign_deintlv(vector_int8_t& dst0, vector_int8_t& dst1, __ubuf__ int8_t* src, iter_reg offset);
	@@ -1400,6 +1487,8 @@ __simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e1m2_t& dst, __ubu
1400		1487
1401	__simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);	1488	__simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);
1402		1489
		1490	+__simd_callee__ inline void asc_loadalign_unpack(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset);
		1491	+
1403	__simd_callee__ inline void asc_loadalign_unpack(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);	1492	__simd_callee__ inline void asc_loadalign_unpack(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);
1404		1493
1405	__simd_callee__ inline void asc_loadalign_unpack(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);	1494	__simd_callee__ inline void asc_loadalign_unpack(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);
	@@ -1430,6 +1519,8 @@ __simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e1m2_t& dst, __
1430		1519
1431	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);	1520	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);
1432		1521
		1522	+__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset);
		1523	+
1433	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);	1524	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);
1434		1525
1435	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);	1526	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);
	@@ -1446,6 +1537,8 @@ __simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e1m2_t& dst, __ubu
1446		1537
1447	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);	1538	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset);
1448		1539
		1540	+__simd_callee__ inline void asc_loadalign_brc_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset);
		1541	+
1449	__simd_callee__ inline void asc_loadalign_brc_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);	1542	__simd_callee__ inline void asc_loadalign_brc_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src, iter_reg offset);
1450		1543
1451	__simd_callee__ inline void asc_loadalign_brc_v2(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);	1544	__simd_callee__ inline void asc_loadalign_brc_v2(vector_int8_t& dst, __ubuf__ int8_t* src, iter_reg offset);

Mtests/api/c_api/npu_arch_3510/utils/test_loadalign_postupdate_vlds_instr_utils.h+55-0

	@@ -70,6 +70,33 @@ TEST_F(TestVectorDatamove##class_name##dst_type##src_type##CApi, c_api_name##_##
70	GlobalMockObject::verify(); \	70	GlobalMockObject::verify(); \
71	} \	71	} \
72		72
		73	+#define TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR_INT4(class_name, c_api_name, cce_name, dst_type, src_type) \
		74	+ \
		75	+class TestVectorDatamove##class_name##dst_type##src_type##CApi : public testing::Test { \
		76	+protected: \
		77	+ void SetUp() {} \
		78	+ void TearDown() {} \
		79	+}; \
		80	+ \
		81	+namespace { \
		82	+void c_api_name##_##dst_type##_##src_type##_Stub(vector_fp4x2_e1m2_t &dst, __ubuf__ float4_e1m2x2_t *&src, \
		83	+ int32_t offset, int load_dist, int post) {} \
		84	+} \
		85	+ \
		86	+TEST_F(TestVectorDatamove##class_name##dst_type##src_type##CApi, c_api_name##_##dst_type##_##src_type##_Succ) \
		87	+{ \
		88	+ dst_type dst; \
		89	+ __ubuf__ src_type *src; \
		90	+ int32_t offset; \
		91	+ \
		92	+ MOCKER_CPP(cce_name, void(vector_fp4x2_e1m2_t &, __ubuf__ float4_e1m2x2_t *&, int32_t, int, int)) \
		93	+ .times(1) \
		94	+ .will(invoke(c_api_name##_##dst_type##_##src_type##_Stub)); \
		95	+ \
		96	+ c_api_name(dst, src, offset); \
		97	+ GlobalMockObject::verify(); \
		98	+} \
		99	+
73	#define TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR(class_name, c_api_name, cce_name, dst_type, src_type) \	100	#define TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR(class_name, c_api_name, cce_name, dst_type, src_type) \
74	\	101	\
75	class TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi : public testing::Test { \	102	class TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi : public testing::Test { \
	@@ -126,4 +153,32 @@ TEST_F(TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi, c_api
126	GlobalMockObject::verify(); \	153	GlobalMockObject::verify(); \
127	} \	154	} \
128		155
		156	+#define TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR_INT4(class_name, c_api_name, cce_name, dst_type, src_type) \
		157	+ \
		158	+class TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi : public testing::Test { \
		159	+protected: \
		160	+ void SetUp() {} \
		161	+ void TearDown() {} \
		162	+}; \
		163	+ \
		164	+namespace { \
		165	+void c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub(vector_fp4x2_e1m2_t &dst0, vector_fp4x2_e1m2_t &dst1, \
		166	+ __ubuf__ float4_e1m2x2_t *&src, int32_t offset, int load_dist, int post) {} \
		167	+} \
		168	+ \
		169	+TEST_F(TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi, c_api_name##_##dst_type##_##src_type##_Succ) \
		170	+{ \
		171	+ dst_type dst0; \
		172	+ dst_type dst1; \
		173	+ __ubuf__ src_type *src; \
		174	+ int32_t offset; \
		175	+ \
		176	+ MOCKER_CPP(cce_name, void(vector_fp4x2_e1m2_t &, vector_fp4x2_e1m2_t &, __ubuf__ float4_e1m2x2_t *&, int32_t, int, int)) \
		177	+ .times(1) \
		178	+ .will(invoke(c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub)); \
		179	+ \
		180	+ c_api_name(dst0, dst1, src, offset); \
		181	+ GlobalMockObject::verify(); \
		182	+} \
		183	+
129	#endif	184	#endif

Mtests/api/c_api/npu_arch_3510/utils/test_loadalign_vlds_instr_utils.h+68-0

	@@ -153,4 +153,72 @@ TEST_F(TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi, c_api
153	GlobalMockObject::verify(); \	153	GlobalMockObject::verify(); \
154	} \	154	} \
155		155
		156	+#define TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_INT4(class_name, c_api_name, cce_name, dst_type, src_type) \
		157	+ \
		158	+class TestVectorDatamove##class_name##dst_type##src_type##CApi : public testing::Test { \
		159	+protected: \
		160	+ void SetUp() {} \
		161	+ void TearDown() {} \
		162	+}; \
		163	+ \
		164	+namespace { \
		165	+void c_api_name##_##dst_type##_##src_type##_Stub(vector_fp4x2_e1m2_t &dst, __ubuf__ float4_e1m2x2_t *src, \
		166	+ int32_t offset, Literal load_dist) {} \
		167	+} \
		168	+ \
		169	+TEST_F(TestVectorDatamove##class_name##dst_type##src_type##CApi, c_api_name##_##dst_type##_##src_type##_Succ) \
		170	+{ \
		171	+ dst_type dst; \
		172	+ __ubuf__ src_type *src; \
		173	+ \
		174	+ MOCKER_CPP(cce_name, void(vector_fp4x2_e1m2_t &, __ubuf__ float4_e1m2x2_t *, int32_t, Literal)) \
		175	+ .times(1) \
		176	+ .will(invoke(c_api_name##_##dst_type##_##src_type##_Stub)); \
		177	+ \
		178	+ c_api_name(dst, src); \
		179	+ GlobalMockObject::verify(); \
		180	+} \
		181	+ \
		182	+TEST_F(TestVectorDatamove##class_name##dst_type##src_type##CApi, c_api_name##_##dst_type##_##src_type##_offset_Succ) \
		183	+{ \
		184	+ dst_type dst; \
		185	+ __ubuf__ src_type *src; \
		186	+ int32_t offset; \
		187	+ \
		188	+ MOCKER_CPP(cce_name, void(vector_fp4x2_e1m2_t &, __ubuf__ float4_e1m2x2_t *, int32_t, Literal)) \
		189	+ .times(1) \
		190	+ .will(invoke(c_api_name##_##dst_type##_##src_type##_Stub)); \
		191	+ \
		192	+ c_api_name(dst, src, offset); \
		193	+ GlobalMockObject::verify(); \
		194	+} \
		195	+
		196	+#define TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR_INT4(class_name, c_api_name, cce_name, dst_type, src_type) \
		197	+ \
		198	+class TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi : public testing::Test { \
		199	+protected: \
		200	+ void SetUp() {} \
		201	+ void TearDown() {} \
		202	+}; \
		203	+ \
		204	+namespace { \
		205	+void c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub(vector_fp4x2_e1m2_t &dst0, vector_fp4x2_e1m2_t &dst1, \
		206	+ __ubuf__ float4_e1m2x2_t *src, int32_t offset, int load_dist) {} \
		207	+} \
		208	+ \
		209	+TEST_F(TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi, c_api_name##_##dst_type##_##src_type##_Succ) \
		210	+{ \
		211	+ dst_type dst0; \
		212	+ dst_type dst1; \
		213	+ __ubuf__ src_type *src; \
		214	+ int32_t offset; \
		215	+ \
		216	+ MOCKER_CPP(cce_name, void(vector_fp4x2_e1m2_t &, vector_fp4x2_e1m2_t &, __ubuf__ float4_e1m2x2_t *, int32_t, int)) \
		217	+ .times(1) \
		218	+ .will(invoke(c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub)); \
		219	+ \
		220	+ c_api_name(dst0, dst1, src, offset); \
		221	+ GlobalMockObject::verify(); \
		222	+} \
		223	+
156	#endif	224	#endif

Mtests/api/c_api/npu_arch_3510/vector_datamove/test_asc_gather_datablock.cpp+39-37

Mtests/api/c_api/npu_arch_3510/vector_datamove/test_asc_load.cpp+19-18

Mtests/api/c_api/npu_arch_3510/vector_datamove/test_asc_load_align_v2.cpp+3-1

	@@ -55,6 +55,7 @@ TEST_VECTOR_COMPUTE_LOADALIGNV2(vector_fp4x2_e1m2_t, fp4x2_e1m2_t, vector_fp4x2_
55	TEST_VECTOR_COMPUTE_LOADALIGNV2(vector_fp4x2_e2m1_t, fp4x2_e2m1_t, vector_fp4x2_e2m1_t, fp4x2_e2m1_t);	55	TEST_VECTOR_COMPUTE_LOADALIGNV2(vector_fp4x2_e2m1_t, fp4x2_e2m1_t, vector_fp4x2_e2m1_t, fp4x2_e2m1_t);
56	TEST_VECTOR_COMPUTE_LOADALIGNV2(vector_half, half, vector_half, half);	56	TEST_VECTOR_COMPUTE_LOADALIGNV2(vector_half, half, vector_half, half);
57	TEST_VECTOR_COMPUTE_LOADALIGNV2(vector_float, float, vector_float, float);	57	TEST_VECTOR_COMPUTE_LOADALIGNV2(vector_float, float, vector_float, float);
		58	+TEST_VECTOR_COMPUTE_LOADALIGNV2(vector_int4x2_t, int4b_t, vector_fp4x2_e1m2_t, float4_e1m2x2_t);
58		59
59		60
60	#define TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(dst_type, src_type, cce_dst_type, cce_src_type) \	61	#define TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(dst_type, src_type, cce_dst_type, cce_src_type) \
	@@ -98,4 +99,5 @@ TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(vector_fp8_e8m0_t, fp8_e8m0_t, vector
98	TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(vector_fp4x2_e1m2_t, fp4x2_e1m2_t, vector_fp4x2_e1m2_t, fp4x2_e1m2_t);	99	TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(vector_fp4x2_e1m2_t, fp4x2_e1m2_t, vector_fp4x2_e1m2_t, fp4x2_e1m2_t);
99	TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(vector_fp4x2_e2m1_t, fp4x2_e2m1_t, vector_fp4x2_e2m1_t, fp4x2_e2m1_t);	100	TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(vector_fp4x2_e2m1_t, fp4x2_e2m1_t, vector_fp4x2_e2m1_t, fp4x2_e2m1_t);
100	TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(vector_half, half, vector_half, half);	101	TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(vector_half, half, vector_half, half);
101	-TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(vector_float, float, vector_float, float);	102	+TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(vector_float, float, vector_float, float);
		103	+TEST_VECTOR_COMPUTE_LOADALIGN_POSTUPDATEV2(vector_int4x2_t, int4b_t, vector_fp4x2_e1m2_t, float4_e1m2x2_t);

Mtests/api/c_api/npu_arch_3510/vector_datamove/test_asc_loadalign_instr.cpp+9-1

	@@ -28,6 +28,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignNorm, asc_loadalign, vlds, vector_
28	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignNorm, asc_loadalign, vlds, vector_float, float);	28	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignNorm, asc_loadalign, vlds, vector_float, float);
29	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignNorm, asc_loadalign, vlds, vector_int64_t, int64_t);	29	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignNorm, asc_loadalign, vlds, vector_int64_t, int64_t);
30	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignNorm, asc_loadalign, vlds, vector_uint64_t, uint64_t);	30	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignNorm, asc_loadalign, vlds, vector_uint64_t, uint64_t);
		31	+TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_INT4(LoadAlignNorm, asc_loadalign, vlds, vector_int4x2_t, int4b_t);
31		32
32	// vlds, brc	33	// vlds, brc
33	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrc, asc_loadalign_brc, vlds, vector_int8_t, int8_t);	34	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrc, asc_loadalign_brc, vlds, vector_int8_t, int8_t);
	@@ -45,6 +46,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrc, asc_loadalign_brc, vlds, vect
45	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrc, asc_loadalign_brc, vlds, vector_int32_t, int32_t);	46	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrc, asc_loadalign_brc, vlds, vector_int32_t, int32_t);
46	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrc, asc_loadalign_brc, vlds, vector_uint32_t, uint32_t);	47	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrc, asc_loadalign_brc, vlds, vector_uint32_t, uint32_t);
47	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrc, asc_loadalign_brc, vlds, vector_float, float);	48	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrc, asc_loadalign_brc, vlds, vector_float, float);
		49	+TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_INT4(LoadAlignBrc, asc_loadalign_brc, vlds, vector_int4x2_t, int4b_t);
48		50
49	// vlds, upsample	51	// vlds, upsample
50	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUpsample, asc_loadalign_upsample, vlds, vector_int8_t, int8_t);	52	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUpsample, asc_loadalign_upsample, vlds, vector_int8_t, int8_t);
	@@ -59,6 +61,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUpsample, asc_loadalign_upsample,
59	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUpsample, asc_loadalign_upsample, vlds, vector_uint16_t, uint16_t);	61	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUpsample, asc_loadalign_upsample, vlds, vector_uint16_t, uint16_t);
60	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUpsample, asc_loadalign_upsample, vlds, vector_half, half);	62	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUpsample, asc_loadalign_upsample, vlds, vector_half, half);
61	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUpsample, asc_loadalign_upsample, vlds, vector_bfloat16_t, bfloat16_t);	63	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUpsample, asc_loadalign_upsample, vlds, vector_bfloat16_t, bfloat16_t);
		64	+TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_INT4(LoadAlignUpsample, asc_loadalign_upsample, vlds, vector_int4x2_t, int4b_t);
62		65
63	// vlds, downsample	66	// vlds, downsample
64	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignDownsample, asc_loadalign_downsample, vlds, vector_int8_t, int8_t);	67	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignDownsample, asc_loadalign_downsample, vlds, vector_int8_t, int8_t);
	@@ -73,6 +76,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignDownsample, asc_loadalign_downsamp
73	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignDownsample, asc_loadalign_downsample, vlds, vector_uint16_t, uint16_t);	76	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignDownsample, asc_loadalign_downsample, vlds, vector_uint16_t, uint16_t);
74	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignDownsample, asc_loadalign_downsample, vlds, vector_half, half);	77	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignDownsample, asc_loadalign_downsample, vlds, vector_half, half);
75	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignDownsample, asc_loadalign_downsample, vlds, vector_bfloat16_t, bfloat16_t);	78	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignDownsample, asc_loadalign_downsample, vlds, vector_bfloat16_t, bfloat16_t);
		79	+TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_INT4(LoadAlignDownsample, asc_loadalign_downsample, vlds, vector_int4x2_t, int4b_t);
76		80
77	// vlds, unpack	81	// vlds, unpack
78	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpack, asc_loadalign_unpack, vlds, vector_int8_t, int8_t);	82	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpack, asc_loadalign_unpack, vlds, vector_int8_t, int8_t);
	@@ -90,6 +94,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpack, asc_loadalign_unpack, vlds
90	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpack, asc_loadalign_unpack, vlds, vector_int32_t, int32_t);	94	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpack, asc_loadalign_unpack, vlds, vector_int32_t, int32_t);
91	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpack, asc_loadalign_unpack, vlds, vector_uint32_t, uint32_t);	95	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpack, asc_loadalign_unpack, vlds, vector_uint32_t, uint32_t);
92	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpack, asc_loadalign_unpack, vlds, vector_float, float);	96	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpack, asc_loadalign_unpack, vlds, vector_float, float);
		97	+TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_INT4(LoadAlignUnpack, asc_loadalign_unpack, vlds, vector_int4x2_t, int4b_t);
93		98
94	// vlds, unpack_v2	99	// vlds, unpack_v2
95	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpackV2, asc_loadalign_unpack_v2, vlds, vector_int8_t, int8_t);	100	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpackV2, asc_loadalign_unpack_v2, vlds, vector_int8_t, int8_t);
	@@ -100,6 +105,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpackV2, asc_loadalign_unpack_v2,
100	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpackV2, asc_loadalign_unpack_v2, vlds, vector_fp8_e5m2_t, fp8_e5m2_t);	105	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpackV2, asc_loadalign_unpack_v2, vlds, vector_fp8_e5m2_t, fp8_e5m2_t);
101	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpackV2, asc_loadalign_unpack_v2, vlds, vector_fp8_e4m3fn_t, fp8_e4m3fn_t);	106	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignUnpackV2, asc_loadalign_unpack_v2, vlds, vector_fp8_e4m3fn_t, fp8_e4m3fn_t);
102	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_HIF8(LoadAlignUnpackV2, asc_loadalign_unpack_v2, vlds, vector_hifloat8_t, hifloat8_t);	107	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_HIF8(LoadAlignUnpackV2, asc_loadalign_unpack_v2, vlds, vector_hifloat8_t, hifloat8_t);
		108	+TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_INT4(LoadAlignUnpackV2, asc_loadalign_unpack_v2, vlds, vector_int4x2_t, int4b_t);
103		109
104	// vlds, brc_v2	110	// vlds, brc_v2
105	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrcV2, asc_loadalign_brc_v2, vlds, vector_int8_t, int8_t);	111	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrcV2, asc_loadalign_brc_v2, vlds, vector_int8_t, int8_t);
	@@ -117,6 +123,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrcV2, asc_loadalign_brc_v2, vlds,
117	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrcV2, asc_loadalign_brc_v2, vlds, vector_int32_t, int32_t);	123	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrcV2, asc_loadalign_brc_v2, vlds, vector_int32_t, int32_t);
118	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrcV2, asc_loadalign_brc_v2, vlds, vector_uint32_t, uint32_t);	124	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrcV2, asc_loadalign_brc_v2, vlds, vector_uint32_t, uint32_t);
119	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrcV2, asc_loadalign_brc_v2, vlds, vector_float, float);	125	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrcV2, asc_loadalign_brc_v2, vlds, vector_float, float);
		126	+TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_INT4(LoadAlignBrcV2, asc_loadalign_brc_v2, vlds, vector_int4x2_t, int4b_t);
120		127
121	// vlds, brc_v3	128	// vlds, brc_v3
122	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrcV3, asc_loadalign_brc_v3, vlds, vector_int16_t, int16_t);	129	TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(LoadAlignBrcV3, asc_loadalign_brc_v3, vlds, vector_int16_t, int16_t);
	@@ -142,4 +149,5 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR(LoadAlignDeintlv, asc_loadalign_dei
142	TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR(LoadAlignDeintlv, asc_loadalign_deintlv, vlds, vector_bfloat16_t, bfloat16_t);	149	TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR(LoadAlignDeintlv, asc_loadalign_deintlv, vlds, vector_bfloat16_t, bfloat16_t);
143	TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR(LoadAlignDeintlv, asc_loadalign_deintlv, vlds, vector_int32_t, int32_t);	150	TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR(LoadAlignDeintlv, asc_loadalign_deintlv, vlds, vector_int32_t, int32_t);
144	TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR(LoadAlignDeintlv, asc_loadalign_deintlv, vlds, vector_uint32_t, uint32_t);	151	TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR(LoadAlignDeintlv, asc_loadalign_deintlv, vlds, vector_uint32_t, uint32_t);
145	-TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR(LoadAlignDeintlv, asc_loadalign_deintlv, vlds, vector_float, float);	152	+TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR(LoadAlignDeintlv, asc_loadalign_deintlv, vlds, vector_float, float);
		153	+TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR_INT4(LoadAlignDeintlv, asc_loadalign_deintlv, vlds, vector_int4x2_t, int4b_t);

Mtests/api/c_api/npu_arch_3510/vector_datamove/test_asc_loadalign_postupdate_instr.cpp+9-1

	@@ -28,6 +28,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateNorm, asc_loa
28	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateNorm, asc_loadalign_postupdate, vlds, vector_float, float);	28	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateNorm, asc_loadalign_postupdate, vlds, vector_float, float);
29	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateNorm, asc_loadalign_postupdate, vlds, vector_int64_t, int64_t);	29	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateNorm, asc_loadalign_postupdate, vlds, vector_int64_t, int64_t);
30	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateNorm, asc_loadalign_postupdate, vlds, vector_uint64_t, uint64_t);	30	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateNorm, asc_loadalign_postupdate, vlds, vector_uint64_t, uint64_t);
		31	+TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR_INT4(LoadAlignPostupdateNorm, asc_loadalign_postupdate, vlds, vector_int4x2_t, int4b_t);
31		32
32	// vlds, brc	33	// vlds, brc
33	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrc, asc_loadalign_brc_postupdate, vlds, vector_int8_t, int8_t);	34	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrc, asc_loadalign_brc_postupdate, vlds, vector_int8_t, int8_t);
	@@ -45,6 +46,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrc, asc_load
45	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrc, asc_loadalign_brc_postupdate, vlds, vector_int32_t, int32_t);	46	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrc, asc_loadalign_brc_postupdate, vlds, vector_int32_t, int32_t);
46	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrc, asc_loadalign_brc_postupdate, vlds, vector_uint32_t, uint32_t);	47	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrc, asc_loadalign_brc_postupdate, vlds, vector_uint32_t, uint32_t);
47	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrc, asc_loadalign_brc_postupdate, vlds, vector_float, float);	48	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrc, asc_loadalign_brc_postupdate, vlds, vector_float, float);
		49	+TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR_INT4(LoadAlignPostupdateBrc, asc_loadalign_brc_postupdate, vlds, vector_int4x2_t, int4b_t);
48		50
49	// vlds, upsample	51	// vlds, upsample
50	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUpsample, asc_loadalign_upsample_postupdate, vlds, vector_int8_t, int8_t);	52	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUpsample, asc_loadalign_upsample_postupdate, vlds, vector_int8_t, int8_t);
	@@ -59,6 +61,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUpsample, asc
59	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUpsample, asc_loadalign_upsample_postupdate, vlds, vector_uint16_t, uint16_t);	61	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUpsample, asc_loadalign_upsample_postupdate, vlds, vector_uint16_t, uint16_t);
60	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUpsample, asc_loadalign_upsample_postupdate, vlds, vector_half, half);	62	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUpsample, asc_loadalign_upsample_postupdate, vlds, vector_half, half);
61	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUpsample, asc_loadalign_upsample_postupdate, vlds, vector_bfloat16_t, bfloat16_t);	63	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUpsample, asc_loadalign_upsample_postupdate, vlds, vector_bfloat16_t, bfloat16_t);
		64	+TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR_INT4(LoadAlignPostupdateUpsample, asc_loadalign_upsample_postupdate, vlds, vector_int4x2_t, int4b_t);
62		65
63	// vlds, downsample	66	// vlds, downsample
64	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateDownsample, asc_loadalign_downsample_postupdate, vlds, vector_int8_t, int8_t);	67	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateDownsample, asc_loadalign_downsample_postupdate, vlds, vector_int8_t, int8_t);
	@@ -73,6 +76,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateDownsample, a
73	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateDownsample, asc_loadalign_downsample_postupdate, vlds, vector_uint16_t, uint16_t);	76	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateDownsample, asc_loadalign_downsample_postupdate, vlds, vector_uint16_t, uint16_t);
74	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateDownsample, asc_loadalign_downsample_postupdate, vlds, vector_half, half);	77	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateDownsample, asc_loadalign_downsample_postupdate, vlds, vector_half, half);
75	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateDownsample, asc_loadalign_downsample_postupdate, vlds, vector_bfloat16_t, bfloat16_t);	78	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateDownsample, asc_loadalign_downsample_postupdate, vlds, vector_bfloat16_t, bfloat16_t);
		79	+TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR_INT4(LoadAlignPostupdateDownsample, asc_loadalign_downsample_postupdate, vlds, vector_int4x2_t, int4b_t);
76		80
77	// vlds, unpack	81	// vlds, unpack
78	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpack, asc_loadalign_unpack_postupdate, vlds, vector_int8_t, int8_t);	82	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpack, asc_loadalign_unpack_postupdate, vlds, vector_int8_t, int8_t);
	@@ -90,6 +94,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpack, asc_l
90	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpack, asc_loadalign_unpack_postupdate, vlds, vector_int32_t, int32_t);	94	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpack, asc_loadalign_unpack_postupdate, vlds, vector_int32_t, int32_t);
91	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpack, asc_loadalign_unpack_postupdate, vlds, vector_uint32_t, uint32_t);	95	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpack, asc_loadalign_unpack_postupdate, vlds, vector_uint32_t, uint32_t);
92	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpack, asc_loadalign_unpack_postupdate, vlds, vector_float, float);	96	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpack, asc_loadalign_unpack_postupdate, vlds, vector_float, float);
		97	+TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR_INT4(LoadAlignPostupdateUnpack, asc_loadalign_unpack_postupdate, vlds, vector_int4x2_t, int4b_t);
93		98
94	// vlds, unpack_v2	99	// vlds, unpack_v2
95	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpackV2, asc_loadalign_unpack_postupdate_v2, vlds, vector_int8_t, int8_t);	100	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpackV2, asc_loadalign_unpack_postupdate_v2, vlds, vector_int8_t, int8_t);
	@@ -100,6 +105,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpackV2, asc
100	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpackV2, asc_loadalign_unpack_postupdate_v2, vlds, vector_fp8_e5m2_t, fp8_e5m2_t);	105	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpackV2, asc_loadalign_unpack_postupdate_v2, vlds, vector_fp8_e5m2_t, fp8_e5m2_t);
101	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpackV2, asc_loadalign_unpack_postupdate_v2, vlds, vector_fp8_e4m3fn_t, fp8_e4m3fn_t);	106	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateUnpackV2, asc_loadalign_unpack_postupdate_v2, vlds, vector_fp8_e4m3fn_t, fp8_e4m3fn_t);
102	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR_HIF8(LoadAlignPostupdateUnpackV2, asc_loadalign_unpack_postupdate_v2, vlds, vector_hifloat8_t, hifloat8_t);	107	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR_HIF8(LoadAlignPostupdateUnpackV2, asc_loadalign_unpack_postupdate_v2, vlds, vector_hifloat8_t, hifloat8_t);
		108	+TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR_INT4(LoadAlignPostupdateUnpackV2, asc_loadalign_unpack_postupdate_v2, vlds, vector_int4x2_t, int4b_t);
103		109
104	// vlds, brc_v2	110	// vlds, brc_v2
105	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrcV2, asc_loadalign_brc_postupdate_v2, vlds, vector_int8_t, int8_t);	111	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrcV2, asc_loadalign_brc_postupdate_v2, vlds, vector_int8_t, int8_t);
	@@ -117,6 +123,7 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrcV2, asc_lo
117	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrcV2, asc_loadalign_brc_postupdate_v2, vlds, vector_int32_t, int32_t);	123	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrcV2, asc_loadalign_brc_postupdate_v2, vlds, vector_int32_t, int32_t);
118	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrcV2, asc_loadalign_brc_postupdate_v2, vlds, vector_uint32_t, uint32_t);	124	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrcV2, asc_loadalign_brc_postupdate_v2, vlds, vector_uint32_t, uint32_t);
119	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrcV2, asc_loadalign_brc_postupdate_v2, vlds, vector_float, float);	125	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrcV2, asc_loadalign_brc_postupdate_v2, vlds, vector_float, float);
		126	+TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR_INT4(LoadAlignPostupdateBrcV2, asc_loadalign_brc_postupdate_v2, vlds, vector_int4x2_t, int4b_t);
120		127
121	// vlds, brc_v3	128	// vlds, brc_v3
122	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrcV3, asc_loadalign_brc_postupdate_v3, vlds, vector_int16_t, int16_t);	129	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_INSTR(LoadAlignPostupdateBrcV3, asc_loadalign_brc_postupdate_v3, vlds, vector_int16_t, int16_t);
	@@ -142,4 +149,5 @@ TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR(LoadAlignPostupdateDeint
142	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR(LoadAlignPostupdateDeintlv, asc_loadalign_deintlv_postupdate, vlds, vector_bfloat16_t, bfloat16_t);	149	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR(LoadAlignPostupdateDeintlv, asc_loadalign_deintlv_postupdate, vlds, vector_bfloat16_t, bfloat16_t);
143	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR(LoadAlignPostupdateDeintlv, asc_loadalign_deintlv_postupdate, vlds, vector_int32_t, int32_t);	150	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR(LoadAlignPostupdateDeintlv, asc_loadalign_deintlv_postupdate, vlds, vector_int32_t, int32_t);
144	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR(LoadAlignPostupdateDeintlv, asc_loadalign_deintlv_postupdate, vlds, vector_uint32_t, uint32_t);	151	TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR(LoadAlignPostupdateDeintlv, asc_loadalign_deintlv_postupdate, vlds, vector_uint32_t, uint32_t);
145	-TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR(LoadAlignPostupdateDeintlv, asc_loadalign_deintlv_postupdate, vlds, vector_float, float);	152	+TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR(LoadAlignPostupdateDeintlv, asc_loadalign_deintlv_postupdate, vlds, vector_float, float);
		153	+TEST_VECTOR_DATAMOVE_LOADALIGN_POSTUPDATE_DEINTLV_INSTR_INT4(LoadAlignPostupdateDeintlv, asc_loadalign_deintlv_postupdate, vlds, vector_int4x2_t, int4b_t);

Mtests/api/c_api/npu_arch_3510/vector_datamove/test_asc_loadalign_vld.cpp+321-261

	@@ -1,262 +1,322 @@
1	-/**	1	+/**
2	-* Copyright (c) 2025 Huawei Technologies Co., Ltd.	2	+* Copyright (c) 2025 Huawei Technologies Co., Ltd.
3	-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of	3	+* This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4	-* CANN Open Software License Agreement Version 2.0 (the "License").	4	+* CANN Open Software License Agreement Version 2.0 (the "License").
5	-* Please refer to the License for details. You may not use this file except in compliance with the License.	5	+* Please refer to the License for details. You may not use this file except in compliance with the License.
6	-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,	6	+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7	-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.	7	+* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8	-* See LICENSE in the root of the software repository for the full text of the License.	8	+* See LICENSE in the root of the software repository for the full text of the License.
9	-*/	9	+*/
10	-	10	+
11	-#include <gtest/gtest.h>	11	+#include <gtest/gtest.h>
12	-#include <mockcpp/mockcpp.hpp>	12	+#include <mockcpp/mockcpp.hpp>
13	-#include "tests/api/c_api/stub/cce_stub.h"	13	+#include "tests/api/c_api/stub/cce_stub.h"
14	-#include "include/c_api/asc_simd.h"	14	+#include "include/c_api/asc_simd.h"
15	-	15	+
16	-#define TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(class_name, c_api_name, cce_name, dst_type, src_type) \	16	+#define TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR(class_name, c_api_name, cce_name, dst_type, src_type) \
17	- \	17	+ \
18	-class TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi : public testing::Test { \	18	+class TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi : public testing::Test { \
19	-protected: \	19	+protected: \
20	- void SetUp() {} \	20	+ void SetUp() {} \
21	- void TearDown() {} \	21	+ void TearDown() {} \
22	-}; \	22	+}; \
23	- \	23	+ \
24	-namespace { \	24	+namespace { \
25	-void c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub(dst_type &dst, \	25	+void c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub(dst_type &dst, \
26	- __ubuf__ src_type *src, iter_reg offset, Literal load_dist) {} \	26	+ __ubuf__ src_type *src, iter_reg offset, Literal load_dist) {} \
27	-} \	27	+} \
28	- \	28	+ \
29	-TEST_F(TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi, c_api_name##_##dst_type##_##src_type##_Succ) \	29	+TEST_F(TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi, c_api_name##_##dst_type##_##src_type##_Succ) \
30	-{ \	30	+{ \
31	- dst_type dst; \	31	+ dst_type dst; \
32	- __ubuf__ src_type *src; \	32	+ __ubuf__ src_type *src; \
33	- iter_reg offset; \	33	+ iter_reg offset; \
34	- \	34	+ \
35	- MOCKER_CPP(cce_name, void(dst_type &, __ubuf__ src_type *, iter_reg, Literal)) \	35	+ MOCKER_CPP(cce_name, void(dst_type &, __ubuf__ src_type *, iter_reg, Literal)) \
36	- .times(1) \	36	+ .times(1) \
37	- .will(invoke(c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub)); \	37	+ .will(invoke(c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub)); \
38	- \	38	+ \
39	- c_api_name(dst, src, offset); \	39	+ c_api_name(dst, src, offset); \
40	- GlobalMockObject::verify(); \	40	+ GlobalMockObject::verify(); \
41	-}	41	+}
42	-	42	+
43	-#define TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_HIF8(class_name, c_api_name, cce_name, dst_type, src_type) \	43	+#define TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_HIF8(class_name, c_api_name, cce_name, dst_type, src_type) \
44	- \	44	+ \
45	-class TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi : public testing::Test { \	45	+class TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi : public testing::Test { \
46	-protected: \	46	+protected: \
47	- void SetUp() {} \	47	+ void SetUp() {} \
48	- void TearDown() {} \	48	+ void TearDown() {} \
49	-}; \	49	+}; \
50	- \	50	+ \
51	-namespace { \	51	+namespace { \
52	-void c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub(vector_uint8_t &dst, \	52	+void c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub(vector_uint8_t &dst, \
53	- __ubuf__ uint8_t *src, iter_reg offset, Literal load_dist) {} \	53	+ __ubuf__ uint8_t *src, iter_reg offset, Literal load_dist) {} \
54	-} \	54	+} \
55	- \	55	+ \
56	-TEST_F(TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi, c_api_name##_##dst_type##_##src_type##_Succ) \	56	+TEST_F(TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi, c_api_name##_##dst_type##_##src_type##_Succ) \
57	-{ \	57	+{ \
58	- dst_type dst; \	58	+ dst_type dst; \
59	- __ubuf__ src_type *src; \	59	+ __ubuf__ src_type *src; \
60	- iter_reg offset; \	60	+ iter_reg offset; \
61	- \	61	+ \
62	- MOCKER_CPP(cce_name, void(vector_uint8_t &, __ubuf__ uint8_t *, iter_reg, Literal)) \	62	+ MOCKER_CPP(cce_name, void(vector_uint8_t &, __ubuf__ uint8_t *, iter_reg, Literal)) \
63	- .times(1) \	63	+ .times(1) \
64	- .will(invoke(c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub)); \	64	+ .will(invoke(c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub)); \
65	- \	65	+ \
66	- c_api_name(dst, src, offset); \	66	+ c_api_name(dst, src, offset); \
67	- GlobalMockObject::verify(); \	67	+ GlobalMockObject::verify(); \
68	-} \	68	+} \
69	-	69	+
70	-	70	+#define TEST_VECTOR_DATAMOVE_LOADALIGN_INSTR_INT4(class_name, c_api_name, cce_name, dst_type, src_type) \
71	-#define TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR(class_name, c_api_name, cce_name, dst_type, src_type) \	71	+ \
72	- \	72	+class TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi : public testing::Test { \
73	-class TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi : public testing::Test { \	73	+protected: \
74	-protected: \	74	+ void SetUp() {} \
75	- void SetUp() {} \	75	+ void TearDown() {} \
76	- void TearDown() {} \	76	+}; \
77	-}; \	77	+ \
78	- \	78	+namespace { \
79	-namespace { \	79	+void c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub(vector_fp4x2_e1m2_t &dst, \
80	-void c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub(dst_type &dst0, dst_type &dst1, \	80	+ __ubuf__ float4_e1m2x2_t *src, iter_reg offset, Literal load_dist) {} \
81	- __ubuf__ src_type *src, iter_reg offset, Literal load_dist) {} \	81	+} \
82	-} \	82	+ \
83	- \	83	+TEST_F(TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi, c_api_name##_##dst_type##_##src_type##_Succ) \
84	-TEST_F(TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi, c_api_name##_##dst_type##_##src_type##_Succ) \	84	+{ \
85	-{ \	85	+ dst_type dst; \
86	- dst_type dst0; \	86	+ __ubuf__ src_type *src; \
87	- dst_type dst1; \	87	+ iter_reg offset; \
88	- __ubuf__ src_type *src; \	88	+ \
89	- iter_reg offset; \	89	+ MOCKER_CPP(cce_name, void(vector_fp4x2_e1m2_t &, __ubuf__ float4_e1m2x2_t *, iter_reg, Literal)) \
90	- \	90	+ .times(1) \
91	- MOCKER_CPP(cce_name, void(dst_type &, dst_type &, __ubuf__ src_type *, iter_reg, Literal)) \	91	+ .will(invoke(c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub)); \
92	- .times(1) \	92	+ \
93	- .will(invoke(c_api_name##_##dst_type##_##dst_type##_##src_type##_Stub)); \	93	+ c_api_name(dst, src, offset); \
94	- \	94	+ GlobalMockObject::verify(); \
95	- c_api_name(dst0, dst1, src, offset); \	95	+} \
96	- GlobalMockObject::verify(); \	96	+
97	-} \	97	+#define TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR(class_name, c_api_name, cce_name, dst_type, src_type) \
98	-	98	+ \
99	-#define TEST_VECTOR_DATAMOVE_LOADALIGN_DEINTLV_INSTR_HIF8(class_name, c_api_name, cce_name, dst_type, src_type) \	99	+class TestVectorDatamove##class_name##dst_type##dst_type##src_type##CApi : public testing::Test { \
100	- \	100	+protected: \

Mtests/api/c_api/npu_arch_3510/vector_datamove/test_asc_loadunalign.cpp+28-1

	@@ -65,6 +65,32 @@ TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_
65	GlobalMockObject::verify(); \	65	GlobalMockObject::verify(); \
66	} \	66	} \
67		67
		68	+#define TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR_INT4(class_name, c_api_name, cce_name, data_type) \
		69	+ \
		70	+class TestVectorDataMove##class_name##_##data_type##_CApi : public testing::Test { \
		71	+protected: \
		72	+ void SetUp() {} \
		73	+ void TearDown() {} \
		74	+}; \
		75	+ \
		76	+namespace { \
		77	+void cce_name##_##data_type##_Stub0(vector_fp4x2_e1m2_t& dst, vector_load_unalign& src0, __ubuf__ float4_e1m2x2_t *src1) {} \
		78	+} \
		79	+ \
		80	+TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_type##_Succ) \
		81	+{ \
		82	+ __ubuf__ data_type src1 = reinterpret_cast<__ubuf__ data_type >(0); \
		83	+ vector_store_unalign src0; \
		84	+ vector_int4x2_t dst; \
		85	+ \
		86	+ MOCKER_CPP(cce_name, void(vector_fp4x2_e1m2_t&, vector_store_unalign&, __ubuf__ float4_e1m2x2_t *)) \
		87	+ .times(1) \
		88	+ .will(invoke(cce_name##_##data_type##_Stub0)); \
		89	+ \
		90	+ c_api_name(dst, src0, src1); \
		91	+ GlobalMockObject::verify(); \
		92	+} \
		93	+
68	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, int8_t);	94	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, int8_t);
69	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, uint8_t);	95	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, uint8_t);
70	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, int16_t);	96	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, int16_t);
	@@ -80,4 +106,5 @@ TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR_HIF8(Vldus0, asc_loadunalign, vldus, hifl
80	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, fp8_e5m2_t);	106	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, fp8_e5m2_t);
81	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, fp8_e8m0_t);	107	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, fp8_e8m0_t);
82	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, fp4x2_e2m1_t);	108	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, fp4x2_e2m1_t);
83	-TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, fp4x2_e1m2_t);	109	+TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(Vldus0, asc_loadunalign, vldus, fp4x2_e1m2_t);
		110	+TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR_INT4(Vldus0, asc_loadunalign, vldus, int4b_t);

Mtests/api/c_api/npu_arch_3510/vector_datamove/test_asc_loadunalign_postupdate.cpp+60-1

	@@ -69,6 +69,34 @@ TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_
69	GlobalMockObject::verify(); \	69	GlobalMockObject::verify(); \
70	} \	70	} \
71		71
		72	+#define TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR_INT4(class_name, c_api_name, cce_name, data_type) \
		73	+ \
		74	+class TestVectorDataMove##class_name##_##data_type##_CApi : public testing::Test { \
		75	+protected: \
		76	+ void SetUp() {} \
		77	+ void TearDown() {} \
		78	+}; \
		79	+ \
		80	+namespace { \
		81	+void cce_name##_##data_type##_Stub(vector_fp4x2_e1m2_t& dst, vector_load_unalign& src0, \
		82	+ __ubuf__ float4_e1m2x2_t *&src1, uint32_t inc, Literal post) {} \
		83	+} \
		84	+ \
		85	+TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_type##_Succ) \
		86	+{ \
		87	+ __ubuf__ data_type src1 = reinterpret_cast<__ubuf__ data_type >(0); \
		88	+ vector_load_unalign src0; \
		89	+ vector_int4x2_t dst; \
		90	+ uint32_t count; \
		91	+ \
		92	+ MOCKER_CPP(cce_name, void(vector_fp4x2_e1m2_t&, vector_load_unalign&, __ubuf__ float4_e1m2x2_t *&, uint32_t, Literal)) \
		93	+ .times(1) \
		94	+ .will(invoke(cce_name##_##data_type##_Stub)); \
		95	+ \
		96	+ c_api_name(dst, src0, src1, count); \
		97	+ GlobalMockObject::verify(); \
		98	+} \
		99	+
72	#define TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(class_name, c_api_name, cce_name, data_type)\	100	#define TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(class_name, c_api_name, cce_name, data_type)\
73	\	101	\
74	class TestVectorDataMove##class_name##_##data_type##_CApi : public testing::Test { \	102	class TestVectorDataMove##class_name##_##data_type##_CApi : public testing::Test { \
	@@ -127,6 +155,35 @@ TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_
127	GlobalMockObject::verify(); \	155	GlobalMockObject::verify(); \
128	} \	156	} \
129		157
		158	+#define TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR_INT4(class_name, c_api_name, cce_name, data_type)\
		159	+ \
		160	+class TestVectorDataMove##class_name##_##data_type##_CApi : public testing::Test { \
		161	+protected: \
		162	+ void SetUp() {} \
		163	+ void TearDown() {} \
		164	+}; \
		165	+ \
		166	+namespace { \
		167	+void cce_name##_##data_type##_Stub(vector_fp4x2_e1m2_t& dst, vector_load_unalign& src0, \
		168	+ iter_reg& offset, __ubuf__ float4_e1m2x2_t *&src1, uint32_t post) {} \
		169	+} \
		170	+ \
		171	+TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_type##_Succ) \
		172	+{ \
		173	+ __ubuf__ data_type src1 = reinterpret_cast<__ubuf__ data_type >(0); \
		174	+ vector_load_unalign src0; \
		175	+ vector_int4x2_t dst; \
		176	+ uint32_t count; \
		177	+ iter_reg offset; \
		178	+ \
		179	+ MOCKER_CPP(cce_name, void(vector_fp4x2_e1m2_t&, vector_load_unalign&, iter_reg&, __ubuf__ float4_e1m2x2_t *, uint32_t)) \
		180	+ .times(1) \
		181	+ .will(invoke(cce_name##_##data_type##_Stub)); \
		182	+ \
		183	+ c_api_name(dst, src0, src1, offset, count); \
		184	+ GlobalMockObject::verify(); \
		185	+} \
		186	+
130	// ==========asc_loadunalign_postupdate(u8/s8/half/u16/s16/float/u32/s32/s64/bf16/e4m3/e5m2/e2m1/e1m2)=========	187	// ==========asc_loadunalign_postupdate(u8/s8/half/u16/s16/float/u32/s32/s64/bf16/e4m3/e5m2/e2m1/e1m2)=========
131	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(LOADUALIGN, asc_loadunalign_postupdate, vldus, int8_t);	188	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(LOADUALIGN, asc_loadunalign_postupdate, vldus, int8_t);
132	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(LOADUALIGN, asc_loadunalign_postupdate, vldus, uint8_t);	189	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(LOADUALIGN, asc_loadunalign_postupdate, vldus, uint8_t);
	@@ -143,6 +200,7 @@ TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR_HIF8(LOADUALIGN, asc_loadunalign_postupda
143	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(LOADUALIGN, asc_loadunalign_postupdate, vldus, fp4x2_e2m1_t);	200	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(LOADUALIGN, asc_loadunalign_postupdate, vldus, fp4x2_e2m1_t);
144	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(LOADUALIGN, asc_loadunalign_postupdate, vldus, fp4x2_e1m2_t);	201	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(LOADUALIGN, asc_loadunalign_postupdate, vldus, fp4x2_e1m2_t);
145	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(LOADUALIGN, asc_loadunalign_postupdate, vldus, fp8_e8m0_t);	202	TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR(LOADUALIGN, asc_loadunalign_postupdate, vldus, fp8_e8m0_t);
		203	+TEST_VECTOR_DATAMOVE_LOADUNALIGN_INSTR_INT4(LOADUALIGN, asc_loadunalign_postupdate, vldus, int4b_t);
146	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, int8_t);	204	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, int8_t);
147	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, uint8_t);	205	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, uint8_t);
148	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, int16_t);	206	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, int16_t);
	@@ -157,4 +215,5 @@ TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR_HIF8(LOADUALIGNVLDU, asc_loadunalign
157	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, fp8_e5m2_t);	215	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, fp8_e5m2_t);
158	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, fp4x2_e2m1_t);	216	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, fp4x2_e2m1_t);
159	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, fp4x2_e1m2_t);	217	TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, fp4x2_e1m2_t);
160	-TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, fp8_e8m0_t);	218	+TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, fp8_e8m0_t);
		219	+TEST_VECTOR_DATAMOVE_LOADUNALIGN_VLDU_INSTR_INT4(LOADUALIGNVLDU, asc_loadunalign_postupdate, vldu, int4b_t);

Mtests/api/c_api/npu_arch_3510/vector_datamove/test_asc_loadunalign_pre.cpp+59-1

	@@ -67,6 +67,33 @@ TEST_F(TestVectorDatamove##class_name##data_type##CApi, c_api_name##_Succ)
67	GlobalMockObject::verify(); \	67	GlobalMockObject::verify(); \
68	}	68	}
69		69
		70	+#define TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_INT4(class_name, c_api_name, cce_name, data_type) \
		71	+ \
		72	+class TestVectorDatamove##class_name##data_type##CApi : public testing::Test { \
		73	+protected: \
		74	+ void SetUp() {} \
		75	+ void TearDown() {} \
		76	+}; \
		77	+ \
		78	+namespace { \
		79	+ \
		80	+void cce_name##_##data_type##_Stub(vector_load_unalign &dst, __ubuf__ float4_e1m2x2_t *src) {} \
		81	+ \
		82	+} \
		83	+ \
		84	+TEST_F(TestVectorDatamove##class_name##data_type##CApi, c_api_name##_Succ) \
		85	+{ \
		86	+ vector_load_unalign dst; \
		87	+ __ubuf__ data_type *src; \
		88	+ \
		89	+ MOCKER_CPP(cce_name, void(vector_load_unalign &, __ubuf__ float4_e1m2x2_t *)) \
		90	+ .times(1) \
		91	+ .will(invoke(cce_name##_##data_type##_Stub)); \
		92	+ \
		93	+ c_api_name(dst, src); \
		94	+ GlobalMockObject::verify(); \
		95	+}
		96	+
70	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, int8_t);	97	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, int8_t);
71	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, uint8_t);	98	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, uint8_t);
72	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, fp4x2_e2m1_t);	99	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, fp4x2_e2m1_t);
	@@ -83,6 +110,7 @@ TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas,
83	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, uint32_t);	110	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, uint32_t);
84	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, float);	111	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, float);
85	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, int64_t);	112	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE(LoadUnalignPre, asc_loadunalign_pre, vldas, int64_t);
		113	+TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_INT4(LoadUnalignPre, asc_loadunalign_pre, vldas, int4b_t);
86		114
87	#define TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(class_name, c_api_name, cce_name, data_type)\	115	#define TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(class_name, c_api_name, cce_name, data_type)\
88	\	116	\
	@@ -142,6 +170,35 @@ TEST_F(TestVectorDatamove##class_name##data_type##CApi, c_api_name##_Succ)
142	GlobalMockObject::verify(); \	170	GlobalMockObject::verify(); \
143	}	171	}
144		172
		173	+#define TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET_INT4(class_name, c_api_name, cce_name, data_type)\
		174	+ \
		175	+class TestVectorDatamove##class_name##data_type##CApi : public testing::Test { \
		176	+protected: \
		177	+ void SetUp() {} \
		178	+ void TearDown() {} \
		179	+}; \
		180	+ \
		181	+namespace { \
		182	+ \
		183	+void cce_name##_##data_type##_Stub(vector_load_unalign &dst, __ubuf__ float4_e1m2x2_t *src, \
		184	+ iter_reg offset) {} \
		185	+ \
		186	+} \
		187	+ \
		188	+TEST_F(TestVectorDatamove##class_name##data_type##CApi, c_api_name##_Succ) \
		189	+{ \
		190	+ vector_load_unalign dst; \
		191	+ __ubuf__ data_type *src; \
		192	+ iter_reg offset; \
		193	+ \
		194	+ MOCKER_CPP(cce_name, void(vector_load_unalign &, __ubuf__ float4_e1m2x2_t *, iter_reg offset)) \
		195	+ .times(1) \
		196	+ .will(invoke(cce_name##_##data_type##_Stub)); \
		197	+ \
		198	+ c_api_name(dst, src, offset); \
		199	+ GlobalMockObject::verify(); \
		200	+}
		201	+
145	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, int8_t);	202	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, int8_t);
146	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, uint8_t);	203	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, uint8_t);
147	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, fp4x2_e2m1_t);	204	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, fp4x2_e2m1_t);
	@@ -157,4 +214,5 @@ TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalig
157	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, int32_t);	214	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, int32_t);
158	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, uint32_t);	215	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, uint32_t);
159	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, float);	216	TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, float);
160	-TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, int64_t);	217	+TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, int64_t);
		218	+TEST_VECTOR_DATAMOVE_LOADUNALIGN_PRE_OFFSET_INT4(LoadUnalignPreOffset, asc_loadunalign_pre, vlda, int4b_t);

	@@ -41,6 +41,7 @@ __simd_callee__ inline void asc_loadalign(vector_uint32_t& dst, __ubuf__ uint32_
41	__simd_callee__ inline void asc_loadalign(vector_float& dst, __ubuf__ float* src)	41	__simd_callee__ inline void asc_loadalign(vector_float& dst, __ubuf__ float* src)
42	__simd_callee__ inline void asc_loadalign(vector_int64_t& dst, __ubuf__ int64_t* src)	42	__simd_callee__ inline void asc_loadalign(vector_int64_t& dst, __ubuf__ int64_t* src)
43	__simd_callee__ inline void asc_loadalign(vector_uint64_t& dst, __ubuf__ uint64_t* src)	43	__simd_callee__ inline void asc_loadalign(vector_uint64_t& dst, __ubuf__ uint64_t* src)
		44	+__simd_callee__ inline void asc_loadalign(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
44	// BRC搬入模式	45	// BRC搬入模式
45	__simd_callee__ inline void asc_loadalign_brc(vector_int8_t& dst, __ubuf__ int8_t* src)	46	__simd_callee__ inline void asc_loadalign_brc(vector_int8_t& dst, __ubuf__ int8_t* src)
46	__simd_callee__ inline void asc_loadalign_brc(vector_uint8_t& dst, __ubuf__ uint8_t* src)	47	__simd_callee__ inline void asc_loadalign_brc(vector_uint8_t& dst, __ubuf__ uint8_t* src)
	@@ -57,6 +58,7 @@ __simd_callee__ inline void asc_loadalign_brc(vector_bfloat16_t& dst, __ubuf__ b
57	__simd_callee__ inline void asc_loadalign_brc(vector_int32_t& dst, __ubuf__ int32_t* src)	58	__simd_callee__ inline void asc_loadalign_brc(vector_int32_t& dst, __ubuf__ int32_t* src)
58	__simd_callee__ inline void asc_loadalign_brc(vector_uint32_t& dst, __ubuf__ uint32_t* src)	59	__simd_callee__ inline void asc_loadalign_brc(vector_uint32_t& dst, __ubuf__ uint32_t* src)
59	__simd_callee__ inline void asc_loadalign_brc(vector_float& dst, __ubuf__ float* src)	60	__simd_callee__ inline void asc_loadalign_brc(vector_float& dst, __ubuf__ float* src)
		61	+__simd_callee__ inline void asc_loadalign_brc(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
60	// UP2X搬入模式	62	// UP2X搬入模式
61	__simd_callee__ inline void asc_loadalign_upsample(vector_int8_t& dst, __ubuf__ int8_t* src)	63	__simd_callee__ inline void asc_loadalign_upsample(vector_int8_t& dst, __ubuf__ int8_t* src)
62	__simd_callee__ inline void asc_loadalign_upsample(vector_uint8_t& dst, __ubuf__ uint8_t* src)	64	__simd_callee__ inline void asc_loadalign_upsample(vector_uint8_t& dst, __ubuf__ uint8_t* src)
	@@ -70,6 +72,7 @@ __simd_callee__ inline void asc_loadalign_upsample(vector_int16_t& dst, __ubuf__
70	__simd_callee__ inline void asc_loadalign_upsample(vector_uint16_t& dst, __ubuf__ uint16_t* src)	72	__simd_callee__ inline void asc_loadalign_upsample(vector_uint16_t& dst, __ubuf__ uint16_t* src)
71	__simd_callee__ inline void asc_loadalign_upsample(vector_half& dst, __ubuf__ half* src)	73	__simd_callee__ inline void asc_loadalign_upsample(vector_half& dst, __ubuf__ half* src)
72	__simd_callee__ inline void asc_loadalign_upsample(vector_bfloat16_t& dst, __ubuf__ bfloat16_t* src)	74	__simd_callee__ inline void asc_loadalign_upsample(vector_bfloat16_t& dst, __ubuf__ bfloat16_t* src)
		75	+__simd_callee__ inline void asc_loadalign_upsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
73	// DOWN2X搬入模式	76	// DOWN2X搬入模式
74	__simd_callee__ inline void asc_loadalign_downsample(vector_int8_t& dst, __ubuf__ int8_t* src)	77	__simd_callee__ inline void asc_loadalign_downsample(vector_int8_t& dst, __ubuf__ int8_t* src)
75	__simd_callee__ inline void asc_loadalign_downsample(vector_uint8_t& dst, __ubuf__ uint8_t* src)	78	__simd_callee__ inline void asc_loadalign_downsample(vector_uint8_t& dst, __ubuf__ uint8_t* src)
	@@ -83,6 +86,7 @@ __simd_callee__ inline void asc_loadalign_downsample(vector_int16_t& dst, __ubuf
83	__simd_callee__ inline void asc_loadalign_downsample(vector_uint16_t& dst, __ubuf__ uint16_t* src)	86	__simd_callee__ inline void asc_loadalign_downsample(vector_uint16_t& dst, __ubuf__ uint16_t* src)
84	__simd_callee__ inline void asc_loadalign_downsample(vector_half& dst, __ubuf__ half* src)	87	__simd_callee__ inline void asc_loadalign_downsample(vector_half& dst, __ubuf__ half* src)
85	__simd_callee__ inline void asc_loadalign_downsample(vector_bfloat16_t& dst, __ubuf__ bfloat16_t* src)	88	__simd_callee__ inline void asc_loadalign_downsample(vector_bfloat16_t& dst, __ubuf__ bfloat16_t* src)
		89	+__simd_callee__ inline void asc_loadalign_downsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
86	// UNPACK搬入模式	90	// UNPACK搬入模式
87	__simd_callee__ inline void asc_loadalign_unpack(vector_int8_t& dst, __ubuf__ int8_t* src)	91	__simd_callee__ inline void asc_loadalign_unpack(vector_int8_t& dst, __ubuf__ int8_t* src)
88	__simd_callee__ inline void asc_loadalign_unpack(vector_uint8_t& dst, __ubuf__ uint8_t* src)	92	__simd_callee__ inline void asc_loadalign_unpack(vector_uint8_t& dst, __ubuf__ uint8_t* src)
	@@ -99,6 +103,7 @@ __simd_callee__ inline void asc_loadalign_unpack(vector_bfloat16_t& dst, __ubuf_
99	__simd_callee__ inline void asc_loadalign_unpack(vector_int32_t& dst, __ubuf__ int32_t* src)	103	__simd_callee__ inline void asc_loadalign_unpack(vector_int32_t& dst, __ubuf__ int32_t* src)
100	__simd_callee__ inline void asc_loadalign_unpack(vector_uint32_t& dst, __ubuf__ uint32_t* src)	104	__simd_callee__ inline void asc_loadalign_unpack(vector_uint32_t& dst, __ubuf__ uint32_t* src)
101	__simd_callee__ inline void asc_loadalign_unpack(vector_float& dst, __ubuf__ float* src)	105	__simd_callee__ inline void asc_loadalign_unpack(vector_float& dst, __ubuf__ float* src)
		106	+__simd_callee__ inline void asc_loadalign_unpack(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
102	// UNPACKV2搬入模式	107	// UNPACKV2搬入模式
103	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int8_t& dst, __ubuf__ int8_t* src)	108	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int8_t& dst, __ubuf__ int8_t* src)
104	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src)	109	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src)
	@@ -108,6 +113,7 @@ __simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e8m0_t& dst, __ub
108	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src)	113	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src)
109	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e4m3fn_t& dst, __ubuf__ fp8_e4m3fn_t* src)	114	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e4m3fn_t& dst, __ubuf__ fp8_e4m3fn_t* src)
110	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src)	115	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src)
		116	+__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
111	// BRCV2搬入模式	117	// BRCV2搬入模式
112	__simd_callee__ inline void asc_loadalign_brc_v2(vector_int8_t& dst, __ubuf__ int8_t* src)	118	__simd_callee__ inline void asc_loadalign_brc_v2(vector_int8_t& dst, __ubuf__ int8_t* src)
113	__simd_callee__ inline void asc_loadalign_brc_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src)	119	__simd_callee__ inline void asc_loadalign_brc_v2(vector_uint8_t& dst, __ubuf__ uint8_t* src)
	@@ -124,6 +130,7 @@ __simd_callee__ inline void asc_loadalign_brc_v2(vector_bfloat16_t& dst, __ubuf_
124	__simd_callee__ inline void asc_loadalign_brc_v2(vector_int32_t& dst, __ubuf__ int32_t* src)	130	__simd_callee__ inline void asc_loadalign_brc_v2(vector_int32_t& dst, __ubuf__ int32_t* src)
125	__simd_callee__ inline void asc_loadalign_brc_v2(vector_uint32_t& dst, __ubuf__ uint32_t* src)	131	__simd_callee__ inline void asc_loadalign_brc_v2(vector_uint32_t& dst, __ubuf__ uint32_t* src)
126	__simd_callee__ inline void asc_loadalign_brc_v2(vector_float& dst, __ubuf__ float* src)	132	__simd_callee__ inline void asc_loadalign_brc_v2(vector_float& dst, __ubuf__ float* src)
		133	+__simd_callee__ inline void asc_loadalign_brc_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src)
127	// BRCV3搬入模式	134	// BRCV3搬入模式
128	__simd_callee__ inline void asc_loadalign_brc_v3(vector_int16_t& dst, __ubuf__ int16_t* src)	135	__simd_callee__ inline void asc_loadalign_brc_v3(vector_int16_t& dst, __ubuf__ int16_t* src)
129	__simd_callee__ inline void asc_loadalign_brc_v3(vector_uint16_t& dst, __ubuf__ uint16_t* src)	136	__simd_callee__ inline void asc_loadalign_brc_v3(vector_uint16_t& dst, __ubuf__ uint16_t* src)
	@@ -148,6 +155,7 @@ __simd_callee__ inline void asc_loadalign_deintlv(vector_bfloat16_t& dst0, vecto
148	__simd_callee__ inline void asc_loadalign_deintlv(vector_int32_t& dst0, vector_int32_t& dst1, __ubuf__ int32_t* src)	155	__simd_callee__ inline void asc_loadalign_deintlv(vector_int32_t& dst0, vector_int32_t& dst1, __ubuf__ int32_t* src)
149	__simd_callee__ inline void asc_loadalign_deintlv(vector_uint32_t& dst0, vector_uint32_t& dst1, __ubuf__ uint32_t* src)	156	__simd_callee__ inline void asc_loadalign_deintlv(vector_uint32_t& dst0, vector_uint32_t& dst1, __ubuf__ uint32_t* src)
150	__simd_callee__ inline void asc_loadalign_deintlv(vector_float& dst0, vector_float& dst1, __ubuf__ float* src)	157	__simd_callee__ inline void asc_loadalign_deintlv(vector_float& dst0, vector_float& dst1, __ubuf__ float* src)
		158	+__simd_callee__ inline void asc_loadalign_deintlv(vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t* src)
151	```	159	```
152		160
153	## 参数说明	161	## 参数说明

	@@ -40,6 +40,7 @@ __simd_callee__ inline void asc_loadalign(vector_int32_t& dst, __ubuf__ int32_t*
40	__simd_callee__ inline void asc_loadalign(vector_int64_t& dst, __ubuf__ int64_t* src, iter_reg offset)	40	__simd_callee__ inline void asc_loadalign(vector_int64_t& dst, __ubuf__ int64_t* src, iter_reg offset)
41	__simd_callee__ inline void asc_loadalign(vector_uint64_t& dst, __ubuf__ uint64_t* src, iter_reg offset)	41	__simd_callee__ inline void asc_loadalign(vector_uint64_t& dst, __ubuf__ uint64_t* src, iter_reg offset)
42	__simd_callee__ inline void asc_loadalign(vector_float& dst, __ubuf__ float* src, iter_reg offset)	42	__simd_callee__ inline void asc_loadalign(vector_float& dst, __ubuf__ float* src, iter_reg offset)
		43	+__simd_callee__ inline void asc_loadalign(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
43	// BRC搬入模式	44	// BRC搬入模式
44	__simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)	45	__simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)
45	__simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)	46	__simd_callee__ inline void asc_loadalign_brc(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)
	@@ -56,6 +57,7 @@ __simd_callee__ inline void asc_loadalign_brc(vector_half& dst, __ubuf__ half* s
56	__simd_callee__ inline void asc_loadalign_brc(vector_uint32_t& dst, __ubuf__ uint32_t* src, iter_reg offset)	57	__simd_callee__ inline void asc_loadalign_brc(vector_uint32_t& dst, __ubuf__ uint32_t* src, iter_reg offset)
57	__simd_callee__ inline void asc_loadalign_brc(vector_int32_t& dst, __ubuf__ int32_t* src, iter_reg offset)	58	__simd_callee__ inline void asc_loadalign_brc(vector_int32_t& dst, __ubuf__ int32_t* src, iter_reg offset)
58	__simd_callee__ inline void asc_loadalign_brc(vector_float& dst, __ubuf__ float* src, iter_reg offset)	59	__simd_callee__ inline void asc_loadalign_brc(vector_float& dst, __ubuf__ float* src, iter_reg offset)
		60	+__simd_callee__ inline void asc_loadalign_brc(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
59	// UP2X搬入模式	61	// UP2X搬入模式
60	__simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)	62	__simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)
61	__simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)	63	__simd_callee__ inline void asc_loadalign_upsample(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)
	@@ -69,6 +71,7 @@ __simd_callee__ inline void asc_loadalign_upsample(vector_uint16_t& dst, __ubuf_
69	__simd_callee__ inline void asc_loadalign_upsample(vector_int16_t& dst, __ubuf__ int16_t* src, iter_reg offset)	71	__simd_callee__ inline void asc_loadalign_upsample(vector_int16_t& dst, __ubuf__ int16_t* src, iter_reg offset)
70	__simd_callee__ inline void asc_loadalign_upsample(vector_bfloat16_t& dst, __ubuf__ bfloat16_t* src, iter_reg offset)	72	__simd_callee__ inline void asc_loadalign_upsample(vector_bfloat16_t& dst, __ubuf__ bfloat16_t* src, iter_reg offset)
71	__simd_callee__ inline void asc_loadalign_upsample(vector_half& dst, __ubuf__ half* src, iter_reg offset)	73	__simd_callee__ inline void asc_loadalign_upsample(vector_half& dst, __ubuf__ half* src, iter_reg offset)
		74	+__simd_callee__ inline void asc_loadalign_upsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
72	// DOWN2X搬入模式	75	// DOWN2X搬入模式
73	__simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)	76	__simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)
74	__simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)	77	__simd_callee__ inline void asc_loadalign_downsample(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)
	@@ -82,6 +85,7 @@ __simd_callee__ inline void asc_loadalign_downsample(vector_uint16_t& dst, __ubu
82	__simd_callee__ inline void asc_loadalign_downsample(vector_int16_t& dst, __ubuf__ int16_t* src, iter_reg offset)	85	__simd_callee__ inline void asc_loadalign_downsample(vector_int16_t& dst, __ubuf__ int16_t* src, iter_reg offset)
83	__simd_callee__ inline void asc_loadalign_downsample(vector_bfloat16_t& dst, __ubuf__ bfloat16_t* src, iter_reg offset)	86	__simd_callee__ inline void asc_loadalign_downsample(vector_bfloat16_t& dst, __ubuf__ bfloat16_t* src, iter_reg offset)
84	__simd_callee__ inline void asc_loadalign_downsample(vector_half& dst, __ubuf__ half* src, iter_reg offset)	87	__simd_callee__ inline void asc_loadalign_downsample(vector_half& dst, __ubuf__ half* src, iter_reg offset)
		88	+__simd_callee__ inline void asc_loadalign_downsample(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
85	// DEINTLV搬入模式	89	// DEINTLV搬入模式
86	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e1m2_t& dst0, vector_fp4x2_e1m2_t& dst1, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)	90	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e1m2_t& dst0, vector_fp4x2_e1m2_t& dst1, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)
87	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e2m1_t& dst0, vector_fp4x2_e2m1_t& dst1, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)	91	__simd_callee__ inline void asc_loadalign_deintlv(vector_fp4x2_e2m1_t& dst0, vector_fp4x2_e2m1_t& dst1, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)
	@@ -98,6 +102,7 @@ __simd_callee__ inline void asc_loadalign_deintlv(vector_half& dst0, vector_half
98	__simd_callee__ inline void asc_loadalign_deintlv(vector_uint32_t& dst0, vector_uint32_t& dst1, __ubuf__ uint32_t* src, iter_reg offset)	102	__simd_callee__ inline void asc_loadalign_deintlv(vector_uint32_t& dst0, vector_uint32_t& dst1, __ubuf__ uint32_t* src, iter_reg offset)
99	__simd_callee__ inline void asc_loadalign_deintlv(vector_int32_t& dst0, vector_int32_t& dst1, __ubuf__ int32_t* src, iter_reg offset)	103	__simd_callee__ inline void asc_loadalign_deintlv(vector_int32_t& dst0, vector_int32_t& dst1, __ubuf__ int32_t* src, iter_reg offset)
100	__simd_callee__ inline void asc_loadalign_deintlv(vector_float& dst0, vector_float& dst1, __ubuf__ float* src, iter_reg offset)	104	__simd_callee__ inline void asc_loadalign_deintlv(vector_float& dst0, vector_float& dst1, __ubuf__ float* src, iter_reg offset)
		105	+__simd_callee__ inline void asc_loadalign_deintlv(vector_int4x2_t& dst0, vector_int4x2_t& dst1, __ubuf__ int4b_t* src, iter_reg offset)
101	// UNPACK搬入模式	106	// UNPACK搬入模式
102	__simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)	107	__simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)
103	__simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)	108	__simd_callee__ inline void asc_loadalign_unpack(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)
	@@ -114,6 +119,7 @@ __simd_callee__ inline void asc_loadalign_unpack(vector_bfloat16_t& dst, __ubuf_
114	__simd_callee__ inline void asc_loadalign_unpack(vector_uint32_t& dst, __ubuf__ uint32_t* src, iter_reg offset)	119	__simd_callee__ inline void asc_loadalign_unpack(vector_uint32_t& dst, __ubuf__ uint32_t* src, iter_reg offset)
115	__simd_callee__ inline void asc_loadalign_unpack(vector_int32_t& dst, __ubuf__ int32_t* src, iter_reg offset)	120	__simd_callee__ inline void asc_loadalign_unpack(vector_int32_t& dst, __ubuf__ int32_t* src, iter_reg offset)
116	__simd_callee__ inline void asc_loadalign_unpack(vector_float& dst, __ubuf__ float* src, iter_reg offset)	121	__simd_callee__ inline void asc_loadalign_unpack(vector_float& dst, __ubuf__ float* src, iter_reg offset)
		122	+__simd_callee__ inline void asc_loadalign_unpack(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
117	// UNPACKV2搬入模式	123	// UNPACKV2搬入模式
118	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)	124	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)
119	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)	125	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)
	@@ -123,6 +129,7 @@ __simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e4m3fn_t& dst, __
123	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, iter_reg offset)	129	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src, iter_reg offset)
124	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, iter_reg offset)	130	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src, iter_reg offset)
125	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src, iter_reg offset)	131	__simd_callee__ inline void asc_loadalign_unpack_v2(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src, iter_reg offset)
		132	+__simd_callee__ inline void asc_loadalign_unpack_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
126	// BRCV2搬入模式	133	// BRCV2搬入模式
127	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)	134	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src, iter_reg offset)
128	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)	135	__simd_callee__ inline void asc_loadalign_brc_v2(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src, iter_reg offset)
	@@ -139,6 +146,7 @@ __simd_callee__ inline void asc_loadalign_brc_v2(vector_half& dst, __ubuf__ half
139	__simd_callee__ inline void asc_loadalign_brc_v2(vector_uint32_t& dst, __ubuf__ uint32_t* src, iter_reg offset)	146	__simd_callee__ inline void asc_loadalign_brc_v2(vector_uint32_t& dst, __ubuf__ uint32_t* src, iter_reg offset)
140	__simd_callee__ inline void asc_loadalign_brc_v2(vector_int32_t& dst, __ubuf__ int32_t* src, iter_reg offset)	147	__simd_callee__ inline void asc_loadalign_brc_v2(vector_int32_t& dst, __ubuf__ int32_t* src, iter_reg offset)
141	__simd_callee__ inline void asc_loadalign_brc_v2(vector_float& dst, __ubuf__ float* src, iter_reg offset)	148	__simd_callee__ inline void asc_loadalign_brc_v2(vector_float& dst, __ubuf__ float* src, iter_reg offset)
		149	+__simd_callee__ inline void asc_loadalign_brc_v2(vector_int4x2_t& dst, __ubuf__ int4b_t* src, iter_reg offset)
142	/// BRCV3搬入模式	150	/// BRCV3搬入模式
143	__simd_callee__ inline void asc_loadalign_brc_v3(vector_uint16_t& dst, __ubuf__ uint16_t* src, iter_reg offset)	151	__simd_callee__ inline void asc_loadalign_brc_v3(vector_uint16_t& dst, __ubuf__ uint16_t* src, iter_reg offset)
144	__simd_callee__ inline void asc_loadalign_brc_v3(vector_int16_t& dst, __ubuf__ int16_t* src, iter_reg offset)	152	__simd_callee__ inline void asc_loadalign_brc_v3(vector_int16_t& dst, __ubuf__ int16_t* src, iter_reg offset)

	@@ -13,7 +13,7 @@
13	#include "tests/api/c_api/stub/cce_stub.h"	13	#include "tests/api/c_api/stub/cce_stub.h"
14	#include "include/c_api/asc_simd.h"	14	#include "include/c_api/asc_simd.h"
15		15
16	-#define TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(class_name, c_api_name, cce_name, data_type, cce_data_type) \	16	+#define TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(class_name, c_api_name, cce_name, dst_data_type, data_type, cce_data_type) \
17	\	17	\
18	class TestVectorDataMove##class_name##_##data_type##_CApi : public testing::Test { \	18	class TestVectorDataMove##class_name##_##data_type##_CApi : public testing::Test { \
19	protected: \	19	protected: \
	@@ -29,7 +29,7 @@ void cce_name##_##data_type##_Stub(vector_##cce_data_type& dst, __ubuf__ cce_dat
29	TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_type##_Succ) \	29	TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_type##_Succ) \
30	{ \	30	{ \
31	__ubuf__ data_type src = reinterpret_cast<__ubuf__ data_type >(0); \	31	__ubuf__ data_type src = reinterpret_cast<__ubuf__ data_type >(0); \
32	- vector_##data_type dst; \	32	+ dst_data_type dst; \
33	vector_uint32_t index; \	33	vector_uint32_t index; \
34	vector_bool mask; \	34	vector_bool mask; \
35	\	35	\
	@@ -41,7 +41,7 @@ TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_
41	GlobalMockObject::verify(); \	41	GlobalMockObject::verify(); \
42	} \	42	} \
43		43
44	-#define TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(class_name, c_api_name, cce_name, data_type, cce_data_type) \	44	+#define TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(class_name, c_api_name, cce_name, dst_data_type, data_type, cce_data_type) \
45	\	45	\
46	class TestVectorDataMove##class_name##_##data_type##_CApi : public testing::Test { \	46	class TestVectorDataMove##class_name##_##data_type##_CApi : public testing::Test { \
47	protected: \	47	protected: \
	@@ -56,7 +56,7 @@ void cce_name##_##data_type##_Stub_1(vector_##cce_data_type& dst, __ubuf__ cce_d
56	TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_type##_Succ) \	56	TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_type##_Succ) \
57	{ \	57	{ \
58	__ubuf__ data_type src = reinterpret_cast<__ubuf__ data_type >(0); \	58	__ubuf__ data_type src = reinterpret_cast<__ubuf__ data_type >(0); \
59	- vector_##data_type dst; \	59	+ dst_data_type dst; \
60	vector_uint32_t index; \	60	vector_uint32_t index; \
61	\	61	\
62	MOCKER_CPP(cce_name, void(vector_##cce_data_type&, __ubuf__ cce_data_type *, vector_uint32_t)) \	62	MOCKER_CPP(cce_name, void(vector_##cce_data_type&, __ubuf__ cce_data_type *, vector_uint32_t)) \
	@@ -67,36 +67,38 @@ TEST_F(TestVectorDataMove##class_name##_##data_type##_CApi, c_api_name##_##data_
67	GlobalMockObject::verify(); \	67	GlobalMockObject::verify(); \
68	} \	68	} \
69		69
70	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, int8_t, int8_t);	70	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_int8_t, int8_t, int8_t);
71	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, uint8_t, uint8_t);	71	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_uint8_t, uint8_t, uint8_t);
72	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, int16_t, int16_t);	72	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_int16_t, int16_t, int16_t);
73	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, uint16_t, uint16_t);	73	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_uint16_t, uint16_t, uint16_t);
74	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, int32_t, int32_t);	74	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_int32_t, int32_t, int32_t);
75	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, uint32_t, uint32_t);	75	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_uint32_t, uint32_t, uint32_t);
76	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, int64_t, int64_t);	76	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_int64_t, int64_t, int64_t);
77	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, uint64_t, uint64_t);	77	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_uint64_t, uint64_t, uint64_t);
78	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, half, half);	78	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_half, half, half);
79	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, float, float);	79	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_float, float, float);
80	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, bfloat16_t, bfloat16_t);	80	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_bfloat16_t, bfloat16_t, bfloat16_t);
81	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, fp8_e4m3fn_t, fp8_e4m3fn_t);	81	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_fp8_e4m3fn_t, fp8_e4m3fn_t, fp8_e4m3fn_t);
82	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, hifloat8_t, uint8_t);	82	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_hifloat8_t, hifloat8_t, uint8_t);
83	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, fp8_e5m2_t, fp8_e5m2_t);	83	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_fp8_e5m2_t, fp8_e5m2_t, fp8_e5m2_t);
84	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, fp4x2_e2m1_t, fp4x2_e2m1_t);	84	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_fp4x2_e2m1_t, fp4x2_e2m1_t, fp4x2_e2m1_t);
85	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, fp4x2_e1m2_t, fp4x2_e1m2_t);	85	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_fp4x2_e1m2_t, fp4x2_e1m2_t, fp4x2_e1m2_t);
86	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, fp8_e8m0_t, fp8_e8m0_t);	86	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_int4x2_t, int4b_t, fp4x2_e1m2_t);
87	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, int8_t, int8_t);	87	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_0(Vgatherb, asc_gather_datablock, vgatherb, vector_fp8_e8m0_t, fp8_e8m0_t, fp8_e8m0_t);
88	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, uint8_t, uint8_t);	88	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_int8_t, int8_t, int8_t);
89	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, int16_t, int16_t);	89	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_uint8_t, uint8_t, uint8_t);
90	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, uint16_t, uint16_t);	90	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_int16_t, int16_t, int16_t);
91	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, int32_t, int32_t);	91	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_uint16_t, uint16_t, uint16_t);
92	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, uint32_t, uint32_t);	92	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_int32_t, int32_t, int32_t);
93	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, int64_t, int64_t);	93	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_uint32_t, uint32_t, uint32_t);
94	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, half, half);	94	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_int64_t, int64_t, int64_t);
95	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, float, float);	95	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_half, half, half);
96	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, bfloat16_t, bfloat16_t);	96	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_float, float, float);
97	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, fp8_e4m3fn_t, fp8_e4m3fn_t);	97	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_bfloat16_t, bfloat16_t, bfloat16_t);
98	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, hifloat8_t, uint8_t);	98	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_fp8_e4m3fn_t, fp8_e4m3fn_t, fp8_e4m3fn_t);
99	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, fp8_e5m2_t, fp8_e5m2_t);	99	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_hifloat8_t, hifloat8_t, uint8_t);
100	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, fp4x2_e2m1_t, fp4x2_e2m1_t);	100	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_fp8_e5m2_t, fp8_e5m2_t, fp8_e5m2_t);
101	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, fp4x2_e1m2_t, fp4x2_e1m2_t);	101	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_fp4x2_e2m1_t, fp4x2_e2m1_t, fp4x2_e2m1_t);
102	-TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, fp8_e8m0_t, fp8_e8m0_t);	102	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_fp4x2_e1m2_t, fp4x2_e1m2_t, fp4x2_e1m2_t);
		103	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_int4x2_t, int4b_t, fp4x2_e1m2_t);
		104	+TEST_VECTOR_DATAMOVE_GATHER_DATABLOCK_INSTR_1(Vgatherb_1, asc_gather_datablock, vgatherb, vector_fp8_e8m0_t, fp8_e8m0_t, fp8_e8m0_t);