fix: 在cpu侧增加对bf16类型的数据校验-asc-devkit-AtomGit

Merged

fix: 在cpu侧增加对bf16类型的数据校验 #2982

maohp_hwAdd on Jun 6Merged fromhaipingmao/asc-devkit： br_fix_5hd_cpu_check into cann/asc-devkit： master

fix: 在cpu侧增加对bf16类型的数据校验 #2982

Merged

maohp_hwAdd on Jun 6

Merged fromhaipingmao/asc-devkit br_fix_5hd_cpu_checkintocann/asc-devkit master

Total: 2 files changed+115-66

M.pre-commit-config.yaml+11-1

	@@ -1,3 +1,13 @@
		1	+# ----------------------------------------------------------------------------------------------------------
		2	+# Copyright (c) 2026 Huawei Technologies Co., Ltd.
		3	+# This program is free software, you can redistribute it and/or modify it under the terms and conditions of
		4	+# CANN Open Software License Agreement Version 2.0 (the "License").
		5	+# Please refer to the License for details. You may not use this file except in compliance with the License.
		6	+# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
		7	+# INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
		8	+# See LICENSE in the root of the software repository for the full text of the License.
		9	+# ----------------------------------------------------------------------------------------------------------
		10	+
1	repos:	11	repos:
2	- repo: https://github.com/pre-commit/mirrors-clang-format	12	- repo: https://github.com/pre-commit/mirrors-clang-format
3	rev: v16.0.0	13	rev: v16.0.0
	@@ -14,5 +24,5 @@ repos:
14	language: system	24	language: system
15	pass_filenames: true	25	pass_filenames: true
16	types: [file]	26	types: [file]
17	- stages: [commit]	27	+ stages: [pre-commit]
18	verbose: true	28	verbose: true

Mimpl/basic_api/kernel_operator_vec_transpose_intf_impl.h+104-65

	@@ -1,19 +1,20 @@
1	/**	1	/**
2	-* Copyright (c) 2025 Huawei Technologies Co., Ltd.	2	+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3	-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of	3	+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4	-* CANN Open Software License Agreement Version 2.0 (the "License").	4	+ * CANN Open Software License Agreement Version 2.0 (the "License").
5	-* Please refer to the License for details. You may not use this file except in compliance with the License.	5	+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6	-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,	6	+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7	-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.	7	+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8	-* See LICENSE in the root of the software repository for the full text of the License.	8	+ * See LICENSE in the root of the software repository for the full text of the License.
9	-*/	9	+ */
10		10
11	/*!	11	/*!
12	* \file kernel_operator_vec_transpose_intf_impl.h	12	* \file kernel_operator_vec_transpose_intf_impl.h
13	* \brief	13	* \brief
14	*/	14	*/
15	#if !defined(__ASCENDC_INCLUDE_INTERNAL_HEADERS__)	15	#if !defined(__ASCENDC_INCLUDE_INTERNAL_HEADERS__)
16	-#pragma message("impl/basic_api/kernel_operator_vec_transpose_intf_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file may be removed in the future. Please use \"#include \"basic_api/kernel_operator_vec_transpose_intf.h\"\" and use public functions or variables defined in interface headers files.")	16	+#pragma message( \
		17	+ "impl/basic_api/kernel_operator_vec_transpose_intf_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file may be removed in the future. Please use \"#include \"basic_api/kernel_operator_vec_transpose_intf.h\"\" and use public functions or variables defined in interface headers files.")
17	#define __ASCENDC_INCLUDE_INTERNAL_HEADERS__	18	#define __ASCENDC_INCLUDE_INTERNAL_HEADERS__
18	#define __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_KERNEL_OPERATOR_VEC_TRANSPOSE_INTF_IMPL_H__	19	#define __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_KERNEL_OPERATOR_VEC_TRANSPOSE_INTF_IMPL_H__
19	#endif	20	#endif
	@@ -55,19 +56,35 @@ template <typename T>
55	__aicore__ inline void CheckTransDataTo5HDParams(const TransDataTo5HDParams& nchwconvParams)	56	__aicore__ inline void CheckTransDataTo5HDParams(const TransDataTo5HDParams& nchwconvParams)
56	{	57	{
57	using PrimType = PrimT<T>;	58	using PrimType = PrimT<T>;
58	- ASCENDC_DEBUG_ASSERT((SupportType<PrimType, int8_t, uint8_t, int16_t, uint16_t, half, int32_t, uint32_t, float>()),	59	+
59	- KERNEL_LOG_INTERNAL(KERNEL_ERROR, "Failed to check dtype in TransDataTo5HD, current api support dtype is "	60	+#if (__NPU_ARCH__ == 3102 \|\| __NPU_ARCH__ == 3510 \|\| __NPU_ARCH__ == 5102)
60	- "int8_t / uint8_t / int16_t / uint16_t / half / int32_t / uint32_t / float.\n"));	61	+ ASCENDC_DEBUG_ASSERT(
		62	+ (SupportType<PrimType, int8_t, uint8_t, int16_t, uint16_t, half, bfloat16_t, int32_t, uint32_t, float>()),
		63	+ KERNEL_LOG_INTERNAL(
		64	+ KERNEL_ERROR, "Failed to check dtype in TransDataTo5HD, current api support dtype is "
		65	+ "int8_t / uint8_t / int16_t / uint16_t / half / bfloat16_t / int32_t / uint32_t / float.\n"));
		66	+#else
		67	+ ASCENDC_DEBUG_ASSERT(
		68	+ (SupportType<PrimType, int8_t, uint8_t, int16_t, uint16_t, half, int32_t, uint32_t, float>()),
		69	+ KERNEL_LOG_INTERNAL(
		70	+ KERNEL_ERROR, "Failed to check dtype in TransDataTo5HD, current api support dtype is "
		71	+ "int8_t / uint8_t / int16_t / uint16_t / half / int32_t / uint32_t / float.\n"));
		72	+#endif
61	// dstHighHalf/srcHighHalf only valid for int8_t/uint8_t	73	// dstHighHalf/srcHighHalf only valid for int8_t/uint8_t
62	if constexpr (!SupportType<PrimType, int8_t, uint8_t>()) {	74	if constexpr (!SupportType<PrimType, int8_t, uint8_t>()) {
63	- ASCENDC_DEBUG_ASSERT((nchwconvParams.dstHighHalf == false),	75	+ ASCENDC_DEBUG_ASSERT(
64	- KERNEL_LOG_INTERNAL(KERNEL_ERROR, "Failed to check dstHighHalf in TransDataTo5HD with TransDataTo5HDParams, "	76	+ (nchwconvParams.dstHighHalf == false),
65	- "dstHighHalf is only valid for int8_t / uint8_t dtype.\n"));	77	+ KERNEL_LOG_INTERNAL(
66	- ASCENDC_DEBUG_ASSERT((nchwconvParams.srcHighHalf == false),	78	+ KERNEL_ERROR, "Failed to check dstHighHalf in TransDataTo5HD with TransDataTo5HDParams, "
67	- KERNEL_LOG_INTERNAL(KERNEL_ERROR, "Failed to check srcHighHalf in TransDataTo5HD with TransDataTo5HDParams, "	79	+ "dstHighHalf is only valid for int8_t / uint8_t dtype.\n"));
68	- "srcHighHalf is only valid for int8_t / uint8_t dtype.\n"));	80	+ ASCENDC_DEBUG_ASSERT(
		81	+ (nchwconvParams.srcHighHalf == false),
		82	+ KERNEL_LOG_INTERNAL(
		83	+ KERNEL_ERROR, "Failed to check srcHighHalf in TransDataTo5HD with TransDataTo5HDParams, "
		84	+ "srcHighHalf is only valid for int8_t / uint8_t dtype.\n"));
69	}	85	}
70	- CheckValueRange<int32_t>(nchwconvParams.repeatTimes, 0, 255, "repeatTimes", "TransDataTo5HD with TransDataTo5HDParams");	86	+ CheckValueRange<int32_t>(
		87	+ nchwconvParams.repeatTimes, 0, 255, "repeatTimes", "TransDataTo5HD with TransDataTo5HDParams");
71	}	88	}
72		89
73	/* **************************************************************************************************	90	/* **************************************************************************************************
	@@ -79,14 +96,17 @@ __aicore__ inline void CheckTransDataTo5HDParams(const TransDataTo5HDParams& nch
79	* @param [out] dst output LocalTensor	96	* @param [out] dst output LocalTensor
80	* @param [in] src input LocalTensor	97	* @param [in] src input LocalTensor
81	*/	98	*/
82	-template <typename T> __aicore__ inline void Transpose(const LocalTensor<T>& dst, const LocalTensor<T>& src)	99	+template <typename T>
		100	+__aicore__ inline void Transpose(const LocalTensor<T>& dst, const LocalTensor<T>& src)
83	{	101	{
84	#ifdef __MSTX_DFX_REPORT__	102	#ifdef __MSTX_DFX_REPORT__
85	MstxTensor::GetMstxVecTransposeInfo(dst, src, "Transpose");	103	MstxTensor::GetMstxVecTransposeInfo(dst, src, "Transpose");
86	#endif	104	#endif
87	- ASCENDC_ASSERT((SupportType<PrimT<T>, int16_t, uint16_t, half>()),	105	+ ASCENDC_ASSERT((SupportType<PrimT<T>, int16_t, uint16_t, half>()), {
88	- {KERNEL_LOG(KERNEL_ERROR, "Failed to check dtype in Transpose, current api support dtype combination is "	106	+ KERNEL_LOG(
89	- "src and dst both: int16_t, uint16_t, half");});	107	+ KERNEL_ERROR, "Failed to check dtype in Transpose, current api support dtype combination is "
		108	+ "src and dst both: int16_t, uint16_t, half");
		109	+ });
90	#if ASCENDC_CPU_DEBUG	110	#if ASCENDC_CPU_DEBUG
91	if (!CheckFunTranspose(dst, src, "Transpose")) {	111	if (!CheckFunTranspose(dst, src, "Transpose")) {
92	ASCENDC_REPORT_CHECK_ERROR("Transpose", KernelFuncType::NONE_MODE);	112	ASCENDC_REPORT_CHECK_ERROR("Transpose", KernelFuncType::NONE_MODE);
	@@ -110,7 +130,8 @@ template <typename T> __aicore__ inline void Transpose(const LocalTensor<T>& dst
110	* @param [in] nchwconvParams.srcRepStride src repeat stride	130	* @param [in] nchwconvParams.srcRepStride src repeat stride
111	*/	131	*/
112	template <typename T>	132	template <typename T>
113	-__aicore__ inline void TransDataTo5HD(const LocalTensor<T> (&dstList)[NCHW_CONV_ADDR_LIST_SIZE],	133	+__aicore__ inline void TransDataTo5HD(
		134	+ const LocalTensor<T> (&dstList)[NCHW_CONV_ADDR_LIST_SIZE],
114	const LocalTensor<T> (&srcList)[NCHW_CONV_ADDR_LIST_SIZE], const TransDataTo5HDParams& nchwconvParams)	135	const LocalTensor<T> (&srcList)[NCHW_CONV_ADDR_LIST_SIZE], const TransDataTo5HDParams& nchwconvParams)
115	{	136	{
116	#if defined(ASCENDC_DEBUG) \|\| defined(ASCENDC_CPU_DEBUG)	137	#if defined(ASCENDC_DEBUG) \|\| defined(ASCENDC_CPU_DEBUG)
	@@ -139,8 +160,9 @@ __aicore__ inline void TransDataTo5HD(const LocalTensor<T> (&dstList)[NCHW_CONV_
139	}	160	}
140		161
141	template <typename T>	162	template <typename T>
142	-__aicore__ inline void TransDataTo5HD(uint64_t dstList[NCHW_CONV_ADDR_LIST_SIZE],	163	+__aicore__ inline void TransDataTo5HD(
143	- uint64_t srcList[NCHW_CONV_ADDR_LIST_SIZE], const TransDataTo5HDParams& nchwconvParams)	164	+ uint64_t dstList[NCHW_CONV_ADDR_LIST_SIZE], uint64_t srcList[NCHW_CONV_ADDR_LIST_SIZE],
		165	+ const TransDataTo5HDParams& nchwconvParams)
144	{	166	{
145	#if defined(ASCENDC_DEBUG) \|\| defined(ASCENDC_CPU_DEBUG)	167	#if defined(ASCENDC_DEBUG) \|\| defined(ASCENDC_CPU_DEBUG)
146	CheckTransDataTo5HDParams<T>(nchwconvParams);	168	CheckTransDataTo5HDParams<T>(nchwconvParams);
	@@ -151,24 +173,29 @@ __aicore__ inline void TransDataTo5HD(uint64_t dstList[NCHW_CONV_ADDR_LIST_SIZE]
151	#endif	173	#endif
152	#if ASCENDC_CPU_DEBUG	174	#if ASCENDC_CPU_DEBUG
153	for (int8_t i = 0; i < NCHW_CONV_ADDR_LIST_SIZE; i++) {	175	for (int8_t i = 0; i < NCHW_CONV_ADDR_LIST_SIZE; i++) {
154	- uint64_t dstAddr = (uint8_t *)dstList[i] -	176	+ uint64_t dstAddr =
155	- (uint8_t*)(GetTPipePtr()->GetBaseAddr(int8_t(AscendC::TPosition(TPosition::VECIN))));	177	+ (uint8_t)dstList[i] - (uint8_t)(GetTPipePtr()->GetBaseAddr(int8_t(AscendC::TPosition(TPosition::VECIN))));
156	- uint64_t srcAddr = (uint8_t *)srcList[i] -	178	+ uint64_t srcAddr =
157	- (uint8_t*)(GetTPipePtr()->GetBaseAddr(int8_t(AscendC::TPosition(TPosition::VECIN))));	179	+ (uint8_t)srcList[i] - (uint8_t)(GetTPipePtr()->GetBaseAddr(int8_t(AscendC::TPosition(TPosition::VECIN))));
158	- ASCENDC_DEBUG_ASSERT((dstAddr % ONE_BLK_SIZE == 0),	180	+ ASCENDC_DEBUG_ASSERT(
159	- KERNEL_LOG_INTERNAL(KERNEL_ERROR, "Failed to check dst tensor address list alignment in TransDataTo5HD, "	181	+ (dstAddr % ONE_BLK_SIZE == 0),
160	- "it should be 32B aligned.\n"));	182	+ KERNEL_LOG_INTERNAL(
161	- ASCENDC_DEBUG_ASSERT((srcAddr % ONE_BLK_SIZE == 0),	183	+ KERNEL_ERROR, "Failed to check dst tensor address list alignment in TransDataTo5HD, "
162	- KERNEL_LOG_INTERNAL(KERNEL_ERROR, "Failed to check src tensor address list alignment in TransDataTo5HD, "	184	+ "it should be 32B aligned.\n"));
163	- "it should be 32B aligned.\n"));	185	+ ASCENDC_DEBUG_ASSERT(
		186	+ (srcAddr % ONE_BLK_SIZE == 0),
		187	+ KERNEL_LOG_INTERNAL(
		188	+ KERNEL_ERROR, "Failed to check src tensor address list alignment in TransDataTo5HD, "
		189	+ "it should be 32B aligned.\n"));
164	}	190	}
165	#endif	191	#endif
166	TransDataTo5HDImpl<T>(dstList, srcList, nchwconvParams);	192	TransDataTo5HDImpl<T>(dstList, srcList, nchwconvParams);
167	}	193	}
168		194
169	template <typename T>	195	template <typename T>
170	-__aicore__ inline void Transpose(const LocalTensor<T> &dst, const LocalTensor<T> &src,	196	+__aicore__ inline void Transpose(
171	- const LocalTensor<uint8_t> &sharedTmpBuffer, const TransposeParamsExt &transposeParams)	197	+ const LocalTensor<T>& dst, const LocalTensor<T>& src, const LocalTensor<uint8_t>& sharedTmpBuffer,
		198	+ const TransposeParamsExt& transposeParams)
172	{	199	{
173	#ifdef __MSTX_DFX_REPORT__	200	#ifdef __MSTX_DFX_REPORT__
174	MstxTensor::GetMstxVecTransposeTempInfo(dst, src, sharedTmpBuffer, "Transpose");	201	MstxTensor::GetMstxVecTransposeTempInfo(dst, src, sharedTmpBuffer, "Transpose");
	@@ -181,30 +208,41 @@ __aicore__ inline void Transpose(const LocalTensor<T> &dst, const LocalTensor<T>
181	if ((transposeParams.transposeType == TransposeType::TRANSPOSE_ND2ND_B16) &&	208	if ((transposeParams.transposeType == TransposeType::TRANSPOSE_ND2ND_B16) &&
182	(transposeParams.hSize == NCHW_CONV_ADDR_LIST_SIZE) && (transposeParams.wSize == NCHW_CONV_ADDR_LIST_SIZE)) {	209	(transposeParams.hSize == NCHW_CONV_ADDR_LIST_SIZE) && (transposeParams.wSize == NCHW_CONV_ADDR_LIST_SIZE)) {
183	#if (__NPU_ARCH__ == 3510) \|\| (__NPU_ARCH__ == 5102)	210	#if (__NPU_ARCH__ == 3510) \|\| (__NPU_ARCH__ == 5102)
184	- ASCENDC_ASSERT((SupportType<PrimT<T>, int16_t, uint16_t, half>()),	211	+ ASCENDC_ASSERT((SupportType<PrimT<T>, int16_t, uint16_t, half>()), {
185	- {KERNEL_LOG(KERNEL_ERROR, "Failed to check dtype in Transpose when transposeType is TRANSPOSE_ND2ND_B16, "	212	+ KERNEL_LOG(
186	- "current api support dtype combination is src and dst both: int16_t, uint16_t, half");});	213	+ KERNEL_ERROR, "Failed to check dtype in Transpose when transposeType is TRANSPOSE_ND2ND_B16, "
		214	+ "current api support dtype combination is src and dst both: int16_t, uint16_t, half");
		215	+ });
187	#else	216	#else
188	- ASCENDC_ASSERT((SupportType<PrimT<T>, uint16_t>()),	217	+ ASCENDC_ASSERT((SupportType<PrimT<T>, uint16_t>()), {
189	- {KERNEL_LOG(KERNEL_ERROR, "Failed to check dtype in Transpose when transposeType is TRANSPOSE_ND2ND_B16, "	218	+ KERNEL_LOG(
190	- "current api support dtype combination is src and dst both: uint16_t");});	219	+ KERNEL_ERROR, "Failed to check dtype in Transpose when transposeType is TRANSPOSE_ND2ND_B16, "
		220	+ "current api support dtype combination is src and dst both: uint16_t");
		221	+ });
191	#endif	222	#endif
192	- TransposeImpl((__ubuf__ PrimT<T> )dst.GetPhyAddr(), (__ubuf__ PrimT<T> )src.GetPhyAddr());	223	+ TransposeImpl((__ubuf__ PrimT<T>)dst.GetPhyAddr(), (__ubuf__ PrimT<T>)src.GetPhyAddr());
193	- } else if (transposeParams.transposeType == TransposeType::TRANSPOSE_NCHW2NHWC \|\|	224	+ } else if (
		225	+ transposeParams.transposeType == TransposeType::TRANSPOSE_NCHW2NHWC \|\|
194	transposeParams.transposeType == TransposeType::TRANSPOSE_NHWC2NCHW) {	226	transposeParams.transposeType == TransposeType::TRANSPOSE_NHWC2NCHW) {
195	if (transposeParams.cSize == 1) {	227	if (transposeParams.cSize == 1) {
196	struct DataCopyParams repeatParams;	228	struct DataCopyParams repeatParams;
197	repeatParams.blockLen = transposeParams.nSize * transposeParams.cSize * transposeParams.hSize *	229	repeatParams.blockLen = transposeParams.nSize * transposeParams.cSize * transposeParams.hSize *
198	- transposeParams.wSize / AscendCUtils::GetC0Count(sizeof(PrimT<T>));	230	+ transposeParams.wSize / AscendCUtils::GetC0Count(sizeof(PrimT<T>));
199	- TransposeUB2UBImpl((__ubuf__ PrimT<T> )dst.GetPhyAddr(), (__ubuf__ PrimT<T> )src.GetPhyAddr(), repeatParams);	231	+ TransposeUB2UBImpl(
		232	+ (__ubuf__ PrimT<T>)dst.GetPhyAddr(), (__ubuf__ PrimT<T>)src.GetPhyAddr(), repeatParams);
200	} else {	233	} else {
201	#if ASCENDC_CPU_DEBUG	234	#if ASCENDC_CPU_DEBUG
202	- uint32_t imageSize = transposeParams.hSize * transposeParams.wSize; // uint16 * uint16	235	+ uint32_t imageSize = transposeParams.hSize * transposeParams.wSize; // uint16 * uint16
203	ASCENDC_CHECK_VALUE_RANGE(transposeParams.cSize, 0, UINT12_MAX, "cSize", "Transpose");	236	ASCENDC_CHECK_VALUE_RANGE(transposeParams.cSize, 0, UINT12_MAX, "cSize", "Transpose");
204	ASCENDC_CHECK_VALUE_RANGE(imageSize, 0, UINT12_MAX, "hSize * wSize", "Transpose");	237	ASCENDC_CHECK_VALUE_RANGE(imageSize, 0, UINT12_MAX, "hSize * wSize", "Transpose");
205	- ASCENDC_ASSERT(((imageSize * sizeof(PrimT<T>)) % ONE_BLK_SIZE == 0), {KERNEL_LOG(KERNEL_ERROR, "Failed to check "	238	+ ASCENDC_ASSERT(((imageSize * sizeof(PrimT<T>)) % ONE_BLK_SIZE == 0), {
206	- "hSize, wSize value in Transpose when transposeType is TRANSPOSE_NCHW2NHWC / TRANSPOSE_NHWC2NCHW, "	239	+ KERNEL_LOG(
207	- "hSize * wSize * sizeof(T) should be 32B aligned, current value is %lu.", imageSize * sizeof(PrimT<T>));});	240	+ KERNEL_ERROR,
		241	+ "Failed to check "
		242	+ "hSize, wSize value in Transpose when transposeType is TRANSPOSE_NCHW2NHWC / TRANSPOSE_NHWC2NCHW, "
		243	+ "hSize * wSize * sizeof(T) should be 32B aligned, current value is %lu.",
		244	+ imageSize * sizeof(PrimT<T>));
		245	+ });
208	#endif	246	#endif
209	Transpose4DImpl(dst, src, sharedTmpBuffer, transposeParams);	247	Transpose4DImpl(dst, src, sharedTmpBuffer, transposeParams);
210	}	248	}
	@@ -212,8 +250,8 @@ __aicore__ inline void Transpose(const LocalTensor<T> &dst, const LocalTensor<T>
212	}	250	}
213	#pragma end_pipe	251	#pragma end_pipe
214	template <typename T>	252	template <typename T>
215	-__aicore__ inline __in_pipe__(S) __out_pipe__(V) void TransDataTo5HD(const LocalTensor<uint64_t> &dst,	253	+__aicore__ inline __in_pipe__(S) __out_pipe__(V) void TransDataTo5HD(
216	- const LocalTensor<uint64_t> &src, const TransDataTo5HDParams &nchwconvParams)	254	+ const LocalTensor<uint64_t>& dst, const LocalTensor<uint64_t>& src, const TransDataTo5HDParams& nchwconvParams)
217	{	255	{
218	#if defined(ASCENDC_DEBUG) \|\| defined(ASCENDC_CPU_DEBUG)	256	#if defined(ASCENDC_DEBUG) \|\| defined(ASCENDC_CPU_DEBUG)
219	CheckTransDataTo5HDParams<T>(nchwconvParams);	257	CheckTransDataTo5HDParams<T>(nchwconvParams);
	@@ -239,18 +277,19 @@ __aicore__ inline __in_pipe__(S) __out_pipe__(V) void TransDataTo5HD(const Local
239	constexpr uint64_t vaBit2 = 32;	277	constexpr uint64_t vaBit2 = 32;
240	constexpr uint64_t vaBit3 = 48;	278	constexpr uint64_t vaBit3 = 48;
241		279
242	- for (uint32_t i = 0; i < vaRegSize; i++)	280	+ for (uint32_t i = 0; i < vaRegSize; i++) {
243	- {	281	+ uint64_t dstAddrConfig =
244	- uint64_t dstAddrConfig = (((dst.GetValue(vaRegSize * i) >> vaAddr) & vaMask) \|	282	+ (((dst.GetValue(vaRegSize * i) >> vaAddr) & vaMask) \|
245	- (((dst.GetValue(vaRegSize * i + vaOne) >> vaAddr) & vaMask) << vaBit1) \|	283	+ (((dst.GetValue(vaRegSize * i + vaOne) >> vaAddr) & vaMask) << vaBit1) \|
246	- (((dst.GetValue(vaRegSize * i + vaTwo) >> vaAddr) & vaMask) << vaBit2) \|	284	+ (((dst.GetValue(vaRegSize * i + vaTwo) >> vaAddr) & vaMask) << vaBit2) \|
247	- (((dst.GetValue(vaRegSize * i + vaThree) >> vaAddr) & vaMask) << vaBit3));	285	+ (((dst.GetValue(vaRegSize * i + vaThree) >> vaAddr) & vaMask) << vaBit3));
248	dst.SetValue(i, dstAddrConfig);	286	dst.SetValue(i, dstAddrConfig);
249		287
250	- uint64_t srcAddrConfig = (((src.GetValue(vaRegSize * i) >> vaAddr) & vaMask) \|	288	+ uint64_t srcAddrConfig =
251	- (((src.GetValue(vaRegSize * i + vaOne) >> vaAddr) & vaMask) << vaBit1) \|	289	+ (((src.GetValue(vaRegSize * i) >> vaAddr) & vaMask) \|
252	- (((src.GetValue(vaRegSize * i + vaTwo) >> vaAddr) & vaMask) << vaBit2) \|	290	+ (((src.GetValue(vaRegSize * i + vaOne) >> vaAddr) & vaMask) << vaBit1) \|
253	- (((src.GetValue(vaRegSize * i + vaThree) >> vaAddr) & vaMask) << vaBit3));	291	+ (((src.GetValue(vaRegSize * i + vaTwo) >> vaAddr) & vaMask) << vaBit2) \|
		292	+ (((src.GetValue(vaRegSize * i + vaThree) >> vaAddr) & vaMask) << vaBit3));
254	src.SetValue(i, srcAddrConfig);	293	src.SetValue(i, srcAddrConfig);
255	}	294	}
256		295
	@@ -266,4 +305,4 @@ __aicore__ inline __in_pipe__(S) __out_pipe__(V) void TransDataTo5HD(const Local
266	#if defined(__UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_KERNEL_OPERATOR_VEC_TRANSPOSE_INTF_IMPL_H__)	305	#if defined(__UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_KERNEL_OPERATOR_VEC_TRANSPOSE_INTF_IMPL_H__)
267	#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__	306	#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__
268	#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_KERNEL_OPERATOR_VEC_TRANSPOSE_INTF_IMPL_H__	307	#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_KERNEL_OPERATOR_VEC_TRANSPOSE_INTF_IMPL_H__
269	-#endif	308	+#endif