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refactor: impl目录下的代码格式 #4211
maohp_hw创建于 7月9日
refactor: impl目录下的代码格式 #4211
已合并
maohp_hw创建于 7月9日
从haipingmao/asc-devkitbr_codestyle_impl2合入到cann/asc-devkitmaster
共 264 个文件变更+6836-6876
M.pre-commit-config.yaml+1-1
@@ -32,7 +32,7 @@ repos:
32 - id: clang-format32 - id: clang-format
33 types_or: [file]33 types_or: [file]
34 files: \.(c|h|cpp|hpp|cc|hh|cxx|hxx|asc)$34 files: \.(c|h|cpp|hpp|cc|hh|cxx|hxx|asc)$
35- exclude: ^(tests/python/aclrt_launch_kernel/stub_files/|impl/|include/(?!adv_api/))35+ exclude: ^(tests/python/aclrt_launch_kernel/stub_files/|impl/basic_api/|impl/c_api/|include/(?!adv_api/))
36 args:36 args:
37 - "--style=file"37 - "--style=file"
38 - "--verbose"38 - "--verbose"
Mclassify_rule.yaml+5-0
@@ -256,6 +256,11 @@ asc-devkit:
256 - impl/adv_api/detail/conv/conv3d/conv3d_iterate_impl.h256 - impl/adv_api/detail/conv/conv3d/conv3d_iterate_impl.h
257 - impl/adv_api/detail/conv_backprop/conv3d_backprop_input/dav_v220/conv3d_bp_input_sub_func.h257 - impl/adv_api/detail/conv_backprop/conv3d_backprop_input/dav_v220/conv3d_bp_input_sub_func.h
258 - impl/adv_api/detail/api_check/kernel_check/math/logical_ands/logical_ands_check.h258 - impl/adv_api/detail/api_check/kernel_check/math/logical_ands/logical_ands_check.h
259+ - impl/simt_api/cpp/kernel_simt_warp_level_intf_impl.h
260+ - impl/simt_api/cpp/kernel_simt_bessel_intf_impl.h
261+ - impl/simt_api/cpp/kernel_simt_cast_intf_impl.h
262+ - impl/simt_api/cpp/kernel_simt_atomic_intf_impl.h
263+ 
259 264 
260 llt:265 llt:
261 ut_check: true266 ut_check: true
Mimpl/aicpu_api/aicpu_dump.cpp+15-14
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/*!11/*!
12 * \file aicpu_dump.cpp12 * \file aicpu_dump.cpp
@@ -20,7 +20,7 @@
20#include "aicpu_api/aicpu_api.h"20#include "aicpu_api/aicpu_api.h"
21 21 
22struct DumpConfig {22struct DumpConfig {
23- void *dumpBufAddr;23+ void* dumpBufAddr;
24 size_t dumpBufSize;24 size_t dumpBufSize;
25 size_t dumpOffset;25 size_t dumpOffset;
26};26};
@@ -31,10 +31,10 @@ DumpConfig g_aicpuDumpConfig = {reinterpret_cast<void*>(0x8), 0x100000, 0x0};
31}31}
32 32 
33namespace AscendC {33namespace AscendC {
34-void printf(const char *fmt, ...)34+void printf(const char* fmt, ...)
35{35{
36 std::lock_guard<std::mutex> lock(dump_mutex);36 std::lock_guard<std::mutex> lock(dump_mutex);
37- void *aicpuDumpBuffer = g_aicpuDumpConfig.dumpBufAddr;37+ void* aicpuDumpBuffer = g_aicpuDumpConfig.dumpBufAddr;
38 size_t aicpuDumpBufSize = g_aicpuDumpConfig.dumpBufSize;38 size_t aicpuDumpBufSize = g_aicpuDumpConfig.dumpBufSize;
39 size_t aicpuDumpOffSet = 0;39 size_t aicpuDumpOffSet = 0;
40 if (aicpuDumpBuffer) {40 if (aicpuDumpBuffer) {
@@ -47,9 +47,10 @@ void printf(const char *fmt, ...)
47 }47 }
48 va_list otherArgs;48 va_list otherArgs;
49 va_start(otherArgs, fmt);49 va_start(otherArgs, fmt);
50- aicpuDumpOffSet += vsnprintf_s(reinterpret_cast<char *>(aicpuDumpBuffer) + aicpuDumpOffSet,50+ aicpuDumpOffSet += vsnprintf_s(
51- aicpuDumpBufSize - aicpuDumpOffSet, aicpuDumpBufSize - aicpuDumpOffSet, fmt, otherArgs);51+ reinterpret_cast<char*>(aicpuDumpBuffer) + aicpuDumpOffSet, aicpuDumpBufSize - aicpuDumpOffSet,
52+ aicpuDumpBufSize - aicpuDumpOffSet, fmt, otherArgs);
52 *reinterpret_cast<size_t*>(g_aicpuDumpConfig.dumpBufAddr) = aicpuDumpOffSet;53 *reinterpret_cast<size_t*>(g_aicpuDumpConfig.dumpBufAddr) = aicpuDumpOffSet;
53 va_end(otherArgs);54 va_end(otherArgs);
54}55}
55-}56+} // namespace AscendC
Mimpl/simt_api/asc_bf16_impl.h+269-178
@@ -32,15 +32,9 @@
32 32 
33#if (__NPU_ARCH__ == 3510) || (__NPU_ARCH__ == 5102)33#if (__NPU_ARCH__ == 3510) || (__NPU_ARCH__ == 5102)
34 34 
35-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool __hisnan(bfloat16_t x)35+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool __hisnan(bfloat16_t x) { return __isnan(x); }
36-{
37- return __isnan(x);
38-}
39 36 
40-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool __hisinf(bfloat16_t x)37+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool __hisinf(bfloat16_t x) { return __isinf(x); }
41-{
42- return __isinf(x);
43-}
44 38 
45__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __habs(bfloat16_t x)39__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __habs(bfloat16_t x)
46{40{
@@ -87,8 +81,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2cos(bfloat16x2_t x)
87 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);81 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
88 tmp1 = cosf(tmp1);82 tmp1 = cosf(tmp1);
89 tmp2 = cosf(tmp2);83 tmp2 = cosf(tmp2);
90- bfloat16_t bftmp1 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);84+ bfloat16_t bftmp1 =
91- bfloat16_t bftmp2 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);85+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);
86+ bfloat16_t bftmp2 =
87+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);
92 x = {bftmp1, bftmp2};88 x = {bftmp1, bftmp2};
93 return x;89 return x;
94}90}
@@ -106,8 +102,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2sin(bfloat16x2_t x)
106 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);102 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
107 tmp1 = sinf(tmp1);103 tmp1 = sinf(tmp1);
108 tmp2 = sinf(tmp2);104 tmp2 = sinf(tmp2);
109- bfloat16_t bftmp1 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);105+ bfloat16_t bftmp1 =
110- bfloat16_t bftmp2 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);106+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);
107+ bfloat16_t bftmp2 =
108+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);
111 x = {bftmp1, bftmp2};109 x = {bftmp1, bftmp2};
112 return x;110 return x;
113}111}
@@ -125,8 +123,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2tanh(bfloat16x2_t x)
125 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);123 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
126 tmp1 = tanhf(tmp1);124 tmp1 = tanhf(tmp1);
127 tmp2 = tanhf(tmp2);125 tmp2 = tanhf(tmp2);
128- bfloat16_t bftmp1 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);126+ bfloat16_t bftmp1 =
129- bfloat16_t bftmp2 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);127+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);
128+ bfloat16_t bftmp2 =
129+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);
130 x = {bftmp1, bftmp2};130 x = {bftmp1, bftmp2};
131 return x;131 return x;
132}132}
@@ -144,8 +144,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2exp(bfloat16x2_t x)
144 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);144 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
145 tmp1 = expf(tmp1);145 tmp1 = expf(tmp1);
146 tmp2 = expf(tmp2);146 tmp2 = expf(tmp2);
147- bfloat16_t bftmp1 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);147+ bfloat16_t bftmp1 =
148- bfloat16_t bftmp2 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);148+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);
149+ bfloat16_t bftmp2 =
150+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);
149 x = {bftmp1, bftmp2};151 x = {bftmp1, bftmp2};
150 return x;152 return x;
151}153}
@@ -163,8 +165,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2exp2(bfloat16x2_t x)
163 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);165 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
164 tmp1 = exp2f(tmp1);166 tmp1 = exp2f(tmp1);
165 tmp2 = exp2f(tmp2);167 tmp2 = exp2f(tmp2);
166- bfloat16_t bftmp1 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);168+ bfloat16_t bftmp1 =
167- bfloat16_t bftmp2 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);169+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);
170+ bfloat16_t bftmp2 =
171+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);
168 x = {bftmp1, bftmp2};172 x = {bftmp1, bftmp2};
169 return x;173 return x;
170}174}
@@ -182,8 +186,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2exp10(bfloat16x2_t x)
182 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);186 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
183 tmp1 = exp10f(tmp1);187 tmp1 = exp10f(tmp1);
184 tmp2 = exp10f(tmp2);188 tmp2 = exp10f(tmp2);
185- bfloat16_t bftmp1 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);189+ bfloat16_t bftmp1 =
186- bfloat16_t bftmp2 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);190+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);
191+ bfloat16_t bftmp2 =
192+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);
187 x = {bftmp1, bftmp2};193 x = {bftmp1, bftmp2};
188 return x;194 return x;
189}195}
@@ -201,8 +207,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2log(bfloat16x2_t x)
201 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);207 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
202 tmp1 = logf(tmp1);208 tmp1 = logf(tmp1);
203 tmp2 = logf(tmp2);209 tmp2 = logf(tmp2);
204- bfloat16_t bftmp1 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);210+ bfloat16_t bftmp1 =
205- bfloat16_t bftmp2 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);211+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);
212+ bfloat16_t bftmp2 =
213+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);
206 x = {bftmp1, bftmp2};214 x = {bftmp1, bftmp2};
207 return x;215 return x;
208}216}
@@ -220,8 +228,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2log2(bfloat16x2_t x)
220 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);228 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
221 tmp1 = log2f(tmp1);229 tmp1 = log2f(tmp1);
222 tmp2 = log2f(tmp2);230 tmp2 = log2f(tmp2);
223- bfloat16_t bftmp1 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);231+ bfloat16_t bftmp1 =
224- bfloat16_t bftmp2 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);232+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);
233+ bfloat16_t bftmp2 =
234+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);
225 x = {bftmp1, bftmp2};235 x = {bftmp1, bftmp2};
226 return x;236 return x;
227}237}
@@ -239,8 +249,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2log10(bfloat16x2_t x)
239 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);249 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
240 tmp1 = log10f(tmp1);250 tmp1 = log10f(tmp1);
241 tmp2 = log10f(tmp2);251 tmp2 = log10f(tmp2);
242- bfloat16_t bftmp1 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);252+ bfloat16_t bftmp1 =
243- bfloat16_t bftmp2 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);253+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);
254+ bfloat16_t bftmp2 =
255+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);
244 x = {bftmp1, bftmp2};256 x = {bftmp1, bftmp2};
245 return x;257 return x;
246}258}
@@ -258,8 +270,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2sqrt(bfloat16x2_t x)
258 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);270 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
259 tmp1 = sqrtf(tmp1);271 tmp1 = sqrtf(tmp1);
260 tmp2 = sqrtf(tmp2);272 tmp2 = sqrtf(tmp2);
261- bfloat16_t bftmp1 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);273+ bfloat16_t bftmp1 =
262- bfloat16_t bftmp2 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);274+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);
275+ bfloat16_t bftmp2 =
276+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);
263 x = {bftmp1, bftmp2};277 x = {bftmp1, bftmp2};
264 return x;278 return x;
265}279}
@@ -277,16 +291,15 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2rsqrt(bfloat16x2_t x)
277 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);291 float tmp2 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
278 tmp1 = 1.0f / sqrtf(tmp1);292 tmp1 = 1.0f / sqrtf(tmp1);
279 tmp2 = 1.0f / sqrtf(tmp2);293 tmp2 = 1.0f / sqrtf(tmp2);
280- bfloat16_t bftmp1 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);294+ bfloat16_t bftmp1 =
281- bfloat16_t bftmp2 = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);295+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp1);
296+ bfloat16_t bftmp2 =
297+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(tmp2);
282 x = {bftmp1, bftmp2};298 x = {bftmp1, bftmp2};
283 return x;299 return x;
284}300}
285 301 
286-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t hrcp(bfloat16_t x)302+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t hrcp(bfloat16_t x) { return static_cast<bfloat16_t>(1.0) / x; }
287-{
288- return static_cast<bfloat16_t>(1.0) / x;
289-}
290 303 
291__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2rcp(bfloat16x2_t x)304__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2rcp(bfloat16x2_t x)
292{305{
@@ -295,10 +308,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2rcp(bfloat16x2_t x)
295 return {tmp1, tmp2};308 return {tmp1, tmp2};
296}309}
297 310 
298-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t hfloor(bfloat16_t x)311+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t hfloor(bfloat16_t x) { return __floorf(x); }
299-{
300- return __floorf(x);
301-}
302 312 
303__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2floor(bfloat16x2_t x)313__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2floor(bfloat16x2_t x)
304{314{
@@ -307,28 +317,22 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2floor(bfloat16x2_t x)
307 return {tmp1, tmp2};317 return {tmp1, tmp2};
308}318}
309 319 
310-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t hrint(bfloat16_t x)320+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t hrint(bfloat16_t x) { return __rintf(x); }
311-{
312- return __rintf(x);
313-}
314 321 
315__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2rint(bfloat16x2_t x)322__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2rint(bfloat16x2_t x)
316{323{
317- bfloat16_t tmp1 = __rintf(x.x);324+ bfloat16_t tmp1 = __rintf(x.x);
318- bfloat16_t tmp2 = __rintf(x.y);325+ bfloat16_t tmp2 = __rintf(x.y);
319- return {tmp1, tmp2};326+ return {tmp1, tmp2};
320}327}
321 328 
322-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t hceil(bfloat16_t x)329+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t hceil(bfloat16_t x) { return __ceilf(x); }
323-{
324- return __ceilf(x);
325-}
326 330 
327__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2ceil(bfloat16x2_t x)331__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2ceil(bfloat16x2_t x)
328{332{
329- bfloat16_t tmp1 = __ceilf(x.x);333+ bfloat16_t tmp1 = __ceilf(x.x);
330- bfloat16_t tmp2 = __ceilf(x.y);334+ bfloat16_t tmp2 = __ceilf(x.y);
331- return {tmp1, tmp2};335+ return {tmp1, tmp2};
332}336}
333 337 
334__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t htrunc(bfloat16_t x)338__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t htrunc(bfloat16_t x)
@@ -358,147 +362,183 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t h2trunc(bfloat16x2_t x)
358 return x;362 return x;
359}363}
360 364 
361-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16(const float x) {365+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16(const float x)
366+{
362 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);367 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
363}368}
364 369 
365-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rn(const float x) {370+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rn(const float x)
371+{
366 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);372 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
367}373}
368 374 
369-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rn_sat(const float x) {375+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rn_sat(const float x)
376+{
370 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);377 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
371}378}
372 379 
373-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rz(const float x) {380+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rz(const float x)
381+{
374 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);382 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
375}383}
376 384 
377-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rz_sat(const float x) {385+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rz_sat(const float x)
386+{
378 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);387 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
379}388}
380 389 
381-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rd(const float x) {390+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rd(const float x)
391+{
382 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);392 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
383}393}
384 394 
385-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rd_sat(const float x) {395+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rd_sat(const float x)
396+{
386 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);397 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
387}398}
388 399 
389-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_ru(const float x) {400+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_ru(const float x)
401+{
390 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);402 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
391}403}
392 404 
393-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_ru_sat(const float x) {405+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_ru_sat(const float x)
406+{
394 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);407 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
395}408}
396 409 
397-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rna(const float x) {410+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rna(const float x)
411+{
398 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);412 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
399}413}
400 414 
401-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rna_sat(const float x) {415+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __float2bfloat16_rna_sat(const float x)
416+{
402 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);417 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
403}418}
404 419 
405-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rn_sat(const float2 x) {420+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rn_sat(const float2 x)
421+{
406 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);422 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
407}423}
408 424 
409-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rz(const float2 x) {425+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rz(const float2 x)
426+{
410 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);427 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
411}428}
412 429 
413-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rz_sat(const float2 x) {430+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rz_sat(const float2 x)
431+{
414 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);432 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
415}433}
416 434 
417-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rd(const float2 x) {435+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rd(const float2 x)
436+{
418 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);437 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
419}438}
420 439 
421-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rd_sat(const float2 x) {440+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rd_sat(const float2 x)
441+{
422 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);442 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
423}443}
424 444 
425-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_ru(const float2 x) {445+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_ru(const float2 x)
446+{
426 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);447 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
427}448}
428 449 
429-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_ru_sat(const float2 x) {450+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_ru_sat(const float2 x)
451+{
430 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);452 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
431}453}
432 454 
433-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rna(const float2 x) {455+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rna(const float2 x)
456+{
434 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);457 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
435}458}
436 459 
437-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rna_sat(const float2 x) {460+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float22bfloat162_rna_sat(const float2 x)
461+{
438 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);462 return __cvt_bfloat16x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
439}463}
440 464 
441-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __half2bfloat16_rn(const half x) {465+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __half2bfloat16_rn(const half x)
466+{
442 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);467 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
443}468}
444 469 
445-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __half2bfloat16_rz(const half x) {470+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __half2bfloat16_rz(const half x)
471+{
446 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);472 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
447}473}
448 474 
449-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __half2bfloat16_rd(const half x) {475+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __half2bfloat16_rd(const half x)
476+{
450 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);477 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
451}478}
452 479 
453-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __half2bfloat16_ru(const half x) {480+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __half2bfloat16_ru(const half x)
481+{
454 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);482 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
455}483}
456 484 
457-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __half2bfloat16_rna(const half x) {485+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __half2bfloat16_rna(const half x)
486+{
458 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);487 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
459}488}
460 489 
461-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rn(const bfloat16_t x) {490+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rn(const bfloat16_t x)
491+{
462 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);492 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
463}493}
464 494 
465-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rn_sat(const bfloat16_t x) {495+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rn_sat(const bfloat16_t x)
496+{
466 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);497 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
467}498}
468 499 
469-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rz(const bfloat16_t x) {500+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rz(const bfloat16_t x)
501+{
470 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);502 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
471}503}
472 504 
473-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rz_sat(const bfloat16_t x) {505+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rz_sat(const bfloat16_t x)
506+{
474 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);507 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
475}508}
476 509 
477-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rd(const bfloat16_t x) {510+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rd(const bfloat16_t x)
511+{
478 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);512 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
479}513}
480 514 
481-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rd_sat(const bfloat16_t x) {515+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rd_sat(const bfloat16_t x)
516+{
482 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);517 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
483}518}
484 519 
485-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_ru(const bfloat16_t x) {520+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_ru(const bfloat16_t x)
521+{
486 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);522 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
487}523}
488 524 
489-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_ru_sat(const bfloat16_t x) {525+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_ru_sat(const bfloat16_t x)
526+{
490 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);527 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
491}528}
492 529 
493-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rna(const bfloat16_t x) {530+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rna(const bfloat16_t x)
531+{
494 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);532 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
495}533}
496 534 
497-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rna_sat(const bfloat16_t x) {535+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __bfloat162half_rna_sat(const bfloat16_t x)
536+{
498 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);537 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
499}538}
500 539 
501-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float __bfloat162float(const bfloat16_t x) {540+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float __bfloat162float(const bfloat16_t x)
541+{
502 union Data {542 union Data {
503 bfloat16_t bf;543 bfloat16_t bf;
504 unsigned int i;544 unsigned int i;
@@ -513,216 +553,261 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float __bfloat162float(const bfloat16_t x)
513 return d2.f;553 return d2.f;
514}554}
515 555 
516-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __bfloat162bfloat16_rn(const bfloat16_t x) {556+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __bfloat162bfloat16_rn(const bfloat16_t x)
557+{
517 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);558 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
518}559}
519 560 
520-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __bfloat162bfloat16_rz(const bfloat16_t x) {561+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __bfloat162bfloat16_rz(const bfloat16_t x)
562+{
521 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);563 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
522}564}
523 565 
524-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __bfloat162bfloat16_rd(const bfloat16_t x) {566+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __bfloat162bfloat16_rd(const bfloat16_t x)
567+{
525 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);568 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
526}569}
527 570 
528-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __bfloat162bfloat16_ru(const bfloat16_t x) {571+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __bfloat162bfloat16_ru(const bfloat16_t x)
572+{
529 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);573 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
530}574}
531 575 
532-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __bfloat162bfloat16_rna(const bfloat16_t x) {576+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __bfloat162bfloat16_rna(const bfloat16_t x)
577+{
533 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);578 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
534}579}
535 580 
536-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __bfloat162uint_rn(const bfloat16_t x) {581+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __bfloat162uint_rn(const bfloat16_t x)
582+{
537 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);583 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
538 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(f);584 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
539}585}
540 586 
541-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __bfloat162uint_rz(const bfloat16_t x) {587+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __bfloat162uint_rz(const bfloat16_t x)
588+{
542 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);589 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
543 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(f);590 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
544}591}
545 592 
546-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __bfloat162uint_rd(const bfloat16_t x) {593+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __bfloat162uint_rd(const bfloat16_t x)
594+{
547 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);595 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
548 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(f);596 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
549}597}
550 598 
551-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __bfloat162uint_ru(const bfloat16_t x) {599+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __bfloat162uint_ru(const bfloat16_t x)
600+{
552 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);601 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
553 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(f);602 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
554}603}
555 604 
556-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __bfloat162uint_rna(const bfloat16_t x) {605+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __bfloat162uint_rna(const bfloat16_t x)
606+{
557 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);607 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
558 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(f);608 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
559}609}
560 610 
561-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __bfloat162int_rn(const bfloat16_t x) {611+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __bfloat162int_rn(const bfloat16_t x)
612+{
562 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);613 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
563}614}
564 615 
565-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __bfloat162int_rz(const bfloat16_t x) {616+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __bfloat162int_rz(const bfloat16_t x)
617+{
566 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);618 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
567}619}
568 620 
569-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __bfloat162int_rd(const bfloat16_t x) {621+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __bfloat162int_rd(const bfloat16_t x)
622+{
570 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);623 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
571}624}
572 625 
573-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __bfloat162int_ru(const bfloat16_t x) {626+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __bfloat162int_ru(const bfloat16_t x)
627+{
574 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);628 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
575}629}
576 630 
577-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __bfloat162int_rna(const bfloat16_t x) {631+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __bfloat162int_rna(const bfloat16_t x)
632+{
578 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);633 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
579}634}
580 635 
581-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __bfloat162ull_rn(const bfloat16_t x) {636+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __bfloat162ull_rn(const bfloat16_t x)
637+{
582 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);638 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
583 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(f);639 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
584}640}
585 641 
586-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __bfloat162ull_rz(const bfloat16_t x) {642+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __bfloat162ull_rz(const bfloat16_t x)
643+{
587 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);644 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
588 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(f);645 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
589}646}
590 647 
591-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __bfloat162ull_rd(const bfloat16_t x) {648+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __bfloat162ull_rd(const bfloat16_t x)
649+{
592 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);650 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
593 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(f);651 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
594}652}
595 653 
596-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __bfloat162ull_ru(const bfloat16_t x) {654+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __bfloat162ull_ru(const bfloat16_t x)
655+{
597 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);656 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
598 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(f);657 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
599}658}
600 659 
601-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __bfloat162ull_rna(const bfloat16_t x) {660+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __bfloat162ull_rna(const bfloat16_t x)
661+{
602 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);662 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
603 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(f);663 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
604}664}
605 665 
606-__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __bfloat162ll_rn(const bfloat16_t x) {666+__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __bfloat162ll_rn(const bfloat16_t x)
667+{
607 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);668 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
608 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(f);669 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
609}670}
610 671 
611-__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __bfloat162ll_rz(const bfloat16_t x) {672+__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __bfloat162ll_rz(const bfloat16_t x)
673+{
612 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);674 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
613 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(f);675 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
614}676}
615 677 
616-__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __bfloat162ll_rd(const bfloat16_t x) {678+__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __bfloat162ll_rd(const bfloat16_t x)
679+{
617 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);680 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
618 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(f);681 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
619}682}
620 683 
621-__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __bfloat162ll_ru(const bfloat16_t x) {684+__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __bfloat162ll_ru(const bfloat16_t x)
685+{
622 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);686 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
623 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(f);687 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
624}688}
625 689 
626-__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __bfloat162ll_rna(const bfloat16_t x) {690+__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __bfloat162ll_rna(const bfloat16_t x)
691+{
627 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);692 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
628 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(f);693 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(f);
629}694}
630 695 
631-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __uint2bfloat16_rn(const unsigned int x) {696+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __uint2bfloat16_rn(const unsigned int x)
697+{
632 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);698 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
633}699}
634 700 
635-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __uint2bfloat16_rz(const unsigned int x) {701+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __uint2bfloat16_rz(const unsigned int x)
702+{
636 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);703 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
637}704}
638 705 
639-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __uint2bfloat16_rd(const unsigned int x) {706+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __uint2bfloat16_rd(const unsigned int x)
707+{
640 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);708 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
641}709}
642 710 
643-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __uint2bfloat16_ru(const unsigned int x) {711+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __uint2bfloat16_ru(const unsigned int x)
712+{
644 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);713 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
645}714}
646 715 
647-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __uint2bfloat16_rna(const unsigned int x) {716+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __uint2bfloat16_rna(const unsigned int x)
717+{
648 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);718 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
649}719}
650 720 
651-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __int2bfloat16_rn(const int x) {721+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __int2bfloat16_rn(const int x)
722+{
652 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);723 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
653}724}
654 725 
655-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __int2bfloat16_rz(const int x) {726+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __int2bfloat16_rz(const int x)
727+{
656 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);728 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
657}729}
658 730 
659-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __int2bfloat16_rd(const int x) {731+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __int2bfloat16_rd(const int x)
732+{
660 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);733 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
661}734}
662 735 
663-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __int2bfloat16_ru(const int x) {736+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __int2bfloat16_ru(const int x)
737+{
664 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);738 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
665}739}
666 740 
667-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __int2bfloat16_rna(const int x) {741+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __int2bfloat16_rna(const int x)
742+{
668 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);743 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
669}744}
670 745 
671-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ull2bfloat16_rn(const unsigned long long int x) {746+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ull2bfloat16_rn(const unsigned long long int x)
747+{
672 uint64_t y = x;748 uint64_t y = x;
673 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);749 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
674 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(f);750 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
675}751}
676 752 
677-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ull2bfloat16_rz(const unsigned long long int x) {753+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ull2bfloat16_rz(const unsigned long long int x)
754+{
678 uint64_t y = x;755 uint64_t y = x;
679 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);756 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
680 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(f);757 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
681}758}
682 759 
683-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ull2bfloat16_rd(const unsigned long long int x) {760+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ull2bfloat16_rd(const unsigned long long int x)
761+{
684 uint64_t y = x;762 uint64_t y = x;
685 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);763 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
686 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(f);764 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
687}765}
688 766 
689-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ull2bfloat16_ru(const unsigned long long int x) {767+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ull2bfloat16_ru(const unsigned long long int x)
768+{
690 uint64_t y = x;769 uint64_t y = x;
691 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);770 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
692 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(f);771 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
693}772}
694 773 
695-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ull2bfloat16_rna(const unsigned long long int x) {774+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ull2bfloat16_rna(const unsigned long long int x)
775+{
696 uint64_t y = x;776 uint64_t y = x;
697 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);777 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
698 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(f);778 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
699}779}
700 780 
701-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ll2bfloat16_rn(const long long int x) {781+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ll2bfloat16_rn(const long long int x)
782+{
702 int64_t y = x;783 int64_t y = x;
703 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);784 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
704 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(f);785 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
705}786}
706 787 
707-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ll2bfloat16_rz(const long long int x) {788+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ll2bfloat16_rz(const long long int x)
789+{
708 int64_t y = x;790 int64_t y = x;
709 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(y);791 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
710 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(f);792 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
711}793}
712 794 
713-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ll2bfloat16_rd(const long long int x) {795+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ll2bfloat16_rd(const long long int x)
796+{
714 int64_t y = x;797 int64_t y = x;
715 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(y);798 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
716 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(f);799 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
717}800}
718 801 
719-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ll2bfloat16_ru(const long long int x) {802+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ll2bfloat16_ru(const long long int x)
803+{
720 int64_t y = x;804 int64_t y = x;
721 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(y);805 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
722 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(f);806 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
723}807}
724 808 
725-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ll2bfloat16_rna(const long long int x) {809+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ll2bfloat16_rna(const long long int x)
810+{
726 int64_t y = x;811 int64_t y = x;
727 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(y);812 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
728 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(f);813 return __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
@@ -731,7 +816,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ll2bfloat16_rna(const long lo
731__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float2bfloat162_rn(const float x)816__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __float2bfloat162_rn(const float x)
732{817{
733 bfloat16x2_t tmp;818 bfloat16x2_t tmp;
734- bfloat16_t bf = __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);819+ bfloat16_t bf =
820+ __cvt_bfloat16_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
735 tmp.x = bf;821 tmp.x = bf;
736 tmp.y = bf;822 tmp.y = bf;
737 return tmp;823 return tmp;
@@ -766,10 +852,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __halves2bfloat162(const bflo
766 return tmp;852 return tmp;
767}853}
768 854 
769-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __high2bfloat16(const bfloat16x2_t x)855+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __high2bfloat16(const bfloat16x2_t x) { return x.y; }
770-{
771- return x.y;
772-}
773 856 
774__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __high2bfloat162(const bfloat16x2_t x)857__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __high2bfloat162(const bfloat16x2_t x)
775{858{
@@ -792,10 +875,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __highs2bfloat162(const bfloa
792 return tmp;875 return tmp;
793}876}
794 877 
795-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __low2bfloat16(const bfloat16x2_t x)878+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __low2bfloat16(const bfloat16x2_t x) { return x.x; }
796-{
797- return x.x;
798-}
799 879 
800__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __low2bfloat162(const bfloat16x2_t x)880__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __low2bfloat162(const bfloat16x2_t x)
801{881{
@@ -832,99 +912,101 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __bfloat1622float2(const bfloat16x2
832}912}
833#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__913#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__
834#ifndef ASCENDC_CPU_DEBUG914#ifndef ASCENDC_CPU_DEBUG
835-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(__ubuf__ bfloat16_t *address, bfloat16_t val)915+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(__ubuf__ bfloat16_t* address, bfloat16_t val)
836{916{
837 atomicAdd(address, val);917 atomicAdd(address, val);
838 return *address;918 return *address;
839}919}
840 920 
841-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(__ubuf__ bfloat16x2_t *address, bfloat16x2_t val)921+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(__ubuf__ bfloat16x2_t* address, bfloat16x2_t val)
842{922{
843 return atomicAdd(address, val);923 return atomicAdd(address, val);
844}924}
845 925 
846-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(__ubuf__ bfloat16x2_t *address, bfloat16x2_t val)926+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(__ubuf__ bfloat16x2_t* address, bfloat16x2_t val)
847{927{
848 return atomicSub(address, val);928 return atomicSub(address, val);
849}929}
850 930 
851-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(__ubuf__ bfloat16x2_t *address, bfloat16x2_t val)931+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(__ubuf__ bfloat16x2_t* address, bfloat16x2_t val)
852{932{
853 return atomicExch(address, val);933 return atomicExch(address, val);
854}934}
855 935 
856-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(__ubuf__ bfloat16_t *address, bfloat16_t val)936+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(__ubuf__ bfloat16_t* address, bfloat16_t val)
857{937{
858 atomicMax(address, val);938 atomicMax(address, val);
859 return *address;939 return *address;
860}940}
861 941 
862-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(__ubuf__ bfloat16x2_t *address, bfloat16x2_t val)942+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(__ubuf__ bfloat16x2_t* address, bfloat16x2_t val)
863{943{
864 return atomicMax(address, val);944 return atomicMax(address, val);
865}945}
866 946 
867-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(__ubuf__ bfloat16_t *address, bfloat16_t val)947+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(__ubuf__ bfloat16_t* address, bfloat16_t val)
868{948{
869 atomicMin(address, val);949 atomicMin(address, val);
870 return *address;950 return *address;
871}951}
872 952 
873-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(__ubuf__ bfloat16x2_t *address, bfloat16x2_t val)953+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(__ubuf__ bfloat16x2_t* address, bfloat16x2_t val)
874{954{
875 return atomicMin(address, val);955 return atomicMin(address, val);
876}956}
877 957 
878-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(__ubuf__ bfloat16x2_t *address, bfloat16x2_t compare, bfloat16x2_t val)958+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(
959+ __ubuf__ bfloat16x2_t* address, bfloat16x2_t compare, bfloat16x2_t val)
879{960{
880 return atomicCAS(address, compare, val);961 return atomicCAS(address, compare, val);
881}962}
882#endif963#endif
883 964 
884-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(__gm__ bfloat16_t *address, bfloat16_t val)965+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(__gm__ bfloat16_t* address, bfloat16_t val)
885{966{
886 atomicAdd(address, val);967 atomicAdd(address, val);
887 return *address;968 return *address;
888}969}
889 970 
890-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(__gm__ bfloat16x2_t *address, bfloat16x2_t val)971+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(__gm__ bfloat16x2_t* address, bfloat16x2_t val)
891{972{
892 return atomicAdd(address, val);973 return atomicAdd(address, val);
893}974}
894 975 
895-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(__gm__ bfloat16x2_t *address, bfloat16x2_t val)976+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(__gm__ bfloat16x2_t* address, bfloat16x2_t val)
896{977{
897 return atomicSub(address, val);978 return atomicSub(address, val);
898}979}
899 980 
900-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(__gm__ bfloat16x2_t *address, bfloat16x2_t val)981+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(__gm__ bfloat16x2_t* address, bfloat16x2_t val)
901{982{
902 return atomicExch(address, val);983 return atomicExch(address, val);
903}984}
904 985 
905-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(__gm__ bfloat16_t *address, bfloat16_t val)986+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(__gm__ bfloat16_t* address, bfloat16_t val)
906{987{
907 atomicMax(address, val);988 atomicMax(address, val);
908 return *address;989 return *address;
909}990}
910 991 
911-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(__gm__ bfloat16x2_t *address, bfloat16x2_t val)992+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(__gm__ bfloat16x2_t* address, bfloat16x2_t val)
912{993{
913 return atomicMax(address, val);994 return atomicMax(address, val);
914}995}
915 996 
916-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(__gm__ bfloat16_t *address, bfloat16_t val)997+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(__gm__ bfloat16_t* address, bfloat16_t val)
917{998{
918 atomicMin(address, val);999 atomicMin(address, val);
919 return *address;1000 return *address;
920}1001}
921 1002 
922-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(__gm__ bfloat16x2_t *address, bfloat16x2_t val)1003+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(__gm__ bfloat16x2_t* address, bfloat16x2_t val)
923{1004{
924 return atomicMin(address, val);1005 return atomicMin(address, val);
925}1006}
926 1007 
927-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(__gm__ bfloat16x2_t *address, bfloat16x2_t compare, bfloat16x2_t val)1008+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(
1009+ __gm__ bfloat16x2_t* address, bfloat16x2_t compare, bfloat16x2_t val)
928{1010{
929 return atomicCAS(address, compare, val);1011 return atomicCAS(address, compare, val);
930}1012}
@@ -936,7 +1018,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_ldcg(__gm__ bfloat16_t* add
936 1018 
937__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_ldcg(__gm__ bfloat16x2_t* address)1019__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_ldcg(__gm__ bfloat16x2_t* address)
938{1020{
939- int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(reinterpret_cast<__gm__ int32_t*>(address));1021+ int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(
1022+ reinterpret_cast<__gm__ int32_t*>(address));
940 return reinterpret_cast<bfloat16x2_t&>(t);1023 return reinterpret_cast<bfloat16x2_t&>(t);
941}1024}
942 1025 
@@ -947,7 +1030,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_ldca(__gm__ bfloat16_t* add
947 1030 
948__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_ldca(__gm__ bfloat16x2_t* address)1031__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_ldca(__gm__ bfloat16x2_t* address)
949{1032{
950- int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(reinterpret_cast<__gm__ int32_t*>(address));1033+ int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(
1034+ reinterpret_cast<__gm__ int32_t*>(address));
951 return reinterpret_cast<bfloat16x2_t&>(t);1035 return reinterpret_cast<bfloat16x2_t&>(t);
952}1036}
953 1037 
@@ -958,7 +1042,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(__gm__ bfloat16_t* address,
958 1042 
959__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(__gm__ bfloat16x2_t* address, bfloat16x2_t val)1043__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(__gm__ bfloat16x2_t* address, bfloat16x2_t val)
960{1044{
961- __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(reinterpret_cast<__gm__ int32_t*>(address), reinterpret_cast<int32_t&>(val));1045+ __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(
1046+ reinterpret_cast<__gm__ int32_t*>(address), reinterpret_cast<int32_t&>(val));
962}1047}
963 1048 
964__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ bfloat16_t* address, bfloat16_t val)1049__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ bfloat16_t* address, bfloat16_t val)
@@ -968,55 +1053,57 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ bfloat16_t* address,
968 1053 
969__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ bfloat16x2_t* address, bfloat16x2_t val)1054__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ bfloat16x2_t* address, bfloat16x2_t val)
970{1055{
971- __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(reinterpret_cast<__gm__ int32_t*>(address), reinterpret_cast<int32_t&>(val));1056+ __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(
1057+ reinterpret_cast<__gm__ int32_t*>(address), reinterpret_cast<int32_t&>(val));
972}1058}
973 1059 
974#else1060#else
975#ifndef ASCENDC_CPU_DEBUG1061#ifndef ASCENDC_CPU_DEBUG
976-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(bfloat16_t *address, bfloat16_t val)1062+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(bfloat16_t* address, bfloat16_t val)
977{1063{
978 __atomic_add(address, val);1064 __atomic_add(address, val);
979 return *address;1065 return *address;
980}1066}
981 1067 
982-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(bfloat16x2_t *address, bfloat16x2_t val)1068+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(bfloat16x2_t* address, bfloat16x2_t val)
983{1069{
984 return __atomic_add(address, val);1070 return __atomic_add(address, val);
985}1071}
986 1072 
987-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(bfloat16x2_t *address, bfloat16x2_t val)1073+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(bfloat16x2_t* address, bfloat16x2_t val)
988{1074{
989 return __atomic_sub(address, val);1075 return __atomic_sub(address, val);
990}1076}
991 1077 
992-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(bfloat16x2_t *address, bfloat16x2_t val)1078+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(bfloat16x2_t* address, bfloat16x2_t val)
993{1079{
994 return __atomic_exch(address, val);1080 return __atomic_exch(address, val);
995}1081}
996 1082 
997-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(bfloat16_t *address, bfloat16_t val)1083+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(bfloat16_t* address, bfloat16_t val)
998{1084{
999 __atomic_max(address, val);1085 __atomic_max(address, val);
1000 return *address;1086 return *address;
1001}1087}
1002 1088 
1003-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(bfloat16x2_t *address, bfloat16x2_t val)1089+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(bfloat16x2_t* address, bfloat16x2_t val)
1004{1090{
1005 return __atomic_max(address, val);1091 return __atomic_max(address, val);
1006}1092}
1007 1093 
1008-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(bfloat16_t *address, bfloat16_t val)1094+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(bfloat16_t* address, bfloat16_t val)
1009{1095{
1010 __atomic_min(address, val);1096 __atomic_min(address, val);
1011 return *address;1097 return *address;
1012}1098}
1013 1099 
1014-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(bfloat16x2_t *address, bfloat16x2_t val)1100+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(bfloat16x2_t* address, bfloat16x2_t val)
1015{1101{
1016 return __atomic_min(address, val);1102 return __atomic_min(address, val);
1017}1103}
1018 1104 
1019-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(bfloat16x2_t *address, bfloat16x2_t compare, bfloat16x2_t val)1105+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(
1106+ bfloat16x2_t* address, bfloat16x2_t compare, bfloat16x2_t val)
1020{1107{
1021 return __atomic_cas(address, compare, val);1108 return __atomic_cas(address, compare, val);
1022}1109}
@@ -1029,7 +1116,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_ldcg(bfloat16_t* address)
1029 1116 
1030__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_ldcg(bfloat16x2_t* address)1117__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_ldcg(bfloat16x2_t* address)
1031{1118{
1032- int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(reinterpret_cast<int32_t*>(address));1119+ int32_t t =
1120+ __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(reinterpret_cast<int32_t*>(address));
1033 return reinterpret_cast<bfloat16x2_t&>(t);1121 return reinterpret_cast<bfloat16x2_t&>(t);
1034}1122}
1035 1123 
@@ -1040,7 +1128,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_ldca(bfloat16_t* address)
1040 1128 
1041__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_ldca(bfloat16x2_t* address)1129__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_ldca(bfloat16x2_t* address)
1042{1130{
1043- int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(reinterpret_cast<int32_t*>(address));1131+ int32_t t =
1132+ __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(reinterpret_cast<int32_t*>(address));
1044 return reinterpret_cast<bfloat16x2_t&>(t);1133 return reinterpret_cast<bfloat16x2_t&>(t);
1045}1134}
1046 1135 
@@ -1051,7 +1140,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(bfloat16_t* address, bfloat1
1051 1140 
1052__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(bfloat16x2_t* address, bfloat16x2_t val)1141__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(bfloat16x2_t* address, bfloat16x2_t val)
1053{1142{
1054- __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(reinterpret_cast<int32_t*>(address), reinterpret_cast<int32_t&>(val));1143+ __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(
1144+ reinterpret_cast<int32_t*>(address), reinterpret_cast<int32_t&>(val));
1055}1145}
1056 1146 
1057__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(bfloat16_t* address, bfloat16_t val)1147__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(bfloat16_t* address, bfloat16_t val)
@@ -1061,7 +1151,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(bfloat16_t* address, bfloat1
1061 1151 
1062__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(bfloat16x2_t* address, bfloat16x2_t val)1152__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(bfloat16x2_t* address, bfloat16x2_t val)
1063{1153{
1064- __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(reinterpret_cast<int32_t*>(address), reinterpret_cast<int32_t&>(val));1154+ __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(
1155+ reinterpret_cast<int32_t*>(address), reinterpret_cast<int32_t&>(val));
1065}1156}
1066#endif1157#endif
1067 1158 
@@ -1124,7 +1215,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t __ushort_as_bfloat16(const unsi
1124}1215}
1125 1216 
1126#endif1217#endif
1127-#endif // IMPL_SIMT_API_ASC_BF16_IMPL_H1218+#endif // IMPL_SIMT_API_ASC_BF16_IMPL_H
1128 1219 
1129#if defined(__UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_BF16_IMPL__)1220#if defined(__UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_BF16_IMPL__)
1130#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__1221#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__
Mimpl/simt_api/asc_fp16_impl.h+225-194
@@ -35,20 +35,11 @@
35constexpr uint32_t __INTERNAL_HALF_INF = 0x7C00;35constexpr uint32_t __INTERNAL_HALF_INF = 0x7C00;
36constexpr uint32_t __INTERNAL_HALF_NEG_INF = 0xFC00;36constexpr uint32_t __INTERNAL_HALF_NEG_INF = 0xFC00;
37 37 
38-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool __hisnan(half x)38+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool __hisnan(half x) { return __isnan(x); }
39-{
40- return __isnan(x);
41-}
42 39 
43-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool __hisinf(half x)40+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool __hisinf(half x) { return __isinf(x); }
44-{
45- return __isinf(x);
46-}
47 41 
48-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __hfma(half x, half y, half z)42+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __hfma(half x, half y, half z) { return __fma(x, y, z); }
49-{
50- return __fma(x, y, z);
51-}
52 43 
53__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __habs(half x)44__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __habs(half x)
54{45{
@@ -146,10 +137,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2tanh(half2 x)
146 return x;137 return x;
147}138}
148 139 
149-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hexp(half x)140+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hexp(half x) { return __expf(x); }
150-{
151- return __expf(x);
152-}
153 141 
154__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hexp2(half x)142__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hexp2(half x)
155{143{
@@ -189,10 +177,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2exp10(half2 x)
189 return x;177 return x;
190}178}
191 179 
192-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hlog(half x)180+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hlog(half x) { return __logf(x); }
193-{
194- return __logf(x);
195-}
196 181 
197__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hlog2(half x)182__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hlog2(half x)
198{183{
@@ -232,31 +217,15 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2log10(half2 x)
232 return x;217 return x;
233}218}
234 219 
235-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hsqrt(half x)220+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hsqrt(half x) { return __sqrtf(x); }
236-{
237- return __sqrtf(x);
238-}
239 221 
222+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hrsqrt(half x) { return (half)1.0 / hsqrt(x); }
240 223 
241-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hrsqrt(half x)224+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2exp(half2 x) { return __expf(x); }
242-{
243- return (half)1.0 / hsqrt(x);
244-}
245 225 
246-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2exp(half2 x)226+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2log(half2 x) { return __logf(x); }
247-{
248- return __expf(x);
249-}
250 227 
251-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2log(half2 x)228+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2sqrt(half2 x) { return __sqrtf(x); }
252-{
253- return __logf(x);
254-}
255- 
256-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2sqrt(half2 x)
257-{
258- return __sqrtf(x);
259-}
260 229 
261__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2rsqrt(half2 x)230__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2rsqrt(half2 x)
262{231{
@@ -265,10 +234,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2rsqrt(half2 x)
265 return {tmp1, tmp2};234 return {tmp1, tmp2};
266}235}
267 236 
268-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hrcp(half x)237+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hrcp(half x) { return static_cast<half>(1.0) / x; }
269-{
270- return static_cast<half>(1.0) / x;
271-}
272 238 
273__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2rcp(half2 x)239__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2rcp(half2 x)
274{240{
@@ -277,10 +243,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2rcp(half2 x)
277 return {tmp1, tmp2};243 return {tmp1, tmp2};
278}244}
279 245 
280-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hfloor(half x)246+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hfloor(half x) { return __floorf(x); }
281-{
282- return __floorf(x);
283-}
284 247 
285__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2floor(half2 x)248__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2floor(half2 x)
286{249{
@@ -289,10 +252,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2floor(half2 x)
289 return {tmp1, tmp2};252 return {tmp1, tmp2};
290}253}
291 254 
292-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hrint(half x)255+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hrint(half x) { return __rintf(x); }
293-{
294- return __rintf(x);
295-}
296 256 
297__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2rint(half2 x)257__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2rint(half2 x)
298{258{
@@ -301,10 +261,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2rint(half2 x)
301 return {tmp1, tmp2};261 return {tmp1, tmp2};
302}262}
303 263 
304-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hceil(half x)264+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half hceil(half x) { return __ceilf(x); }
305-{
306- return __ceilf(x);
307-}
308 265 
309__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2ceil(half2 x)266__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2ceil(half2 x)
310{267{
@@ -340,99 +297,123 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 h2trunc(half2 x)
340 return x;297 return x;
341}298}
342 299 
343-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half(const float x) {300+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half(const float x)
301+{
344 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);302 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
345}303}
346 304 
347-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rn(const float x) {305+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rn(const float x)
306+{
348 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);307 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
349}308}
350 309 
351-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rn_sat(const float x) {310+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rn_sat(const float x)
311+{
352 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);312 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
353}313}
354 314 
355-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rz(const float x) {315+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rz(const float x)
316+{
356 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);317 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
357}318}
358 319 
359-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rz_sat(const float x) {320+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rz_sat(const float x)
321+{
360 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);322 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
361}323}
362 324 
363-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rd(const float x) {325+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rd(const float x)
326+{
364 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);327 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
365}328}
366 329 
367-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rd_sat(const float x) {330+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rd_sat(const float x)
331+{
368 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);332 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
369}333}
370 334 
371-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_ru(const float x) {335+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_ru(const float x)
336+{
372 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);337 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
373}338}
374 339 
375-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_ru_sat(const float x) {340+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_ru_sat(const float x)
341+{
376 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);342 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
377}343}
378 344 
379-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rna(const float x) {345+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rna(const float x)
346+{
380 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);347 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
381}348}
382 349 
383-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rna_sat(const float x) {350+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_rna_sat(const float x)
351+{
384 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);352 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
385}353}
386 354 
387-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_ro(const float x) {355+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_ro(const float x)
356+{
388 return __cvt_half<__internal_get_round<__RoundMode::CAST_ODD>(), RoundingSaturation::RS_DISABLE_VALUE>(x);357 return __cvt_half<__internal_get_round<__RoundMode::CAST_ODD>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
389}358}
390 359 
391-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_ro_sat(const float x) {360+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __float2half_ro_sat(const float x)
361+{
392 return __cvt_half<__internal_get_round<__RoundMode::CAST_ODD>(), RoundingSaturation::RS_ENABLE_VALUE>(x);362 return __cvt_half<__internal_get_round<__RoundMode::CAST_ODD>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
393}363}
394 364 
395-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rn_sat(const float2 x) {365+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rn_sat(const float2 x)
366+{
396 return __cvt_half2<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);367 return __cvt_half2<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
397}368}
398 369 
399-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rz_sat(const float2 x) {370+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rz_sat(const float2 x)
371+{
400 return __cvt_half2<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);372 return __cvt_half2<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
401}373}
402 374 
403-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rd(const float2 x) {375+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rd(const float2 x)
376+{
404 return __cvt_half2<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);377 return __cvt_half2<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
405}378}
406 379 
407-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rd_sat(const float2 x) {380+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rd_sat(const float2 x)
381+{
408 return __cvt_half2<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);382 return __cvt_half2<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
409}383}
410 384 
411-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_ru(const float2 x) {385+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_ru(const float2 x)
386+{
412 return __cvt_half2<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);387 return __cvt_half2<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
413}388}
414 389 
415-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_ru_sat(const float2 x) {390+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_ru_sat(const float2 x)
391+{
416 return __cvt_half2<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);392 return __cvt_half2<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
417}393}
418 394 
419-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rna(const float2 x) {395+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rna(const float2 x)
396+{
420 return __cvt_half2<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);397 return __cvt_half2<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
421}398}
422 399 
423-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rna_sat(const float2 x) {400+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_rna_sat(const float2 x)
401+{
424 return __cvt_half2<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);402 return __cvt_half2<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
425}403}
426 404 
427-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_ro(const float2 x) {405+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_ro(const float2 x)
406+{
428 return __cvt_half2<__internal_get_round<__RoundMode::CAST_ODD>(), RoundingSaturation::RS_DISABLE_VALUE>(x);407 return __cvt_half2<__internal_get_round<__RoundMode::CAST_ODD>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
429}408}
430 409 
431-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_ro_sat(const float2 x) {410+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __float22half2_ro_sat(const float2 x)
411+{
432 return __cvt_half2<__internal_get_round<__RoundMode::CAST_ODD>(), RoundingSaturation::RS_ENABLE_VALUE>(x);412 return __cvt_half2<__internal_get_round<__RoundMode::CAST_ODD>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
433}413}
434 414 
435-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float __half2float(const half x) {415+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float __half2float(const half x)
416+{
436 union Data {417 union Data {
437 half h;418 half h;
438 unsigned int i;419 unsigned int i;
@@ -470,255 +451,312 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float __half2float(const half x) {
470 float f;451 float f;
471 unsigned int i;452 unsigned int i;
472 };453 };
473- union Data1 d1{.i = u};454+ union Data1 d1 {
455+ .i = u
456+ };
474 return d1.f;457 return d1.f;
475}458}
476 459 
477-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __half2uint_rn(const half x) {460+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __half2uint_rn(const half x)
461+{
478 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);462 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
479}463}
480 464 
481-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __half2uint_rz(const half x) {465+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __half2uint_rz(const half x)
466+{
482 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);467 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
483}468}
484 469 
485-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __half2uint_rd(const half x) {470+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __half2uint_rd(const half x)
471+{
486 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);472 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
487}473}
488 474 
489-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __half2uint_ru(const half x) {475+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __half2uint_ru(const half x)
476+{
490 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);477 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
491}478}
492 479 
493-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __half2uint_rna(const half x) {480+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __half2uint_rna(const half x)
481+{
494 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);482 return __cvt_uint32_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
495}483}
496 484 
497-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __half2int_rn(const half x) {485+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __half2int_rn(const half x)
486+{
498 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);487 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
499}488}
500 489 
501-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __half2int_rz(const half x) {490+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __half2int_rz(const half x)
491+{
502 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);492 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
503}493}
504 494 
505-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __half2int_rd(const half x) {495+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __half2int_rd(const half x)
496+{
506 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);497 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
507}498}
508 499 
509-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __half2int_ru(const half x) {500+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __half2int_ru(const half x)
501+{
510 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);502 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
511}503}
512 504 
513-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __half2int_rna(const half x) {505+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int __half2int_rna(const half x)
506+{
514 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);507 return __cvt_int32_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
515}508}
516 509 
517-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __half2ull_rn(const half x) {510+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __half2ull_rn(const half x)
511+{
518 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);512 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
519 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);513 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);
520}514}
521 515 
522-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __half2ull_rz(const half x) {516+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __half2ull_rz(const half x)
517+{
523 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);518 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
524 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);519 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);
525}520}
526 521 
527-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __half2ull_rd(const half x) {522+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __half2ull_rd(const half x)
523+{
528 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);524 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
529 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);525 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);
530}526}
531 527 
532-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __half2ull_ru(const half x) {528+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __half2ull_ru(const half x)
529+{
533 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);530 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
534 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);531 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);
535}532}
536 533 
537-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __half2ull_rna(const half x) {534+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int __half2ull_rna(const half x)
535+{
538 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);536 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
539 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);537 return __cvt_uint64_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);
540}538}
541 539 
542-__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __half2ll_rn(const half x) {540+__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __half2ll_rn(const half x)
541+{
543 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);542 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
544 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);543 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);
545}544}
546 545 
547-__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __half2ll_rz(const half x) {546+__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __half2ll_rz(const half x)
547+{
548 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);548 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
549 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);549 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);
550}550}
551 551 
552-__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __half2ll_rd(const half x) {552+__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __half2ll_rd(const half x)
553+{
553 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);554 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
554 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);555 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);
555}556}
556 557 
557-__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __half2ll_ru(const half x) {558+__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __half2ll_ru(const half x)
559+{
558 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);560 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
559 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);561 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);
560}562}
561 563 
562-__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __half2ll_rna(const half x) {564+__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int __half2ll_rna(const half x)
565+{
563 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);566 float x_fp32 = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
564 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);567 return __cvt_int64_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x_fp32);
565}568}
566 569 
567-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __half2half_rn(const half x) {570+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __half2half_rn(const half x)
571+{
568 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);572 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
569}573}
570 574 
571-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __half2half_rz(const half x) {575+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __half2half_rz(const half x)
576+{
572 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);577 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
573}578}
574 579 
575-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __half2half_rd(const half x) {580+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __half2half_rd(const half x)
581+{
576 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);582 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
577}583}
578 584 
579-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __half2half_ru(const half x) {585+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __half2half_ru(const half x)
586+{
580 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);587 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
581}588}
582 589 
583-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __half2half_rna(const half x) {590+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __half2half_rna(const half x)
591+{
584 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);592 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
585}593}
586 594 
587-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rn(const unsigned int x) {595+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rn(const unsigned int x)
596+{
588 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);597 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
589}598}
590 599 
591-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rn_sat(const unsigned int x) {600+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rn_sat(const unsigned int x)
601+{
592 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);602 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
593}603}
594 604 
595-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rz(const unsigned int x) {605+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rz(const unsigned int x)
606+{
596 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);607 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
597}608}
598 609 
599-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rz_sat(const unsigned int x) {610+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rz_sat(const unsigned int x)
611+{
600 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);612 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
601}613}
602 614 
603-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rd(const unsigned int x) {615+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rd(const unsigned int x)
616+{
604 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);617 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
605}618}
606 619 
607-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rd_sat(const unsigned int x) {620+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rd_sat(const unsigned int x)
621+{
608 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);622 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
609}623}
610 624 
611-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_ru(const unsigned int x) {625+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_ru(const unsigned int x)
626+{
612 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);627 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
613}628}
614 629 
615-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_ru_sat(const unsigned int x) {630+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_ru_sat(const unsigned int x)
631+{
616 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);632 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
617}633}
618 634 
619-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rna(const unsigned int x) {635+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rna(const unsigned int x)
636+{
620 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);637 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
621}638}
622 639 
623-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rna_sat(const unsigned int x) {640+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __uint2half_rna_sat(const unsigned int x)
641+{
624 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);642 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
625}643}
626 644 
627-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rn(const int x) {645+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rn(const int x)
646+{
628 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);647 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
629}648}
630 649 
631-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rn_sat(const int x) {650+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rn_sat(const int x)
651+{
632 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);652 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
633}653}
634 654 
635-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rz(const int x) {655+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rz(const int x)
656+{
636 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);657 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
637}658}
638 659 
639-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rz_sat(const int x) {660+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rz_sat(const int x)
661+{
640 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);662 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
641}663}
642 664 
643-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rd(const int x) {665+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rd(const int x)
666+{
644 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);667 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
645}668}
646 669 
647-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rd_sat(const int x) {670+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rd_sat(const int x)
671+{
648 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);672 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
649}673}
650 674 
651-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_ru(const int x) {675+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_ru(const int x)
676+{
652 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);677 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
653}678}
654 679 
655-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_ru_sat(const int x) {680+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_ru_sat(const int x)
681+{
656 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);682 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
657}683}
658 684 
659-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rna(const int x) {685+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rna(const int x)
686+{
660 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);687 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
661}688}
662 689 
663-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rna_sat(const int x) {690+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __int2half_rna_sat(const int x)
691+{
664 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);692 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
665}693}
666 694 
667-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ull2half_rn(const unsigned long long int x) {695+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ull2half_rn(const unsigned long long int x)
696+{
668 uint64_t y = x;697 uint64_t y = x;
669 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);698 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
670 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(f);699 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
671}700}
672 701 
673-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ull2half_rz(const unsigned long long int x) {702+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ull2half_rz(const unsigned long long int x)
703+{
674 uint64_t y = x;704 uint64_t y = x;
675 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(y);705 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
676 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(f);706 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
677}707}
678 708 
679-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ull2half_rd(const unsigned long long int x) {709+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ull2half_rd(const unsigned long long int x)
710+{
680 uint64_t y = x;711 uint64_t y = x;
681 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(y);712 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
682 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(f);713 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
683}714}
684 715 
685-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ull2half_ru(const unsigned long long int x) {716+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ull2half_ru(const unsigned long long int x)
717+{
686 uint64_t y = x;718 uint64_t y = x;
687 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(y);719 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
688 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(f);720 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
689}721}
690 722 
691-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ull2half_rna(const unsigned long long int x) {723+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ull2half_rna(const unsigned long long int x)
724+{
692 uint64_t y = x;725 uint64_t y = x;
693 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(y);726 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
694 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(f);727 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
695}728}
696 729 
697-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ll2half_rn(const long long int x) {730+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ll2half_rn(const long long int x)
731+{
698 int64_t y = x;732 int64_t y = x;
699 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);733 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
700 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(f);734 return __cvt_half<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
701}735}
702 736 
703-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ll2half_rz(const long long int x) {737+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ll2half_rz(const long long int x)
738+{
704 int64_t y = x;739 int64_t y = x;
705 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(y);740 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
706 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(f);741 return __cvt_half<__internal_get_round<__RoundMode::CAST_TRUNC>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
707}742}
708 743 
709-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ll2half_rd(const long long int x) {744+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ll2half_rd(const long long int x)
745+{
710 int64_t y = x;746 int64_t y = x;
711 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(y);747 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
712 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(f);748 return __cvt_half<__internal_get_round<__RoundMode::CAST_FLOOR>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
713}749}
714 750 
715-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ll2half_ru(const long long int x) {751+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ll2half_ru(const long long int x)
752+{
716 int64_t y = x;753 int64_t y = x;
717 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(y);754 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
718 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(f);755 return __cvt_half<__internal_get_round<__RoundMode::CAST_CEIL>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
719}756}
720 757 
721-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ll2half_rna(const long long int x) {758+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ll2half_rna(const long long int x)
759+{
722 int64_t y = x;760 int64_t y = x;
723 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(y);761 float f = __cvt_float<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(y);
724 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(f);762 return __cvt_half<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(f);
@@ -742,10 +780,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float __low2float(const half2 x)
742 return __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.x);780 return __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.x);
743}781}
744 782 
745-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __low2half(const half2 x)783+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __low2half(const half2 x) { return x.x; }
746-{
747- return x.x;
748-}
749 784 
750__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __low2half2(const half2 x)785__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __low2half2(const half2 x)
751{786{
@@ -768,10 +803,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float __high2float(const half2 x)
768 return __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);803 return __cvt_float<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x.y);
769}804}
770 805 
771-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __high2half(const half2 x)806+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half __high2half(const half2 x) { return x.y; }
772-{
773- return x.y;
774-}
775 807 
776__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __high2half2(const half2 x)808__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __high2half2(const half2 x)
777{809{
@@ -806,99 +838,99 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __halves2half2(const half x, const h
806}838}
807#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__839#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__
808#ifndef ASCENDC_CPU_DEBUG840#ifndef ASCENDC_CPU_DEBUG
809-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(__ubuf__ half *address, half val)841+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(__ubuf__ half* address, half val)
810{842{
811 atomicAdd(address, val);843 atomicAdd(address, val);
812 return *address;844 return *address;
813}845}
814 846 
815-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(__ubuf__ half2 *address, half2 val)847+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(__ubuf__ half2* address, half2 val)
816{848{
817 return atomicAdd(address, val);849 return atomicAdd(address, val);
818}850}
819 851 
820-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(__ubuf__ half2 *address, half2 val)852+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(__ubuf__ half2* address, half2 val)
821{853{
822 return atomicSub(address, val);854 return atomicSub(address, val);
823}855}
824 856 
825-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(__ubuf__ half2 *address, half2 val)857+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(__ubuf__ half2* address, half2 val)
826{858{
827 return atomicExch(address, val);859 return atomicExch(address, val);
828}860}
829 861 
830-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(__ubuf__ half *address, half val)862+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(__ubuf__ half* address, half val)
831{863{
832 atomicMax(address, val);864 atomicMax(address, val);
833 return *address;865 return *address;
834}866}
835 867 
836-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(__ubuf__ half2 *address, half2 val)868+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(__ubuf__ half2* address, half2 val)
837{869{
838 return atomicMax(address, val);870 return atomicMax(address, val);
839}871}
840 872 
841-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(__ubuf__ half *address, half val)873+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(__ubuf__ half* address, half val)
842{874{
843 atomicMin(address, val);875 atomicMin(address, val);
844 return *address;876 return *address;
845}877}
846 878 
847-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(__ubuf__ half2 *address, half2 val)879+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(__ubuf__ half2* address, half2 val)
848{880{
849 return atomicMin(address, val);881 return atomicMin(address, val);
850}882}
851 883 
852-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(__ubuf__ half2 *address, half2 compare, half2 val)884+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(__ubuf__ half2* address, half2 compare, half2 val)
853{885{
854 return atomicCAS(address, compare, val);886 return atomicCAS(address, compare, val);
855}887}
856#endif888#endif
857 889 
858-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(__gm__ half *address, half val)890+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(__gm__ half* address, half val)
859{891{
860 atomicAdd(address, val);892 atomicAdd(address, val);
861 return *address;893 return *address;
862}894}
863 895 
864-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(__gm__ half2 *address, half2 val)896+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(__gm__ half2* address, half2 val)
865{897{
866 return atomicAdd(address, val);898 return atomicAdd(address, val);
867}899}
868 900 
869-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(__gm__ half2 *address, half2 val)901+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(__gm__ half2* address, half2 val)
870{902{
871 return atomicSub(address, val);903 return atomicSub(address, val);
872}904}
873 905 
874-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(__gm__ half2 *address, half2 val)906+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(__gm__ half2* address, half2 val)
875{907{
876 return atomicExch(address, val);908 return atomicExch(address, val);
877}909}
878 910 
879-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(__gm__ half *address, half val)911+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(__gm__ half* address, half val)
880{912{
881 atomicMax(address, val);913 atomicMax(address, val);
882 return *address;914 return *address;
883}915}
884 916 
885-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(__gm__ half2 *address, half2 val)917+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(__gm__ half2* address, half2 val)
886{918{
887 return atomicMax(address, val);919 return atomicMax(address, val);
888}920}
889 921 
890-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(__gm__ half *address, half val)922+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(__gm__ half* address, half val)
891{923{
892 atomicMin(address, val);924 atomicMin(address, val);
893 return *address;925 return *address;
894}926}
895 927 
896-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(__gm__ half2 *address, half2 val)928+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(__gm__ half2* address, half2 val)
897{929{
898 return atomicMin(address, val);930 return atomicMin(address, val);
899}931}
900 932 
901-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(__gm__ half2 *address, half2 compare, half2 val)933+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(__gm__ half2* address, half2 compare, half2 val)
902{934{
903 return atomicCAS(address, compare, val);935 return atomicCAS(address, compare, val);
904}936}
@@ -910,7 +942,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_ldcg(__gm__ half* address)
910 942 
911__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_ldcg(__gm__ half2* address)943__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_ldcg(__gm__ half2* address)
912{944{
913- int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(reinterpret_cast<__gm__ int32_t*>(address));945+ int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(
946+ reinterpret_cast<__gm__ int32_t*>(address));
914 return reinterpret_cast<half2&>(t);947 return reinterpret_cast<half2&>(t);
915}948}
916 949 
@@ -921,7 +954,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_ldca(__gm__ half* address)
921 954 
922__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_ldca(__gm__ half2* address)955__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_ldca(__gm__ half2* address)
923{956{
924- int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(reinterpret_cast<__gm__ int32_t*>(address));957+ int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(
958+ reinterpret_cast<__gm__ int32_t*>(address));
925 return reinterpret_cast<half2&>(t);959 return reinterpret_cast<half2&>(t);
926}960}
927 961 
@@ -932,7 +966,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(__gm__ half* address, half v
932 966 
933__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(__gm__ half2* address, half2 val)967__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(__gm__ half2* address, half2 val)
934{968{
935- __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(reinterpret_cast<__gm__ int32_t*>(address), reinterpret_cast<int32_t&>(val));969+ __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(
970+ reinterpret_cast<__gm__ int32_t*>(address), reinterpret_cast<int32_t&>(val));
936}971}
937 972 
938__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ half* address, half val)973__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ half* address, half val)
@@ -942,55 +977,56 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ half* address, half v
942 977 
943__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ half2* address, half2 val)978__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ half2* address, half2 val)
944{979{
945- __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(reinterpret_cast<__gm__ int32_t*>(address), reinterpret_cast<int32_t&>(val));980+ __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(
981+ reinterpret_cast<__gm__ int32_t*>(address), reinterpret_cast<int32_t&>(val));
946}982}
947 983 
948#else984#else
949#ifndef ASCENDC_CPU_DEBUG985#ifndef ASCENDC_CPU_DEBUG
950-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(half *address, half val)986+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(half* address, half val)
951{987{
952 __atomic_add(address, val);988 __atomic_add(address, val);
953 return *address;989 return *address;
954}990}
955 991 
956-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(half2 *address, half2 val)992+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(half2* address, half2 val)
957{993{
958 return __atomic_add(address, val);994 return __atomic_add(address, val);
959}995}
960 996 
961-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(half2 *address, half2 val)997+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(half2* address, half2 val)
962{998{
963 return __atomic_sub(address, val);999 return __atomic_sub(address, val);
964}1000}
965 1001 
966-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(half2 *address, half2 val)1002+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(half2* address, half2 val)
967{1003{
968 return __atomic_exch(address, val);1004 return __atomic_exch(address, val);
969}1005}
970 1006 
971-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(half *address, half val)1007+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(half* address, half val)
972{1008{
973 __atomic_max(address, val);1009 __atomic_max(address, val);
974 return *address;1010 return *address;
975}1011}
976 1012 
977-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(half2 *address, half2 val)1013+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(half2* address, half2 val)
978{1014{
979 return __atomic_max(address, val);1015 return __atomic_max(address, val);
980}1016}
981 1017 
982-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(half *address, half val)1018+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(half* address, half val)
983{1019{
984 __atomic_min(address, val);1020 __atomic_min(address, val);
985 return *address;1021 return *address;
986}1022}
987 1023 
988-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(half2 *address, half2 val)1024+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(half2* address, half2 val)
989{1025{
990 return __atomic_min(address, val);1026 return __atomic_min(address, val);
991}1027}
992 1028 
993-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(half2 *address, half2 compare, half2 val)1029+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(half2* address, half2 compare, half2 val)
994{1030{
995 return __atomic_cas(address, compare, val);1031 return __atomic_cas(address, compare, val);
996}1032}
@@ -1003,7 +1039,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_ldcg(half* address)
1003 1039 
1004__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_ldcg(half2* address)1040__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_ldcg(half2* address)
1005{1041{
1006- int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(reinterpret_cast<int32_t*>(address));1042+ int32_t t =
1043+ __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(reinterpret_cast<int32_t*>(address));
1007 return reinterpret_cast<half2&>(t);1044 return reinterpret_cast<half2&>(t);
1008}1045}
1009 1046 
@@ -1014,7 +1051,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_ldca(half* address)
1014 1051 
1015__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_ldca(half2* address)1052__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_ldca(half2* address)
1016{1053{
1017- int32_t t = __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(reinterpret_cast<int32_t*>(address));1054+ int32_t t =
1055+ __ldg<LD_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(reinterpret_cast<int32_t*>(address));
1018 return reinterpret_cast<half2&>(t);1056 return reinterpret_cast<half2&>(t);
1019}1057}
1020 1058 
@@ -1025,7 +1063,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(half* address, half val)
1025 1063 
1026__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(half2* address, half2 val)1064__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stcg(half2* address, half2 val)
1027{1065{
1028- __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(reinterpret_cast<int32_t*>(address), reinterpret_cast<int32_t&>(val));1066+ __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::NON_CACHEABLE>(
1067+ reinterpret_cast<int32_t*>(address), reinterpret_cast<int32_t&>(val));
1029}1068}
1030 1069 
1031__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(half* address, half val)1070__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(half* address, half val)
@@ -1035,7 +1074,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(half* address, half val)
1035 1074 
1036__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(half2* address, half2 val)1075__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(half2* address, half2 val)
1037{1076{
1038- __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(reinterpret_cast<int32_t*>(address), reinterpret_cast<int32_t&>(val));1077+ __stg<ST_L2CacheType::L2_CACHE_HINT_NORMAL_FV, L1CacheType::CACHEABLE>(
1078+ reinterpret_cast<int32_t*>(address), reinterpret_cast<int32_t&>(val));
1039}1079}
1040#endif1080#endif
1041 1081 
@@ -1079,22 +1119,13 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_shfl_xor(half2 var, int32_t lane
1079 return __shfl_xor(var, lane_mask, width);1119 return __shfl_xor(var, lane_mask, width);
1080}1120}
1081 1121 
1082-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_reduce_add(half val)1122+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_reduce_add(half val) { return __reduce_add(val); }
1083-{
1084- return __reduce_add(val);
1085-}
1086 1123 
1087-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_reduce_max(half val)1124+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_reduce_max(half val) { return __reduce_max(val); }
1088-{
1089- return __reduce_max(val);
1090-}
1091 1125 
1092-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_reduce_min(half val)1126+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_reduce_min(half val) { return __reduce_min(val); }
1093-{
1094- return __reduce_min(val);
1095-}
1096 1127 
1097- __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 make_half2(half x, half y)1128+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 make_half2(half x, half y)
1098{1129{
1099 half2 tmp;1130 half2 tmp;
1100 tmp.x = x;1131 tmp.x = x;
@@ -1113,7 +1144,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half __ushort_as_half(const unsigned short
1113}1144}
1114 1145 
1115#endif1146#endif
1116-#endif // IMPL_SIMT_API_ASC_FP16_IMPL_H1147+#endif // IMPL_SIMT_API_ASC_FP16_IMPL_H
1117 1148 
1118#if defined(__UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_FP16_IMPL__)1149#if defined(__UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_FP16_IMPL__)
1119#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__1150#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__
Mimpl/simt_api/asc_fp8_impl.h+40-22
@@ -31,72 +31,90 @@
31 31 
32#if (__NPU_ARCH__ == 3510) || (__NPU_ARCH__ == 5102)32#if (__NPU_ARCH__ == 3510) || (__NPU_ARCH__ == 5102)
33 33 
34-__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __float22hif82_rna(const float2 x) {34+__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __float22hif82_rna(const float2 x)
35+{
35 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);36 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
36}37}
37 38 
38-__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __float22hif82_rna_sat(const float2 x) {39+__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __float22hif82_rna_sat(const float2 x)
40+{
39 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);41 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
40}42}
41 43 
42-__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __float22hif82_rh(const float2 x) {44+__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __float22hif82_rh(const float2 x)
43- return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_HYBRID>(), RoundingSaturation::RS_DISABLE_VALUE>(x);45+{
46+ return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_HYBRID>(), RoundingSaturation::RS_DISABLE_VALUE>(
47+ x);
44}48}
45 49 
46-__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __float22hif82_rh_sat(const float2 x) {50+__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __float22hif82_rh_sat(const float2 x)
51+{
47 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_HYBRID>(), RoundingSaturation::RS_ENABLE_VALUE>(x);52 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_HYBRID>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
48}53}
49 54 
50-__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __half22hif82_rna(const half2 x) {55+__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __half22hif82_rna(const half2 x)
56+{
51 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);57 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
52}58}
53 59 
54-__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __half22hif82_rna_sat(const half2 x) {60+__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __half22hif82_rna_sat(const half2 x)
61+{
55 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);62 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_ROUND>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
56}63}
57 64 
58-__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __half22hif82_rh(const half2 x) {65+__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __half22hif82_rh(const half2 x)
59- return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_HYBRID>(), RoundingSaturation::RS_DISABLE_VALUE>(x);66+{
67+ return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_HYBRID>(), RoundingSaturation::RS_DISABLE_VALUE>(
68+ x);
60}69}
61 70 
62-__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __half22hif82_rh_sat(const half2 x) {71+__SIMT_DEVICE_FUNCTIONS_DECL__ inline hifloat8x2_t __half22hif82_rh_sat(const half2 x)
72+{
63 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_HYBRID>(), RoundingSaturation::RS_ENABLE_VALUE>(x);73 return __cvt_hifloat8x2_t<__internal_get_round<__RoundMode::CAST_HYBRID>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
64}74}
65 75 
66-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __hif822float2(const hifloat8x2_t x) {76+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __hif822float2(const hifloat8x2_t x)
77+{
67 return __cvt_float2<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);78 return __cvt_float2<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
68}79}
69 80 
70-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __hif822half2(const hifloat8x2_t x) {81+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __hif822half2(const hifloat8x2_t x)
82+{
71 return __cvt_half2<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);83 return __cvt_half2<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
72}84}
73 85 
74-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __e4m3x22float2(const float8_e4m3x2_t x) {86+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __e4m3x22float2(const float8_e4m3x2_t x)
87+{
75 return __cvt_float2<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);88 return __cvt_float2<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
76}89}
77 90 
78-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __e5m2x22float2(const float8_e5m2x2_t x) {91+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __e5m2x22float2(const float8_e5m2x2_t x)
92+{
79 return __cvt_float2<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);93 return __cvt_float2<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
80}94}
81 95 
82-__SIMT_DEVICE_FUNCTIONS_DECL__ inline __asc_fp8x2_storage_t96+__SIMT_DEVICE_FUNCTIONS_DECL__ inline __asc_fp8x2_storage_t __asc_cvt_float2_to_fp8x2(
83-__asc_cvt_float2_to_fp8x2(const float2 x, const __asc_saturation_t saturate,97+ const float2 x, const __asc_saturation_t saturate, const __asc_fp8_interpretation_t fp8_interpretation)
84- const __asc_fp8_interpretation_t fp8_interpretation) {98+{
85 __asc_fp8x2_storage_t res = 0;99 __asc_fp8x2_storage_t res = 0;
86 if (saturate == __ASC_NOSAT) {100 if (saturate == __ASC_NOSAT) {
87 if (fp8_interpretation == __ASC_E4M3) {101 if (fp8_interpretation == __ASC_E4M3) {
88- float8_e4m3x2_t tmp = __cvt_float8_e4m3x2_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);102+ float8_e4m3x2_t tmp = __cvt_float8_e4m3x2_t<
103+ __internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
89 res = *reinterpret_cast<__asc_fp8x2_storage_t*>(&tmp);104 res = *reinterpret_cast<__asc_fp8x2_storage_t*>(&tmp);
90 } else {105 } else {
91- float8_e5m2x2_t tmp = __cvt_float8_e5m2x2_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);106+ float8_e5m2x2_t tmp = __cvt_float8_e5m2x2_t<
107+ __internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_DISABLE_VALUE>(x);
92 res = *reinterpret_cast<__asc_fp8x2_storage_t*>(&tmp);108 res = *reinterpret_cast<__asc_fp8x2_storage_t*>(&tmp);
93 }109 }
94 } else {110 } else {
95 if (fp8_interpretation == __ASC_E4M3) {111 if (fp8_interpretation == __ASC_E4M3) {
96- float8_e4m3x2_t tmp = __cvt_float8_e4m3x2_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);112+ float8_e4m3x2_t tmp = __cvt_float8_e4m3x2_t<
113+ __internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
97 res = *reinterpret_cast<__asc_fp8x2_storage_t*>(&tmp);114 res = *reinterpret_cast<__asc_fp8x2_storage_t*>(&tmp);
98 } else {115 } else {
99- float8_e5m2x2_t tmp = __cvt_float8_e5m2x2_t<__internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);116+ float8_e5m2x2_t tmp = __cvt_float8_e5m2x2_t<
117+ __internal_get_round<__RoundMode::CAST_RINT>(), RoundingSaturation::RS_ENABLE_VALUE>(x);
100 res = *reinterpret_cast<__asc_fp8x2_storage_t*>(&tmp);118 res = *reinterpret_cast<__asc_fp8x2_storage_t*>(&tmp);
101 }119 }
102 }120 }
@@ -104,7 +122,7 @@ __asc_cvt_float2_to_fp8x2(const float2 x, const __asc_saturation_t saturate,
104}122}
105 123 
106#endif124#endif
107-#endif // IMPL_SIMT_API_ASC_FP8_IMPL_H125+#endif // IMPL_SIMT_API_ASC_FP8_IMPL_H
108 126 
109#if defined(__UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_FP8_IMPL__)127#if defined(__UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_FP8_IMPL__)
110#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__128#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__
Mimpl/simt_api/cooperative_groups_impl.h+18-16
@@ -16,7 +16,8 @@
16#if !defined(__ASCENDC_INCLUDE_INTERNAL_HEADERS__)16#if !defined(__ASCENDC_INCLUDE_INTERNAL_HEADERS__)
17#define __ASCENDC_INCLUDE_INTERNAL_HEADERS__17#define __ASCENDC_INCLUDE_INTERNAL_HEADERS__
18#define __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_COOPERATIVE_GROUPS_IMPL__18#define __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_COOPERATIVE_GROUPS_IMPL__
19-#warning "impl/simt_api/cooperative_groups_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file maybe removed in the future. Please use \"simt_api/cooperative_groups.h\" and use public functions or variables defined in interface header files."19+#warning \
20+ "impl/simt_api/cooperative_groups_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file maybe removed in the future. Please use \"simt_api/cooperative_groups.h\" and use public functions or variables defined in interface header files."
20#endif21#endif
21 22 
22#ifndef IMPL_SIMT_API_COOPERATIVE_GROUPS_IMPL_H23#ifndef IMPL_SIMT_API_COOPERATIVE_GROUPS_IMPL_H
@@ -27,10 +28,7 @@ namespace cooperative_groups {
27template <typename T, typename... Args>28template <typename T, typename... Args>
28constexpr bool SupportTypeSimtInternel = (std::is_same_v<T, Args> || ...);29constexpr bool SupportTypeSimtInternel = (std::is_same_v<T, Args> || ...);
29 30 
30-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void __trap_internal()31+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void __trap_internal() { *((uint8_t*)-1) = 0; }
31-{
32- *((uint8_t*)-1) = 0;
33-}
34 32 
35__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __fns_internal(unsigned int mask, unsigned int base, int offset)33__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int __fns_internal(unsigned int mask, unsigned int base, int offset)
36{34{
@@ -90,10 +88,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long thread_group::size() co
90 }88 }
91}89}
92 90 
93-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long thread_group::num_threads() const91+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long thread_group::num_threads() const { return size(); }
94-{
95- return size();
96-}
97 92 
98__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long thread_group::thread_rank() const93__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long thread_group::thread_rank() const
99{94{
@@ -315,7 +310,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T coalesced_group::shfl(T var, int src_ran
315{310{
316 static_assert(311 static_assert(
317 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,312 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,
318- "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t.");313+ "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, "
314+ "bfloat16x2_t.");
319 int lane = src_rank % static_cast<int>(num_threads());315 int lane = src_rank % static_cast<int>(num_threads());
320 if (num_threads() != warpSize) {316 if (num_threads() != warpSize) {
321 lane = __fns_internal(_tiled_info.mask, 0, lane + 1);317 lane = __fns_internal(_tiled_info.mask, 0, lane + 1);
@@ -328,7 +324,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T coalesced_group::shfl_up(T var, unsigned
328{324{
329 static_assert(325 static_assert(
330 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,326 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,
331- "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t.");327+ "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, "
328+ "bfloat16x2_t.");
332 if (num_threads() == warpSize) {329 if (num_threads() == warpSize) {
333 return asc_shfl_up(var, delta, warpSize);330 return asc_shfl_up(var, delta, warpSize);
334 }331 }
@@ -346,7 +343,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T coalesced_group::shfl_down(T var, unsign
346{343{
347 static_assert(344 static_assert(
348 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,345 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,
349- "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t.");346+ "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, "
347+ "bfloat16x2_t.");
350 if (num_threads() == warpSize) {348 if (num_threads() == warpSize) {
351 return asc_shfl_down(var, delta, warpSize);349 return asc_shfl_down(var, delta, warpSize);
352 }350 }
@@ -421,7 +419,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T thread_block_tile_base<Size>::shfl(T var
421{419{
422 static_assert(420 static_assert(
423 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,421 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,
424- "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t.");422+ "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, "
423+ "bfloat16x2_t.");
425 return asc_shfl(var, src_rank, static_cast<int32_t>(numThreads));424 return asc_shfl(var, src_rank, static_cast<int32_t>(numThreads));
426}425}
427 426 
@@ -431,7 +430,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T thread_block_tile_base<Size>::shfl_up(T
431{430{
432 static_assert(431 static_assert(
433 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,432 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,
434- "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t.");433+ "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, "
434+ "bfloat16x2_t.");
435 return asc_shfl_up(var, delta, static_cast<int32_t>(numThreads));435 return asc_shfl_up(var, delta, static_cast<int32_t>(numThreads));
436}436}
437 437 
@@ -441,7 +441,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T thread_block_tile_base<Size>::shfl_down(
441{441{
442 static_assert(442 static_assert(
443 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,443 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,
444- "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t.");444+ "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, "
445+ "bfloat16x2_t.");
445 return asc_shfl_down(var, delta, static_cast<int32_t>(numThreads));446 return asc_shfl_down(var, delta, static_cast<int32_t>(numThreads));
446}447}
447 448 
@@ -451,7 +452,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T thread_block_tile_base<Size>::shfl_xor(T
451{452{
452 static_assert(453 static_assert(
453 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,454 SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t>,
454- "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, bfloat16x2_t.");455+ "Input type T only supports int32_t, uint32_t, int64_t, uint64_t, float, half, half2, bfloat16_t, "
456+ "bfloat16x2_t.");
455 return asc_shfl_xor(var, static_cast<int32_t>(lane_mask), static_cast<int32_t>(numThreads));457 return asc_shfl_xor(var, static_cast<int32_t>(lane_mask), static_cast<int32_t>(numThreads));
456}458}
457 459 
Mimpl/simt_api/cpp/dav_3510/kernel_simt_atomic_impl.h+46-46
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/*!11/*!
12 * \file kernel_simt_atomic_impl.h12 * \file kernel_simt_atomic_impl.h
@@ -26,7 +26,7 @@ namespace AscendC {
26namespace Simt {26namespace Simt {
27#if defined(ASCENDC_CPU_DEBUG)27#if defined(ASCENDC_CPU_DEBUG)
28template <typename T>28template <typename T>
29-T AtomicCasImpl(__gm__ T *address, T compare, T val)29+T AtomicCasImpl(__gm__ T* address, T compare, T val)
30{30{
31 T ret;31 T ret;
32 ProcessLock::GetProcessLock()->Write();32 ProcessLock::GetProcessLock()->Write();
@@ -41,13 +41,13 @@ T AtomicCasImpl(__gm__ T *address, T compare, T val)
41}41}
42#else42#else
43template <typename T>43template <typename T>
44-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCasImpl(__ubuf__ T *address, T compare, T val)44+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCasImpl(__ubuf__ T* address, T compare, T val)
45{45{
46 return atomicCAS(address, compare, val);46 return atomicCAS(address, compare, val);
47}47}
48 48 
49template <typename T>49template <typename T>
50-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCasImpl(__gm__ T *address, T compare, T val)50+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCasImpl(__gm__ T* address, T compare, T val)
51{51{
52 return atomicCAS(address, compare, val);52 return atomicCAS(address, compare, val);
53}53}
@@ -55,7 +55,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCasImpl(__gm__ T *address, T compa
55 55 
56#if defined(ASCENDC_CPU_DEBUG)56#if defined(ASCENDC_CPU_DEBUG)
57template <typename T>57template <typename T>
58-T AtomicAddImpl(__gm__ T *address, T val)58+T AtomicAddImpl(__gm__ T* address, T val)
59{59{
60 T ret;60 T ret;
61 ProcessLock::GetProcessLock()->Write();61 ProcessLock::GetProcessLock()->Write();
@@ -66,7 +66,7 @@ T AtomicAddImpl(__gm__ T *address, T val)
66}66}
67#else67#else
68template <typename T>68template <typename T>
69-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAddImpl(__ubuf__ T *address, T val)69+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAddImpl(__ubuf__ T* address, T val)
70{70{
71 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, float>) {71 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, float>) {
72 return atomicAdd(address, val);72 return atomicAdd(address, val);
@@ -77,7 +77,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAddImpl(__ubuf__ T *address, T val
77}77}
78 78 
79template <typename T>79template <typename T>
80-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAddImpl(__gm__ T *address, T val)80+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAddImpl(__gm__ T* address, T val)
81{81{
82 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half2, bfloat16x2_t>) {82 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half2, bfloat16x2_t>) {
83 return atomicAdd(address, val);83 return atomicAdd(address, val);
@@ -90,13 +90,13 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAddImpl(__gm__ T *address, T val)
90 90 
91#if defined(ASCENDC_CPU_DEBUG)91#if defined(ASCENDC_CPU_DEBUG)
92template <typename T>92template <typename T>
93-T AtomicSubImpl(__gm__ T *address, T val)93+T AtomicSubImpl(__gm__ T* address, T val)
94{94{
95 return AtomicAddImpl(address, (T)0 - val);95 return AtomicAddImpl(address, (T)0 - val);
96}96}
97#else97#else
98template <typename T>98template <typename T>
99-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSubImpl(__ubuf__ T *address, T val)99+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSubImpl(__ubuf__ T* address, T val)
100{100{
101 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, float>) {101 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, float>) {
102 return atomicSub(address, val);102 return atomicSub(address, val);
@@ -107,7 +107,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSubImpl(__ubuf__ T *address, T val
107}107}
108 108 
109template <typename T>109template <typename T>
110-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSubImpl(__gm__ T *address, T val)110+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSubImpl(__gm__ T* address, T val)
111{111{
112 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half2, bfloat16x2_t>) {112 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half2, bfloat16x2_t>) {
113 return atomicSub(address, val);113 return atomicSub(address, val);
@@ -120,7 +120,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSubImpl(__gm__ T *address, T val)
120 120 
121#if defined(ASCENDC_CPU_DEBUG)121#if defined(ASCENDC_CPU_DEBUG)
122template <typename T>122template <typename T>
123-T AtomicExchImpl(__gm__ T *address, T val)123+T AtomicExchImpl(__gm__ T* address, T val)
124{124{
125 T ret;125 T ret;
126 ProcessLock::GetProcessLock()->Write();126 ProcessLock::GetProcessLock()->Write();
@@ -131,13 +131,13 @@ T AtomicExchImpl(__gm__ T *address, T val)
131}131}
132#else132#else
133template <typename T>133template <typename T>
134-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExchImpl(__ubuf__ T *address, T val)134+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExchImpl(__ubuf__ T* address, T val)
135{135{
136 return atomicExch(address, val);136 return atomicExch(address, val);
137}137}
138 138 
139template <typename T>139template <typename T>
140-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExchImpl(__gm__ T *address, T val)140+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExchImpl(__gm__ T* address, T val)
141{141{
142 return atomicExch(address, val);142 return atomicExch(address, val);
143}143}
@@ -145,7 +145,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExchImpl(__gm__ T *address, T val)
145 145 
146#if defined(ASCENDC_CPU_DEBUG)146#if defined(ASCENDC_CPU_DEBUG)
147template <typename T>147template <typename T>
148-T AtomicMaxImpl(__gm__ T *address, T val)148+T AtomicMaxImpl(__gm__ T* address, T val)
149{149{
150 T ret;150 T ret;
151 ProcessLock::GetProcessLock()->Write();151 ProcessLock::GetProcessLock()->Write();
@@ -160,7 +160,7 @@ T AtomicMaxImpl(__gm__ T *address, T val)
160}160}
161#else161#else
162template <typename T>162template <typename T>
163-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMaxImpl(__ubuf__ T *address, T val)163+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMaxImpl(__ubuf__ T* address, T val)
164{164{
165 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, float>) {165 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, float>) {
166 return atomicMax(address, val);166 return atomicMax(address, val);
@@ -171,7 +171,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMaxImpl(__ubuf__ T *address, T val
171}171}
172 172 
173template <typename T>173template <typename T>
174-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMaxImpl(__gm__ T *address, T val)174+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMaxImpl(__gm__ T* address, T val)
175{175{
176 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half2, bfloat16x2_t>) {176 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half2, bfloat16x2_t>) {
177 return atomicMax(address, val);177 return atomicMax(address, val);
@@ -184,7 +184,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMaxImpl(__gm__ T *address, T val)
184 184 
185#if defined(ASCENDC_CPU_DEBUG)185#if defined(ASCENDC_CPU_DEBUG)
186template <typename T>186template <typename T>
187-T AtomicMinImpl(__gm__ T *address, T val)187+T AtomicMinImpl(__gm__ T* address, T val)
188{188{
189 T ret;189 T ret;
190 ProcessLock::GetProcessLock()->Write();190 ProcessLock::GetProcessLock()->Write();
@@ -199,7 +199,7 @@ T AtomicMinImpl(__gm__ T *address, T val)
199}199}
200#else200#else
201template <typename T>201template <typename T>
202-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMinImpl(__ubuf__ T *address, T val)202+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMinImpl(__ubuf__ T* address, T val)
203{203{
204 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, float>) {204 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, float>) {
205 return atomicMin(address, val);205 return atomicMin(address, val);
@@ -210,7 +210,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMinImpl(__ubuf__ T *address, T val
210}210}
211 211 
212template <typename T>212template <typename T>
213-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMinImpl(__gm__ T *address, T val)213+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMinImpl(__gm__ T* address, T val)
214{214{
215 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half2, bfloat16x2_t>) {215 if constexpr (SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, float, half2, bfloat16x2_t>) {
216 return atomicMin(address, val);216 return atomicMin(address, val);
@@ -223,7 +223,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMinImpl(__gm__ T *address, T val)
223 223 
224#if defined(ASCENDC_CPU_DEBUG)224#if defined(ASCENDC_CPU_DEBUG)
225template <typename T>225template <typename T>
226-T AtomicIncImpl(__gm__ T *address, T val)226+T AtomicIncImpl(__gm__ T* address, T val)
227{227{
228 T ret;228 T ret;
229 ProcessLock::GetProcessLock()->Write();229 ProcessLock::GetProcessLock()->Write();
@@ -240,7 +240,7 @@ T AtomicIncImpl(__gm__ T *address, T val)
240}240}
241#else241#else
242template <typename DstType, typename SrcType>242template <typename DstType, typename SrcType>
243-__SIMT_DEVICE_FUNCTIONS_DECL__ inline DstType AtomicIncImpl_(SrcType *address, DstType val)243+__SIMT_DEVICE_FUNCTIONS_DECL__ inline DstType AtomicIncImpl_(SrcType* address, DstType val)
244{244{
245 DstType old = *address;245 DstType old = *address;
246 DstType cmp;246 DstType cmp;
@@ -258,7 +258,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline DstType AtomicIncImpl_(SrcType *address, D
258}258}
259 259 
260template <typename T>260template <typename T>
261-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicIncImpl(__ubuf__ T *address, T val)261+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicIncImpl(__ubuf__ T* address, T val)
262{262{
263 if constexpr (SupportTypeSimtInternel<T, uint32_t>) {263 if constexpr (SupportTypeSimtInternel<T, uint32_t>) {
264 return atomicInc(address, val);264 return atomicInc(address, val);
@@ -268,7 +268,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicIncImpl(__ubuf__ T *address, T val
268}268}
269 269 
270template <typename T>270template <typename T>
271-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicIncImpl(__gm__ T *address, T val)271+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicIncImpl(__gm__ T* address, T val)
272{272{
273 if constexpr (SupportTypeSimtInternel<T, uint32_t, uint64_t>) {273 if constexpr (SupportTypeSimtInternel<T, uint32_t, uint64_t>) {
274 return atomicInc(address, val);274 return atomicInc(address, val);
@@ -280,7 +280,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicIncImpl(__gm__ T *address, T val)
280 280 
281#if defined(ASCENDC_CPU_DEBUG)281#if defined(ASCENDC_CPU_DEBUG)
282template <typename T>282template <typename T>
283-T AtomicDecImpl(__gm__ T *address, T val)283+T AtomicDecImpl(__gm__ T* address, T val)
284{284{
285 T ret;285 T ret;
286 ProcessLock::GetProcessLock()->Write();286 ProcessLock::GetProcessLock()->Write();
@@ -297,7 +297,7 @@ T AtomicDecImpl(__gm__ T *address, T val)
297}297}
298#else298#else
299template <typename DstType, typename SrcType>299template <typename DstType, typename SrcType>
300-__SIMT_DEVICE_FUNCTIONS_DECL__ inline DstType AtomicDecImpl_(SrcType *address, DstType val)300+__SIMT_DEVICE_FUNCTIONS_DECL__ inline DstType AtomicDecImpl_(SrcType* address, DstType val)
301{301{
302 DstType old = *address;302 DstType old = *address;
303 DstType cmp;303 DstType cmp;
@@ -315,7 +315,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline DstType AtomicDecImpl_(SrcType *address, D
315}315}
316 316 
317template <typename T>317template <typename T>
318-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDecImpl(__ubuf__ T *address, T val)318+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDecImpl(__ubuf__ T* address, T val)
319{319{
320 if constexpr (SupportTypeSimtInternel<T, uint32_t>) {320 if constexpr (SupportTypeSimtInternel<T, uint32_t>) {
321 return atomicDec(address, val);321 return atomicDec(address, val);
@@ -325,7 +325,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDecImpl(__ubuf__ T *address, T val
325}325}
326 326 
327template <typename T>327template <typename T>
328-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDecImpl(__gm__ T *address, T val)328+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDecImpl(__gm__ T* address, T val)
329{329{
330 if constexpr (SupportTypeSimtInternel<T, uint32_t, uint64_t>) {330 if constexpr (SupportTypeSimtInternel<T, uint32_t, uint64_t>) {
331 return atomicDec(address, val);331 return atomicDec(address, val);
@@ -337,7 +337,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDecImpl(__gm__ T *address, T val)
337 337 
338#if defined(ASCENDC_CPU_DEBUG)338#if defined(ASCENDC_CPU_DEBUG)
339template <typename T>339template <typename T>
340-T AtomicAndImpl(__gm__ T *address, T val)340+T AtomicAndImpl(__gm__ T* address, T val)
341{341{
342 T ret;342 T ret;
343 ProcessLock::GetProcessLock()->Write();343 ProcessLock::GetProcessLock()->Write();
@@ -348,13 +348,13 @@ T AtomicAndImpl(__gm__ T *address, T val)
348}348}
349#else349#else
350template <typename T>350template <typename T>
351-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAndImpl(__ubuf__ T *address, T val)351+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAndImpl(__ubuf__ T* address, T val)
352{352{
353 return atomicAnd(address, val);353 return atomicAnd(address, val);
354}354}
355 355 
356template <typename T>356template <typename T>
357-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAndImpl(__gm__ T *address, T val)357+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAndImpl(__gm__ T* address, T val)
358{358{
359 return atomicAnd(address, val);359 return atomicAnd(address, val);
360}360}
@@ -362,7 +362,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAndImpl(__gm__ T *address, T val)
362 362 
363#if defined(ASCENDC_CPU_DEBUG)363#if defined(ASCENDC_CPU_DEBUG)
364template <typename T>364template <typename T>
365-T AtomicOrImpl(__gm__ T *address, T val)365+T AtomicOrImpl(__gm__ T* address, T val)
366{366{
367 T ret;367 T ret;
368 ProcessLock::GetProcessLock()->Write();368 ProcessLock::GetProcessLock()->Write();
@@ -373,13 +373,13 @@ T AtomicOrImpl(__gm__ T *address, T val)
373}373}
374#else374#else
375template <typename T>375template <typename T>
376-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOrImpl(__ubuf__ T *address, T val)376+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOrImpl(__ubuf__ T* address, T val)
377{377{
378 return atomicOr(address, val);378 return atomicOr(address, val);
379}379}
380 380 
381template <typename T>381template <typename T>
382-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOrImpl(__gm__ T *address, T val)382+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOrImpl(__gm__ T* address, T val)
383{383{
384 return atomicOr(address, val);384 return atomicOr(address, val);
385}385}
@@ -387,7 +387,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOrImpl(__gm__ T *address, T val)
387 387 
388#if defined(ASCENDC_CPU_DEBUG)388#if defined(ASCENDC_CPU_DEBUG)
389template <typename T>389template <typename T>
390-T AtomicXorImpl(__gm__ T *address, T val)390+T AtomicXorImpl(__gm__ T* address, T val)
391{391{
392 T ret;392 T ret;
393 ProcessLock::GetProcessLock()->Write();393 ProcessLock::GetProcessLock()->Write();
@@ -398,18 +398,18 @@ T AtomicXorImpl(__gm__ T *address, T val)
398}398}
399#else399#else
400template <typename T>400template <typename T>
401-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXorImpl(__ubuf__ T *address, T val)401+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXorImpl(__ubuf__ T* address, T val)
402{402{
403 return atomicXOr(address, val);403 return atomicXOr(address, val);
404}404}
405 405 
406template <typename T>406template <typename T>
407-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXorImpl(__gm__ T *address, T val)407+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXorImpl(__gm__ T* address, T val)
408{408{
409 return atomicXOr(address, val);409 return atomicXOr(address, val);
410}410}
411#endif411#endif
412 412 
413-} // namespace Simt413+} // namespace Simt
414-} // namespace AscendC414+} // namespace AscendC
415-#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_ATOMIC_IMPL_H415+#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_ATOMIC_IMPL_H
Mimpl/simt_api/cpp/dav_3510/kernel_simt_bessel_impl.h+28-27
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/*!11/*!
12 * \file kernel_simt_bessel_impl.h12 * \file kernel_simt_bessel_impl.h
@@ -41,7 +41,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Y0Impl(T x);
41template <typename T>41template <typename T>
42__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Y1Impl(T x);42__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Y1Impl(T x);
43 43 
44-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float TrigRedSlowpathFFastMode(float a, int *quadrant)44+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float TrigRedSlowpathFFastMode(float a, int* quadrant)
45{45{
46 uint64_t q, q2;46 uint64_t q, q2;
47 q = (uint64_t)(a * ConstantsInternal::TWO_OVER_PI);47 q = (uint64_t)(a * ConstantsInternal::TWO_OVER_PI);
@@ -62,7 +62,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float SinfPoly(float a, float s)
62 r = FmaImpl(r, s, 8.33338592e-3f);62 r = FmaImpl(r, s, 8.33338592e-3f);
63 r = FmaImpl(r, s, -1.66666672e-1f);63 r = FmaImpl(r, s, -1.66666672e-1f);
64 float t = FmaImpl(a, s, 0.0f);64 float t = FmaImpl(a, s, 0.0f);
65- r = FmaImpl(r,t,a);65+ r = FmaImpl(r, t, a);
66 return r;66 return r;
67}67}
68 68 
@@ -83,12 +83,12 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float SinCosfMinusPIOverFour(float a, int
83 a = a * 0.0f + a;83 a = a * 0.0f + a;
84 r = TrigRedSlowpathFFastMode(a, &i);84 r = TrigRedSlowpathFFastMode(a, &i);
85 float c, s, t;85 float c, s, t;
86- s = r * r;86+ s = r * r;
87 c = CosfPoly(s);87 c = CosfPoly(s);
88 s = SinfPoly(r, s);88 s = SinfPoly(r, s);
89 if (i & 2) { // 2:Third and Fourth Quadrants89 if (i & 2) { // 2:Third and Fourth Quadrants
90- s = 0.0f-s;90+ s = 0.0f - s;
91- c = 0.0f-c;91+ c = 0.0f - c;
92 }92 }
93 if (index == 0) { // 0:Calculate CosfMinusPIOverFour93 if (index == 0) { // 0:Calculate CosfMinusPIOverFour
94 if (i & 1) {94 if (i & 1) {
@@ -207,11 +207,11 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float JnYnAsymptoticBesselAmplitude(int n,
207 txq *= txq;207 txq *= txq;
208 if (index == 0) { // 0:Calculate JnAsymptoticBesselAmplitude208 if (index == 0) { // 0:Calculate JnAsymptoticBesselAmplitude
209 // 1 + (4 * n^2 - 1) / (8 * x^2) + 3 * (4 * n^2 - 1) * (4 * n^2 - 9) / (128 * x^4)209 // 1 + (4 * n^2 - 1) / (8 * x^2) + 3 * (4 * n^2 - 1) * (4 * n^2 - 9) / (128 * x^4)
210- s += (mu - 1) / (2 * txq); // 1,2:Constants in formulas210+ s += (mu - 1) / (2 * txq); // 1,2:Constants in formulas
211 s += 3 * (mu - 1) * (mu - 9) / (txq * txq * 8); // 3,1,9,8:Constants in formulas211 s += 3 * (mu - 1) * (mu - 9) / (txq * txq * 8); // 3,1,9,8:Constants in formulas
212 } else {212 } else {
213- s += (mu - 1) / (2 * txq); // 1,2:Constants in formulas213+ s += (mu - 1) / (2 * txq); // 1,2:Constants in formulas
214- s += 3 * (mu - 1) * (mu - 9) / (txq * txq * 8); // 3,1,9,8:Constants in formulas214+ s += 3 * (mu - 1) * (mu - 9) / (txq * txq * 8); // 3,1,9,8:Constants in formulas
215 s += 15 * (mu - 1) * (mu - 9) * (mu - 25) / (txq * txq * txq * 8 * 6); // 15,1,9,25,8,6:Constants in formulas215 s += 15 * (mu - 1) * (mu - 9) * (mu - 25) / (txq * txq * txq * 8 * 6); // 15,1,9,25,8,6:Constants in formulas
216 }216 }
217 return SqrtImpl(s * 2 / (ConstantsInternal::PI * x)); // 2:Constants in formulas sqrt(2*s/(π*x))217 return SqrtImpl(s * 2 / (ConstantsInternal::PI * x)); // 2:Constants in formulas sqrt(2*s/(π*x))
@@ -223,7 +223,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float JnYnAsymptoticBesselPhaseMx(int n, f
223 float denom = 4 * x;223 float denom = 4 * x;
224 float denomMult = denom * denom;224 float denomMult = denom * denom;
225 float s = 0;225 float s = 0;
226- // (4 * n^2 - 1) / (8 * x) + (4 * n^2 - 1) * (4 * n^2 - 25) / (384 * x^3) + (4 * n^2 - 1) * (16 * n^4 - 456 * n^2 + 1073) / (5120 * x^5)226+ // (4 * n^2 - 1) / (8 * x) + (4 * n^2 - 1) * (4 * n^2 - 25) / (384 * x^3) + (4 * n^2 - 1) * (16 * n^4 - 456 * n^2 +
227+ // 1073) / (5120 * x^5)
227 s += (mu - 1) / (2 * denom); // 1,2:Constants in formulas228 s += (mu - 1) / (2 * denom); // 1,2:Constants in formulas
228 denom *= denomMult;229 denom *= denomMult;
229 s += (mu - 1) * (mu - 25) / (6 * denom); // 1,25,6:Constants in formulas230 s += (mu - 1) * (mu - 25) / (6 * denom); // 1,25,6:Constants in formulas
@@ -241,7 +242,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float JnCase1(int n, float x)
241 float offset = (float)n / 2 + 0.25f;242 float offset = (float)n / 2 + 0.25f;
242 SinCospiImpl(offset, si, ci);243 SinCospiImpl(offset, si, ci);
243 SinCosImpl(phase, sp, cp);244 SinCosImpl(phase, sp, cp);
244- float sinPhase = cp * (cx * ci + sx * si) - sp * (sx *ci - cx * si);245+ float sinPhase = cp * (cx * ci + sx * si) - sp * (sx * ci - cx * si);
245 return sinPhase * ampl;246 return sinPhase * ampl;
246}247}
247 248 
@@ -249,7 +250,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float JnCase2(int n, float x)
249{250{
250 float prev = J0Impl(x);251 float prev = J0Impl(x);
251 float current = J1Impl(x);252 float current = J1Impl(x);
252- for(int k = 1; k < n; k++){253+ for (int k = 1; k < n; k++) {
253 float value = (2 * k * current / x) - prev;254 float value = (2 * k * current / x) - prev;
254 prev = current;255 prev = current;
255 current = value;256 current = value;
@@ -285,7 +286,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float JnCase4(int n, float x)
285 float s = 0;286 float s = 0;
286 float scale = 1;287 float scale = 1;
287 float res;288 float res;
288- for (int k = N-1; k >= 0; k--) {289+ for (int k = N - 1; k >= 0; k--) {
289 float fact = 2 * (k + 1) / x;290 float fact = 2 * (k + 1) / x;
290 if (fact > 1 && AbsImpl(current) > maxValue) {291 if (fact > 1 && AbsImpl(current) > maxValue) {
291 prev /= maxValue;292 prev /= maxValue;
@@ -495,14 +496,15 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float YnCase1(int n, float x)
495{496{
496 float lgammaN = LgammaImpl(n);497 float lgammaN = LgammaImpl(n);
497 float gammaN = ExpImpl(lgammaN);498 float gammaN = ExpImpl(lgammaN);
498- return -gammaN / ConstantsInternal::PI * PowImpl(2 / x, (float)n); // 2:Constants in formulas -(n - 1)! * (2 / x)^n / π499+ return -gammaN / ConstantsInternal::PI *
500+ PowImpl(2 / x, (float)n); // 2:Constants in formulas -(n - 1)! * (2 / x)^n / π
499}501}
500 502 
501__SIMT_DEVICE_FUNCTIONS_DECL__ inline float YnCase2(int n, float x)503__SIMT_DEVICE_FUNCTIONS_DECL__ inline float YnCase2(int n, float x)
502{504{
503 float ampl = JnYnAsymptoticBesselAmplitude(n, x, 1); // 1: Calculate YnAsymptoticBesselAmplitude505 float ampl = JnYnAsymptoticBesselAmplitude(n, x, 1); // 1: Calculate YnAsymptoticBesselAmplitude
504 float phase = JnYnAsymptoticBesselPhaseMx(n, x);506 float phase = JnYnAsymptoticBesselPhaseMx(n, x);
505- float phaseShift = n * float(ConstantsInternal::PI)/2 + float(ConstantsInternal::PI)/4;507+ float phaseShift = n * float(ConstantsInternal::PI) / 2 + float(ConstantsInternal::PI) / 4;
506 float cosX = CosImpl(x);508 float cosX = CosImpl(x);
507 float sinX = SinImpl(x);509 float sinX = SinImpl(x);
508 float cosShift = CosImpl(phaseShift - phase);510 float cosShift = CosImpl(phaseShift - phase);
@@ -524,7 +526,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float YnCase3(int n, float x)
524 current = value;526 current = value;
525 k += 1;527 k += 1;
526 while (k < n) {528 while (k < n) {
527- if (AbsImpl(mult) > 1.0f && AbsImpl(current) > 1.0f && k > 2) { // 2 : index529+ if (AbsImpl(mult) > 1.0f && AbsImpl(current) > 1.0f && k > 2) { // 2 : index
528 current = 1.0f;530 current = 1.0f;
529 }531 }
530 mult = 2 * k / x; // 2:Constant coefficient 2 * k / x532 mult = 2 * k / x; // 2:Constant coefficient 2 * k / x
@@ -707,7 +709,6 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline U YnImpl(T n, U x)
707 return YnCase3(n, x);709 return YnCase3(n, x);
708}710}
709 711 
710- 712+} // namespace Simt
711-} // namespace Simt713+} // namespace AscendC
712-} // namespace AscendC714+#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_BESSEL_IMPL_H
713-#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_BESSEL_IMPL_H
Mimpl/simt_api/cpp/dav_3510/kernel_simt_cast_impl.h+96-97
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/*!11/*!
12 * \file kernel_simt_cast_impl.h12 * \file kernel_simt_cast_impl.h
@@ -23,20 +23,20 @@ namespace AscendC {
23namespace Simt {23namespace Simt {
24 24 
25#ifndef ASCENDC_CPU_DEBUG25#ifndef ASCENDC_CPU_DEBUG
26-#define REG_ROUND_VEC(type, func_name, len) \26+#define REG_ROUND_VEC(type, func_name, len) \
27- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type &dst, type &src) \27+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type& dst, type& src) \
28- { \28+ { \
29- for (int i = 0; i < len; i++) { \29+ for (int i = 0; i < len; i++) { \
30- dst[i] = func_name(src[i]);\30+ dst[i] = func_name(src[i]); \
31- } \31+ } \
32 }32 }
33 33 
34-#define REG_ROUND_VEC_(dst_type, src_type, d_type, s_type, func_name, len) \34+#define REG_ROUND_VEC_(dst_type, src_type, d_type, s_type, func_name, len) \
35- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(dst_type &dst, src_type &src) \35+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(dst_type& dst, src_type& src) \
36- { \36+ { \
37- for (int i = 0; i < len; i++) { \37+ for (int i = 0; i < len; i++) { \
38- dst[i] = func_name##_<d_type, s_type>(src[i]); \38+ dst[i] = func_name##_<d_type, s_type>(src[i]); \
39- } \39+ } \
40 }40 }
41 41 
42#define REG_CAST_IMPL_VEC(type, func_name) \42#define REG_CAST_IMPL_VEC(type, func_name) \
@@ -56,64 +56,61 @@ namespace Simt {
56#define REG_CAST_HF_IMPL_VEC_(dst_type, src_type, func_name) \56#define REG_CAST_HF_IMPL_VEC_(dst_type, src_type, func_name) \
57 REG_ROUND_VEC_(dst_type##2, src_type##2, dst_type, src_type, func_name, 2)57 REG_ROUND_VEC_(dst_type##2, src_type##2, dst_type, src_type, func_name, 2)
58#else58#else
59-#define REG_ROUND_VEC_1(type, func_name) \59+#define REG_ROUND_VEC_1(type, func_name) \
60- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type &dst, type &src) \60+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type& dst, type& src) { dst.x = func_name(src.x); }
61- { \61+ 
62- dst.x = func_name(src.x); \62+#define REG_ROUND_VEC_2(type, func_name) \
63+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type& dst, type& src) \
64+ { \
65+ dst.x = func_name(src.x); \
66+ dst.y = func_name(src.y); \
63 }67 }
64 68 
65-#define REG_ROUND_VEC_2(type, func_name) \69+#define REG_ROUND_VEC_3(type, func_name) \
66- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type &dst, type &src) \70+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type& dst, type& src) \
67- { \71+ { \
68- dst.x = func_name(src.x); \72+ dst.x = func_name(src.x); \
69- dst.y = func_name(src.y); \73+ dst.y = func_name(src.y); \
74+ dst.z = func_name(src.z); \
70 }75 }
71 76 
72-#define REG_ROUND_VEC_3(type, func_name) \77+#define REG_ROUND_VEC_4(type, func_name) \
73- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type &dst, type &src) \78+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type& dst, type& src) \
74- { \79+ { \
75- dst.x = func_name(src.x); \80+ dst.x = func_name(src.x); \
76- dst.y = func_name(src.y); \81+ dst.y = func_name(src.y); \
77- dst.z = func_name(src.z); \82+ dst.z = func_name(src.z); \
83+ dst.w = func_name(src.w); \
78 }84 }
79 85 
80-#define REG_ROUND_VEC_4(type, func_name) \86+#define REG_ROUND_VEC_1_(dst_type, src_type, d_type, s_type, func_name) \
81- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type &dst, type &src) \87+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(dst_type& dst, src_type& src) \
82- { \88+ { \
83- dst.x = func_name(src.x); \89+ dst.x = func_name##_<d_type, s_type>(src.x); \
84- dst.y = func_name(src.y); \
85- dst.z = func_name(src.z); \
86- dst.w = func_name(src.w); \
87 }90 }
88 91 
89-#define REG_ROUND_VEC_1_(dst_type, src_type, d_type, s_type, func_name) \92+#define REG_ROUND_VEC_2_(dst_type, src_type, d_type, s_type, func_name) \
90- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(dst_type &dst, src_type &src) \93+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(dst_type& dst, src_type& src) \
91- { \94+ { \
92- dst.x = func_name##_<d_type, s_type>(src.x); \95+ dst.x = func_name##_<d_type, s_type>(src.x); \
96+ dst.y = func_name##_<d_type, s_type>(src.y); \
93 }97 }
94 98 
95-#define REG_ROUND_VEC_2_(dst_type, src_type, d_type, s_type, func_name) \99+#define REG_ROUND_VEC_3_(dst_type, src_type, d_type, s_type, func_name) \
96- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(dst_type &dst, src_type &src) \100+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(dst_type& dst, src_type& src) \
97- { \101+ { \
98- dst.x = func_name##_<d_type, s_type>(src.x); \102+ dst.x = func_name##_<d_type, s_type>(src.x); \
99- dst.y = func_name##_<d_type, s_type>(src.y); \103+ dst.y = func_name##_<d_type, s_type>(src.y); \
104+ dst.z = func_name##_<d_type, s_type>(src.z); \
100 }105 }
101 106 
102-#define REG_ROUND_VEC_3_(dst_type, src_type, d_type, s_type, func_name) \107+#define REG_ROUND_VEC_4_(dst_type, src_type, d_type, s_type, func_name) \
103- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(dst_type &dst, src_type &src) \108+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(dst_type& dst, src_type& src) \
104- { \109+ { \
105- dst.x = func_name##_<d_type, s_type>(src.x); \110+ dst.x = func_name##_<d_type, s_type>(src.x); \
106- dst.y = func_name##_<d_type, s_type>(src.y); \111+ dst.y = func_name##_<d_type, s_type>(src.y); \
107- dst.z = func_name##_<d_type, s_type>(src.z); \112+ dst.z = func_name##_<d_type, s_type>(src.z); \
108- }113+ dst.w = func_name##_<d_type, s_type>(src.w); \
109- 
110-#define REG_ROUND_VEC_4_(dst_type, src_type, d_type, s_type, func_name) \
111- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(dst_type &dst, src_type &src) \
112- { \
113- dst.x = func_name##_<d_type, s_type>(src.x); \
114- dst.y = func_name##_<d_type, s_type>(src.y); \
115- dst.z = func_name##_<d_type, s_type>(src.z); \
116- dst.w = func_name##_<d_type, s_type>(src.w); \
117 }114 }
118 115 
119#define REG_CAST_IMPL_VEC(type, func_name) \116#define REG_CAST_IMPL_VEC(type, func_name) \
@@ -134,16 +131,13 @@ namespace Simt {
134 REG_ROUND_VEC_2_(dst_type##2, src_type##2, dst_type, src_type, func_name)131 REG_ROUND_VEC_2_(dst_type##2, src_type##2, dst_type, src_type, func_name)
135#endif132#endif
136 133 
137-#define REG_ROUND(type, func_name) \134+#define REG_ROUND(type, func_name) \
138- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type &dst, type &src) \135+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name(type& dst, type& src) { dst = func_name(src); }
139- { \
140- dst = func_name(src); \
141- }
142 136 
143-#define REG_ROUND_(d_type, s_type, func_name) \137+#define REG_ROUND_(d_type, s_type, func_name) \
144- __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(d_type &dst, s_type &src) \138+ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void func_name##_(d_type& dst, s_type& src) \
145- { \139+ { \
146- dst = func_name##_<d_type, s_type>(src); \140+ dst = func_name##_<d_type, s_type>(src); \
147 }141 }
148 142 
149#define REG_CAST_IMPL_(dst_type, src_type, func_name) REG_ROUND_(dst_type, src_type, func_name)143#define REG_CAST_IMPL_(dst_type, src_type, func_name) REG_ROUND_(dst_type, src_type, func_name)
@@ -161,11 +155,11 @@ namespace Simt {
161 REG_CAST_IMPL_(float, int, round_mode) \155 REG_CAST_IMPL_(float, int, round_mode) \
162 REG_CAST_IMPL_(float, long, round_mode)156 REG_CAST_IMPL_(float, long, round_mode)
163 157 
164-#define REG_CAST_VEC_(round_mode) \158+#define REG_CAST_VEC_(round_mode) \
165- REG_CAST_IMPL_VEC_(int, float, round_mode) \159+ REG_CAST_IMPL_VEC_(int, float, round_mode) \
166- REG_CAST_IMPL_VEC_(long, float, round_mode) \160+ REG_CAST_IMPL_VEC_(long, float, round_mode) \
167- REG_CAST_IMPL_VEC_(float, int, round_mode) \161+ REG_CAST_IMPL_VEC_(float, int, round_mode) \
168- REG_CAST_IMPL_VEC_(float, long, round_mode) \162+ REG_CAST_IMPL_VEC_(float, long, round_mode) \
169 REG_CAST_HF_IMPL_VEC_(float, half, round_mode)163 REG_CAST_HF_IMPL_VEC_(float, half, round_mode)
170 164 
171#ifdef ASCENDC_CPU_DEBUG165#ifdef ASCENDC_CPU_DEBUG
@@ -226,25 +220,30 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CastImpl(U x)
226#if defined(ASCENDC_CPU_DEBUG)220#if defined(ASCENDC_CPU_DEBUG)
227 return CastFallback<T, U, roundMode>(x);221 return CastFallback<T, U, roundMode>(x);
228#else222#else
229- if constexpr ((roundMode == RoundMode::CAST_EVEN || roundMode == RoundMode::CAST_ZERO) &&223+ if constexpr (
230- SupportTypeSimtInternel<Tuple<U, T>, Tuple<float, int>, Tuple<int, float>, Tuple<float, int64_t>,224+ (roundMode == RoundMode::CAST_EVEN || roundMode == RoundMode::CAST_ZERO) &&
231- Tuple<int64_t, float>, Tuple<float, half>, Tuple<float, bfloat16_t>>) {225+ SupportTypeSimtInternel<
226+ Tuple<U, T>, Tuple<float, int>, Tuple<int, float>, Tuple<float, int64_t>, Tuple<int64_t, float>,
227+ Tuple<float, half>, Tuple<float, bfloat16_t> >) {
232 return CastFallback<T, U, roundMode>(x);228 return CastFallback<T, U, roundMode>(x);
233 }229 }
234- if constexpr (roundMode == RoundMode::CAST_NONE &&230+ if constexpr (
235- SupportTypeSimtInternel<Tuple<U, T>, Tuple<half, float>, Tuple<bfloat16_t, float>>) {231+ roundMode == RoundMode::CAST_NONE &&
232+ SupportTypeSimtInternel<Tuple<U, T>, Tuple<half, float>, Tuple<bfloat16_t, float> >) {
236 return CastFallback<T, U, roundMode>(x);233 return CastFallback<T, U, roundMode>(x);
237 }234 }
238 T y;235 T y;
239- if constexpr (SupportTypeSimtInternel<Tuple<T, U>, Tuple<uint32_t, half>, Tuple<int32_t, half>, Tuple<uint32_t, float>,236+ if constexpr (SupportTypeSimtInternel<
240- Tuple<int32_t, float>, Tuple<uint64_t, float>, Tuple<int64_t, float>,237+ Tuple<T, U>, Tuple<uint32_t, half>, Tuple<int32_t, half>, Tuple<uint32_t, float>,
241- Tuple<uint32_t, bfloat16_t>, Tuple<int32_t, bfloat16_t>>) {238+ Tuple<int32_t, float>, Tuple<uint64_t, float>, Tuple<int64_t, float>, Tuple<uint32_t, bfloat16_t>,
239+ Tuple<int32_t, bfloat16_t> >) {
242 y = CastSat<T, U, roundMode>(x);240 y = CastSat<T, U, roundMode>(x);
243- } else if constexpr (SupportTypeSimtInternel<Tuple<T, U>, Tuple<half, uint32_t>, Tuple<float, uint32_t>,241+ } else if constexpr (SupportTypeSimtInternel<
244- Tuple<bfloat16_t, uint32_t>, Tuple<half, int32_t>, Tuple<float, int32_t>,242+ Tuple<T, U>, Tuple<half, uint32_t>, Tuple<float, uint32_t>, Tuple<bfloat16_t, uint32_t>,
245- Tuple<bfloat16_t, int32_t>, Tuple<float, uint64_t>, Tuple<float, int64_t>,243+ Tuple<half, int32_t>, Tuple<float, int32_t>, Tuple<bfloat16_t, int32_t>,
246- Tuple<float, half>, Tuple<bfloat16_t, half>, Tuple<half, float>,244+ Tuple<float, uint64_t>, Tuple<float, int64_t>, Tuple<float, half>, Tuple<bfloat16_t, half>,
247- Tuple<bfloat16_t, float>, Tuple<half, bfloat16_t>, Tuple<float, bfloat16_t>>) {245+ Tuple<half, float>, Tuple<bfloat16_t, float>, Tuple<half, bfloat16_t>,
246+ Tuple<float, bfloat16_t> >) {
248 switch (satMode) {247 switch (satMode) {
249 case SatMode::SAT:248 case SatMode::SAT:
250 y = CastSat<T, U, roundMode>(x);249 y = CastSat<T, U, roundMode>(x);
@@ -271,7 +270,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T RintImpl(T x)
271}270}
272 271 
273template <typename T>272template <typename T>
274- __SIMT_DEVICE_FUNCTIONS_DECL__ inline T FloorImpl(T x)273+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T FloorImpl(T x)
275{274{
276 return FloorIntrinsicsImpl(x);275 return FloorIntrinsicsImpl(x);
277}276}
@@ -292,6 +291,6 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T TruncImpl(T x)
292 }291 }
293}292}
294 293 
295-} // namespace Simt294+} // namespace Simt
296-} // namespace AscendC295+} // namespace AscendC
297-#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_CAST_IMPL_H296+#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_CAST_IMPL_H
Mimpl/simt_api/cpp/dav_3510/kernel_simt_cast_sat_impl.h+12-12
@@ -1,14 +1,14 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11- /*!11+/*!
12 * \file kernel_simt_cast_sat_impl.h12 * \file kernel_simt_cast_sat_impl.h
13 * \brief13 * \brief
14 */14 */
@@ -262,6 +262,6 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CastNoSat(U x)
262}262}
263#endif263#endif
264 264 
265-} // namespace Simt265+} // namespace Simt
266-} // namespace AscendC266+} // namespace AscendC
267-#endif // ASCENDC_MODULE_SIMT_CAST_IMPL_H267+#endif // ASCENDC_MODULE_SIMT_CAST_IMPL_H
Mimpl/simt_api/cpp/dav_3510/kernel_simt_cmp_impl.h+14-20
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_CMP_IMPL_H11#ifndef IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_CMP_IMPL_H
12#define IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_CMP_IMPL_H12#define IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_CMP_IMPL_H
@@ -31,7 +31,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsInfImpl(T x)
31 31 
32/**32/**
33 * This only check positiveFinite, when -inf use this need use Abs to protect33 * This only check positiveFinite, when -inf use this need use Abs to protect
34-*/34+ */
35__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsPositiveInfImpl(float x)35__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsPositiveInfImpl(float x)
36{36{
37 uint32_t* intX = (uint32_t*)&x;37 uint32_t* intX = (uint32_t*)&x;
@@ -44,15 +44,9 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsNegativeInfImpl(float x)
44 return *intX == ConstantsInternal::NEG_INF;44 return *intX == ConstantsInternal::NEG_INF;
45}45}
46 46 
47-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsFiniteImpl(float x)47+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsFiniteImpl(float x) { return __isfinite(x); }
48-{
49- return __isfinite(x);
50-}
51 48 
52-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsFiniteImpl(half x)49+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsFiniteImpl(half x) { return __isfinite(x); }
53-{50+} // namespace Simt
54- return __isfinite(x);51+} // namespace AscendC
55-}52+#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_CMP_IMPL_H
56-} // namespace Simt
57-} // namespace AscendC
58-#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_CMP_IMPL_H
Mimpl/simt_api/cpp/dav_3510/kernel_simt_common_impl.h+34-59
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/*!11/*!
12 * \file kernel_simt_common_impl.h12 * \file kernel_simt_common_impl.h
@@ -22,17 +22,14 @@ namespace AscendC {
22 22 
23namespace Simt {23namespace Simt {
24 24 
25-template<typename T, typename... Args>25+template <typename T, typename... Args>
26constexpr bool SupportTypeSimtInternel = (std::is_same_v<T, Args> || ...);26constexpr bool SupportTypeSimtInternel = (std::is_same_v<T, Args> || ...);
27 27 
28typedef bfloat16_t bhalf;28typedef bfloat16_t bhalf;
29 29 
30constexpr int32_t THREAD_GROUP_SIZE = 32;30constexpr int32_t THREAD_GROUP_SIZE = 32;
31 31 
32-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t GetWarpSizeImpl()32+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t GetWarpSizeImpl() { return THREAD_GROUP_SIZE; }
33-{
34- return THREAD_GROUP_SIZE;
35-}
36 33 
37template <int32_t dim = 0>34template <int32_t dim = 0>
38__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetThreadNumImpl()35__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetThreadNumImpl()
@@ -61,17 +58,12 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetThreadIdxImpl()
61 return 0;58 return 0;
62}59}
63 60 
64-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBlockIdxImpl()61+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBlockIdxImpl() { return blockIdx.x; }
65-{
66- return blockIdx.x;
67-}
68 62 
69-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBlockNumImpl()63+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBlockNumImpl() { return gridDim.x; }
70-{
71- return gridDim.x;
72-}
73 64 
74-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBf16U16(float f32, uint32_t u16, uint32_t u32, uint32_t bf16LastBit, RoundMode rnd)65+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBf16U16(
66+ float f32, uint32_t u16, uint32_t u32, uint32_t bf16LastBit, RoundMode rnd)
75{67{
76 uint32_t carryOutBit = 0x10000;68 uint32_t carryOutBit = 0x10000;
77 uint32_t topU32 = (u32 & ConstantsInternal::HIGH_16_BIT) + carryOutBit;69 uint32_t topU32 = (u32 & ConstantsInternal::HIGH_16_BIT) + carryOutBit;
@@ -120,7 +112,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t F32ToBf16(float f32, RoundMode
120 }112 }
121 return f32;113 return f32;
122 }114 }
123- uint32_t *u32ptr = (uint32_t *)&f32;115+ uint32_t* u32ptr = (uint32_t*)&f32;
124 uint32_t u32 = *u32ptr;116 uint32_t u32 = *u32ptr;
125 uint32_t bf16LastBit = (u32 >> ConstantsInternal::U16_BIT) & 0x1;117 uint32_t bf16LastBit = (u32 >> ConstantsInternal::U16_BIT) & 0x1;
126 bfloat16_t sign = (f32 >= 0) ? 1 : -1;118 bfloat16_t sign = (f32 >= 0) ? 1 : -1;
@@ -137,7 +129,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t F32ToBf16(float f32, RoundMode
137 }129 }
138 u16 = GetBf16U16(f32, u16, u32, bf16LastBit, rnd);130 u16 = GetBf16U16(f32, u16, u32, bf16LastBit, rnd);
139 bfloat16_t bf16 = 0;131 bfloat16_t bf16 = 0;
140- uint16_t *u16ptr = (uint16_t *)&bf16;132+ uint16_t* u16ptr = (uint16_t*)&bf16;
141 *u16ptr = u16;133 *u16ptr = u16;
142 if (((u16 == ConstantsInternal::B_HALF_INF) || (u16 == ConstantsInternal::B_HALF_NEG_INF))) {134 if (((u16 == ConstantsInternal::B_HALF_INF) || (u16 == ConstantsInternal::B_HALF_NEG_INF))) {
143 if (satMode) {135 if (satMode) {
@@ -151,7 +143,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t F32ToBf16(float f32, RoundMode
151 143 
152__SIMT_DEVICE_FUNCTIONS_DECL__ inline half F32Tof16(float f32, RoundMode rnd)144__SIMT_DEVICE_FUNCTIONS_DECL__ inline half F32Tof16(float f32, RoundMode rnd)
153{145{
154- uint32_t *u32Ptr = (uint32_t *)&f32;146+ uint32_t* u32Ptr = (uint32_t*)&f32;
155 uint32_t u32 = *u32Ptr;147 uint32_t u32 = *u32Ptr;
156 int32_t exponent = u32 & ConstantsInternal::INF;148 int32_t exponent = u32 & ConstantsInternal::INF;
157 uint32_t f32ManU32 = u32 & 0x7fffff;149 uint32_t f32ManU32 = u32 & 0x7fffff;
@@ -203,19 +195,16 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half F32Tof16(float f32, RoundMode rnd)
203 u16 = sign ^ ((f16ExpVal << ConstantsInternal::F16_MAN_BIT_LEN) + f16Man);195 u16 = sign ^ ((f16ExpVal << ConstantsInternal::F16_MAN_BIT_LEN) + f16Man);
204 }196 }
205 half f16 = 0;197 half f16 = 0;
206- uint16_t *u16ptr = (uint16_t *)&f16;198+ uint16_t* u16ptr = (uint16_t*)&f16;
207 *u16ptr = u16;199 *u16ptr = u16;
208 return f16;200 return f16;
209}201}
210 202 
211#if defined(ASCENDC_CPU_DEBUG)203#if defined(ASCENDC_CPU_DEBUG)
212-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half RoundInf(half x)204+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half RoundInf(half x) { return x; }
213-{
214- return x;
215-}
216#endif205#endif
217-} // namespace Simt206+} // namespace Simt
218-} // namespace AscendC207+} // namespace AscendC
219 208 
220#if defined(ASCENDC_CPU_DEBUG)209#if defined(ASCENDC_CPU_DEBUG)
221#include <cmath>210#include <cmath>
@@ -244,7 +233,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t FloorIntrinsicsImpl(bfloat16_t
244 if (IsInfImpl(x)) {233 if (IsInfImpl(x)) {
245 return x;234 return x;
246 }235 }
247- uint16_t *uintX = (uint16_t *)(&x);236+ uint16_t* uintX = (uint16_t*)(&x);
248 uint16_t bf16Sign15Bit = 0xf;237 uint16_t bf16Sign15Bit = 0xf;
249 uint16_t bf16Frac7Bit = 0x7;238 uint16_t bf16Frac7Bit = 0x7;
250 int8_t sign = ((((*uintX) >> bf16Sign15Bit) & 0x1) == 0) ? 1 : -1;239 int8_t sign = ((((*uintX) >> bf16Sign15Bit) & 0x1) == 0) ? 1 : -1;
@@ -299,10 +288,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T FloorIntrinsicsImpl(T x)
299 }288 }
300}289}
301 290 
302-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float FloorIntrinsicsImpl(float x)291+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float FloorIntrinsicsImpl(float x) { return floor(x); }
303-{
304- return floor(x);
305-}
306 292 
307__SIMT_DEVICE_FUNCTIONS_DECL__ inline half FloorIntrinsicsImpl(half x)293__SIMT_DEVICE_FUNCTIONS_DECL__ inline half FloorIntrinsicsImpl(half x)
308{294{
@@ -360,7 +346,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline DstType Floor_(SrcType x)
360 }346 }
361}347}
362 348 
363-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Floor_(half2 &dst, float2 &src)349+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Floor_(half2& dst, float2& src)
364{350{
365 dst = __cvt_half2<ROUND::F, RoundingSaturation::RS_DISABLE_VALUE>(src);351 dst = __cvt_half2<ROUND::F, RoundingSaturation::RS_DISABLE_VALUE>(src);
366}352}
@@ -386,10 +372,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t RoundIntrinsicsImpl(bfloat16_t
386 }372 }
387}373}
388 374 
389-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RoundIntrinsicsImpl(float x)375+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RoundIntrinsicsImpl(float x) { return round(x); }
390-{
391- return round(x);
392-}
393 376 
394__SIMT_DEVICE_FUNCTIONS_DECL__ inline half RoundIntrinsicsImpl(half x)377__SIMT_DEVICE_FUNCTIONS_DECL__ inline half RoundIntrinsicsImpl(half x)
395{378{
@@ -450,10 +433,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t RintIntrinsicsImpl(bfloat16_t x
450 }433 }
451}434}
452 435 
453-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RintIntrinsicsImpl(float x)436+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RintIntrinsicsImpl(float x) { return rint(x); }
454-{
455- return rint(x);
456-}
457 437 
458__SIMT_DEVICE_FUNCTIONS_DECL__ inline half RintIntrinsicsImpl(half x)438__SIMT_DEVICE_FUNCTIONS_DECL__ inline half RintIntrinsicsImpl(half x)
459{439{
@@ -518,7 +498,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline DstType Rint_(SrcType x)
518 }498 }
519}499}
520 500 
521-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Rint_(half2 &dst, float2 &src)501+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Rint_(half2& dst, float2& src)
522{502{
523 dst = __cvt_half2<ROUND::R, RoundingSaturation::RS_DISABLE_VALUE>(src);503 dst = __cvt_half2<ROUND::R, RoundingSaturation::RS_DISABLE_VALUE>(src);
524}504}
@@ -542,10 +522,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CeilIntrinsicsImpl(T x)
542 }522 }
543}523}
544 524 
545-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float CeilIntrinsicsImpl(float x)525+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float CeilIntrinsicsImpl(float x) { return ceil(x); }
546-{
547- return ceil(x);
548-}
549 526 
550__SIMT_DEVICE_FUNCTIONS_DECL__ inline half CeilIntrinsicsImpl(half x)527__SIMT_DEVICE_FUNCTIONS_DECL__ inline half CeilIntrinsicsImpl(half x)
551{528{
@@ -603,14 +580,14 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline DstType Ceil_(SrcType x)
603 }580 }
604}581}
605 582 
606-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Ceil_(half2 &dst, float2 &src)583+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Ceil_(half2& dst, float2& src)
607{584{
608 dst = __cvt_half2<ROUND::C, RoundingSaturation::RS_DISABLE_VALUE>(src);585 dst = __cvt_half2<ROUND::C, RoundingSaturation::RS_DISABLE_VALUE>(src);
609}586}
610#endif587#endif
611 588 
612#ifndef ASCENDC_CPU_DEBUG589#ifndef ASCENDC_CPU_DEBUG
613-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Trunc_(half2 &dst, float2 &src)590+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Trunc_(half2& dst, float2& src)
614{591{
615 dst = __cvt_half2<ROUND::Z, RoundingSaturation::RS_DISABLE_VALUE>(src);592 dst = __cvt_half2<ROUND::Z, RoundingSaturation::RS_DISABLE_VALUE>(src);
616}593}
@@ -652,9 +629,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline DstType Trunc_(SrcType x)
652}629}
653 630 
654#ifndef ASCENDC_CPU_DEBUG631#ifndef ASCENDC_CPU_DEBUG
655-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void CastNone_(half2 &dst, float2 &src)632+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void CastNone_(half2& dst, float2& src) {}
656-{
657-}
658#endif633#endif
659 634 
660template <typename DstType, typename SrcType>635template <typename DstType, typename SrcType>
@@ -670,6 +645,6 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline DstType CastNone_(SrcType x)
670 return (DstType)(x);645 return (DstType)(x);
671}646}
672 647 
673-} // namespace Simt648+} // namespace Simt
674-} // namespace AscendC649+} // namespace AscendC
675-#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_COMMON_IMPL_H650+#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_COMMON_IMPL_H
Mimpl/simt_api/cpp/dav_3510/kernel_simt_constant.h+60-63
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/*!11/*!
12 * \file kernel_simt_constant.h12 * \file kernel_simt_constant.h
@@ -15,63 +15,60 @@
15#ifndef ASCENDC_MODULE_SIMT_CONSTANT_H15#ifndef ASCENDC_MODULE_SIMT_CONSTANT_H
16#define ASCENDC_MODULE_SIMT_CONSTANT_H16#define ASCENDC_MODULE_SIMT_CONSTANT_H
17 17 
18-namespace AscendC18+namespace AscendC {
19-{19+namespace Simt {
20-namespace Simt20+namespace ConstantsInternal {
21-{21+constexpr int32_t ONE_INT32 = 1;
22-namespace ConstantsInternal22+constexpr int64_t ONE_INT64 = 1;
23-{23+constexpr uint32_t ONE_UINT32 = 1;
24- constexpr int32_t ONE_INT32 = 1;24+constexpr uint64_t ONE_UINT64 = 1;
25- constexpr int64_t ONE_INT64 = 1;
26- constexpr uint32_t ONE_UINT32 = 1;
27- constexpr uint64_t ONE_UINT64 = 1;
28 25 
29- constexpr float PI = 3.141592653589793;26+constexpr float PI = 3.141592653589793;
30- constexpr float PI_OF_2 = 1.5707963267948966;27+constexpr float PI_OF_2 = 1.5707963267948966;
31- constexpr float PI_OF_4 = 0.7853981633974483;28+constexpr float PI_OF_4 = 0.7853981633974483;
32- constexpr float PI_OF_8 = 0.39269908169872415480783042290994;29+constexpr float PI_OF_8 = 0.39269908169872415480783042290994;
33- constexpr float SCALAR_LN2 = 0.69314718055994530941723212145818;30+constexpr float SCALAR_LN2 = 0.69314718055994530941723212145818;
34 31 
35- constexpr uint8_t ONE_BYTE_LEN = 8;32+constexpr uint8_t ONE_BYTE_LEN = 8;
36- constexpr uint8_t TWO_BYTE_LEN = 16;33+constexpr uint8_t TWO_BYTE_LEN = 16;
37- constexpr uint8_t THREE_BYTE_LEN = 24;34+constexpr uint8_t THREE_BYTE_LEN = 24;
38- constexpr uint8_t FOUR_BYTE_LEN = 32;35+constexpr uint8_t FOUR_BYTE_LEN = 32;
39- constexpr uint8_t EIGHT_BYTE_LEN = 64;36+constexpr uint8_t EIGHT_BYTE_LEN = 64;
40- constexpr int32_t F16_MIN_VAL = -14;37+constexpr int32_t F16_MIN_VAL = -14;
41- constexpr uint32_t F16_MAN_BIT_LEN = 10;38+constexpr uint32_t F16_MAN_BIT_LEN = 10;
42- constexpr uint32_t U16_BIT = 16;39+constexpr uint32_t U16_BIT = 16;
43 40 
44- constexpr uint32_t INF = 0x7F800000;41+constexpr uint32_t INF = 0x7F800000;
45- constexpr uint32_t NEG_INF = 0xFF800000;42+constexpr uint32_t NEG_INF = 0xFF800000;
46- constexpr uint32_t MAX_NAN = 0x7FFFFFFF;43+constexpr uint32_t MAX_NAN = 0x7FFFFFFF;
47- constexpr uint32_t HALF_INF = 0x7C00;44+constexpr uint32_t HALF_INF = 0x7C00;
48- constexpr uint32_t HALF_MAX_NAN = 0x7FFF;45+constexpr uint32_t HALF_MAX_NAN = 0x7FFF;
49- constexpr uint32_t HALF_NEG_INF = 0xFC00;46+constexpr uint32_t HALF_NEG_INF = 0xFC00;
50- constexpr uint32_t B_HALF_INF = 0x7F80;47+constexpr uint32_t B_HALF_INF = 0x7F80;
51- constexpr uint32_t B_HALF_NEG_INF = 0xFF80;48+constexpr uint32_t B_HALF_NEG_INF = 0xFF80;
52- constexpr uint32_t HIGH_16_BIT = 0xFFFF0000;49+constexpr uint32_t HIGH_16_BIT = 0xFFFF0000;
53- constexpr uint32_t U32_MAX_VAL = 0x7FFFFFFF;50+constexpr uint32_t U32_MAX_VAL = 0x7FFFFFFF;
54- constexpr uint64_t U64_MAX_VAL = 0x7FFFFFFFFFFFFFFF;51+constexpr uint64_t U64_MAX_VAL = 0x7FFFFFFFFFFFFFFF;
55- constexpr uint32_t MAN_BIT_FLOAT = 0x7FFFFF;52+constexpr uint32_t MAN_BIT_FLOAT = 0x7FFFFF;
56- constexpr uint32_t EXP_BIT_FLOAT = 0x7F800000;53+constexpr uint32_t EXP_BIT_FLOAT = 0x7F800000;
57- constexpr uint32_t NEG_SIGN_BIT = 0x80000000;54+constexpr uint32_t NEG_SIGN_BIT = 0x80000000;
58- constexpr uint32_t FULL_MASK_B32 = 0xffffffff;55+constexpr uint32_t FULL_MASK_B32 = 0xffffffff;
59- constexpr int32_t S32_MAX_VAL = 0x7FFFFFFF;56+constexpr int32_t S32_MAX_VAL = 0x7FFFFFFF;
60- constexpr int32_t S32_MIN_VAL = 0x80000000;57+constexpr int32_t S32_MIN_VAL = 0x80000000;
61- constexpr int64_t S64_MAX_VAL = 0x7FFFFFFFFFFFFFFF;58+constexpr int64_t S64_MAX_VAL = 0x7FFFFFFFFFFFFFFF;
62- constexpr int64_t S64_MIN_VAL = 0x8000000000000000;59+constexpr int64_t S64_MIN_VAL = 0x8000000000000000;
63- constexpr float SIMT_FP32_INF = (__builtin_inff());60+constexpr float SIMT_FP32_INF = (__builtin_inff());
64- constexpr int32_t SIMT_INT32_INF = 2139095040;61+constexpr int32_t SIMT_INT32_INF = 2139095040;
65- constexpr float SIMT_INFINITY = (__builtin_inff());62+constexpr float SIMT_INFINITY = (__builtin_inff());
66 63 
67- constexpr uint32_t SIMT_DUMP_BLOCK_NUM = 72;64+constexpr uint32_t SIMT_DUMP_BLOCK_NUM = 72;
68- constexpr uint32_t SIMT_DUMP_SIZE = 2048;65+constexpr uint32_t SIMT_DUMP_SIZE = 2048;
69- constexpr uint32_t SIMT_MAX_THREAD_NUM = 2048;66+constexpr uint32_t SIMT_MAX_THREAD_NUM = 2048;
70 67 
71- constexpr float TWO_OVER_PI = 0.63661975f;68+constexpr float TWO_OVER_PI = 0.63661975f;
72- constexpr float MINUS_PI_OVER_TWO_HI = -1.5707964f;69+constexpr float MINUS_PI_OVER_TWO_HI = -1.5707964f;
73- constexpr float MINUS_PI_OVER_TWO_LO = 4.371139e-8f;70+constexpr float MINUS_PI_OVER_TWO_LO = 4.371139e-8f;
74-} // namespace SimtConstantsInternal71+} // namespace ConstantsInternal
75-}72+} // namespace Simt
76-}73+} // namespace AscendC
77-#endif //ASCENDC_MODULE_SIMT_CONSTANT_H74+#endif // ASCENDC_MODULE_SIMT_CONSTANT_H
Mimpl/simt_api/cpp/dav_3510/kernel_simt_math_impl.h+65-112
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/*!11/*!
12 * \file kernel_simt_math_impl.h12 * \file kernel_simt_math_impl.h
@@ -34,15 +34,9 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AbsImpl(T x)
34 return abs(x);34 return abs(x);
35}35}
36 36 
37-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t AbsImpl(int64_t x)37+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t AbsImpl(int64_t x) { return llabs(x); }
38-{
39- return llabs(x);
40-}
41 38 
42-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float AbsImpl(float x)39+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float AbsImpl(float x) { return fabs(x); }
43-{
44- return fabs(x);
45-}
46 40 
47__SIMT_DEVICE_FUNCTIONS_DECL__ inline half AbsImpl(half x)41__SIMT_DEVICE_FUNCTIONS_DECL__ inline half AbsImpl(half x)
48{42{
@@ -104,11 +98,13 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T UintDivImpl(T dividend, T magic, T shift
104 static_assert(SupportTypeSimtInternel<T, uint32_t, uint64_t>, "Input type T only supports uint32_t, uint64_t.");98 static_assert(SupportTypeSimtInternel<T, uint32_t, uint64_t>, "Input type T only supports uint32_t, uint64_t.");
105#ifdef ASCENDC_CPU_DEBUG99#ifdef ASCENDC_CPU_DEBUG
106 if constexpr (std::is_same<T, uint32_t>::value) {100 if constexpr (std::is_same<T, uint32_t>::value) {
107- ASCENDC_ASSERT(dividend <= ConstantsInternal::U32_MAX_VAL,101+ ASCENDC_ASSERT(dividend <= ConstantsInternal::U32_MAX_VAL, {
108- { KERNEL_LOG(KERNEL_ERROR, "dividend must not be greater than UINT32_MAX"); });102+ KERNEL_LOG(KERNEL_ERROR, "dividend must not be greater than UINT32_MAX");
103+ });
109 } else if constexpr (std::is_same<T, uint64_t>::value) {104 } else if constexpr (std::is_same<T, uint64_t>::value) {
110- ASCENDC_ASSERT(dividend <= ConstantsInternal::U64_MAX_VAL,105+ ASCENDC_ASSERT(dividend <= ConstantsInternal::U64_MAX_VAL, {
111- { KERNEL_LOG(KERNEL_ERROR, "dividend must not be greater than UINT_64_MAX"); });106+ KERNEL_LOG(KERNEL_ERROR, "dividend must not be greater than UINT_64_MAX");
107+ });
112 }108 }
113 109 
114 T q = UMulHi(dividend, magic);110 T q = UMulHi(dividend, magic);
@@ -157,15 +153,9 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T FmaImpl(T x, T y, T z)
157 return x * y + z;153 return x * y + z;
158}154}
159 155 
160-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float FmaImpl(float x, float y, float z)156+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float FmaImpl(float x, float y, float z) { return __fma(x, y, z); }
161-{
162- return __fma(x, y, z);
163-}
164 157 
165-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half FmaImpl(half x, half y, half z)158+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half FmaImpl(half x, half y, half z) { return __fma(x, y, z); }
166-{
167- return __fma(x, y, z);
168-}
169#endif159#endif
170 160 
171#if defined(ASCENDC_CPU_DEBUG)161#if defined(ASCENDC_CPU_DEBUG)
@@ -178,9 +168,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T MaxImpl(T x, T y)
178template <typename T>168template <typename T>
179__SIMT_DEVICE_FUNCTIONS_DECL__ inline T MaxImpl(T x, T y)169__SIMT_DEVICE_FUNCTIONS_DECL__ inline T MaxImpl(T x, T y)
180{170{
181- if constexpr (std::is_same_v<T, int8_t> || std::is_same_v<T, int16_t> || std::is_same_v<T, int32_t> ||171+ if constexpr (
182- std::is_same_v<T, int64_t> || std::is_same_v<T, uint8_t> || std::is_same_v<T, uint16_t> ||172+ std::is_same_v<T, int8_t> || std::is_same_v<T, int16_t> || std::is_same_v<T, int32_t> ||
183- std::is_same_v<T, uint32_t> || std::is_same_v<T, uint64_t>) {173+ std::is_same_v<T, int64_t> || std::is_same_v<T, uint8_t> || std::is_same_v<T, uint16_t> ||
174+ std::is_same_v<T, uint32_t> || std::is_same_v<T, uint64_t>) {
184 return max(x, y);175 return max(x, y);
185 } else if constexpr (std::is_same_v<T, float>) {176 } else if constexpr (std::is_same_v<T, float>) {
186 if (IsNan(x)) {177 if (IsNan(x)) {
@@ -210,9 +201,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T MinImpl(T x, T y)
210template <typename T>201template <typename T>
211__SIMT_DEVICE_FUNCTIONS_DECL__ inline T MinImpl(T x, T y)202__SIMT_DEVICE_FUNCTIONS_DECL__ inline T MinImpl(T x, T y)
212{203{
213- if constexpr (std::is_same_v<T, int8_t> || std::is_same_v<T, int16_t> || std::is_same_v<T, int32_t> ||204+ if constexpr (
214- std::is_same_v<T, int64_t> || std::is_same_v<T, uint8_t> || std::is_same_v<T, uint16_t> ||205+ std::is_same_v<T, int8_t> || std::is_same_v<T, int16_t> || std::is_same_v<T, int32_t> ||
215- std::is_same_v<T, uint32_t> || std::is_same_v<T, uint64_t>) {206+ std::is_same_v<T, int64_t> || std::is_same_v<T, uint8_t> || std::is_same_v<T, uint16_t> ||
207+ std::is_same_v<T, uint32_t> || std::is_same_v<T, uint64_t>) {
216 return min(x, y);208 return min(x, y);
217 } else if constexpr (std::is_same_v<T, float>) {209 } else if constexpr (std::is_same_v<T, float>) {
218 if (IsNan(x)) {210 if (IsNan(x)) {
@@ -243,7 +235,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float DimImpl(float x, float y)
243}235}
244 236 
245#if defined(ASCENDC_CPU_DEBUG)237#if defined(ASCENDC_CPU_DEBUG)
246-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RemQuoImpl(float x, float y, int *quo)238+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RemQuoImpl(float x, float y, int* quo)
247{239{
248 *quo = 0;240 *quo = 0;
249 int32_t negE = -8;241 int32_t negE = -8;
@@ -264,17 +256,14 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float RemQuoImpl(float x, float y, int *qu
264 return remainder;256 return remainder;
265}257}
266#else258#else
267-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float SetNegX(float absX)259+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float SetNegX(float absX) { return -absX; }
268-{
269- return -absX;
270-}
271 260 
272__SIMT_DEVICE_FUNCTIONS_DECL__ inline float SubSetResPos(float absX, float absY)261__SIMT_DEVICE_FUNCTIONS_DECL__ inline float SubSetResPos(float absX, float absY)
273{262{
274 return (absX < absY) ? absX - absY : absY - absX;263 return (absX < absY) ? absX - absY : absY - absX;
275}264}
276 265 
277-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void SetQuo(int32_t *quo, int32_t nSign)266+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void SetQuo(int32_t* quo, int32_t nSign)
278{267{
279 int32_t negE = -8;268 int32_t negE = -8;
280 int32_t maxS32 = 0xffffffff;269 int32_t maxS32 = 0xffffffff;
@@ -290,8 +279,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void SetQuo(int32_t *quo, int32_t nSign)
290 }279 }
291}280}
292 281 
293-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float XLeY(float absX, float tmpVal, float absY, bool isXPos, uint32_t signFlag, float res,282+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float XLeY(
294- int32_t *quo, int32_t nSign)283+ float absX, float tmpVal, float absY, bool isXPos, uint32_t signFlag, float res, int32_t* quo, int32_t nSign)
295{284{
296 float doubleX = absX + absX;285 float doubleX = absX + absX;
297 float sign = (isXPos) ? 1.0 : -1.0;286 float sign = (isXPos) ? 1.0 : -1.0;
@@ -315,7 +304,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float XLeY(float absX, float tmpVal, float
315 return sign * SubSetResPos(absX, absY);304 return sign * SubSetResPos(absX, absY);
316}305}
317 306 
318-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RemQuoImpl(float x, float y, int *quo)307+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RemQuoImpl(float x, float y, int* quo)
319{308{
320 bool isXPos = x >= 0;309 bool isXPos = x >= 0;
321 float absX = AbsImpl(x);310 float absX = AbsImpl(x);
@@ -341,12 +330,12 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float RemQuoImpl(float x, float y, int *qu
341 return XLeY(absX, tmpVal, absY, isXPos, signFlag, res, quo, nSign);330 return XLeY(absX, tmpVal, absY, isXPos, signFlag, res, quo, nSign);
342 }331 }
343 332 
344- uint32_t *uAbsY = (uint32_t *)(&absY);333+ uint32_t* uAbsY = (uint32_t*)(&absY);
345 uint32_t uY = (*uAbsY) & ConstantsInternal::MAN_BIT_FLOAT;334 uint32_t uY = (*uAbsY) & ConstantsInternal::MAN_BIT_FLOAT;
346- uint32_t *uAbsX = (uint32_t *)(&absX);335+ uint32_t* uAbsX = (uint32_t*)(&absX);
347 uint32_t uX = (*uAbsX) & ConstantsInternal::EXP_BIT_FLOAT;336 uint32_t uX = (*uAbsX) & ConstantsInternal::EXP_BIT_FLOAT;
348 float xYVal = 0.0;337 float xYVal = 0.0;
349- uint32_t *uf26 = (uint32_t *)(&xYVal);338+ uint32_t* uf26 = (uint32_t*)(&xYVal);
350 *uf26 = uY | uX;339 *uf26 = uY | uX;
351 bool isGtAbsX = xYVal > absX && !IsNanImpl(xYVal);340 bool isGtAbsX = xYVal > absX && !IsNanImpl(xYVal);
352 res = 0.0;341 res = 0.0;
@@ -399,14 +388,11 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float RemQuoImpl(float x, float y, int *qu
399#endif388#endif
400 389 
401#if defined(ASCENDC_CPU_DEBUG)390#if defined(ASCENDC_CPU_DEBUG)
402-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float ModImpl(float x, float y)391+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float ModImpl(float x, float y) { return fmodf(x, y); }
403-{
404- return fmodf(x, y);
405-}
406#else392#else
407__SIMT_DEVICE_FUNCTIONS_DECL__ inline float SetResModNeg(float modRes)393__SIMT_DEVICE_FUNCTIONS_DECL__ inline float SetResModNeg(float modRes)
408{394{
409- uint32_t *uModRes = (uint32_t *)(&modRes);395+ uint32_t* uModRes = (uint32_t*)(&modRes);
410 *uModRes = (*uModRes) | ConstantsInternal::NEG_SIGN_BIT;396 *uModRes = (*uModRes) | ConstantsInternal::NEG_SIGN_BIT;
411 return modRes;397 return modRes;
412}398}
@@ -431,14 +417,14 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float ModImpl(float x, float y)
431 return (ltZeroOrNan) ? (xyVal + x) : xyVal;417 return (ltZeroOrNan) ? (xyVal + x) : xyVal;
432 }418 }
433 419 
434- uint32_t *uAbsY = (uint32_t *)&absY;420+ uint32_t* uAbsY = (uint32_t*)&absY;
435 uint32_t yManBits = (*uAbsY) & ConstantsInternal::MAN_BIT_FLOAT;421 uint32_t yManBits = (*uAbsY) & ConstantsInternal::MAN_BIT_FLOAT;
436- uint32_t *uAbsX = (uint32_t *)(&absX);422+ uint32_t* uAbsX = (uint32_t*)(&absX);
437 uint32_t xExpBits = (*uAbsX) & ConstantsInternal::EXP_BIT_FLOAT;423 uint32_t xExpBits = (*uAbsX) & ConstantsInternal::EXP_BIT_FLOAT;
438 uint32_t xyBits = yManBits | xExpBits;424 uint32_t xyBits = yManBits | xExpBits;
439 425 
440 float xyVal = 0;426 float xyVal = 0;
441- uint32_t *uxyVal = (uint32_t *)&xyVal;427+ uint32_t* uxyVal = (uint32_t*)&xyVal;
442 *uxyVal = xyBits;428 *uxyVal = xyBits;
443 bool isGtX = (xyVal > absX) && !IsNanImpl(xyVal) && !isXNan;429 bool isGtX = (xyVal > absX) && !IsNanImpl(xyVal) && !isXNan;
444 float halfXyVal = xyVal * 0.5f;430 float halfXyVal = xyVal * 0.5f;
@@ -469,10 +455,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float ModImpl(float x, float y)
469#endif455#endif
470 456 
471#if defined(ASCENDC_CPU_DEBUG)457#if defined(ASCENDC_CPU_DEBUG)
472-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RemainderImpl(float x, float y)458+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RemainderImpl(float x, float y) { return remainder(x, y); }
473-{
474- return remainder(x, y);
475-}
476#else459#else
477__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RemainderImpl(float x, float y)460__SIMT_DEVICE_FUNCTIONS_DECL__ inline float RemainderImpl(float x, float y)
478{461{
@@ -496,11 +479,11 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float NearByIntImpl(float x)
496 479 
497__SIMT_DEVICE_FUNCTIONS_DECL__ inline float NextAfterImpl(float x, float y)480__SIMT_DEVICE_FUNCTIONS_DECL__ inline float NextAfterImpl(float x, float y)
498{481{
499- uint32_t *f = (uint32_t *)&x;482+ uint32_t* f = (uint32_t*)&x;
500 if (x > 0) {483 if (x > 0) {
501- if (x < y) { // when x < src, x bit +1484+ if (x < y) { // when x < src, x bit +1
502 (*f)++;485 (*f)++;
503- } else if (x > y) { // when x > src, x bit -1486+ } else if (x > y) { // when x > src, x bit -1
504 (*f)--;487 (*f)--;
505 }488 }
506 } else {489 } else {
@@ -591,10 +574,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t BrevImpl(uint64_t x)
591 return __brev(static_cast<unsigned long long>(x));574 return __brev(static_cast<unsigned long long>(x));
592}575}
593 576 
594-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t BrevImpl(uint32_t x)577+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t BrevImpl(uint32_t x) { return __brev(x); }
595-{
596- return __brev(x);
597-}
598#endif578#endif
599 579 
600#if defined(ASCENDC_CPU_DEBUG)580#if defined(ASCENDC_CPU_DEBUG)
@@ -616,8 +596,9 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzIntrinsics(uint8_t bitLen, T x,
616template <typename T>596template <typename T>
617__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzImpl(T x)597__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzImpl(T x)
618{598{
619- static_assert(SupportTypeSimtInternel<T, int32_t, int64_t, uint32_t, uint64_t>,599+ static_assert(
620- "Input type of Clz function only supports int32_t, uint32_t, int64_t, uint64_t.");600+ SupportTypeSimtInternel<T, int32_t, int64_t, uint32_t, uint64_t>,
601+ "Input type of Clz function only supports int32_t, uint32_t, int64_t, uint64_t.");
621 if constexpr (SupportTypeSimtInternel<T, uint32_t>) {602 if constexpr (SupportTypeSimtInternel<T, uint32_t>) {
622 return ClzIntrinsics(ConstantsInternal::FOUR_BYTE_LEN, x, ConstantsInternal::ONE_UINT32);603 return ClzIntrinsics(ConstantsInternal::FOUR_BYTE_LEN, x, ConstantsInternal::ONE_UINT32);
623 } else if constexpr (SupportTypeSimtInternel<T, uint64_t>) {604 } else if constexpr (SupportTypeSimtInternel<T, uint64_t>) {
@@ -629,32 +610,21 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzImpl(T x)
629 }610 }
630}611}
631#else612#else
632-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzIntrinsics(uint32_t x)613+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzIntrinsics(uint32_t x) { return __clz(static_cast<int32_t>(x)); }
633-{
634- return __clz(static_cast<int32_t>(x));
635-}
636 614 
637-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzIntrinsics(int32_t x)615+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzIntrinsics(int32_t x) { return __clz(x); }
638-{
639- return __clz(x);
640-}
641 616 
642-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzIntrinsics(uint64_t x)617+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzIntrinsics(uint64_t x) { return __clz(static_cast<long long>(x)); }
643-{
644- return __clz(static_cast<long long>(x));
645-}
646 618 
647-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzIntrinsics(int64_t x)619+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzIntrinsics(int64_t x) { return __clz(static_cast<long long>(x)); }
648-{
649- return __clz(static_cast<long long>(x));
650-}
651 620 
652// count the leading zero bits621// count the leading zero bits
653template <typename T>622template <typename T>
654__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzImpl(T x)623__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t ClzImpl(T x)
655{624{
656- static_assert(SupportTypeSimtInternel<T, int32_t, int64_t, uint32_t, uint64_t>,625+ static_assert(
657- "Input type of Clz function only supports int32_t, uint32_t, int64_t, uint64_t.");626+ SupportTypeSimtInternel<T, int32_t, int64_t, uint32_t, uint64_t>,
627+ "Input type of Clz function only supports int32_t, uint32_t, int64_t, uint64_t.");
658 return ClzIntrinsics(x);628 return ClzIntrinsics(x);
659}629}
660#endif630#endif
@@ -682,10 +652,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t PopcImpl(uint64_t x)
682 return PopcIntrinsics(ConstantsInternal::EIGHT_BYTE_LEN, x, ConstantsInternal::ONE_UINT64);652 return PopcIntrinsics(ConstantsInternal::EIGHT_BYTE_LEN, x, ConstantsInternal::ONE_UINT64);
683}653}
684#else654#else
685-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t PopcImpl(uint32_t x)655+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t PopcImpl(uint32_t x) { return __popc(static_cast<unsigned int>(x)); }
686-{
687- return __popc(static_cast<unsigned int>(x));
688-}
689 656 
690__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t PopcImpl(uint64_t x)657__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t PopcImpl(uint64_t x)
691{658{
@@ -705,10 +672,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t BytePermImpl(uint32_t x, uint32_t
705 uint8_t byte1 = (tmp64 >> (selector1 * ConstantsInternal::ONE_BYTE_LEN)) & 0xFF;672 uint8_t byte1 = (tmp64 >> (selector1 * ConstantsInternal::ONE_BYTE_LEN)) & 0xFF;
706 uint8_t byte2 = (tmp64 >> (selector2 * ConstantsInternal::ONE_BYTE_LEN)) & 0xFF;673 uint8_t byte2 = (tmp64 >> (selector2 * ConstantsInternal::ONE_BYTE_LEN)) & 0xFF;
707 uint8_t byte3 = (tmp64 >> (selector3 * ConstantsInternal::ONE_BYTE_LEN)) & 0xFF;674 uint8_t byte3 = (tmp64 >> (selector3 * ConstantsInternal::ONE_BYTE_LEN)) & 0xFF;
708- return byte0 |675+ return byte0 | (byte1 << ConstantsInternal::ONE_BYTE_LEN) | (byte2 << ConstantsInternal::TWO_BYTE_LEN) |
709- (byte1 << ConstantsInternal::ONE_BYTE_LEN) |676+ (byte3 << ConstantsInternal::THREE_BYTE_LEN);
710- (byte2 << ConstantsInternal::TWO_BYTE_LEN) |
711- (byte3 << ConstantsInternal::THREE_BYTE_LEN);
712}677}
713#else678#else
714__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t BytePermImpl(uint32_t x, uint32_t y, uint32_t s)679__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t BytePermImpl(uint32_t x, uint32_t y, uint32_t s)
@@ -736,15 +701,9 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t FfsImpl(int64_t x)
736 return __builtin_ctz(lsb) + 1;701 return __builtin_ctz(lsb) + 1;
737}702}
738#else703#else
739-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t FfsImpl(int32_t x)704+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t FfsImpl(int32_t x) { return __ffs(x); }
740-{
741- return __ffs(x);
742-}
743 705 
744-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t FfsImpl(int64_t x)706+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t FfsImpl(int64_t x) { return __ffs(static_cast<long long>(x)); }
745-{
746- return __ffs(static_cast<long long>(x));
747-}
748#endif707#endif
749 708 
750#if defined(ASCENDC_CPU_DEBUG)709#if defined(ASCENDC_CPU_DEBUG)
@@ -766,16 +725,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T MulHiImpl(T x, T y)
766 }725 }
767}726}
768#else727#else
769-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t MulHiImpl(uint32_t x, uint32_t y)728+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t MulHiImpl(uint32_t x, uint32_t y) { return __umulhi(x, y); }
770-{
771- return __umulhi(x, y);
772-}
773 729 
774-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t MulHiImpl(int32_t x, int32_t y)730+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t MulHiImpl(int32_t x, int32_t y) { return __mulhi(x, y); }
775-{
776- return __mulhi(x, y);
777-}
778#endif731#endif
779-} // namespace Simt732+} // namespace Simt
780-} // namespace AscendC733+} // namespace AscendC
781-#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_MATH_IMPL_H734+#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_MATH_IMPL_H
Mimpl/simt_api/cpp/dav_3510/kernel_simt_transcendental_impl.h+250-299
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/*!11/*!
12 * \file kernel_simt_transcendental_impl.h12 * \file kernel_simt_transcendental_impl.h
@@ -41,10 +41,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T ExpImpl(T x)
41 return __expf(x);41 return __expf(x);
42}42}
43 43 
44-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 ExpImpl(half2 x)44+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 ExpImpl(half2 x) { return __exp(x); }
45-{
46- return __exp(x);
47-}
48#endif45#endif
49 46 
50/**47/**
@@ -55,19 +52,17 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 ExpImpl(half2 x)
55 * @param outputQuadrant Pointer to store the quadrant information.52 * @param outputQuadrant Pointer to store the quadrant information.
56 * @return The reduced angle in the range [0, pi/2).53 * @return The reduced angle in the range [0, pi/2).
57 */54 */
58-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float PayneHanekRadianReduction(float x, int *outputQuadrant)55+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float PayneHanekRadianReduction(float x, int* outputQuadrant)
59{56{
60 // Step 1: Extract raw bits of the input angle57 // Step 1: Extract raw bits of the input angle
61- uint32_t inputBits = reinterpret_cast<uint32_t &>(x);58+ uint32_t inputBits = reinterpret_cast<uint32_t&>(x);
62 59 
63 // Step 2: Extract exponent and compute index into 2/pi table60 // Step 2: Extract exponent and compute index into 2/pi table
64 int32_t exponent = ((inputBits & 0x7F800000) >> 23) - 127;61 int32_t exponent = ((inputBits & 0x7F800000) >> 23) - 127;
65 uint32_t exponentIndex = static_cast<uint32_t>(exponent) >> 5;62 uint32_t exponentIndex = static_cast<uint32_t>(exponent) >> 5;
66 63 
67 // Step 3: Get the 2/pi table entries for this exponent index64 // Step 3: Get the 2/pi table entries for this exponent index
68- constexpr uint32_t twoOverPiTable[] = {65+ constexpr uint32_t twoOverPiTable[] = {0x517cc1b7, 0x27220a94, 0xfe13abe8, 0xfa9a6ee0, 0x6db14acc, 0x9e21c820};
69- 0x517cc1b7, 0x27220a94, 0xfe13abe8, 0xfa9a6ee0, 0x6db14acc, 0x9e21c820
70- };
71 uint32_t highTerm = exponentIndex ? twoOverPiTable[exponentIndex - 1] : 0;66 uint32_t highTerm = exponentIndex ? twoOverPiTable[exponentIndex - 1] : 0;
72 uint32_t midTerm = twoOverPiTable[exponentIndex];67 uint32_t midTerm = twoOverPiTable[exponentIndex];
73 uint32_t lowTerm = twoOverPiTable[exponentIndex + 1];68 uint32_t lowTerm = twoOverPiTable[exponentIndex + 1];
@@ -76,14 +71,15 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float PayneHanekRadianReduction(float x, i
76 // Step 4: Compute exponent remainder and shift table entries accordingly71 // Step 4: Compute exponent remainder and shift table entries accordingly
77 int32_t exponentRemainder = static_cast<uint32_t>(exponent) & 0x1F;72 int32_t exponentRemainder = static_cast<uint32_t>(exponent) & 0x1F;
78 if (exponentRemainder != 0) {73 if (exponentRemainder != 0) {
79- highTerm = (highTerm << exponentRemainder) | (midTerm >> (ConstantsInternal::FOUR_BYTE_LEN - exponentRemainder));74+ highTerm =
75+ (highTerm << exponentRemainder) | (midTerm >> (ConstantsInternal::FOUR_BYTE_LEN - exponentRemainder));
80 midTerm = (midTerm << exponentRemainder) | (lowTerm >> (ConstantsInternal::FOUR_BYTE_LEN - exponentRemainder));76 midTerm = (midTerm << exponentRemainder) | (lowTerm >> (ConstantsInternal::FOUR_BYTE_LEN - exponentRemainder));
81 lowTerm = (lowTerm << exponentRemainder) | (lastTerm >> (ConstantsInternal::FOUR_BYTE_LEN - exponentRemainder));77 lowTerm = (lowTerm << exponentRemainder) | (lastTerm >> (ConstantsInternal::FOUR_BYTE_LEN - exponentRemainder));
82 }78 }
83 79 
84 // Step 5: Extract and normalize the mantissa80 // Step 5: Extract and normalize the mantissa
85 uint32_t mantissa = (inputBits & 0x007FFFFF) | 0x4F000000;81 uint32_t mantissa = (inputBits & 0x007FFFFF) | 0x4F000000;
86- uint32_t normalizedMantissa = static_cast<uint32_t>(reinterpret_cast<float &>(mantissa));82+ uint32_t normalizedMantissa = static_cast<uint32_t>(reinterpret_cast<float&>(mantissa));
87 83 
88 // Step 6: Compute product = (mantissa * highTerm) << 32 + mantissa * midTerm + mantissa * lowTerm84 // Step 6: Compute product = (mantissa * highTerm) << 32 + mantissa * midTerm + mantissa * lowTerm
89 uint64_t product = static_cast<uint64_t>(normalizedMantissa) * lowTerm;85 uint64_t product = static_cast<uint64_t>(normalizedMantissa) * lowTerm;
@@ -107,7 +103,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float PayneHanekRadianReduction(float x, i
107 int64_t lowFloat = static_cast<float>(productInt64);103 int64_t lowFloat = static_cast<float>(productInt64);
108 104 
109 // Step 10: Compute final result = (high + low) * pi/2 * 2^-62105 // Step 10: Compute final result = (high + low) * pi/2 * 2^-62
110- float piOverTwoLow = 3.4061215800865545e-19f; // pi/2 * 2^-62106+ float piOverTwoLow = 3.4061215800865545e-19f; // pi/2 * 2^-62
111 float reducedAngle = (highFloat + lowFloat) * piOverTwoLow;107 float reducedAngle = (highFloat + lowFloat) * piOverTwoLow;
112 108 
113 // Step 11: Handle negative input109 // Step 11: Handle negative input
@@ -129,14 +125,14 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float PayneHanekRadianReduction(float x, i
129 * @param quadrant Pointer to store the quadrant information.125 * @param quadrant Pointer to store the quadrant information.
130 * @return The reduced angle in the range [0, pi/2).126 * @return The reduced angle in the range [0, pi/2).
131 */127 */
132-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float CodyWaiteRadianReduction(float x, int *quadrant)128+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float CodyWaiteRadianReduction(float x, int* quadrant)
133{129{
134- float y = FmaImpl(x, 0.636619747f, 12582912.0f); // 0.636619747f: 2/pi130+ float y = FmaImpl(x, 0.636619747f, 12582912.0f); // 0.636619747f: 2/pi
135- *quadrant = reinterpret_cast<int &>(y);131+ *quadrant = reinterpret_cast<int&>(y);
136- y = y - 12582912.0f; // 12582912.0f: used to truncate mantissa of x*(2/pi)132+ y = y - 12582912.0f; // 12582912.0f: used to truncate mantissa of x*(2/pi)
137- x = FmaImpl(y, -1.57079601e+00f, x); // 1.57079601e+00f: high of pi/2133+ x = FmaImpl(y, -1.57079601e+00f, x); // 1.57079601e+00f: high of pi/2
138- x = FmaImpl(y, -3.13916473e-07f, x); // 3.13916473e-07f: middle of pi/2134+ x = FmaImpl(y, -3.13916473e-07f, x); // 3.13916473e-07f: middle of pi/2
139- return FmaImpl(y, -5.39030253e-15f, x); // 5.39030253e-15f: low of pi/2135+ return FmaImpl(y, -5.39030253e-15f, x); // 5.39030253e-15f: low of pi/2
140}136}
141 137 
142/**138/**
@@ -148,7 +144,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float CodyWaiteRadianReduction(float x, in
148 * @param quadrant Pointer to store the quadrant information.144 * @param quadrant Pointer to store the quadrant information.
149 * @return The reduced angle in the range [0, pi/2).145 * @return The reduced angle in the range [0, pi/2).
150 */146 */
151-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float TrigRadianReduction(float x, float threshold, int *quadrant)147+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float TrigRadianReduction(float x, float threshold, int* quadrant)
152{148{
153 x = FmaImpl(x, 0.0f, x);149 x = FmaImpl(x, 0.0f, x);
154 if (AbsImpl(x) > threshold) {150 if (AbsImpl(x) > threshold) {
@@ -170,9 +166,9 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float CosPoly(float x)
170{166{
171 x = x * x;167 x = x * x;
172 float y = FmaImpl(x, 2.44677067e-5f, -1.38877297e-3f); // 2.44677067e-5f: 1/8! -1.38877297e-3f: -1/6!168 float y = FmaImpl(x, 2.44677067e-5f, -1.38877297e-3f); // 2.44677067e-5f: 1/8! -1.38877297e-3f: -1/6!
173- y = FmaImpl(x, y, 4.16666567e-2f); // 4.16666567e-2f: 1/4!169+ y = FmaImpl(x, y, 4.16666567e-2f); // 4.16666567e-2f: 1/4!
174- y = FmaImpl(x, y, -5.00000000e-1f); // -5.00000000e-1f: -1/2!170+ y = FmaImpl(x, y, -5.00000000e-1f); // -5.00000000e-1f: -1/2!
175- return FmaImpl(x, y, 1.00000000e+0f); // 1.00000000e+0f: 1171+ return FmaImpl(x, y, 1.00000000e+0f); // 1.00000000e+0f: 1
176}172}
177 173 
178/**174/**
@@ -189,8 +185,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float SinPoly(float x)
189 float m = FmaImpl(x, y, 0.0f);185 float m = FmaImpl(x, y, 0.0f);
190 186 
191 float z = FmaImpl(y, 2.86567956e-6f, -1.98559923e-4f); // 2.86567956e-6f: 1/9! * x^2 -1.98559923e-4f: -1/7!187 float z = FmaImpl(y, 2.86567956e-6f, -1.98559923e-4f); // 2.86567956e-6f: 1/9! * x^2 -1.98559923e-4f: -1/7!
192- z = FmaImpl(y, z, 8.33338592e-3f); // 8.33338592e-3f: 1/5! * x^2188+ z = FmaImpl(y, z, 8.33338592e-3f); // 8.33338592e-3f: 1/5! * x^2
193- z = FmaImpl(y, z, -1.66666672e-1f); // -1.66666672e-1f: -1/3! * x^2189+ z = FmaImpl(y, z, -1.66666672e-1f); // -1.66666672e-1f: -1/3! * x^2
194 190 
195 return FmaImpl(z, m, x); // * x^3 + x191 return FmaImpl(z, m, x); // * x^3 + x
196}192}
@@ -212,18 +208,18 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CosImpl(T x)
212 208 
213 // Step 1: Reduce the angle to the range [0, pi/2) and determine the quadrant209 // Step 1: Reduce the angle to the range [0, pi/2) and determine the quadrant
214 int quadrant;210 int quadrant;
215- float y = TrigRadianReduction(x, 71476.0625f, &quadrant); // 71476.0625f: Threshold for reduction algorithm211+ float y = TrigRadianReduction(x, 71476.0625f, &quadrant); // 71476.0625f: Threshold for reduction algorithm
216 212 
217 // Step 2: Compute cosine and sine of the reduced angle using polynomial approximations213 // Step 2: Compute cosine and sine of the reduced angle using polynomial approximations
218 float c = CosPoly(y);214 float c = CosPoly(y);
219 float s = SinPoly(y);215 float s = SinPoly(y);
220 216 
221 // Step 3: Adjust the cosine value based on the quadrant217 // Step 3: Adjust the cosine value based on the quadrant
222- if (quadrant & 2) { // Quadrants 2 and 3: cos(pi + x) = -cos(x)218+ if (quadrant & 2) { // Quadrants 2 and 3: cos(pi + x) = -cos(x)
223 s = -s;219 s = -s;
224 c = -c;220 c = -c;
225 }221 }
226- if (quadrant & 1) { // Quadrants 1 and 3: cos(pi/2 + x) = -sin(x)222+ if (quadrant & 1) { // Quadrants 1 and 3: cos(pi/2 + x) = -sin(x)
227 c = -s;223 c = -s;
228 }224 }
229 225 
@@ -248,18 +244,18 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T SinImpl(T x)
248 244 
249 // Step 1: Reduce the angle to the range [0, pi/2) and determine the quadrant245 // Step 1: Reduce the angle to the range [0, pi/2) and determine the quadrant
250 int quadrant;246 int quadrant;
251- float y = TrigRadianReduction(x, 71476.0625f, &quadrant); // 71476.0625f: Threshold for reduction algorithm247+ float y = TrigRadianReduction(x, 71476.0625f, &quadrant); // 71476.0625f: Threshold for reduction algorithm
252 248 
253 // Step 2: Compute cosine and sine of the reduced angle using polynomial approximations249 // Step 2: Compute cosine and sine of the reduced angle using polynomial approximations
254 float c = CosPoly(y);250 float c = CosPoly(y);
255 float s = SinPoly(y);251 float s = SinPoly(y);
256 252 
257 // Step 3: Adjust the sine value based on the quadrant253 // Step 3: Adjust the sine value based on the quadrant
258- if (quadrant & 2) { // Quadrants 2 and 3: sin(pi + x) = -sin(x)254+ if (quadrant & 2) { // Quadrants 2 and 3: sin(pi + x) = -sin(x)
259 s = -s;255 s = -s;
260 c = -c;256 c = -c;
261 }257 }
262- if (quadrant & 1) { // Quadrants 1 and 3: sin(pi/2 + x) = cos(x)258+ if (quadrant & 1) { // Quadrants 1 and 3: sin(pi/2 + x) = cos(x)
263 s = c;259 s = c;
264 }260 }
265 261 
@@ -275,20 +271,20 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T SinImpl(T x)
275 * @param c Reference to store the cosine of the input angle.271 * @param c Reference to store the cosine of the input angle.
276 */272 */
277template <typename T>273template <typename T>
278-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void SinCosImpl(T x, T &s, T &c)274+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void SinCosImpl(T x, T& s, T& c)
279{275{
280 static_assert(SupportTypeSimtInternel<T, float>, "Input type of input only supports float.");276 static_assert(SupportTypeSimtInternel<T, float>, "Input type of input only supports float.");
281 277 
282 int quadrant;278 int quadrant;
283 float t;279 float t;
284- float y = TrigRadianReduction(x, 71476.0625f, &quadrant); // 71476.0625f: threshold for reduce algorithm280+ float y = TrigRadianReduction(x, 71476.0625f, &quadrant); // 71476.0625f: threshold for reduce algorithm
285 float cos = CosPoly(y);281 float cos = CosPoly(y);
286 float sin = SinPoly(y);282 float sin = SinPoly(y);
287- if (quadrant & 2) { // 2: sin(pi+x) = -sin(x), cos(pi+x) = -cos(x)283+ if (quadrant & 2) { // 2: sin(pi+x) = -sin(x), cos(pi+x) = -cos(x)
288 sin = -sin;284 sin = -sin;
289 cos = -cos;285 cos = -cos;
290 }286 }
291- if (quadrant & 1) { // 1: sin(pi/2+x) = cos(x), cos(pi/2+x) = -sin(x)287+ if (quadrant & 1) { // 1: sin(pi/2+x) = cos(x), cos(pi/2+x) = -sin(x)
292 t = -sin;288 t = -sin;
293 sin = cos;289 sin = cos;
294 cos = t;290 cos = t;
@@ -309,12 +305,12 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void SinCosImpl(T x, T &s, T &c)
309__SIMT_DEVICE_FUNCTIONS_DECL__ inline float TanPoly(float x)305__SIMT_DEVICE_FUNCTIONS_DECL__ inline float TanPoly(float x)
310{306{
311 x = x * x;307 x = x * x;
312- float y = FmaImpl(x, 4.38117981e-3f, 8.94600598e-5f); // 4.38117981e-3f: 8.94600598e-5f:308+ float y = FmaImpl(x, 4.38117981e-3f, 8.94600598e-5f); // 4.38117981e-3f: 8.94600598e-5f:
313- y = FmaImpl(x, y, 1.08341556e-2f); // 1.08341556e-2f:309+ y = FmaImpl(x, y, 1.08341556e-2f); // 1.08341556e-2f:
314- y = FmaImpl(x, y, 2.12811474e-2f); // 2.12811474e-2f: 62/2838310+ y = FmaImpl(x, y, 2.12811474e-2f); // 2.12811474e-2f: 62/2838
315- y = FmaImpl(x, y, 5.40602170e-2f); // 5.40602170e-2f: 17/315311+ y = FmaImpl(x, y, 5.40602170e-2f); // 5.40602170e-2f: 17/315
316- y = FmaImpl(x, y, 1.33326918e-1f); // 1.33326918e-1f: 2/15312+ y = FmaImpl(x, y, 1.33326918e-1f); // 1.33326918e-1f: 2/15
317- y = FmaImpl(x, y, 3.33333433e-1f); // 3.33333433e-1f: 1/3313+ y = FmaImpl(x, y, 3.33333433e-1f); // 3.33333433e-1f: 1/3
318 return x * y;314 return x * y;
319}315}
320 316 
@@ -332,7 +328,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T TanImpl(T x)
332 328 
333 // Step 1: Reduce the angle to the range [0, pi/2) and determine the quadrant329 // Step 1: Reduce the angle to the range [0, pi/2) and determine the quadrant
334 int quadrant;330 int quadrant;
335- float y = TrigRadianReduction(x, 252.898206f, &quadrant); // 252.898206f: Threshold for reduction algorithm331+ float y = TrigRadianReduction(x, 252.898206f, &quadrant); // 252.898206f: Threshold for reduction algorithm
336 332 
337 // Step 2: Compute the tangent using polynomial approximation333 // Step 2: Compute the tangent using polynomial approximation
338 float t = TanPoly(y);334 float t = TanPoly(y);
@@ -341,7 +337,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T TanImpl(T x)
341 float z = FmaImpl(t, y, y);337 float z = FmaImpl(t, y, y);
342 338 
343 // Step 4: Adjust the tangent value based on the quadrant339 // Step 4: Adjust the tangent value based on the quadrant
344- if (quadrant & 1) { // Quadrants 1 and 3: tan(pi/2 + x) = -cot(x)340+ if (quadrant & 1) { // Quadrants 1 and 3: tan(pi/2 + x) = -cot(x)
345 float s = y - z;341 float s = y - z;
346 s = FmaImpl(t, y, s);342 s = FmaImpl(t, y, s);
347 t = -1.0f / z;343 t = -1.0f / z;
@@ -354,15 +350,9 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T TanImpl(T x)
354}350}
355 351 
356#if defined(ASCENDC_CPU_DEBUG)352#if defined(ASCENDC_CPU_DEBUG)
357-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float TanhImpl(float x)353+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float TanhImpl(float x) { return tanh(x); }
358-{
359- return tanh(x);
360-}
361#else354#else
362-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float TanhImpl(float x)355+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float TanhImpl(float x) { return 1.0f - (2.0f / (ExpImpl(2.0f * x) + 1.0f)); }
363-{
364- return 1.0f - (2.0f / (ExpImpl(2.0f * x) + 1.0f));
365-}
366#endif356#endif
367 357 
368template <typename T>358template <typename T>
@@ -372,7 +362,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float TanPiImpl(T x)
372 return TanImpl(x * ConstantsInternal::PI);362 return TanImpl(x * ConstantsInternal::PI);
373}363}
374 364 
375-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void TaylorExpand(float &dst, float &src, float &squareV, uint32_t expandLevel, float *factor)365+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void TaylorExpand(
366+ float& dst, float& src, float& squareV, uint32_t expandLevel, float* factor)
376{367{
377 squareV = src * src;368 squareV = src * src;
378 dst = src * src;369 dst = src * src;
@@ -385,7 +376,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void TaylorExpand(float &dst, float &src,
385 dst = dst * src;376 dst = dst * src;
386}377}
387 378 
388-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void TaylorExpand(float &dst, float &src, float &squareV, uint32_t expandLevel)379+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void TaylorExpand(float& dst, float& src, float& squareV, uint32_t expandLevel)
389{380{
390 float factor[] = {1,381 float factor[] = {1,
391 -0.3333333333333333,382 -0.3333333333333333,
@@ -398,12 +389,9 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void TaylorExpand(float &dst, float &src,
398}389}
399 390 
400#if defined(ASCENDC_CPU_DEBUG)391#if defined(ASCENDC_CPU_DEBUG)
401-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float AtanImpl(float x)392+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float AtanImpl(float x) { return atan(x); }
402-{
403- return atan(x);
404-}
405#else393#else
406-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void AtanExpand(float &dst, float &src, float &tmp, float transFactor)394+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void AtanExpand(float& dst, float& src, float& tmp, float transFactor)
407{395{
408 dst = src * transFactor;396 dst = src * transFactor;
409 dst = dst + 1.0f;397 dst = dst + 1.0f;
@@ -412,18 +400,18 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void AtanExpand(float &dst, float &src, fl
412 dst = AbsImpl(dst);400 dst = AbsImpl(dst);
413}401}
414 402 
415-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Sign(float &dst, float &src, float &denominator)403+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Sign(float& dst, float& src, float& denominator)
416{404{
417- dst = src * 4611686018427387904.0f; //4611686018427387904 : ATAN_FP32_MAX405+ dst = src * 4611686018427387904.0f; // 4611686018427387904 : ATAN_FP32_MAX
418 denominator = AbsImpl(dst);406 denominator = AbsImpl(dst);
419- denominator = denominator + 2.168404344971009e-19f;// 2.168404344971009e-19 : ATAN_FP32_MIN407+ denominator = denominator + 2.168404344971009e-19f; // 2.168404344971009e-19 : ATAN_FP32_MIN
420 dst = dst / denominator;408 dst = dst / denominator;
421}409}
422 410 
423__SIMT_DEVICE_FUNCTIONS_DECL__ inline float AtanImpl(float x)411__SIMT_DEVICE_FUNCTIONS_DECL__ inline float AtanImpl(float x)
424{412{
425 float clip = MinImpl(x, 10000.0f); // 10000 : MAX_INPUT_VALUE413 float clip = MinImpl(x, 10000.0f); // 10000 : MAX_INPUT_VALUE
426- clip = MaxImpl(clip, -10000.0f); // -10000 : MIN_INPUT_VALUE414+ clip = MaxImpl(clip, -10000.0f); // -10000 : MIN_INPUT_VALUE
427 float absV = AbsImpl(clip);415 float absV = AbsImpl(clip);
428 416 
429 float dst = 0;417 float dst = 0;
@@ -431,9 +419,9 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float AtanImpl(float x)
431 float tmp = 0;419 float tmp = 0;
432 float tmp2 = 0;420 float tmp2 = 0;
433 421 
434- TaylorExpand(dst, absV, squareV, 4); //4 : Taylor expansion count422+ TaylorExpand(dst, absV, squareV, 4); // 4 : Taylor expansion count
435 AtanExpand(tmp, absV, tmp2, 0.4142135623730950); // 0.4142135623730950 : TAN_PI_OF_8423 AtanExpand(tmp, absV, tmp2, 0.4142135623730950); // 0.4142135623730950 : TAN_PI_OF_8
436- TaylorExpand(tmp2, tmp, squareV, 4); //4 : Taylor expansion count424+ TaylorExpand(tmp2, tmp, squareV, 4); // 4 : Taylor expansion count
437 425 
438 tmp2 = tmp2 + ConstantsInternal::PI_OF_8;426 tmp2 = tmp2 + ConstantsInternal::PI_OF_8;
439 dst = MinImpl(dst, tmp2);427 dst = MinImpl(dst, tmp2);
@@ -443,12 +431,12 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float AtanImpl(float x)
443 tmp = tmp / tmp2;431 tmp = tmp / tmp2;
444 tmp = AbsImpl(tmp);432 tmp = AbsImpl(tmp);
445 433 
446- TaylorExpand(tmp2, tmp, squareV, 4); //4 : Taylor expansion count434+ TaylorExpand(tmp2, tmp, squareV, 4); // 4 : Taylor expansion count
447 tmp2 = tmp2 + ConstantsInternal::PI_OF_4;435 tmp2 = tmp2 + ConstantsInternal::PI_OF_4;
448 dst = MinImpl(dst, tmp2);436 dst = MinImpl(dst, tmp2);
449 437 
450 AtanExpand(tmp2, tmp, squareV, 0.4142135623730950); // 0.4142135623730950 : TAN_PI_OF_8438 AtanExpand(tmp2, tmp, squareV, 0.4142135623730950); // 0.4142135623730950 : TAN_PI_OF_8
451- TaylorExpand(tmp, tmp2, squareV, 6); //6 : Taylor expansion count439+ TaylorExpand(tmp, tmp2, squareV, 6); // 6 : Taylor expansion count
452 440 
453 tmp = tmp + ConstantsInternal::PI_OF_8;441 tmp = tmp + ConstantsInternal::PI_OF_8;
454 tmp = tmp + ConstantsInternal::PI_OF_4;442 tmp = tmp + ConstantsInternal::PI_OF_4;
@@ -462,10 +450,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float AtanImpl(float x)
462#endif450#endif
463 451 
464#if defined(ASCENDC_CPU_DEBUG)452#if defined(ASCENDC_CPU_DEBUG)
465-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Atan2Impl(float y, float x)453+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Atan2Impl(float y, float x) { return atan2(y, x); }
466-{
467- return atan2(y, x);
468-}
469#else454#else
470/*455/*
471atan2(y, x) =456atan2(y, x) =
@@ -532,22 +517,13 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T LogImpl(T x)
532 return __logf(x);517 return __logf(x);
533}518}
534 519 
535-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 LogImpl(half2 x)520+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 LogImpl(half2 x) { return __log(x); }
536-{
537- return __log(x);
538-}
539#endif521#endif
540 522 
541#if defined(ASCENDC_CPU_DEBUG)523#if defined(ASCENDC_CPU_DEBUG)
542-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float AtanhImpl(float x)524+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float AtanhImpl(float x) { return atanh(x); }
543-{
544- return atanh(x);
545-}
546#else525#else
547-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float AtanhImpl(float x)526+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float AtanhImpl(float x) { return LogImpl((1.0f + x) / (1.0f - x)) / 2.0f; }
548-{
549- return LogImpl((1.0f + x) / (1.0f - x)) / 2.0f;
550-}
551#endif527#endif
552 528 
553/**529/**
@@ -666,7 +642,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AsinImpl(T x)
666 0.01735276442307692307692307692308,642 0.01735276442307692307692307692308,
667 0.01396484375,643 0.01396484375,
668 };644 };
669- if (AbsImpl(x) <= 0.7071067811865476f) { // 0.7071067811865476 : SCALAR_ACOS_MAX_LIMIT645+ if (AbsImpl(x) <= 0.7071067811865476f) { // 0.7071067811865476 : SCALAR_ACOS_MAX_LIMIT
670 TaylorExpand(dst, src, squareV, 7, factor); // 7 : Taylor expansion count646 TaylorExpand(dst, src, squareV, 7, factor); // 7 : Taylor expansion count
671 return dst;647 return dst;
672 } else if (x < -0.7071067811865476f) { // -0.7071067811865476 : SCALAR_ACOS_MIN_LIMIT648 } else if (x < -0.7071067811865476f) { // -0.7071067811865476 : SCALAR_ACOS_MIN_LIMIT
@@ -737,12 +713,13 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T SinhImpl(T x)
737 float squareV = 0;713 float squareV = 0;
738 float dst = 0;714 float dst = 0;
739 float src = x;715 float src = x;
740- float factor[] = {1.0,716+ float factor[] = {
741- 0.16666666666666666666666666666667,717+ 1.0,
742- 0.00833333333333333333333333333333,718+ 0.16666666666666666666666666666667,
743- 0.0001984126984126984,719+ 0.00833333333333333333333333333333,
744- 2.7557319223985893e-06,720+ 0.0001984126984126984,
745- 2.505210838544172e-08};721+ 2.7557319223985893e-06,
722+ 2.505210838544172e-08};
746 TaylorExpand(dst, src, squareV, 5, factor); // 5: Taylor expansion count723 TaylorExpand(dst, src, squareV, 5, factor); // 5: Taylor expansion count
747 return dst;724 return dst;
748 }725 }
@@ -802,7 +779,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T AsinhImpl(T x)
802}779}
803 780 
804template <typename T>781template <typename T>
805-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void SinCospiImpl(T x, T &s, T &c)782+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void SinCospiImpl(T x, T& s, T& c)
806{783{
807 static_assert(SupportTypeSimtInternel<T, float>, "Input type of input only supports float.");784 static_assert(SupportTypeSimtInternel<T, float>, "Input type of input only supports float.");
808 return SinCosImpl(x * ConstantsInternal::PI, s, c);785 return SinCosImpl(x * ConstantsInternal::PI, s, c);
@@ -873,7 +850,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T RhypotImpl(T x, T y)
873 * if x is -inf, return x itself, exp=0;850 * if x is -inf, return x itself, exp=0;
874 */851 */
875template <typename T1, typename T2>852template <typename T1, typename T2>
876-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T1 FrexpImpl(T1 x, T2 &exp)853+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T1 FrexpImpl(T1 x, T2& exp)
877{854{
878 static_assert(SupportTypeSimtInternel<T1, float>, "Input type of input(x) only supports float.");855 static_assert(SupportTypeSimtInternel<T1, float>, "Input type of input(x) only supports float.");
879 static_assert(SupportTypeSimtInternel<T2, int>, "Input type of input(exp) only supports int.");856 static_assert(SupportTypeSimtInternel<T2, int>, "Input type of input(exp) only supports int.");
@@ -881,12 +858,12 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T1 FrexpImpl(T1 x, T2 &exp)
881 exp = 0;858 exp = 0;
882 return x;859 return x;
883 }860 }
884- uint32_t u32 = reinterpret_cast<uint32_t &>(x);861+ uint32_t u32 = reinterpret_cast<uint32_t&>(x);
885- int32_t exponent = u32 & 0x7f800000; // 0x7f800000: get exponent862+ int32_t exponent = u32 & 0x7f800000; // 0x7f800000: get exponent
886- int32_t f32ExpVal = exponent >> 23; // 23: mantissa bit count863+ int32_t f32ExpVal = exponent >> 23; // 23: mantissa bit count
887- uint32_t manU32 = u32 & 0x007fffff; // 0x007fffff: get mantissa864+ uint32_t manU32 = u32 & 0x007fffff; // 0x007fffff: get mantissa
888 float f32ManU32 = static_cast<float>(manU32);865 float f32ManU32 = static_cast<float>(manU32);
889- f32ManU32 = f32ManU32 / (1 << 23); // 23: mantissa bit count866+ f32ManU32 = f32ManU32 / (1 << 23); // 23: mantissa bit count
890 if (f32ExpVal == 0) {867 if (f32ExpVal == 0) {
891 if (f32ManU32 < 0.5f) {868 if (f32ManU32 < 0.5f) {
892 while (f32ManU32 < 0.5f) {869 while (f32ManU32 < 0.5f) {
@@ -897,7 +874,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T1 FrexpImpl(T1 x, T2 &exp)
897 } else {874 } else {
898 f32ManU32 = f32ManU32 / 2 + 0.5f;875 f32ManU32 = f32ManU32 / 2 + 0.5f;
899 }876 }
900- exp = f32ExpVal - 126; // 126: subnormal float exp877+ exp = f32ExpVal - 126; // 126: subnormal float exp
901 return CopySignImpl(f32ManU32, x);878 return CopySignImpl(f32ManU32, x);
902}879}
903 880 
@@ -921,10 +898,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T1 LdexpImpl(T1 x, T2 exp)
921 if (x == 0.0f || IsPositiveInfImpl(AbsImpl(x)) || IsNanImpl(x) || exp == 0) {898 if (x == 0.0f || IsPositiveInfImpl(AbsImpl(x)) || IsNanImpl(x) || exp == 0) {
922 return x;899 return x;
923 }900 }
924- if (exp > 280) { // 280: 1e-45*(2^280) = inf901+ if (exp > 280) { // 280: 1e-45*(2^280) = inf
925 return CopySignImpl(ConstantsInternal::SIMT_FP32_INF, x);902 return CopySignImpl(ConstantsInternal::SIMT_FP32_INF, x);
926 }903 }
927- if (exp < -280) { // -280: 3.4028234e+38*(2^-280) = 0904+ if (exp < -280) { // -280: 3.4028234e+38*(2^-280) = 0
928 return CopySignImpl(0.0f, x);905 return CopySignImpl(0.0f, x);
929 }906 }
930 int32_t shift = 30;907 int32_t shift = 30;
@@ -935,7 +912,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T1 LdexpImpl(T1 x, T2 exp)
935 }912 }
936 x *= (1 << exp);913 x *= (1 << exp);
937 } else {914 } else {
938- while (exp < -30) { // -30: exp < -30, move 30915+ while (exp < -30) { // -30: exp < -30, move 30
939 x *= 1.0f / (1 << shift);916 x *= 1.0f / (1 << shift);
940 exp += shift;917 exp += shift;
941 }918 }
@@ -1163,49 +1140,25 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T PowImpl(T x, T y)
1163#endif1140#endif
1164}1141}
1165 1142 
1166-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Exp2Impl(float x)1143+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Exp2Impl(float x) { return PowImpl(2.0f, x); }
1167-{
1168- return PowImpl(2.0f, x);
1169-}
1170 1144 
1171-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Exp10Impl(float x)1145+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Exp10Impl(float x) { return PowImpl(10.0f, x); }
1172-{
1173- return PowImpl(10.0f, x);
1174-}
1175 1146 
1176-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Expm1Impl(float x)1147+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Expm1Impl(float x) { return ExpImpl(x) - 1.0f; }
1177-{
1178- return ExpImpl(x) - 1.0f;
1179-}
1180 1148 
1181#if defined(ASCENDC_CPU_DEBUG)1149#if defined(ASCENDC_CPU_DEBUG)
1182-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Log2Impl(float x)1150+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Log2Impl(float x) { return log2(x); }
1183-{
1184- return log2(x);
1185-}
1186#else1151#else
1187-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Log2Impl(float x)1152+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Log2Impl(float x) { return LogImpl(x) / LogImpl(2.0f); }
1188-{
1189- return LogImpl(x) / LogImpl(2.0f);
1190-}
1191#endif1153#endif
1192 1154 
1193#if defined(ASCENDC_CPU_DEBUG)1155#if defined(ASCENDC_CPU_DEBUG)
1194-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Log10Impl(float x)1156+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Log10Impl(float x) { return log10(x); }
1195-{
1196- return log10(x);
1197-}
1198#else1157#else
1199-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Log10Impl(float x)1158+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Log10Impl(float x) { return LogImpl(x) / LogImpl(10.0f); }
1200-{
1201- return LogImpl(x) / LogImpl(10.0f);
1202-}
1203#endif1159#endif
1204 1160 
1205-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Log1pImpl(float x)1161+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float Log1pImpl(float x) { return LogImpl(1.0f + x); }
1206-{
1207- return LogImpl(1.0f + x);
1208-}
1209 1162 
1210#if defined(ASCENDC_CPU_DEBUG)1163#if defined(ASCENDC_CPU_DEBUG)
1211__SIMT_DEVICE_FUNCTIONS_DECL__ inline float LogbImpl(float x)1164__SIMT_DEVICE_FUNCTIONS_DECL__ inline float LogbImpl(float x)
@@ -1236,7 +1189,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float LogbImpl(float x)
1236 uint32_t fp32DecimalBit = 23;1189 uint32_t fp32DecimalBit = 23;
1237 uint32_t fp32SignBit = 256;1190 uint32_t fp32SignBit = 256;
1238 uint32_t fp32ExponentH = 127;1191 uint32_t fp32ExponentH = 127;
1239- uint32_t *exponent = (uint32_t *)&x;1192+ uint32_t* exponent = (uint32_t*)&x;
1240 (*exponent) >>= fp32DecimalBit;1193 (*exponent) >>= fp32DecimalBit;
1241 uint32_t sign = fp32SignBit;1194 uint32_t sign = fp32SignBit;
1242 if ((*exponent) > sign) {1195 if ((*exponent) > sign) {
@@ -1293,7 +1246,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CbrtImpl(T x)
1293 static_assert(SupportTypeSimtInternel<T, float>, "Input value type only supports float.");1246 static_assert(SupportTypeSimtInternel<T, float>, "Input value type only supports float.");
1294 1247 
1295 // get the exponent part of x1248 // get the exponent part of x
1296- uint32_t xBits = *reinterpret_cast<uint32_t *>(&x);1249+ uint32_t xBits = *reinterpret_cast<uint32_t*>(&x);
1297 int32_t expBits = (xBits >> 23) & 0xFF;1250 int32_t expBits = (xBits >> 23) & 0xFF;
1298 if (x == 0.0f || expBits == 0xFF) {1251 if (x == 0.0f || expBits == 0xFF) {
1299 return x;1252 return x;
@@ -1315,7 +1268,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CbrtImpl(T x)
1315 // get the adjusted x value1268 // get the adjusted x value
1316 int32_t expAdjustedBits = exponent - 3 * k + 127;1269 int32_t expAdjustedBits = exponent - 3 * k + 127;
1317 uint32_t xAdjustedBits = (xBits & 0x7FFFFF) | (expAdjustedBits << 23);1270 uint32_t xAdjustedBits = (xBits & 0x7FFFFF) | (expAdjustedBits << 23);
1318- float xAdjusted = *reinterpret_cast<float *>(&xAdjustedBits);1271+ float xAdjusted = *reinterpret_cast<float*>(&xAdjustedBits);
1319 1272 
1320 // Newton's iteration method,f(x) = x^3 - b, x_i+1 = x_i - f(x_i)/f'(x_i) = (2*x_i + b/x_i^2)/31273 // Newton's iteration method,f(x) = x^3 - b, x_i+1 = x_i - f(x_i)/f'(x_i) = (2*x_i + b/x_i^2)/3
1321 // the initial value of x_i = 1.01274 // the initial value of x_i = 1.0
@@ -1327,10 +1280,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CbrtImpl(T x)
1327 y = (2.0f * y + xAdjusted / (y * y)) / 3.0f;1280 y = (2.0f * y + xAdjusted / (y * y)) / 3.0f;
1328 1281 
1329 // adjust the exponent of y by k1282 // adjust the exponent of y by k
1330- uint32_t yBits = *reinterpret_cast<uint32_t *>(&y);1283+ uint32_t yBits = *reinterpret_cast<uint32_t*>(&y);
1331 int32_t yExpBits = ((yBits >> 23) & 0xFF) + k;1284 int32_t yExpBits = ((yBits >> 23) & 0xFF) + k;
1332 yBits = (yBits & 0x807FFFFF) | ((yExpBits & 0xFF) << 23) | (xBits & 0x80000000);1285 yBits = (yBits & 0x807FFFFF) | ((yExpBits & 0xFF) << 23) | (xBits & 0x80000000);
1333- return *reinterpret_cast<float *>(&yBits);1286+ return *reinterpret_cast<float*>(&yBits);
1334}1287}
1335 1288 
1336/**1289/**
@@ -1359,7 +1312,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T RcbrtImpl(T x)
1359 }1312 }
1360 1313 
1361 // get the exponent part of x1314 // get the exponent part of x
1362- uint32_t xBits = *reinterpret_cast<uint32_t *>(&x);1315+ uint32_t xBits = *reinterpret_cast<uint32_t*>(&x);
1363 int32_t expBits = (xBits >> 23) & 0xFF;1316 int32_t expBits = (xBits >> 23) & 0xFF;
1364 1317 
1365 // Depending on the computer's float number storage structure1318 // Depending on the computer's float number storage structure
@@ -1370,7 +1323,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T RcbrtImpl(T x)
1370 // Assume that the initial value of the Newton's iteration method is y, the exponent bits of y is E'1323 // Assume that the initial value of the Newton's iteration method is y, the exponent bits of y is E'
1371 int32_t yExpBits = (508 - expBits) / 3;1324 int32_t yExpBits = (508 - expBits) / 3;
1372 uint32_t yBits = (xBits & 0x80000000) | (yExpBits << 23);1325 uint32_t yBits = (xBits & 0x80000000) | (yExpBits << 23);
1373- float y = *reinterpret_cast<float *>(&yBits);1326+ float y = *reinterpret_cast<float*>(&yBits);
1374 1327 
1375 // The Newton's iteration method, f(x) = x^(-3) - b;1328 // The Newton's iteration method, f(x) = x^(-3) - b;
1376 // x_i+1 = x_i - f(x_i)/f'(x_i)1329 // x_i+1 = x_i - f(x_i)/f'(x_i)
@@ -1426,10 +1379,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T ErfImpl(T x)
1426 float result = FmaImpl(polyTerm, -absX, -absX);1379 float result = FmaImpl(polyTerm, -absX, -absX);
1427 float expResult = Exp2Impl(result);1380 float expResult = Exp2Impl(result);
1428 float adjustedExp = 1.0f - expResult;1381 float adjustedExp = 1.0f - expResult;
1429- uint32_t signBit = *reinterpret_cast<uint32_t *>(&x) & 0x80000000;1382+ uint32_t signBit = *reinterpret_cast<uint32_t*>(&x) & 0x80000000;
1430- uint32_t finalBits = signBit | *reinterpret_cast<uint32_t *>(&adjustedExp);1383+ uint32_t finalBits = signBit | *reinterpret_cast<uint32_t*>(&adjustedExp);
1431 1384 
1432- return *reinterpret_cast<float *>(&finalBits);1385+ return *reinterpret_cast<float*>(&finalBits);
1433 } else {1386 } else {
1434 float term = xSquared;1387 float term = xSquared;
1435 const float a1 = 0.000084834944f;1388 const float a1 = 0.000084834944f;
@@ -1505,17 +1458,17 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T ErfcImpl(T x)
1505 float scaled = negX2 * f1;1458 float scaled = negX2 * f1;
1506 float intPart = TruncImpl(scaled);1459 float intPart = TruncImpl(scaled);
1507 float absPart = AbsImpl(intPart);1460 float absPart = AbsImpl(intPart);
1508- uint32_t signBit = *reinterpret_cast<uint32_t *>(&intPart) & 0x80000000;1461+ uint32_t signBit = *reinterpret_cast<uint32_t*>(&intPart) & 0x80000000;
1509 float clampedBits = signBit | 0x42FC0000;1462 float clampedBits = signBit | 0x42FC0000;
1510- float clamped = *reinterpret_cast<float *>(&clampedBits);1463+ float clamped = *reinterpret_cast<float*>(&clampedBits);
1511 float safeInt = (absPart > 126.0f) ? clamped : intPart;1464 float safeInt = (absPart > 126.0f) ? clamped : intPart;
1512 1465 
1513 float remainder = FmaImpl(safeInt, -0.6931472f, negX2);1466 float remainder = FmaImpl(safeInt, -0.6931472f, negX2);
1514 remainder = FmaImpl(safeInt, 1.9046542e-9f, remainder);1467 remainder = FmaImpl(safeInt, 1.9046542e-9f, remainder);
1515 float exponentArg = remainder * f1;1468 float exponentArg = remainder * f1;
1516 float exponentBase = safeInt + 12583039.0f;1469 float exponentBase = safeInt + 12583039.0f;
1517- uint32_t exponentBits = *reinterpret_cast<uint32_t *>(&exponentBase) << 23;1470+ uint32_t exponentBits = *reinterpret_cast<uint32_t*>(&exponentBase) << 23;
1518- float exponentScale = *reinterpret_cast<float *>(&exponentBits);1471+ float exponentScale = *reinterpret_cast<float*>(&exponentBits);
1519 float expVal = Exp2Impl(exponentArg) * exponentScale;1472 float expVal = Exp2Impl(exponentArg) * exponentScale;
1520 1473 
1521 float term3 = FmaImpl(-absX, absX, xSquared);1474 float term3 = FmaImpl(-absX, absX, xSquared);
@@ -1558,9 +1511,9 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T ErfinvImpl(T x)
1558 float denominator = 1.0f / rsqrtNegLog;1511 float denominator = 1.0f / rsqrtNegLog;
1559 float finalTerm = denominator * poly;1512 float finalTerm = denominator * poly;
1560 1513 
1561- uint32_t signBit = *reinterpret_cast<uint32_t *>(&x) & 0x80000000;1514+ uint32_t signBit = *reinterpret_cast<uint32_t*>(&x) & 0x80000000;
1562- uint32_t resultBits = signBit | *reinterpret_cast<uint32_t *>(&finalTerm);1515+ uint32_t resultBits = signBit | *reinterpret_cast<uint32_t*>(&finalTerm);
1563- return *reinterpret_cast<float *>(&resultBits);1516+ return *reinterpret_cast<float*>(&resultBits);
1564 } else {1517 } else {
1565 float poly = FmaImpl(-2.5172708e-10f, negLog2, 9.427429e-9f);1518 float poly = FmaImpl(-2.5172708e-10f, negLog2, 9.427429e-9f);
1566 poly = FmaImpl(poly, negLog2, -1.2054752e-7f);1519 poly = FmaImpl(poly, negLog2, -1.2054752e-7f);
@@ -1678,14 +1631,14 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T ErfcxImpl(T x)
1678 float negX2 = -xSq;1631 float negX2 = -xSq;
1679 float term4 = FmaImpl(absX, absX, negX2);1632 float term4 = FmaImpl(absX, absX, negX2);
1680 float term5 = FmaImpl(xSq, 0.00572498f, 0.5f);1633 float term5 = FmaImpl(xSq, 0.00572498f, 0.5f);
1681- term5 = MinImpl(term5, ConstantsInternal::SIMT_FP32_INF); // prevent overflow1634+ term5 = MinImpl(term5, ConstantsInternal::SIMT_FP32_INF); // prevent overflow
1682 float term6 = FmaImpl(term5, 252.0f, 12582913.0f);1635 float term6 = FmaImpl(term5, 252.0f, 12582913.0f);
1683- float term7 = term6 -12583039.0f;1636+ float term7 = term6 - 12583039.0f;
1684 float negTerm7 = -term7;1637 float negTerm7 = -term7;
1685 float term8 = FmaImpl(xSq, 1.442695f, negTerm7);1638 float term8 = FmaImpl(xSq, 1.442695f, negTerm7);
1686 float term9 = FmaImpl(xSq, 1.925963e-8f, term8);1639 float term9 = FmaImpl(xSq, 1.925963e-8f, term8);
1687- uint32_t exponent = *reinterpret_cast<uint32_t *>(&term6) << 23; // Extract exponent bits from term61640+ uint32_t exponent = *reinterpret_cast<uint32_t*>(&term6) << 23; // Extract exponent bits from term6
1688- float exponentScale = *reinterpret_cast<float *>(&exponent);1641+ float exponentScale = *reinterpret_cast<float*>(&exponent);
1689 float term9Exp = Exp2Impl(term9);1642 float term9Exp = Exp2Impl(term9);
1690 float scaledExp = term9Exp * exponentScale;1643 float scaledExp = term9Exp * exponentScale;
1691 float expApprox = FmaImpl(term9Exp, exponentScale, scaledExp);1644 float expApprox = FmaImpl(term9Exp, exponentScale, scaledExp);
@@ -1721,22 +1674,22 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float ComputeSinpi(float x)
1721 float y = 0.0f;1674 float y = 0.0f;
1722 if ((i & 1) != 0) {1675 if ((i & 1) != 0) {
1723 // (2k + 1 + f) * pi1676 // (2k + 1 + f) * pi
1724- y = 2.42795795e-05f; // 2.42795795e-05f : 1/8!1677+ y = 2.42795795e-05f; // 2.42795795e-05f : 1/8!
1725- y = FmaImpl(y, fPiSquare, -0.00138878601f); // -0.001388786f : -1/6!1678+ y = FmaImpl(y, fPiSquare, -0.00138878601f); // -0.001388786f : -1/6!
1726- y = FmaImpl(y, fPiSquare, 0.0416667275f); // 0.041666727f : 1/4!1679+ y = FmaImpl(y, fPiSquare, 0.0416667275f); // 0.041666727f : 1/4!
1727- y = FmaImpl(y, fPiSquare, -0.49999997f); // -0.49999997f : -1/2!1680+ y = FmaImpl(y, fPiSquare, -0.49999997f); // -0.49999997f : -1/2!
1728 float y2 = FmaImpl(fPiSquare, 1.0f, 0.0f);1681 float y2 = FmaImpl(fPiSquare, 1.0f, 0.0f);
1729 y = FmaImpl(y, y2, 1.0f);1682 y = FmaImpl(y, y2, 1.0f);
1730 } else {1683 } else {
1731 // (2k + f) * pi1684 // (2k + f) * pi
1732- y = -0.000195746587f; // -0.000195746587f : 1/7!1685+ y = -0.000195746587f; // -0.000195746587f : 1/7!
1733- y = FmaImpl(y, fPiSquare, 0.00833270326f); // 0.008332703f : 1/5!1686+ y = FmaImpl(y, fPiSquare, 0.00833270326f); // 0.008332703f : 1/5!
1734- y = FmaImpl(y, fPiSquare, -0.166666627f); // -0.16666662f : 1/3!1687+ y = FmaImpl(y, fPiSquare, -0.166666627f); // -0.16666662f : 1/3!
1735 float y2 = FmaImpl(fPiSquare, fPi, 0.0f);1688 float y2 = FmaImpl(fPiSquare, fPi, 0.0f);
1736 y = FmaImpl(y, y2, fPi);1689 y = FmaImpl(y, y2, fPi);
1737 }1690 }
1738 1691 
1739- if ((i & 2) != 0) { // 2: sin(pi+x) = -sin(x)1692+ if ((i & 2) != 0) { // 2: sin(pi+x) = -sin(x)
1740 y = FmaImpl(y, -1.0f, 0.0f);1693 y = FmaImpl(y, -1.0f, 0.0f);
1741 }1694 }
1742 return y;1695 return y;
@@ -1747,8 +1700,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float ComputeLn(float x)
1747 float offset = 0;1700 float offset = 0;
1748 // sub-norm - > norm1701 // sub-norm - > norm
1749 if (x < 1.17549435e-38f) {1702 if (x < 1.17549435e-38f) {
1750- offset = -23; // -23 : sub-norm - > norm1703+ offset = -23; // -23 : sub-norm - > norm
1751- x = x * 8388608; // 8388608 : 2^231704+ x = x * 8388608; // 8388608 : 2^23
1752 }1705 }
1753 uint32_t u32 = *reinterpret_cast<uint32_t*>(&x);1706 uint32_t u32 = *reinterpret_cast<uint32_t*>(&x);
1754 int32_t y1 = (u32 - 1059760811) & -8388608; // -8388608 : -2^231707 int32_t y1 = (u32 - 1059760811) & -8388608; // -8388608 : -2^23
@@ -1758,20 +1711,20 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float ComputeLn(float x)
1758 float exponent = FmaImpl(static_cast<float>(y1), 1.1920929e-07f, offset); // 1.1920929e-07: 2^-231711 float exponent = FmaImpl(static_cast<float>(y1), 1.1920929e-07f, offset); // 1.1920929e-07: 2^-23
1759 1712 
1760 // ln(mantissa)1713 // ln(mantissa)
1761- float y = -0.130188569f; // -0.130188569f : Coefficient of O(10)1714+ float y = -0.130188569f; // -0.130188569f : Coefficient of O(10)
1762- y = FmaImpl(y, mantissa, 0.140846103f); // 0.140846103f : Coefficient of O(9)1715+ y = FmaImpl(y, mantissa, 0.140846103f); // 0.140846103f : Coefficient of O(9)
1763- y = FmaImpl(y, mantissa, -0.121486276f); // -0.121486276f : Coefficient of O(8)1716+ y = FmaImpl(y, mantissa, -0.121486276f); // -0.121486276f : Coefficient of O(8)
1764- y = FmaImpl(y, mantissa, 0.139806107f); // 0.139806107f : Coefficient of O(7)1717+ y = FmaImpl(y, mantissa, 0.139806107f); // 0.139806107f : Coefficient of O(7)
1765- y = FmaImpl(y, mantissa, -0.166842356f); // -0.166842356f : -1/61718+ y = FmaImpl(y, mantissa, -0.166842356f); // -0.166842356f : -1/6
1766- y = FmaImpl(y, mantissa, 0.200122997f); // 0.200122997f : 1/51719+ y = FmaImpl(y, mantissa, 0.200122997f); // 0.200122997f : 1/5
1767- y = FmaImpl(y, mantissa, -0.249996692f); // -0.249996692f : -1/41720+ y = FmaImpl(y, mantissa, -0.249996692f); // -0.249996692f : -1/4
1768- y = FmaImpl(y, mantissa, 0.333331823f); // 0.333331823f : 1/31721+ y = FmaImpl(y, mantissa, 0.333331823f); // 0.333331823f : 1/3
1769- y = FmaImpl(y, mantissa, -0.5f); // -0.5f : -1/21722+ y = FmaImpl(y, mantissa, -0.5f); // -0.5f : -1/2
1770 y = mantissa * y;1723 y = mantissa * y;
1771 y = FmaImpl(y, mantissa, mantissa);1724 y = FmaImpl(y, mantissa, mantissa);
1772 1725 
1773 // ln(mantissa) + exponent*ln(2)1726 // ln(mantissa) + exponent*ln(2)
1774- y = FmaImpl(exponent, 0.693147182f, y); // 0.693147182f : ln21727+ y = FmaImpl(exponent, 0.693147182f, y); // 0.693147182f : ln2
1775 1728 
1776 if (u32 >= ConstantsInternal::SIMT_INT32_INF || x == 0) {1729 if (u32 >= ConstantsInternal::SIMT_INT32_INF || x == 0) {
1777 y = FmaImpl(x, ConstantsInternal::SIMT_FP32_INF, ConstantsInternal::SIMT_FP32_INF);1730 y = FmaImpl(x, ConstantsInternal::SIMT_FP32_INF, ConstantsInternal::SIMT_FP32_INF);
@@ -1790,14 +1743,14 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float EulerGammaFunction(float x)
1790 float frac = x - NearByIntImpl(x);1743 float frac = x - NearByIntImpl(x);
1791 // 1/gamma(x + 1)1744 // 1/gamma(x + 1)
1792 // = 1 + γx + (γ^2 - pi^2/6) * x^2/2! + O(3)1745 // = 1 + γx + (γ^2 - pi^2/6) * x^2/2! + O(3)
1793- float y = -0.00107286568f; // -0.00107286568f : Coefficient of O(8)1746+ float y = -0.00107286568f; // -0.00107286568f : Coefficient of O(8)
1794- y = FmaImpl(y, frac, 0.00711105345f); // 0.00711105345f : Coefficient of O(7)1747+ y = FmaImpl(y, frac, 0.00711105345f); // 0.00711105345f : Coefficient of O(7)
1795- y = FmaImpl(frac, y, -0.0096437186f); // -0.0096437186f : Coefficient of O(6)1748+ y = FmaImpl(frac, y, -0.0096437186f); // -0.0096437186f : Coefficient of O(6)
1796- y = FmaImpl(frac, y, -0.042180188f); // -0.042180188f : Coefficient of O(5)1749+ y = FmaImpl(frac, y, -0.042180188f); // -0.042180188f : Coefficient of O(5)
1797- y = FmaImpl(frac, y, 0.166540906f); // 0.166540906f : Coefficient of O(4)1750+ y = FmaImpl(frac, y, 0.166540906f); // 0.166540906f : Coefficient of O(4)
1798- y = FmaImpl(frac, y, -0.0420036502f); // -0.0420036502f : Coefficient of O(3)1751+ y = FmaImpl(frac, y, -0.0420036502f); // -0.0420036502f : Coefficient of O(3)
1799- y = FmaImpl(frac, y, -0.655878186f); // -0.655878186f : [0.577*0.577-pi*pi/6]/21752+ y = FmaImpl(frac, y, -0.655878186f); // -0.655878186f : [0.577*0.577-pi*pi/6]/2
1800- y = FmaImpl(frac, y, 0.577215672f); // 0.577215672f : Euler-Mascheroni constant1753+ y = FmaImpl(frac, y, 0.577215672f); // 0.577215672f : Euler-Mascheroni constant
1801 y = FmaImpl(frac, y, 1.0f);1754 y = FmaImpl(frac, y, 1.0f);
1802 1755 
1803 if (x < -0.5f) {1756 if (x < -0.5f) {
@@ -1833,7 +1786,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float EulerGammaFunction(float x)
1833 */1786 */
1834__SIMT_DEVICE_FUNCTIONS_DECL__ inline float StirlingAndEulerReflection(float x)1787__SIMT_DEVICE_FUNCTIONS_DECL__ inline float StirlingAndEulerReflection(float x)
1835{1788{
1836- float absX= AbsImpl(x);1789+ float absX = AbsImpl(x);
1837 if (absX > 41.0999985f) {1790 if (absX > 41.0999985f) {
1838 x = CopySignImpl(41.0999985f, x);1791 x = CopySignImpl(41.0999985f, x);
1839 absX = AbsImpl(x);1792 absX = AbsImpl(x);
@@ -1852,36 +1805,36 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float StirlingAndEulerReflection(float x)
1852 // let y01 = (x-0.5)log(x), y02 = xlog(e), then y0 = y01 - y021805 // let y01 = (x-0.5)log(x), y02 = xlog(e), then y0 = y01 - y02
1853 // = sqrt(2*pi) * 2^[i+f]1806 // = sqrt(2*pi) * 2^[i+f]
1854 // = sqrt(2*pi) * 2^f * 2^i1807 // = sqrt(2*pi) * 2^f * 2^i
1855- uint32_t u32 = reinterpret_cast<uint32_t &>(absX);1808+ uint32_t u32 = reinterpret_cast<uint32_t&>(absX);
1856- int32_t expU32 = (u32 - 1060439283) & 0xFF800000; // 0xFF800000: 2^1281809+ int32_t expU32 = (u32 - 1060439283) & 0xFF800000; // 0xFF800000: 2^128
1857 int32_t manU32 = u32 - expU32;1810 int32_t manU32 = u32 - expU32;
1858- float mantissa = *reinterpret_cast<float *>(&manU32);1811+ float mantissa = *reinterpret_cast<float*>(&manU32);
1859- float exponent = FmaImpl(static_cast<float>(expU32), 1.1920929e-07f, 0.0f); // 1.1920929e-07 : 2^-231812+ float exponent = FmaImpl(static_cast<float>(expU32), 1.1920929e-07f, 0.0f); // 1.1920929e-07 : 2^-23
1860 float lnMantissa = 2.0f / (mantissa + 1.0f) * (mantissa - 1.0f);1813 float lnMantissa = 2.0f / (mantissa + 1.0f) * (mantissa - 1.0f);
1861 1814 
1862 // log(x) = log(m*2^exp) = log(m) + exp= ln(m)/loge + exp1815 // log(x) = log(m*2^exp) = log(m) + exp= ln(m)/loge + exp
1863- float logX = FmaImpl(lnMantissa, 1.44269502f, exponent); // 1.44269502f : log_2(e)1816+ float logX = FmaImpl(lnMantissa, 1.44269502f, exponent); // 1.44269502f : log_2(e)
1864 1817 
1865 // Calculates log(x)'s error-value1818 // Calculates log(x)'s error-value
1866- float logXDiff = FmaImpl(lnMantissa, 1.44269502f, exponent - logX); // 1.44269502f : log_2(e)1819+ float logXDiff = FmaImpl(lnMantissa, 1.44269502f, exponent - logX); // 1.44269502f : log_2(e)
1867 1820 
1868 float y3 = 0.000656886259f;1821 float y3 = 0.000656886259f;
1869- y3 = FmaImpl(y3, lnMantissa * lnMantissa, 0.00321816537f); // 0.00321816537f : Coefficient of O(3)1822+ y3 = FmaImpl(y3, lnMantissa * lnMantissa, 0.00321816537f); // 0.00321816537f : Coefficient of O(3)
1870- y3 = FmaImpl(y3, lnMantissa * lnMantissa, 0.0180337187f); // 0.0180337187f : Coefficient of O(2)1823+ y3 = FmaImpl(y3, lnMantissa * lnMantissa, 0.0180337187f); // 0.0180337187f : Coefficient of O(2)
1871- y3 = FmaImpl(y3, lnMantissa * lnMantissa, 0.120224588f); // 0.120224588f : Coefficient of O(1)1824+ y3 = FmaImpl(y3, lnMantissa * lnMantissa, 0.120224588f); // 0.120224588f : Coefficient of O(1)
1872 y3 = FmaImpl(y3, lnMantissa * lnMantissa, 0.0f);1825 y3 = FmaImpl(y3, lnMantissa * lnMantissa, 0.0f);
1873 1826 
1874- float r = 2.0f * (mantissa - 1.0f - lnMantissa) - lnMantissa * (mantissa - 1.0f); // 2.0 :1827+ float r = 2.0f * (mantissa - 1.0f - lnMantissa) - lnMantissa * (mantissa - 1.0f); // 2.0 :
1875- logXDiff = FmaImpl(1.0f / (mantissa + 1.0f) * r, 1.44269502f, logXDiff); // 1.44269502f : log_2(e)1828+ logXDiff = FmaImpl(1.0f / (mantissa + 1.0f) * r, 1.44269502f, logXDiff); // 1.44269502f : log_2(e)
1876- logXDiff = FmaImpl(lnMantissa, 1.92513667e-08f, logXDiff); // 1.92513667e-08f : Coefficient of O(1)1829+ logXDiff = FmaImpl(lnMantissa, 1.92513667e-08f, logXDiff); // 1.92513667e-08f : Coefficient of O(1)
1877 logXDiff = FmaImpl(y3, lnMantissa, logXDiff);1830 logXDiff = FmaImpl(y3, lnMantissa, logXDiff);
1878 1831 
1879 float diff0 = logX - (logX + logXDiff) + logXDiff;1832 float diff0 = logX - (logX + logXDiff) + logXDiff;
1880 logX = logX + logXDiff;1833 logX = logX + logXDiff;
1881 1834 
1882 // Calculates the exponent of Stirling's approximation1835 // Calculates the exponent of Stirling's approximation
1883- float y01 = logX * (absX - 0.5f); // 0.5f : Coefficient of sqrt(x)1836+ float y01 = logX * (absX - 0.5f); // 0.5f : Coefficient of sqrt(x)
1884- float y02 = 1.44269502f * absX; // 1.44269502f : log_2(e)1837+ float y02 = 1.44269502f * absX; // 1.44269502f : log_2(e)
1885 float y0 = y01 - y02;1838 float y0 = y01 - y02;
1886 1839 
1887 // Calculates the exponent[y01] error-value1840 // Calculates the exponent[y01] error-value
@@ -1889,12 +1842,12 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float StirlingAndEulerReflection(float x)
1889 diff1 = FmaImpl(diff0, absX - 0.5f, diff1);1842 diff1 = FmaImpl(diff0, absX - 0.5f, diff1);
1890 1843 
1891 // Calculates the exponent[y02] error-value1844 // Calculates the exponent[y02] error-value
1892- float diff2 = FmaImpl(1.44269502f, absX, -y02); // 1.44269502f : log_2(e)1845+ float diff2 = FmaImpl(1.44269502f, absX, -y02); // 1.44269502f : log_2(e)
1893 diff2 = FmaImpl(1.92596303e-08f, absX, diff2);1846 diff2 = FmaImpl(1.92596303e-08f, absX, diff2);
1894 float y0Diff = (diff1 - diff2) - (y0 - y01 + y02);1847 float y0Diff = (diff1 - diff2) - (y0 - y01 + y02);
1895 1848 
1896 float offset = 0.0f;1849 float offset = 0.0f;
1897- if (absX > 33.0f) { // 33.0f : threshold1850+ if (absX > 33.0f) { // 33.0f : threshold
1898 offset = 48.0f;1851 offset = 48.0f;
1899 }1852 }
1900 if (x < 0.0f) {1853 if (x < 0.0f) {
@@ -1907,19 +1860,19 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float StirlingAndEulerReflection(float x)
1907 float f = y0 - i + y0Diff;1860 float f = y0 - i + y0Diff;
1908 1861 
1909 // 2^f * 2^i * sqrt(2*pi)1862 // 2^f * 2^i * sqrt(2*pi)
1910- float y5 = PowImpl(2.0f, f) * PowImpl(2.0f, i) * 2.5066282f; // 2.5066282f : sqrt(2*PI)1863+ float y5 = PowImpl(2.0f, f) * PowImpl(2.0f, i) * 2.5066282f; // 2.5066282f : sqrt(2*PI)
1911 1864 
1912 // Calculate Stirling's approximation remainder minus 11865 // Calculate Stirling's approximation remainder minus 1
1913 // y6 = {[1 + 1/(12*x) + 1/(288*x^2) - 139/(51840*x^3) - 571/(2488320*x^4)] - 1}*x^-11866 // y6 = {[1 + 1/(12*x) + 1/(288*x^2) - 139/(51840*x^3) - 571/(2488320*x^4)] - 1}*x^-1
1914 float recAbsX = 1.0f / absX;1867 float recAbsX = 1.0f / absX;
1915- float y6 = 0.000068413915f; // 0.000068413915f : Coefficient of O(8)1868+ float y6 = 0.000068413915f; // 0.000068413915f : Coefficient of O(8)
1916- y6 = FmaImpl(y6, recAbsX, -0.000050603266f); // -0.000050603266f : Coefficient of O(7)1869+ y6 = FmaImpl(y6, recAbsX, -0.000050603266f); // -0.000050603266f : Coefficient of O(7)
1917- y6 = FmaImpl(y6, recAbsX, -0.00042276637f); // -0.00042276637f : Coefficient of O(6)1870+ y6 = FmaImpl(y6, recAbsX, -0.00042276637f); // -0.00042276637f : Coefficient of O(6)
1918- y6 = FmaImpl(y6, recAbsX, 0.0009921414f); // 0.0009921414f : Coefficient of O(5)1871+ y6 = FmaImpl(y6, recAbsX, 0.0009921414f); // 0.0009921414f : Coefficient of O(5)
1919- y6 = FmaImpl(y6, recAbsX, -0.00027855476f); // -0.00027855476f : -571/24883201872+ y6 = FmaImpl(y6, recAbsX, -0.00027855476f); // -0.00027855476f : -571/2488320
1920- y6 = FmaImpl(y6, recAbsX, -0.002674901f); // -0.002674901f : -139/518401873+ y6 = FmaImpl(y6, recAbsX, -0.002674901f); // -0.002674901f : -139/51840
1921- y6 = FmaImpl(y6, recAbsX, 0.0034718033f); // 0.0034718033f : 1/2881874+ y6 = FmaImpl(y6, recAbsX, 0.0034718033f); // 0.0034718033f : 1/288
1922- y6 = FmaImpl(y6, recAbsX, 0.08333334f); // 0.08333334f : 1/121875+ y6 = FmaImpl(y6, recAbsX, 0.08333334f); // 0.08333334f : 1/12
1923 y6 = FmaImpl(y6, recAbsX, 0.0f);1876 y6 = FmaImpl(y6, recAbsX, 0.0f);
1924 if (x > 0) {1877 if (x > 0) {
1925 // y5 * (1.0f + y6)1878 // y5 * (1.0f + y6)
@@ -1951,7 +1904,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float StirlingAndEulerReflection(float x)
1951 // y5 / [sin(pi*x) * 2 * x * y6]1904 // y5 / [sin(pi*x) * 2 * x * y6]
1952 float y = FmaImpl(y5, y7, -y5 * y7 * yDiff * y7);1905 float y = FmaImpl(y5, y7, -y5 * y7 * yDiff * y7);
1953 y = y * 0.5f;1906 y = y * 0.5f;
1954- if (absX > 33) { // 33 : threshold1907+ if (absX > 33) { // 33 : threshold
1955 y = y * 3.5527136e-15f; // 3.5527136e-15 : 2^-481908 y = y * 3.5527136e-15f; // 3.5527136e-15 : 2^-48
1956 }1909 }
1957 return y;1910 return y;
@@ -1968,8 +1921,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float StirlingAndEulerReflection(float x)
1968 * if x is Inf, return Inf;1921 * if x is Inf, return Inf;
1969 * if x is -Inf, return nan;1922 * if x is -Inf, return nan;
1970 */1923 */
1971-template<typename T>1924+template <typename T>
1972-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T TgammaImpl(T x)1925+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T TgammaImpl(T x)
1973{1926{
1974 if (x == 0.0f) {1927 if (x == 0.0f) {
1975 return 1.0f / x;1928 return 1.0f / x;
@@ -1985,7 +1938,6 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T TgammaImpl(T x)
1985 }1938 }
1986}1939}
1987 1940 
1988- 
1989/**1941/**
1990 * Calculates lgamma value by input x.1942 * Calculates lgamma value by input x.
1991 * @param x a value1943 * @param x a value
@@ -1996,8 +1948,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T TgammaImpl(T x)
1996 * if x is Inf, return Inf;1948 * if x is Inf, return Inf;
1997 * if x is -Inf, return Inf;1949 * if x is -Inf, return Inf;
1998 */1950 */
1999-template<typename T>1951+template <typename T>
2000-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T LgammaImpl(T x)1952+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T LgammaImpl(T x)
2001{1953{
2002 float absX = AbsImpl(x);1954 float absX = AbsImpl(x);
2003 float result = 0.0f;1955 float result = 0.0f;
@@ -2005,13 +1957,13 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T LgammaImpl(T x)
2005 return absX;1957 return absX;
2006 } else if (absX < 0.7f) {1958 } else if (absX < 0.7f) {
2007 // 1/[gamma(x)] = 1/[gamma(x+1) * x]1959 // 1/[gamma(x)] = 1/[gamma(x+1) * x]
2008- float y0 = 0.0035875155f; // 0.0035875155f : Coefficient of O(7)1960+ float y0 = 0.0035875155f; // 0.0035875155f : Coefficient of O(7)
2009- y0 = FmaImpl(y0, absX, -0.0054712854f); // -0.0054712854f : Coefficient of O(6)1961+ y0 = FmaImpl(y0, absX, -0.0054712854f); // -0.0054712854f : Coefficient of O(6)
2010- y0 = FmaImpl(y0, absX, -0.044627126f); // -0.044627126f : Coefficient of O(5)1962+ y0 = FmaImpl(y0, absX, -0.044627126f); // -0.044627126f : Coefficient of O(5)
2011- y0 = FmaImpl(y0, absX, 0.1673177f); // 0.1673177f : Coefficient of O(4)1963+ y0 = FmaImpl(y0, absX, 0.1673177f); // 0.1673177f : Coefficient of O(4)
2012- y0 = FmaImpl(y0, absX, -0.04213598f); // -0.04213598f : Coefficient of O(3)1964+ y0 = FmaImpl(y0, absX, -0.04213598f); // -0.04213598f : Coefficient of O(3)
2013- y0 = FmaImpl(y0, absX, -0.6558673f); // -0.6558673f : Coefficient of O(2)1965+ y0 = FmaImpl(y0, absX, -0.6558673f); // -0.6558673f : Coefficient of O(2)
2014- y0 = FmaImpl(y0, absX, 0.5772154f); // 0.5772154f : Euler-Mascheroni constant1966+ y0 = FmaImpl(y0, absX, 0.5772154f); // 0.5772154f : Euler-Mascheroni constant
2015 y0 = FmaImpl(y0, absX, 0.0f);1967 y0 = FmaImpl(y0, absX, 0.0f);
2016 y0 = FmaImpl(y0, absX, absX);1968 y0 = FmaImpl(y0, absX, absX);
2017 1969 
@@ -2031,32 +1983,32 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T LgammaImpl(T x)
2031 // = −γ(x-1) + ∑(n=2 to inf)[(-1)^n*h(n)/n](x-1)^n1983 // = −γ(x-1) + ∑(n=2 to inf)[(-1)^n*h(n)/n](x-1)^n
2032 // = γ(1-x) + ∑(n=2 to inf)[h(n)/n](-x+1)^n1984 // = γ(1-x) + ∑(n=2 to inf)[h(n)/n](-x+1)^n
2033 float oneMinusX = 1.0f - absX;1985 float oneMinusX = 1.0f - absX;
2034- result = 0.045882664f; // 0.045882664f : Coefficient of O(11)1986+ result = 0.045882664f; // 0.045882664f : Coefficient of O(11)
2035- result = FmaImpl(result, oneMinusX, 0.10373967f); // 0.10373967f : Coefficient of O(10)1987+ result = FmaImpl(result, oneMinusX, 0.10373967f); // 0.10373967f : Coefficient of O(10)
2036- result = FmaImpl(result, oneMinusX, 0.122803635f); // 0.122803635f : Coefficient of O(9)1988+ result = FmaImpl(result, oneMinusX, 0.122803635f); // 0.122803635f : Coefficient of O(9)
2037- result = FmaImpl(result, oneMinusX, 0.12752421f); // 0.12752421f : Coefficient of O(8)1989+ result = FmaImpl(result, oneMinusX, 0.12752421f); // 0.12752421f : Coefficient of O(8)
2038- result = FmaImpl(result, oneMinusX, 0.14321668f); // 0.14321668f : Coefficient of O(7)1990+ result = FmaImpl(result, oneMinusX, 0.14321668f); // 0.14321668f : Coefficient of O(7)
2039- result = FmaImpl(result, oneMinusX, 0.16934357f); // 0.16934357f : Coefficient of O(6)1991+ result = FmaImpl(result, oneMinusX, 0.16934357f); // 0.16934357f : Coefficient of O(6)
2040- result = FmaImpl(result, oneMinusX, 0.20740793f); // 0.20740793f : Coefficient of O(5)1992+ result = FmaImpl(result, oneMinusX, 0.20740793f); // 0.20740793f : Coefficient of O(5)
2041- result = FmaImpl(result, oneMinusX, 0.2705875f); // 0.2705875f : pi^4/3601993+ result = FmaImpl(result, oneMinusX, 0.2705875f); // 0.2705875f : pi^4/360
2042- result = FmaImpl(result, oneMinusX, 0.40068542f); // 0.40068542f : 1.20/31994+ result = FmaImpl(result, oneMinusX, 0.40068542f); // 0.40068542f : 1.20/3
2043- result = FmaImpl(result, oneMinusX, 0.82246696f); // 0.82246696f : (pi^2)/121995+ result = FmaImpl(result, oneMinusX, 0.82246696f); // 0.82246696f : (pi^2)/12
2044- result = FmaImpl(result, oneMinusX, 0.5772157f); // 0.5772157f : Euler-Mascheroni constant1996+ result = FmaImpl(result, oneMinusX, 0.5772157f); // 0.5772157f : Euler-Mascheroni constant
2045 result = FmaImpl(result, oneMinusX, 0.0f);1997 result = FmaImpl(result, oneMinusX, 0.0f);
2046 } else if (absX < 3.0f) {1998 } else if (absX < 3.0f) {
2047 // log[gamma(x)]1999 // log[gamma(x)]
2048 // = (1−γ)(x-2) + [(pi^2-6)/12](x-2)^2 + O(3)2000 // = (1−γ)(x-2) + [(pi^2-6)/12](x-2)^2 + O(3)
2049 float xMinusTwo = absX - 2.0f;2001 float xMinusTwo = absX - 2.0f;
2050- result = 0.0000495984932f; // -0.000049598493f : Coefficient of O(10)2002+ result = 0.0000495984932f; // -0.000049598493f : Coefficient of O(10)
2051- result = FmaImpl(result, xMinusTwo, -0.00022089484f); // -0.000220894843f : Coefficient of O(9)2003+ result = FmaImpl(result, xMinusTwo, -0.00022089484f); // -0.000220894843f : Coefficient of O(9)
2052- result = FmaImpl(result, xMinusTwo, 0.000541314250f); // 0.00054131424f : Coefficient of O(8)2004+ result = FmaImpl(result, xMinusTwo, 0.000541314250f); // 0.00054131424f : Coefficient of O(8)
2053- result = FmaImpl(result, xMinusTwo, -0.00120451697f); // -0.001204517f : Coefficient of O(7)2005+ result = FmaImpl(result, xMinusTwo, -0.00120451697f); // -0.001204517f : Coefficient of O(7)
2054- result = FmaImpl(result, xMinusTwo, 0.00288425176f); // 0.0028842517f : Coefficient of O(6)2006+ result = FmaImpl(result, xMinusTwo, 0.00288425176f); // 0.0028842517f : Coefficient of O(6)
2055- result = FmaImpl(result, xMinusTwo, -0.00738275796f); // -0.007382758f : Coefficient of O(5)2007+ result = FmaImpl(result, xMinusTwo, -0.00738275796f); // -0.007382758f : Coefficient of O(5)
2056- result = FmaImpl(result, xMinusTwo, 0.0205813199f); // 0.02058132f : Coefficient of O(4)2008+ result = FmaImpl(result, xMinusTwo, 0.0205813199f); // 0.02058132f : Coefficient of O(4)
2057- result = FmaImpl(result, xMinusTwo, -0.0673524886f); // -0.06735249f : Coefficient of O(3)2009+ result = FmaImpl(result, xMinusTwo, -0.0673524886f); // -0.06735249f : Coefficient of O(3)
2058- result = FmaImpl(result, xMinusTwo, 0.322467029f); // 0.32246702f : (pi^2-6)/122010+ result = FmaImpl(result, xMinusTwo, 0.322467029f); // 0.32246702f : (pi^2-6)/12
2059- result = FmaImpl(result, xMinusTwo, 0.42278432f); // 0.42278432f : 1-γ2011+ result = FmaImpl(result, xMinusTwo, 0.42278432f); // 0.42278432f : 1-γ
2060 result = FmaImpl(result, absX, -result - result);2012 result = FmaImpl(result, absX, -result - result);
2061 } else if (absX < 7.8f) {2013 } else if (absX < 7.8f) {
2062 float xMinusThree = absX - 3.0f;2014 float xMinusThree = absX - 3.0f;
@@ -2087,21 +2039,21 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T LgammaImpl(T x)
2087 // [(1/12) - (1/360)/(1/x^2) + (1/1260)/((1/x^2)^2)] * (1/x)2039 // [(1/12) - (1/360)/(1/x^2) + (1/1260)/((1/x^2)^2)] * (1/x)
2088 float y0 = (1.0f / absX);2040 float y0 = (1.0f / absX);
2089 float y1 = y0 * y0;2041 float y1 = y0 * y0;
2090- float y2 = 0.00077783066f; // 0.00077783066f : 1/12602042+ float y2 = 0.00077783066f; // 0.00077783066f : 1/1260
2091- y2 = FmaImpl(y2, y1, -0.0027776553f); // -0.0027776553f : -1/3602043+ y2 = FmaImpl(y2, y1, -0.0027776553f); // -0.0027776553f : -1/360
2092- y2 = FmaImpl(y2, y1, 0.083333276f); // 0.083333276 : 1/122044+ y2 = FmaImpl(y2, y1, 0.083333276f); // 0.083333276 : 1/12
2093 y2 = FmaImpl(y2, y0, 0.0f);2045 y2 = FmaImpl(y2, y0, 0.0f);
2094 2046 
2095 // ln(x) * 0.5 * (|x| - 0.5)2047 // ln(x) * 0.5 * (|x| - 0.5)
2096 float y3 = ComputeLn(absX) * 0.5f * (absX - 0.5f);2048 float y3 = ComputeLn(absX) * 0.5f * (absX - 0.5f);
2097 2049 
2098 // (x-0.5) * ln(x) * 0.5 -|x| + (x-0.5) * ln(x) * 0.5 + y2 + ln(sqrt(2*pi))2050 // (x-0.5) * ln(x) * 0.5 -|x| + (x-0.5) * ln(x) * 0.5 + y2 + ln(sqrt(2*pi))
2099- result = y3 - absX + y3 + y2 + 0.9189385f; // 0.9189385f : ln[(2*pi)/2]2051+ result = y3 - absX + y3 + y2 + 0.9189385f; // 0.9189385f : ln[(2*pi)/2]
2100 }2052 }
2101 if (x < 0) {2053 if (x < 0) {
2102 if (FloorIntrinsicsImpl(absX) == absX) {2054 if (FloorIntrinsicsImpl(absX) == absX) {
2103 return ConstantsInternal::SIMT_FP32_INF;2055 return ConstantsInternal::SIMT_FP32_INF;
2104- } else if (absX < 9.9999996e-20f) { // 9.9999996e-20 : minimum-value2056+ } else if (absX < 9.9999996e-20f) { // 9.9999996e-20 : minimum-value
2105 // According Euler's Reflection Formula2057 // According Euler's Reflection Formula
2106 // As x ~ 0 : then sin(pi*x) ~ pi*x2058 // As x ~ 0 : then sin(pi*x) ~ pi*x
2107 // ln(|gamma(x)|)2059 // ln(|gamma(x)|)
@@ -2130,7 +2082,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T LgammaImpl(T x)
2130 // = ln(pi) - ln(|sin(pi*|x|)|*|x|]) - ln(gamma(|x|))2082 // = ln(pi) - ln(|sin(pi*|x|)|*|x|]) - ln(gamma(|x|))
2131 float sinpi = ComputeSinpi(absX);2083 float sinpi = ComputeSinpi(absX);
2132 float lnXSinpi = ComputeLn(absX * AbsImpl(sinpi));2084 float lnXSinpi = ComputeLn(absX * AbsImpl(sinpi));
2133- float y = 1.14472985f - lnXSinpi; // 1.1447298f : ln(pi)2085+ float y = 1.14472985f - lnXSinpi; // 1.1447298f : ln(pi)
2134 result = FmaImpl(y, 1.0f, -result);2086 result = FmaImpl(y, 1.0f, -result);
2135 }2087 }
2136 }2088 }
@@ -2147,8 +2099,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T LgammaImpl(T x)
2147 * if x is Inf, return Inf;2099 * if x is Inf, return Inf;
2148 * if x is -Inf, return Inf;2100 * if x is -Inf, return Inf;
2149 */2101 */
2150-template<typename T>2102+template <typename T>
2151-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI0Impl(T x)2103+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI0Impl(T x)
2152{2104{
2153 float absX = AbsImpl(x);2105 float absX = AbsImpl(x);
2154 if (IsInfImpl(absX)) {2106 if (IsInfImpl(absX)) {
@@ -2157,27 +2109,27 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI0Impl(T x)
2157 if (absX >= 9) {2109 if (absX >= 9) {
2158 // I(x) ~ exp(x) * 1/sqrt(2*pi*x) * [1 + 1/(8x) + 9/(128x^2) + O(3)]2110 // I(x) ~ exp(x) * 1/sqrt(2*pi*x) * [1 + 1/(8x) + 9/(128x^2) + O(3)]
2159 float reciprocalX = 1.0f / absX;2111 float reciprocalX = 1.0f / absX;
2160- float y = 0.34872168f; // 0.34872168f : Coefficient of O(5)2112+ float y = 0.34872168f; // 0.34872168f : Coefficient of O(5)
2161- y = FmaImpl(y, reciprocalX, -0.0054563344f); // -0.0054563344f : Coefficient of O(4)2113+ y = FmaImpl(y, reciprocalX, -0.0054563344f); // -0.0054563344f : Coefficient of O(4)
2162- y = FmaImpl(y, reciprocalX, 0.033347155f); // 0.033347155f : Coefficient of O(3)2114+ y = FmaImpl(y, reciprocalX, 0.033347155f); // 0.033347155f : Coefficient of O(3)
2163- y = FmaImpl(y, reciprocalX, 0.027889195f); // 0.027889195f : 9/[sqrt(2*pi)*128]2115+ y = FmaImpl(y, reciprocalX, 0.027889195f); // 0.027889195f : 9/[sqrt(2*pi)*128]
2164- y = FmaImpl(y, reciprocalX, 0.04987063f); // 0.04987063f : 1/[sqrt(2*pi)*8]2116+ y = FmaImpl(y, reciprocalX, 0.04987063f); // 0.04987063f : 1/[sqrt(2*pi)*8]
2165- y = FmaImpl(y, reciprocalX, 0.39894226f); // 0.39894226f : 1/sqrt(2*pi)2117+ y = FmaImpl(y, reciprocalX, 0.39894226f); // 0.39894226f : 1/sqrt(2*pi)
2166 y = y * RsqrtImpl(absX);2118 y = y * RsqrtImpl(absX);
2167 return y * (ExpImpl(absX * 0.5f) - 1) * (ExpImpl(absX * 0.5f) + 1) + y;2119 return y * (ExpImpl(absX * 0.5f) - 1) * (ExpImpl(absX * 0.5f) + 1) + y;
2168 } else {2120 } else {
2169 // I_0(x) = ∑(k=0 to inf)[1/k!Γ(k+1)*(x/2)^2k ]2121 // I_0(x) = ∑(k=0 to inf)[1/k!Γ(k+1)*(x/2)^2k ]
2170 float squareX = absX * absX;2122 float squareX = absX * absX;
2171- float y = 1.551427e-19; // 1.551427e-19 : Coefficient of O(10)2123+ float y = 1.551427e-19; // 1.551427e-19 : Coefficient of O(10)
2172- y = FmaImpl(y, squareX, 1.4492505e-17f); // 1.4492505e-17 : Coefficient of O(9)2124+ y = FmaImpl(y, squareX, 1.4492505e-17f); // 1.4492505e-17 : Coefficient of O(9)
2173- y = FmaImpl(y, squareX, 1.0687647e-14f); // 1.0687647e-14f : Coefficient of O(8)2125+ y = FmaImpl(y, squareX, 1.0687647e-14f); // 1.0687647e-14f : Coefficient of O(8)
2174- y = FmaImpl(y, squareX, 2.3349575e-12f); // 2.3349575e-12f : 1/25401600*163842126+ y = FmaImpl(y, squareX, 2.3349575e-12f); // 2.3349575e-12f : 1/25401600*16384
2175- y = FmaImpl(y, squareX, 4.7306625e-10f); // 4.7306625e-10f : 1/518400*40962127+ y = FmaImpl(y, squareX, 4.7306625e-10f); // 4.7306625e-10f : 1/518400*4096
2176- y = FmaImpl(y, squareX, 6.7778003e-8f); // 6.7778003e-8f : 1/(14400*1024)2128+ y = FmaImpl(y, squareX, 6.7778003e-8f); // 6.7778003e-8f : 1/(14400*1024)
2177- y = FmaImpl(y, squareX, 0.0000067820783f); // 0.0000067820783f : 1/(576*256)2129+ y = FmaImpl(y, squareX, 0.0000067820783f); // 0.0000067820783f : 1/(576*256)
2178- y = FmaImpl(y, squareX, 0.00043402583f); // 0.00043402583f : 1/(36*64)2130+ y = FmaImpl(y, squareX, 0.00043402583f); // 0.00043402583f : 1/(36*64)
2179- y = FmaImpl(y, squareX, 0.015625f); // 0.015625 : 1/(4*16)2131+ y = FmaImpl(y, squareX, 0.015625f); // 0.015625 : 1/(4*16)
2180- y = FmaImpl(y, squareX, 0.25f); // 0.25f : 1/(1*4)2132+ y = FmaImpl(y, squareX, 0.25f); // 0.25f : 1/(1*4)
2181 y = FmaImpl(y, squareX, 1);2133 y = FmaImpl(y, squareX, 1);
2182 return y;2134 return y;
2183 }2135 }
@@ -2193,8 +2145,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI0Impl(T x)
2193 * if x is Inf, return Inf;2145 * if x is Inf, return Inf;
2194 * if x is -Inf, return -Inf;2146 * if x is -Inf, return -Inf;
2195 */2147 */
2196-template<typename T>2148+template <typename T>
2197-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI1Impl(T x)2149+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI1Impl(T x)
2198{2150{
2199 float absX = AbsImpl(x);2151 float absX = AbsImpl(x);
2200 if (IsInfImpl(absX)) {2152 if (IsInfImpl(absX)) {
@@ -2206,55 +2158,54 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI1Impl(T x)
2206 if (absX >= 8.085f) {2158 if (absX >= 8.085f) {
2207 // I(x) ~ exp(x) * 1/sqrt(2*pi*x) * [1 - 3/(8x) -15/(128x^2) + O(3)]2159 // I(x) ~ exp(x) * 1/sqrt(2*pi*x) * [1 - 3/(8x) -15/(128x^2) + O(3)]
2208 float reciprocalX = 1.0f / absX;2160 float reciprocalX = 1.0f / absX;
2209- float y = -0.5028813f; // -0.5028813 : Coefficient of O(5)2161+ float y = -0.5028813f; // -0.5028813 : Coefficient of O(5)
2210- y = FmaImpl(y, reciprocalX, 0.028471555f); // 0.028471555 : Coefficient of O(4)2162+ y = FmaImpl(y, reciprocalX, 0.028471555f); // 0.028471555 : Coefficient of O(4)
2211- y = FmaImpl(y, reciprocalX, -0.04873671f); // -0.04873671 : Coefficient of O(3)2163+ y = FmaImpl(y, reciprocalX, -0.04873671f); // -0.04873671 : Coefficient of O(3)
2212- y = FmaImpl(y, reciprocalX, -0.04641596f); // -0.04641596 : -15/[sqrt(2*pi)*128]2164+ y = FmaImpl(y, reciprocalX, -0.04641596f); // -0.04641596 : -15/[sqrt(2*pi)*128]
2213- y = FmaImpl(y, reciprocalX, -0.14960973f); // -0.14960973 : -3/[sqrt(2*pi)*8]2165+ y = FmaImpl(y, reciprocalX, -0.14960973f); // -0.14960973 : -3/[sqrt(2*pi)*8]
2214- y = FmaImpl(y, reciprocalX, 0.39894232f); // 0.39894232 : 1/sqrt(2*pi)2166+ y = FmaImpl(y, reciprocalX, 0.39894232f); // 0.39894232 : 1/sqrt(2*pi)
2215 y = y * RsqrtImpl(absX);2167 y = y * RsqrtImpl(absX);
2216 y = y * (ExpImpl(absX * 0.5f) - 1) * (ExpImpl(absX * 0.5f) + 1) + y;2168 y = y * (ExpImpl(absX * 0.5f) - 1) * (ExpImpl(absX * 0.5f) + 1) + y;
2217 return CopySignImpl(y, x);2169 return CopySignImpl(y, x);
2218 } else {2170 } else {
2219 // I(x) = x * [1/2 + (x^2)/16 + (x^2)^2/384 + (x^2)^3/18432 + (x^2)^4/1474560 + (x^2)^5/176947200 + O(6)]2171 // I(x) = x * [1/2 + (x^2)/16 + (x^2)^2/384 + (x^2)^3/18432 + (x^2)^4/1474560 + (x^2)^5/176947200 + O(6)]
2220 float squareX = x * x;2172 float squareX = x * x;
2221- float y = 2.7848253e-18f; // 2.7848253e-18f : Coefficient of O(9)2173+ float y = 2.7848253e-18f; // 2.7848253e-18f : Coefficient of O(9)
2222- y = FmaImpl(y, squareX, 3.4224707e-16f); // 3.4224707e-16f : Coefficient of O(8)2174+ y = FmaImpl(y, squareX, 3.4224707e-16f); // 3.4224707e-16f : Coefficient of O(8)
2223- y = FmaImpl(y, squareX, 1.6258002e-13f); // 1.6258002e-13f : Coefficient of O(7)2175+ y = FmaImpl(y, squareX, 1.6258002e-13f); // 1.6258002e-13f : Coefficient of O(7)
2224- y = FmaImpl(y, squareX, 3.3142173e-11f); // 3.3142173e-11f : Coefficient of O(6)2176+ y = FmaImpl(y, squareX, 3.3142173e-11f); // 3.3142173e-11f : Coefficient of O(6)
2225- y = FmaImpl(y, squareX, 5.6632734e-9f); // 5.6632734e-9f : 1/1769472002177+ y = FmaImpl(y, squareX, 5.6632734e-9f); // 5.6632734e-9f : 1/176947200
2226- y = FmaImpl(y, squareX, 6.780027e-7f); // 6.780027e-7f : 1/14745602178+ y = FmaImpl(y, squareX, 6.780027e-7f); // 6.780027e-7f : 1/1474560
2227- y = FmaImpl(y, squareX, 0.00005425474f); // 0.00005425474f : 1/184322179+ y = FmaImpl(y, squareX, 0.00005425474f); // 0.00005425474f : 1/18432
2228- y = FmaImpl(y, squareX, 0.002604162f); // 0.002604162f : 1/3842180+ y = FmaImpl(y, squareX, 0.002604162f); // 0.002604162f : 1/384
2229- y = FmaImpl(y, squareX, 0.0625000f); // 0.06250001f : 1/162181+ y = FmaImpl(y, squareX, 0.0625000f); // 0.06250001f : 1/16
2230- y = FmaImpl(y, squareX, 0.5f); // 0.5f : 1/22182+ y = FmaImpl(y, squareX, 0.5f); // 0.5f : 1/2
2231 return y * x;2183 return y * x;
2232 }2184 }
2233}2185}
2234 2186 
2235-template<typename T>2187+template <typename T>
2236__SIMT_DEVICE_FUNCTIONS_DECL__ inline T NormcdfImpl(T x)2188__SIMT_DEVICE_FUNCTIONS_DECL__ inline T NormcdfImpl(T x)
2237{2189{
2238 if (AbsImpl(x) > 14.5f) {2190 if (AbsImpl(x) > 14.5f) {
2239 x = CopySignImpl(14.5f, x);2191 x = CopySignImpl(14.5f, x);
2240 }2192 }
2241 2193 
2242- float oneOverSqrt2High = -0.707106769f; // -0.707106769f: -1/sqrt(2) high2194+ float oneOverSqrt2High = -0.707106769f; // -0.707106769f: -1/sqrt(2) high
2243 float xOverSqrt2High = x * oneOverSqrt2High;2195 float xOverSqrt2High = x * oneOverSqrt2High;
2244 float compensateValue = FmaImpl(x, oneOverSqrt2High, -xOverSqrt2High);2196 float compensateValue = FmaImpl(x, oneOverSqrt2High, -xOverSqrt2High);
2245 2197 
2246- float oneOverSqrt2Low = -1.21016175e-8f; // -1.21016175e-8f: -1/sqrt(2) low2198+ float oneOverSqrt2Low = -1.21016175e-8f; // -1.21016175e-8f: -1/sqrt(2) low
2247 float xOverSqrt2Low = FmaImpl(x, oneOverSqrt2Low, compensateValue);2199 float xOverSqrt2Low = FmaImpl(x, oneOverSqrt2Low, compensateValue);
2248 float xOverSqrt2 = xOverSqrt2High + xOverSqrt2Low;2200 float xOverSqrt2 = xOverSqrt2High + xOverSqrt2Low;
2249 2201 
2250 float erfcValue = ErfcImpl(xOverSqrt2);2202 float erfcValue = ErfcImpl(xOverSqrt2);
2251 if (x <= -1.0f) {2203 if (x <= -1.0f) {
2252- erfcValue = FmaImpl(-2.0f * xOverSqrt2 * erfcValue,2204+ erfcValue = FmaImpl(-2.0f * xOverSqrt2 * erfcValue, xOverSqrt2High - xOverSqrt2 + xOverSqrt2Low, erfcValue);
2253- xOverSqrt2High - xOverSqrt2 + xOverSqrt2Low, erfcValue);
2254 }2205 }
2255 return 0.5f * erfcValue;2206 return 0.5f * erfcValue;
2256}2207}
2257 2208 
2258-} // namespace Simt2209+} // namespace Simt
2259-} // namespace AscendC2210+} // namespace AscendC
2260-#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_TRANSCENDENTAL_IMPL_H2211+#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_TRANSCENDENTAL_IMPL_H
Mimpl/simt_api/cpp/dav_3510/kernel_simt_warp_level_impl.h+65-54
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_WARP_LEVEL_IMPL_H11#ifndef IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_WARP_LEVEL_IMPL_H
12#define IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_WARP_LEVEL_IMPL_H12#define IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_WARP_LEVEL_IMPL_H
@@ -41,7 +41,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t AllSyncImpl(int32_t predicate)
41{41{
42#if defined(ASCENDC_CPU_DEBUG)42#if defined(ASCENDC_CPU_DEBUG)
43 uint32_t warpId = GetWarpId();43 uint32_t warpId = GetWarpId();
44- Warp &warp = ThreadBlock::GetBlockInstance().warps_[warpId];44+ Warp& warp = ThreadBlock::GetBlockInstance().warps_[warpId];
45 auto customFunc = [](int32_t a, int32_t b) -> int32_t { return (a != 0) && (b != 0); };45 auto customFunc = [](int32_t a, int32_t b) -> int32_t { return (a != 0) && (b != 0); };
46 return warp.WarpOp(predicate, customFunc);46 return warp.WarpOp(predicate, customFunc);
47#else47#else
@@ -53,7 +53,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t AnySyncImpl(int32_t predicate)
53{53{
54#if defined(ASCENDC_CPU_DEBUG)54#if defined(ASCENDC_CPU_DEBUG)
55 uint32_t warpId = GetWarpId();55 uint32_t warpId = GetWarpId();
56- Warp &warp = ThreadBlock::GetBlockInstance().warps_[warpId];56+ Warp& warp = ThreadBlock::GetBlockInstance().warps_[warpId];
57 auto customFunc = [](int32_t a, int32_t b) -> int32_t { return (a != 0) || (b != 0); };57 auto customFunc = [](int32_t a, int32_t b) -> int32_t { return (a != 0) || (b != 0); };
58 return warp.WarpOp(predicate, customFunc);58 return warp.WarpOp(predicate, customFunc);
59#else59#else
@@ -81,7 +81,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t BallotSyncImpl(int32_t predicate)
81 if (predicate != 0) {81 if (predicate != 0) {
82 bitNum = one << laneId;82 bitNum = one << laneId;
83 }83 }
84- Warp &warp = ThreadBlock::GetBlockInstance().warps_[warpId];84+ Warp& warp = ThreadBlock::GetBlockInstance().warps_[warpId];
85 auto customFunc = [](uint32_t a, uint32_t b) -> uint32_t { return a + b; };85 auto customFunc = [](uint32_t a, uint32_t b) -> uint32_t { return a + b; };
86 return warp.WarpOp(bitNum, customFunc);86 return warp.WarpOp(bitNum, customFunc);
87#else87#else
@@ -96,7 +96,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t ActiveMaskImpl()
96 uint32_t laneId = GetLaneId();96 uint32_t laneId = GetLaneId();
97 uint32_t one = 1;97 uint32_t one = 1;
98 uint32_t bitNum = one << laneId;98 uint32_t bitNum = one << laneId;
99- Warp &warp = ThreadBlock::GetBlockInstance().warps_[warpId];99+ Warp& warp = ThreadBlock::GetBlockInstance().warps_[warpId];
100 auto customFunc = [](uint32_t a, uint32_t b) -> uint32_t { return a + b; };100 auto customFunc = [](uint32_t a, uint32_t b) -> uint32_t { return a + b; };
101 return warp.WarpOp(bitNum, customFunc);101 return warp.WarpOp(bitNum, customFunc);
102#else102#else
@@ -107,39 +107,43 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t ActiveMaskImpl()
107template <typename T>107template <typename T>
108__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ShflSyncImpl(T var, int32_t srcLane, int32_t width = warpSize)108__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ShflSyncImpl(T var, int32_t srcLane, int32_t width = warpSize)
109{109{
110- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,110+ static_assert(
111- "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");111+ SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,
112+ "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");
112#if defined(ASCENDC_CPU_DEBUG)113#if defined(ASCENDC_CPU_DEBUG)
113- ASCENDC_ASSERT((width <= WARP_SIZE && width > 0 && WARP_SIZE % width == 0),114+ ASCENDC_ASSERT((width <= WARP_SIZE && width > 0 && WARP_SIZE % width == 0), {
114- { KERNEL_LOG(KERNEL_ERROR, "width must be a power of 2 and in (0, 32]"); });115+ KERNEL_LOG(KERNEL_ERROR, "width must be a power of 2 and in (0, 32]");
116+ });
115 ASCENDC_ASSERT((srcLane < WARP_SIZE && srcLane >= 0), { KERNEL_LOG(KERNEL_ERROR, "srcLane must be in [0, 32)"); });117 ASCENDC_ASSERT((srcLane < WARP_SIZE && srcLane >= 0), { KERNEL_LOG(KERNEL_ERROR, "srcLane must be in [0, 32)"); });
116 118 
117 uint32_t warpId = GetWarpId();119 uint32_t warpId = GetWarpId();
118 uint32_t laneId = GetLaneId();120 uint32_t laneId = GetLaneId();
119- Warp &warp = ThreadBlock::GetBlockInstance().warps_[warpId];121+ Warp& warp = ThreadBlock::GetBlockInstance().warps_[warpId];
120 int32_t minLane = laneId / width * width;122 int32_t minLane = laneId / width * width;
121 srcLane = minLane + srcLane % width;123 srcLane = minLane + srcLane % width;
122 124 
123 return warp.WarpShuffleOp(var, laneId, srcLane);125 return warp.WarpShuffleOp(var, laneId, srcLane);
124#else126#else
125- return __shfl(var,127+ return __shfl(
126- ((warpSize - width) << LANE_MASK_START_POS) | (MAX_OFFSET_OF_MODE << MAX_OFFSET_START_POS) | (srcLane));128+ var, ((warpSize - width) << LANE_MASK_START_POS) | (MAX_OFFSET_OF_MODE << MAX_OFFSET_START_POS) | (srcLane));
127#endif129#endif
128}130}
129 131 
130template <typename T>132template <typename T>
131__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ShflUpSyncImpl(T var, uint32_t delta, int32_t width = warpSize)133__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ShflUpSyncImpl(T var, uint32_t delta, int32_t width = warpSize)
132{134{
133- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,135+ static_assert(
134- "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");136+ SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,
137+ "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");
135#if defined(ASCENDC_CPU_DEBUG)138#if defined(ASCENDC_CPU_DEBUG)
136- ASCENDC_ASSERT((width <= WARP_SIZE && width > 0 && WARP_SIZE % width == 0),139+ ASCENDC_ASSERT((width <= WARP_SIZE && width > 0 && WARP_SIZE % width == 0), {
137- { KERNEL_LOG(KERNEL_ERROR, "width must be a power of 2 and in (0, 32]"); });140+ KERNEL_LOG(KERNEL_ERROR, "width must be a power of 2 and in (0, 32]");
141+ });
138 ASCENDC_ASSERT((delta < WARP_SIZE && delta >= 0), { KERNEL_LOG(KERNEL_ERROR, "delta must be in [0, 32)"); });142 ASCENDC_ASSERT((delta < WARP_SIZE && delta >= 0), { KERNEL_LOG(KERNEL_ERROR, "delta must be in [0, 32)"); });
139 143 
140 uint32_t warpId = GetWarpId();144 uint32_t warpId = GetWarpId();
141 uint32_t laneId = GetLaneId();145 uint32_t laneId = GetLaneId();
142- Warp &warp = ThreadBlock::GetBlockInstance().warps_[warpId];146+ Warp& warp = ThreadBlock::GetBlockInstance().warps_[warpId];
143 int32_t minLane = laneId / width * width;147 int32_t minLane = laneId / width * width;
144 int32_t srcLane = laneId - delta;148 int32_t srcLane = laneId - delta;
145 149 
@@ -149,24 +153,26 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T ShflUpSyncImpl(T var, uint32_t delta, in
149 153 
150 return warp.WarpShuffleOp(var, laneId, srcLane);154 return warp.WarpShuffleOp(var, laneId, srcLane);
151#else155#else
152- return __shfl_up(var,156+ return __shfl_up(
153- ((warpSize - width) << LANE_MASK_START_POS) | (MAX_OFFSET_OF_UP_MODE << MAX_OFFSET_START_POS) | (delta));157+ var, ((warpSize - width) << LANE_MASK_START_POS) | (MAX_OFFSET_OF_UP_MODE << MAX_OFFSET_START_POS) | (delta));
154#endif158#endif
155}159}
156 160 
157template <typename T>161template <typename T>
158__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ShflDownSyncImpl(T var, uint32_t delta, int32_t width = warpSize)162__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ShflDownSyncImpl(T var, uint32_t delta, int32_t width = warpSize)
159{163{
160- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,164+ static_assert(
161- "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");165+ SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,
166+ "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");
162#if defined(ASCENDC_CPU_DEBUG)167#if defined(ASCENDC_CPU_DEBUG)
163- ASCENDC_ASSERT((width <= WARP_SIZE && width > 0 && WARP_SIZE % width == 0),168+ ASCENDC_ASSERT((width <= WARP_SIZE && width > 0 && WARP_SIZE % width == 0), {
164- { KERNEL_LOG(KERNEL_ERROR, "width must be a power of 2 and in (0, 32]"); });169+ KERNEL_LOG(KERNEL_ERROR, "width must be a power of 2 and in (0, 32]");
170+ });
165 ASCENDC_ASSERT((delta < WARP_SIZE && delta >= 0), { KERNEL_LOG(KERNEL_ERROR, "delta must be in [0, 32)"); });171 ASCENDC_ASSERT((delta < WARP_SIZE && delta >= 0), { KERNEL_LOG(KERNEL_ERROR, "delta must be in [0, 32)"); });
166 172 
167 uint32_t warpId = GetWarpId();173 uint32_t warpId = GetWarpId();
168 uint32_t laneId = GetLaneId();174 uint32_t laneId = GetLaneId();
169- Warp &warp = ThreadBlock::GetBlockInstance().warps_[warpId];175+ Warp& warp = ThreadBlock::GetBlockInstance().warps_[warpId];
170 int32_t minLane = laneId / width * width;176 int32_t minLane = laneId / width * width;
171 int32_t maxLane = minLane + MAX_SHLF_OFFSET % width;177 int32_t maxLane = minLane + MAX_SHLF_OFFSET % width;
172 int32_t srcLane = laneId + delta;178 int32_t srcLane = laneId + delta;
@@ -177,25 +183,27 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T ShflDownSyncImpl(T var, uint32_t delta,
177 183 
178 return warp.WarpShuffleOp(var, laneId, srcLane);184 return warp.WarpShuffleOp(var, laneId, srcLane);
179#else185#else
180- return __shfl_down(var,186+ return __shfl_down(
181- ((warpSize - width) << LANE_MASK_START_POS) | (MAX_OFFSET_OF_MODE << MAX_OFFSET_START_POS) | (delta));187+ var, ((warpSize - width) << LANE_MASK_START_POS) | (MAX_OFFSET_OF_MODE << MAX_OFFSET_START_POS) | (delta));
182#endif188#endif
183}189}
184 190 
185template <typename T>191template <typename T>
186__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ShflXorSyncImpl(T var, int32_t laneMask, int32_t width = warpSize)192__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ShflXorSyncImpl(T var, int32_t laneMask, int32_t width = warpSize)
187{193{
188- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,194+ static_assert(
189- "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");195+ SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,
196+ "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");
190#if defined(ASCENDC_CPU_DEBUG)197#if defined(ASCENDC_CPU_DEBUG)
191- ASCENDC_ASSERT((width <= WARP_SIZE && width > 0 && WARP_SIZE % width == 0),198+ ASCENDC_ASSERT((width <= WARP_SIZE && width > 0 && WARP_SIZE % width == 0), {
192- { KERNEL_LOG(KERNEL_ERROR, "width must be a power of 2 and in (0, 32]"); });199+ KERNEL_LOG(KERNEL_ERROR, "width must be a power of 2 and in (0, 32]");
193- ASCENDC_ASSERT((laneMask < WARP_SIZE && laneMask >= 0),200+ });
194- { KERNEL_LOG(KERNEL_ERROR, "laneMask must be in [0, 32)"); });201+ ASCENDC_ASSERT(
202+ (laneMask < WARP_SIZE && laneMask >= 0), { KERNEL_LOG(KERNEL_ERROR, "laneMask must be in [0, 32)"); });
195 203 
196 uint32_t warpId = GetWarpId();204 uint32_t warpId = GetWarpId();
197 uint32_t laneId = GetLaneId();205 uint32_t laneId = GetLaneId();
198- Warp &warp = ThreadBlock::GetBlockInstance().warps_[warpId];206+ Warp& warp = ThreadBlock::GetBlockInstance().warps_[warpId];
199 int32_t minLane = laneId / width * width;207 int32_t minLane = laneId / width * width;
200 int32_t maxLane = minLane + MAX_SHLF_OFFSET % width;208 int32_t maxLane = minLane + MAX_SHLF_OFFSET % width;
201 int32_t srcLane = laneId ^ laneMask;209 int32_t srcLane = laneId ^ laneMask;
@@ -206,19 +214,20 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T ShflXorSyncImpl(T var, int32_t laneMask,
206 214 
207 return warp.WarpShuffleOp(var, laneId, srcLane);215 return warp.WarpShuffleOp(var, laneId, srcLane);
208#else216#else
209- return __shfl_xor(var,217+ return __shfl_xor(
210- ((warpSize - width) << LANE_MASK_START_POS) | (MAX_OFFSET_OF_MODE << MAX_OFFSET_START_POS) | (laneMask));218+ var, ((warpSize - width) << LANE_MASK_START_POS) | (MAX_OFFSET_OF_MODE << MAX_OFFSET_START_POS) | (laneMask));
211#endif219#endif
212}220}
213 221 
214template <typename T>222template <typename T>
215__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ReduceAddSyncImpl(T val)223__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ReduceAddSyncImpl(T val)
216{224{
217- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,225+ static_assert(
218- "Input type of val only supports int32_t, uint32_t, half, float.");226+ SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,
227+ "Input type of val only supports int32_t, uint32_t, half, float.");
219#if defined(ASCENDC_CPU_DEBUG)228#if defined(ASCENDC_CPU_DEBUG)
220 uint32_t warpId = GetWarpId();229 uint32_t warpId = GetWarpId();
221- Warp &warp = ThreadBlock::GetBlockInstance().warps_[warpId];230+ Warp& warp = ThreadBlock::GetBlockInstance().warps_[warpId];
222 auto customFunc = [](T a, T b) -> T { return a + b; };231 auto customFunc = [](T a, T b) -> T { return a + b; };
223 return warp.WarpOp(val, customFunc);232 return warp.WarpOp(val, customFunc);
224#else233#else
@@ -229,11 +238,12 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T ReduceAddSyncImpl(T val)
229template <typename T>238template <typename T>
230__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ReduceMaxSyncImpl(T val)239__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ReduceMaxSyncImpl(T val)
231{240{
232- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,241+ static_assert(
233- "Input type of val only supports int32_t, uint32_t, half, float.");242+ SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,
243+ "Input type of val only supports int32_t, uint32_t, half, float.");
234#if defined(ASCENDC_CPU_DEBUG)244#if defined(ASCENDC_CPU_DEBUG)
235 uint32_t warpId = GetWarpId();245 uint32_t warpId = GetWarpId();
236- Warp &warp = ThreadBlock::GetBlockInstance().warps_[warpId];246+ Warp& warp = ThreadBlock::GetBlockInstance().warps_[warpId];
237 auto customFunc = [](T a, T b) -> T { return a > b ? a : b; };247 auto customFunc = [](T a, T b) -> T { return a > b ? a : b; };
238 return warp.WarpOp(val, customFunc);248 return warp.WarpOp(val, customFunc);
239#else249#else
@@ -244,11 +254,12 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T ReduceMaxSyncImpl(T val)
244template <typename T>254template <typename T>
245__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ReduceMinSyncImpl(T val)255__SIMT_DEVICE_FUNCTIONS_DECL__ inline T ReduceMinSyncImpl(T val)
246{256{
247- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,257+ static_assert(
248- "Input type of val only supports int32_t, uint32_t, half, float.");258+ SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,
259+ "Input type of val only supports int32_t, uint32_t, half, float.");
249#if defined(ASCENDC_CPU_DEBUG)260#if defined(ASCENDC_CPU_DEBUG)
250 uint32_t warpId = GetWarpId();261 uint32_t warpId = GetWarpId();
251- Warp &warp = ThreadBlock::GetBlockInstance().warps_[warpId];262+ Warp& warp = ThreadBlock::GetBlockInstance().warps_[warpId];
252 auto customFunc = [](T a, T b) -> T { return a < b ? a : b; };263 auto customFunc = [](T a, T b) -> T { return a < b ? a : b; };
253 return warp.WarpOp(val, customFunc);264 return warp.WarpOp(val, customFunc);
254#else265#else
@@ -272,6 +283,6 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void ThreadFenceImpl()
272 __threadfence();283 __threadfence();
273#endif284#endif
274}285}
275-} // namespace Simt286+} // namespace Simt
276-} // namespace AscendC287+} // namespace AscendC
277-#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_WARP_LEVEL_IMPL_H288+#endif // IMPL_SIMT_API_CPP_DAV_C310_KERNEL_SIMT_WARP_LEVEL_IMPL_H
Mimpl/simt_api/cpp/kernel_simt_atomic_intf_impl.h+33-33
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_ATOMIC_INTERFACE_IMPL_H11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_ATOMIC_INTERFACE_IMPL_H
12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_ATOMIC_INTERFACE_IMPL_H12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_ATOMIC_INTERFACE_IMPL_H
@@ -18,157 +18,157 @@ namespace Simt {
18 18 
19#ifndef ASCENDC_CPU_DEBUG19#ifndef ASCENDC_CPU_DEBUG
20template <typename T>20template <typename T>
21-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAdd(__ubuf__ T *address, T val)21+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAdd(__ubuf__ T* address, T val)
22{22{
23 return AtomicAddImpl(address, val);23 return AtomicAddImpl(address, val);
24}24}
25#endif25#endif
26 26 
27template <typename T>27template <typename T>
28-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAdd(__gm__ T *address, T val)28+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAdd(__gm__ T* address, T val)
29{29{
30 return AtomicAddImpl(address, val);30 return AtomicAddImpl(address, val);
31}31}
32 32 
33#ifndef ASCENDC_CPU_DEBUG33#ifndef ASCENDC_CPU_DEBUG
34template <typename T>34template <typename T>
35-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSub(__ubuf__ T *address, T val)35+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSub(__ubuf__ T* address, T val)
36{36{
37 return AtomicSubImpl(address, val);37 return AtomicSubImpl(address, val);
38}38}
39#endif39#endif
40 40 
41template <typename T>41template <typename T>
42-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSub(__gm__ T *address, T val)42+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSub(__gm__ T* address, T val)
43{43{
44 return AtomicSubImpl(address, val);44 return AtomicSubImpl(address, val);
45}45}
46 46 
47#ifndef ASCENDC_CPU_DEBUG47#ifndef ASCENDC_CPU_DEBUG
48template <typename T>48template <typename T>
49-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExch(__ubuf__ T *address, T val)49+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExch(__ubuf__ T* address, T val)
50{50{
51 return AtomicExchImpl(address, val);51 return AtomicExchImpl(address, val);
52}52}
53#endif53#endif
54 54 
55template <typename T>55template <typename T>
56-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExch(__gm__ T *address, T val)56+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExch(__gm__ T* address, T val)
57{57{
58 return AtomicExchImpl(address, val);58 return AtomicExchImpl(address, val);
59}59}
60 60 
61#ifndef ASCENDC_CPU_DEBUG61#ifndef ASCENDC_CPU_DEBUG
62template <typename T>62template <typename T>
63-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMax(__ubuf__ T *address, T val)63+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMax(__ubuf__ T* address, T val)
64{64{
65 return AtomicMaxImpl(address, val);65 return AtomicMaxImpl(address, val);
66}66}
67#endif67#endif
68 68 
69template <typename T>69template <typename T>
70-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMax(__gm__ T *address, T val)70+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMax(__gm__ T* address, T val)
71{71{
72 return AtomicMaxImpl(address, val);72 return AtomicMaxImpl(address, val);
73}73}
74 74 
75#ifndef ASCENDC_CPU_DEBUG75#ifndef ASCENDC_CPU_DEBUG
76template <typename T>76template <typename T>
77-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMin(__ubuf__ T *address, T val)77+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMin(__ubuf__ T* address, T val)
78{78{
79 return AtomicMinImpl(address, val);79 return AtomicMinImpl(address, val);
80}80}
81#endif81#endif
82 82 
83template <typename T>83template <typename T>
84-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMin(__gm__ T *address, T val)84+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMin(__gm__ T* address, T val)
85{85{
86 return AtomicMinImpl(address, val);86 return AtomicMinImpl(address, val);
87}87}
88 88 
89#ifndef ASCENDC_CPU_DEBUG89#ifndef ASCENDC_CPU_DEBUG
90template <typename T>90template <typename T>
91-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicInc(__ubuf__ T *address, T val)91+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicInc(__ubuf__ T* address, T val)
92{92{
93 return AtomicIncImpl(address, val);93 return AtomicIncImpl(address, val);
94}94}
95#endif95#endif
96 96 
97template <typename T>97template <typename T>
98-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicInc(__gm__ T *address, T val)98+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicInc(__gm__ T* address, T val)
99{99{
100 return AtomicIncImpl(address, val);100 return AtomicIncImpl(address, val);
101}101}
102 102 
103#ifndef ASCENDC_CPU_DEBUG103#ifndef ASCENDC_CPU_DEBUG
104template <typename T>104template <typename T>
105-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDec(__ubuf__ T *address, T val)105+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDec(__ubuf__ T* address, T val)
106{106{
107 return AtomicDecImpl(address, val);107 return AtomicDecImpl(address, val);
108}108}
109#endif109#endif
110 110 
111template <typename T>111template <typename T>
112-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDec(__gm__ T *address, T val)112+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDec(__gm__ T* address, T val)
113{113{
114 return AtomicDecImpl(address, val);114 return AtomicDecImpl(address, val);
115}115}
116 116 
117#ifndef ASCENDC_CPU_DEBUG117#ifndef ASCENDC_CPU_DEBUG
118template <typename T>118template <typename T>
119-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCas(__ubuf__ T *address, T compare, T val)119+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCas(__ubuf__ T* address, T compare, T val)
120{120{
121 return AtomicCasImpl(address, compare, val);121 return AtomicCasImpl(address, compare, val);
122}122}
123#endif123#endif
124 124 
125template <typename T>125template <typename T>
126-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCas(__gm__ T *address, T compare, T val)126+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCas(__gm__ T* address, T compare, T val)
127{127{
128 return AtomicCasImpl(address, compare, val);128 return AtomicCasImpl(address, compare, val);
129}129}
130 130 
131#ifndef ASCENDC_CPU_DEBUG131#ifndef ASCENDC_CPU_DEBUG
132template <typename T>132template <typename T>
133-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAnd(__ubuf__ T *address, T val)133+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAnd(__ubuf__ T* address, T val)
134{134{
135 return AtomicAndImpl(address, val);135 return AtomicAndImpl(address, val);
136}136}
137#endif137#endif
138 138 
139template <typename T>139template <typename T>
140-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAnd(__gm__ T *address, T val)140+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAnd(__gm__ T* address, T val)
141{141{
142 return AtomicAndImpl(address, val);142 return AtomicAndImpl(address, val);
143}143}
144 144 
145#ifndef ASCENDC_CPU_DEBUG145#ifndef ASCENDC_CPU_DEBUG
146template <typename T>146template <typename T>
147-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOr(__ubuf__ T *address, T val)147+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOr(__ubuf__ T* address, T val)
148{148{
149 return AtomicOrImpl(address, val);149 return AtomicOrImpl(address, val);
150}150}
151#endif151#endif
152 152 
153template <typename T>153template <typename T>
154-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOr(__gm__ T *address, T val)154+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOr(__gm__ T* address, T val)
155{155{
156 return AtomicOrImpl(address, val);156 return AtomicOrImpl(address, val);
157}157}
158 158 
159#ifndef ASCENDC_CPU_DEBUG159#ifndef ASCENDC_CPU_DEBUG
160template <typename T>160template <typename T>
161-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXor(__ubuf__ T *address, T val)161+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXor(__ubuf__ T* address, T val)
162{162{
163 return AtomicXorImpl(address, val);163 return AtomicXorImpl(address, val);
164}164}
165#endif165#endif
166 166 
167template <typename T>167template <typename T>
168-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXor(__gm__ T *address, T val)168+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXor(__gm__ T* address, T val)
169{169{
170 return AtomicXorImpl(address, val);170 return AtomicXorImpl(address, val);
171}171}
172-} // namespace Simt172+} // namespace Simt
173-} // namespace AscendC173+} // namespace AscendC
174-#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_ATOMIC_INTERFACE_IMPL_H174+#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_ATOMIC_INTERFACE_IMPL_H
Mimpl/simt_api/cpp/kernel_simt_bessel_intf_impl.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_BESSEL_INTERFACE_IMPL_H11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_BESSEL_INTERFACE_IMPL_H
12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_BESSEL_INTERFACE_IMPL_H12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_BESSEL_INTERFACE_IMPL_H
@@ -60,6 +60,6 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline U Yn(T n, U x)
60 return YnImpl(n, x);60 return YnImpl(n, x);
61}61}
62 62 
63-} // namespace Simt63+} // namespace Simt
64-} // namespace AscendC64+} // namespace AscendC
65-#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_BESSEL_INTERFACE_IMPL_H65+#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_BESSEL_INTERFACE_IMPL_H
Mimpl/simt_api/cpp/kernel_simt_cast_intf_impl.h+66-51
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_CAST_INTERFACE_IMPL_H11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_CAST_INTERFACE_IMPL_H
12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_CAST_INTERFACE_IMPL_H12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_CAST_INTERFACE_IMPL_H
@@ -21,20 +21,25 @@ namespace Simt {
21template <typename T, typename U, RoundMode roundMode, SatMode satMode>21template <typename T, typename U, RoundMode roundMode, SatMode satMode>
22__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Cast(U x)22__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Cast(U x)
23{23{
24- if constexpr (roundMode == RoundMode::CAST_EVEN || roundMode == RoundMode::CAST_ZERO ||24+ if constexpr (
25- roundMode == RoundMode::CAST_FLOOR || roundMode == RoundMode::CAST_CEIL) {25+ roundMode == RoundMode::CAST_EVEN || roundMode == RoundMode::CAST_ZERO || roundMode == RoundMode::CAST_FLOOR ||
26- static_assert(SupportTypeSimtInternel<Tuple<U, T>, Tuple<float, int>, Tuple<int, float>, Tuple<float, int64_t>,26+ roundMode == RoundMode::CAST_CEIL) {
27- Tuple<int64_t, float>, Tuple<float, half>, Tuple<float, bfloat16_t>>,27+ static_assert(
28- "Input type (U, T) only supports"28+ SupportTypeSimtInternel<
29- "[(float, int), (int, float), (float, int64), (int64, float), (float, half), (float, bfloat16)]");29+ Tuple<U, T>, Tuple<float, int>, Tuple<int, float>, Tuple<float, int64_t>, Tuple<int64_t, float>,
30+ Tuple<float, half>, Tuple<float, bfloat16_t>>,
31+ "Input type (U, T) only supports"
32+ "[(float, int), (int, float), (float, int64), (int64, float), (float, half), (float, bfloat16)]");
30 } else if constexpr (roundMode == RoundMode::CAST_NONE) {33 } else if constexpr (roundMode == RoundMode::CAST_NONE) {
31- static_assert(SupportTypeSimtInternel<Tuple<U, T>, Tuple<half, float>, Tuple<bfloat16_t, float>>,34+ static_assert(
32- "Input type (U, T) only supports [(half, float), (bfloat16, float)]");35+ SupportTypeSimtInternel<Tuple<U, T>, Tuple<half, float>, Tuple<bfloat16_t, float>>,
36+ "Input type (U, T) only supports [(half, float), (bfloat16, float)]");
33 } else {37 } else {
34- static_assert(roundMode == RoundMode::CAST_EVEN || roundMode == RoundMode::CAST_ZERO ||38+ static_assert(
35- roundMode == RoundMode::CAST_FLOOR || roundMode == RoundMode::CAST_CEIL ||39+ roundMode == RoundMode::CAST_EVEN || roundMode == RoundMode::CAST_ZERO ||
36- roundMode == RoundMode::CAST_NONE,40+ roundMode == RoundMode::CAST_FLOOR || roundMode == RoundMode::CAST_CEIL ||
37- "Cast: An invalid RoundMode!");41+ roundMode == RoundMode::CAST_NONE,
42+ "Cast: An invalid RoundMode!");
38 }43 }
39 return CastImpl<T, U, roundMode, satMode>(x);44 return CastImpl<T, U, roundMode, satMode>(x);
40}45}
@@ -42,39 +47,44 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Cast(U x)
42template <typename T, typename U, RoundMode roundMode, SatMode satMode>47template <typename T, typename U, RoundMode roundMode, SatMode satMode>
43__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Cast(U x)48__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Cast(U x)
44{49{
45- if constexpr (roundMode == RoundMode::CAST_RINT || roundMode == RoundMode::CAST_FLOOR ||50+ if constexpr (
46- roundMode == RoundMode::CAST_CEIL || roundMode == RoundMode::CAST_ROUND ||51+ roundMode == RoundMode::CAST_RINT || roundMode == RoundMode::CAST_FLOOR || roundMode == RoundMode::CAST_CEIL ||
47- roundMode == RoundMode::CAST_TRUNC) {52+ roundMode == RoundMode::CAST_ROUND || roundMode == RoundMode::CAST_TRUNC) {
48 static_assert(53 static_assert(
49- SupportTypeSimtInternel<Tuple<U, T>, Tuple<half, int>, Tuple<half, uint32_t>, Tuple<float, int>, Tuple<float, uint32_t>,54+ SupportTypeSimtInternel<
50- Tuple<float, int64_t>, Tuple<float, uint64_t>, Tuple<bfloat16_t, int>,55+ Tuple<U, T>, Tuple<half, int>, Tuple<half, uint32_t>, Tuple<float, int>, Tuple<float, uint32_t>,
51- Tuple<bfloat16_t, uint32_t>, Tuple<int, half>, Tuple<int, float>, Tuple<int, bfloat16_t>,56+ Tuple<float, int64_t>, Tuple<float, uint64_t>, Tuple<bfloat16_t, int>, Tuple<bfloat16_t, uint32_t>,
52- Tuple<uint32_t, half>, Tuple<uint32_t, float>, Tuple<uint32_t, bfloat16_t>,57+ Tuple<int, half>, Tuple<int, float>, Tuple<int, bfloat16_t>, Tuple<uint32_t, half>,
53- Tuple<int64_t, float>, Tuple<uint64_t, float>, Tuple<half, float>, Tuple<half, bfloat16_t>,58+ Tuple<uint32_t, float>, Tuple<uint32_t, bfloat16_t>, Tuple<int64_t, float>, Tuple<uint64_t, float>,
54- Tuple<float, half>, Tuple<float, bfloat16_t>, Tuple<bfloat16_t, half>,59+ Tuple<half, float>, Tuple<half, bfloat16_t>, Tuple<float, half>, Tuple<float, bfloat16_t>,
55- Tuple<bfloat16_t, float>>,60+ Tuple<bfloat16_t, half>, Tuple<bfloat16_t, float>>,
56 "Input type (U, T) only supports"61 "Input type (U, T) only supports"
57 "[(half, int), (half, uint32), (float, int), (float, uint32), (float, int64), (float, uint64),"62 "[(half, int), (half, uint32), (float, int), (float, uint32), (float, int64), (float, uint64),"
58 " (bfloat16, int), (bfloat16, uint32), (int, half), (int, float), (int, bfloat16), (uint32, half),"63 " (bfloat16, int), (bfloat16, uint32), (int, half), (int, float), (int, bfloat16), (uint32, half),"
59 " (uint32, float), (uint32, bfloat16), (int64, float), (uint64, float), (half, float), (half, bfloat16),"64 " (uint32, float), (uint32, bfloat16), (int64, float), (uint64, float), (half, float), (half, bfloat16),"
60 " (float, half), (float, bfloat16), (bfloat16, half), (bfloat16, float)]");65 " (float, half), (float, bfloat16), (bfloat16, half), (bfloat16, float)]");
61 } else if constexpr (roundMode == RoundMode::CAST_ODD) {66 } else if constexpr (roundMode == RoundMode::CAST_ODD) {
62- static_assert(SupportTypeSimtInternel<Tuple<U, T>, Tuple<float, half>>, "Input type (U, T) only supports (float, half)");67+ static_assert(
68+ SupportTypeSimtInternel<Tuple<U, T>, Tuple<float, half>>, "Input type (U, T) only supports (float, half)");
63 } else if constexpr (roundMode == RoundMode::CAST_EVEN || roundMode == RoundMode::CAST_ZERO) {69 } else if constexpr (roundMode == RoundMode::CAST_EVEN || roundMode == RoundMode::CAST_ZERO) {
64- static_assert(SupportTypeSimtInternel<Tuple<U, T>, Tuple<float, int>, Tuple<int, float>, Tuple<float, int64_t>,70+ static_assert(
65- Tuple<int64_t, float>, Tuple<float, half>, Tuple<float, bfloat16_t>>,71+ SupportTypeSimtInternel<
66- "Input type (U, T) only supports"72+ Tuple<U, T>, Tuple<float, int>, Tuple<int, float>, Tuple<float, int64_t>, Tuple<int64_t, float>,
67- "[(float, int), (int, float), (float, int64), (int64, float), (float, half), (float, bfloat16)]");73+ Tuple<float, half>, Tuple<float, bfloat16_t>>,
74+ "Input type (U, T) only supports"
75+ "[(float, int), (int, float), (float, int64), (int64, float), (float, half), (float, bfloat16)]");
68 } else if constexpr (roundMode == RoundMode::CAST_NONE) {76 } else if constexpr (roundMode == RoundMode::CAST_NONE) {
69- static_assert(SupportTypeSimtInternel<Tuple<U, T>, Tuple<half, float>, Tuple<bfloat16_t, float>>,77+ static_assert(
70- "Input type (U, T) only supports [(half, float), (bfloat16, float)]");78+ SupportTypeSimtInternel<Tuple<U, T>, Tuple<half, float>, Tuple<bfloat16_t, float>>,
79+ "Input type (U, T) only supports [(half, float), (bfloat16, float)]");
71 } else {80 } else {
72- static_assert(roundMode == RoundMode::CAST_RINT || roundMode == RoundMode::CAST_FLOOR ||81+ static_assert(
73- roundMode == RoundMode::CAST_CEIL || roundMode == RoundMode::CAST_ROUND ||82+ roundMode == RoundMode::CAST_RINT || roundMode == RoundMode::CAST_FLOOR ||
74- roundMode == RoundMode::CAST_TRUNC || roundMode == RoundMode::CAST_ODD ||83+ roundMode == RoundMode::CAST_CEIL || roundMode == RoundMode::CAST_ROUND ||
75- roundMode == RoundMode::CAST_EVEN || roundMode == RoundMode::CAST_ZERO ||84+ roundMode == RoundMode::CAST_TRUNC || roundMode == RoundMode::CAST_ODD ||
76- roundMode == RoundMode::CAST_NONE,85+ roundMode == RoundMode::CAST_EVEN || roundMode == RoundMode::CAST_ZERO ||
77- "Cast: An invalid RoundMode!");86+ roundMode == RoundMode::CAST_NONE,
87+ "Cast: An invalid RoundMode!");
78 }88 }
79 return CastImpl<T, U, roundMode, satMode>(x);89 return CastImpl<T, U, roundMode, satMode>(x);
80}90}
@@ -83,38 +93,43 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Cast(U x)
83template <typename T>93template <typename T>
84__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Round(T x)94__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Round(T x)
85{95{
86- static_assert(SupportTypeSimtInternel<T, float, half, bfloat16_t>, "Input type only supports float, half, bfloat16.");96+ static_assert(
97+ SupportTypeSimtInternel<T, float, half, bfloat16_t>, "Input type only supports float, half, bfloat16.");
87 return RoundImpl(x);98 return RoundImpl(x);
88}99}
89 100 
90template <typename T>101template <typename T>
91__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Rint(T x)102__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Rint(T x)
92{103{
93- static_assert(SupportTypeSimtInternel<T, float, half, bfloat16_t>, "Input type only supports float, half, bfloat16.");104+ static_assert(
105+ SupportTypeSimtInternel<T, float, half, bfloat16_t>, "Input type only supports float, half, bfloat16.");
94 return RintImpl(x);106 return RintImpl(x);
95}107}
96 108 
97template <typename T>109template <typename T>
98__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Floor(T x)110__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Floor(T x)
99{111{
100- static_assert(SupportTypeSimtInternel<T, float, half, bfloat16_t>, "Input type only supports float, half, bfloat16.");112+ static_assert(
113+ SupportTypeSimtInternel<T, float, half, bfloat16_t>, "Input type only supports float, half, bfloat16.");
101 return FloorImpl(x);114 return FloorImpl(x);
102}115}
103 116 
104template <typename T>117template <typename T>
105__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Ceil(T x)118__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Ceil(T x)
106{119{
107- static_assert(SupportTypeSimtInternel<T, float, half, bfloat16_t>, "Input type only supports float, half, bfloat16.");120+ static_assert(
121+ SupportTypeSimtInternel<T, float, half, bfloat16_t>, "Input type only supports float, half, bfloat16.");
108 return CeilImpl(x);122 return CeilImpl(x);
109}123}
110 124 
111template <typename T>125template <typename T>
112__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Trunc(T x)126__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Trunc(T x)
113{127{
114- static_assert(SupportTypeSimtInternel<T, float, half, bfloat16_t>, "Input type only supports float, half, bfloat16.");128+ static_assert(
129+ SupportTypeSimtInternel<T, float, half, bfloat16_t>, "Input type only supports float, half, bfloat16.");
115 return TruncImpl(x);130 return TruncImpl(x);
116}131}
117 132 
118-} // namespace Simt133+} // namespace Simt
119-} // namespace AscendC134+} // namespace AscendC
120-#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_CAST_INTERFACE_IMPL_H135+#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_CAST_INTERFACE_IMPL_H
Mimpl/simt_api/cpp/kernel_simt_cmp_intf_impl.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_CMP_INTERFACE_IMPL_H11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_CMP_INTERFACE_IMPL_H
12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_CMP_INTERFACE_IMPL_H12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_CMP_INTERFACE_IMPL_H
@@ -36,6 +36,6 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsInf(T x)
36 return IsInfImpl(x);36 return IsInfImpl(x);
37}37}
38 38 
39-} // namespace Simt39+} // namespace Simt
40-} // namespace AscendC40+} // namespace AscendC
41-#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_CMP_INTERFACE_IMPL_H41+#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_CMP_INTERFACE_IMPL_H
Mimpl/simt_api/cpp/kernel_simt_common_intf_impl.h+14-23
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/* !11/* !
12 * \file kernel_simt_common_intf_impl.h12 * \file kernel_simt_common_intf_impl.h
@@ -20,10 +20,7 @@
20namespace AscendC {20namespace AscendC {
21namespace Simt {21namespace Simt {
22 22 
23-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t GetWarpSize()23+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t GetWarpSize() { return GetWarpSizeImpl(); }
24-{
25- return GetWarpSizeImpl();
26-}
27 24 
28template <int32_t dim>25template <int32_t dim>
29__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetThreadNum()26__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetThreadNum()
@@ -37,16 +34,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetThreadIdx()
37 return GetThreadIdxImpl<dim>();34 return GetThreadIdxImpl<dim>();
38}35}
39 36 
40-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBlockIdx()37+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBlockIdx() { return GetBlockIdxImpl(); }
41-{
42- return GetBlockIdxImpl();
43-}
44 38 
45-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBlockNum()39+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBlockNum() { return GetBlockNumImpl(); }
46-{40+} // namespace Simt
47- return GetBlockNumImpl();41+} // namespace AscendC
48-}
49-} // namespace Simt
50-} // namespace AscendC
51 42 
52-#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_COMMON_INTERFACE_IMPL_H43+#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_COMMON_INTERFACE_IMPL_H
Mimpl/simt_api/cpp/kernel_simt_math_intf_impl.h+25-18
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_MATH_INTERFACE_IMPL_H11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_MATH_INTERFACE_IMPL_H
12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_MATH_INTERFACE_IMPL_H12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_MATH_INTERFACE_IMPL_H
@@ -18,7 +18,9 @@ namespace Simt {
18template <typename T>18template <typename T>
19__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Abs(T x)19__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Abs(T x)
20{20{
21- static_assert(SupportTypeSimtInternel<T, int32_t, int64_t, half, float>, "Input type only supports int32_t, int64_t, half, float.");21+ static_assert(
22+ SupportTypeSimtInternel<T, int32_t, int64_t, half, float>,
23+ "Input type only supports int32_t, int64_t, half, float.");
22 return AbsImpl(x);24 return AbsImpl(x);
23}25}
24 26 
@@ -40,8 +42,10 @@ template <typename T>
40__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Max(T x, T y)42__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Max(T x, T y)
41{43{
42 static_assert(44 static_assert(
43- SupportTypeSimtInternel<T, int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t, half, float>,45+ SupportTypeSimtInternel<
44- "Input type only supports int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t, half, float.");46+ T, int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t, half, float>,
47+ "Input type only supports int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t, half, "
48+ "float.");
45 return MaxImpl(x, y);49 return MaxImpl(x, y);
46}50}
47 51 
@@ -49,8 +53,10 @@ template <typename T>
49__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Min(T x, T y)53__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Min(T x, T y)
50{54{
51 static_assert(55 static_assert(
52- SupportTypeSimtInternel<T, int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t, half, float>,56+ SupportTypeSimtInternel<
53- "Input type only supports int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t, half, float.");57+ T, int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t, half, float>,
58+ "Input type only supports int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t, half, "
59+ "float.");
54 return MinImpl(x, y);60 return MinImpl(x, y);
55}61}
56 62 
@@ -62,7 +68,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Fdim(T x, T y)
62}68}
63 69 
64template <typename T, typename U>70template <typename T, typename U>
65-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T RemQuo(T x, T y, U *quo)71+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T RemQuo(T x, T y, U* quo)
66{72{
67 static_assert(SupportTypeSimtInternel<T, float>, "Input type T only supports float.");73 static_assert(SupportTypeSimtInternel<T, float>, "Input type T only supports float.");
68 static_assert(SupportTypeSimtInternel<U, int32_t>, "Input type U only supports int32_t.");74 static_assert(SupportTypeSimtInternel<U, int32_t>, "Input type U only supports int32_t.");
@@ -123,7 +129,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Brev(T x)
123template <typename T>129template <typename T>
124__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t Clz(T x)130__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t Clz(T x)
125{131{
126- static_assert(SupportTypeSimtInternel<T, int32_t, int64_t, uint32_t, uint64_t>,132+ static_assert(
133+ SupportTypeSimtInternel<T, int32_t, int64_t, uint32_t, uint64_t>,
127 "Input type of Clz function only supports int32_t, uint32_t, int64_t, uint64_t.");134 "Input type of Clz function only supports int32_t, uint32_t, int64_t, uint64_t.");
128 return ClzImpl(x);135 return ClzImpl(x);
129}136}
@@ -156,6 +163,6 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T MulHi(T x, T y)
156 static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t>, "Input type T only supports int32_t, uint32_t.");163 static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t>, "Input type T only supports int32_t, uint32_t.");
157 return MulHiImpl(x, y);164 return MulHiImpl(x, y);
158}165}
159-} // namespace Simt166+} // namespace Simt
160-} // namespace AscendC167+} // namespace AscendC
161-#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_MATH_INTERFACE_IMPL_H168+#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_MATH_INTERFACE_IMPL_H
Mimpl/simt_api/cpp/kernel_simt_print_intf_impl.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_PRINT_INTERFACE_IMPL_H11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_PRINT_INTERFACE_IMPL_H
12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_PRINT_INTERFACE_IMPL_H12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_PRINT_INTERFACE_IMPL_H
@@ -57,7 +57,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void PRINTF(const __gm__ char* fmt, Args&&
57 57 
58#endif58#endif
59 59 
60-} // namespace Simt60+} // namespace Simt
61-} // namespace AscendC61+} // namespace AscendC
62 62 
63-#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_PRINT_INTERFACE_IMPL_H63+#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_PRINT_INTERFACE_IMPL_H
Mimpl/simt_api/cpp/kernel_simt_transcendental_intf_impl.h+23-21
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_TRANSCENDENTAL_INTERFACE_IMPL_H11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_TRANSCENDENTAL_INTERFACE_IMPL_H
12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_TRANSCENDENTAL_INTERFACE_IMPL_H12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_TRANSCENDENTAL_INTERFACE_IMPL_H
@@ -129,14 +129,14 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Asinh(T x)
129}129}
130 130 
131template <typename T>131template <typename T>
132-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Sincos(T x, T &s, T &c)132+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Sincos(T x, T& s, T& c)
133{133{
134 static_assert(SupportTypeSimtInternel<T, float>, "Input type of input only supports float.");134 static_assert(SupportTypeSimtInternel<T, float>, "Input type of input only supports float.");
135 SinCosImpl(x, s, c);135 SinCosImpl(x, s, c);
136}136}
137 137 
138template <typename T>138template <typename T>
139-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Sincospi(T x, T &s, T &c)139+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Sincospi(T x, T& s, T& c)
140{140{
141 static_assert(SupportTypeSimtInternel<T, float>, "Input type of input only supports float.");141 static_assert(SupportTypeSimtInternel<T, float>, "Input type of input only supports float.");
142 SinCospiImpl(x, s, c);142 SinCospiImpl(x, s, c);
@@ -185,7 +185,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Rsqrt(T x)
185}185}
186 186 
187template <typename T, typename U>187template <typename T, typename U>
188-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Frexp(T x, U &exp)188+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Frexp(T x, U& exp)
189{189{
190 static_assert(SupportTypeSimtInternel<T, float>, "Input type of input(x) only supports float.");190 static_assert(SupportTypeSimtInternel<T, float>, "Input type of input(x) only supports float.");
191 static_assert(SupportTypeSimtInternel<U, int>, "Input type of input(exp) only supports int.");191 static_assert(SupportTypeSimtInternel<U, int>, "Input type of input(exp) only supports int.");
@@ -246,7 +246,8 @@ template <typename T, typename U>
246__SIMT_DEVICE_FUNCTIONS_DECL__ inline U Norm(T n, U* a)246__SIMT_DEVICE_FUNCTIONS_DECL__ inline U Norm(T n, U* a)
247{247{
248 static_assert(SupportTypeSimtInternel<T, int>, "Input(n) type only supports int.");248 static_assert(SupportTypeSimtInternel<T, int>, "Input(n) type only supports int.");
249- static_assert(SupportTypeSimtInternel<U *, float *, __ubuf__ float *, __gm__ float *>,249+ static_assert(
250+ SupportTypeSimtInternel<U*, float*, __ubuf__ float*, __gm__ float*>,
250 "Input(a) type only supports float*, gm float*, ubuf float*.");251 "Input(a) type only supports float*, gm float*, ubuf float*.");
251 return NormImpl(n, a);252 return NormImpl(n, a);
252}253}
@@ -255,7 +256,8 @@ template <typename T, typename U>
255__SIMT_DEVICE_FUNCTIONS_DECL__ inline U Rnorm(T n, U* a)256__SIMT_DEVICE_FUNCTIONS_DECL__ inline U Rnorm(T n, U* a)
256{257{
257 static_assert(SupportTypeSimtInternel<T, int>, "Input(n) type only supports int.");258 static_assert(SupportTypeSimtInternel<T, int>, "Input(n) type only supports int.");
258- static_assert(SupportTypeSimtInternel<U *, float *, __ubuf__ float *, __gm__ float *>,259+ static_assert(
260+ SupportTypeSimtInternel<U*, float*, __ubuf__ float*, __gm__ float*>,
259 "Input(a) type only supports float*, gm float*, ubuf float*.");261 "Input(a) type only supports float*, gm float*, ubuf float*.");
260 return RnormImpl(n, a);262 return RnormImpl(n, a);
261}263}
@@ -358,41 +360,41 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Erfcx(T x)
358 return ErfcxImpl(x);360 return ErfcxImpl(x);
359}361}
360 362 
361-template<typename T>363+template <typename T>
362__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Tgamma(T x)364__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Tgamma(T x)
363{365{
364 static_assert(SupportTypeSimtInternel<T, float>, "Input type only supports float.");366 static_assert(SupportTypeSimtInternel<T, float>, "Input type only supports float.");
365 return TgammaImpl(x);367 return TgammaImpl(x);
366}368}
367 369 
368-template<typename T>370+template <typename T>
369__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Lgamma(T x)371__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Lgamma(T x)
370{372{
371 static_assert(SupportTypeSimtInternel<T, float>, "Input type only supports float.");373 static_assert(SupportTypeSimtInternel<T, float>, "Input type only supports float.");
372 return LgammaImpl(x);374 return LgammaImpl(x);
373}375}
374 376 
375-template<typename T>377+template <typename T>
376__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI0(T x)378__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI0(T x)
377{379{
378 static_assert(SupportTypeSimtInternel<T, float>, "Input type only supports float.");380 static_assert(SupportTypeSimtInternel<T, float>, "Input type only supports float.");
379 return CylBesselI0Impl(x);381 return CylBesselI0Impl(x);
380}382}
381 383 
382-template<typename T>384+template <typename T>
383__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI1(T x)385__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI1(T x)
384{386{
385 static_assert(SupportTypeSimtInternel<T, float>, "Input type only supports float.");387 static_assert(SupportTypeSimtInternel<T, float>, "Input type only supports float.");
386 return CylBesselI1Impl(x);388 return CylBesselI1Impl(x);
387}389}
388 390 
389-template<typename T>391+template <typename T>
390__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Normcdf(T x)392__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Normcdf(T x)
391{393{
392 static_assert(SupportTypeSimtInternel<T, float>, "Input type only supports float.");394 static_assert(SupportTypeSimtInternel<T, float>, "Input type only supports float.");
393 return NormcdfImpl(x);395 return NormcdfImpl(x);
394}396}
395 397 
396-} // namespace Simt398+} // namespace Simt
397-} // namespace AscendC399+} // namespace AscendC
398-#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_TRANSCENDENTAL_INTERFACE_IMPL_H400+#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_TRANSCENDENTAL_INTERFACE_IMPL_H
Mimpl/simt_api/cpp/kernel_simt_warp_level_intf_impl.h+32-46
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_WARP_LEVEL_INTERFACE_IMPL_H11#ifndef IMPL_SIMT_API_CPP_KERNEL_SIMT_WARP_LEVEL_INTERFACE_IMPL_H
12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_WARP_LEVEL_INTERFACE_IMPL_H12#define IMPL_SIMT_API_CPP_KERNEL_SIMT_WARP_LEVEL_INTERFACE_IMPL_H
@@ -15,35 +15,21 @@
15 15 
16namespace AscendC {16namespace AscendC {
17namespace Simt {17namespace Simt {
18-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t WarpAllSync(int32_t predicate)18+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t WarpAllSync(int32_t predicate) { return AllSyncImpl(predicate); }
19-{
20- return AllSyncImpl(predicate);
21-}
22 19 
23-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t WarpAnySync(int32_t predicate)20+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t WarpAnySync(int32_t predicate) { return AnySyncImpl(predicate); }
24-{
25- return AnySyncImpl(predicate);
26-}
27 21 
28-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t Uni(int32_t predicate)22+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t Uni(int32_t predicate) { return UniImpl(predicate); }
29-{
30- return UniImpl(predicate);
31-}
32 23 
33-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t WarpBallotSync(int32_t predicate)24+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t WarpBallotSync(int32_t predicate) { return BallotSyncImpl(predicate); }
34-{
35- return BallotSyncImpl(predicate);
36-}
37 25 
38-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t WarpActiveMask()26+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t WarpActiveMask() { return ActiveMaskImpl(); }
39-{
40- return ActiveMaskImpl();
41-}
42 27 
43template <typename T>28template <typename T>
44__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflSync(T var, int32_t srcLane, int32_t width)29__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflSync(T var, int32_t srcLane, int32_t width)
45{30{
46- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,31+ static_assert(
32+ SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,
47 "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");33 "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");
48 return ShflSyncImpl(var, srcLane, width);34 return ShflSyncImpl(var, srcLane, width);
49}35}
@@ -51,7 +37,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflSync(T var, int32_t srcLane, int
51template <typename T>37template <typename T>
52__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflUpSync(T var, uint32_t delta, int32_t width)38__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflUpSync(T var, uint32_t delta, int32_t width)
53{39{
54- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,40+ static_assert(
41+ SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,
55 "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");42 "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");
56 return ShflUpSyncImpl(var, delta, width);43 return ShflUpSyncImpl(var, delta, width);
57}44}
@@ -59,7 +46,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflUpSync(T var, uint32_t delta, in
59template <typename T>46template <typename T>
60__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflDownSync(T var, uint32_t delta, int32_t width)47__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflDownSync(T var, uint32_t delta, int32_t width)
61{48{
62- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,49+ static_assert(
50+ SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,
63 "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");51 "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");
64 return ShflDownSyncImpl(var, delta, width);52 return ShflDownSyncImpl(var, delta, width);
65}53}
@@ -67,7 +55,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflDownSync(T var, uint32_t delta,
67template <typename T>55template <typename T>
68__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflXorSync(T var, int32_t laneMask, int32_t width)56__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflXorSync(T var, int32_t laneMask, int32_t width)
69{57{
70- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,58+ static_assert(
59+ SupportTypeSimtInternel<T, int32_t, uint32_t, int64_t, uint64_t, half, half2, float>,
71 "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");60 "Input type of var only supports int32_t, uint32_t, int64_t, uint64_t, half, half2, float.");
72 return ShflXorSyncImpl(var, laneMask, width);61 return ShflXorSyncImpl(var, laneMask, width);
73}62}
@@ -75,7 +64,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpShflXorSync(T var, int32_t laneMask,
75template <typename T>64template <typename T>
76__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpReduceAddSync(T val)65__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpReduceAddSync(T val)
77{66{
78- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,67+ static_assert(
68+ SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,
79 "Input type of val only supports int32_t, uint32_t, half, float.");69 "Input type of val only supports int32_t, uint32_t, half, float.");
80 return ReduceAddSyncImpl(val);70 return ReduceAddSyncImpl(val);
81}71}
@@ -83,7 +73,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpReduceAddSync(T val)
83template <typename T>73template <typename T>
84__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpReduceMaxSync(T val)74__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpReduceMaxSync(T val)
85{75{
86- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,76+ static_assert(
77+ SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,
87 "Input type of val only supports int32_t, uint32_t, half, float.");78 "Input type of val only supports int32_t, uint32_t, half, float.");
88 return ReduceMaxSyncImpl(val);79 return ReduceMaxSyncImpl(val);
89}80}
@@ -91,20 +82,15 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpReduceMaxSync(T val)
91template <typename T>82template <typename T>
92__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpReduceMinSync(T val)83__SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpReduceMinSync(T val)
93{84{
94- static_assert(SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,85+ static_assert(
86+ SupportTypeSimtInternel<T, int32_t, uint32_t, half, float>,
95 "Input type of val only supports int32_t, uint32_t, half, float.");87 "Input type of val only supports int32_t, uint32_t, half, float.");
96 return ReduceMinSyncImpl(val);88 return ReduceMinSyncImpl(val);
97}89}
98 90 
99-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void ThreadBarrier()91+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void ThreadBarrier() { ThreadBarrierImpl(); }
100-{
101- ThreadBarrierImpl();
102-}
103 92 
104-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void ThreadFence()93+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void ThreadFence() { ThreadFenceImpl(); }
105-{94+} // namespace Simt
106- ThreadFenceImpl();95+} // namespace AscendC
107-}96+#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_WARP_LEVEL_INTERFACE_IMPL_H
108-} // namespace Simt
109-} // namespace AscendC
110-#endif // IMPL_SIMT_API_CPP_KERNEL_SIMT_WARP_LEVEL_INTERFACE_IMPL_H
Mimpl/simt_api/math_functions_impl.h+488-615文件内容审核中，请稍后刷新重试