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refactor:重构include下除basic_api的代码 #4277
maohp_hw创建于 7月11日
refactor:重构include下除basic_api的代码 #4277
已合并
maohp_hw创建于 7月11日
从haipingmao/asc-devkitbr_codestyle_include合入到cann/asc-devkitmaster
共 59 个文件变更+6599-5224
M.pre-commit-config.yaml+1-1
@@ -30,7 +30,7 @@ repos:
30 - id: clang-format30 - id: clang-format
31 types_or: [file]31 types_or: [file]
32 files: \.(c|h|cpp|hpp|cc|hh|cxx|hxx|asc)$32 files: \.(c|h|cpp|hpp|cc|hh|cxx|hxx|asc)$
33- exclude: ^(tests/python/aclrt_launch_kernel/stub_files/|include/(?!adv_api/))33+ exclude: ^(tests/python/aclrt_launch_kernel/stub_files/|include/basic_api/|include/utils/)
34 args:34 args:
35 - "--style=file"35 - "--style=file"
36 - "--verbose"36 - "--verbose"
Minclude/aicpu_api/aicpu_api.h+17-19
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/*!11/*!
12 * \file aicpu_api.h12 * \file aicpu_api.h
@@ -25,17 +25,15 @@
25#undef assert25#undef assert
26#endif26#endif
27 27 
28-#define assert(conditon) \28+#define assert(conditon) \
29- do { \29+ do { \
30- if (!(conditon)) { \30+ if (!(conditon)) { \
31- AscendC::printf("[ASSERT]` " #conditon " ' at %s:%d\n", __FILE__, __LINE__);\31+ AscendC::printf("[ASSERT]` " #conditon " ' at %s:%d\n", __FILE__, __LINE__); \
32- abort(); \32+ abort(); \
33- }\33+ } \
34 } while (0)34 } while (0)
35 35 
36namespace AscendC {36namespace AscendC {
37-void printf(const char *fmt, ...);37+void printf(const char* fmt, ...);
38-static inline void DataStoreBarrier(void) {38+static inline void DataStoreBarrier(void) { asm volatile("dsb st" ::: "memory"); }
39- asm volatile("dsb st" ::: "memory");39+} // namespace AscendC
40-}
41-}
Minclude/c_api/asc_simd.h+8-8
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "asc_simd.h cannot be used with compile flag --enable-simt enabled."12#error "asc_simd.h cannot be used with compile flag --enable-simt enabled."
Minclude/c_api/atomic/atomic.h+4-4
@@ -81,12 +81,12 @@ __aicore__ inline void asc_set_atomic_add_float16();
81__aicore__ inline void asc_set_atomic_max_float();81__aicore__ inline void asc_set_atomic_max_float();
82 82 
83[[deprecated("NOTICE: asc_get_store_atomic_config is deprecated on Ascend 950PR/Ascend 950DT."83[[deprecated("NOTICE: asc_get_store_atomic_config is deprecated on Ascend 950PR/Ascend 950DT."
84- "Please use asc_atomic_add instead for atomic add operation.")]]84+ "Please use asc_atomic_add instead for atomic add operation.")]] __aicore__ inline void
85-__aicore__ inline void asc_get_store_atomic_config(asc_store_atomic_config& config);85+asc_get_store_atomic_config(asc_store_atomic_config& config);
86 86 
87[[deprecated("NOTICE: asc_set_store_atomic_config_v2 is deprecated."87[[deprecated("NOTICE: asc_set_store_atomic_config_v2 is deprecated."
88- "Please use asc_atomic_add instead for atomic add operation.")]]88+ "Please use asc_atomic_add instead for atomic add operation.")]] __aicore__ inline void
89-__aicore__ inline void asc_set_store_atomic_config_v2(uint16_t type, uint16_t op);89+asc_set_store_atomic_config_v2(uint16_t type, uint16_t op);
90 90 
91__aicore__ inline void asc_set_atomic_max_int();91__aicore__ inline void asc_set_atomic_max_int();
92 92 
Minclude/c_api/cache_ctrl/cache_ctrl.h+8-8
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "cache_ctrl.h cannot be used with compile flag --enable-simt enabled."12#error "cache_ctrl.h cannot be used with compile flag --enable-simt enabled."
Minclude/c_api/cube_compute/cube_compute.h+218-173
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "cube_compute.h cannot be used with compile flag --enable-simt enabled."12#error "cube_compute.h cannot be used with compile flag --enable-simt enabled."
@@ -34,85 +34,106 @@ __aicore__ inline void asc_set_l0c2gm_config(uint64_t relu_pre, uint64_t quant_p
34 34 
35#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)35#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
36 36 
37-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix,37+__aicore__ inline void asc_mmad(
38- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align,38+ __cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix, uint16_t left_height,
39- bool c_matrix_source, bool c_matrix_init_val);39+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source,
40- 
41-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix,
42- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source,
43 bool c_matrix_init_val);40 bool c_matrix_init_val);
44 41 
45-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix,42+__aicore__ inline void asc_mmad_sync(
46- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag,43+ __cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix, uint16_t left_height,
44+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source,
45+ bool c_matrix_init_val);
46+ 
47+__aicore__ inline void asc_mmad(
48+ __cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix, uint16_t left_height,
49+ uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag,
47 bool k_direction_align, bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);50 bool k_direction_align, bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
48 51 
49-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix,52+__aicore__ inline void asc_mmad_sync(
50- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag,53+ __cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix, uint16_t left_height,
54+ uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag,
51 bool k_direction_align, bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);55 bool k_direction_align, bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
52 56 
53-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height,57+__aicore__ inline void asc_mmad(
54- uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);58+ __cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height, uint16_t n_dim,
59+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
55 60 
56-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height,61+__aicore__ inline void asc_mmad_sync(
57- uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);62+ __cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height, uint16_t n_dim,
63+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
58 64 
59-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height,65+__aicore__ inline void asc_mmad(
60- uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,66+ __cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height, uint16_t n_dim,
67+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
61 bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);68 bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
62 69 
63-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height,70+__aicore__ inline void asc_mmad_sync(
64- uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,71+ __cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height, uint16_t n_dim,
72+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
65 bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);73 bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
66 74 
67-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height,75+__aicore__ inline void asc_mmad(
68- uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);76+ __cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height, uint16_t n_dim,
77+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
69 78 
70-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height,79+__aicore__ inline void asc_mmad_sync(
71- uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);80+ __cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height, uint16_t n_dim,
81+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
72 82 
73-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height,83+__aicore__ inline void asc_mmad(
74- uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,84+ __cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height, uint16_t n_dim,
85+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
75 bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);86 bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
76 87 
77-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height,88+__aicore__ inline void asc_mmad_sync(
78- uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align, bool is_weight_offset,89+ __cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height, uint16_t n_dim,
90+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
91+ bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
92+ 
93+__aicore__ inline void asc_mmad(
94+ __cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height, uint16_t n_dim,
95+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
96+ 
97+__aicore__ inline void asc_mmad_sync(
98+ __cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height, uint16_t n_dim,
99+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
100+ 
101+__aicore__ inline void asc_mmad(
102+ __cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height, uint16_t n_dim,
103+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
104+ bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
105+ 
106+__aicore__ inline void asc_mmad_sync(
107+ __cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height, uint16_t n_dim,
108+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
109+ bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
110+ 
111+__aicore__ inline void asc_mmad_s4(
112+ __cc__ int32_t* c_matrix, __ca__ int4b_t* a_matrix, __cb__ int4b_t* b_matrix, uint16_t left_height, uint16_t n_dim,
113+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
114+ 
115+__aicore__ inline void asc_mmad_s4_sync(
116+ __cc__ int32_t* c_matrix, __ca__ int4b_t* a_matrix, __cb__ int4b_t* b_matrix, uint16_t left_height, uint16_t n_dim,
117+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
118+ 
119+__aicore__ inline void asc_mmad_s4(
120+ __cc__ int32_t* c_matrix, __ca__ int4b_t* a_matrix, __cb__ int4b_t* b_matrix, uint16_t left_height, uint16_t n_dim,
121+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
122+ bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
123+ 
124+__aicore__ inline void asc_mmad_s4_sync(
125+ __cc__ int32_t* c_matrix, __ca__ int4b_t* a_matrix, __cb__ int4b_t* b_matrix, uint16_t left_height, uint16_t n_dim,
126+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
127+ bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
128+ 
129+__aicore__ inline void asc_mmad_sparse(
130+ __cc__ int32_t* c, __ca__ int8_t* a, __cb__ int8_t* b, uint16_t m, uint16_t k, uint16_t n, uint8_t unit_flag,
79 bool c_matrix_source, bool c_matrix_init_val);131 bool c_matrix_source, bool c_matrix_init_val);
80 132 
81-__aicore__ inline void asc_mmad(__cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height,133+__aicore__ inline void asc_mmad_sparse_sync(
82- uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);134+ __cc__ int32_t* c, __ca__ int8_t* a, __cb__ int8_t* b, uint16_t m, uint16_t k, uint16_t n, uint8_t unit_flag,
83- 
84-__aicore__ inline void asc_mmad_sync(__cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height,
85- uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
86- 
87-__aicore__ inline void asc_mmad(__cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height,
88- uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
89- bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
90- 
91-__aicore__ inline void asc_mmad_sync(__cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height,
92- uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
93- bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
94- 
95-__aicore__ inline void asc_mmad_s4(__cc__ int32_t* c_matrix, __ca__ int4b_t* a_matrix, __cb__ int4b_t* b_matrix, uint16_t left_height,
96- uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
97- 
98-__aicore__ inline void asc_mmad_s4_sync(__cc__ int32_t* c_matrix, __ca__ int4b_t* a_matrix, __cb__ int4b_t* b_matrix, uint16_t left_height,
99- uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
100- 
101-__aicore__ inline void asc_mmad_s4(__cc__ int32_t* c_matrix, __ca__ int4b_t* a_matrix, __cb__ int4b_t* b_matrix, uint16_t left_height,
102- uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align, bool is_weight_offset,
103 bool c_matrix_source, bool c_matrix_init_val);135 bool c_matrix_source, bool c_matrix_init_val);
104 136 
105-__aicore__ inline void asc_mmad_s4_sync(__cc__ int32_t* c_matrix, __ca__ int4b_t* a_matrix, __cb__ int4b_t* b_matrix, uint16_t left_height,
106- uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align, bool is_weight_offset,
107- bool c_matrix_source, bool c_matrix_init_val);
108- 
109-__aicore__ inline void asc_mmad_sparse(__cc__ int32_t* c, __ca__ int8_t* a, __cb__ int8_t* b, uint16_t m, uint16_t k,
110- uint16_t n, uint8_t unit_flag, bool c_matrix_source, bool c_matrix_init_val);
111- 
112-__aicore__ inline void asc_mmad_sparse_sync(__cc__ int32_t* c, __ca__ int8_t* a, __cb__ int8_t* b, uint16_t m,
113- uint16_t k, uint16_t n, uint8_t unit_flag, bool c_matrix_source,
114- bool c_matrix_init_val);
115- 
116__aicore__ inline void asc_set_mmad_direction_m();137__aicore__ inline void asc_set_mmad_direction_m();
117 138 
118__aicore__ inline void asc_set_mmad_direction_n();139__aicore__ inline void asc_set_mmad_direction_n();
@@ -134,146 +155,170 @@ __aicore__ inline uint64_t asc_get_l0c2gm_prequant();
134__aicore__ inline void asc_set_l0c2gm_nz2nd(uint64_t nd_num, uint64_t src_nd_stride, uint64_t dst_nd_stride);155__aicore__ inline void asc_set_l0c2gm_nz2nd(uint64_t nd_num, uint64_t src_nd_stride, uint64_t dst_nd_stride);
135 156 
136// ==========mmad_mx(e1m2/e1m2, e4m3/e5m2)==========157// ==========mmad_mx(e1m2/e1m2, e4m3/e5m2)==========
137-__aicore__ inline void asc_mmad_mx(__cc__ float* c_matrix, __ca__ fp4x2_e1m2_t* a_matrix,158+__aicore__ inline void asc_mmad_mx(
138- __cb__ fp4x2_e1m2_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,159+ __cc__ float* c_matrix, __ca__ fp4x2_e1m2_t* a_matrix, __cb__ fp4x2_e1m2_t* b_matrix, uint16_t left_height,
139- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);160+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
161+ bool c_matrix_init_val);
140 162 
141-__aicore__ inline void asc_mmad_mx_sync(__cc__ float* c_matrix, __ca__ fp4x2_e1m2_t* a_matrix,163+__aicore__ inline void asc_mmad_mx_sync(
142- __cb__ fp4x2_e1m2_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,164+ __cc__ float* c_matrix, __ca__ fp4x2_e1m2_t* a_matrix, __cb__ fp4x2_e1m2_t* b_matrix, uint16_t left_height,
143- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);165+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
166+ bool c_matrix_init_val);
144 167 
145-__aicore__ inline void asc_mmad_mx(__cc__ float* c_matrix, __ca__ fp4x2_e1m2_t* a_matrix,168+__aicore__ inline void asc_mmad_mx(
146- __cb__ fp4x2_e2m1_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,169+ __cc__ float* c_matrix, __ca__ fp4x2_e1m2_t* a_matrix, __cb__ fp4x2_e2m1_t* b_matrix, uint16_t left_height,
147- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);170+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
171+ bool c_matrix_init_val);
148 172 
149-__aicore__ inline void asc_mmad_mx_sync(__cc__ float* c_matrix, __ca__ fp4x2_e1m2_t* a_matrix,173+__aicore__ inline void asc_mmad_mx_sync(
150- __cb__ fp4x2_e2m1_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,174+ __cc__ float* c_matrix, __ca__ fp4x2_e1m2_t* a_matrix, __cb__ fp4x2_e2m1_t* b_matrix, uint16_t left_height,
151- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);175+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
176+ bool c_matrix_init_val);
152 177 
153-__aicore__ inline void asc_mmad_mx(__cc__ float* c_matrix, __ca__ fp4x2_e2m1_t* a_matrix,178+__aicore__ inline void asc_mmad_mx(
154- __cb__ fp4x2_e1m2_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,179+ __cc__ float* c_matrix, __ca__ fp4x2_e2m1_t* a_matrix, __cb__ fp4x2_e1m2_t* b_matrix, uint16_t left_height,
155- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);180+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
181+ bool c_matrix_init_val);
156 182 
157-__aicore__ inline void asc_mmad_mx_sync(__cc__ float* c_matrix, __ca__ fp4x2_e2m1_t* a_matrix,183+__aicore__ inline void asc_mmad_mx_sync(
158- __cb__ fp4x2_e1m2_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,184+ __cc__ float* c_matrix, __ca__ fp4x2_e2m1_t* a_matrix, __cb__ fp4x2_e1m2_t* b_matrix, uint16_t left_height,
159- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);185+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
186+ bool c_matrix_init_val);
160 187 
161-__aicore__ inline void asc_mmad_mx(__cc__ float* c_matrix, __ca__ fp4x2_e2m1_t* a_matrix,188+__aicore__ inline void asc_mmad_mx(
162- __cb__ fp4x2_e2m1_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,189+ __cc__ float* c_matrix, __ca__ fp4x2_e2m1_t* a_matrix, __cb__ fp4x2_e2m1_t* b_matrix, uint16_t left_height,
163- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);190+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
191+ bool c_matrix_init_val);
164 192 
165-__aicore__ inline void asc_mmad_mx_sync(__cc__ float* c_matrix, __ca__ fp4x2_e2m1_t* a_matrix,193+__aicore__ inline void asc_mmad_mx_sync(
166- __cb__ fp4x2_e2m1_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,194+ __cc__ float* c_matrix, __ca__ fp4x2_e2m1_t* a_matrix, __cb__ fp4x2_e2m1_t* b_matrix, uint16_t left_height,
167- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);195+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
196+ bool c_matrix_init_val);
168 197 
169-__aicore__ inline void asc_mmad_mx(__cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix,198+__aicore__ inline void asc_mmad_mx(
170- __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,199+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
171- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);200+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
201+ bool c_matrix_init_val);
172 202 
173-__aicore__ inline void asc_mmad_mx_sync(__cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix,203+__aicore__ inline void asc_mmad_mx_sync(
174- __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,204+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
175- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);205+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
206+ bool c_matrix_init_val);
176 207 
177-__aicore__ inline void asc_mmad_mx(__cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix,208+__aicore__ inline void asc_mmad_mx(
178- __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,209+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
179- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);210+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
211+ bool c_matrix_init_val);
180 212 
181-__aicore__ inline void asc_mmad_mx_sync(__cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix,213+__aicore__ inline void asc_mmad_mx_sync(
182- __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,214+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
183- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);215+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
216+ bool c_matrix_init_val);
184 217 
185-__aicore__ inline void asc_mmad_mx(__cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix,218+__aicore__ inline void asc_mmad_mx(
186- __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,219+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
187- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);220+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
221+ bool c_matrix_init_val);
188 222 
189-__aicore__ inline void asc_mmad_mx_sync(__cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix,223+__aicore__ inline void asc_mmad_mx_sync(
190- __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,224+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
191- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);225+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
226+ bool c_matrix_init_val);
192 227 
193-__aicore__ inline void asc_mmad_mx(__cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix,228+__aicore__ inline void asc_mmad_mx(
194- __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,229+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
195- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);230+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
231+ bool c_matrix_init_val);
196 232 
197-__aicore__ inline void asc_mmad_mx_sync(__cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix,233+__aicore__ inline void asc_mmad_mx_sync(
198- __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height, uint16_t n_dim, uint16_t right_width,234+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
199- uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);235+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
236+ bool c_matrix_init_val);
200 237 
201// ==========mmad==========238// ==========mmad==========
202-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix,239+__aicore__ inline void asc_mmad(
203- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,240+ __cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix, uint16_t left_height,
204- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);241+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
242+ bool c_matrix_init_val);
205 243 
206-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix,244+__aicore__ inline void asc_mmad_sync(
207- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,245+ __cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix, uint16_t left_height,
208- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);246+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
247+ bool c_matrix_init_val);
209 248 
210-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix,249+__aicore__ inline void asc_mmad(
211- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,250+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
212- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);251+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
252+ bool c_matrix_init_val);
213 253 
214-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix,254+__aicore__ inline void asc_mmad_sync(
215- __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height, uint16_t n_dim,255+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
216- uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,256+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
217- bool c_matrix_init_val);257+ bool c_matrix_init_val);
218 258 
219-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix,259+__aicore__ inline void asc_mmad(
220- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,260+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
221- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);261+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
262+ bool c_matrix_init_val);
222 263 
223-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix,264+__aicore__ inline void asc_mmad_sync(
224- __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height, uint16_t n_dim,265+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
225- uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,266+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
226- bool c_matrix_init_val);267+ bool c_matrix_init_val);
227 268 
228-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix,269+__aicore__ inline void asc_mmad(
229- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,270+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
230- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);271+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
272+ bool c_matrix_init_val);
231 273 
232-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix,274+__aicore__ inline void asc_mmad_sync(
233- __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height, uint16_t n_dim,275+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
234- uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,276+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
235- bool c_matrix_init_val);277+ bool c_matrix_init_val);
236 278 
237-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix,279+__aicore__ inline void asc_mmad(
238- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,280+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
239- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);281+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
282+ bool c_matrix_init_val);
240 283 
241-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix,284+__aicore__ inline void asc_mmad_sync(
242- __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height, uint16_t n_dim,285+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
243- uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,286+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
244- bool c_matrix_init_val);287+ bool c_matrix_init_val);
245 288 
246-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix,289+__aicore__ inline void asc_mmad(
247- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,290+ __cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height, uint16_t n_dim,
248- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);291+ uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);
249 292 
250-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix,293+__aicore__ inline void asc_mmad_sync(
251- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,294+ __cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height, uint16_t n_dim,
252- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);295+ uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);
253 296 
254-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix,297+__aicore__ inline void asc_mmad(
255- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,298+ __cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height, uint16_t n_dim,
256- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);299+ uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);
257 300 
258-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix,301+__aicore__ inline void asc_mmad_sync(
259- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,302+ __cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height, uint16_t n_dim,
260- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);303+ uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);
261 304 
262-__aicore__ inline void asc_mmad(__cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix,305+__aicore__ inline void asc_mmad(
263- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,306+ __cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height, uint16_t n_dim,
264- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);307+ uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);
265 308 
266-__aicore__ inline void asc_mmad_sync(__cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix,309+__aicore__ inline void asc_mmad_sync(
267- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,310+ __cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height, uint16_t n_dim,
268- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);311+ uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);
269 312 
270-__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ hifloat8_t* a_matrix, __cb__ hifloat8_t* b_matrix,313+__aicore__ inline void asc_mmad(
271- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,314+ __cc__ float* c_matrix, __ca__ hifloat8_t* a_matrix, __cb__ hifloat8_t* b_matrix, uint16_t left_height,
272- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);315+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
316+ bool c_matrix_init_val);
273 317 
274-__aicore__ inline void asc_mmad_sync(__cc__ float* c_matrix, __ca__ hifloat8_t* a_matrix, __cb__ hifloat8_t* b_matrix,318+__aicore__ inline void asc_mmad_sync(
275- uint16_t left_height, uint16_t n_dim, uint16_t right_width, uint8_t unit_flag,319+ __cc__ float* c_matrix, __ca__ hifloat8_t* a_matrix, __cb__ hifloat8_t* b_matrix, uint16_t left_height,
276- bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);320+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
321+ bool c_matrix_init_val);
277 322 
278__aicore__ inline void asc_enable_hf32_trans(uint32_t mode);323__aicore__ inline void asc_enable_hf32_trans(uint32_t mode);
279 324 
Minclude/c_api/cube_datamove/cube_datamove.h+2177-1676
Minclude/c_api/misc/misc.h+8-8
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "misc.h cannot be used with compile flag --enable-simt enabled."12#error "misc.h cannot be used with compile flag --enable-simt enabled."
Minclude/c_api/reg_compute/reg_convert.h+68-38
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "reg_convert.h cannot be used with compile flag --enable-simt enabled."12#error "reg_convert.h cannot be used with compile flag --enable-simt enabled."
@@ -787,43 +787,58 @@ __simd_callee__ inline void asc_float2int16_rz_sat_v2(vector_int16_t& dst, vecto
787// ==========asc_bfloat162e2m1x2_rd/rn/rna/ru/rz)==========787// ==========asc_bfloat162e2m1x2_rd/rn/rna/ru/rz)==========
788__simd_callee__ inline void asc_bfloat162e2m1x2_rd(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);788__simd_callee__ inline void asc_bfloat162e2m1x2_rd(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
789 789 
790-__simd_callee__ inline void asc_bfloat162e2m1x2_rd_v2(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);790+__simd_callee__ inline void asc_bfloat162e2m1x2_rd_v2(
791+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
791 792 
792-__simd_callee__ inline void asc_bfloat162e2m1x2_rd_v3(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);793+__simd_callee__ inline void asc_bfloat162e2m1x2_rd_v3(
794+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
793 795 
794-__simd_callee__ inline void asc_bfloat162e2m1x2_rd_v4(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);796+__simd_callee__ inline void asc_bfloat162e2m1x2_rd_v4(
797+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
795 798 
796__simd_callee__ inline void asc_bfloat162e2m1x2_rn(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);799__simd_callee__ inline void asc_bfloat162e2m1x2_rn(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
797 800 
798-__simd_callee__ inline void asc_bfloat162e2m1x2_rn_v2(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);801+__simd_callee__ inline void asc_bfloat162e2m1x2_rn_v2(
802+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
799 803 
800-__simd_callee__ inline void asc_bfloat162e2m1x2_rn_v3(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);804+__simd_callee__ inline void asc_bfloat162e2m1x2_rn_v3(
805+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
801 806 
802-__simd_callee__ inline void asc_bfloat162e2m1x2_rn_v4(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);807+__simd_callee__ inline void asc_bfloat162e2m1x2_rn_v4(
808+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
803 809 
804__simd_callee__ inline void asc_bfloat162e2m1x2_rna(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);810__simd_callee__ inline void asc_bfloat162e2m1x2_rna(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
805 811 
806-__simd_callee__ inline void asc_bfloat162e2m1x2_rna_v2(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);812+__simd_callee__ inline void asc_bfloat162e2m1x2_rna_v2(
813+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
807 814 
808-__simd_callee__ inline void asc_bfloat162e2m1x2_rna_v3(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);815+__simd_callee__ inline void asc_bfloat162e2m1x2_rna_v3(
816+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
809 817 
810-__simd_callee__ inline void asc_bfloat162e2m1x2_rna_v4(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);818+__simd_callee__ inline void asc_bfloat162e2m1x2_rna_v4(
819+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
811 820 
812__simd_callee__ inline void asc_bfloat162e2m1x2_ru(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);821__simd_callee__ inline void asc_bfloat162e2m1x2_ru(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
813 822 
814-__simd_callee__ inline void asc_bfloat162e2m1x2_ru_v2(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);823+__simd_callee__ inline void asc_bfloat162e2m1x2_ru_v2(
824+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
815 825 
816-__simd_callee__ inline void asc_bfloat162e2m1x2_ru_v3(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);826+__simd_callee__ inline void asc_bfloat162e2m1x2_ru_v3(
827+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
817 828 
818-__simd_callee__ inline void asc_bfloat162e2m1x2_ru_v4(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);829+__simd_callee__ inline void asc_bfloat162e2m1x2_ru_v4(
830+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
819 831 
820__simd_callee__ inline void asc_bfloat162e2m1x2_rz(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);832__simd_callee__ inline void asc_bfloat162e2m1x2_rz(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
821 833 
822-__simd_callee__ inline void asc_bfloat162e2m1x2_rz_v2(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);834+__simd_callee__ inline void asc_bfloat162e2m1x2_rz_v2(
835+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
823 836 
824-__simd_callee__ inline void asc_bfloat162e2m1x2_rz_v3(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);837+__simd_callee__ inline void asc_bfloat162e2m1x2_rz_v3(
838+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
825 839 
826-__simd_callee__ inline void asc_bfloat162e2m1x2_rz_v4(vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);840+__simd_callee__ inline void asc_bfloat162e2m1x2_rz_v4(
841+ vector_fp4x2_e2m1_t& dst, vector_bfloat16_t src, vector_bool mask);
827 842 
828// ==========asc_float2hif8_rh/rna)==========843// ==========asc_float2hif8_rh/rna)==========
829__simd_callee__ inline void asc_float2hif8_rh_sat(vector_hifloat8_t& dst, vector_float src, vector_bool mask);844__simd_callee__ inline void asc_float2hif8_rh_sat(vector_hifloat8_t& dst, vector_float src, vector_bool mask);
@@ -923,43 +938,58 @@ __simd_callee__ inline void asc_e2m1x22bfloat16_v4(vector_bfloat16_t& dst, vecto
923// ==========asc_bfloat162e1m2x2_rd/rn/rna/ru/rz)==========938// ==========asc_bfloat162e1m2x2_rd/rn/rna/ru/rz)==========
924__simd_callee__ inline void asc_bfloat162e1m2x2_rd(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);939__simd_callee__ inline void asc_bfloat162e1m2x2_rd(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
925 940 
926-__simd_callee__ inline void asc_bfloat162e1m2x2_rd_v2(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);941+__simd_callee__ inline void asc_bfloat162e1m2x2_rd_v2(
942+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
927 943 
928-__simd_callee__ inline void asc_bfloat162e1m2x2_rd_v3(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);944+__simd_callee__ inline void asc_bfloat162e1m2x2_rd_v3(
945+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
929 946 
930-__simd_callee__ inline void asc_bfloat162e1m2x2_rd_v4(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);947+__simd_callee__ inline void asc_bfloat162e1m2x2_rd_v4(
948+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
931 949 
932__simd_callee__ inline void asc_bfloat162e1m2x2_rn(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);950__simd_callee__ inline void asc_bfloat162e1m2x2_rn(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
933 951 
934-__simd_callee__ inline void asc_bfloat162e1m2x2_rn_v2(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);952+__simd_callee__ inline void asc_bfloat162e1m2x2_rn_v2(
953+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
935 954 
936-__simd_callee__ inline void asc_bfloat162e1m2x2_rn_v3(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);955+__simd_callee__ inline void asc_bfloat162e1m2x2_rn_v3(
956+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
937 957 
938-__simd_callee__ inline void asc_bfloat162e1m2x2_rn_v4(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);958+__simd_callee__ inline void asc_bfloat162e1m2x2_rn_v4(
959+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
939 960 
940__simd_callee__ inline void asc_bfloat162e1m2x2_rna(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);961__simd_callee__ inline void asc_bfloat162e1m2x2_rna(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
941 962 
942-__simd_callee__ inline void asc_bfloat162e1m2x2_rna_v2(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);963+__simd_callee__ inline void asc_bfloat162e1m2x2_rna_v2(
964+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
943 965 
944-__simd_callee__ inline void asc_bfloat162e1m2x2_rna_v3(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);966+__simd_callee__ inline void asc_bfloat162e1m2x2_rna_v3(
967+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
945 968 
946-__simd_callee__ inline void asc_bfloat162e1m2x2_rna_v4(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);969+__simd_callee__ inline void asc_bfloat162e1m2x2_rna_v4(
970+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
947 971 
948__simd_callee__ inline void asc_bfloat162e1m2x2_ru(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);972__simd_callee__ inline void asc_bfloat162e1m2x2_ru(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
949 973 
950-__simd_callee__ inline void asc_bfloat162e1m2x2_ru_v2(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);974+__simd_callee__ inline void asc_bfloat162e1m2x2_ru_v2(
975+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
951 976 
952-__simd_callee__ inline void asc_bfloat162e1m2x2_ru_v3(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);977+__simd_callee__ inline void asc_bfloat162e1m2x2_ru_v3(
978+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
953 979 
954-__simd_callee__ inline void asc_bfloat162e1m2x2_ru_v4(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);980+__simd_callee__ inline void asc_bfloat162e1m2x2_ru_v4(
981+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
955 982 
956__simd_callee__ inline void asc_bfloat162e1m2x2_rz(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);983__simd_callee__ inline void asc_bfloat162e1m2x2_rz(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
957 984 
958-__simd_callee__ inline void asc_bfloat162e1m2x2_rz_v2(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);985+__simd_callee__ inline void asc_bfloat162e1m2x2_rz_v2(
986+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
959 987 
960-__simd_callee__ inline void asc_bfloat162e1m2x2_rz_v3(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);988+__simd_callee__ inline void asc_bfloat162e1m2x2_rz_v3(
989+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
961 990 
962-__simd_callee__ inline void asc_bfloat162e1m2x2_rz_v4(vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);991+__simd_callee__ inline void asc_bfloat162e1m2x2_rz_v4(
992+ vector_fp4x2_e1m2_t& dst, vector_bfloat16_t src, vector_bool mask);
963 993 
964// ==========asc_e1m2x22bfloat16==========994// ==========asc_e1m2x22bfloat16==========
965__simd_callee__ inline void asc_e1m2x22bfloat16(vector_bfloat16_t& dst, vector_fp4x2_e1m2_t src, vector_bool mask);995__simd_callee__ inline void asc_e1m2x22bfloat16(vector_bfloat16_t& dst, vector_fp4x2_e1m2_t src, vector_bool mask);
Minclude/c_api/reg_compute/reg_load.h+845-679
Minclude/c_api/reg_compute/reg_store.h+734-645
Minclude/c_api/reg_compute/reg_vector.h+251-175
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "reg_vector.h cannot be used with compile flag --enable-simt enabled."12#error "reg_vector.h cannot be used with compile flag --enable-simt enabled."
@@ -23,31 +23,31 @@
23#include "impl/c_api/instr_impl/npu_arch_3510/vector_compute_impl.h"23#include "impl/c_api/instr_impl/npu_arch_3510/vector_compute_impl.h"
24 24 
25/*25/*
26-* asc_create_mask_b8(pat_mode);26+ * asc_create_mask_b8(pat_mode);
27-* asc_create_mask_b16(pat_mode);27+ * asc_create_mask_b16(pat_mode);
28-* asc_create_mask_b32(pat_mode);28+ * asc_create_mask_b32(pat_mode);
29-*29+ *
30-* The parameter pat_mode is defined as follows:30+ * The parameter pat_mode is defined as follows:
31-*31+ *
32-* PAT_ALL, // All elements are set to True32+ * PAT_ALL, // All elements are set to True
33-* PAT_VL1, // The lowest element is set to True33+ * PAT_VL1, // The lowest element is set to True
34-* PAT_VL2, // The lowest 2 elements are set to True34+ * PAT_VL2, // The lowest 2 elements are set to True
35-* PAT_VL3, // The lowest 3 elements are set to True35+ * PAT_VL3, // The lowest 3 elements are set to True
36-* PAT_VL4, // The lowest 4 elements are set to True36+ * PAT_VL4, // The lowest 4 elements are set to True
37-* PAT_VL8, // The lowest 8 elements are set to True37+ * PAT_VL8, // The lowest 8 elements are set to True
38-* PAT_VL16, // The lowest 16 elements are set to True38+ * PAT_VL16, // The lowest 16 elements are set to True
39-* PAT_VL32, // The lowest 32 elements are set to True39+ * PAT_VL32, // The lowest 32 elements are set to True
40-* PAT_VL64, // The lowest 64 elements are set to True40+ * PAT_VL64, // The lowest 64 elements are set to True
41-* PAT_VL128, // The lowest 128 elements are set to True41+ * PAT_VL128, // The lowest 128 elements are set to True
42-* PAT_M3, // Multiples of 3 elements are set to True42+ * PAT_M3, // Multiples of 3 elements are set to True
43-* PAT_M4, // Multiples of 4 elements are set to True43+ * PAT_M4, // Multiples of 4 elements are set to True
44-* PAT_H, // The lowest half elements are set to True44+ * PAT_H, // The lowest half elements are set to True
45-* PAT_Q, // The lowest quarter elements are set to True45+ * PAT_Q, // The lowest quarter elements are set to True
46-* PAT_ALLF = 15 // All elements are set to False46+ * PAT_ALLF = 15 // All elements are set to False
47-*47+ *
48-* usage example:48+ * usage example:
49-* vector_bool mask = asc_create_mask_b8(PAT_VL1);49+ * vector_bool mask = asc_create_mask_b8(PAT_VL1);
50-*/50+ */
51#define asc_create_mask_b8 pset_b851#define asc_create_mask_b8 pset_b8
52#define asc_create_mask_b16 pset_b1652#define asc_create_mask_b16 pset_b16
53#define asc_create_mask_b32 pset_b3253#define asc_create_mask_b32 pset_b32
@@ -93,48 +93,63 @@ __simd_callee__ inline addr_reg asc_create_addr_reg_b16(uint32_t offset0, uint32
93 93 
94__simd_callee__ inline addr_reg asc_create_addr_reg_b8(uint32_t offset0, uint32_t offset1, uint32_t offset2);94__simd_callee__ inline addr_reg asc_create_addr_reg_b8(uint32_t offset0, uint32_t offset1, uint32_t offset2);
95 95 
96-__simd_callee__ inline addr_reg asc_create_addr_reg_b32(uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);96+__simd_callee__ inline addr_reg asc_create_addr_reg_b32(
97+ uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);
97 98 
98-__simd_callee__ inline addr_reg asc_create_addr_reg_b16(uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);99+__simd_callee__ inline addr_reg asc_create_addr_reg_b16(
100+ uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);
99 101 
100-__simd_callee__ inline addr_reg asc_create_addr_reg_b8(uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);102+__simd_callee__ inline addr_reg asc_create_addr_reg_b8(
103+ uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);
101 104 
102// ==========asc_create_iter_reg (deprecated, please use asc_create_addr_reg instead)=========105// ==========asc_create_iter_reg (deprecated, please use asc_create_addr_reg instead)=========
103-[[deprecated("NOTICE: asc_create_iter_reg_b32 is deprecated. Please use asc_create_addr_reg_b32 instead.")]]106+[[deprecated("NOTICE: asc_create_iter_reg_b32 is deprecated. Please use asc_create_addr_reg_b32 "
104-__simd_callee__ inline addr_reg asc_create_iter_reg_b32(uint32_t offset);107+ "instead.")]] __simd_callee__ inline addr_reg
108+asc_create_iter_reg_b32(uint32_t offset);
105 109 
106-[[deprecated("NOTICE: asc_create_iter_reg_b16 is deprecated. Please use asc_create_addr_reg_b16 instead.")]]110+[[deprecated("NOTICE: asc_create_iter_reg_b16 is deprecated. Please use asc_create_addr_reg_b16 "
107-__simd_callee__ inline addr_reg asc_create_iter_reg_b16(uint32_t offset);111+ "instead.")]] __simd_callee__ inline addr_reg
112+asc_create_iter_reg_b16(uint32_t offset);
108 113 
109-[[deprecated("NOTICE: asc_create_iter_reg_b8 is deprecated. Please use asc_create_addr_reg_b8 instead.")]]114+[[deprecated("NOTICE: asc_create_iter_reg_b8 is deprecated. Please use asc_create_addr_reg_b8 "
110-__simd_callee__ inline addr_reg asc_create_iter_reg_b8(uint32_t offset);115+ "instead.")]] __simd_callee__ inline addr_reg
116+asc_create_iter_reg_b8(uint32_t offset);
111 117 
112-[[deprecated("NOTICE: asc_create_iter_reg_b32 is deprecated. Please use asc_create_addr_reg_b32 instead.")]]118+[[deprecated("NOTICE: asc_create_iter_reg_b32 is deprecated. Please use asc_create_addr_reg_b32 "
113-__simd_callee__ inline addr_reg asc_create_iter_reg_b32(uint32_t offset0, uint32_t offset1);119+ "instead.")]] __simd_callee__ inline addr_reg
120+asc_create_iter_reg_b32(uint32_t offset0, uint32_t offset1);
114 121 
115-[[deprecated("NOTICE: asc_create_iter_reg_b16 is deprecated. Please use asc_create_addr_reg_b16 instead.")]]122+[[deprecated("NOTICE: asc_create_iter_reg_b16 is deprecated. Please use asc_create_addr_reg_b16 "
116-__simd_callee__ inline addr_reg asc_create_iter_reg_b16(uint32_t offset0, uint32_t offset1);123+ "instead.")]] __simd_callee__ inline addr_reg
124+asc_create_iter_reg_b16(uint32_t offset0, uint32_t offset1);
117 125 
118-[[deprecated("NOTICE: asc_create_iter_reg_b8 is deprecated. Please use asc_create_addr_reg_b8 instead.")]]126+[[deprecated("NOTICE: asc_create_iter_reg_b8 is deprecated. Please use asc_create_addr_reg_b8 "
119-__simd_callee__ inline addr_reg asc_create_iter_reg_b8(uint32_t offset0, uint32_t offset1);127+ "instead.")]] __simd_callee__ inline addr_reg
128+asc_create_iter_reg_b8(uint32_t offset0, uint32_t offset1);
120 129 
121-[[deprecated("NOTICE: asc_create_iter_reg_b32 is deprecated. Please use asc_create_addr_reg_b32 instead.")]]130+[[deprecated("NOTICE: asc_create_iter_reg_b32 is deprecated. Please use asc_create_addr_reg_b32 "
122-__simd_callee__ inline addr_reg asc_create_iter_reg_b32(uint32_t offset0, uint32_t offset1, uint32_t offset2);131+ "instead.")]] __simd_callee__ inline addr_reg
132+asc_create_iter_reg_b32(uint32_t offset0, uint32_t offset1, uint32_t offset2);
123 133 
124-[[deprecated("NOTICE: asc_create_iter_reg_b16 is deprecated. Please use asc_create_addr_reg_b16 instead.")]]134+[[deprecated("NOTICE: asc_create_iter_reg_b16 is deprecated. Please use asc_create_addr_reg_b16 "
125-__simd_callee__ inline addr_reg asc_create_iter_reg_b16(uint32_t offset0, uint32_t offset1, uint32_t offset2);135+ "instead.")]] __simd_callee__ inline addr_reg
136+asc_create_iter_reg_b16(uint32_t offset0, uint32_t offset1, uint32_t offset2);
126 137 
127-[[deprecated("NOTICE: asc_create_iter_reg_b8 is deprecated. Please use asc_create_addr_reg_b8 instead.")]]138+[[deprecated("NOTICE: asc_create_iter_reg_b8 is deprecated. Please use asc_create_addr_reg_b8 "
128-__simd_callee__ inline addr_reg asc_create_iter_reg_b8(uint32_t offset0, uint32_t offset1, uint32_t offset2);139+ "instead.")]] __simd_callee__ inline addr_reg
140+asc_create_iter_reg_b8(uint32_t offset0, uint32_t offset1, uint32_t offset2);
129 141 
130-[[deprecated("NOTICE: asc_create_iter_reg_b32 is deprecated. Please use asc_create_addr_reg_b32 instead.")]]142+[[deprecated("NOTICE: asc_create_iter_reg_b32 is deprecated. Please use asc_create_addr_reg_b32 "
131-__simd_callee__ inline addr_reg asc_create_iter_reg_b32(uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);143+ "instead.")]] __simd_callee__ inline addr_reg
144+asc_create_iter_reg_b32(uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);
132 145 
133-[[deprecated("NOTICE: asc_create_iter_reg_b16 is deprecated. Please use asc_create_addr_reg_b16 instead.")]]146+[[deprecated("NOTICE: asc_create_iter_reg_b16 is deprecated. Please use asc_create_addr_reg_b16 "
134-__simd_callee__ inline addr_reg asc_create_iter_reg_b16(uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);147+ "instead.")]] __simd_callee__ inline addr_reg
148+asc_create_iter_reg_b16(uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);
135 149 
136-[[deprecated("NOTICE: asc_create_iter_reg_b8 is deprecated. Please use asc_create_addr_reg_b8 instead.")]]150+[[deprecated("NOTICE: asc_create_iter_reg_b8 is deprecated. Please use asc_create_addr_reg_b8 "
137-__simd_callee__ inline addr_reg asc_create_iter_reg_b8(uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);151+ "instead.")]] __simd_callee__ inline addr_reg
152+asc_create_iter_reg_b8(uint32_t offset0, uint32_t offset1, uint32_t offset2, uint32_t offset3);
138 153 
139// ==========asc_relu(half/int32_t/float)==========154// ==========asc_relu(half/int32_t/float)==========
140__simd_callee__ inline void asc_relu(vector_half& dst, vector_half src, vector_bool mask);155__simd_callee__ inline void asc_relu(vector_half& dst, vector_half src, vector_bool mask);
@@ -154,7 +169,8 @@ __simd_callee__ inline void asc_sub(vector_int16_t& dst, vector_int16_t src0, ve
154 169 
155__simd_callee__ inline void asc_sub(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);170__simd_callee__ inline void asc_sub(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);
156 171 
157-__simd_callee__ inline void asc_sub(vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);172+__simd_callee__ inline void asc_sub(
173+ vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);
158 174 
159__simd_callee__ inline void asc_sub(vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);175__simd_callee__ inline void asc_sub(vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);
160 176 
@@ -162,14 +178,20 @@ __simd_callee__ inline void asc_sub(vector_int32_t& dst, vector_int32_t src0, ve
162 178 
163__simd_callee__ inline void asc_sub(vector_float& dst, vector_float src0, vector_float src1, vector_bool mask);179__simd_callee__ inline void asc_sub(vector_float& dst, vector_float src0, vector_float src1, vector_bool mask);
164 180 
165-__simd_callee__ inline void asc_sub(vector_bool& carry, vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);181+__simd_callee__ inline void asc_sub(
182+ vector_bool& carry, vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);
166 183 
167-__simd_callee__ inline void asc_sub(vector_bool& carry, vector_int32_t& dst, vector_int32_t src0, vector_int32_t src1, vector_bool mask);184+__simd_callee__ inline void asc_sub(
185+ vector_bool& carry, vector_int32_t& dst, vector_int32_t src0, vector_int32_t src1, vector_bool mask);
168 186 
169// ==========asc_subc(uint32_t/int32_t)==========187// ==========asc_subc(uint32_t/int32_t)==========
170-__simd_callee__ inline void asc_subc(vector_bool& carry, vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool carry_src, vector_bool mask);188+__simd_callee__ inline void asc_subc(
189+ vector_bool& carry, vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool carry_src,
190+ vector_bool mask);
171 191 
172-__simd_callee__ inline void asc_subc(vector_bool& carry, vector_int32_t& dst, vector_int32_t src0, vector_int32_t src1, vector_bool carry_src, vector_bool mask);192+__simd_callee__ inline void asc_subc(
193+ vector_bool& carry, vector_int32_t& dst, vector_int32_t src0, vector_int32_t src1, vector_bool carry_src,
194+ vector_bool mask);
173 195 
174// ==========asc_and(bool/uint8_t/int8_t/uint16_t/int16_t/half/bfloat16_t/uint32_t/int32_t/float)==========196// ==========asc_and(bool/uint8_t/int8_t/uint16_t/int16_t/half/bfloat16_t/uint32_t/int32_t/float)==========
175__simd_callee__ inline void asc_and(vector_bool& dst, vector_bool src0, vector_bool src1, vector_bool mask);197__simd_callee__ inline void asc_and(vector_bool& dst, vector_bool src0, vector_bool src1, vector_bool mask);
@@ -178,9 +200,11 @@ __simd_callee__ inline void asc_and(vector_uint8_t& dst, vector_uint8_t src0, ve
178 200 
179__simd_callee__ inline void asc_and(vector_int8_t& dst, vector_int8_t src0, vector_int8_t src1, vector_bool mask);201__simd_callee__ inline void asc_and(vector_int8_t& dst, vector_int8_t src0, vector_int8_t src1, vector_bool mask);
180 202 
181-__simd_callee__ inline void asc_and(vector_fp8_e4m3fn_t& dst, vector_fp8_e4m3fn_t src0, vector_fp8_e4m3fn_t src1, vector_bool mask);203+__simd_callee__ inline void asc_and(
204+ vector_fp8_e4m3fn_t& dst, vector_fp8_e4m3fn_t src0, vector_fp8_e4m3fn_t src1, vector_bool mask);
182 205 
183-__simd_callee__ inline void asc_and(vector_fp8_e5m2_t& dst, vector_fp8_e5m2_t src0, vector_fp8_e5m2_t src1, vector_bool mask);206+__simd_callee__ inline void asc_and(
207+ vector_fp8_e5m2_t& dst, vector_fp8_e5m2_t src0, vector_fp8_e5m2_t src1, vector_bool mask);
184 208 
185__simd_callee__ inline void asc_and(vector_uint16_t& dst, vector_uint16_t src0, vector_uint16_t src1, vector_bool mask);209__simd_callee__ inline void asc_and(vector_uint16_t& dst, vector_uint16_t src0, vector_uint16_t src1, vector_bool mask);
186 210 
@@ -188,7 +212,8 @@ __simd_callee__ inline void asc_and(vector_int16_t& dst, vector_int16_t src0, ve
188 212 
189__simd_callee__ inline void asc_and(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);213__simd_callee__ inline void asc_and(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);
190 214 
191-__simd_callee__ inline void asc_and(vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);215+__simd_callee__ inline void asc_and(
216+ vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);
192 217 
193__simd_callee__ inline void asc_and(vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);218__simd_callee__ inline void asc_and(vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);
194 219 
@@ -197,30 +222,42 @@ __simd_callee__ inline void asc_and(vector_int32_t& dst, vector_int32_t src0, ve
197__simd_callee__ inline void asc_and(vector_float& dst, vector_float src0, vector_float src1, vector_bool mask);222__simd_callee__ inline void asc_and(vector_float& dst, vector_float src0, vector_float src1, vector_bool mask);
198 223 
199// ==========asc_shiftleft_scalar(uint8_t/int8_t/uint16_t/int16_t/uint32_t/int32_t)==========224// ==========asc_shiftleft_scalar(uint8_t/int8_t/uint16_t/int16_t/uint32_t/int32_t)==========
200-__simd_callee__ inline void asc_shiftleft_scalar(vector_uint8_t& dst, vector_uint8_t src, int16_t value, vector_bool mask);225+__simd_callee__ inline void asc_shiftleft_scalar(
226+ vector_uint8_t& dst, vector_uint8_t src, int16_t value, vector_bool mask);
201 227 
202-__simd_callee__ inline void asc_shiftleft_scalar(vector_int8_t& dst, vector_int8_t src, int16_t value, vector_bool mask);228+__simd_callee__ inline void asc_shiftleft_scalar(
229+ vector_int8_t& dst, vector_int8_t src, int16_t value, vector_bool mask);
203 230 
204-__simd_callee__ inline void asc_shiftleft_scalar(vector_uint16_t& dst, vector_uint16_t src, int16_t value, vector_bool mask);231+__simd_callee__ inline void asc_shiftleft_scalar(
232+ vector_uint16_t& dst, vector_uint16_t src, int16_t value, vector_bool mask);
205 233 
206-__simd_callee__ inline void asc_shiftleft_scalar(vector_int16_t& dst, vector_int16_t src, int16_t value, vector_bool mask);234+__simd_callee__ inline void asc_shiftleft_scalar(
235+ vector_int16_t& dst, vector_int16_t src, int16_t value, vector_bool mask);
207 236 
208-__simd_callee__ inline void asc_shiftleft_scalar(vector_uint32_t& dst, vector_uint32_t src, int16_t value, vector_bool mask);237+__simd_callee__ inline void asc_shiftleft_scalar(
238+ vector_uint32_t& dst, vector_uint32_t src, int16_t value, vector_bool mask);
209 239 
210-__simd_callee__ inline void asc_shiftleft_scalar(vector_int32_t& dst, vector_int32_t src, int16_t value, vector_bool mask);240+__simd_callee__ inline void asc_shiftleft_scalar(
241+ vector_int32_t& dst, vector_int32_t src, int16_t value, vector_bool mask);
211 242 
212// ==========asc_shiftright_scalar(uint8_t/int8_t/uint16_t/int16_t/uint32_t/int32_t)==========243// ==========asc_shiftright_scalar(uint8_t/int8_t/uint16_t/int16_t/uint32_t/int32_t)==========
213-__simd_callee__ inline void asc_shiftright_scalar(vector_uint8_t& dst, vector_uint8_t src, int16_t value, vector_bool mask);244+__simd_callee__ inline void asc_shiftright_scalar(
245+ vector_uint8_t& dst, vector_uint8_t src, int16_t value, vector_bool mask);
214 246 
215-__simd_callee__ inline void asc_shiftright_scalar(vector_int8_t& dst, vector_int8_t src, int16_t value, vector_bool mask);247+__simd_callee__ inline void asc_shiftright_scalar(
248+ vector_int8_t& dst, vector_int8_t src, int16_t value, vector_bool mask);
216 249 
217-__simd_callee__ inline void asc_shiftright_scalar(vector_uint16_t& dst, vector_uint16_t src, int16_t value, vector_bool mask);250+__simd_callee__ inline void asc_shiftright_scalar(
251+ vector_uint16_t& dst, vector_uint16_t src, int16_t value, vector_bool mask);
218 252 
219-__simd_callee__ inline void asc_shiftright_scalar(vector_int16_t& dst, vector_int16_t src, int16_t value, vector_bool mask);253+__simd_callee__ inline void asc_shiftright_scalar(
254+ vector_int16_t& dst, vector_int16_t src, int16_t value, vector_bool mask);
220 255 
221-__simd_callee__ inline void asc_shiftright_scalar(vector_uint32_t& dst, vector_uint32_t src, int16_t value, vector_bool mask);256+__simd_callee__ inline void asc_shiftright_scalar(
257+ vector_uint32_t& dst, vector_uint32_t src, int16_t value, vector_bool mask);
222 258 
223-__simd_callee__ inline void asc_shiftright_scalar(vector_int32_t& dst, vector_int32_t src, int16_t value, vector_bool mask);259+__simd_callee__ inline void asc_shiftright_scalar(
260+ vector_int32_t& dst, vector_int32_t src, int16_t value, vector_bool mask);
224 261 
225// ==========asc_select(bool/uint8_t/int8_t/uint16_t/int16_t/half/bfloat16_t/uint32_t/int32_t/float)==========262// ==========asc_select(bool/uint8_t/int8_t/uint16_t/int16_t/half/bfloat16_t/uint32_t/int32_t/float)==========
226__simd_callee__ inline void asc_select(vector_bool& dst, vector_bool src0, vector_bool src1, vector_bool mask);263__simd_callee__ inline void asc_select(vector_bool& dst, vector_bool src0, vector_bool src1, vector_bool mask);
@@ -229,21 +266,27 @@ __simd_callee__ inline void asc_select(vector_uint8_t& dst, vector_uint8_t src0,
229 266 
230__simd_callee__ inline void asc_select(vector_int8_t& dst, vector_int8_t src0, vector_int8_t src1, vector_bool mask);267__simd_callee__ inline void asc_select(vector_int8_t& dst, vector_int8_t src0, vector_int8_t src1, vector_bool mask);
231 268 
232-__simd_callee__ inline void asc_select(vector_fp8_e4m3fn_t& dst, vector_fp8_e4m3fn_t src0, vector_fp8_e4m3fn_t src1, vector_bool mask);269+__simd_callee__ inline void asc_select(
270+ vector_fp8_e4m3fn_t& dst, vector_fp8_e4m3fn_t src0, vector_fp8_e4m3fn_t src1, vector_bool mask);
233 271 
234-__simd_callee__ inline void asc_select(vector_hifloat8_t& dst, vector_hifloat8_t src0, vector_hifloat8_t src1, vector_bool mask);272+__simd_callee__ inline void asc_select(
273+ vector_hifloat8_t& dst, vector_hifloat8_t src0, vector_hifloat8_t src1, vector_bool mask);
235 274 
236-__simd_callee__ inline void asc_select(vector_fp8_e5m2_t& dst, vector_fp8_e5m2_t src0, vector_fp8_e5m2_t src1, vector_bool mask);275+__simd_callee__ inline void asc_select(
276+ vector_fp8_e5m2_t& dst, vector_fp8_e5m2_t src0, vector_fp8_e5m2_t src1, vector_bool mask);
237 277 
238-__simd_callee__ inline void asc_select(vector_uint16_t& dst, vector_uint16_t src0, vector_uint16_t src1, vector_bool mask);278+__simd_callee__ inline void asc_select(
279+ vector_uint16_t& dst, vector_uint16_t src0, vector_uint16_t src1, vector_bool mask);
239 280 
240__simd_callee__ inline void asc_select(vector_int16_t& dst, vector_int16_t src0, vector_int16_t src1, vector_bool mask);281__simd_callee__ inline void asc_select(vector_int16_t& dst, vector_int16_t src0, vector_int16_t src1, vector_bool mask);
241 282 
242__simd_callee__ inline void asc_select(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);283__simd_callee__ inline void asc_select(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);
243 284 
244-__simd_callee__ inline void asc_select(vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);285+__simd_callee__ inline void asc_select(
286+ vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);
245 287 
246-__simd_callee__ inline void asc_select(vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);288+__simd_callee__ inline void asc_select(
289+ vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);
247 290 
248__simd_callee__ inline void asc_select(vector_int32_t& dst, vector_int32_t src0, vector_int32_t src1, vector_bool mask);291__simd_callee__ inline void asc_select(vector_int32_t& dst, vector_int32_t src0, vector_int32_t src1, vector_bool mask);
249 292 
@@ -256,7 +299,7 @@ __simd_callee__ inline void asc_duplicate_scalar(vector_int8_t& dst, int8_t valu
256 299 
257__simd_callee__ inline void asc_duplicate_scalar(vector_fp8_e4m3fn_t& dst, fp8_e4m3fn_t value, vector_bool mask);300__simd_callee__ inline void asc_duplicate_scalar(vector_fp8_e4m3fn_t& dst, fp8_e4m3fn_t value, vector_bool mask);
258 301 
259-__simd_callee__ inline void asc_duplicate_scalar(vector_fp8_e5m2_t& dst, fp8_e5m2_t value, vector_bool mask);302+__simd_callee__ inline void asc_duplicate_scalar(vector_fp8_e5m2_t& dst, fp8_e5m2_t value, vector_bool mask);
260 303 
261__simd_callee__ inline void asc_duplicate_scalar(vector_uint16_t& dst, uint16_t value, vector_bool mask);304__simd_callee__ inline void asc_duplicate_scalar(vector_uint16_t& dst, uint16_t value, vector_bool mask);
262 305 
@@ -339,7 +382,8 @@ __simd_callee__ inline void asc_min(vector_uint32_t& dst, vector_uint32_t src0,
339 382 
340__simd_callee__ inline void asc_min(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);383__simd_callee__ inline void asc_min(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);
341 384 
342-__simd_callee__ inline void asc_min(vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);385+__simd_callee__ inline void asc_min(
386+ vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);
343 387 
344__simd_callee__ inline void asc_min(vector_float& dst, vector_float src0, vector_float src1, vector_bool mask);388__simd_callee__ inline void asc_min(vector_float& dst, vector_float src0, vector_float src1, vector_bool mask);
345 389 
@@ -448,9 +492,11 @@ __simd_callee__ inline void asc_abs(vector_half& dst, vector_half src, vector_bo
448__simd_callee__ inline void asc_abs(vector_float& dst, vector_float src, vector_bool mask);492__simd_callee__ inline void asc_abs(vector_float& dst, vector_float src, vector_bool mask);
449 493 
450// ==========asc_mull(uint32_t/int32_t)==========494// ==========asc_mull(uint32_t/int32_t)==========
451-__simd_callee__ inline void asc_mull(vector_uint32_t& dst0, vector_uint32_t& dst1, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);495+__simd_callee__ inline void asc_mull(
496+ vector_uint32_t& dst0, vector_uint32_t& dst1, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);
452 497 
453-__simd_callee__ inline void asc_mull(vector_int32_t& dst0, vector_int32_t& dst1, vector_int32_t src0, vector_int32_t src1, vector_bool mask);498+__simd_callee__ inline void asc_mull(
499+ vector_int32_t& dst0, vector_int32_t& dst1, vector_int32_t src0, vector_int32_t src1, vector_bool mask);
454 500 
455// ==========asc_le(uint8_t/int8_t/uint16_t/int16_t/uint32_t/int32_t/half/float)==========501// ==========asc_le(uint8_t/int8_t/uint16_t/int16_t/uint32_t/int32_t/half/float)==========
456__simd_callee__ inline void asc_le(vector_bool& dst, vector_uint8_t src0, vector_uint8_t src1, vector_bool mask);502__simd_callee__ inline void asc_le(vector_bool& dst, vector_uint8_t src0, vector_uint8_t src1, vector_bool mask);
@@ -518,56 +564,56 @@ __simd_callee__ inline void asc_squeeze(vector_fp8_e5m2_t& dst, vector_fp8_e5m2_
518__simd_callee__ inline void asc_squeeze(vector_fp8_e8m0_t& dst, vector_fp8_e8m0_t src, vector_bool mask);564__simd_callee__ inline void asc_squeeze(vector_fp8_e8m0_t& dst, vector_fp8_e8m0_t src, vector_bool mask);
519 565 
520[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "566[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
521- "Please use asc_squeeze_with_status instead.")]]567+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
522-__simd_callee__ inline void asc_squeeze_v2(vector_uint8_t& dst, vector_uint8_t src, vector_bool mask);568+asc_squeeze_v2(vector_uint8_t& dst, vector_uint8_t src, vector_bool mask);
523 569 
524[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "570[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
525- "Please use asc_squeeze_with_status instead.")]]571+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
526-__simd_callee__ inline void asc_squeeze_v2(vector_int8_t& dst, vector_int8_t src, vector_bool mask);572+asc_squeeze_v2(vector_int8_t& dst, vector_int8_t src, vector_bool mask);
527 573 
528[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "574[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
529- "Please use asc_squeeze_with_status instead.")]]575+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
530-__simd_callee__ inline void asc_squeeze_v2(vector_uint16_t& dst, vector_uint16_t src, vector_bool mask);576+asc_squeeze_v2(vector_uint16_t& dst, vector_uint16_t src, vector_bool mask);
531 577 
532[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "578[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
533- "Please use asc_squeeze_with_status instead.")]]579+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
534-__simd_callee__ inline void asc_squeeze_v2(vector_int16_t& dst, vector_int16_t src, vector_bool mask);580+asc_squeeze_v2(vector_int16_t& dst, vector_int16_t src, vector_bool mask);
535 581 
536[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "582[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
537- "Please use asc_squeeze_with_status instead.")]]583+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
538-__simd_callee__ inline void asc_squeeze_v2(vector_uint32_t& dst, vector_uint32_t src, vector_bool mask);584+asc_squeeze_v2(vector_uint32_t& dst, vector_uint32_t src, vector_bool mask);
539 585 
540[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "586[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
541- "Please use asc_squeeze_with_status instead.")]]587+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
542-__simd_callee__ inline void asc_squeeze_v2(vector_int32_t& dst, vector_int32_t src, vector_bool mask);588+asc_squeeze_v2(vector_int32_t& dst, vector_int32_t src, vector_bool mask);
543 589 
544[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "590[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
545- "Please use asc_squeeze_with_status instead.")]]591+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
546-__simd_callee__ inline void asc_squeeze_v2(vector_half& dst, vector_half src, vector_bool mask);592+asc_squeeze_v2(vector_half& dst, vector_half src, vector_bool mask);
547 593 
548[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "594[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
549- "Please use asc_squeeze_with_status instead.")]]595+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
550-__simd_callee__ inline void asc_squeeze_v2(vector_float& dst, vector_float src, vector_bool mask);596+asc_squeeze_v2(vector_float& dst, vector_float src, vector_bool mask);
551 597 
552[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "598[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
553- "Please use asc_squeeze_with_status instead.")]]599+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
554-__simd_callee__ inline void asc_squeeze_v2(vector_bfloat16_t& dst, vector_bfloat16_t src, vector_bool mask);600+asc_squeeze_v2(vector_bfloat16_t& dst, vector_bfloat16_t src, vector_bool mask);
555 601 
556[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "602[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
557- "Please use asc_squeeze_with_status instead.")]]603+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
558-__simd_callee__ inline void asc_squeeze_v2(vector_hifloat8_t& dst, vector_hifloat8_t src, vector_bool mask);604+asc_squeeze_v2(vector_hifloat8_t& dst, vector_hifloat8_t src, vector_bool mask);
559 605 
560[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "606[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
561- "Please use asc_squeeze_with_status instead.")]]607+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
562-__simd_callee__ inline void asc_squeeze_v2(vector_fp8_e4m3fn_t& dst, vector_fp8_e4m3fn_t src, vector_bool mask);608+asc_squeeze_v2(vector_fp8_e4m3fn_t& dst, vector_fp8_e4m3fn_t src, vector_bool mask);
563 609 
564[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "610[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
565- "Please use asc_squeeze_with_status instead.")]]611+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
566-__simd_callee__ inline void asc_squeeze_v2(vector_fp8_e5m2_t& dst, vector_fp8_e5m2_t src, vector_bool mask);612+asc_squeeze_v2(vector_fp8_e5m2_t& dst, vector_fp8_e5m2_t src, vector_bool mask);
567 613 
568[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "614[[deprecated("NOTICE: asc_squeeze_v2 is deprecated. "
569- "Please use asc_squeeze_with_status instead.")]]615+ "Please use asc_squeeze_with_status instead.")]] __simd_callee__ inline void
570-__simd_callee__ inline void asc_squeeze_v2(vector_fp8_e8m0_t& dst, vector_fp8_e8m0_t src, vector_bool mask);616+asc_squeeze_v2(vector_fp8_e8m0_t& dst, vector_fp8_e8m0_t src, vector_bool mask);
571 617 
572__simd_callee__ inline void asc_squeeze_with_status(vector_uint8_t& dst, vector_uint8_t src, vector_bool mask);618__simd_callee__ inline void asc_squeeze_with_status(vector_uint8_t& dst, vector_uint8_t src, vector_bool mask);
573 619 
@@ -589,7 +635,8 @@ __simd_callee__ inline void asc_squeeze_with_status(vector_bfloat16_t& dst, vect
589 635 
590__simd_callee__ inline void asc_squeeze_with_status(vector_hifloat8_t& dst, vector_hifloat8_t src, vector_bool mask);636__simd_callee__ inline void asc_squeeze_with_status(vector_hifloat8_t& dst, vector_hifloat8_t src, vector_bool mask);
591 637 
592-__simd_callee__ inline void asc_squeeze_with_status(vector_fp8_e4m3fn_t& dst, vector_fp8_e4m3fn_t src, vector_bool mask);638+__simd_callee__ inline void asc_squeeze_with_status(
639+ vector_fp8_e4m3fn_t& dst, vector_fp8_e4m3fn_t src, vector_bool mask);
593 640 
594__simd_callee__ inline void asc_squeeze_with_status(vector_fp8_e5m2_t& dst, vector_fp8_e5m2_t src, vector_bool mask);641__simd_callee__ inline void asc_squeeze_with_status(vector_fp8_e5m2_t& dst, vector_fp8_e5m2_t src, vector_bool mask);
595 642 
@@ -602,31 +649,41 @@ __simd_callee__ inline void asc_intlv_b16(vector_bool& dst0, vector_bool& dst1,
602 649 
603__simd_callee__ inline void asc_intlv_b32(vector_bool& dst0, vector_bool& dst1, vector_bool src0, vector_bool src1);650__simd_callee__ inline void asc_intlv_b32(vector_bool& dst0, vector_bool& dst1, vector_bool src0, vector_bool src1);
604 651 
605-__simd_callee__ inline void asc_intlv(vector_uint8_t& dst0, vector_uint8_t& dst1, vector_uint8_t src0, vector_uint8_t src1);652+__simd_callee__ inline void asc_intlv(
653+ vector_uint8_t& dst0, vector_uint8_t& dst1, vector_uint8_t src0, vector_uint8_t src1);
606 654 
607__simd_callee__ inline void asc_intlv(vector_int8_t& dst0, vector_int8_t& dst1, vector_int8_t src0, vector_int8_t src1);655__simd_callee__ inline void asc_intlv(vector_int8_t& dst0, vector_int8_t& dst1, vector_int8_t src0, vector_int8_t src1);
608 656 
609-__simd_callee__ inline void asc_intlv(vector_uint16_t& dst0, vector_uint16_t& dst1, vector_uint16_t src0, vector_uint16_t src1);657+__simd_callee__ inline void asc_intlv(
658+ vector_uint16_t& dst0, vector_uint16_t& dst1, vector_uint16_t src0, vector_uint16_t src1);
610 659 
611-__simd_callee__ inline void asc_intlv(vector_int16_t& dst0, vector_int16_t& dst1, vector_int16_t src0, vector_int16_t src1);660+__simd_callee__ inline void asc_intlv(
661+ vector_int16_t& dst0, vector_int16_t& dst1, vector_int16_t src0, vector_int16_t src1);
612 662 
613-__simd_callee__ inline void asc_intlv(vector_uint32_t& dst0, vector_uint32_t& dst1, vector_uint32_t src0, vector_uint32_t src1);663+__simd_callee__ inline void asc_intlv(
664+ vector_uint32_t& dst0, vector_uint32_t& dst1, vector_uint32_t src0, vector_uint32_t src1);
614 665 
615-__simd_callee__ inline void asc_intlv(vector_int32_t& dst0, vector_int32_t& dst1, vector_int32_t src0, vector_int32_t src1);666+__simd_callee__ inline void asc_intlv(
667+ vector_int32_t& dst0, vector_int32_t& dst1, vector_int32_t src0, vector_int32_t src1);
616 668 
617__simd_callee__ inline void asc_intlv(vector_half& dst0, vector_half& dst1, vector_half src0, vector_half src1);669__simd_callee__ inline void asc_intlv(vector_half& dst0, vector_half& dst1, vector_half src0, vector_half src1);
618 670 
619__simd_callee__ inline void asc_intlv(vector_float& dst0, vector_float& dst1, vector_float src0, vector_float src1);671__simd_callee__ inline void asc_intlv(vector_float& dst0, vector_float& dst1, vector_float src0, vector_float src1);
620 672 
621-__simd_callee__ inline void asc_intlv(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, vector_fp8_e8m0_t src0, vector_fp8_e8m0_t src1);673+__simd_callee__ inline void asc_intlv(
674+ vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, vector_fp8_e8m0_t src0, vector_fp8_e8m0_t src1);
622 675 
623-__simd_callee__ inline void asc_intlv(vector_fp8_e5m2_t& dst0, vector_fp8_e5m2_t& dst1, vector_fp8_e5m2_t src0, vector_fp8_e5m2_t src1);676+__simd_callee__ inline void asc_intlv(
677+ vector_fp8_e5m2_t& dst0, vector_fp8_e5m2_t& dst1, vector_fp8_e5m2_t src0, vector_fp8_e5m2_t src1);
624 678 
625-__simd_callee__ inline void asc_intlv(vector_fp8_e4m3fn_t& dst0, vector_fp8_e4m3fn_t& dst1, vector_fp8_e4m3fn_t src0, vector_fp8_e4m3fn_t src1);679+__simd_callee__ inline void asc_intlv(
680+ vector_fp8_e4m3fn_t& dst0, vector_fp8_e4m3fn_t& dst1, vector_fp8_e4m3fn_t src0, vector_fp8_e4m3fn_t src1);
626 681 
627-__simd_callee__ inline void asc_intlv(vector_hifloat8_t& dst0, vector_hifloat8_t& dst1, vector_hifloat8_t src0, vector_hifloat8_t src1);682+__simd_callee__ inline void asc_intlv(
683+ vector_hifloat8_t& dst0, vector_hifloat8_t& dst1, vector_hifloat8_t src0, vector_hifloat8_t src1);
628 684 
629-__simd_callee__ inline void asc_intlv(vector_bfloat16_t& dst0, vector_bfloat16_t& dst1, vector_bfloat16_t src0, vector_bfloat16_t src1);685+__simd_callee__ inline void asc_intlv(
686+ vector_bfloat16_t& dst0, vector_bfloat16_t& dst1, vector_bfloat16_t src0, vector_bfloat16_t src1);
630 687 
631// ==========asc_unsqueeze(uint8_t/int8_t/uint16_t/int16_t/uint32_t/int32_t)==========688// ==========asc_unsqueeze(uint8_t/int8_t/uint16_t/int16_t/uint32_t/int32_t)==========
632__simd_callee__ inline void asc_unsqueeze(vector_uint8_t& dst, vector_bool mask);689__simd_callee__ inline void asc_unsqueeze(vector_uint8_t& dst, vector_bool mask);
@@ -709,7 +766,8 @@ __simd_callee__ inline void asc_mul(vector_uint16_t& dst, vector_uint16_t src0,
709 766 
710__simd_callee__ inline void asc_mul(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);767__simd_callee__ inline void asc_mul(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);
711 768 
712-__simd_callee__ inline void asc_mul(vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);769+__simd_callee__ inline void asc_mul(
770+ vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);
713 771 
714__simd_callee__ inline void asc_mul(vector_int32_t& dst, vector_int32_t src0, vector_int32_t src1, vector_bool mask);772__simd_callee__ inline void asc_mul(vector_int32_t& dst, vector_int32_t src0, vector_int32_t src1, vector_bool mask);
715 773 
@@ -790,56 +848,60 @@ __simd_callee__ inline void asc_add(vector_int32_t& dst, vector_int32_t src0, ve
790 848 
791__simd_callee__ inline void asc_add(vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);849__simd_callee__ inline void asc_add(vector_uint32_t& dst, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);
792 850 
793-__simd_callee__ inline void asc_add(vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);851+__simd_callee__ inline void asc_add(
852+ vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);
794 853 
795-__simd_callee__ inline void asc_add(vector_bool& dst0, vector_int32_t& dst1, vector_int32_t src0, vector_int32_t src1, vector_bool mask);854+__simd_callee__ inline void asc_add(
855+ vector_bool& dst0, vector_int32_t& dst1, vector_int32_t src0, vector_int32_t src1, vector_bool mask);
796 856 
797-__simd_callee__ inline void asc_add(vector_bool& dst0, vector_uint32_t& dst1, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);857+__simd_callee__ inline void asc_add(
858+ vector_bool& dst0, vector_uint32_t& dst1, vector_uint32_t src0, vector_uint32_t src1, vector_bool mask);
798 859 
799// // ==========asc_addc(uint32_t/int32_t)==========860// // ==========asc_addc(uint32_t/int32_t)==========
800-__simd_callee__ inline void asc_addc(vector_bool& dst0, vector_uint32_t& dst1,861+__simd_callee__ inline void asc_addc(
801- vector_uint32_t src0, vector_uint32_t src1, vector_bool src2, vector_bool mask);862+ vector_bool& dst0, vector_uint32_t& dst1, vector_uint32_t src0, vector_uint32_t src1, vector_bool src2,
863+ vector_bool mask);
802 864 
803-__simd_callee__ inline void asc_addc(vector_bool& dst0, vector_int32_t& dst1,865+__simd_callee__ inline void asc_addc(
804- vector_int32_t src0, vector_int32_t src1, vector_bool src2, vector_bool mask);866+ vector_bool& dst0, vector_int32_t& dst1, vector_int32_t src0, vector_int32_t src1, vector_bool src2,
867+ vector_bool mask);
805 868 
806// ==========asc_shiftleft(u8/s8/u16/s16/u32/s32)==========869// ==========asc_shiftleft(u8/s8/u16/s16/u32/s32)==========
807-__simd_callee__ inline void asc_shiftleft(vector_uint8_t& dst,870+__simd_callee__ inline void asc_shiftleft(
808- vector_uint8_t src0, vector_int8_t src1, vector_bool mask);871+ vector_uint8_t& dst, vector_uint8_t src0, vector_int8_t src1, vector_bool mask);
809 872 
810-__simd_callee__ inline void asc_shiftleft(vector_int8_t& dst,873+__simd_callee__ inline void asc_shiftleft(vector_int8_t& dst, vector_int8_t src0, vector_int8_t src1, vector_bool mask);
811- vector_int8_t src0, vector_int8_t src1, vector_bool mask);
812 874 
813-__simd_callee__ inline void asc_shiftleft(vector_uint16_t& dst,875+__simd_callee__ inline void asc_shiftleft(
814- vector_uint16_t src0, vector_int16_t src1, vector_bool mask);876+ vector_uint16_t& dst, vector_uint16_t src0, vector_int16_t src1, vector_bool mask);
815 877 
816-__simd_callee__ inline void asc_shiftleft(vector_int16_t& dst,878+__simd_callee__ inline void asc_shiftleft(
817- vector_int16_t src0, vector_int16_t src1, vector_bool mask);879+ vector_int16_t& dst, vector_int16_t src0, vector_int16_t src1, vector_bool mask);
818 880 
819-__simd_callee__ inline void asc_shiftleft(vector_uint32_t& dst,881+__simd_callee__ inline void asc_shiftleft(
820- vector_uint32_t src0, vector_int32_t src1, vector_bool mask);882+ vector_uint32_t& dst, vector_uint32_t src0, vector_int32_t src1, vector_bool mask);
821 883 
822-__simd_callee__ inline void asc_shiftleft(vector_int32_t& dst,884+__simd_callee__ inline void asc_shiftleft(
823- vector_int32_t src0, vector_int32_t src1, vector_bool mask);885+ vector_int32_t& dst, vector_int32_t src0, vector_int32_t src1, vector_bool mask);
824 886 
825// ==========asc_shiftright(u8/s8/u16/s16/u32/s32)==========887// ==========asc_shiftright(u8/s8/u16/s16/u32/s32)==========
826-__simd_callee__ inline void asc_shiftright(vector_uint8_t& dst,888+__simd_callee__ inline void asc_shiftright(
827- vector_uint8_t src0, vector_int8_t src1, vector_bool mask);889+ vector_uint8_t& dst, vector_uint8_t src0, vector_int8_t src1, vector_bool mask);
828 890 
829-__simd_callee__ inline void asc_shiftright(vector_int8_t& dst,891+__simd_callee__ inline void asc_shiftright(
830- vector_int8_t src0, vector_int8_t src1, vector_bool mask);892+ vector_int8_t& dst, vector_int8_t src0, vector_int8_t src1, vector_bool mask);
831 893 
832-__simd_callee__ inline void asc_shiftright(vector_uint16_t& dst,894+__simd_callee__ inline void asc_shiftright(
833- vector_uint16_t src0, vector_int16_t src1, vector_bool mask);895+ vector_uint16_t& dst, vector_uint16_t src0, vector_int16_t src1, vector_bool mask);
834 896 
835-__simd_callee__ inline void asc_shiftright(vector_int16_t& dst,897+__simd_callee__ inline void asc_shiftright(
836- vector_int16_t src0, vector_int16_t src1, vector_bool mask);898+ vector_int16_t& dst, vector_int16_t src0, vector_int16_t src1, vector_bool mask);
837 899 
838-__simd_callee__ inline void asc_shiftright(vector_uint32_t& dst,900+__simd_callee__ inline void asc_shiftright(
839- vector_uint32_t src0, vector_int32_t src1, vector_bool mask);901+ vector_uint32_t& dst, vector_uint32_t src0, vector_int32_t src1, vector_bool mask);
840 902 
841-__simd_callee__ inline void asc_shiftright(vector_int32_t& dst,903+__simd_callee__ inline void asc_shiftright(
842- vector_int32_t src0, vector_int32_t src1, vector_bool mask);904+ vector_int32_t& dst, vector_int32_t src0, vector_int32_t src1, vector_bool mask);
843 905 
844// ==========asc_not(u8/s8/u16/s16/half/u32/s32/f32/bool)==========906// ==========asc_not(u8/s8/u16/s16/half/u32/s32/f32/bool)==========
845__simd_callee__ inline void asc_not(vector_uint8_t& dst, vector_uint8_t src, vector_bool mask);907__simd_callee__ inline void asc_not(vector_uint8_t& dst, vector_uint8_t src, vector_bool mask);
@@ -967,7 +1029,8 @@ __simd_callee__ inline void asc_max(vector_float& dst, vector_float src0, vector
967 1029 
968__simd_callee__ inline void asc_max(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);1030__simd_callee__ inline void asc_max(vector_half& dst, vector_half src0, vector_half src1, vector_bool mask);
969 1031 
970-__simd_callee__ inline void asc_max(vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);1032+__simd_callee__ inline void asc_max(
1033+ vector_bfloat16_t& dst, vector_bfloat16_t src0, vector_bfloat16_t src1, vector_bool mask);
971 1034 
972//================asc_min_scalar=================1035//================asc_min_scalar=================
973__simd_callee__ inline void asc_min_scalar(vector_int32_t& dst, vector_int32_t src, int32_t value, vector_bool mask);1036__simd_callee__ inline void asc_min_scalar(vector_int32_t& dst, vector_int32_t src, int32_t value, vector_bool mask);
@@ -1015,7 +1078,8 @@ __simd_callee__ inline void asc_add_scalar(vector_uint16_t& dst, vector_uint16_t
1015 1078 
1016__simd_callee__ inline void asc_add_scalar(vector_half& dst, vector_half src, half value, vector_bool mask);1079__simd_callee__ inline void asc_add_scalar(vector_half& dst, vector_half src, half value, vector_bool mask);
1017 1080 
1018-__simd_callee__ inline void asc_add_scalar(vector_bfloat16_t& dst, vector_bfloat16_t src, bfloat16_t value, vector_bool mask);1081+__simd_callee__ inline void asc_add_scalar(
1082+ vector_bfloat16_t& dst, vector_bfloat16_t src, bfloat16_t value, vector_bool mask);
1019 1083 
1020__simd_callee__ inline void asc_add_scalar(vector_int32_t& dst, vector_int32_t src, int32_t value, vector_bool mask);1084__simd_callee__ inline void asc_add_scalar(vector_int32_t& dst, vector_int32_t src, int32_t value, vector_bool mask);
1021 1085 
@@ -1052,8 +1116,8 @@ __simd_callee__ inline void asc_exp_sub(vector_float& dst, vector_float src0, ve
1052__simd_callee__ inline void asc_exp_sub_v2(vector_float& dst, vector_half src0, vector_half src1, vector_bool mask);1116__simd_callee__ inline void asc_exp_sub_v2(vector_float& dst, vector_half src0, vector_half src1, vector_bool mask);
1053 1117 
1054[[deprecated("NOTICE: asc_exp_sub_v2 in this parameter list is deprecated. "1118[[deprecated("NOTICE: asc_exp_sub_v2 in this parameter list is deprecated. "
1055- "Please use asc_exp_sub instead.")]]1119+ "Please use asc_exp_sub instead.")]] __simd_callee__ inline void
1056-__simd_callee__ inline void asc_exp_sub_v2(vector_float& dst, vector_float src0, vector_float src1, vector_bool mask);1120+asc_exp_sub_v2(vector_float& dst, vector_float src0, vector_float src1, vector_bool mask);
1057 1121 
1058// ==========asc_ln(half/float)==========1122// ==========asc_ln(half/float)==========
1059__simd_callee__ inline void asc_ln(vector_half& dst, vector_half src, vector_bool mask);1123__simd_callee__ inline void asc_ln(vector_half& dst, vector_half src, vector_bool mask);
@@ -1082,7 +1146,8 @@ __simd_callee__ inline void asc_max_scalar(vector_half& dst, vector_half src, ha
1082 1146 
1083__simd_callee__ inline void asc_max_scalar(vector_float& dst, vector_float src, float value, vector_bool mask);1147__simd_callee__ inline void asc_max_scalar(vector_float& dst, vector_float src, float value, vector_bool mask);
1084 1148 
1085-__simd_callee__ inline void asc_max_scalar(vector_bfloat16_t& dst, vector_bfloat16_t src, bfloat16_t value, vector_bool mask);1149+__simd_callee__ inline void asc_max_scalar(
1150+ vector_bfloat16_t& dst, vector_bfloat16_t src, bfloat16_t value, vector_bool mask);
1086 1151 
1087// ==========asc_ne(uint8_t/int8_t/uint16_t/int16_t/uint32_t/int32_t/half/float)==========1152// ==========asc_ne(uint8_t/int8_t/uint16_t/int16_t/uint32_t/int32_t/half/float)==========
1088__simd_callee__ inline void asc_ne(vector_bool& dst, vector_uint8_t src0, vector_uint8_t src1, vector_bool mask);1153__simd_callee__ inline void asc_ne(vector_bool& dst, vector_uint8_t src0, vector_uint8_t src1, vector_bool mask);
@@ -1121,27 +1186,38 @@ __simd_callee__ inline void asc_ne_scalar(vector_bool& dst, vector_float src, fl
1121__simd_callee__ inline void asc_ne_scalar(vector_bool& dst, vector_bfloat16_t src, bfloat16_t value, vector_bool mask);1186__simd_callee__ inline void asc_ne_scalar(vector_bool& dst, vector_bfloat16_t src, bfloat16_t value, vector_bool mask);
1122 1187 
1123// ==========asc_deintlv(int32_t/uint32_t/int16_t/uint16_t/int8_t/uint8_t/fp8_e4m3fn/fp8_e5m2/fp8_e8m0/bfloat16_t/float/half)==========1188// ==========asc_deintlv(int32_t/uint32_t/int16_t/uint16_t/int8_t/uint8_t/fp8_e4m3fn/fp8_e5m2/fp8_e8m0/bfloat16_t/float/half)==========
1124-__simd_callee__ inline void asc_deintlv(vector_int32_t& dst0, vector_int32_t& dst1, vector_int32_t src0, vector_int32_t src1);1189+__simd_callee__ inline void asc_deintlv(
1190+ vector_int32_t& dst0, vector_int32_t& dst1, vector_int32_t src0, vector_int32_t src1);
1125 1191 
1126-__simd_callee__ inline void asc_deintlv(vector_uint32_t& dst0, vector_uint32_t& dst1, vector_uint32_t src0, vector_uint32_t src1);1192+__simd_callee__ inline void asc_deintlv(
1193+ vector_uint32_t& dst0, vector_uint32_t& dst1, vector_uint32_t src0, vector_uint32_t src1);
1127 1194 
1128-__simd_callee__ inline void asc_deintlv(vector_int16_t& dst0, vector_int16_t& dst1, vector_int16_t src0, vector_int16_t src1);1195+__simd_callee__ inline void asc_deintlv(
1196+ vector_int16_t& dst0, vector_int16_t& dst1, vector_int16_t src0, vector_int16_t src1);
1129 1197 
1130-__simd_callee__ inline void asc_deintlv(vector_uint16_t& dst0, vector_uint16_t& dst1, vector_uint16_t src0, vector_uint16_t src1);1198+__simd_callee__ inline void asc_deintlv(
1199+ vector_uint16_t& dst0, vector_uint16_t& dst1, vector_uint16_t src0, vector_uint16_t src1);
1131 1200 
1132-__simd_callee__ inline void asc_deintlv(vector_int8_t& dst0, vector_int8_t& dst1, vector_int8_t src0, vector_int8_t src1);1201+__simd_callee__ inline void asc_deintlv(
1202+ vector_int8_t& dst0, vector_int8_t& dst1, vector_int8_t src0, vector_int8_t src1);
1133 1203 
1134-__simd_callee__ inline void asc_deintlv(vector_uint8_t& dst0, vector_uint8_t& dst1, vector_uint8_t src0, vector_uint8_t src1);1204+__simd_callee__ inline void asc_deintlv(
1205+ vector_uint8_t& dst0, vector_uint8_t& dst1, vector_uint8_t src0, vector_uint8_t src1);
1135 1206 
1136-__simd_callee__ inline void asc_deintlv(vector_fp8_e4m3fn_t& dst0, vector_fp8_e4m3fn_t& dst1, vector_fp8_e4m3fn_t src0, vector_fp8_e4m3fn_t src1);1207+__simd_callee__ inline void asc_deintlv(
1208+ vector_fp8_e4m3fn_t& dst0, vector_fp8_e4m3fn_t& dst1, vector_fp8_e4m3fn_t src0, vector_fp8_e4m3fn_t src1);
1137 1209 
1138-__simd_callee__ inline void asc_deintlv(vector_hifloat8_t& dst0, vector_hifloat8_t& dst1, vector_hifloat8_t src0, vector_hifloat8_t src1);1210+__simd_callee__ inline void asc_deintlv(
1211+ vector_hifloat8_t& dst0, vector_hifloat8_t& dst1, vector_hifloat8_t src0, vector_hifloat8_t src1);
1139 1212 
1140-__simd_callee__ inline void asc_deintlv(vector_fp8_e5m2_t& dst0, vector_fp8_e5m2_t& dst1, vector_fp8_e5m2_t src0, vector_fp8_e5m2_t src1);1213+__simd_callee__ inline void asc_deintlv(
1214+ vector_fp8_e5m2_t& dst0, vector_fp8_e5m2_t& dst1, vector_fp8_e5m2_t src0, vector_fp8_e5m2_t src1);
1141 1215 
1142-__simd_callee__ inline void asc_deintlv(vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, vector_fp8_e8m0_t src0, vector_fp8_e8m0_t src1);1216+__simd_callee__ inline void asc_deintlv(
1217+ vector_fp8_e8m0_t& dst0, vector_fp8_e8m0_t& dst1, vector_fp8_e8m0_t src0, vector_fp8_e8m0_t src1);
1143 1218 
1144-__simd_callee__ inline void asc_deintlv(vector_bfloat16_t& dst0, vector_bfloat16_t& dst1, vector_bfloat16_t src0, vector_bfloat16_t src1);1219+__simd_callee__ inline void asc_deintlv(
1220+ vector_bfloat16_t& dst0, vector_bfloat16_t& dst1, vector_bfloat16_t src0, vector_bfloat16_t src1);
1145 1221 
1146__simd_callee__ inline void asc_deintlv(vector_float& dst0, vector_float& dst1, vector_float src0, vector_float src1);1222__simd_callee__ inline void asc_deintlv(vector_float& dst0, vector_float& dst1, vector_float src0, vector_float src1);
1147 1223 
Minclude/c_api/scalar_compute/scalar_compute.h+9-9
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "scalar_compute.h cannot be used with compile flag --enable-simt enabled."12#error "scalar_compute.h cannot be used with compile flag --enable-simt enabled."
@@ -171,7 +171,7 @@ __aicore__ inline uint64_t asc_atomic_inc(__gm__ uint64_t* address, uint64_t val
171__aicore__ inline uint32_t asc_atomic_dec(__gm__ uint32_t* address, uint32_t val);171__aicore__ inline uint32_t asc_atomic_dec(__gm__ uint32_t* address, uint32_t val);
172 172 
173__aicore__ inline uint64_t asc_atomic_dec(__gm__ uint64_t* address, uint64_t val);173__aicore__ inline uint64_t asc_atomic_dec(__gm__ uint64_t* address, uint64_t val);
174-}174+} // namespace __asc_aicore
175 175 
176#endif176#endif
177 177 
Minclude/c_api/sync/sync.h+8-8
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "sync.h cannot be used with compile flag --enable-simt enabled."12#error "sync.h cannot be used with compile flag --enable-simt enabled."
Minclude/c_api/sys_var/sys_var.h+10-10
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "sys_var.h cannot be used with compile flag --enable-simt enabled."12#error "sys_var.h cannot be used with compile flag --enable-simt enabled."
@@ -82,8 +82,8 @@ __aicore__ inline int64_t asc_get_program_counter();
82__aicore__ inline void asc_get_arch_ver(uint32_t& core_version);82__aicore__ inline void asc_get_arch_ver(uint32_t& core_version);
83 83 
84[[deprecated("NOTICE: asc_get_ar_spr is deprecated. "84[[deprecated("NOTICE: asc_get_ar_spr is deprecated. "
85- "Please use asc_get_squeeze_status instead.")]]85+ "Please use asc_get_squeeze_status instead.")]] __aicore__ inline int64_t
86-__aicore__ inline int64_t asc_get_ar_spr();86+asc_get_ar_spr();
87 87 
88__aicore__ inline void asc_set_ffts_base_addr(uint64_t config);88__aicore__ inline void asc_set_ffts_base_addr(uint64_t config);
89 89 
Minclude/c_api/utils/union.h+8-8
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_C_API_UTILS_C_API_UNION_H11#ifndef INCLUDE_C_API_UTILS_C_API_UNION_H
12#define INCLUDE_C_API_UTILS_C_API_UNION_H12#define INCLUDE_C_API_UTILS_C_API_UNION_H
Minclude/c_api/utils_intf.h+8-8
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_C_API_C_API_UTILS_INTF_H11#ifndef INCLUDE_C_API_C_API_UTILS_INTF_H
12#define INCLUDE_C_API_C_API_UTILS_INTF_H12#define INCLUDE_C_API_C_API_UTILS_INTF_H
Minclude/c_api/vector_compute/vector_compute.h+1233-841
Minclude/c_api/vector_datamove/vector_datamove.h+243-170
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "vector_datamove.h cannot be used with compile flag --enable-simt enabled."12#error "vector_datamove.h cannot be used with compile flag --enable-simt enabled."
@@ -51,15 +51,15 @@ __aicore__ inline void asc_set_copy_pad_val(float pad_value);
51 51 
52#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)52#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
53 53 
54-__aicore__ inline void asc_copy_ub2ub(__ubuf__ void* dst, __ubuf__ void* src,54+__aicore__ inline void asc_copy_ub2ub(
55- uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);55+ __ubuf__ void* dst, __ubuf__ void* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);
56 56 
57__aicore__ inline void asc_copy_ub2ub(__ubuf__ void* dst, __ubuf__ void* src, uint32_t size);57__aicore__ inline void asc_copy_ub2ub(__ubuf__ void* dst, __ubuf__ void* src, uint32_t size);
58 58 
59__aicore__ inline void asc_copy_ub2ub_sync(__ubuf__ void* dst, __ubuf__ void* src, uint32_t size);59__aicore__ inline void asc_copy_ub2ub_sync(__ubuf__ void* dst, __ubuf__ void* src, uint32_t size);
60 60 
61-__aicore__ inline void asc_copy_gm2ub(__ubuf__ void* dst, __gm__ void* src,61+__aicore__ inline void asc_copy_gm2ub(
62- uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);62+ __ubuf__ void* dst, __gm__ void* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);
63 63 
64__aicore__ inline void asc_copy_gm2ub(__ubuf__ void* dst, __gm__ void* src, uint32_t size);64__aicore__ inline void asc_copy_gm2ub(__ubuf__ void* dst, __gm__ void* src, uint32_t size);
65 65 
@@ -67,165 +67,187 @@ __aicore__ inline void asc_copy_gm2ub_sync(__ubuf__ void* dst, __gm__ void* src,
67 67 
68__aicore__ inline void asc_copy_ub2gm(__gm__ void* dst, __ubuf__ void* src, uint32_t size);68__aicore__ inline void asc_copy_ub2gm(__gm__ void* dst, __ubuf__ void* src, uint32_t size);
69 69 
70-__aicore__ inline void asc_copy_ub2gm(__gm__ void* dst, __ubuf__ void* src,70+__aicore__ inline void asc_copy_ub2gm(
71- uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);71+ __gm__ void* dst, __ubuf__ void* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);
72 72 
73__aicore__ inline void asc_copy_ub2gm_sync(__gm__ void* dst, __ubuf__ void* src, uint32_t size);73__aicore__ inline void asc_copy_ub2gm_sync(__gm__ void* dst, __ubuf__ void* src, uint32_t size);
74 74 
75-//asc_copy_gm2ub_align int8_t / uint8_t / half / bfloat16_t / int16_t / uint16_t / float / int32_t / uint32_t75+// asc_copy_gm2ub_align int8_t / uint8_t / half / bfloat16_t / int16_t / uint16_t / float / int32_t / uint32_t
76-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int8_t* dst, __gm__ int8_t* src, uint16_t n_burst, uint32_t len_burst,76+__aicore__ inline void asc_copy_gm2ub_align(
77- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);77+ __ubuf__ int8_t* dst, __gm__ int8_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
78+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
78 79 
79__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int8_t* dst, __gm__ int8_t* src, uint32_t size);80__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int8_t* dst, __gm__ int8_t* src, uint32_t size);
80 81 
81__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ int8_t* dst, __gm__ int8_t* src, uint32_t size);82__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ int8_t* dst, __gm__ int8_t* src, uint32_t size);
82 83 
83-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint16_t n_burst, uint32_t len_burst,84+__aicore__ inline void asc_copy_gm2ub_align(
84- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);85+ __ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
86+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
85 87 
86__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t size);88__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t size);
87 89 
88__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t size);90__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t size);
89 91 
90-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ half* dst, __gm__ half* src, uint16_t n_burst, uint32_t len_burst,92+__aicore__ inline void asc_copy_gm2ub_align(
91- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);93+ __ubuf__ half* dst, __gm__ half* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
94+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
92 95 
93__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ half* dst, __gm__ half* src, uint32_t size);96__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ half* dst, __gm__ half* src, uint32_t size);
94 97 
95__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ half* dst, __gm__ half* src, uint32_t size);98__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ half* dst, __gm__ half* src, uint32_t size);
96 99 
97-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint16_t n_burst, uint32_t len_burst,100+__aicore__ inline void asc_copy_gm2ub_align(
98- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);101+ __ubuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
102+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
99 103 
100__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint32_t size);104__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint32_t size);
101 105 
102__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint32_t size);106__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint32_t size);
103 107 
104-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int16_t* dst, __gm__ int16_t* src, uint16_t n_burst, uint32_t len_burst,108+__aicore__ inline void asc_copy_gm2ub_align(
105- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);109+ __ubuf__ int16_t* dst, __gm__ int16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
110+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
106 111 
107__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int16_t* dst, __gm__ int16_t* src, uint32_t size);112__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int16_t* dst, __gm__ int16_t* src, uint32_t size);
108 113 
109__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ int16_t* dst, __gm__ int16_t* src, uint32_t size);114__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ int16_t* dst, __gm__ int16_t* src, uint32_t size);
110 115 
111-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint16_t* dst, __gm__ uint16_t* src, uint16_t n_burst, uint32_t len_burst,116+__aicore__ inline void asc_copy_gm2ub_align(
112- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);117+ __ubuf__ uint16_t* dst, __gm__ uint16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
118+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
113 119 
114__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint16_t* dst, __gm__ uint16_t* src, uint32_t size);120__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint16_t* dst, __gm__ uint16_t* src, uint32_t size);
115 121 
116__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ uint16_t* dst, __gm__ uint16_t* src, uint32_t size);122__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ uint16_t* dst, __gm__ uint16_t* src, uint32_t size);
117 123 
118-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ float* dst, __gm__ float* src, uint16_t n_burst, uint32_t len_burst,124+__aicore__ inline void asc_copy_gm2ub_align(
119- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);125+ __ubuf__ float* dst, __gm__ float* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
126+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
120 127 
121__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ float* dst, __gm__ float* src, uint32_t size);128__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ float* dst, __gm__ float* src, uint32_t size);
122 129 
123__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ float* dst, __gm__ float* src, uint32_t size);130__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ float* dst, __gm__ float* src, uint32_t size);
124 131 
125-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int32_t* dst, __gm__ int32_t* src, uint16_t n_burst, uint32_t len_burst,132+__aicore__ inline void asc_copy_gm2ub_align(
126- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);133+ __ubuf__ int32_t* dst, __gm__ int32_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
134+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
127 135 
128__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int32_t* dst, __gm__ int32_t* src, uint32_t size);136__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int32_t* dst, __gm__ int32_t* src, uint32_t size);
129 137 
130__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ int32_t* dst, __gm__ int32_t* src, uint32_t size);138__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ int32_t* dst, __gm__ int32_t* src, uint32_t size);
131 139 
132-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint32_t* dst, __gm__ uint32_t* src, uint16_t n_burst, uint32_t len_burst,140+__aicore__ inline void asc_copy_gm2ub_align(
133- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);141+ __ubuf__ uint32_t* dst, __gm__ uint32_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
142+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
134 143 
135__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint32_t* dst, __gm__ uint32_t* src, uint32_t size);144__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint32_t* dst, __gm__ uint32_t* src, uint32_t size);
136 145 
137__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ uint32_t* dst, __gm__ uint32_t* src, uint32_t size);146__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ uint32_t* dst, __gm__ uint32_t* src, uint32_t size);
138 147 
139-//asc_copy_ub2gm_align148+// asc_copy_ub2gm_align
140-__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint16_t n_burst, uint32_t len_burst,149+__aicore__ inline void asc_copy_ub2gm_align(
141- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);150+ __gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
151+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
142 152 
143-__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint32_t size);153+__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint32_t size);
144 154 
145__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint32_t size);155__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint32_t size);
146 156 
147-__aicore__ inline void asc_copy_ub2gm_align(__gm__ int8_t* dst, __ubuf__ int8_t* src, uint16_t n_burst, uint32_t len_burst,157+__aicore__ inline void asc_copy_ub2gm_align(
148- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);158+ __gm__ int8_t* dst, __ubuf__ int8_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
159+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
149 160 
150-__aicore__ inline void asc_copy_ub2gm_align(__gm__ int8_t* dst, __ubuf__ int8_t* src, uint32_t size);161+__aicore__ inline void asc_copy_ub2gm_align(__gm__ int8_t* dst, __ubuf__ int8_t* src, uint32_t size);
151 162 
152__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int8_t* dst, __ubuf__ int8_t* src, uint32_t size);163__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int8_t* dst, __ubuf__ int8_t* src, uint32_t size);
153 164 
154-__aicore__ inline void asc_copy_ub2gm_align(__gm__ half* dst, __ubuf__ half* src, uint16_t n_burst, uint32_t len_burst,165+__aicore__ inline void asc_copy_ub2gm_align(
155- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);166+ __gm__ half* dst, __ubuf__ half* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
167+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
156 168 
157-__aicore__ inline void asc_copy_ub2gm_align(__gm__ half* dst, __ubuf__ half* src, uint32_t size);169+__aicore__ inline void asc_copy_ub2gm_align(__gm__ half* dst, __ubuf__ half* src, uint32_t size);
158 170 
159__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ half* dst, __ubuf__ half* src, uint32_t size);171__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ half* dst, __ubuf__ half* src, uint32_t size);
160 172 
161-__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint16_t* dst, __ubuf__ uint16_t* src, uint16_t n_burst, uint32_t len_burst,173+__aicore__ inline void asc_copy_ub2gm_align(
162- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);174+ __gm__ uint16_t* dst, __ubuf__ uint16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
175+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
163 176 
164-__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint16_t* dst, __ubuf__ uint16_t* src, uint32_t size);177+__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint16_t* dst, __ubuf__ uint16_t* src, uint32_t size);
165 178 
166__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint16_t* dst, __ubuf__ uint16_t* src, uint32_t size);179__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint16_t* dst, __ubuf__ uint16_t* src, uint32_t size);
167 180 
168-__aicore__ inline void asc_copy_ub2gm_align(__gm__ int16_t* dst, __ubuf__ int16_t* src, uint16_t n_burst, uint32_t len_burst,181+__aicore__ inline void asc_copy_ub2gm_align(
169- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);182+ __gm__ int16_t* dst, __ubuf__ int16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
183+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
170 184 
171-__aicore__ inline void asc_copy_ub2gm_align(__gm__ int16_t* dst, __ubuf__ int16_t* src, uint32_t size);185+__aicore__ inline void asc_copy_ub2gm_align(__gm__ int16_t* dst, __ubuf__ int16_t* src, uint32_t size);
172 186 
173__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int16_t* dst, __ubuf__ int16_t* src, uint32_t size);187__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int16_t* dst, __ubuf__ int16_t* src, uint32_t size);
174 188 
175-__aicore__ inline void asc_copy_ub2gm_align(__gm__ bfloat16_t* dst, __ubuf__ bfloat16_t* src, uint16_t n_burst, uint32_t len_burst,189+__aicore__ inline void asc_copy_ub2gm_align(
176- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);190+ __gm__ bfloat16_t* dst, __ubuf__ bfloat16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
191+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
177 192 
178-__aicore__ inline void asc_copy_ub2gm_align(__gm__ bfloat16_t* dst, __ubuf__ bfloat16_t* src, uint32_t size);193+__aicore__ inline void asc_copy_ub2gm_align(__gm__ bfloat16_t* dst, __ubuf__ bfloat16_t* src, uint32_t size);
179 194 
180__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ bfloat16_t* dst, __ubuf__ bfloat16_t* src, uint32_t size);195__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ bfloat16_t* dst, __ubuf__ bfloat16_t* src, uint32_t size);
181 196 
182-__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint32_t* dst, __ubuf__ uint32_t* src, uint16_t n_burst, uint32_t len_burst,197+__aicore__ inline void asc_copy_ub2gm_align(
183- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);198+ __gm__ uint32_t* dst, __ubuf__ uint32_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
199+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
184 200 
185-__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint32_t* dst, __ubuf__ uint32_t* src, uint32_t size);201+__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint32_t* dst, __ubuf__ uint32_t* src, uint32_t size);
186 202 
187__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint32_t* dst, __ubuf__ uint32_t* src, uint32_t size);203__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint32_t* dst, __ubuf__ uint32_t* src, uint32_t size);
188 204 
189-__aicore__ inline void asc_copy_ub2gm_align(__gm__ float* dst, __ubuf__ float* src, uint16_t n_burst, uint32_t len_burst,205+__aicore__ inline void asc_copy_ub2gm_align(
190- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);206+ __gm__ float* dst, __ubuf__ float* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
207+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
191 208 
192-__aicore__ inline void asc_copy_ub2gm_align(__gm__ float* dst, __ubuf__ float* src, uint32_t size);209+__aicore__ inline void asc_copy_ub2gm_align(__gm__ float* dst, __ubuf__ float* src, uint32_t size);
193 210 
194__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ float* dst, __ubuf__ float* src, uint32_t size);211__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ float* dst, __ubuf__ float* src, uint32_t size);
195 212 
196-__aicore__ inline void asc_copy_ub2gm_align(__gm__ int32_t* dst, __ubuf__ int32_t* src, uint16_t n_burst, uint32_t len_burst,213+__aicore__ inline void asc_copy_ub2gm_align(
197- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);214+ __gm__ int32_t* dst, __ubuf__ int32_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
215+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
198 216 
199-__aicore__ inline void asc_copy_ub2gm_align(__gm__ int32_t* dst, __ubuf__ int32_t* src, uint32_t size);217+__aicore__ inline void asc_copy_ub2gm_align(__gm__ int32_t* dst, __ubuf__ int32_t* src, uint32_t size);
200 218 
201__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int32_t* dst, __ubuf__ int32_t* src, uint32_t size);219__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int32_t* dst, __ubuf__ int32_t* src, uint32_t size);
202 220 
203-__aicore__ inline void asc_copy_ub2gm_align(__gm__ double* dst, __ubuf__ double* src, uint16_t n_burst, uint32_t len_burst,221+__aicore__ inline void asc_copy_ub2gm_align(
204- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);222+ __gm__ double* dst, __ubuf__ double* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
223+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
205 224 
206-__aicore__ inline void asc_copy_ub2gm_align(__gm__ double* dst, __ubuf__ double* src, uint32_t size);225+__aicore__ inline void asc_copy_ub2gm_align(__gm__ double* dst, __ubuf__ double* src, uint32_t size);
207 226 
208__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ double* dst, __ubuf__ double* src, uint32_t size);227__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ double* dst, __ubuf__ double* src, uint32_t size);
209 228 
210-__aicore__ inline void asc_copy_ub2gm_align(__gm__ int64_t* dst, __ubuf__ int64_t* src, uint16_t n_burst, uint32_t len_burst,229+__aicore__ inline void asc_copy_ub2gm_align(
211- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);230+ __gm__ int64_t* dst, __ubuf__ int64_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
231+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
212 232 
213-__aicore__ inline void asc_copy_ub2gm_align(__gm__ int64_t* dst, __ubuf__ int64_t* src, uint32_t size);233+__aicore__ inline void asc_copy_ub2gm_align(__gm__ int64_t* dst, __ubuf__ int64_t* src, uint32_t size);
214 234 
215__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int64_t* dst, __ubuf__ int64_t* src, uint32_t size);235__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int64_t* dst, __ubuf__ int64_t* src, uint32_t size);
216 236 
217-__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint64_t* dst, __ubuf__ uint64_t* src, uint16_t n_burst, uint32_t len_burst,237+__aicore__ inline void asc_copy_ub2gm_align(
218- uint8_t left_padding_num, uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);238+ __gm__ uint64_t* dst, __ubuf__ uint64_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
239+ uint8_t right_padding_num, uint32_t src_gap, uint32_t dst_gap);
219 240 
220-__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint64_t* dst, __ubuf__ uint64_t* src, uint32_t size);241+__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint64_t* dst, __ubuf__ uint64_t* src, uint32_t size);
221 242 
222__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint64_t* dst, __ubuf__ uint64_t* src, uint32_t size);243__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint64_t* dst, __ubuf__ uint64_t* src, uint32_t size);
223 244 
224#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510)245#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510)
225 246 
226// ==========asc_copy_gm2ub==========247// ==========asc_copy_gm2ub==========
227-__aicore__ inline void asc_copy_gm2ub(__ubuf__ void* dst, __gm__ void* src,248+__aicore__ inline void asc_copy_gm2ub(
228- uint16_t n_burst, uint16_t len_burst, uint16_t src_stride, uint16_t dst_stride);249+ __ubuf__ void* dst, __gm__ void* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_stride,
250+ uint16_t dst_stride);
229 251 
230__aicore__ inline void asc_copy_gm2ub(__ubuf__ void* dst, __gm__ void* src, uint32_t size);252__aicore__ inline void asc_copy_gm2ub(__ubuf__ void* dst, __gm__ void* src, uint32_t size);
231 253 
@@ -234,47 +256,72 @@ __aicore__ inline void asc_copy_gm2ub_sync(__ubuf__ void* dst, __gm__ void* src,
234// ==========asc_copy_ub2gm==========256// ==========asc_copy_ub2gm==========
235__aicore__ inline void asc_copy_ub2gm(__gm__ void* dst, __ubuf__ void* src, uint32_t size);257__aicore__ inline void asc_copy_ub2gm(__gm__ void* dst, __ubuf__ void* src, uint32_t size);
236 258 
237-__aicore__ inline void asc_copy_ub2gm(__gm__ void* dst, __ubuf__ void* src,259+__aicore__ inline void asc_copy_ub2gm(
238- uint16_t n_burst, uint16_t len_burst, uint16_t dst_stride, uint16_t src_stride);260+ __gm__ void* dst, __ubuf__ void* src, uint16_t n_burst, uint16_t len_burst, uint16_t dst_stride,
261+ uint16_t src_stride);
239 262 
240__aicore__ inline void asc_copy_ub2gm_sync(__gm__ void* dst, __ubuf__ void* src, uint32_t size);263__aicore__ inline void asc_copy_ub2gm_sync(__gm__ void* dst, __ubuf__ void* src, uint32_t size);
241 264 
242// ==========asc_copy_gm2ub_align(int8_t/uint8_t/fp8_e5m2_t/fp8_e4m3fn_t/hifloat8_t/int16_t/uint16_t/half/bfloat16_t/int32_t/uint32_t/float)==========265// ==========asc_copy_gm2ub_align(int8_t/uint8_t/fp8_e5m2_t/fp8_e4m3fn_t/hifloat8_t/int16_t/uint16_t/half/bfloat16_t/int32_t/uint32_t/float)==========
243-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint16_t n_burst, uint32_t len_burst,266+__aicore__ inline void asc_copy_gm2ub_align(
244- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);267+ __ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
268+ uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride,
269+ uint32_t dst_stride);
245 270 
246-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int8_t* dst, __gm__ int8_t* src, uint16_t n_burst, uint32_t len_burst,271+__aicore__ inline void asc_copy_gm2ub_align(
247- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);272+ __ubuf__ int8_t* dst, __gm__ int8_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
273+ uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride,
274+ uint32_t dst_stride);
248 275 
249-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint16_t* dst, __gm__ uint16_t* src, uint16_t n_burst, uint32_t len_burst,276+__aicore__ inline void asc_copy_gm2ub_align(
250- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);277+ __ubuf__ uint16_t* dst, __gm__ uint16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
278+ uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride,
279+ uint32_t dst_stride);
251 280 
252-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int16_t* dst, __gm__ int16_t* src, uint16_t n_burst, uint32_t len_burst,281+__aicore__ inline void asc_copy_gm2ub_align(
253- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);282+ __ubuf__ int16_t* dst, __gm__ int16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
283+ uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride,
284+ uint32_t dst_stride);
254 285 
255-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint32_t* dst, __gm__ uint32_t* src, uint16_t n_burst, uint32_t len_burst,286+__aicore__ inline void asc_copy_gm2ub_align(
256- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);287+ __ubuf__ uint32_t* dst, __gm__ uint32_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
288+ uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride,
289+ uint32_t dst_stride);
257 290 
258-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ int32_t* dst, __gm__ int32_t* src, uint16_t n_burst, uint32_t len_burst,291+__aicore__ inline void asc_copy_gm2ub_align(
259- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);292+ __ubuf__ int32_t* dst, __gm__ int32_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
293+ uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride,
294+ uint32_t dst_stride);
260 295 
261-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ half* dst, __gm__ half* src, uint16_t n_burst, uint32_t len_burst,296+__aicore__ inline void asc_copy_gm2ub_align(
262- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);297+ __ubuf__ half* dst, __gm__ half* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
298+ uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride,
299+ uint32_t dst_stride);
263 300 
264-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ float* dst, __gm__ float* src, uint16_t n_burst, uint32_t len_burst,301+__aicore__ inline void asc_copy_gm2ub_align(
265- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);302+ __ubuf__ float* dst, __gm__ float* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
303+ uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride,
304+ uint32_t dst_stride);
266 305 
267-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ hifloat8_t* dst, __gm__ hifloat8_t* src, uint16_t n_burst, uint32_t len_burst,306+__aicore__ inline void asc_copy_gm2ub_align(
268- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);307+ __ubuf__ hifloat8_t* dst, __gm__ hifloat8_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
308+ uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride,
309+ uint32_t dst_stride);
269 310 
270-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint16_t n_burst, uint32_t len_burst,311+__aicore__ inline void asc_copy_gm2ub_align(
271- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);312+ __ubuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
313+ uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride,
314+ uint32_t dst_stride);
272 315 
273-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ fp8_e5m2_t* dst, __gm__ fp8_e5m2_t* src, uint16_t n_burst, uint32_t len_burst,316+__aicore__ inline void asc_copy_gm2ub_align(
274- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);317+ __ubuf__ fp8_e5m2_t* dst, __gm__ fp8_e5m2_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t left_padding_num,
318+ uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride,
319+ uint32_t dst_stride);
275 320 
276-__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ fp8_e4m3fn_t* dst, __gm__ fp8_e4m3fn_t* src, uint16_t n_burst, uint32_t len_burst,321+__aicore__ inline void asc_copy_gm2ub_align(
277- uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode, uint64_t src_stride, uint32_t dst_stride);322+ __ubuf__ fp8_e4m3fn_t* dst, __gm__ fp8_e4m3fn_t* src, uint16_t n_burst, uint32_t len_burst,
323+ uint8_t left_padding_num, uint8_t right_padding_num, bool enable_constant_pad, uint8_t l2_cache_mode,
324+ uint64_t src_stride, uint32_t dst_stride);
278 325 
279__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t size);326__aicore__ inline void asc_copy_gm2ub_align(__ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t size);
280__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t size);327__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t size);
@@ -302,41 +349,53 @@ __aicore__ inline void asc_copy_gm2ub_align(__ubuf__ fp8_e4m3fn_t* dst, __gm__ f
302__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ fp8_e4m3fn_t* dst, __gm__ fp8_e4m3fn_t* src, uint32_t size);349__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ fp8_e4m3fn_t* dst, __gm__ fp8_e4m3fn_t* src, uint32_t size);
303 350 
304// ==========asc_copy_ub2gm_align(int8_t/uint8_t/fp8_e5m2_t/fp8_e4m3fn_t/hifloat8_t/int16_t/uint16_t/half/bfloat16_t/int32_t/uint32_t/float)==========351// ==========asc_copy_ub2gm_align(int8_t/uint8_t/fp8_e5m2_t/fp8_e4m3fn_t/hifloat8_t/int16_t/uint16_t/half/bfloat16_t/int32_t/uint32_t/float)==========
305-__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint16_t n_burst, uint32_t len_burst,352+__aicore__ inline void asc_copy_ub2gm_align(
306- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);353+ __gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
354+ uint64_t dst_stride, uint32_t src_stride);
307 355 
308-__aicore__ inline void asc_copy_ub2gm_align(__gm__ int8_t* dst, __ubuf__ int8_t* src, uint16_t n_burst, uint32_t len_burst,356+__aicore__ inline void asc_copy_ub2gm_align(
309- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);357+ __gm__ int8_t* dst, __ubuf__ int8_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
358+ uint64_t dst_stride, uint32_t src_stride);
310 359 
311-__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint16_t* dst, __ubuf__ uint16_t* src, uint16_t n_burst, uint32_t len_burst,360+__aicore__ inline void asc_copy_ub2gm_align(
312- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);361+ __gm__ uint16_t* dst, __ubuf__ uint16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
362+ uint64_t dst_stride, uint32_t src_stride);
313 363 
314-__aicore__ inline void asc_copy_ub2gm_align(__gm__ int16_t* dst, __ubuf__ int16_t* src, uint16_t n_burst, uint32_t len_burst,364+__aicore__ inline void asc_copy_ub2gm_align(
315- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);365+ __gm__ int16_t* dst, __ubuf__ int16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
366+ uint64_t dst_stride, uint32_t src_stride);
316 367 
317-__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint32_t* dst, __ubuf__ uint32_t* src, uint16_t n_burst, uint32_t len_burst,368+__aicore__ inline void asc_copy_ub2gm_align(
318- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);369+ __gm__ uint32_t* dst, __ubuf__ uint32_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
370+ uint64_t dst_stride, uint32_t src_stride);
319 371 
320-__aicore__ inline void asc_copy_ub2gm_align(__gm__ int32_t* dst, __ubuf__ int32_t* src, uint16_t n_burst, uint32_t len_burst,372+__aicore__ inline void asc_copy_ub2gm_align(
321- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);373+ __gm__ int32_t* dst, __ubuf__ int32_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
374+ uint64_t dst_stride, uint32_t src_stride);
322 375 
323-__aicore__ inline void asc_copy_ub2gm_align(__gm__ half* dst, __ubuf__ half* src, uint16_t n_burst, uint32_t len_burst,376+__aicore__ inline void asc_copy_ub2gm_align(
324- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);377+ __gm__ half* dst, __ubuf__ half* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
378+ uint64_t dst_stride, uint32_t src_stride);
325 379 
326-__aicore__ inline void asc_copy_ub2gm_align(__gm__ float* dst, __ubuf__ float* src, uint16_t n_burst, uint32_t len_burst,380+__aicore__ inline void asc_copy_ub2gm_align(
327- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);381+ __gm__ float* dst, __ubuf__ float* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
382+ uint64_t dst_stride, uint32_t src_stride);
328 383 
329-__aicore__ inline void asc_copy_ub2gm_align(__gm__ hifloat8_t* dst, __ubuf__ hifloat8_t* src, uint16_t n_burst, uint32_t len_burst,384+__aicore__ inline void asc_copy_ub2gm_align(
330- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);385+ __gm__ hifloat8_t* dst, __ubuf__ hifloat8_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
386+ uint64_t dst_stride, uint32_t src_stride);
331 387 
332-__aicore__ inline void asc_copy_ub2gm_align(__gm__ bfloat16_t* dst, __ubuf__ bfloat16_t* src, uint16_t n_burst, uint32_t len_burst,388+__aicore__ inline void asc_copy_ub2gm_align(
333- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);389+ __gm__ bfloat16_t* dst, __ubuf__ bfloat16_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
390+ uint64_t dst_stride, uint32_t src_stride);
334 391 
335-__aicore__ inline void asc_copy_ub2gm_align(__gm__ fp8_e5m2_t* dst, __ubuf__ fp8_e5m2_t* src, uint16_t n_burst, uint32_t len_burst,392+__aicore__ inline void asc_copy_ub2gm_align(
336- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);393+ __gm__ fp8_e5m2_t* dst, __ubuf__ fp8_e5m2_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
394+ uint64_t dst_stride, uint32_t src_stride);
337 395 
338-__aicore__ inline void asc_copy_ub2gm_align(__gm__ fp8_e4m3fn_t* dst, __ubuf__ fp8_e4m3fn_t* src, uint16_t n_burst, uint32_t len_burst,396+__aicore__ inline void asc_copy_ub2gm_align(
339- uint8_t l2_cache_mode, uint64_t dst_stride, uint32_t src_stride);397+ __gm__ fp8_e4m3fn_t* dst, __ubuf__ fp8_e4m3fn_t* src, uint16_t n_burst, uint32_t len_burst, uint8_t l2_cache_mode,
398+ uint64_t dst_stride, uint32_t src_stride);
340 399 
341__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint32_t size);400__aicore__ inline void asc_copy_ub2gm_align(__gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint32_t size);
342__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint32_t size);401__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint32_t size);
@@ -409,76 +468,90 @@ __aicore__ inline void asc_set_ndim_pad_value(uint32_t pad_value);
409__aicore__ inline void asc_set_ndim_pad_value(float pad_value);468__aicore__ inline void asc_set_ndim_pad_value(float pad_value);
410 469 
411//===========asc_ndim_copy_gm2ub(int8/uint8/e2m1/e1m2/e8m0/e5m2/e4m3fn/int16/uint16/half/bfloat16/int32/uint32/float)===========470//===========asc_ndim_copy_gm2ub(int8/uint8/e2m1/e1m2/e8m0/e5m2/e4m3fn/int16/uint16/half/bfloat16/int32/uint32/float)===========
412-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ int8_t* dst, __gm__ int8_t* src,471+__aicore__ inline void asc_ndim_copy_gm2ub(
413- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,472+ __ubuf__ int8_t* dst, __gm__ int8_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
414- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);473+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
474+ uint8_t cache_mode);
415 475 
416-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ uint8_t* dst, __gm__ uint8_t* src,476+__aicore__ inline void asc_ndim_copy_gm2ub(
417- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,477+ __ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
418- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);478+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
479+ uint8_t cache_mode);
419 480 
420-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ fp4x2_e2m1_t* dst, __gm__ fp4x2_e2m1_t* src,481+__aicore__ inline void asc_ndim_copy_gm2ub(
421- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,482+ __ubuf__ fp4x2_e2m1_t* dst, __gm__ fp4x2_e2m1_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
422- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);483+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
484+ uint8_t cache_mode);
423 485 
424-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ fp4x2_e1m2_t* dst, __gm__ fp4x2_e1m2_t* src,486+__aicore__ inline void asc_ndim_copy_gm2ub(
425- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,487+ __ubuf__ fp4x2_e1m2_t* dst, __gm__ fp4x2_e1m2_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
426- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);488+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
489+ uint8_t cache_mode);
427 490 
428-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ fp8_e8m0_t* dst, __gm__ fp8_e8m0_t* src,491+__aicore__ inline void asc_ndim_copy_gm2ub(
429- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,492+ __ubuf__ fp8_e8m0_t* dst, __gm__ fp8_e8m0_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
430- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);493+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
494+ uint8_t cache_mode);
431 495 
432-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ fp8_e5m2_t* dst, __gm__ fp8_e5m2_t* src,496+__aicore__ inline void asc_ndim_copy_gm2ub(
433- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,497+ __ubuf__ fp8_e5m2_t* dst, __gm__ fp8_e5m2_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
434- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);498+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
499+ uint8_t cache_mode);
435 500 
436-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ fp8_e4m3fn_t* dst, __gm__ fp8_e4m3fn_t* src,501+__aicore__ inline void asc_ndim_copy_gm2ub(
437- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,502+ __ubuf__ fp8_e4m3fn_t* dst, __gm__ fp8_e4m3fn_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
438- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);503+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
504+ uint8_t cache_mode);
439 505 
440-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ int16_t* dst, __gm__ int16_t* src,506+__aicore__ inline void asc_ndim_copy_gm2ub(
441- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,507+ __ubuf__ int16_t* dst, __gm__ int16_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
442- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);508+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
509+ uint8_t cache_mode);
443 510 
444-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ uint16_t* dst, __gm__ uint16_t* src,511+__aicore__ inline void asc_ndim_copy_gm2ub(
445- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,512+ __ubuf__ uint16_t* dst, __gm__ uint16_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
446- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);513+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
514+ uint8_t cache_mode);
447 515 
448-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ half* dst, __gm__ half* src,516+__aicore__ inline void asc_ndim_copy_gm2ub(
449- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,517+ __ubuf__ half* dst, __gm__ half* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
450- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);518+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
519+ uint8_t cache_mode);
451 520 
452-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ bfloat16_t* dst, __gm__ bfloat16_t* src,521+__aicore__ inline void asc_ndim_copy_gm2ub(
453- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,522+ __ubuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
454- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);523+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
524+ uint8_t cache_mode);
455 525 
456-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ int32_t* dst, __gm__ int32_t* src,526+__aicore__ inline void asc_ndim_copy_gm2ub(
457- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,527+ __ubuf__ int32_t* dst, __gm__ int32_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
458- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);528+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
529+ uint8_t cache_mode);
459 530 
460-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ uint32_t* dst, __gm__ uint32_t* src,531+__aicore__ inline void asc_ndim_copy_gm2ub(
461- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,532+ __ubuf__ uint32_t* dst, __gm__ uint32_t* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
462- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);533+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
534+ uint8_t cache_mode);
463 535 
464-__aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ float* dst, __gm__ float* src,536+__aicore__ inline void asc_ndim_copy_gm2ub(
465- uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,537+ __ubuf__ float* dst, __gm__ float* src, uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size,
466- uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);538+ uint32_t loop3_size, uint32_t loop4_size, uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode,
539+ uint8_t cache_mode);
467 540 
468//======asc_ndim_copy_dci=====541//======asc_ndim_copy_dci=====
469__aicore__ inline void asc_ndim_copy_dci();542__aicore__ inline void asc_ndim_copy_dci();
470 543 
471//======asc_copy_ub2l1=======544//======asc_copy_ub2l1=======
472-__aicore__ inline void asc_copy_ub2l1(__cbuf__ void* dst, __ubuf__ void* src,545+__aicore__ inline void asc_copy_ub2l1(
473- uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);546+ __cbuf__ void* dst, __ubuf__ void* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);
474 547 
475__aicore__ inline void asc_copy_ub2l1(__cbuf__ void* dst, __ubuf__ void* src, uint32_t size);548__aicore__ inline void asc_copy_ub2l1(__cbuf__ void* dst, __ubuf__ void* src, uint32_t size);
476 549 
477__aicore__ inline void asc_copy_ub2l1_sync(__cbuf__ void* dst, __ubuf__ void* src, uint32_t size);550__aicore__ inline void asc_copy_ub2l1_sync(__cbuf__ void* dst, __ubuf__ void* src, uint32_t size);
478 551 
479//======asc_copy_ub2ub=======552//======asc_copy_ub2ub=======
480-__aicore__ inline void asc_copy_ub2ub(__ubuf__ void* dst, __ubuf__ void* src,553+__aicore__ inline void asc_copy_ub2ub(
481- uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);554+ __ubuf__ void* dst, __ubuf__ void* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);
482 555 
483__aicore__ inline void asc_copy_ub2ub(__ubuf__ void* dst, __ubuf__ void* src, uint32_t size);556__aicore__ inline void asc_copy_ub2ub(__ubuf__ void* dst, __ubuf__ void* src, uint32_t size);
484 557 
@@ -486,8 +559,8 @@ __aicore__ inline void asc_copy_ub2ub_sync(__ubuf__ void* dst, __ubuf__ void* sr
486 559 
487//======asc_set_gm2ub_pad=======560//======asc_set_gm2ub_pad=======
488[[deprecated("NOTICE: asc_set_gm2ub_pad is deprecated. "561[[deprecated("NOTICE: asc_set_gm2ub_pad is deprecated. "
489- "Please use asc_set_copy_pad_val instead for pad value setting")]]562+ "Please use asc_set_copy_pad_val instead for pad value setting")]] __aicore__ inline void
490-__aicore__ inline void asc_set_gm2ub_pad(uint32_t pad_val);563+asc_set_gm2ub_pad(uint32_t pad_val);
491 564 
492#endif565#endif
493 566 
Minclude/kernel_operator.h+8-8
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2025 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/*!11/*!
12 * \file kernel_operator.h12 * \file kernel_operator.h
Minclude/simt_api/asc_bf16.h+59-46
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_SIMT_API_ASC_BF16_H11#ifndef INCLUDE_SIMT_API_ASC_BF16_H
12#define INCLUDE_SIMT_API_ASC_BF16_H12#define INCLUDE_SIMT_API_ASC_BF16_H
@@ -298,41 +298,43 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t __lows2bfloat162(const bfloat
298__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __bfloat1622float2(const bfloat16x2_t x);298__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __bfloat1622float2(const bfloat16x2_t x);
299 299 
300#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__300#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__
301-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(__ubuf__ bfloat16_t *address, bfloat16_t val);301+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(__ubuf__ bfloat16_t* address, bfloat16_t val);
302 302 
303-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(__ubuf__ bfloat16x2_t *address, bfloat16x2_t val);303+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(__ubuf__ bfloat16x2_t* address, bfloat16x2_t val);
304 304 
305-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(__gm__ bfloat16_t *address, bfloat16_t val);305+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(__gm__ bfloat16_t* address, bfloat16_t val);
306 306 
307-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(__gm__ bfloat16x2_t *address, bfloat16x2_t val);307+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(__gm__ bfloat16x2_t* address, bfloat16x2_t val);
308 308 
309-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(__ubuf__ bfloat16x2_t *address, bfloat16x2_t val);309+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(__ubuf__ bfloat16x2_t* address, bfloat16x2_t val);
310 310 
311-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(__gm__ bfloat16x2_t *address, bfloat16x2_t val);311+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(__gm__ bfloat16x2_t* address, bfloat16x2_t val);
312 312 
313-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(__ubuf__ bfloat16x2_t *address, bfloat16x2_t val);313+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(__ubuf__ bfloat16x2_t* address, bfloat16x2_t val);
314 314 
315-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(__gm__ bfloat16x2_t *address, bfloat16x2_t val);315+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(__gm__ bfloat16x2_t* address, bfloat16x2_t val);
316 316 
317-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(__ubuf__ bfloat16_t *address, bfloat16_t val);317+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(__ubuf__ bfloat16_t* address, bfloat16_t val);
318 318 
319-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(__ubuf__ bfloat16x2_t *address, bfloat16x2_t val);319+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(__ubuf__ bfloat16x2_t* address, bfloat16x2_t val);
320 320 
321-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(__gm__ bfloat16_t *address, bfloat16_t val);321+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(__gm__ bfloat16_t* address, bfloat16_t val);
322 322 
323-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(__gm__ bfloat16x2_t *address, bfloat16x2_t val);323+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(__gm__ bfloat16x2_t* address, bfloat16x2_t val);
324 324 
325-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(__ubuf__ bfloat16_t *address, bfloat16_t val);325+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(__ubuf__ bfloat16_t* address, bfloat16_t val);
326 326 
327-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(__ubuf__ bfloat16x2_t *address, bfloat16x2_t val);327+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(__ubuf__ bfloat16x2_t* address, bfloat16x2_t val);
328 328 
329-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(__gm__ bfloat16_t *address, bfloat16_t val);329+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(__gm__ bfloat16_t* address, bfloat16_t val);
330 330 
331-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(__gm__ bfloat16x2_t *address, bfloat16x2_t val);331+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(__gm__ bfloat16x2_t* address, bfloat16x2_t val);
332 332 
333-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(__ubuf__ bfloat16x2_t *address, bfloat16x2_t compare, bfloat16x2_t val);333+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(
334+ __ubuf__ bfloat16x2_t* address, bfloat16x2_t compare, bfloat16x2_t val);
334 335 
335-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(__gm__ bfloat16x2_t *address, bfloat16x2_t compare, bfloat16x2_t val);336+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(
337+ __gm__ bfloat16x2_t* address, bfloat16x2_t compare, bfloat16x2_t val);
336 338 
337__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_ldcg(__gm__ bfloat16_t* address);339__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_ldcg(__gm__ bfloat16_t* address);
338 340 
@@ -352,23 +354,24 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ bfloat16x2_t* address
352 354 
353#else355#else
354#ifndef ASCENDC_CPU_DEBUG356#ifndef ASCENDC_CPU_DEBUG
355-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(bfloat16_t *address, bfloat16_t val);357+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_add(bfloat16_t* address, bfloat16_t val);
356 358 
357-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(bfloat16x2_t *address, bfloat16x2_t val);359+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_add(bfloat16x2_t* address, bfloat16x2_t val);
358 360 
359-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(bfloat16x2_t *address, bfloat16x2_t val);361+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_sub(bfloat16x2_t* address, bfloat16x2_t val);
360 362 
361-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(bfloat16x2_t *address, bfloat16x2_t val);363+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_exch(bfloat16x2_t* address, bfloat16x2_t val);
362 364 
363-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(bfloat16_t *address, bfloat16_t val);365+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_max(bfloat16_t* address, bfloat16_t val);
364 366 
365-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(bfloat16x2_t *address, bfloat16x2_t val);367+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_max(bfloat16x2_t* address, bfloat16x2_t val);
366 368 
367-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(bfloat16_t *address, bfloat16_t val);369+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_atomic_min(bfloat16_t* address, bfloat16_t val);
368 370 
369-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(bfloat16x2_t *address, bfloat16x2_t val);371+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_min(bfloat16x2_t* address, bfloat16x2_t val);
370 372 
371-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(bfloat16x2_t *address, bfloat16x2_t compare, bfloat16x2_t val);373+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_atomic_cas(
374+ bfloat16x2_t* address, bfloat16x2_t compare, bfloat16x2_t val);
372#endif375#endif
373 376 
374__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_ldcg(bfloat16_t* address);377__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_ldcg(bfloat16_t* address);
@@ -390,19 +393,25 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(bfloat16x2_t* address, bfloa
390 393 
391__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_shfl(bfloat16_t var, int32_t src_lane, int32_t width = warpSize);394__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_shfl(bfloat16_t var, int32_t src_lane, int32_t width = warpSize);
392 395 
393-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_shfl(bfloat16x2_t var, int32_t src_lane, int32_t width = warpSize);396+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_shfl(
397+ bfloat16x2_t var, int32_t src_lane, int32_t width = warpSize);
394 398 
395__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_shfl_up(bfloat16_t var, uint32_t delta, int32_t width = warpSize);399__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_shfl_up(bfloat16_t var, uint32_t delta, int32_t width = warpSize);
396 400 
397-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_shfl_up(bfloat16x2_t var, uint32_t delta, int32_t width = warpSize);401+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_shfl_up(
402+ bfloat16x2_t var, uint32_t delta, int32_t width = warpSize);
398 403 
399-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_shfl_down(bfloat16_t var, uint32_t delta, int32_t width = warpSize);404+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_shfl_down(
405+ bfloat16_t var, uint32_t delta, int32_t width = warpSize);
400 406 
401-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_shfl_down(bfloat16x2_t var, uint32_t delta, int32_t width = warpSize);407+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_shfl_down(
408+ bfloat16x2_t var, uint32_t delta, int32_t width = warpSize);
402 409 
403-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_shfl_xor(bfloat16_t var, int32_t lane_mask, int32_t width = warpSize);410+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16_t asc_shfl_xor(
411+ bfloat16_t var, int32_t lane_mask, int32_t width = warpSize);
404 412 
405-__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_shfl_xor(bfloat16x2_t var, int32_t lane_mask, int32_t width = warpSize);413+__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t asc_shfl_xor(
414+ bfloat16x2_t var, int32_t lane_mask, int32_t width = warpSize);
406 415 
407__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t make_bfloat162(bfloat16_t x, bfloat16_t y);416__SIMT_DEVICE_FUNCTIONS_DECL__ inline bfloat16x2_t make_bfloat162(bfloat16_t x, bfloat16_t y);
408 417 
@@ -516,7 +525,8 @@ static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hdivx2(const bfloat16x2_t x
516 525 
517static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __habsx2(const bfloat16x2_t x);526static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __habsx2(const bfloat16x2_t x);
518 527 
519-static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hfmax2(const bfloat16x2_t x, const bfloat16x2_t y, const bfloat16x2_t z);528+static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t
529+__hfmax2(const bfloat16x2_t x, const bfloat16x2_t y, const bfloat16x2_t z);
520 530 
521static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hnegx2(const bfloat16x2_t x);531static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hnegx2(const bfloat16x2_t x);
522 532 
@@ -534,7 +544,8 @@ static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16_t __hmax_nan(const bfloat16_t x,
534 544 
535static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16_t __hmin_nan(const bfloat16_t x, const bfloat16_t y);545static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16_t __hmin_nan(const bfloat16_t x, const bfloat16_t y);
536 546 
537-static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16_t __hfma_relu(const bfloat16_t x, const bfloat16_t y, const bfloat16_t z);547+static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16_t
548+__hfma_relu(const bfloat16_t x, const bfloat16_t y, const bfloat16_t z);
538 549 
539static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hmaxx2(const bfloat16x2_t x, const bfloat16x2_t y);550static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hmaxx2(const bfloat16x2_t x, const bfloat16x2_t y);
540 551 
@@ -544,9 +555,11 @@ static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hmaxx2_nan(const bfloat16x2
544 555 
545static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hminx2_nan(const bfloat16x2_t x, const bfloat16x2_t y);556static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hminx2_nan(const bfloat16x2_t x, const bfloat16x2_t y);
546 557 
547-static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hfmax2_relu(const bfloat16x2_t x, const bfloat16x2_t y, const bfloat16x2_t z);558+static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t
559+__hfmax2_relu(const bfloat16x2_t x, const bfloat16x2_t y, const bfloat16x2_t z);
548 560 
549-static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hcmadd(const bfloat16x2_t x, const bfloat16x2_t y, const bfloat16x2_t z);561+static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t
562+__hcmadd(const bfloat16x2_t x, const bfloat16x2_t y, const bfloat16x2_t z);
550 563 
551#include "impl/simt_api/asc_bf16_impl.h"564#include "impl/simt_api/asc_bf16_impl.h"
552 565 
@@ -557,4 +570,4 @@ static __SIMT_DEVICE_FUNCTIONS_DECL__ bfloat16x2_t __hcmadd(const bfloat16x2_t x
557#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_BF16_H__570#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_BF16_H__
558#endif571#endif
559 572 
560-#endif // INCLUDE_SIMT_API_ASC_BF16_H573+#endif // INCLUDE_SIMT_API_ASC_BF16_H
Minclude/simt_api/asc_fp16.h+36-36
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_SIMT_API_ASC_FP16_H11#ifndef INCLUDE_SIMT_API_ASC_FP16_H
12#define INCLUDE_SIMT_API_ASC_FP16_H12#define INCLUDE_SIMT_API_ASC_FP16_H
@@ -288,41 +288,41 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __lows2half2(const half2 x, const ha
288__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __halves2half2(const half x, const half y);288__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 __halves2half2(const half x, const half y);
289 289 
290#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__290#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__
291-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(__ubuf__ half *address, half val);291+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(__ubuf__ half* address, half val);
292 292 
293-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(__ubuf__ half2 *address, half2 val);293+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(__ubuf__ half2* address, half2 val);
294 294 
295-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(__gm__ half *address, half val);295+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(__gm__ half* address, half val);
296 296 
297-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(__gm__ half2 *address, half2 val);297+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(__gm__ half2* address, half2 val);
298 298 
299-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(__ubuf__ half2 *address, half2 val);299+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(__ubuf__ half2* address, half2 val);
300 300 
301-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(__gm__ half2 *address, half2 val);301+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(__gm__ half2* address, half2 val);
302 302 
303-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(__ubuf__ half2 *address, half2 val);303+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(__ubuf__ half2* address, half2 val);
304 304 
305-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(__gm__ half2 *address, half2 val);305+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(__gm__ half2* address, half2 val);
306 306 
307-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(__ubuf__ half *address, half val);307+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(__ubuf__ half* address, half val);
308 308 
309-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(__ubuf__ half2 *address, half2 val);309+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(__ubuf__ half2* address, half2 val);
310 310 
311-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(__gm__ half *address, half val);311+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(__gm__ half* address, half val);
312 312 
313-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(__gm__ half2 *address, half2 val);313+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(__gm__ half2* address, half2 val);
314 314 
315-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(__ubuf__ half *address, half val);315+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(__ubuf__ half* address, half val);
316 316 
317-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(__ubuf__ half2 *address, half2 val);317+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(__ubuf__ half2* address, half2 val);
318 318 
319-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(__gm__ half *address, half val);319+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(__gm__ half* address, half val);
320 320 
321-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(__gm__ half2 *address, half2 val);321+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(__gm__ half2* address, half2 val);
322 322 
323-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(__ubuf__ half2 *address, half2 compare, half2 val);323+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(__ubuf__ half2* address, half2 compare, half2 val);
324 324 
325-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(__gm__ half2 *address, half2 compare, half2 val);325+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(__gm__ half2* address, half2 compare, half2 val);
326 326 
327__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_ldcg(__gm__ half* address);327__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_ldcg(__gm__ half* address);
328 328 
@@ -342,23 +342,23 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_stwt(__gm__ half2* address, half2
342 342 
343#else343#else
344#ifndef ASCENDC_CPU_DEBUG344#ifndef ASCENDC_CPU_DEBUG
345-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(half *address, half val);345+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_add(half* address, half val);
346 346 
347-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(half2 *address, half2 val);347+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_add(half2* address, half2 val);
348 348 
349-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(half2 *address, half2 val);349+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_sub(half2* address, half2 val);
350 350 
351-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(half2 *address, half2 val);351+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_exch(half2* address, half2 val);
352 352 
353-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(half *address, half val);353+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_max(half* address, half val);
354 354 
355-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(half2 *address, half2 val);355+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_max(half2* address, half2 val);
356 356 
357-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(half *address, half val);357+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_atomic_min(half* address, half val);
358 358 
359-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(half2 *address, half2 val);359+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_min(half2* address, half2 val);
360 360 
361-__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(half2 *address, half2 compare, half2 val);361+__SIMT_DEVICE_FUNCTIONS_DECL__ inline half2 asc_atomic_cas(half2* address, half2 compare, half2 val);
362#endif362#endif
363 363 
364__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_ldcg(half* address);364__SIMT_DEVICE_FUNCTIONS_DECL__ inline half asc_ldcg(half* address);
@@ -552,4 +552,4 @@ static __SIMT_DEVICE_FUNCTIONS_DECL__ half2 __hcmadd(const half2 x, const half2
552#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__552#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__
553#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_FP16_H__553#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_FP16_H__
554#endif554#endif
555-#endif // INCLUDE_SIMT_API_ASC_FP16_H555+#endif // INCLUDE_SIMT_API_ASC_FP16_H
Minclude/simt_api/asc_fp8.h+11-12
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_SIMT_API_ASC_FP8_H11#ifndef INCLUDE_SIMT_API_ASC_FP8_H
12#define INCLUDE_SIMT_API_ASC_FP8_H12#define INCLUDE_SIMT_API_ASC_FP8_H
@@ -57,9 +57,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __e4m3x22float2(const float8_e4m3x2
57 57 
58__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __e5m2x22float2(const float8_e5m2x2_t x);58__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 __e5m2x22float2(const float8_e5m2x2_t x);
59 59 
60-__SIMT_DEVICE_FUNCTIONS_DECL__ inline __asc_fp8x2_storage_t60+__SIMT_DEVICE_FUNCTIONS_DECL__ inline __asc_fp8x2_storage_t __asc_cvt_float2_to_fp8x2(
61-__asc_cvt_float2_to_fp8x2(const float2 x, const __asc_saturation_t saturate,61+ const float2 x, const __asc_saturation_t saturate, const __asc_fp8_interpretation_t fp8_interpretation);
62- const __asc_fp8_interpretation_t fp8_interpretation);
63 62 
64#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__63#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__
65#include "impl/simt_api/asc_fp8_impl.h"64#include "impl/simt_api/asc_fp8_impl.h"
@@ -72,4 +71,4 @@ __asc_cvt_float2_to_fp8x2(const float2 x, const __asc_saturation_t saturate,
72#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_FP8_H__71#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_FP8_H__
73#endif72#endif
74 73 
75-#endif // INCLUDE_SIMT_API_ASC_FP8_H74+#endif // INCLUDE_SIMT_API_ASC_FP8_H
Minclude/simt_api/asc_simt.h+9-9
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/* !11/* !
12 * \file asc_simt.h12 * \file asc_simt.h
@@ -30,4 +30,4 @@
30#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_SIMT_H__30#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_ASC_SIMT_H__
31#endif31#endif
32 32 
33-#endif // INCLUDE_SIMT_API_ASC_SIMT_H33+#endif // INCLUDE_SIMT_API_ASC_SIMT_H
Minclude/simt_api/common_functions.h+10-10
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_SIMT_API_COMMON_FUNCTIONS_H11#ifndef INCLUDE_SIMT_API_COMMON_FUNCTIONS_H
12#define INCLUDE_SIMT_API_COMMON_FUNCTIONS_H12#define INCLUDE_SIMT_API_COMMON_FUNCTIONS_H
@@ -32,7 +32,7 @@ using dim3 = cce::dim3;
32#if (__NPU_ARCH__ == 3510) || (__NPU_ARCH__ == 5102)32#if (__NPU_ARCH__ == 3510) || (__NPU_ARCH__ == 5102)
33 33 
34template <auto funcPtr, typename... Args>34template <auto funcPtr, typename... Args>
35-__aicore__ inline void asc_vf_call(dim3 threadNums, Args &&...args)35+__aicore__ inline void asc_vf_call(dim3 threadNums, Args&&... args)
36{36{
37#if (defined(__NPU_ARCH__) && __NPU_ARCH__ == 5102) || defined(SPLIT_CORE_VEC) || defined(ASCENDC_CPU_DEBUG)37#if (defined(__NPU_ARCH__) && __NPU_ARCH__ == 5102) || defined(SPLIT_CORE_VEC) || defined(ASCENDC_CPU_DEBUG)
38 cce::async_invoke<funcPtr>(threadNums, args...);38 cce::async_invoke<funcPtr>(threadNums, args...);
@@ -45,4 +45,4 @@ __aicore__ inline void asc_vf_call(dim3 threadNums, Args &&...args)
45#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__45#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__
46#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_COMMON_FUNCTIONS_H__46#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_COMMON_FUNCTIONS_H__
47#endif47#endif
48-#endif // INCLUDE_SIMT_API_COMMON_FUNCTIONS_H48+#endif // INCLUDE_SIMT_API_COMMON_FUNCTIONS_H
Minclude/simt_api/cooperative_groups.h+6-6
@@ -163,17 +163,17 @@ struct _tile_helpers {
163template <unsigned int>163template <unsigned int>
164struct tile_helpers;164struct tile_helpers;
165template <>165template <>
166-struct tile_helpers<32> : public _tile_helpers<1, 0xFFFFFFFF, 0x1F, 5> {}; // thread_block_tile<32> config166+struct tile_helpers<32> : public _tile_helpers<1, 0xFFFFFFFF, 0x1F, 5> {}; // thread_block_tile<32> config
167template <>167template <>
168-struct tile_helpers<16> : public _tile_helpers<2, 0x0000FFFF, 0x0F, 4> {}; // thread_block_tile<16> config168+struct tile_helpers<16> : public _tile_helpers<2, 0x0000FFFF, 0x0F, 4> {}; // thread_block_tile<16> config
169template <>169template <>
170-struct tile_helpers<8> : public _tile_helpers<4, 0x000000FF, 0x07, 3> {}; // thread_block_tile<8> config170+struct tile_helpers<8> : public _tile_helpers<4, 0x000000FF, 0x07, 3> {}; // thread_block_tile<8> config
171template <>171template <>
172-struct tile_helpers<4> : public _tile_helpers<8, 0x0000000F, 0x03, 2> {}; // thread_block_tile<4> config172+struct tile_helpers<4> : public _tile_helpers<8, 0x0000000F, 0x03, 2> {}; // thread_block_tile<4> config
173template <>173template <>
174-struct tile_helpers<2> : public _tile_helpers<16, 0x00000003, 0x01, 1> {}; // thread_block_tile<2> config174+struct tile_helpers<2> : public _tile_helpers<16, 0x00000003, 0x01, 1> {}; // thread_block_tile<2> config
175template <>175template <>
176-struct tile_helpers<1> : public _tile_helpers<32, 0x00000001, 0x00, 0> {}; // thread_block_tile<1> config176+struct tile_helpers<1> : public _tile_helpers<32, 0x00000001, 0x00, 0> {}; // thread_block_tile<1> config
177 177 
178template <unsigned int Size>178template <unsigned int Size>
179struct _is_valid_thread_block_tile_size {179struct _is_valid_thread_block_tile_size {
Minclude/simt_api/cpp/kernel_simt_atomic_intf.h+33-33
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef ASCENDC_MODULE_SIMT_ATOMIC_INTERFACE_H11#ifndef ASCENDC_MODULE_SIMT_ATOMIC_INTERFACE_H
12#define ASCENDC_MODULE_SIMT_ATOMIC_INTERFACE_H12#define ASCENDC_MODULE_SIMT_ATOMIC_INTERFACE_H
@@ -16,72 +16,72 @@
16namespace AscendC {16namespace AscendC {
17namespace Simt {17namespace Simt {
18template <typename T>18template <typename T>
19-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAdd(__ubuf__ T *address, T val);19+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAdd(__ubuf__ T* address, T val);
20 20 
21template <typename T>21template <typename T>
22-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAdd(__gm__ T *address, T val);22+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAdd(__gm__ T* address, T val);
23 23 
24template <typename T>24template <typename T>
25-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSub(__ubuf__ T *address, T val);25+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSub(__ubuf__ T* address, T val);
26 26 
27template <typename T>27template <typename T>
28-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSub(__gm__ T *address, T val);28+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicSub(__gm__ T* address, T val);
29 29 
30template <typename T>30template <typename T>
31-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExch(__ubuf__ T *address, T val);31+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExch(__ubuf__ T* address, T val);
32 32 
33template <typename T>33template <typename T>
34-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExch(__gm__ T *address, T val);34+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicExch(__gm__ T* address, T val);
35 35 
36template <typename T>36template <typename T>
37-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMax(__ubuf__ T *address, T val);37+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMax(__ubuf__ T* address, T val);
38 38 
39template <typename T>39template <typename T>
40-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMax(__gm__ T *address, T val);40+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMax(__gm__ T* address, T val);
41 41 
42template <typename T>42template <typename T>
43-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMin(__ubuf__ T *address, T val);43+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMin(__ubuf__ T* address, T val);
44 44 
45template <typename T>45template <typename T>
46-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMin(__gm__ T *address, T val);46+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicMin(__gm__ T* address, T val);
47 47 
48template <typename T>48template <typename T>
49-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicInc(__ubuf__ T *address, T val);49+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicInc(__ubuf__ T* address, T val);
50 50 
51template <typename T>51template <typename T>
52-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicInc(__gm__ T *address, T val);52+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicInc(__gm__ T* address, T val);
53 53 
54template <typename T>54template <typename T>
55-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDec(__ubuf__ T *address, T val);55+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDec(__ubuf__ T* address, T val);
56 56 
57template <typename T>57template <typename T>
58-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDec(__gm__ T *address, T val);58+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicDec(__gm__ T* address, T val);
59 59 
60template <typename T>60template <typename T>
61-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCas(__ubuf__ T *address, T compare, T val);61+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCas(__ubuf__ T* address, T compare, T val);
62 62 
63template <typename T>63template <typename T>
64-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCas(__gm__ T *address, T compare, T val);64+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicCas(__gm__ T* address, T compare, T val);
65 65 
66template <typename T>66template <typename T>
67-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAnd(__ubuf__ T *address, T val);67+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAnd(__ubuf__ T* address, T val);
68 68 
69template <typename T>69template <typename T>
70-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAnd(__gm__ T *address, T val);70+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicAnd(__gm__ T* address, T val);
71 71 
72template <typename T>72template <typename T>
73-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOr(__ubuf__ T *address, T val);73+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOr(__ubuf__ T* address, T val);
74 74 
75template <typename T>75template <typename T>
76-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOr(__gm__ T *address, T val);76+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicOr(__gm__ T* address, T val);
77 77 
78template <typename T>78template <typename T>
79-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXor(__ubuf__ T *address, T val);79+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXor(__ubuf__ T* address, T val);
80 80 
81template <typename T>81template <typename T>
82-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXor(__gm__ T *address, T val);82+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T AtomicXor(__gm__ T* address, T val);
83-} // namespace Simt83+} // namespace Simt
84-} // namespace AscendC84+} // namespace AscendC
85 85 
86#include "impl/simt_api/cpp/kernel_simt_atomic_intf_impl.h"86#include "impl/simt_api/cpp/kernel_simt_atomic_intf_impl.h"
87-#endif // ASCENDC_MODULE_SIMT_ATOMIC_INTERFACE_H87+#endif // ASCENDC_MODULE_SIMT_ATOMIC_INTERFACE_H
Minclude/simt_api/cpp/kernel_simt_bessel_intf.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef ASCENDC_MODULE_SIMT_BESSEL_INTERFACE_H11#ifndef ASCENDC_MODULE_SIMT_BESSEL_INTERFACE_H
12#define ASCENDC_MODULE_SIMT_BESSEL_INTERFACE_H12#define ASCENDC_MODULE_SIMT_BESSEL_INTERFACE_H
@@ -34,8 +34,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Y1(T x);
34template <typename T, typename U>34template <typename T, typename U>
35__SIMT_DEVICE_FUNCTIONS_DECL__ inline U Yn(T n, U x);35__SIMT_DEVICE_FUNCTIONS_DECL__ inline U Yn(T n, U x);
36 36 
37-} // namespace Simt37+} // namespace Simt
38-} // namespace AscendC38+} // namespace AscendC
39 39 
40#include "impl/simt_api/cpp/kernel_simt_bessel_intf_impl.h"40#include "impl/simt_api/cpp/kernel_simt_bessel_intf_impl.h"
41-#endif // ASCENDC_MODULE_SIMT_BESSEL_INTERFACE_H41+#endif // ASCENDC_MODULE_SIMT_BESSEL_INTERFACE_H
Minclude/simt_api/cpp/kernel_simt_cast_intf.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef ASCENDC_MODULE_SIMT_CAST_INTERFACE_H11#ifndef ASCENDC_MODULE_SIMT_CAST_INTERFACE_H
12#define ASCENDC_MODULE_SIMT_CAST_INTERFACE_H12#define ASCENDC_MODULE_SIMT_CAST_INTERFACE_H
@@ -34,8 +34,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Ceil(T x);
34template <typename T>34template <typename T>
35__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Trunc(T x);35__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Trunc(T x);
36 36 
37-} // namespace Simt37+} // namespace Simt
38-} // namespace AscendC38+} // namespace AscendC
39 39 
40#include "impl/simt_api/cpp/kernel_simt_cast_intf_impl.h"40#include "impl/simt_api/cpp/kernel_simt_cast_intf_impl.h"
41-#endif // ASCENDC_MODULE_SIMT_CAST_INTERFACE_H41+#endif // ASCENDC_MODULE_SIMT_CAST_INTERFACE_H
Minclude/simt_api/cpp/kernel_simt_cmp_intf.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef ASCENDC_MODULE_SIMT_CMP_INTERFACE_H11#ifndef ASCENDC_MODULE_SIMT_CMP_INTERFACE_H
12#define ASCENDC_MODULE_SIMT_CMP_INTERFACE_H12#define ASCENDC_MODULE_SIMT_CMP_INTERFACE_H
@@ -23,8 +23,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsNan(T x);
23 23 
24template <typename T>24template <typename T>
25__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsInf(T x);25__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool IsInf(T x);
26-} // namespace Simt26+} // namespace Simt
27-} // namespace AscendC27+} // namespace AscendC
28 28 
29#include "impl/simt_api/cpp/kernel_simt_cmp_intf_impl.h"29#include "impl/simt_api/cpp/kernel_simt_cmp_intf_impl.h"
30-#endif // ASCENDC_MODULE_SIMT_CMP_INTERFACE_H30+#endif // ASCENDC_MODULE_SIMT_CMP_INTERFACE_H
Minclude/simt_api/cpp/kernel_simt_common_intf.h+11-14
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/* !11/* !
12 * \file kernel_simt_common_intf.h12 * \file kernel_simt_common_intf.h
@@ -21,10 +21,7 @@
21namespace AscendC {21namespace AscendC {
22namespace Simt {22namespace Simt {
23 23 
24-enum class SatMode {24+enum class SatMode { NO_SAT = 0, SAT };
25- NO_SAT = 0,
26- SAT
27-};
28 25 
29__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t GetWarpSize();26__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t GetWarpSize();
30 27 
@@ -38,8 +35,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBlockIdx();
38 35 
39__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBlockNum();36__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t GetBlockNum();
40 37 
41-} // namespace Simt38+} // namespace Simt
42-} // namespace AscendC39+} // namespace AscendC
43 40 
44#include "impl/simt_api/cpp/kernel_simt_common_intf_impl.h"41#include "impl/simt_api/cpp/kernel_simt_common_intf_impl.h"
45#endif42#endif
Minclude/simt_api/cpp/kernel_simt_intf.h+9-9
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/* !11/* !
12 * \file kernel_simt_intf.h12 * \file kernel_simt_intf.h
@@ -45,4 +45,4 @@
45#include "utils/debug/asc_assert.h"45#include "utils/debug/asc_assert.h"
46#endif46#endif
47 47 
48-#endif // ASCENDC_MODULE_SIMT_INTERFACE_H48+#endif // ASCENDC_MODULE_SIMT_INTERFACE_H
Minclude/simt_api/cpp/kernel_simt_math_intf.h+12-12
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef ASCENDC_MODULE_SIMT_MATH_INTERFACE_H11#ifndef ASCENDC_MODULE_SIMT_MATH_INTERFACE_H
12#define ASCENDC_MODULE_SIMT_MATH_INTERFACE_H12#define ASCENDC_MODULE_SIMT_MATH_INTERFACE_H
@@ -34,7 +34,7 @@ template <typename T>
34__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Fdim(T x, T y);34__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Fdim(T x, T y);
35 35 
36template <typename T, typename U>36template <typename T, typename U>
37-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T RemQuo(T x, T y, U *quo);37+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T RemQuo(T x, T y, U* quo);
38 38 
39template <typename T>39template <typename T>
40__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Mod(T x, T y);40__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Mod(T x, T y);
@@ -73,8 +73,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t Ffs(T x);
73 73 
74template <typename T>74template <typename T>
75__SIMT_DEVICE_FUNCTIONS_DECL__ inline T MulHi(T x, T y);75__SIMT_DEVICE_FUNCTIONS_DECL__ inline T MulHi(T x, T y);
76-} // namespace Simt76+} // namespace Simt
77-} // namespace AscendC77+} // namespace AscendC
78 78 
79#include "impl/simt_api/cpp/kernel_simt_math_intf_impl.h"79#include "impl/simt_api/cpp/kernel_simt_math_intf_impl.h"
80-#endif // ASCENDC_MODULE_SIMT_MATH_INTERFACE_H80+#endif // ASCENDC_MODULE_SIMT_MATH_INTERFACE_H
Minclude/simt_api/cpp/kernel_simt_print_intf.h+12-12
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef ASCENDC_MODULE_SIMT_PRINT_INTERFACE_H11#ifndef ASCENDC_MODULE_SIMT_PRINT_INTERFACE_H
12#define ASCENDC_MODULE_SIMT_PRINT_INTERFACE_H12#define ASCENDC_MODULE_SIMT_PRINT_INTERFACE_H
@@ -22,13 +22,13 @@ namespace Simt {
22template <class... Args>22template <class... Args>
23__SIMT_DEVICE_FUNCTIONS_DECL__ inline void PRINTF(const __gm__ char* fmt, Args&&... args);23__SIMT_DEVICE_FUNCTIONS_DECL__ inline void PRINTF(const __gm__ char* fmt, Args&&... args);
24 24 
25-using __asc_simt_vf::printf; // compatible with interface in asc_printf.h25+using __asc_simt_vf::printf; // compatible with interface in asc_printf.h
26 26 
27#endif27#endif
28#endif28#endif
29 29 
30-} // namespace Simt30+} // namespace Simt
31-} // namespace AscendC31+} // namespace AscendC
32 32 
33#include "impl/simt_api/cpp/kernel_simt_print_intf_impl.h"33#include "impl/simt_api/cpp/kernel_simt_print_intf_impl.h"
34-#endif // ASCENDC_MODULE_SIMT_PRINT_INTERFACE_H34+#endif // ASCENDC_MODULE_SIMT_PRINT_INTERFACE_H
Minclude/simt_api/cpp/kernel_simt_transcendental_intf.h+25-26
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef ASCENDC_MODULE_SIMT_TRANSCENDENTAL_INTERFACE_H11#ifndef ASCENDC_MODULE_SIMT_TRANSCENDENTAL_INTERFACE_H
12#define ASCENDC_MODULE_SIMT_TRANSCENDENTAL_INTERFACE_H12#define ASCENDC_MODULE_SIMT_TRANSCENDENTAL_INTERFACE_H
@@ -101,7 +101,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Asinh(T x);
101 * c the cosine of the x.101 * c the cosine of the x.
102 */102 */
103template <typename T>103template <typename T>
104-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Sincos(T x, T &s, T &c);104+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Sincos(T x, T& s, T& c);
105 105 
106/**106/**
107 * The trigonometric sine,cosine of an angle*pi107 * The trigonometric sine,cosine of an angle*pi
@@ -110,7 +110,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void Sincos(T x, T &s, T &c);
110 * c the cosine of the x*pi.110 * c the cosine of the x*pi.
111 */111 */
112template <typename T>112template <typename T>
113-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Sincospi(T x, T &s, T &c);113+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void Sincospi(T x, T& s, T& c);
114 114 
115template <typename T>115template <typename T>
116__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Exp(T x);116__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Exp(T x);
@@ -149,7 +149,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Rsqrt(T x);
149 * exp: the exponent of the x149 * exp: the exponent of the x
150 */150 */
151template <typename T, typename U>151template <typename T, typename U>
152-__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Frexp(T x, U &exp);152+__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Frexp(T x, U& exp);
153 153 
154/**154/**
155 * The value of x multiplied by 2 exp.155 * The value of x multiplied by 2 exp.
@@ -169,12 +169,12 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Ldexp(T x, U exp);
169template <typename T>169template <typename T>
170__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Hypot(T x, T y);170__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Hypot(T x, T y);
171 171 
172- /**172+/**
173- * The reciprocal of square root of (x^2+y^2)173+ * The reciprocal of square root of (x^2+y^2)
174- * @param x a float value.174+ * @param x a float value.
175- * y a float value.175+ * y a float value.
176- * @return The reciprocal of square root of (x^2+y^2)176+ * @return The reciprocal of square root of (x^2+y^2)
177- */177+ */
178template <typename T>178template <typename T>
179__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Rhypot(T x, T y);179__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Rhypot(T x, T y);
180 180 
@@ -369,7 +369,6 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Erfinv(T x);
369template <typename T>369template <typename T>
370__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Erfcinv(T x);370__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Erfcinv(T x);
371 371 
372- 
373/**372/**
374 * Calculate the scaled complementary error function of the input x.373 * Calculate the scaled complementary error function of the input x.
375 * @param x a value374 * @param x a value
@@ -392,7 +391,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Erfcx(T x);
392 * if x is Inf, return Inf;391 * if x is Inf, return Inf;
393 * if x is -Inf, return Nan;392 * if x is -Inf, return Nan;
394 */393 */
395-template<typename T>394+template <typename T>
396__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Tgamma(T x);395__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Tgamma(T x);
397 396 
398/**397/**
@@ -405,7 +404,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Tgamma(T x);
405 * if x is Inf, return Inf;404 * if x is Inf, return Inf;
406 * if x is -Inf, return Inf;405 * if x is -Inf, return Inf;
407 */406 */
408-template<typename T>407+template <typename T>
409__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Lgamma(T x);408__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Lgamma(T x);
410 409 
411/**410/**
@@ -418,7 +417,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T Lgamma(T x);
418 * if x is Inf, return Inf;417 * if x is Inf, return Inf;
419 * if x is -Inf, return Inf;418 * if x is -Inf, return Inf;
420 */419 */
421-template<typename T>420+template <typename T>
422__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI0(T x);421__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI0(T x);
423 422 
424/**423/**
@@ -431,7 +430,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI0(T x);
431 * if x is Inf, return Inf;430 * if x is Inf, return Inf;
432 * if x is -Inf, return -Inf;431 * if x is -Inf, return -Inf;
433 */432 */
434-template<typename T>433+template <typename T>
435__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI1(T x);434__SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI1(T x);
436 435 
437/**436/**
@@ -443,11 +442,11 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T CylBesselI1(T x);
443 * if x is Inf, return 1;442 * if x is Inf, return 1;
444 * if x is -Inf, return 0;443 * if x is -Inf, return 0;
445 */444 */
446-template<typename T>445+template <typename T>
447__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Normcdf(T x);446__SIMT_DEVICE_FUNCTIONS_DECL__ inline T Normcdf(T x);
448 447 
449-} // namespace Simt448+} // namespace Simt
450-} // namespace AscendC449+} // namespace AscendC
451 450 
452#include "impl/simt_api/cpp/kernel_simt_transcendental_intf_impl.h"451#include "impl/simt_api/cpp/kernel_simt_transcendental_intf_impl.h"
453-#endif // ASCENDC_MODULE_SIMT_TRANSCENDENTAL_INTERFACE_H452+#endif // ASCENDC_MODULE_SIMT_TRANSCENDENTAL_INTERFACE_H
Minclude/simt_api/cpp/kernel_simt_utils.h+12-12
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11/* !11/* !
12 * \file kernel_simt_utils.h12 * \file kernel_simt_utils.h
@@ -21,13 +21,13 @@ namespace Simt {
21using Dim3 = cce::dim3;21using Dim3 = cce::dim3;
22 22 
23template <auto funcPtr, typename... Args>23template <auto funcPtr, typename... Args>
24-__aicore__ inline void VF_CALL(Dim3 threadNums, Args &&...args)24+__aicore__ inline void VF_CALL(Dim3 threadNums, Args&&... args)
25{25{
26#if (defined(__NPU_ARCH__) && __NPU_ARCH__ == 5102) || defined(SPLIT_CORE_VEC) || defined(ASCENDC_CPU_DEBUG)26#if (defined(__NPU_ARCH__) && __NPU_ARCH__ == 5102) || defined(SPLIT_CORE_VEC) || defined(ASCENDC_CPU_DEBUG)
27 cce::async_invoke<funcPtr>(threadNums, args...);27 cce::async_invoke<funcPtr>(threadNums, args...);
28#endif28#endif
29}29}
30 30 
31-} // namespace Simt31+} // namespace Simt
32-} // namespace AscendC32+} // namespace AscendC
33-#endif // ASCENDC_MODULE_SIMT_UTILS_H33+#endif // ASCENDC_MODULE_SIMT_UTILS_H
Minclude/simt_api/cpp/kernel_simt_warp_level_intf.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef ASCENDC_MODULE_SIMT_WARP_LEVEL_INTERFACE_H11#ifndef ASCENDC_MODULE_SIMT_WARP_LEVEL_INTERFACE_H
12#define ASCENDC_MODULE_SIMT_WARP_LEVEL_INTERFACE_H12#define ASCENDC_MODULE_SIMT_WARP_LEVEL_INTERFACE_H
@@ -50,8 +50,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline T WarpReduceMinSync(T val);
50__SIMT_DEVICE_FUNCTIONS_DECL__ inline void ThreadBarrier();50__SIMT_DEVICE_FUNCTIONS_DECL__ inline void ThreadBarrier();
51 51 
52__SIMT_DEVICE_FUNCTIONS_DECL__ inline void ThreadFence();52__SIMT_DEVICE_FUNCTIONS_DECL__ inline void ThreadFence();
53-} // namespace Simt53+} // namespace Simt
54-} // namespace AscendC54+} // namespace AscendC
55 55 
56#include "impl/simt_api/cpp/kernel_simt_warp_level_intf_impl.h"56#include "impl/simt_api/cpp/kernel_simt_warp_level_intf_impl.h"
57-#endif // ASCENDC_MODULE_SIMT_WARP_LEVEL_INTERFACE_H57+#endif // ASCENDC_MODULE_SIMT_WARP_LEVEL_INTERFACE_H
Minclude/simt_api/device_atomic_functions.h+129-128
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_SIMT_API_DEVICE_ATOMIC_FUNCTIONS_H11#ifndef INCLUDE_SIMT_API_DEVICE_ATOMIC_FUNCTIONS_H
12#define INCLUDE_SIMT_API_DEVICE_ATOMIC_FUNCTIONS_H12#define INCLUDE_SIMT_API_DEVICE_ATOMIC_FUNCTIONS_H
@@ -22,246 +22,247 @@
22 22 
23namespace __asc_simt_vf {23namespace __asc_simt_vf {
24#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__24#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__
25-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_add(__ubuf__ int32_t *address, int32_t val);25+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_add(__ubuf__ int32_t* address, int32_t val);
26 26 
27-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_add(__ubuf__ uint32_t *address, uint32_t val);27+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_add(__ubuf__ uint32_t* address, uint32_t val);
28 28 
29-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_add(__ubuf__ float *address, float val);29+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_add(__ubuf__ float* address, float val);
30 30 
31-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_add(__gm__ int32_t *address, int32_t val);31+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_add(__gm__ int32_t* address, int32_t val);
32 32 
33-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_add(__gm__ uint32_t *address, uint32_t val);33+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_add(__gm__ uint32_t* address, uint32_t val);
34 34 
35-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_add(__gm__ float *address, float val);35+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_add(__gm__ float* address, float val);
36 36 
37-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_add(__gm__ int64_t *address, int64_t val);37+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_add(__gm__ int64_t* address, int64_t val);
38 38 
39-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_add(__gm__ uint64_t *address, uint64_t val);39+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_add(__gm__ uint64_t* address, uint64_t val);
40 40 
41-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_sub(__ubuf__ int32_t *address, int32_t val);41+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_sub(__ubuf__ int32_t* address, int32_t val);
42 42 
43-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_sub(__ubuf__ uint32_t *address, uint32_t val);43+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_sub(__ubuf__ uint32_t* address, uint32_t val);
44 44 
45-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_sub(__ubuf__ float *address, float val);45+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_sub(__ubuf__ float* address, float val);
46 46 
47-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_sub(__gm__ int32_t *address, int32_t val);47+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_sub(__gm__ int32_t* address, int32_t val);
48 48 
49-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_sub(__gm__ uint32_t *address, uint32_t val);49+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_sub(__gm__ uint32_t* address, uint32_t val);
50 50 
51-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_sub(__gm__ float *address, float val);51+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_sub(__gm__ float* address, float val);
52 52 
53-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_sub(__gm__ int64_t *address, int64_t val);53+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_sub(__gm__ int64_t* address, int64_t val);
54 54 
55-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_sub(__gm__ uint64_t *address, uint64_t val);55+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_sub(__gm__ uint64_t* address, uint64_t val);
56 56 
57-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_exch(__ubuf__ int32_t *address, int32_t val);57+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_exch(__ubuf__ int32_t* address, int32_t val);
58 58 
59-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_exch(__ubuf__ uint32_t *address, uint32_t val);59+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_exch(__ubuf__ uint32_t* address, uint32_t val);
60 60 
61-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_exch(__ubuf__ float *address, float val);61+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_exch(__ubuf__ float* address, float val);
62 62 
63-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_exch(__gm__ int32_t *address, int32_t val);63+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_exch(__gm__ int32_t* address, int32_t val);
64 64 
65-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_exch(__gm__ uint32_t *address, uint32_t val);65+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_exch(__gm__ uint32_t* address, uint32_t val);
66 66 
67-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_exch(__gm__ int64_t *address, int64_t val);67+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_exch(__gm__ int64_t* address, int64_t val);
68 68 
69-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_exch(__gm__ uint64_t *address, uint64_t val);69+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_exch(__gm__ uint64_t* address, uint64_t val);
70 70 
71-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_exch(__gm__ float *address, float val);71+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_exch(__gm__ float* address, float val);
72 72 
73-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_max(__ubuf__ int32_t *address, int32_t val);73+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_max(__ubuf__ int32_t* address, int32_t val);
74 74 
75-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_max(__ubuf__ uint32_t *address, uint32_t val);75+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_max(__ubuf__ uint32_t* address, uint32_t val);
76 76 
77-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_max(__ubuf__ float *address, float val);77+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_max(__ubuf__ float* address, float val);
78 78 
79-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_max(__gm__ int32_t *address, int32_t val);79+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_max(__gm__ int32_t* address, int32_t val);
80 80 
81-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_max(__gm__ uint32_t *address, uint32_t val);81+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_max(__gm__ uint32_t* address, uint32_t val);
82 82 
83-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_max(__gm__ float *address, float val);83+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_max(__gm__ float* address, float val);
84 84 
85-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_max(__gm__ int64_t *address, int64_t val);85+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_max(__gm__ int64_t* address, int64_t val);
86 86 
87-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_max(__gm__ uint64_t *address, uint64_t val);87+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_max(__gm__ uint64_t* address, uint64_t val);
88 88 
89-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_min(__ubuf__ int32_t *address, int32_t val);89+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_min(__ubuf__ int32_t* address, int32_t val);
90 90 
91-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_min(__ubuf__ uint32_t *address, uint32_t val);91+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_min(__ubuf__ uint32_t* address, uint32_t val);
92 92 
93-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_min(__ubuf__ float *address, float val);93+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_min(__ubuf__ float* address, float val);
94 94 
95-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_min(__gm__ int32_t *address, int32_t val);95+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_min(__gm__ int32_t* address, int32_t val);
96 96 
97-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_min(__gm__ uint32_t *address, uint32_t val);97+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_min(__gm__ uint32_t* address, uint32_t val);
98 98 
99-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_min(__gm__ float *address, float val);99+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_min(__gm__ float* address, float val);
100 100 
101-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_min(__gm__ int64_t *address, int64_t val);101+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_min(__gm__ int64_t* address, int64_t val);
102 102 
103-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_min(__gm__ uint64_t *address, uint64_t val);103+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_min(__gm__ uint64_t* address, uint64_t val);
104 104 
105-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_inc(__ubuf__ uint32_t *address, uint32_t val);105+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_inc(__ubuf__ uint32_t* address, uint32_t val);
106 106 
107-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_inc(__gm__ uint32_t *address, uint32_t val);107+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_inc(__gm__ uint32_t* address, uint32_t val);
108 108 
109-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_inc(__gm__ uint64_t *address, uint64_t val);109+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_inc(__gm__ uint64_t* address, uint64_t val);
110 110 
111-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_dec(__ubuf__ uint32_t *address, uint32_t val);111+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_dec(__ubuf__ uint32_t* address, uint32_t val);
112 112 
113-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_dec(__gm__ uint32_t *address, uint32_t val);113+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_dec(__gm__ uint32_t* address, uint32_t val);
114 114 
115-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_dec(__gm__ uint64_t *address, uint64_t val);115+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_dec(__gm__ uint64_t* address, uint64_t val);
116 116 
117-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_cas(__ubuf__ int32_t *address, int32_t compare, int32_t val);117+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_cas(__ubuf__ int32_t* address, int32_t compare, int32_t val);
118 118 
119-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_cas(__ubuf__ uint32_t *address, uint32_t compare, uint32_t val);119+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_cas(
120+ __ubuf__ uint32_t* address, uint32_t compare, uint32_t val);
120 121 
121-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_cas(__ubuf__ float *address, float compare, float val);122+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_cas(__ubuf__ float* address, float compare, float val);
122 123 
123-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_cas(__gm__ int32_t *address, int32_t compare, int32_t val);124+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_cas(__gm__ int32_t* address, int32_t compare, int32_t val);
124 125 
125-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_cas(__gm__ uint32_t *address, uint32_t compare, uint32_t val);126+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_cas(__gm__ uint32_t* address, uint32_t compare, uint32_t val);
126 127 
127-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_cas(__gm__ int64_t *address, int64_t compare, int64_t val);128+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_cas(__gm__ int64_t* address, int64_t compare, int64_t val);
128 129 
129-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_cas(__gm__ uint64_t *address, uint64_t compare, uint64_t val);130+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_cas(__gm__ uint64_t* address, uint64_t compare, uint64_t val);
130 131 
131-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_cas(__gm__ float *address, float compare, float val);132+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_cas(__gm__ float* address, float compare, float val);
132 133 
133-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_and(__ubuf__ int32_t *address, int32_t val);134+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_and(__ubuf__ int32_t* address, int32_t val);
134 135 
135-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_and(__ubuf__ uint32_t *address, uint32_t val);136+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_and(__ubuf__ uint32_t* address, uint32_t val);
136 137 
137-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_and(__gm__ int32_t *address, int32_t val);138+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_and(__gm__ int32_t* address, int32_t val);
138 139 
139-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_and(__gm__ uint32_t *address, uint32_t val);140+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_and(__gm__ uint32_t* address, uint32_t val);
140 141 
141-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_and(__gm__ int64_t *address, int64_t val);142+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_and(__gm__ int64_t* address, int64_t val);
142 143 
143-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_and(__gm__ uint64_t *address, uint64_t val);144+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_and(__gm__ uint64_t* address, uint64_t val);
144 145 
145-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_or(__ubuf__ int32_t *address, int32_t val);146+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_or(__ubuf__ int32_t* address, int32_t val);
146 147 
147-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_or(__ubuf__ uint32_t *address, uint32_t val);148+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_or(__ubuf__ uint32_t* address, uint32_t val);
148 149 
149-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_or(__gm__ int32_t *address, int32_t val);150+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_or(__gm__ int32_t* address, int32_t val);
150 151 
151-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_or(__gm__ uint32_t *address, uint32_t val);152+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_or(__gm__ uint32_t* address, uint32_t val);
152 153 
153-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_or(__gm__ int64_t *address, int64_t val);154+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_or(__gm__ int64_t* address, int64_t val);
154 155 
155-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_or(__gm__ uint64_t *address, uint64_t val);156+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_or(__gm__ uint64_t* address, uint64_t val);
156 157 
157-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_xor(__ubuf__ int32_t *address, int32_t val);158+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_xor(__ubuf__ int32_t* address, int32_t val);
158 159 
159-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_xor(__ubuf__ uint32_t *address, uint32_t val);160+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_xor(__ubuf__ uint32_t* address, uint32_t val);
160 161 
161-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_xor(__gm__ int32_t *address, int32_t val);162+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_xor(__gm__ int32_t* address, int32_t val);
162 163 
163-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_xor(__gm__ uint32_t *address, uint32_t val);164+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_xor(__gm__ uint32_t* address, uint32_t val);
164 165 
165-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_xor(__gm__ int64_t *address, int64_t val);166+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_xor(__gm__ int64_t* address, int64_t val);
166 167 
167-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_xor(__gm__ uint64_t *address, uint64_t val);168+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_xor(__gm__ uint64_t* address, uint64_t val);
168 169 
169#else170#else
170#ifndef ASCENDC_CPU_DEBUG171#ifndef ASCENDC_CPU_DEBUG
171-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_add(int32_t *address, int32_t val);172+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_add(int32_t* address, int32_t val);
172 173 
173-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_add(uint32_t *address, uint32_t val);174+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_add(uint32_t* address, uint32_t val);
174 175 
175-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_add(float *address, float val);176+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_add(float* address, float val);
176 177 
177-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_add(int64_t *address, int64_t val);178+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_add(int64_t* address, int64_t val);
178 179 
179-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_add(uint64_t *address, uint64_t val);180+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_add(uint64_t* address, uint64_t val);
180 181 
181-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_sub(int32_t *address, int32_t val);182+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_sub(int32_t* address, int32_t val);
182 183 
183-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_sub(uint32_t *address, uint32_t val);184+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_sub(uint32_t* address, uint32_t val);
184 185 
185-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_sub(float *address, float val);186+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_sub(float* address, float val);
186 187 
187-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_sub(int64_t *address, int64_t val);188+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_sub(int64_t* address, int64_t val);
188 189 
189-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_sub(uint64_t *address, uint64_t val);190+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_sub(uint64_t* address, uint64_t val);
190 191 
191-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_exch(int32_t *address, int32_t val);192+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_exch(int32_t* address, int32_t val);
192 193 
193-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_exch(uint32_t *address, uint32_t val);194+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_exch(uint32_t* address, uint32_t val);
194 195 
195-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_exch(int64_t *address, int64_t val);196+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_exch(int64_t* address, int64_t val);
196 197 
197-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_exch(uint64_t *address, uint64_t val);198+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_exch(uint64_t* address, uint64_t val);
198 199 
199-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_exch(float *address, float val);200+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_exch(float* address, float val);
200 201 
201-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_max(int32_t *address, int32_t val);202+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_max(int32_t* address, int32_t val);
202 203 
203-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_max(uint32_t *address, uint32_t val);204+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_max(uint32_t* address, uint32_t val);
204 205 
205-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_max(float *address, float val);206+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_max(float* address, float val);
206 207 
207-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_max(int64_t *address, int64_t val);208+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_max(int64_t* address, int64_t val);
208 209 
209-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_max(uint64_t *address, uint64_t val);210+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_max(uint64_t* address, uint64_t val);
210 211 
211-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_min(int32_t *address, int32_t val);212+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_min(int32_t* address, int32_t val);
212 213 
213-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_min(uint32_t *address, uint32_t val);214+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_min(uint32_t* address, uint32_t val);
214 215 
215-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_min(float *address, float val);216+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_min(float* address, float val);
216 217 
217-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_min(int64_t *address, int64_t val);218+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_min(int64_t* address, int64_t val);
218 219 
219-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_min(uint64_t *address, uint64_t val);220+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_min(uint64_t* address, uint64_t val);
220 221 
221-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_inc(uint32_t *address, uint32_t val);222+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_inc(uint32_t* address, uint32_t val);
222 223 
223-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_inc(uint64_t *address, uint64_t val);224+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_inc(uint64_t* address, uint64_t val);
224 225 
225-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_dec(uint32_t *address, uint32_t val);226+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_dec(uint32_t* address, uint32_t val);
226 227 
227-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_dec(uint64_t *address, uint64_t val);228+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_dec(uint64_t* address, uint64_t val);
228 229 
229-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_cas(int32_t *address, int32_t compare, int32_t val);230+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_cas(int32_t* address, int32_t compare, int32_t val);
230 231 
231-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_cas(uint32_t *address, uint32_t compare, uint32_t val);232+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_cas(uint32_t* address, uint32_t compare, uint32_t val);
232 233 
233-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_cas(int64_t *address, int64_t compare, int64_t val);234+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_cas(int64_t* address, int64_t compare, int64_t val);
234 235 
235-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_cas(uint64_t *address, uint64_t compare, uint64_t val);236+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_cas(uint64_t* address, uint64_t compare, uint64_t val);
236 237 
237-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_cas(float *address, float compare, float val);238+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_atomic_cas(float* address, float compare, float val);
238 239 
239-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_and(int32_t *address, int32_t val);240+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_and(int32_t* address, int32_t val);
240 241 
241-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_and(uint32_t *address, uint32_t val);242+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_and(uint32_t* address, uint32_t val);
242 243 
243-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_and(int64_t *address, int64_t val);244+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_and(int64_t* address, int64_t val);
244 245 
245-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_and(uint64_t *address, uint64_t val);246+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_and(uint64_t* address, uint64_t val);
246 247 
247-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_or(int32_t *address, int32_t val);248+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_or(int32_t* address, int32_t val);
248 249 
249-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_or(uint32_t *address, uint32_t val);250+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_or(uint32_t* address, uint32_t val);
250 251 
251-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_or(int64_t *address, int64_t val);252+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_or(int64_t* address, int64_t val);
252 253 
253-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_or(uint64_t *address, uint64_t val);254+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_or(uint64_t* address, uint64_t val);
254 255 
255-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_xor(int32_t *address, int32_t val);256+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int32_t asc_atomic_xor(int32_t* address, int32_t val);
256 257 
257-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_xor(uint32_t *address, uint32_t val);258+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint32_t asc_atomic_xor(uint32_t* address, uint32_t val);
258 259 
259-__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_xor(int64_t *address, int64_t val);260+__SIMT_DEVICE_FUNCTIONS_DECL__ inline int64_t asc_atomic_xor(int64_t* address, int64_t val);
260 261 
261-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_xor(uint64_t *address, uint64_t val);262+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_xor(uint64_t* address, uint64_t val);
262#endif263#endif
263#endif264#endif
264-}265+} // namespace __asc_simt_vf
265#include "impl/simt_api/device_atomic_functions_impl.h"266#include "impl/simt_api/device_atomic_functions_impl.h"
266 267 
267#endif268#endif
@@ -271,4 +272,4 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline uint64_t asc_atomic_xor(uint64_t *address,
271#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_DEVICE_ATOMIC_FUNCTIONS_H__272#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_DEVICE_ATOMIC_FUNCTIONS_H__
272#endif273#endif
273 274 
274-#endif // INCLUDE_SIMT_API_DEVICE_ATOMIC_FUNCTIONS_H275+#endif // INCLUDE_SIMT_API_DEVICE_ATOMIC_FUNCTIONS_H
Minclude/simt_api/device_functions.h+10-10
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_SIMT_API_DEVICE_FUNCTIONS_H11#ifndef INCLUDE_SIMT_API_DEVICE_FUNCTIONS_H
12#define INCLUDE_SIMT_API_DEVICE_FUNCTIONS_H12#define INCLUDE_SIMT_API_DEVICE_FUNCTIONS_H
@@ -757,7 +757,7 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_dcci_single(__gm__ void* dst);
757#else757#else
758__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_dcci_single(void* dst);758__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_dcci_single(void* dst);
759#endif759#endif
760-}760+} // namespace __asc_simt_vf
761 761 
762__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_nop();762__SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_nop();
763 763 
@@ -768,4 +768,4 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_nop();
768#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_DEVICE_FUNCTIONS_H__768#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_DEVICE_FUNCTIONS_H__
769#endif769#endif
770 770 
771-#endif // INCLUDE_SIMT_API_DEVICE_FUNCTIONS_H771+#endif // INCLUDE_SIMT_API_DEVICE_FUNCTIONS_H
Minclude/simt_api/device_sync_functions.h+9-9
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_SIMT_API_DEVICE_SYNC_FUNCTIONS_H11#ifndef INCLUDE_SIMT_API_DEVICE_SYNC_FUNCTIONS_H
12#define INCLUDE_SIMT_API_DEVICE_SYNC_FUNCTIONS_H12#define INCLUDE_SIMT_API_DEVICE_SYNC_FUNCTIONS_H
@@ -30,4 +30,4 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline void asc_threadfence_block();
30#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_DEVICE_SYNC_FUNCTIONS_H__30#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_DEVICE_SYNC_FUNCTIONS_H__
31#endif31#endif
32 32 
33-#endif // INCLUDE_SIMT_API_DEVICE_SYNC_FUNCTIONS_H33+#endif // INCLUDE_SIMT_API_DEVICE_SYNC_FUNCTIONS_H
Minclude/simt_api/device_types.h+9-9
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_SIMT_API_DEVICE_TYPES_H11#ifndef INCLUDE_SIMT_API_DEVICE_TYPES_H
12#define INCLUDE_SIMT_API_DEVICE_TYPES_H12#define INCLUDE_SIMT_API_DEVICE_TYPES_H
@@ -32,4 +32,4 @@
32#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_DEVICE_TYPES_H__32#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_DEVICE_TYPES_H__
33#endif33#endif
34 34 
35-#endif // INCLUDE_SIMT_API_DEVICE_TYPES_H35+#endif // INCLUDE_SIMT_API_DEVICE_TYPES_H
Minclude/simt_api/device_warp_functions.h+9-9
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_SIMT_API_DEVICE_WARP_FUNCTIONS_H11#ifndef INCLUDE_SIMT_API_DEVICE_WARP_FUNCTIONS_H
12#define INCLUDE_SIMT_API_DEVICE_WARP_FUNCTIONS_H12#define INCLUDE_SIMT_API_DEVICE_WARP_FUNCTIONS_H
@@ -94,4 +94,4 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float asc_reduce_min(float val);
94#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_DEVICE_WARP_FUNCTIONS_H__94#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_DEVICE_WARP_FUNCTIONS_H__
95#endif95#endif
96 96 
97-#endif // INCLUDE_SIMT_API_DEVICE_WARP_FUNCTIONS_H97+#endif // INCLUDE_SIMT_API_DEVICE_WARP_FUNCTIONS_H
Minclude/simt_api/math_constants.h+55-55
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_SIMT_API_MATH_CONSTANTS_H11#ifndef INCLUDE_SIMT_API_MATH_CONSTANTS_H
12#define INCLUDE_SIMT_API_MATH_CONSTANTS_H12#define INCLUDE_SIMT_API_MATH_CONSTANTS_H
@@ -20,60 +20,60 @@ constexpr int ASCRT_NAN_F_VALUE = 0x7fffffffU;
20constexpr int ASCRT_MIN_DENORM_F_VALUE = 0x00000001U;20constexpr int ASCRT_MIN_DENORM_F_VALUE = 0x00000001U;
21constexpr int ASCRT_MAX_NORMAL_F_VALUE = 0x7f7fffffU;21constexpr int ASCRT_MAX_NORMAL_F_VALUE = 0x7f7fffffU;
22constexpr int ASCRT_NEG_ZERO_F_VALUE = 0x80000000U;22constexpr int ASCRT_NEG_ZERO_F_VALUE = 0x80000000U;
23-#define ASCRT_INF_F __builtin_inff()23+#define ASCRT_INF_F __builtin_inff()
24-#define ASCRT_NAN_F (*(reinterpret_cast<const float *>(&ASCRT_NAN_F_VALUE)))24+#define ASCRT_NAN_F (*(reinterpret_cast<const float*>(&ASCRT_NAN_F_VALUE)))
25-#define ASCRT_MIN_DENORM_F (*(reinterpret_cast<const float *>(&ASCRT_MIN_DENORM_F_VALUE)))25+#define ASCRT_MIN_DENORM_F (*(reinterpret_cast<const float*>(&ASCRT_MIN_DENORM_F_VALUE)))
26-#define ASCRT_MAX_NORMAL_F (*(reinterpret_cast<const float *>(&ASCRT_MAX_NORMAL_F_VALUE)))26+#define ASCRT_MAX_NORMAL_F (*(reinterpret_cast<const float*>(&ASCRT_MAX_NORMAL_F_VALUE)))
27-#define ASCRT_NEG_ZERO_F (*(reinterpret_cast<const float *>(&ASCRT_NEG_ZERO_F_VALUE)))27+#define ASCRT_NEG_ZERO_F (*(reinterpret_cast<const float*>(&ASCRT_NEG_ZERO_F_VALUE)))
28-#define ASCRT_ZERO_F 0.0F28+#define ASCRT_ZERO_F 0.0F
29-#define ASCRT_ONE_F 1.0F29+#define ASCRT_ONE_F 1.0F
30-#define ASCRT_SQRT_HALF_F 0.707106781F30+#define ASCRT_SQRT_HALF_F 0.707106781F
31-#define ASCRT_SQRT_HALF_HI_F 0.707106781F31+#define ASCRT_SQRT_HALF_HI_F 0.707106781F
32-#define ASCRT_SQRT_HALF_LO_F 1.210161749e-08F32+#define ASCRT_SQRT_HALF_LO_F 1.210161749e-08F
33-#define ASCRT_SQRT_TWO_F 1.414213562F33+#define ASCRT_SQRT_TWO_F 1.414213562F
34-#define ASCRT_THIRD_F 0.333333333F34+#define ASCRT_THIRD_F 0.333333333F
35-#define ASCRT_PIO4_F 0.785398163F35+#define ASCRT_PIO4_F 0.785398163F
36-#define ASCRT_PIO2_F 1.570796327F36+#define ASCRT_PIO2_F 1.570796327F
37-#define ASCRT_3PIO4_F 2.356194490F37+#define ASCRT_3PIO4_F 2.356194490F
38-#define ASCRT_2_OVER_PI_F 0.636619772F38+#define ASCRT_2_OVER_PI_F 0.636619772F
39#define ASCRT_SQRT_2_OVER_PI_F 0.797884561F39#define ASCRT_SQRT_2_OVER_PI_F 0.797884561F
40-#define ASCRT_PI_F 3.141592654F40+#define ASCRT_PI_F 3.141592654F
41-#define ASCRT_L2E_F 1.442695041F41+#define ASCRT_L2E_F 1.442695041F
42-#define ASCRT_L2T_F 3.321928094F42+#define ASCRT_L2T_F 3.321928094F
43-#define ASCRT_LG2_F 0.301029996F43+#define ASCRT_LG2_F 0.301029996F
44-#define ASCRT_LGE_F 0.434294482F44+#define ASCRT_LGE_F 0.434294482F
45-#define ASCRT_LN2_F 0.693147181F45+#define ASCRT_LN2_F 0.693147181F
46-#define ASCRT_LNT_F 2.302585093F46+#define ASCRT_LNT_F 2.302585093F
47-#define ASCRT_LNPI_F 1.144729886F47+#define ASCRT_LNPI_F 1.144729886F
48-#define ASCRT_TWO_TO_M126_F 1.175494351e-38F48+#define ASCRT_TWO_TO_M126_F 1.175494351e-38F
49-#define ASCRT_TWO_TO_126_F 8.507059173e37F49+#define ASCRT_TWO_TO_126_F 8.507059173e37F
50-#define ASCRT_NORM_HUGE_F 3.402823466e38F50+#define ASCRT_NORM_HUGE_F 3.402823466e38F
51-#define ASCRT_TWO_TO_23_F 8388608.0F51+#define ASCRT_TWO_TO_23_F 8388608.0F
52-#define ASCRT_TWO_TO_24_F 16777216.0F52+#define ASCRT_TWO_TO_24_F 16777216.0F
53-#define ASCRT_TWO_TO_31_F 2147483648.0F53+#define ASCRT_TWO_TO_31_F 2147483648.0F
54-#define ASCRT_TWO_TO_32_F 4294967296.0F54+#define ASCRT_TWO_TO_32_F 4294967296.0F
55-#define ASCRT_REMQUO_BITS_F 3U55+#define ASCRT_REMQUO_BITS_F 3U
56-#define ASCRT_REMQUO_MASK_F (~((~0U)<<ASCRT_REMQUO_BITS_F))56+#define ASCRT_REMQUO_MASK_F (~((~0U) << ASCRT_REMQUO_BITS_F))
57-#define ASCRT_TRIG_PLOSS_F 105615.0F57+#define ASCRT_TRIG_PLOSS_F 105615.0F
58 58 
59-#define ASCRT_PIO8_F 0.39269908169872415480783042290994f59+#define ASCRT_PIO8_F 0.39269908169872415480783042290994f
60-#define ASCRT_SCALAR_LN2_F 0.69314718055994530941723212145818f60+#define ASCRT_SCALAR_LN2_F 0.69314718055994530941723212145818f
61-#define ASCRT_2OPI_F 0.63661975f61+#define ASCRT_2OPI_F 0.63661975f
62-#define ASCRT_MINUS_PIO2_HI_F (-1.5707964f)62+#define ASCRT_MINUS_PIO2_HI_F (-1.5707964f)
63-#define ASCRT_MINUS_PIO2_LO_F 4.371139e-8f63+#define ASCRT_MINUS_PIO2_LO_F 4.371139e-8f
64 64 
65-#define ASCRT_MAN_BIT_FLOAT_U 0x7FFFFFU65+#define ASCRT_MAN_BIT_FLOAT_U 0x7FFFFFU
66-#define ASCRT_EXP_BIT_FLOAT_U 0x7F800000U66+#define ASCRT_EXP_BIT_FLOAT_U 0x7F800000U
67-#define ASCRT_NEG_SIGN_BIT_U 0x80000000U67+#define ASCRT_NEG_SIGN_BIT_U 0x80000000U
68-#define ASCRT_INF_U 0x7F800000U68+#define ASCRT_INF_U 0x7F800000U
69 69 
70-#define ASCRT_MIN_VAL_S 0x8000000070+#define ASCRT_MIN_VAL_S 0x80000000
71-#define ASCRT_INT32_INF_S 213909504071+#define ASCRT_INT32_INF_S 2139095040
72-#define ASCRT_MAX_VAL_S 0x7FFFFFFF72+#define ASCRT_MAX_VAL_S 0x7FFFFFFF
73 73 
74#if defined(__UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_MATH_CONSTANTS_H__)74#if defined(__UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_MATH_CONSTANTS_H__)
75#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__75#undef __ASCENDC_INCLUDE_INTERNAL_HEADERS__
76#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_MATH_CONSTANTS_H__76#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_MATH_CONSTANTS_H__
77#endif77#endif
78 78 
79-#endif // INCLUDE_SIMT_API_MATH_CONSTANTS_H79+#endif // INCLUDE_SIMT_API_MATH_CONSTANTS_H
Minclude/simt_api/math_functions.h+40-38
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#ifndef INCLUDE_SIMT_API_MATH_FUNCTIONS_H11#ifndef INCLUDE_SIMT_API_MATH_FUNCTIONS_H
12#define INCLUDE_SIMT_API_MATH_FUNCTIONS_H12#define INCLUDE_SIMT_API_MATH_FUNCTIONS_H
@@ -53,10 +53,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float fabsf(float x);
53 53 
54__SIMT_DEVICE_FUNCTIONS_DECL__ inline float normcdfinvf(float x);54__SIMT_DEVICE_FUNCTIONS_DECL__ inline float normcdfinvf(float x);
55 55 
56-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float modff(float x, float *n);56+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float modff(float x, float* n);
57#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__57#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__
58-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float modff(float x, __ubuf__ float *n);58+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float modff(float x, __ubuf__ float* n);
59-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float modff(float x, __gm__ float *n);59+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float modff(float x, __gm__ float* n);
60#endif60#endif
61 61 
62__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool isfinite(float x);62__SIMT_DEVICE_FUNCTIONS_DECL__ inline bool isfinite(float x);
@@ -67,10 +67,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline bool isinf(float x);
67 67 
68__SIMT_DEVICE_FUNCTIONS_DECL__ inline float fdimf(float x, float y);68__SIMT_DEVICE_FUNCTIONS_DECL__ inline float fdimf(float x, float y);
69 69 
70-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float remquof(float x, float y, int *quo);70+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float remquof(float x, float y, int* quo);
71#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__71#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__
72-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float remquof(float x, float y, __ubuf__ int *quo);72+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float remquof(float x, float y, __ubuf__ int* quo);
73-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float remquof(float x, float y, __gm__ int *quo);73+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float remquof(float x, float y, __gm__ int* quo);
74#endif74#endif
75 75 
76__SIMT_DEVICE_FUNCTIONS_DECL__ inline float fmodf(float x, float y);76__SIMT_DEVICE_FUNCTIONS_DECL__ inline float fmodf(float x, float y);
@@ -123,28 +123,28 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float sinpif(float x);
123 123 
124__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asinhf(float x);124__SIMT_DEVICE_FUNCTIONS_DECL__ inline float asinhf(float x);
125 125 
126-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, float *s, float *c);126+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, float* s, float* c);
127#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__127#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__
128-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, float *s, __ubuf__ float *c);128+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, float* s, __ubuf__ float* c);
129-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, float *s, __gm__ float *c);129+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, float* s, __gm__ float* c);
130-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __ubuf__ float *s, float *c);130+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __ubuf__ float* s, float* c);
131-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __ubuf__ float *s, __ubuf__ float *c);131+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __ubuf__ float* s, __ubuf__ float* c);
132-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __ubuf__ float *s, __gm__ float *c);132+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __ubuf__ float* s, __gm__ float* c);
133-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __gm__ float *s, float *c);133+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __gm__ float* s, float* c);
134-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __gm__ float *s, __ubuf__ float *c);134+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __gm__ float* s, __ubuf__ float* c);
135-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __gm__ float *s, __gm__ float *c);135+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincosf(float x, __gm__ float* s, __gm__ float* c);
136#endif136#endif
137 137 
138-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, float *s, float *c);138+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, float* s, float* c);
139#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__139#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__
140-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, float *s, __ubuf__ float *c);140+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, float* s, __ubuf__ float* c);
141-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, float *s, __gm__ float *c);141+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, float* s, __gm__ float* c);
142-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __ubuf__ float *s, float *c);142+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __ubuf__ float* s, float* c);
143-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __ubuf__ float *s, __ubuf__ float *c);143+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __ubuf__ float* s, __ubuf__ float* c);
144-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __ubuf__ float *s, __gm__ float *c);144+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __ubuf__ float* s, __gm__ float* c);
145-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __gm__ float *s, float *c);145+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __gm__ float* s, float* c);
146-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __gm__ float *s, __ubuf__ float *c);146+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __gm__ float* s, __ubuf__ float* c);
147-__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __gm__ float *s, __gm__ float *c);147+__SIMT_DEVICE_FUNCTIONS_DECL__ inline void sincospif(float x, __gm__ float* s, __gm__ float* c);
148#endif148#endif
149 149 
150__SIMT_DEVICE_FUNCTIONS_DECL__ inline float exp2f(float x);150__SIMT_DEVICE_FUNCTIONS_DECL__ inline float exp2f(float x);
@@ -153,10 +153,10 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline float exp10f(float x);
153 153 
154__SIMT_DEVICE_FUNCTIONS_DECL__ inline float expm1f(float x);154__SIMT_DEVICE_FUNCTIONS_DECL__ inline float expm1f(float x);
155 155 
156-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float frexpf(float x, int *exp);156+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float frexpf(float x, int* exp);
157#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__157#ifndef __NPU_COMPILER_INTERNAL_PURE_SIMT__
158-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float frexpf(float x, __ubuf__ int *exp);158+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float frexpf(float x, __ubuf__ int* exp);
159-__SIMT_DEVICE_FUNCTIONS_DECL__ inline float frexpf(float x, __gm__ int *exp);159+__SIMT_DEVICE_FUNCTIONS_DECL__ inline float frexpf(float x, __gm__ int* exp);
160#endif160#endif
161 161 
162__SIMT_DEVICE_FUNCTIONS_DECL__ inline float ldexpf(float x, int exp);162__SIMT_DEVICE_FUNCTIONS_DECL__ inline float ldexpf(float x, int exp);
@@ -237,13 +237,15 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int llabs(long long int x);
237 237 
238__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int llmax(const long long int x, const long long int y);238__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int llmax(const long long int x, const long long int y);
239 239 
240-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int ullmax(const unsigned long long int x, const unsigned long long int y);240+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int ullmax(
241+ const unsigned long long int x, const unsigned long long int y);
241 242 
242__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int umax(const unsigned int x, const unsigned int y);243__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int umax(const unsigned int x, const unsigned int y);
243 244 
244__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int llmin(const long long int x, const long long int y);245__SIMT_DEVICE_FUNCTIONS_DECL__ inline long long int llmin(const long long int x, const long long int y);
245 246 
246-__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int ullmin(const unsigned long long int x, const unsigned long long int y);247+__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned long long int ullmin(
248+ const unsigned long long int x, const unsigned long long int y);
247 249 
248__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int umin(const unsigned int x, const unsigned int y);250__SIMT_DEVICE_FUNCTIONS_DECL__ inline unsigned int umin(const unsigned int x, const unsigned int y);
249 251 
@@ -343,4 +345,4 @@ static __SIMT_DEVICE_FUNCTIONS_DECL__ unsigned char min(unsigned char x, unsigne
343#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_MATH_FUNCTIONS_H__345#undef __UNDEF_ASCENDC_INCLUDE_INTERNAL_HEADERS_MATH_FUNCTIONS_H__
344#endif346#endif
345 347 
346-#endif // INCLUDE_SIMT_API_MATH_FUNCTIONS_H348+#endif // INCLUDE_SIMT_API_MATH_FUNCTIONS_H
Minclude/simt_api/vector_functions.h+12-12
@@ -30,8 +30,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline ushort2 make_ushort2(unsigned short x, uns
30 30 
31__SIMT_DEVICE_FUNCTIONS_DECL__ inline ushort3 make_ushort3(unsigned short x, unsigned short y, unsigned short z);31__SIMT_DEVICE_FUNCTIONS_DECL__ inline ushort3 make_ushort3(unsigned short x, unsigned short y, unsigned short z);
32 32 
33-__SIMT_DEVICE_FUNCTIONS_DECL__ inline ushort4 make_ushort4(unsigned short x, unsigned short y, unsigned short z,33+__SIMT_DEVICE_FUNCTIONS_DECL__ inline ushort4 make_ushort4(
34- unsigned short w);34+ unsigned short x, unsigned short y, unsigned short z, unsigned short w);
35 35 
36__SIMT_DEVICE_FUNCTIONS_DECL__ inline char2 make_char2(signed char x, signed char y);36__SIMT_DEVICE_FUNCTIONS_DECL__ inline char2 make_char2(signed char x, signed char y);
37 37 
@@ -43,8 +43,8 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline uchar2 make_uchar2(unsigned char x, unsign
43 43 
44__SIMT_DEVICE_FUNCTIONS_DECL__ inline uchar3 make_uchar3(unsigned char x, unsigned char y, unsigned char z);44__SIMT_DEVICE_FUNCTIONS_DECL__ inline uchar3 make_uchar3(unsigned char x, unsigned char y, unsigned char z);
45 45 
46-__SIMT_DEVICE_FUNCTIONS_DECL__ inline uchar4 make_uchar4(unsigned char x, unsigned char y, unsigned char z,46+__SIMT_DEVICE_FUNCTIONS_DECL__ inline uchar4 make_uchar4(
47- unsigned char w);47+ unsigned char x, unsigned char y, unsigned char z, unsigned char w);
48 48 
49__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 make_float2(float x, float y);49__SIMT_DEVICE_FUNCTIONS_DECL__ inline float2 make_float2(float x, float y);
50 50 
@@ -62,23 +62,23 @@ __SIMT_DEVICE_FUNCTIONS_DECL__ inline ulong2 make_ulong2(unsigned long int x, un
62 62 
63__SIMT_DEVICE_FUNCTIONS_DECL__ inline ulong3 make_ulong3(unsigned long int x, unsigned long int y, unsigned long int z);63__SIMT_DEVICE_FUNCTIONS_DECL__ inline ulong3 make_ulong3(unsigned long int x, unsigned long int y, unsigned long int z);
64 64 
65-__SIMT_DEVICE_FUNCTIONS_DECL__ inline ulong4 make_ulong4(unsigned long int x, unsigned long int y, unsigned long int z,65+__SIMT_DEVICE_FUNCTIONS_DECL__ inline ulong4 make_ulong4(
66- unsigned long int w);66+ unsigned long int x, unsigned long int y, unsigned long int z, unsigned long int w);
67 67 
68__SIMT_DEVICE_FUNCTIONS_DECL__ inline longlong2 make_longlong2(long long int x, long long int y);68__SIMT_DEVICE_FUNCTIONS_DECL__ inline longlong2 make_longlong2(long long int x, long long int y);
69 69 
70__SIMT_DEVICE_FUNCTIONS_DECL__ inline longlong3 make_longlong3(long long int x, long long int y, long long int z);70__SIMT_DEVICE_FUNCTIONS_DECL__ inline longlong3 make_longlong3(long long int x, long long int y, long long int z);
71 71 
72-__SIMT_DEVICE_FUNCTIONS_DECL__ inline longlong4 make_longlong4(long long int x, long long int y, long long int z,72+__SIMT_DEVICE_FUNCTIONS_DECL__ inline longlong4 make_longlong4(
73- long long int w);73+ long long int x, long long int y, long long int z, long long int w);
74 74 
75__SIMT_DEVICE_FUNCTIONS_DECL__ inline ulonglong2 make_ulonglong2(unsigned long long int x, unsigned long long int y);75__SIMT_DEVICE_FUNCTIONS_DECL__ inline ulonglong2 make_ulonglong2(unsigned long long int x, unsigned long long int y);
76 76 
77-__SIMT_DEVICE_FUNCTIONS_DECL__ inline ulonglong3 make_ulonglong3(unsigned long long int x, unsigned long long int y,77+__SIMT_DEVICE_FUNCTIONS_DECL__ inline ulonglong3 make_ulonglong3(
78- unsigned long long int z);78+ unsigned long long int x, unsigned long long int y, unsigned long long int z);
79 79 
80-__SIMT_DEVICE_FUNCTIONS_DECL__ inline ulonglong4 make_ulonglong4(unsigned long long int x, unsigned long long int y,80+__SIMT_DEVICE_FUNCTIONS_DECL__ inline ulonglong4 make_ulonglong4(
81- unsigned long long int z, unsigned long long int w);81+ unsigned long long int x, unsigned long long int y, unsigned long long int z, unsigned long long int w);
82 82 
83__SIMT_DEVICE_FUNCTIONS_DECL__ inline int2 make_int2(int x, int y);83__SIMT_DEVICE_FUNCTIONS_DECL__ inline int2 make_int2(int x, int y);
84 84 
Minclude/tensor_api/algorithm/copy.h+17-16
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "copy.h cannot be used with compile flag --enable-simt enabled."12#error "copy.h cannot be used with compile flag --enable-simt enabled."
@@ -18,9 +18,9 @@
18#endif18#endif
19 19 
20/*!20/*!
21-* \file copy.h21+ * \file copy.h
22-* \brief22+ * \brief
23-*/23+ */
24#ifndef INCLUDE_TENSOR_API_ALGORITHM_COPY_H24#ifndef INCLUDE_TENSOR_API_ALGORITHM_COPY_H
25#define INCLUDE_TENSOR_API_ALGORITHM_COPY_H25#define INCLUDE_TENSOR_API_ALGORITHM_COPY_H
26 26 
@@ -45,10 +45,11 @@ __aicore__ inline void Copy(const CopyAtom<AtomType>& atomCopy, const DstTensor&
45 * @param src : Source tensor.45 * @param src : Source tensor.
46 * @param quant : Quantization parameter, which can be a scalar or a Tensor API tensor.46 * @param quant : Quantization parameter, which can be a scalar or a Tensor API tensor.
47 */47 */
48-template <typename AtomType, typename DstTensor, typename SrcTensor, typename QuantParam,48+template <
49+ typename AtomType, typename DstTensor, typename SrcTensor, typename QuantParam,
49 Std::enable_if_t<IsCopyQuantParamV<QuantParam>, int> Enable>50 Std::enable_if_t<IsCopyQuantParamV<QuantParam>, int> Enable>
50-__aicore__ inline void Copy(const CopyAtom<AtomType>& atomCopy, const DstTensor& dst, const SrcTensor& src,51+__aicore__ inline void Copy(
51- const QuantParam& quant);52+ const CopyAtom<AtomType>& atomCopy, const DstTensor& dst, const SrcTensor& src, const QuantParam& quant);
52 53 
53/**54/**
54 * @brief Construct a CopyAtom from the copy operation object.55 * @brief Construct a CopyAtom from the copy operation object.
@@ -65,8 +66,8 @@ __aicore__ inline constexpr auto MakeCopy(const CopyOperationType& copyOperation
65template <typename CopyOperationType, typename CopyTraitType>66template <typename CopyOperationType, typename CopyTraitType>
66__aicore__ inline constexpr auto MakeCopy(const CopyOperationType& copyOperation, const CopyTraitType& copyTrait);67__aicore__ inline constexpr auto MakeCopy(const CopyOperationType& copyOperation, const CopyTraitType& copyTrait);
67 68 
68-}69+} // namespace Te
69-}70+} // namespace AscendC
70 71 
71#endif // INCLUDE_TENSOR_API_ALGORITHM_COPY_H72#endif // INCLUDE_TENSOR_API_ALGORITHM_COPY_H
72 73 
Minclude/tensor_api/algorithm/mmad.h+15-14
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "mmad.h cannot be used with compile flag --enable-simt enabled."12#error "mmad.h cannot be used with compile flag --enable-simt enabled."
@@ -18,9 +18,9 @@
18#endif18#endif
19 19 
20/*!20/*!
21-* \file mmad.h21+ * \file mmad.h
22-* \brief22+ * \brief
23-*/23+ */
24#ifndef INCLUDE_TENSOR_API_ALGORITHM_MMAD_H24#ifndef INCLUDE_TENSOR_API_ALGORITHM_MMAD_H
25#define INCLUDE_TENSOR_API_ALGORITHM_MMAD_H25#define INCLUDE_TENSOR_API_ALGORITHM_MMAD_H
26 26 
@@ -48,7 +48,8 @@ __aicore__ inline void Mmad(
48 * @param filter : Right input tensor.48 * @param filter : Right input tensor.
49 * @param bias : Bias tensor.49 * @param bias : Bias tensor.
50 */50 */
51-template <typename AtomType, typename DstTensor, typename FmTensor, typename FilterTensor, typename BiasTensor,51+template <
52+ typename AtomType, typename DstTensor, typename FmTensor, typename FilterTensor, typename BiasTensor,
52 Std::enable_if_t<IsAttrTensorV<BiasTensor>, int> Enable>53 Std::enable_if_t<IsAttrTensorV<BiasTensor>, int> Enable>
53__aicore__ inline void Mmad(54__aicore__ inline void Mmad(
54 const MmadAtom<AtomType>& atomMmad, const DstTensor& dst, const FmTensor& fm, const FilterTensor& filter,55 const MmadAtom<AtomType>& atomMmad, const DstTensor& dst, const FmTensor& fm, const FilterTensor& filter,
@@ -69,8 +70,8 @@ __aicore__ inline constexpr auto MakeMmad(const MmadOperationType& mmadOperation
69template <typename MmadOperationType, typename MmadTraitType>70template <typename MmadOperationType, typename MmadTraitType>
70__aicore__ inline constexpr auto MakeMmad(const MmadOperationType& mmadOperation, const MmadTraitType& mmadTrait);71__aicore__ inline constexpr auto MakeMmad(const MmadOperationType& mmadOperation, const MmadTraitType& mmadTrait);
71 72 
72-}73+} // namespace Te
73-}74+} // namespace AscendC
74 75 
75#endif // INCLUDE_TENSOR_API_ALGORITHM_MMAD_H76#endif // INCLUDE_TENSOR_API_ALGORITHM_MMAD_H
76 77 
Minclude/tensor_api/arch/arch.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if !defined(ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS)11#if !defined(ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
12#define ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS12#define ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS
@@ -14,9 +14,9 @@
14#endif14#endif
15 15 
16/*!16/*!
17-* \file arch.h17+ * \file arch.h
18-* \brief18+ * \brief
19-*/19+ */
20#ifndef INCLUDE_TENSOR_API_ARCH_ARCH_H20#ifndef INCLUDE_TENSOR_API_ARCH_ARCH_H
21#define INCLUDE_TENSOR_API_ARCH_ARCH_H21#define INCLUDE_TENSOR_API_ARCH_ARCH_H
22 22 
Minclude/tensor_api/arch/cube/copy_op.h+11-12
@@ -1,13 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10- 
11 10 
12#if !defined(ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS)11#if !defined(ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
13#define ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS12#define ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS
@@ -15,9 +14,9 @@
15#endif14#endif
16 15 
17/*!16/*!
18-* \file copy_op.h17+ * \file copy_op.h
19-* \brief18+ * \brief
20-*/19+ */
21#ifndef INCLUDE_TENSOR_API_ARCH_CUBE_COPY_OP_H20#ifndef INCLUDE_TENSOR_API_ARCH_CUBE_COPY_OP_H
22#define INCLUDE_TENSOR_API_ARCH_CUBE_COPY_OP_H21#define INCLUDE_TENSOR_API_ARCH_CUBE_COPY_OP_H
23 22 
Minclude/tensor_api/arch/cube/mmad_op.h+11-12
@@ -1,13 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10- 
11 10 
12#if !defined(ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS)11#if !defined(ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
13#define ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS12#define ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS
@@ -15,9 +14,9 @@
15#endif14#endif
16 15 
17/*!16/*!
18-* \file mmad_op.h17+ * \file mmad_op.h
19-* \brief18+ * \brief
20-*/19+ */
21#ifndef INCLUDE_TENSOR_API_ARCH_CUBE_MMAD_OP_H20#ifndef INCLUDE_TENSOR_API_ARCH_CUBE_MMAD_OP_H
22#define INCLUDE_TENSOR_API_ARCH_CUBE_MMAD_OP_H21#define INCLUDE_TENSOR_API_ARCH_CUBE_MMAD_OP_H
23 22 
Minclude/tensor_api/arch/vector/copy_op.h+11-12
@@ -1,13 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10- 
11 10 
12#if !defined(ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS)11#if !defined(ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
13#define ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS12#define ASCENDC_TENSOR_API_INCLUDE_COMPILER_INTERNAL_HEADERS
@@ -15,9 +14,9 @@
15#endif14#endif
16 15 
17/*!16/*!
18-* \file copy_op.h17+ * \file copy_op.h
19-* \brief18+ * \brief
20-*/19+ */
21#ifndef INCLUDE_TENSOR_API_ARCH_VECTOR_COPY_OP_H20#ifndef INCLUDE_TENSOR_API_ARCH_VECTOR_COPY_OP_H
22#define INCLUDE_TENSOR_API_ARCH_VECTOR_COPY_OP_H21#define INCLUDE_TENSOR_API_ARCH_VECTOR_COPY_OP_H
23 22 
Minclude/tensor_api/atom/atom.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "atom.h cannot be used with compile flag --enable-simt enabled."12#error "atom.h cannot be used with compile flag --enable-simt enabled."
@@ -18,9 +18,9 @@
18#endif18#endif
19 19 
20/*!20/*!
21-* \file atom.h21+ * \file atom.h
22-* \brief22+ * \brief
23-*/23+ */
24#ifndef INCLUDE_TENSOR_API_ATOM_ATOM_H24#ifndef INCLUDE_TENSOR_API_ATOM_ATOM_H
25#define INCLUDE_TENSOR_API_ATOM_ATOM_H25#define INCLUDE_TENSOR_API_ATOM_ATOM_H
26 26 
Minclude/tensor_api/atom/cube/copy_atom.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "copy_atom.h cannot be used with compile flag --enable-simt enabled."12#error "copy_atom.h cannot be used with compile flag --enable-simt enabled."
@@ -18,9 +18,9 @@
18#endif18#endif
19 19 
20/*!20/*!
21-* \file copy_atom.h21+ * \file copy_atom.h
22-* \brief22+ * \brief
23-*/23+ */
24#ifndef INCLUDE_TENSOR_API_ATOM_CUBE_COPY_ATOM_H24#ifndef INCLUDE_TENSOR_API_ATOM_CUBE_COPY_ATOM_H
25#define INCLUDE_TENSOR_API_ATOM_CUBE_COPY_ATOM_H25#define INCLUDE_TENSOR_API_ATOM_CUBE_COPY_ATOM_H
26 26 
Minclude/tensor_api/atom/cube/mmad_atom.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "mmad_atom.h cannot be used with compile flag --enable-simt enabled."12#error "mmad_atom.h cannot be used with compile flag --enable-simt enabled."
@@ -18,9 +18,9 @@
18#endif18#endif
19 19 
20/*!20/*!
21-* \file mmad_atom.h21+ * \file mmad_atom.h
22-* \brief22+ * \brief
23-*/23+ */
24#ifndef INCLUDE_TENSOR_API_ATOM_CUBE_MMAD_ATOM_H24#ifndef INCLUDE_TENSOR_API_ATOM_CUBE_MMAD_ATOM_H
25#define INCLUDE_TENSOR_API_ATOM_CUBE_MMAD_ATOM_H25#define INCLUDE_TENSOR_API_ATOM_CUBE_MMAD_ATOM_H
26 26 
Minclude/tensor_api/tensor.h+11-11
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "tensor.h cannot be used with compile flag --enable-simt enabled."12#error "tensor.h cannot be used with compile flag --enable-simt enabled."
@@ -18,9 +18,9 @@
18#endif18#endif
19 19 
20/*!20/*!
21-* \file tensor.h21+ * \file tensor.h
22-* \brief22+ * \brief
23-*/23+ */
24#ifndef INCLUDE_TENSOR_API_TENSOR_H24#ifndef INCLUDE_TENSOR_API_TENSOR_H
25#define INCLUDE_TENSOR_API_TENSOR_H25#define INCLUDE_TENSOR_API_TENSOR_H
26 26 
Minclude/tensor_api/tensor/layout.h+9-9
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "layout.h cannot be used with compile flag --enable-simt enabled."12#error "layout.h cannot be used with compile flag --enable-simt enabled."
@@ -40,7 +40,7 @@ template <typename... Ts>
40__aicore__ inline constexpr Stride<Ts...> MakeStride(const Ts&... t);40__aicore__ inline constexpr Stride<Ts...> MakeStride(const Ts&... t);
41 41 
42template <typename... Ts>42template <typename... Ts>
43-__aicore__ inline constexpr Tile<Ts...> MakeTile(const Ts&... t);43+__aicore__ inline constexpr Tile<Ts...> MakeTile(const Ts&... t);
44 44 
45template <typename... Ts>45template <typename... Ts>
46__aicore__ inline constexpr Coord<Ts...> MakeCoord(const Ts&... t);46__aicore__ inline constexpr Coord<Ts...> MakeCoord(const Ts&... t);
Minclude/tensor_api/tensor/pointer.h+10-12
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "pointer.h cannot be used with compile flag --enable-simt enabled."12#error "pointer.h cannot be used with compile flag --enable-simt enabled."
@@ -29,12 +29,10 @@
29namespace AscendC {29namespace AscendC {
30namespace Te {30namespace Te {
31 31 
32-template <typename PtrPattern, typename DataType, typename Addr,32+template <typename PtrPattern, typename DataType, typename Addr, EnableMakePtrByTrait<PtrPattern, Addr> Enable>
33- EnableMakePtrByTrait<PtrPattern, Addr> Enable>
34__aicore__ inline auto MakeMemPtr(Addr addr);33__aicore__ inline auto MakeMemPtr(Addr addr);
35 34 
36-template <typename PtrPattern, typename Iterator,35+template <typename PtrPattern, typename Iterator, EnableMakeHardwarePtr<PtrPattern, Iterator> Enable>
37- EnableMakeHardwarePtr<PtrPattern, Iterator> Enable>
38__aicore__ inline constexpr auto MakeMemPtr(Iterator iterator);36__aicore__ inline constexpr auto MakeMemPtr(Iterator iterator);
39 37 
40template <typename Iterator, EnableMakePtrByIter<Iterator> Enable>38template <typename Iterator, EnableMakePtrByIter<Iterator> Enable>
Minclude/tensor_api/tensor/tensor.h+8-8
@@ -1,12 +1,12 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10 10 
11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)11#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12#error "tensor.h cannot be used with compile flag --enable-simt enabled."12#error "tensor.h cannot be used with compile flag --enable-simt enabled."
Minclude/tensor_api/utils/utils.h+24-27
@@ -1,18 +1,17 @@
1/**1/**
2-* Copyright (c) 2026 Huawei Technologies Co., Ltd.2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3-* This program is free software, you can redistribute it and/or modify it under the terms and conditions of3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4-* CANN Open Software License Agreement Version 2.0 (the "License").4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5-* Please refer to the License for details. You may not use this file except in compliance with the License.5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6-* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7-* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8-* See LICENSE in the root of the software repository for the full text of the License.8+ * See LICENSE in the root of the software repository for the full text of the License.
9-*/9+ */
10- 
11 10 
12/*!11/*!
13-* \file utils.h12+ * \file utils.h
14-* \brief13+ * \brief
15-*/14+ */
16#ifndef INCLUDE_TENSOR_API_UTILS_UTILS_H15#ifndef INCLUDE_TENSOR_API_UTILS_UTILS_H
17#define INCLUDE_TENSOR_API_UTILS_UTILS_H16#define INCLUDE_TENSOR_API_UTILS_UTILS_H
18 17 
@@ -30,13 +29,14 @@ enum class CacheMode : uint8_t {
30 CACHE_MODE_PERSISTENT29 CACHE_MODE_PERSISTENT
31};30};
32 31 
33-enum class MmadType : uint8_t { NORMAL = 0, MX = 1};32+enum class MmadType : uint8_t { NORMAL = 0, MX = 1 };
34 33 
35struct MmadTrait {34struct MmadTrait {
36- __aicore__ constexpr MmadTrait() {};35+ __aicore__ constexpr MmadTrait(){};
37 36 
38- __aicore__ constexpr MmadTrait(int32_t fmOffsetIn, bool kDirectionAlignIn, bool cmatrixSourceIn,37+ __aicore__ constexpr MmadTrait(
39- bool disableGemvIn, MmadType mmadTypeIn) {38+ int32_t fmOffsetIn, bool kDirectionAlignIn, bool cmatrixSourceIn, bool disableGemvIn, MmadType mmadTypeIn)
39+ {
40 fmOffset = fmOffsetIn;40 fmOffset = fmOffsetIn;
41 kDirectionAlign = kDirectionAlignIn;41 kDirectionAlign = kDirectionAlignIn;
42 cmatrixSource = cmatrixSourceIn;42 cmatrixSource = cmatrixSourceIn;
@@ -52,10 +52,10 @@ struct MmadTrait {
52};52};
53 53 
54struct MmadParams {54struct MmadParams {
55- __aicore__ constexpr MmadParams() {};55+ __aicore__ constexpr MmadParams(){};
56 56 
57- __aicore__ constexpr MmadParams(uint16_t mIn, uint16_t nIn, uint16_t kIn, uint8_t unitFlagIn, bool cmatrixInitValIn) :57+ __aicore__ constexpr MmadParams(uint16_t mIn, uint16_t nIn, uint16_t kIn, uint8_t unitFlagIn, bool cmatrixInitValIn)
58- m(mIn), n(nIn), k(kIn), unitFlag(unitFlagIn), cmatrixInitVal(cmatrixInitValIn){};58+ : m(mIn), n(nIn), k(kIn), unitFlag(unitFlagIn), cmatrixInitVal(cmatrixInitValIn){};
59 59 
60 uint16_t m = 0;60 uint16_t m = 0;
61 uint16_t n = 0;61 uint16_t n = 0;
@@ -64,18 +64,15 @@ struct MmadParams {
64 bool cmatrixInitVal = false;64 bool cmatrixInitVal = false;
65};65};
66 66 
67-enum class RoundMode : uint8_t {DEFAULT = 0, HYBRID};67+enum class RoundMode : uint8_t { DEFAULT = 0, HYBRID };
68 68 
69-enum DualDstMode : uint8_t {69+enum DualDstMode : uint8_t { DUAL_DST_DISABLE = 0, DUAL_DST_SPLIT_M, DUAL_DST_SPLIT_N };
70- DUAL_DST_DISABLE = 0,
71- DUAL_DST_SPLIT_M,
72- DUAL_DST_SPLIT_N
73-};
74 70 
75struct FixpipeParams {71struct FixpipeParams {
76- __aicore__ constexpr FixpipeParams() {};72+ __aicore__ constexpr FixpipeParams(){};
77 73 
78- __aicore__ constexpr FixpipeParams(uint8_t unitFlagIn, bool subBlockIdIn = false) : unitFlag(unitFlagIn), subBlockId(subBlockIdIn) {};74+ __aicore__ constexpr FixpipeParams(uint8_t unitFlagIn, bool subBlockIdIn = false)
75+ : unitFlag(unitFlagIn), subBlockId(subBlockIdIn){};
79 76 
80 uint8_t unitFlag = 0;77 uint8_t unitFlag = 0;
81 78