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【C API】修改include下头文件包含，规避搜索路径问题。 #461
guojianyang创建于 2月10日
【C API】修改include下头文件包含，规避搜索路径问题。 #461
已合并
guojianyang创建于 2月10日
从Joey_guo/asc-devkitasc_path合入到cann/asc-devkitmaster
共 22 个文件变更+564-2253
Mimpl/c_api/instr_impl/npu_arch_2201/cube_datamove_impl.h+24-24
@@ -1479,98 +1479,98 @@ __aicore__ inline void asc_copy_l0c2gm_sync(__gm__ int32_t* dst, __cc__ int32_t*
1479// ==========asc_copy_l0c2l1==========1479// ==========asc_copy_l0c2l1==========
1480__aicore__ inline void asc_copy_l0c2l1(__cbuf__ half* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,1480__aicore__ inline void asc_copy_l0c2l1(__cbuf__ half* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,
1481 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1481 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1482- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1482+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1483{1483{
1484 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,1484 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
1485- quant_pre, relu_pre, channel_split, nd2nz_en);1485+ quant_pre, relu_pre, channel_split, en_nd2nz);
1486}1486}
1487 1487 
1488__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ half* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,1488__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ half* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,
1489 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1489 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1490- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1490+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1491{1491{
1492 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,1492 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,
1493- channel_split, nd2nz_en);1493+ channel_split, en_nd2nz);
1494}1494}
1495 1495 
1496__aicore__ inline void asc_copy_l0c2l1(__cbuf__ bfloat16_t* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,1496__aicore__ inline void asc_copy_l0c2l1(__cbuf__ bfloat16_t* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,
1497 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1497 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1498- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1498+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1499{1499{
1500 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,1500 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
1501- quant_pre, relu_pre, channel_split, nd2nz_en);1501+ quant_pre, relu_pre, channel_split, en_nd2nz);
1502}1502}
1503 1503 
1504__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ bfloat16_t* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,1504__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ bfloat16_t* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,
1505 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1505 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1506- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1506+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1507{1507{
1508 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,1508 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,
1509- channel_split, nd2nz_en);1509+ channel_split, en_nd2nz);
1510}1510}
1511 1511 
1512__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int8_t* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,1512__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int8_t* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,
1513 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1513 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1514- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1514+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1515{1515{
1516 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,1516 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
1517- quant_pre, relu_pre, channel_split, nd2nz_en);1517+ quant_pre, relu_pre, channel_split, en_nd2nz);
1518}1518}
1519 1519 
1520__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ int8_t* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,1520__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ int8_t* dst, __cc__ float* src, uint16_t n_size,uint16_t m_size,
1521 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1521 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1522- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1522+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1523{1523{
1524 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,1524 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,
1525- channel_split, nd2nz_en);1525+ channel_split, en_nd2nz);
1526}1526}
1527 1527 
1528__aicore__ inline void asc_copy_l0c2l1(__cbuf__ half* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,1528__aicore__ inline void asc_copy_l0c2l1(__cbuf__ half* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,
1529 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1529 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1530- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1530+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1531{1531{
1532 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,1532 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
1533- quant_pre, relu_pre, channel_split, nd2nz_en);1533+ quant_pre, relu_pre, channel_split, en_nd2nz);
1534}1534}
1535 1535 
1536__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ half* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,1536__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ half* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,
1537 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1537 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1538- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1538+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1539{1539{
1540 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,1540 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,
1541- channel_split, nd2nz_en);1541+ channel_split, en_nd2nz);
1542}1542}
1543 1543 
1544__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,1544__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,
1545 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1545 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1546- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1546+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1547{1547{
1548 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,1548 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
1549- quant_pre, relu_pre, channel_split, nd2nz_en);1549+ quant_pre, relu_pre, channel_split, en_nd2nz);
1550}1550}
1551 1551 
1552__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,1552__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,
1553 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1553 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1554- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1554+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1555{1555{
1556 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,1556 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,
1557- channel_split, nd2nz_en);1557+ channel_split, en_nd2nz);
1558}1558}
1559 1559 
1560__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,1560__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,
1561 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1561 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1562- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1562+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1563{1563{
1564 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,1564 asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
1565- quant_pre, relu_pre, channel_split, nd2nz_en);1565+ quant_pre, relu_pre, channel_split, en_nd2nz);
1566}1566}
1567 1567 
1568__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,1568__aicore__ inline void asc_copy_l0c2l1_sync(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint16_t n_size,uint16_t m_size,
1569 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,1569 uint32_t dst_stride_dst_d, uint16_t src_stride, uint8_t uint_flag_mode,
1570- uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool nd2nz_en)1570+ uint64_t quant_pre, uint8_t relu_pre, bool channel_split, bool en_nd2nz)
1571{1571{
1572 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,1572 asc_copy_l0c2l1_sync_impl(dst, src, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, quant_pre, relu_pre,
1573- channel_split, nd2nz_en);1573+ channel_split, en_nd2nz);
1574}1574}
1575 1575 
1576#endif1576#endif
Mimpl/c_api/instr_impl/npu_arch_2201/cube_datamove_impl/asc_copy_l0c2l1_impl.h+0-1
@@ -19,7 +19,6 @@
19 19 
20#include "instr_impl/npu_arch_2201/utils_impl/utils_impl.h"20#include "instr_impl/npu_arch_2201/utils_impl/utils_impl.h"
21 21 
22-// asc_copy_l0c2l1
23__aicore__ inline void asc_copy_l0c2l1_impl(__cbuf__ half* dst, __cc__ float* src, uint16_t n_size,22__aicore__ inline void asc_copy_l0c2l1_impl(__cbuf__ half* dst, __cc__ float* src, uint16_t n_size,
24 uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,23 uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
25 uint8_t uint_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool channel_split,24 uint8_t uint_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool channel_split,
Mimpl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl.h+104-878
@@ -11,14 +11,7 @@
11#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_H11#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_H
12#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_H12#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_H
13 13 
14-#include "instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_deqf16_impl.h"14+#include "instr_impl/npu_arch_3510/cube_datamove_impl/asc_copy_l0c2l1_impl.h"
15-#include "instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_f322bf16_impl.h"
16-#include "instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_f322f16_impl.h"
17-#include "instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_qf322b8_pre_impl.h"
18-#include "instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_req8_impl.h"
19-#include "instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_vdeqf16_impl.h"
20-#include "instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_vqf322b8_pre_impl.h"
21-#include "instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_vreq8_impl.h"
22#include "instr_impl/npu_arch_3510/cube_datamove_impl/asc_copy_l12l0a_mx_impl.h"15#include "instr_impl/npu_arch_3510/cube_datamove_impl/asc_copy_l12l0a_mx_impl.h"
23#include "instr_impl/npu_arch_3510/cube_datamove_impl/asc_set_l13d_rpt_impl.h"16#include "instr_impl/npu_arch_3510/cube_datamove_impl/asc_set_l13d_rpt_impl.h"
24#include "instr_impl/npu_arch_3510/cube_datamove_impl/asc_set_l13d_fmatrix_impl.h"17#include "instr_impl/npu_arch_3510/cube_datamove_impl/asc_set_l13d_fmatrix_impl.h"
@@ -28,876 +21,109 @@
28#include "instr_impl/npu_arch_3510/cube_datamove_impl/asc_set_gm2l1_loop2_stride_impl.h"21#include "instr_impl/npu_arch_3510/cube_datamove_impl/asc_set_gm2l1_loop2_stride_impl.h"
29#include "instr_impl/npu_arch_3510/cube_datamove_impl/asc_set_gm2l1_pad_impl.h"22#include "instr_impl/npu_arch_3510/cube_datamove_impl/asc_set_gm2l1_pad_impl.h"
30 23 
31-// ==========asc_fixpipe_l0c2l1_deqf16===========24+// ==========asc_copy_l0c2l1===========
32-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,25+// half float
33- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,26+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ half* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
34- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,27+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
35- bool nd2nz_en)28+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
36-{29+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
37- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,30+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
38- channel_split, nd2nz_en);31+ bool c0_pad_en)
39-}32+{
40- 33+ asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
41-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16_sync(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,34+ quant_pre, relu_pre, channel_split, nz2nd_en, quant_post, relu_post, clip_relu_post, eltwise_op,
42- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,35+ eltwise_antq_cfg, c0_pad_en);
43- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,36+}
44- bool channel_split, bool nd2nz_en)37+ 
45-{38+// int8_t float
46- asc_copy_l0c2l1_deqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,39+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
47- relu_pre, channel_split, nd2nz_en);40+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
48-}41+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
49- 42+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
50-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,43+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
51- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,44+ bool c0_pad_en)
52- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,45+{
53- bool nd2nz_en)46+ asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
54-{47+ quant_pre, relu_pre, channel_split, nz2nd_en, quant_post, relu_post, clip_relu_post, eltwise_op,
55- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,48+ eltwise_antq_cfg, c0_pad_en);
56- channel_split, nd2nz_en);49+}
57-}50+ 
58- 51+// uint8_t float
59-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16_sync(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,52+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ uint8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
60- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,53+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
61- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,54+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
62- bool channel_split, bool nd2nz_en)55+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
63-{56+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
64- asc_copy_l0c2l1_deqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,57+ bool c0_pad_en)
65- relu_pre, channel_split, nd2nz_en);58+{
66-}59+ asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
67- 60+ quant_pre, relu_pre, channel_split, nz2nd_en, quant_post, relu_post, clip_relu_post, eltwise_op,
68-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid, uint16_t n_size,61+ eltwise_antq_cfg, c0_pad_en);
69- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,62+}
70- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,63+ 
71- bool nd2nz_en)64+// float float
72-{65+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ float* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
73- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,66+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
74- channel_split, nd2nz_en);67+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
75-}68+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
76- 69+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
77-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16_sync(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,70+ bool c0_pad_en)
78- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,71+{
79- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,72+ asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
80- bool channel_split, bool nd2nz_en)73+ quant_pre, relu_pre, channel_split, nz2nd_en, quant_post, relu_post, clip_relu_post, eltwise_op,
81-{74+ eltwise_antq_cfg, c0_pad_en);
82- asc_copy_l0c2l1_deqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,75+}
83- relu_pre, channel_split, nd2nz_en);76+ 
84-}77+// half int32_t
85- 78+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ half* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
86-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,79+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
87- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,80+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
88- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,81+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
89- bool channel_split, bool nd2nz_en)82+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
90-{83+ bool c0_pad_en)
91- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,84+{
92- channel_split, nd2nz_en);85+ asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
93-}86+ quant_pre, relu_pre, channel_split, nz2nd_en, quant_post, relu_post, clip_relu_post, eltwise_op,
94- 87+ eltwise_antq_cfg, c0_pad_en);
95-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16_sync(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,88+}
96- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,89+ 
97- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,90+// int8_t int32_t
98- bool channel_split, bool nd2nz_en)91+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
99-{92+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
100- asc_copy_l0c2l1_deqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,93+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
101- relu_pre, channel_split, nd2nz_en);94+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
102-}95+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
103- 96+ bool c0_pad_en)
104-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,97+{
105- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,98+ asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
106- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,99+ quant_pre, relu_pre, channel_split, nz2nd_en, quant_post, relu_post, clip_relu_post, eltwise_op,
107- bool channel_split, bool nd2nz_en)100+ eltwise_antq_cfg, c0_pad_en);
108-{101+}
109- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,102+ 
110- channel_split, nd2nz_en);103+// uint8_t int32_t
111-}104+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
112- 105+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
113-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16_sync(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,106+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
114- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,107+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
115- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,108+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
116- bool channel_split, bool nd2nz_en)109+ bool c0_pad_en)
117-{110+{
118- asc_copy_l0c2l1_deqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,111+ asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
119- relu_pre, channel_split, nd2nz_en);112+ quant_pre, relu_pre, channel_split, nz2nd_en, quant_post, relu_post, clip_relu_post, eltwise_op,
120-}113+ eltwise_antq_cfg, c0_pad_en);
121- 114+}
122-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,115+ 
123- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,116+// int32_t int32_t
124- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,117+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int32_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
125- bool channel_split, bool nd2nz_en)118+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
126-{119+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
127- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,120+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
128- channel_split, nd2nz_en);121+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
129-}122+ bool c0_pad_en)
130- 123+{
131-__aicore__ inline void asc_fixpipe_l0c2l1_deqf16_sync(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,124+ asc_copy_l0c2l1_impl(dst, src, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
132- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,125+ quant_pre, relu_pre, channel_split, nz2nd_en, quant_post, relu_post, clip_relu_post, eltwise_op,
133- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,126+ eltwise_antq_cfg, c0_pad_en);
134- bool channel_split, bool nd2nz_en)
135-{
136- asc_copy_l0c2l1_deqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
137- relu_pre, channel_split, nd2nz_en);
138-}
139- 
140-// ==========asc_fixpipe_l0c2l1_f322bf16===========
141-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
142- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
143- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
144- bool nd2nz_en)
145-{
146- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
147- channel_split, nd2nz_en);
148-}
149- 
150-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16_sync(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
151- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
152- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
153- bool channel_split, bool nd2nz_en)
154-{
155- asc_copy_l0c2l1_f322bf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
156- relu_pre, channel_split, nd2nz_en);
157-}
158- 
159-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
160- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
161- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
162- bool channel_split, bool nd2nz_en)
163-{
164- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
165- channel_split, nd2nz_en);
166-}
167- 
168-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16_sync(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
169- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
170- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
171- bool channel_split, bool nd2nz_en)
172-{
173- asc_copy_l0c2l1_f322bf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
174- relu_pre, channel_split, nd2nz_en);
175-}
176- 
177-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
178- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
179- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
180- bool channel_split, bool nd2nz_en)
181-{
182- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
183- channel_split, nd2nz_en);
184-}
185- 
186-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16_sync(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
187- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
188- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
189- bool channel_split, bool nd2nz_en)
190-{
191- asc_copy_l0c2l1_f322bf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
192- relu_pre, channel_split, nd2nz_en);
193-}
194- 
195-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
196- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
197- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
198- bool channel_split, bool nd2nz_en)
199-{
200- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
201- channel_split, nd2nz_en);
202-}
203- 
204-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16_sync(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
205- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
206- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
207- bool channel_split, bool nd2nz_en)
208-{
209- asc_copy_l0c2l1_f322bf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
210- relu_pre, channel_split, nd2nz_en);
211-}
212- 
213-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
214- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
215- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
216- bool channel_split, bool nd2nz_en)
217-{
218- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
219- channel_split, nd2nz_en);
220-}
221- 
222-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16_sync(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
223- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
224- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
225- bool channel_split, bool nd2nz_en)
226-{
227- asc_copy_l0c2l1_f322bf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
228- relu_pre, channel_split, nd2nz_en);
229-}
230- 
231-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
232- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
233- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
234- bool channel_split, bool nd2nz_en)
235-{
236- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
237- channel_split, nd2nz_en);
238-}
239- 
240-__aicore__ inline void asc_fixpipe_l0c2l1_f322bf16_sync(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
241- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
242- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
243- bool channel_split, bool nd2nz_en)
244-{
245- asc_copy_l0c2l1_f322bf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
246- relu_pre, channel_split, nd2nz_en);
247-}
248- 
249-// ==========asc_fixpipe_l0c2l1_f322f16===========
250-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
251- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
252- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
253- bool nd2nz_en)
254-{
255- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
256- channel_split, nd2nz_en);
257-}
258- 
259-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16_sync(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
260- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
261- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
262- bool channel_split, bool nd2nz_en)
263-{
264- asc_copy_l0c2l1_f322f16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
265- relu_pre, channel_split, nd2nz_en);
266-}
267- 
268-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
269- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
270- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
271- bool nd2nz_en)
272-{
273- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
274- channel_split, nd2nz_en);
275-}
276- 
277-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16_sync(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
278- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
279- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
280- bool channel_split, bool nd2nz_en)
281-{
282- asc_copy_l0c2l1_f322f16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
283- relu_pre, channel_split, nd2nz_en);
284-}
285- 
286-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid, uint16_t n_size,
287- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
288- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
289- bool nd2nz_en)
290-{
291- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
292- channel_split, nd2nz_en);
293-}
294- 
295-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16_sync(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
296- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
297- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
298- bool channel_split, bool nd2nz_en)
299-{
300- asc_copy_l0c2l1_f322f16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
301- relu_pre, channel_split, nd2nz_en);
302-}
303- 
304-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
305- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
306- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
307- bool channel_split, bool nd2nz_en)
308-{
309- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
310- channel_split, nd2nz_en);
311-}
312- 
313-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16_sync(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
314- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
315- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
316- bool channel_split, bool nd2nz_en)
317-{
318- asc_copy_l0c2l1_f322f16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
319- relu_pre, channel_split, nd2nz_en);
320-}
321- 
322-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
323- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
324- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
325- bool channel_split, bool nd2nz_en)
326-{
327- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
328- channel_split, nd2nz_en);
329-}
330- 
331-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16_sync(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
332- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
333- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
334- bool channel_split, bool nd2nz_en)
335-{
336- asc_copy_l0c2l1_f322f16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
337- relu_pre, channel_split, nd2nz_en);
338-}
339- 
340-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
341- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
342- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
343- bool channel_split, bool nd2nz_en)
344-{
345- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
346- channel_split, nd2nz_en);
347-}
348- 
349-__aicore__ inline void asc_fixpipe_l0c2l1_f322f16_sync(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
350- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
351- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
352- bool channel_split, bool nd2nz_en)
353-{
354- asc_copy_l0c2l1_f322f16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
355- relu_pre, channel_split, nd2nz_en);
356-}
357- 
358-// ==========asc_fixpipe_l0c2l1_qf322b8_pre===========
359-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
360- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
361- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
362- bool channel_split, bool nd2nz_en)
363-{
364- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
365- relu_pre, channel_split, nd2nz_en);
366-}
367- 
368-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre_sync(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
369- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
370- uint16_t src_stride, uint8_t uint_flag_mode,
371- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
372-{
373- asc_copy_l0c2l1_qf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
374- relu_pre, channel_split, nd2nz_en);
375-}
376- 
377-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
378- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
379- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
380- bool channel_split, bool nd2nz_en)
381-{
382- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
383- relu_pre, channel_split, nd2nz_en);
384-}
385- 
386-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre_sync(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
387- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
388- uint16_t src_stride, uint8_t uint_flag_mode,
389- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
390-{
391- asc_copy_l0c2l1_qf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
392- relu_pre, channel_split, nd2nz_en);
393-}
394- 
395-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
396- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
397- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
398- bool channel_split, bool nd2nz_en)
399-{
400- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
401- relu_pre, channel_split, nd2nz_en);
402-}
403- 
404-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre_sync(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
405- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
406- uint16_t src_stride, uint8_t uint_flag_mode,
407- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
408-{
409- asc_copy_l0c2l1_qf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
410- relu_pre, channel_split, nd2nz_en);
411-}
412- 
413-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
414- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
415- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
416- bool channel_split, bool nd2nz_en)
417-{
418- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
419- relu_pre, channel_split, nd2nz_en);
420-}
421- 
422-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre_sync(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
423- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
424- uint16_t src_stride, uint8_t uint_flag_mode,
425- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
426-{
427- asc_copy_l0c2l1_qf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
428- relu_pre, channel_split, nd2nz_en);
429-}
430- 
431-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
432- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
433- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
434- bool channel_split, bool nd2nz_en)
435-{
436- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
437- relu_pre, channel_split, nd2nz_en);
438-}
439- 
440-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre_sync(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
441- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
442- uint16_t src_stride, uint8_t uint_flag_mode,
443- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
444-{
445- asc_copy_l0c2l1_qf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
446- relu_pre, channel_split, nd2nz_en);
447-}
448- 
449-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
450- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
451- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
452- bool channel_split, bool nd2nz_en)
453-{
454- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
455- relu_pre, channel_split, nd2nz_en);
456-}
457- 
458-__aicore__ inline void asc_fixpipe_l0c2l1_qf322b8_pre_sync(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
459- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
460- uint16_t src_stride, uint8_t uint_flag_mode,
461- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
462-{
463- asc_copy_l0c2l1_qf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
464- relu_pre, channel_split, nd2nz_en);
465-}
466- 
467-// ==========asc_fixpipe_l0c2l1_req8===========
468-__aicore__ inline void asc_fixpipe_l0c2l1_req8(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
469- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
470- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
471- bool nd2nz_en)
472-{
473- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
474- channel_split, nd2nz_en);
475-}
476- 
477-__aicore__ inline void asc_fixpipe_l0c2l1_req8_sync(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
478- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
479- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
480- bool nd2nz_en)
481-{
482- asc_copy_l0c2l1_req8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
483- relu_pre, channel_split, nd2nz_en);
484-}
485- 
486-__aicore__ inline void asc_fixpipe_l0c2l1_req8(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
487- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
488- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
489- bool nd2nz_en)
490-{
491- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
492- channel_split, nd2nz_en);
493-}
494- 
495-__aicore__ inline void asc_fixpipe_l0c2l1_req8_sync(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
496- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
497- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
498- bool channel_split, bool nd2nz_en)
499-{
500- asc_copy_l0c2l1_req8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
501- relu_pre, channel_split, nd2nz_en);
502-}
503- 
504-__aicore__ inline void asc_fixpipe_l0c2l1_req8(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid, uint16_t n_size,
505- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
506- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
507- bool nd2nz_en)
508-{
509- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
510- channel_split, nd2nz_en);
511-}
512- 
513-__aicore__ inline void asc_fixpipe_l0c2l1_req8_sync(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
514- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
515- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
516- bool channel_split, bool nd2nz_en)
517-{
518- asc_copy_l0c2l1_req8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
519- relu_pre, channel_split, nd2nz_en);
520-}
521- 
522-__aicore__ inline void asc_fixpipe_l0c2l1_req8(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid, uint16_t n_size,
523- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
524- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
525- bool nd2nz_en)
526-{
527- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
528- channel_split, nd2nz_en);
529-}
530- 
531-__aicore__ inline void asc_fixpipe_l0c2l1_req8_sync(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
532- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
533- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
534- bool channel_split, bool nd2nz_en)
535-{
536- asc_copy_l0c2l1_req8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
537- relu_pre, channel_split, nd2nz_en);
538-}
539- 
540-__aicore__ inline void asc_fixpipe_l0c2l1_req8(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid, uint16_t n_size,
541- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
542- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
543- bool nd2nz_en)
544-{
545- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
546- channel_split, nd2nz_en);
547-}
548- 
549-__aicore__ inline void asc_fixpipe_l0c2l1_req8_sync(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
550- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
551- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
552- bool channel_split, bool nd2nz_en)
553-{
554- asc_copy_l0c2l1_req8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
555- relu_pre, channel_split, nd2nz_en);
556-}
557- 
558-__aicore__ inline void asc_fixpipe_l0c2l1_req8(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid, uint16_t n_size,
559- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
560- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
561- bool nd2nz_en)
562-{
563- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
564- channel_split, nd2nz_en);
565-}
566- 
567-__aicore__ inline void asc_fixpipe_l0c2l1_req8_sync(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
568- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
569- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
570- bool channel_split, bool nd2nz_en)
571-{
572- asc_copy_l0c2l1_req8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
573- relu_pre, channel_split, nd2nz_en);
574-}
575- 
576-// ==========asc_fixpipe_l0c2l1_vdeqf16===========
577-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
578- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
579- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
580- bool nd2nz_en)
581-{
582- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
583- channel_split, nd2nz_en);
584-}
585- 
586-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16_sync(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
587- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
588- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
589- bool channel_split, bool nd2nz_en)
590-{
591- asc_copy_l0c2l1_vdeqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
592- relu_pre, channel_split, nd2nz_en);
593-}
594- 
595-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
596- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
597- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
598- bool nd2nz_en)
599-{
600- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
601- channel_split, nd2nz_en);
602-}
603- 
604-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16_sync(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
605- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
606- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
607- bool channel_split, bool nd2nz_en)
608-{
609- asc_copy_l0c2l1_vdeqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
610- relu_pre, channel_split, nd2nz_en);
611-}
612- 
613-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid, uint16_t n_size,
614- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
615- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
616- bool nd2nz_en)
617-{
618- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
619- channel_split, nd2nz_en);
620-}
621- 
622-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16_sync(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
623- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
624- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
625- bool channel_split, bool nd2nz_en)
626-{
627- asc_copy_l0c2l1_vdeqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
628- relu_pre, channel_split, nd2nz_en);
629-}
630- 
631-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
632- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
633- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
634- bool channel_split, bool nd2nz_en)
635-{
636- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
637- channel_split, nd2nz_en);
638-}
639- 
640-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16_sync(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
641- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
642- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
643- bool channel_split, bool nd2nz_en)
644-{
645- asc_copy_l0c2l1_vdeqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
646- relu_pre, channel_split, nd2nz_en);
647-}
648- 
649-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
650- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
651- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
652- bool channel_split, bool nd2nz_en)
653-{
654- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
655- channel_split, nd2nz_en);
656-}
657- 
658-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16_sync(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
659- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
660- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
661- bool channel_split, bool nd2nz_en)
662-{
663- asc_copy_l0c2l1_vdeqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
664- relu_pre, channel_split, nd2nz_en);
665-}
666- 
667-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
668- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
669- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
670- bool channel_split, bool nd2nz_en)
671-{
672- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
673- channel_split, nd2nz_en);
674-}
675- 
676-__aicore__ inline void asc_fixpipe_l0c2l1_vdeqf16_sync(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
677- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
678- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
679- bool channel_split, bool nd2nz_en)
680-{
681- asc_copy_l0c2l1_vdeqf16_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
682- relu_pre, channel_split, nd2nz_en);
683-}
684- 
685-// ==========asc_fixpipe_l0c2l1_vqf322b8_pre===========
686-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
687- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
688- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
689- bool channel_split, bool nd2nz_en)
690-{
691- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
692- relu_pre, channel_split, nd2nz_en);
693-}
694- 
695-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre_sync(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
696- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
697- uint16_t src_stride, uint8_t uint_flag_mode,
698- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
699-{
700- asc_copy_l0c2l1_vqf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
701- relu_pre, channel_split, nd2nz_en);
702-}
703- 
704-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
705- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
706- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
707- bool channel_split, bool nd2nz_en)
708-{
709- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
710- relu_pre, channel_split, nd2nz_en);
711-}
712- 
713-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre_sync(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
714- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
715- uint16_t src_stride, uint8_t uint_flag_mode,
716- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
717-{
718- asc_copy_l0c2l1_vqf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
719- relu_pre, channel_split, nd2nz_en);
720-}
721- 
722-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
723- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
724- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
725- bool channel_split, bool nd2nz_en)
726-{
727- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
728- relu_pre, channel_split, nd2nz_en);
729-}
730- 
731-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre_sync(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
732- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
733- uint16_t src_stride, uint8_t uint_flag_mode,
734- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
735-{
736- asc_copy_l0c2l1_vqf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
737- relu_pre, channel_split, nd2nz_en);
738-}
739- 
740-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
741- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
742- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
743- bool channel_split, bool nd2nz_en)
744-{
745- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
746- relu_pre, channel_split, nd2nz_en);
747-}
748- 
749-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre_sync(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
750- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
751- uint16_t src_stride, uint8_t uint_flag_mode,
752- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
753-{
754- asc_copy_l0c2l1_vqf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
755- relu_pre, channel_split, nd2nz_en);
756-}
757- 
758-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
759- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
760- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
761- bool channel_split, bool nd2nz_en)
762-{
763- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
764- relu_pre, channel_split, nd2nz_en);
765-}
766- 
767-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre_sync(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
768- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
769- uint16_t src_stride, uint8_t uint_flag_mode,
770- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
771-{
772- asc_copy_l0c2l1_vqf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
773- relu_pre, channel_split, nd2nz_en);
774-}
775- 
776-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
777- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
778- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
779- bool channel_split, bool nd2nz_en)
780-{
781- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
782- relu_pre, channel_split, nd2nz_en);
783-}
784- 
785-__aicore__ inline void asc_fixpipe_l0c2l1_vqf322b8_pre_sync(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
786- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
787- uint16_t src_stride, uint8_t uint_flag_mode,
788- uint8_t relu_pre, bool channel_split, bool nd2nz_en)
789-{
790- asc_copy_l0c2l1_vqf322b8_pre_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
791- relu_pre, channel_split, nd2nz_en);
792-}
793- 
794-// ==========asc_fixpipe_l0c2l1_vreq8===========
795-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
796- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
797- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
798- bool nd2nz_en)
799-{
800- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
801- channel_split, nd2nz_en);
802-}
803- 
804-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8_sync(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
805- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
806- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
807- bool channel_split, bool nd2nz_en)
808-{
809- asc_copy_l0c2l1_vreq8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
810- relu_pre, channel_split, nd2nz_en);
811-}
812- 
813-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
814- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
815- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
816- bool nd2nz_en)
817-{
818- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
819- channel_split, nd2nz_en);
820-}
821- 
822-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8_sync(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
823- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
824- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
825- bool channel_split, bool nd2nz_en)
826-{
827- asc_copy_l0c2l1_vreq8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
828- relu_pre, channel_split, nd2nz_en);
829-}
830- 
831-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid, uint16_t n_size,
832- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
833- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
834- bool nd2nz_en)
835-{
836- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
837- channel_split, nd2nz_en);
838-}
839- 
840-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8_sync(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
841- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
842- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
843- bool channel_split, bool nd2nz_en)
844-{
845- asc_copy_l0c2l1_vreq8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
846- relu_pre, channel_split, nd2nz_en);
847-}
848- 
849-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
850- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
851- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
852- bool channel_split, bool nd2nz_en)
853-{
854- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
855- channel_split, nd2nz_en);
856-}
857- 
858-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8_sync(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
859- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
860- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
861- bool channel_split, bool nd2nz_en)
862-{
863- asc_copy_l0c2l1_vreq8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
864- relu_pre, channel_split, nd2nz_en);
865-}
866- 
867-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid, uint16_t n_size,
868- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
869- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
870- bool nd2nz_en)
871-{
872- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
873- channel_split, nd2nz_en);
874-}
875- 
876-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8_sync(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
877- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
878- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
879- bool channel_split, bool nd2nz_en)
880-{
881- asc_copy_l0c2l1_vreq8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
882- relu_pre, channel_split, nd2nz_en);
883-}
884- 
885-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
886- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
887- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
888- bool channel_split, bool nd2nz_en)
889-{
890- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
891- channel_split, nd2nz_en);
892-}
893- 
894-__aicore__ inline void asc_fixpipe_l0c2l1_vreq8_sync(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
895- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
896- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
897- bool channel_split, bool nd2nz_en)
898-{
899- asc_copy_l0c2l1_vreq8_sync_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
900- relu_pre, channel_split, nd2nz_en);
901}127}
902 128 
903__aicore__ inline void asc_copy_l12l0a_mx(uint64_t dst, __cbuf__ fp8_e8m0_t* src, uint16_t x_start_pos,129__aicore__ inline void asc_copy_l12l0a_mx(uint64_t dst, __cbuf__ fp8_e8m0_t* src, uint16_t x_start_pos,
Aimpl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/asc_copy_l0c2l1_impl.h+149-0
@@ -0,0 +1,149 @@
1+/**
2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+ * See LICENSE in the root of the software repository for the full text of the License.
9+ */
10+ 
11+#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
12+#warning "impl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/asc_copy_l0c2l1_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file maybe removed in the future. Please use "#include "c_api/asc_simd.h"" and use public functions or variables defined in interface headers files."
13+#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
14+#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
15+#endif
16+ 
17+#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_ASC_COPY_L0C2L1_IMPL_H
18+#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_ASC_COPY_L0C2L1_IMPL_H
19+ 
20+#include "instr_impl/npu_arch_3510/utils_impl/utils_impl.h"
21+ 
22+// half float
23+__aicore__ inline void asc_copy_l0c2l1_impl(__cbuf__ half* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
24+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
25+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
26+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
W
Wwuzhaolin2月10日

直接使用cce_intri的形参感觉不太合适，有的表述不清楚： channel_split => enable_channel_split nz2nd_en => enable_nz2ndd

likedislike
guojianyang
guojianyang
2月10日 评论：
27+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
28+ bool c0_pad_en)
29+{
30+ if ASC_IS_AIC {
31+ copy_matrix_cc_to_cbuf(dst, src, 0, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
32+ static_cast<QuantMode_t>(quant_pre), relu_pre, channel_split, nz2nd_en, static_cast<QuantMode_post>(quant_post),
33+ relu_post, clip_relu_post, eltwise_op, eltwise_antq_cfg, c0_pad_en);
34+ }
35+}
36+ 
37+ 
38+// int8_t float
W
Wwuzhaolin2月10日

这个是无效的注释，建议删掉， 如果是要描述接口的数据类型，建议注释添加的详细一些

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guojianyang
guojianyang
2月10日 评论：
39+__aicore__ inline void asc_copy_l0c2l1_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
40+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
41+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
42+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
43+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
44+ bool c0_pad_en)
45+{
46+ if ASC_IS_AIC {
47+ copy_matrix_cc_to_cbuf(dst, src, 0, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
48+ static_cast<QuantMode_t>(quant_pre), relu_pre, channel_split, nz2nd_en, static_cast<QuantMode_post>(quant_post),
49+ relu_post, clip_relu_post, eltwise_op, eltwise_antq_cfg, c0_pad_en);
50+ }
51+}
52+ 
53+ 
54+// uint8_t float
55+__aicore__ inline void asc_copy_l0c2l1_impl(__cbuf__ uint8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
56+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
57+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
58+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
59+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
60+ bool c0_pad_en)
61+{
62+ if ASC_IS_AIC {
63+ copy_matrix_cc_to_cbuf(dst, src, 0, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
64+ static_cast<QuantMode_t>(quant_pre), relu_pre, channel_split, nz2nd_en, static_cast<QuantMode_post>(quant_post),
65+ relu_post, clip_relu_post, eltwise_op, eltwise_antq_cfg, c0_pad_en);
66+ }
67+}
68+ 
69+// float float
70+__aicore__ inline void asc_copy_l0c2l1_impl(__cbuf__ float* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
71+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
72+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
73+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
74+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
75+ bool c0_pad_en)
76+{
77+ if ASC_IS_AIC {
78+ copy_matrix_cc_to_cbuf(dst, src, 0, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
79+ static_cast<QuantMode_t>(quant_pre), relu_pre, channel_split, nz2nd_en, static_cast<QuantMode_post>(quant_post),
80+ relu_post, clip_relu_post, eltwise_op, eltwise_antq_cfg, c0_pad_en);
81+ }
82+}
83+ 
84+// half int32_t
85+__aicore__ inline void asc_copy_l0c2l1_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
86+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
87+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
88+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
89+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
90+ bool c0_pad_en)
91+{
92+ if ASC_IS_AIC {
93+ copy_matrix_cc_to_cbuf(dst, src, 0, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
94+ static_cast<QuantMode_t>(quant_pre), relu_pre, channel_split, nz2nd_en, static_cast<QuantMode_post>(quant_post),
95+ relu_post, clip_relu_post, eltwise_op, eltwise_antq_cfg, c0_pad_en);
96+ }
97+}
98+ 
99+// int8_t int32_t
100+__aicore__ inline void asc_copy_l0c2l1_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
101+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
102+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
103+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
104+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
105+ bool c0_pad_en)
106+{
107+ if ASC_IS_AIC {
108+ copy_matrix_cc_to_cbuf(dst, src, 0, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
109+ static_cast<QuantMode_t>(quant_pre), relu_pre, channel_split, nz2nd_en, static_cast<QuantMode_post>(quant_post),
110+ relu_post, clip_relu_post, eltwise_op, eltwise_antq_cfg, c0_pad_en);
111+ }
112+}
113+ 
114+// uint8_t int32_t
115+__aicore__ inline void asc_copy_l0c2l1_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
116+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
117+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
118+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
119+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
120+ bool c0_pad_en)
121+{
122+ if ASC_IS_AIC {
123+ copy_matrix_cc_to_cbuf(dst, src, 0, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
124+ static_cast<QuantMode_t>(quant_pre), relu_pre, channel_split, nz2nd_en, static_cast<QuantMode_post>(quant_post),
125+ relu_post, clip_relu_post, eltwise_op, eltwise_antq_cfg, c0_pad_en);
126+ }
127+}
128+ 
129+// int32_t int32_t
130+__aicore__ inline void asc_copy_l0c2l1_impl(__cbuf__ int32_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
131+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
132+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
133+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
134+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
135+ bool c0_pad_en)
136+{
137+ if ASC_IS_AIC {
138+ copy_matrix_cc_to_cbuf(dst, src, 0, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode,
139+ static_cast<QuantMode_t>(quant_pre), relu_pre, channel_split, nz2nd_en, static_cast<QuantMode_post>(quant_post),
140+ relu_post, clip_relu_post, eltwise_op, eltwise_antq_cfg, c0_pad_en);
141+ }
142+}
143+ 
144+#endif
145+ 
146+#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC)
147+#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
148+#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
149+#endif
Dimpl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_deqf16_impl.h+0-159
@@ -1,159 +0,0 @@
1-/**
2- * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3- * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4- * CANN Open Software License Agreement Version 2.0 (the "License").
5- * Please refer to the License for details. You may not use this file except in compliance with the License.
6- * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7- * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8- * See LICENSE in the root of the software repository for the full text of the License.
9- */
10- 
11-#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
12-#warning "impl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_deqf16_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file maybe removed in the future. Please use "#include "c_api/asc_simd.h"" and use public functions or variables defined in interface headers files."
13-#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
14-#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
15-#endif
16- 
17-#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_DEQF16_IMPL_H
18-#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_DEQF16_IMPL_H
19- 
20-#include "instr_impl/npu_arch_3510/utils_impl.h"
21- 
22-// asc_fixpipe_l0c2l1_deqf16 half float
23-__aicore__ inline void asc_copy_l0c2l1_deqf16_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
24- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
25- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
26- bool nd2nz_en)
27-{
28- if ASC_IS_AIC {
29- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
30- QuantMode_t::DEQF16, relu_pre, channel_split, nd2nz_en);
31- }
32-}
33- 
34-__aicore__ inline void asc_copy_l0c2l1_deqf16_sync_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
35- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
36- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
37- bool channel_split, bool nd2nz_en)
38-{
39- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
40- channel_split, nd2nz_en);
41- asc_sync_post_process();
42-}
43- 
44-// asc_fixpipe_l0c2l1_deqf16 int8_t float
45-__aicore__ inline void asc_copy_l0c2l1_deqf16_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
46- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
47- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
48- bool channel_split, bool nd2nz_en)
49-{
50- if ASC_IS_AIC {
51- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
52- QuantMode_t::DEQF16, relu_pre, channel_split, nd2nz_en);
53- }
54-}
55- 
56-__aicore__ inline void asc_copy_l0c2l1_deqf16_sync_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
57- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
58- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
59- bool channel_split, bool nd2nz_en)
60-{
61- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
62- channel_split, nd2nz_en);
63- asc_sync_post_process();
64-}
65- 
66-// asc_fixpipe_l0c2l1_deqf16 half int32_t
67-__aicore__ inline void asc_copy_l0c2l1_deqf16_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
68- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
69- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
70- bool channel_split, bool nd2nz_en)
71-{
72- if ASC_IS_AIC {
73- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
74- QuantMode_t::DEQF16, relu_pre, channel_split, nd2nz_en);
75- }
76-}
77- 
78-__aicore__ inline void asc_copy_l0c2l1_deqf16_sync_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
79- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
80- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
81- bool channel_split, bool nd2nz_en)
82-{
83- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
84- channel_split, nd2nz_en);
85- asc_sync_post_process();
86-}
87- 
88-// asc_fixpipe_l0c2l1_deqf16 int16_t int32_t
89-__aicore__ inline void asc_copy_l0c2l1_deqf16_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
90- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
91- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
92- bool channel_split, bool nd2nz_en)
93-{
94- if ASC_IS_AIC {
95- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
96- QuantMode_t::DEQF16, relu_pre, channel_split, nd2nz_en);
97- }
98-}
99- 
100-__aicore__ inline void asc_copy_l0c2l1_deqf16_sync_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
101- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
102- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
103- bool channel_split, bool nd2nz_en)
104-{
105- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
106- channel_split, nd2nz_en);
107- asc_sync_post_process();
108-}
109- 
110-// asc_fixpipe_l0c2l1_deqf16 int8_t int32_t
111-__aicore__ inline void asc_copy_l0c2l1_deqf16_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
112- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
113- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
114- bool channel_split, bool nd2nz_en)
115-{
116- if ASC_IS_AIC {
117- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
118- QuantMode_t::DEQF16, relu_pre, channel_split, nd2nz_en);
119- }
120-}
121- 
122-__aicore__ inline void asc_copy_l0c2l1_deqf16_sync_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
123- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
124- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
125- bool channel_split, bool nd2nz_en)
126-{
127- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
128- channel_split, nd2nz_en);
129- asc_sync_post_process();
130-}
131- 
132-// asc_fixpipe_l0c2l1_deqf16 uint8_t int32_t
133-__aicore__ inline void asc_copy_l0c2l1_deqf16_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
134- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
135- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
136- bool channel_split, bool nd2nz_en)
137-{
138- if ASC_IS_AIC {
139- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
140- QuantMode_t::DEQF16, relu_pre, channel_split, nd2nz_en);
141- }
142-}
143- 
144-__aicore__ inline void asc_copy_l0c2l1_deqf16_sync_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
145- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
146- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
147- bool channel_split, bool nd2nz_en)
148-{
149- asc_copy_l0c2l1_deqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
150- channel_split, nd2nz_en);
151- asc_sync_post_process();
152-}
153- 
154-#endif
155- 
156-#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC)
157-#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
158-#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
159-#endif
Dimpl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_f322bf16_impl.h+0-159
@@ -1,159 +0,0 @@
1-/**
2- * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3- * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4- * CANN Open Software License Agreement Version 2.0 (the "License").
5- * Please refer to the License for details. You may not use this file except in compliance with the License.
6- * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7- * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8- * See LICENSE in the root of the software repository for the full text of the License.
9- */
10- 
11-#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
12-#warning "impl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_f322bf16_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file maybe removed in the future. Please use "#include "c_api/asc_simd.h"" and use public functions or variables defined in interface headers files."
13-#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
14-#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
15-#endif
16- 
17-#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_F322BF16_IMPL_H
18-#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_F322BF16_IMPL_H
19- 
20-#include "instr_impl/npu_arch_3510/utils_impl.h"
21- 
22-// asc_fixpipe_l0c2l1_f322bf16 half float
23-__aicore__ inline void asc_copy_l0c2l1_f322bf16_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
24- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
25- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
26- bool channel_split, bool nd2nz_en)
27-{
28- if ASC_IS_AIC {
29- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
30- QuantMode_t::F322BF16, relu_pre, channel_split, nd2nz_en);
31- }
32-}
33- 
34-__aicore__ inline void asc_copy_l0c2l1_f322bf16_sync_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
35- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
36- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
37- bool channel_split, bool nd2nz_en)
38-{
39- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
40- channel_split, nd2nz_en);
41- asc_sync_post_process();
42-}
43- 
44-// asc_fixpipe_l0c2l1_f322bf16 int8_t float
45-__aicore__ inline void asc_copy_l0c2l1_f322bf16_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
46- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
47- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
48- bool channel_split, bool nd2nz_en)
49-{
50- if ASC_IS_AIC {
51- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
52- QuantMode_t::F322BF16, relu_pre, channel_split, nd2nz_en);
53- }
54-}
55- 
56-__aicore__ inline void asc_copy_l0c2l1_f322bf16_sync_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
57- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
58- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
59- bool channel_split, bool nd2nz_en)
60-{
61- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
62- channel_split, nd2nz_en);
63- asc_sync_post_process();
64-}
65- 
66-// asc_fixpipe_l0c2l1_f322bf16 half int32_t
67-__aicore__ inline void asc_copy_l0c2l1_f322bf16_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
68- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
69- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
70- bool channel_split, bool nd2nz_en)
71-{
72- if ASC_IS_AIC {
73- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
74- QuantMode_t::F322BF16, relu_pre, channel_split, nd2nz_en);
75- }
76-}
77- 
78-__aicore__ inline void asc_copy_l0c2l1_f322bf16_sync_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
79- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
80- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
81- bool channel_split, bool nd2nz_en)
82-{
83- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
84- channel_split, nd2nz_en);
85- asc_sync_post_process();
86-}
87- 
88-// asc_fixpipe_l0c2l1_f322bf16 int16_t int32_t
89-__aicore__ inline void asc_copy_l0c2l1_f322bf16_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
90- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
91- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
92- bool channel_split, bool nd2nz_en)
93-{
94- if ASC_IS_AIC {
95- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
96- QuantMode_t::F322BF16, relu_pre, channel_split, nd2nz_en);
97- }
98-}
99- 
100-__aicore__ inline void asc_copy_l0c2l1_f322bf16_sync_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
101- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
102- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
103- bool channel_split, bool nd2nz_en)
104-{
105- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
106- channel_split, nd2nz_en);
107- asc_sync_post_process();
108-}
109- 
110-// asc_fixpipe_l0c2l1_f322bf16 int8_t int32_t
111-__aicore__ inline void asc_copy_l0c2l1_f322bf16_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
112- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
113- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
114- bool channel_split, bool nd2nz_en)
115-{
116- if ASC_IS_AIC {
117- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
118- QuantMode_t::F322BF16, relu_pre, channel_split, nd2nz_en);
119- }
120-}
121- 
122-__aicore__ inline void asc_copy_l0c2l1_f322bf16_sync_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
123- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
124- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
125- bool channel_split, bool nd2nz_en)
126-{
127- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
128- channel_split, nd2nz_en);
129- asc_sync_post_process();
130-}
131- 
132-// asc_fixpipe_l0c2l1_f322bf16 uint8_t int32_t
133-__aicore__ inline void asc_copy_l0c2l1_f322bf16_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
134- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
135- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
136- bool channel_split, bool nd2nz_en)
137-{
138- if ASC_IS_AIC {
139- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
140- QuantMode_t::F322BF16, relu_pre, channel_split, nd2nz_en);
141- }
142-}
143- 
144-__aicore__ inline void asc_copy_l0c2l1_f322bf16_sync_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
145- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
146- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
147- bool channel_split, bool nd2nz_en)
148-{
149- asc_copy_l0c2l1_f322bf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
150- channel_split, nd2nz_en);
151- asc_sync_post_process();
152-}
153- 
154-#endif
155- 
156-#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC)
157-#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
158-#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
159-#endif
Dimpl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_f322f16_impl.h+0-159
@@ -1,159 +0,0 @@
1-/**
2- * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3- * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4- * CANN Open Software License Agreement Version 2.0 (the "License").
5- * Please refer to the License for details. You may not use this file except in compliance with the License.
6- * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7- * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8- * See LICENSE in the root of the software repository for the full text of the License.
9- */
10- 
11-#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
12-#warning "impl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_f322f16_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file maybe removed in the future. Please use "#include "c_api/asc_simd.h"" and use public functions or variables defined in interface headers files."
13-#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
14-#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
15-#endif
16- 
17-#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_F322F16_IMPL_H
18-#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_F322F16_IMPL_H
19- 
20-#include "instr_impl/npu_arch_3510/utils_impl.h"
21- 
22-// asc_fixpipe_l0c2l1_f322f16 half float
23-__aicore__ inline void asc_copy_l0c2l1_f322f16_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
24- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
25- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
26- bool nd2nz_en)
27-{
28- if ASC_IS_AIC {
29- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
30- QuantMode_t::F322F16, relu_pre, channel_split, nd2nz_en);
31- }
32-}
33- 
34-__aicore__ inline void asc_copy_l0c2l1_f322f16_sync_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
35- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
36- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
37- bool channel_split, bool nd2nz_en)
38-{
39- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
40- channel_split, nd2nz_en);
41- asc_sync_post_process();
42-}
43- 
44-// asc_fixpipe_l0c2l1_f322f16 int8_t float
45-__aicore__ inline void asc_copy_l0c2l1_f322f16_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
46- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
47- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
48- bool channel_split, bool nd2nz_en)
49-{
50- if ASC_IS_AIC {
51- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
52- QuantMode_t::F322F16, relu_pre, channel_split, nd2nz_en);
53- }
54-}
55- 
56-__aicore__ inline void asc_copy_l0c2l1_f322f16_sync_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
57- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
58- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
59- bool channel_split, bool nd2nz_en)
60-{
61- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
62- channel_split, nd2nz_en);
63- asc_sync_post_process();
64-}
65- 
66-// asc_fixpipe_l0c2l1_f322f16 half int32_t
67-__aicore__ inline void asc_copy_l0c2l1_f322f16_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
68- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
69- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
70- bool channel_split, bool nd2nz_en)
71-{
72- if ASC_IS_AIC {
73- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
74- QuantMode_t::F322F16, relu_pre, channel_split, nd2nz_en);
75- }
76-}
77- 
78-__aicore__ inline void asc_copy_l0c2l1_f322f16_sync_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
79- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
80- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
81- bool channel_split, bool nd2nz_en)
82-{
83- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
84- channel_split, nd2nz_en);
85- asc_sync_post_process();
86-}
87- 
88-// asc_fixpipe_l0c2l1_f322f16 int16_t int32_t
89-__aicore__ inline void asc_copy_l0c2l1_f322f16_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
90- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
91- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
92- bool channel_split, bool nd2nz_en)
93-{
94- if ASC_IS_AIC {
95- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
96- QuantMode_t::F322F16, relu_pre, channel_split, nd2nz_en);
97- }
98-}
99- 
100-__aicore__ inline void asc_copy_l0c2l1_f322f16_sync_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
101- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
102- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
103- bool channel_split, bool nd2nz_en)
104-{
105- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
106- channel_split, nd2nz_en);
107- asc_sync_post_process();
108-}
109- 
110-// asc_fixpipe_l0c2l1_f322f16 int8_t int32_t
111-__aicore__ inline void asc_copy_l0c2l1_f322f16_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
112- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
113- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
114- bool channel_split, bool nd2nz_en)
115-{
116- if ASC_IS_AIC {
117- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
118- QuantMode_t::F322F16, relu_pre, channel_split, nd2nz_en);
119- }
120-}
121- 
122-__aicore__ inline void asc_copy_l0c2l1_f322f16_sync_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
123- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
124- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
125- bool channel_split, bool nd2nz_en)
126-{
127- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
128- channel_split, nd2nz_en);
129- asc_sync_post_process();
130-}
131- 
132-// asc_fixpipe_l0c2l1_f322f16 uint8_t int32_t
133-__aicore__ inline void asc_copy_l0c2l1_f322f16_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
134- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
135- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
136- bool channel_split, bool nd2nz_en)
137-{
138- if ASC_IS_AIC {
139- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
140- QuantMode_t::F322F16, relu_pre, channel_split, nd2nz_en);
141- }
142-}
143- 
144-__aicore__ inline void asc_copy_l0c2l1_f322f16_sync_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
145- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
146- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
147- bool channel_split, bool nd2nz_en)
148-{
149- asc_copy_l0c2l1_f322f16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
150- channel_split, nd2nz_en);
151- asc_sync_post_process();
152-}
153- 
154-#endif
155- 
156-#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC)
157-#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
158-#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
159-#endif
Dimpl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_qf322b8_pre_impl.h+0-165
@@ -1,165 +0,0 @@
1-/**
2- * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3- * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4- * CANN Open Software License Agreement Version 2.0 (the "License").
5- * Please refer to the License for details. You may not use this file except in compliance with the License.
6- * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7- * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8- * See LICENSE in the root of the software repository for the full text of the License.
9- */
10- 
11-#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
12-#warning "impl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_qf322b8_pre_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file maybe removed in the future. Please use "#include "c_api/asc_simd.h"" and use public functions or variables defined in interface headers files."
13-#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
14-#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
15-#endif
16- 
17-#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_QF322B8_PRE_IMPL_H
18-#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_QF322B8_PRE_IMPL_H
19- 
20-#include "instr_impl/npu_arch_3510/utils_impl.h"
21- 
22-// asc_fixpipe_l0c2l1_qf322b8_pre half float
23-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
24- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
25- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
26- bool channel_split, bool nd2nz_en)
27-{
28- if ASC_IS_AIC {
29- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
30- QuantMode_t::QF322B8_PRE, relu_pre, channel_split, nd2nz_en);
31- }
32-}
33- 
34-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_sync_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
35- uint16_t n_size, uint16_t m_size,
36- uint32_t dst_stride_dst_d, uint16_t src_stride,
37- uint8_t uint_flag_mode, uint8_t relu_pre,
38- bool channel_split, bool nd2nz_en)
39-{
40- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
41- relu_pre, channel_split, nd2nz_en);
42- asc_sync_post_process();
43-}
44- 
45-// asc_fixpipe_l0c2l1_qf322b8_pre int8_t float
46-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
47- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
48- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
49- bool channel_split, bool nd2nz_en)
50-{
51- if ASC_IS_AIC {
52- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
53- QuantMode_t::QF322B8_PRE, relu_pre, channel_split, nd2nz_en);
54- }
55-}
56- 
57-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_sync_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
58- uint16_t n_size, uint16_t m_size,
59- uint32_t dst_stride_dst_d, uint16_t src_stride,
60- uint8_t uint_flag_mode, uint8_t relu_pre,
61- bool channel_split, bool nd2nz_en)
62-{
63- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
64- relu_pre, channel_split, nd2nz_en);
65- asc_sync_post_process();
66-}
67- 
68-// asc_fixpipe_l0c2l1_qf322b8_pre half int32_t
69-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
70- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
71- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
72- bool channel_split, bool nd2nz_en)
73-{
74- if ASC_IS_AIC {
75- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
76- QuantMode_t::QF322B8_PRE, relu_pre, channel_split, nd2nz_en);
77- }
78-}
79- 
80-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_sync_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
81- uint16_t n_size, uint16_t m_size,
82- uint32_t dst_stride_dst_d, uint16_t src_stride,
83- uint8_t uint_flag_mode, uint8_t relu_pre,
84- bool channel_split, bool nd2nz_en)
85-{
86- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
87- relu_pre, channel_split, nd2nz_en);
88- asc_sync_post_process();
89-}
90- 
91-// asc_fixpipe_l0c2l1_qf322b8_pre int16_t int32_t
92-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
93- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
94- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
95- bool channel_split, bool nd2nz_en)
96-{
97- if ASC_IS_AIC {
98- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
99- QuantMode_t::QF322B8_PRE, relu_pre, channel_split, nd2nz_en);
100- }
101-}
102- 
103-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_sync_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
104- uint16_t n_size, uint16_t m_size,
105- uint32_t dst_stride_dst_d, uint16_t src_stride,
106- uint8_t uint_flag_mode, uint8_t relu_pre,
107- bool channel_split, bool nd2nz_en)
108-{
109- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
110- relu_pre, channel_split, nd2nz_en);
111- asc_sync_post_process();
112-}
113- 
114-// asc_fixpipe_l0c2l1_qf322b8_pre int8_t int32_t
115-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
116- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
117- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
118- bool channel_split, bool nd2nz_en)
119-{
120- if ASC_IS_AIC {
121- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
122- QuantMode_t::QF322B8_PRE, relu_pre, channel_split, nd2nz_en);
123- }
124-}
125- 
126-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_sync_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
127- uint16_t n_size, uint16_t m_size,
128- uint32_t dst_stride_dst_d, uint16_t src_stride,
129- uint8_t uint_flag_mode, uint8_t relu_pre,
130- bool channel_split, bool nd2nz_en)
131-{
132- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
133- relu_pre, channel_split, nd2nz_en);
134- asc_sync_post_process();
135-}
136- 
137-// asc_fixpipe_l0c2l1_qf322b8_pre uint8_t int32_t
138-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
139- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
140- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
141- bool channel_split, bool nd2nz_en)
142-{
143- if ASC_IS_AIC {
144- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
145- QuantMode_t::QF322B8_PRE, relu_pre, channel_split, nd2nz_en);
146- }
147-}
148- 
149-__aicore__ inline void asc_copy_l0c2l1_qf322b8_pre_sync_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
150- uint16_t n_size, uint16_t m_size,
151- uint32_t dst_stride_dst_d, uint16_t src_stride,
152- uint8_t uint_flag_mode, uint8_t relu_pre,
153- bool channel_split, bool nd2nz_en)
154-{
155- asc_copy_l0c2l1_qf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
156- relu_pre, channel_split, nd2nz_en);
157- asc_sync_post_process();
158-}
159- 
160-#endif
161- 
162-#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC)
163-#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
164-#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
165-#endif
Dimpl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_req8_impl.h+0-159
@@ -1,159 +0,0 @@
1-/**
2- * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3- * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4- * CANN Open Software License Agreement Version 2.0 (the "License").
5- * Please refer to the License for details. You may not use this file except in compliance with the License.
6- * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7- * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8- * See LICENSE in the root of the software repository for the full text of the License.
9- */
10- 
11-#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
12-#warning "impl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_req8_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file maybe removed in the future. Please use "#include "c_api/asc_simd.h"" and use public functions or variables defined in interface headers files."
13-#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
14-#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
15-#endif
16- 
17-#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_REQ8_IMPL_H
18-#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_REQ8_IMPL_H
19- 
20-#include "instr_impl/npu_arch_3510/utils_impl.h"
21- 
22-// asc_fixpipe_l0c2l1_req8 half float
23-__aicore__ inline void asc_copy_l0c2l1_req8_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
24- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
25- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
26- bool nd2nz_en)
27-{
28- if ASC_IS_AIC {
29- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
30- QuantMode_t::REQ8, relu_pre, channel_split, nd2nz_en);
31- }
32-}
33- 
34-__aicore__ inline void asc_copy_l0c2l1_req8_sync_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
35- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
36- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
37- bool channel_split, bool nd2nz_en)
38-{
39- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
40- channel_split, nd2nz_en);
41- asc_sync_post_process();
42-}
43- 
44-// asc_fixpipe_l0c2l1_req8 int8_t float
45-__aicore__ inline void asc_copy_l0c2l1_req8_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
46- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
47- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
48- bool nd2nz_en)
49-{
50- if ASC_IS_AIC {
51- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
52- QuantMode_t::REQ8, relu_pre, channel_split, nd2nz_en);
53- }
54-}
55- 
56-__aicore__ inline void asc_copy_l0c2l1_req8_sync_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
57- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
58- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
59- bool channel_split, bool nd2nz_en)
60-{
61- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
62- channel_split, nd2nz_en);
63- asc_sync_post_process();
64-}
65- 
66-// asc_fixpipe_l0c2l1_req8 half int32_t
67-__aicore__ inline void asc_copy_l0c2l1_req8_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid, uint16_t n_size,
68- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
69- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
70- bool nd2nz_en)
71-{
72- if ASC_IS_AIC {
73- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
74- QuantMode_t::REQ8, relu_pre, channel_split, nd2nz_en);
75- }
76-}
77- 
78-__aicore__ inline void asc_copy_l0c2l1_req8_sync_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
79- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
80- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
81- bool channel_split, bool nd2nz_en)
82-{
83- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
84- channel_split, nd2nz_en);
85- asc_sync_post_process();
86-}
87- 
88-// asc_fixpipe_l0c2l1_req8 int16_t int32_t
89-__aicore__ inline void asc_copy_l0c2l1_req8_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
90- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
91- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
92- bool channel_split, bool nd2nz_en)
93-{
94- if ASC_IS_AIC {
95- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
96- QuantMode_t::REQ8, relu_pre, channel_split, nd2nz_en);
97- }
98-}
99- 
100-__aicore__ inline void asc_copy_l0c2l1_req8_sync_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
101- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
102- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
103- bool channel_split, bool nd2nz_en)
104-{
105- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
106- channel_split, nd2nz_en);
107- asc_sync_post_process();
108-}
109- 
110-// asc_fixpipe_l0c2l1_req8 int8_t int32_t
111-__aicore__ inline void asc_copy_l0c2l1_req8_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
112- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
113- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
114- bool channel_split, bool nd2nz_en)
115-{
116- if ASC_IS_AIC {
117- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
118- QuantMode_t::REQ8, relu_pre, channel_split, nd2nz_en);
119- }
120-}
121- 
122-__aicore__ inline void asc_copy_l0c2l1_req8_sync_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
123- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
124- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
125- bool channel_split, bool nd2nz_en)
126-{
127- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
128- channel_split, nd2nz_en);
129- asc_sync_post_process();
130-}
131- 
132-// asc_fixpipe_l0c2l1_req8 uint8_t int32_t
133-__aicore__ inline void asc_copy_l0c2l1_req8_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
134- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
135- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
136- bool channel_split, bool nd2nz_en)
137-{
138- if ASC_IS_AIC {
139- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
140- QuantMode_t::REQ8, relu_pre, channel_split, nd2nz_en);
141- }
142-}
143- 
144-__aicore__ inline void asc_copy_l0c2l1_req8_sync_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
145- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
146- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
147- bool channel_split, bool nd2nz_en)
148-{
149- asc_copy_l0c2l1_req8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
150- channel_split, nd2nz_en);
151- asc_sync_post_process();
152-}
153- 
154-#endif
155- 
156-#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC)
157-#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
158-#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
159-#endif
Dimpl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_vdeqf16_impl.h+0-158
@@ -1,158 +0,0 @@
1-/**
2- * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3- * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4- * CANN Open Software License Agreement Version 2.0 (the "License").
5- * Please refer to the License for details. You may not use this file except in compliance with the License.
6- * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7- * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8- * See LICENSE in the root of the software repository for the full text of the License.
9- */
10- 
11-#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
12-#warning "impl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_vdeqf16_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file maybe removed in the future. Please use "#include "c_api/asc_simd.h"" and use public functions or variables defined in interface headers files."
13-#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
14-#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
15-#endif
16- 
17-#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_VDEQF16_IMPL_H
18-#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_VDEQF16_IMPL_H
19- 
20-#include "instr_impl/npu_arch_3510/utils_impl.h"
21- 
22-// asc_fixpipe_l0c2l1_vdeqf16 half float
23-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
24- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
25- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
26- bool nd2nz_en)
27-{
28- if ASC_IS_AIC {
29- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
30- QuantMode_t::VDEQF16, relu_pre, channel_split, nd2nz_en);
31- }
32-}
33- 
34-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_sync_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
35- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
36- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
37- bool channel_split, bool nd2nz_en)
38-{
39- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
40- channel_split, nd2nz_en);
41- asc_sync_post_process();
42-}
43- 
44-// asc_fixpipe_l0c2l1_vdeqf16 int8_t float
45-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
46- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
47- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
48- bool channel_split, bool nd2nz_en)
49-{
50- if ASC_IS_AIC {
51- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
52- QuantMode_t::VDEQF16, relu_pre, channel_split, nd2nz_en);
53- }
54-}
55- 
56-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_sync_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
57- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
58- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
59- bool channel_split, bool nd2nz_en)
60-{
61- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
62- channel_split, nd2nz_en);
63- asc_sync_post_process();
64-}
65- 
66-// asc_fixpipe_l0c2l1_vdeqf16 half int32_t
67-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
68- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
69- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
70- bool channel_split, bool nd2nz_en)
71-{
72- if ASC_IS_AIC {
73- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
74- QuantMode_t::VDEQF16, relu_pre, channel_split, nd2nz_en);
75- }
76-}
77- 
78-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_sync_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
79- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
80- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
81- bool channel_split, bool nd2nz_en)
82-{
83- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
84- channel_split, nd2nz_en);
85- asc_sync_post_process();
86-}
87- 
88-// asc_fixpipe_l0c2l1_vdeqf16 int16_t int32_t
89-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
90- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
91- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
92- bool channel_split, bool nd2nz_en)
93-{
94- if ASC_IS_AIC {
95- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
96- QuantMode_t::VDEQF16, relu_pre, channel_split, nd2nz_en);
97- }
98-}
99- 
100-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_sync_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
101- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
102- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
103- bool channel_split, bool nd2nz_en)
104-{
105- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
106- channel_split, nd2nz_en);
107- asc_sync_post_process();
108-}
109- 
110-// asc_fixpipe_l0c2l1_vdeqf16 int8_t int32_t
111-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
112- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
113- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
114- bool channel_split, bool nd2nz_en)
115-{
116- if ASC_IS_AIC {
117- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
118- QuantMode_t::VDEQF16, relu_pre, channel_split, nd2nz_en);
119- }
120-}
121- 
122-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_sync_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
123- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
124- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
125- bool channel_split, bool nd2nz_en)
126-{
127- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
128- channel_split, nd2nz_en);
129- asc_sync_post_process();
130-}
131- 
132-// asc_fixpipe_l0c2l1_vdeqf16 uint8_t int32_t
133-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
134- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
135- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
136- bool channel_split, bool nd2nz_en)
137-{
138- if ASC_IS_AIC {
139- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
140- QuantMode_t::VDEQF16, relu_pre, channel_split, nd2nz_en);
141- }
142-}
143- 
144-__aicore__ inline void asc_copy_l0c2l1_vdeqf16_sync_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
145- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
146- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
147- bool channel_split, bool nd2nz_en)
148-{
149- asc_copy_l0c2l1_vdeqf16_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
150- channel_split, nd2nz_en);
151- asc_sync_post_process();
152-}
153-#endif
154- 
155-#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC)
156-#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
157-#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
158-#endif
Dimpl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_vqf322b8_pre_impl.h+0-165
@@ -1,165 +0,0 @@
1-/**
2- * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3- * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4- * CANN Open Software License Agreement Version 2.0 (the "License").
5- * Please refer to the License for details. You may not use this file except in compliance with the License.
6- * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7- * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8- * See LICENSE in the root of the software repository for the full text of the License.
9- */
10- 
11-#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
12-#warning "impl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_vqf322b8_pre_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file maybe removed in the future. Please use "#include "c_api/asc_simd.h"" and use public functions or variables defined in interface headers files."
13-#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
14-#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
15-#endif
16- 
17-#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_VQF322B8_PRE_IMPL_H
18-#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_VQF322B8_PRE_IMPL_H
19- 
20-#include "instr_impl/npu_arch_3510/utils_impl.h"
21- 
22-// asc_fixpipe_l0c2l1_vqf322b8_pre half float
23-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
24- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
25- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
26- bool channel_split, bool nd2nz_en)
27-{
28- if ASC_IS_AIC {
29- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
30- QuantMode_t::VQF322B8_PRE, relu_pre, channel_split, nd2nz_en);
31- }
32-}
33- 
34-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_sync_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
35- uint16_t n_size, uint16_t m_size,
36- uint32_t dst_stride_dst_d, uint16_t src_stride,
37- uint8_t uint_flag_mode, uint8_t relu_pre,
38- bool channel_split, bool nd2nz_en)
39-{
40- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
41- relu_pre, channel_split, nd2nz_en);
42- asc_sync_post_process();
43-}
44- 
45-// asc_fixpipe_l0c2l1_vqf322b8_pre int8_t float
46-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
47- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
48- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
49- bool channel_split, bool nd2nz_en)
50-{
51- if ASC_IS_AIC {
52- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
53- QuantMode_t::VQF322B8_PRE, relu_pre, channel_split, nd2nz_en);
54- }
55-}
56- 
57-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_sync_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
58- uint16_t n_size, uint16_t m_size,
59- uint32_t dst_stride_dst_d, uint16_t src_stride,
60- uint8_t uint_flag_mode, uint8_t relu_pre,
61- bool channel_split, bool nd2nz_en)
62-{
63- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
64- relu_pre, channel_split, nd2nz_en);
65- asc_sync_post_process();
66-}
67- 
68-// asc_fixpipe_l0c2l1_vqf322b8_pre half int32_t
69-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
70- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
71- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
72- bool channel_split, bool nd2nz_en)
73-{
74- if ASC_IS_AIC {
75- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
76- QuantMode_t::VQF322B8_PRE, relu_pre, channel_split, nd2nz_en);
77- }
78-}
79- 
80-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_sync_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
81- uint16_t n_size, uint16_t m_size,
82- uint32_t dst_stride_dst_d, uint16_t src_stride,
83- uint8_t uint_flag_mode, uint8_t relu_pre,
84- bool channel_split, bool nd2nz_en)
85-{
86- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
87- relu_pre, channel_split, nd2nz_en);
88- asc_sync_post_process();
89-}
90- 
91-// asc_fixpipe_l0c2l1_vqf322b8_pre int16_t int32_t
92-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
93- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
94- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
95- bool channel_split, bool nd2nz_en)
96-{
97- if ASC_IS_AIC {
98- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
99- QuantMode_t::VQF322B8_PRE, relu_pre, channel_split, nd2nz_en);
100- }
101-}
102- 
103-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_sync_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
104- uint16_t n_size, uint16_t m_size,
105- uint32_t dst_stride_dst_d, uint16_t src_stride,
106- uint8_t uint_flag_mode, uint8_t relu_pre,
107- bool channel_split, bool nd2nz_en)
108-{
109- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
110- relu_pre, channel_split, nd2nz_en);
111- asc_sync_post_process();
112-}
113- 
114-// asc_fixpipe_l0c2l1_vqf322b8_pre int8_t int32_t
115-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
116- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
117- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
118- bool channel_split, bool nd2nz_en)
119-{
120- if ASC_IS_AIC {
121- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
122- QuantMode_t::VQF322B8_PRE, relu_pre, channel_split, nd2nz_en);
123- }
124-}
125- 
126-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_sync_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
127- uint16_t n_size, uint16_t m_size,
128- uint32_t dst_stride_dst_d, uint16_t src_stride,
129- uint8_t uint_flag_mode, uint8_t relu_pre,
130- bool channel_split, bool nd2nz_en)
131-{
132- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
133- relu_pre, channel_split, nd2nz_en);
134- asc_sync_post_process();
135-}
136- 
137-// asc_fixpipe_l0c2l1_vqf322b8_pre uint8_t int32_t
138-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
139- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
140- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
141- bool channel_split, bool nd2nz_en)
142-{
143- if ASC_IS_AIC {
144- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
145- QuantMode_t::VQF322B8_PRE, relu_pre, channel_split, nd2nz_en);
146- }
147-}
148- 
149-__aicore__ inline void asc_copy_l0c2l1_vqf322b8_pre_sync_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
150- uint16_t n_size, uint16_t m_size,
151- uint32_t dst_stride_dst_d, uint16_t src_stride,
152- uint8_t uint_flag_mode, uint8_t relu_pre,
153- bool channel_split, bool nd2nz_en)
154-{
155- asc_copy_l0c2l1_vqf322b8_pre_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
156- relu_pre, channel_split, nd2nz_en);
157- asc_sync_post_process();
158-}
159- 
160-#endif
161- 
162-#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC)
163-#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
164-#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
165-#endif
Dimpl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_vreq8_impl.h+0-159
@@ -1,159 +0,0 @@
1-/**
2- * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3- * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4- * CANN Open Software License Agreement Version 2.0 (the "License").
5- * Please refer to the License for details. You may not use this file except in compliance with the License.
6- * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7- * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8- * See LICENSE in the root of the software repository for the full text of the License.
9- */
10- 
11-#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
12-#warning "impl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl/copy_matrix_cc_to_cbuf_impl/asc_fixpipe_l0c2l1_vreq8_impl.h is an internal header file and must not be used directly. Functions or variables defined in this file maybe removed in the future. Please use "#include "c_api/asc_simd.h"" and use public functions or variables defined in interface headers files."
13-#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
14-#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
15-#endif
16- 
17-#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_VREQ8_IMPL_H
18-#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_CUBE_DATAMOVE_IMPL_COPY_MATRIX_CC_TO_CBUF_IMPL_ASC_FIXPIPE_L0C2L1_VREQ8_IMPL_H
19- 
20-#include "instr_impl/npu_arch_3510/utils_impl.h"
21- 
22-// asc_fixpipe_l0c2l1_vreq8 half float
23-__aicore__ inline void asc_copy_l0c2l1_vreq8_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
24- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
25- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
26- bool nd2nz_en)
27-{
28- if ASC_IS_AIC {
29- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
30- QuantMode_t::VREQ8, relu_pre, channel_split, nd2nz_en);
31- }
32-}
33- 
34-__aicore__ inline void asc_copy_l0c2l1_vreq8_sync_impl(__cbuf__ half* dst, __cc__ float* src, uint8_t sid,
35- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
36- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
37- bool channel_split, bool nd2nz_en)
38-{
39- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
40- channel_split, nd2nz_en);
41- asc_sync_post_process();
42-}
43- 
44-// asc_fixpipe_l0c2l1_vreq8 int8_t float
45-__aicore__ inline void asc_copy_l0c2l1_vreq8_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid, uint16_t n_size,
46- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
47- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
48- bool nd2nz_en)
49-{
50- if ASC_IS_AIC {
51- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
52- QuantMode_t::VREQ8, relu_pre, channel_split, nd2nz_en);
53- }
54-}
55- 
56-__aicore__ inline void asc_copy_l0c2l1_vreq8_sync_impl(__cbuf__ int8_t* dst, __cc__ float* src, uint8_t sid,
57- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
58- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
59- bool channel_split, bool nd2nz_en)
60-{
61- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
62- channel_split, nd2nz_en);
63- asc_sync_post_process();
64-}
65- 
66-// asc_fixpipe_l0c2l1_vreq8 half int32_t
67-__aicore__ inline void asc_copy_l0c2l1_vreq8_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid, uint16_t n_size,
68- uint16_t m_size, uint32_t dst_stride_dst_d, uint16_t src_stride,
69- uint8_t uint_flag_mode, uint8_t relu_pre, bool channel_split,
70- bool nd2nz_en)
71-{
72- if ASC_IS_AIC {
73- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
74- QuantMode_t::VREQ8, relu_pre, channel_split, nd2nz_en);
75- }
76-}
77- 
78-__aicore__ inline void asc_copy_l0c2l1_vreq8_sync_impl(__cbuf__ half* dst, __cc__ int32_t* src, uint8_t sid,
79- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
80- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
81- bool channel_split, bool nd2nz_en)
82-{
83- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
84- channel_split, nd2nz_en);
85- asc_sync_post_process();
86-}
87- 
88-// asc_fixpipe_l0c2l1_vreq8 int16_t int32_t
89-__aicore__ inline void asc_copy_l0c2l1_vreq8_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
90- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
91- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
92- bool channel_split, bool nd2nz_en)
93-{
94- if ASC_IS_AIC {
95- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
96- QuantMode_t::VREQ8, relu_pre, channel_split, nd2nz_en);
97- }
98-}
99- 
100-__aicore__ inline void asc_copy_l0c2l1_vreq8_sync_impl(__cbuf__ int16_t* dst, __cc__ int32_t* src, uint8_t sid,
101- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
102- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
103- bool channel_split, bool nd2nz_en)
104-{
105- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
106- channel_split, nd2nz_en);
107- asc_sync_post_process();
108-}
109- 
110-// asc_fixpipe_l0c2l1_vreq8 int8_t int32_t
111-__aicore__ inline void asc_copy_l0c2l1_vreq8_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
112- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
113- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
114- bool channel_split, bool nd2nz_en)
115-{
116- if ASC_IS_AIC {
117- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
118- QuantMode_t::VREQ8, relu_pre, channel_split, nd2nz_en);
119- }
120-}
121- 
122-__aicore__ inline void asc_copy_l0c2l1_vreq8_sync_impl(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint8_t sid,
123- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
124- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
125- bool channel_split, bool nd2nz_en)
126-{
127- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
128- channel_split, nd2nz_en);
129- asc_sync_post_process();
130-}
131- 
132-// asc_fixpipe_l0c2l1_vreq8 uint8_t int32_t
133-__aicore__ inline void asc_copy_l0c2l1_vreq8_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
134- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
135- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
136- bool channel_split, bool nd2nz_en)
137-{
138- if ASC_IS_AIC {
139- copy_matrix_cc_to_cbuf(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode,
140- QuantMode_t::VREQ8, relu_pre, channel_split, nd2nz_en);
141- }
142-}
143- 
144-__aicore__ inline void asc_copy_l0c2l1_vreq8_sync_impl(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint8_t sid,
145- uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
146- uint16_t src_stride, uint8_t uint_flag_mode, uint8_t relu_pre,
147- bool channel_split, bool nd2nz_en)
148-{
149- asc_copy_l0c2l1_vreq8_impl(dst, src, sid, n_size, m_size, dst_stride_dst_d, src_stride, uint_flag_mode, relu_pre,
150- channel_split, nd2nz_en);
151- asc_sync_post_process();
152-}
153- 
154-#endif
155- 
156-#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC)
157-#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
158-#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC
159-#endif
Mimpl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl.h+28-28
@@ -11,34 +11,34 @@
11#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_VECTOR_DATAMOVE_IMPL_H11#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_VECTOR_DATAMOVE_IMPL_H
12#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_VECTOR_DATAMOVE_IMPL_H12#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_VECTOR_DATAMOVE_IMPL_H
13 13 
14-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_get_mask_spr_impl.h"14+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_get_mask_spr_impl.h"
15-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadalign_impl.h"15+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadalign_impl.h"
16-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadalign_v2_impl.h"16+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadalign_v2_impl.h"
17-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadalign_postupdate_impl.h"17+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadalign_postupdate_impl.h"
18-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadunalign_pre_impl.h"18+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadunalign_pre_impl.h"
19-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_storealign_impl.h"19+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_storealign_impl.h"
20-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_storeunalign_impl.h"20+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_storeunalign_impl.h"
21-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_storeunalign_postupdate_impl.h"21+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_storeunalign_postupdate_impl.h"
22-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_gather_impl.h"22+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_gather_impl.h"
23-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_gather_datablock_impl.h"23+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_gather_datablock_impl.h"
24-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ub2gm_loop_size_impl.h"24+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ub2gm_loop_size_impl.h"
25-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ub2gm_loop1_stride_impl.h"25+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ub2gm_loop1_stride_impl.h"
26-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ub2gm_loop2_stride_impl.h"26+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ub2gm_loop2_stride_impl.h"
27-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadunalign_postupdate_impl.h"27+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadunalign_postupdate_impl.h"
28-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadunalign_impl.h"28+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_loadunalign_impl.h"
29-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_load_impl.h"29+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_load/asc_load_impl.h"
30-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_gm2ub_loop_size_impl.h"30+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_gm2ub_loop_size_impl.h"
31-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_gm2ub_loop1_stride_impl.h"31+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_gm2ub_loop1_stride_impl.h"
32-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_gm2ub_loop2_stride_impl.h"32+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_gm2ub_loop2_stride_impl.h"
33-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_gm2ub_pad_impl.h"33+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_gm2ub_pad_impl.h"
34-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ndim_loop_stride_impl.h"34+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ndim_loop_stride_impl.h"
35-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_storeunalign_post_impl.h"35+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_storeunalign_post_impl.h"
36-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_storeunalign_post_postupdate_impl.h"36+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_storeunalign_post_postupdate_impl.h"
37-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_ndim_copy_gm2ub_impl.h"37+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_ndim_copy_gm2ub_impl.h"
38-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ndim_pad_count_impl.h"38+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ndim_pad_count_impl.h"
39-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ndim_pad_value_impl.h"39+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_set_ndim_pad_value_impl.h"
40-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_store_impl.h"40+#include "instr_impl/npu_arch_3510/vector_datamove_impl/reg_store/asc_store_impl.h"
41-#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl/asc_scatter_impl.h"41+#include "instr_impl/npu_arch_3510/vector_datamove_impl/asc_scatter_impl.h"
42 42 
43// ==========偏移固定传入0，由用户自行更新目的操作数的地址=========43// ==========偏移固定传入0，由用户自行更新目的操作数的地址=========
44// ==========asc_storealign(u8/s8/half/u16/s16/float/u32/s32/bf16/e4m3/e5m2/e8m0/e1m2/e2m1)=========44// ==========asc_storealign(u8/s8/half/u16/s16/float/u32/s32/bf16/e4m3/e5m2/e8m0/e1m2/e2m1)=========
Minclude/c_api/atomic/atomic.h+10-3
@@ -16,14 +16,22 @@
16#ifndef INCLUDE_C_API_ATOMIC_ATOMIC_H16#ifndef INCLUDE_C_API_ATOMIC_ATOMIC_H
17#define INCLUDE_C_API_ATOMIC_ATOMIC_H17#define INCLUDE_C_API_ATOMIC_ATOMIC_H
18 18 
19+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
20+ 
21+#include "instr_impl/npu_arch_2201/atomic_impl.h"
22+ 
23+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
24+ 
25+#include "instr_impl/npu_arch_3510/atomic_impl.h"
26+ 
27+#endif
28+ 
19__aicore__ inline void asc_set_atomic_add_float();29__aicore__ inline void asc_set_atomic_add_float();
20 30 
21__aicore__ inline void asc_set_atomic_max_float16();31__aicore__ inline void asc_set_atomic_max_float16();
22 32 
23#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)33#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
24 34 
25-#include "instr_impl/npu_arch_2201/atomic_impl.h"
26- 
27__aicore__ inline void asc_set_atomic_none();35__aicore__ inline void asc_set_atomic_none();
28 36 
29__aicore__ inline void asc_get_store_atomic_config(asc_store_atomic_config& config);37__aicore__ inline void asc_get_store_atomic_config(asc_store_atomic_config& config);
@@ -64,7 +72,6 @@ __aicore__ inline void asc_set_atomic_min_int16();
64 72 
65#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)73#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
66 74 
67-#include "instr_impl/npu_arch_3510/atomic_impl.h"
68// ==========asc_set_atomic_add_float16==========75// ==========asc_set_atomic_add_float16==========
69__simd_callee__ inline void asc_set_atomic_add_float16();76__simd_callee__ inline void asc_set_atomic_add_float16();
70 77 
Minclude/c_api/cache_ctrl/cache_ctrl.h+10-4
@@ -17,6 +17,16 @@
17#ifndef INCLUDE_C_API_SIMD_ATOMIC_H17#ifndef INCLUDE_C_API_SIMD_ATOMIC_H
18#define INCLUDE_C_API_SIMD_ATOMIC_H18#define INCLUDE_C_API_SIMD_ATOMIC_H
19 19 
20+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
21+ 
22+#include "instr_impl/npu_arch_2201/cache_ctrl_impl.h"
23+ 
24+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
25+ 
26+#include "instr_impl/npu_arch_3510/cache_ctrl_impl.h"
27+ 
28+#endif
29+ 
20__aicore__ inline void asc_dcci_single(__gm__ void* dst);30__aicore__ inline void asc_dcci_single(__gm__ void* dst);
21 31 
22__aicore__ inline void asc_dcci_entire(__gm__ void* dst);32__aicore__ inline void asc_dcci_entire(__gm__ void* dst);
@@ -39,8 +49,6 @@ __aicore__ inline void asc_datacache_preload(__gm__ uint64_t* address, int64_t o
39 49 
40#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)50#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
41 51 
42-#include "instr_impl/npu_arch_2201/cache_ctrl_impl.h"
43- 
44__aicore__ inline void asc_dcci_single_ub(__gm__ void* dst);52__aicore__ inline void asc_dcci_single_ub(__gm__ void* dst);
45 53 
46__aicore__ inline void asc_dcci_entire_ub(__gm__ void* dst);54__aicore__ inline void asc_dcci_entire_ub(__gm__ void* dst);
@@ -51,8 +59,6 @@ __aicore__ inline void asc_icache_preload(const void* addr, int64_t prefetch_len
51 59 
52#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)60#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
53 61 
54-#include "instr_impl/npu_arch_3510/cache_ctrl_impl.h"
55- 
56#endif62#endif
57 63 
58#endif64#endif
Minclude/c_api/cube_compute/cube_compute.h+9-2
@@ -21,6 +21,14 @@
21 21 
22#include "instr_impl/npu_arch_2201/cube_compute_impl.h"22#include "instr_impl/npu_arch_2201/cube_compute_impl.h"
23 23 
24+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
25+ 
26+#include "instr_impl/npu_arch_3510/cube_compute_impl.h"
27+ 
28+#endif
29+ 
30+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
31+ 
24// asc_mmad(float-bfloat16_t)32// asc_mmad(float-bfloat16_t)
25__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix,33__aicore__ inline void asc_mmad(__cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix,
26 uint16_t left_height, uint16_t right_width, uint16_t n_dim, uint8_t unit_flag, bool k_direction_align,34 uint16_t left_height, uint16_t right_width, uint16_t n_dim, uint8_t unit_flag, bool k_direction_align,
@@ -123,8 +131,6 @@ __aicore__ inline void asc_set_l0c2gm_unitflag(uint64_t unit_flag);
123 131 
124#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)132#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
125 133 
126-#include "instr_impl/npu_arch_3510/cube_compute_impl.h"
127- 
128__aicore__ inline void asc_set_l0c2gm_relu(uint64_t relu);134__aicore__ inline void asc_set_l0c2gm_relu(uint64_t relu);
129 135 
130__aicore__ inline void asc_set_l0c2gm_relu(uint64_t quant);136__aicore__ inline void asc_set_l0c2gm_relu(uint64_t quant);
@@ -197,6 +203,7 @@ __aicore__ inline void asc_mmad_mx(__cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_
197__aicore__ inline void asc_mmad_mx_sync(__cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix,203__aicore__ inline void asc_mmad_mx_sync(__cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix,
198 __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height, uint16_t right_width, uint16_t n_dim,204 __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height, uint16_t right_width, uint16_t n_dim,
199 uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);205 uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);
206+ 
200#endif207#endif
201 208 
202#endif209#endif
Minclude/c_api/cube_datamove/cube_datamove.h+75-2
@@ -17,6 +17,16 @@
17#ifndef INCLUDE_C_API_CUBE_DATAMOVE_CUBE_DATAMOVE_H17#ifndef INCLUDE_C_API_CUBE_DATAMOVE_CUBE_DATAMOVE_H
18#define INCLUDE_C_API_CUBE_DATAMOVE_CUBE_DATAMOVE_H18#define INCLUDE_C_API_CUBE_DATAMOVE_CUBE_DATAMOVE_H
19 19 
20+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
21+ 
22+#include "instr_impl/npu_arch_2201/cube_datamove_impl.h"
23+ 
24+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
25+ 
26+#include "instr_impl/npu_arch_3510/cube_datamove_impl.h"
27+ 
28+#endif
29+ 
20// ==========asc_set_l13d_rpt============30// ==========asc_set_l13d_rpt============
21__aicore__ inline void asc_set_l13d_rpt(asc_load3d_v2_config& config);31__aicore__ inline void asc_set_l13d_rpt(asc_load3d_v2_config& config);
22 32 
@@ -25,7 +35,6 @@ __aicore__ inline void asc_set_l13d_fmatrix(asc_l13d_fmatrix_config& config);
25 35 
26#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)36#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
27 37 
28-#include "instr_impl/npu_arch_2201/cube_datamove_impl.h"
29// ==========asc_copy_gm2l1==========38// ==========asc_copy_gm2l1==========
30__aicore__ inline void asc_copy_gm2l1(__cbuf__ void* dst, __gm__ void* src, uint16_t n_burst, uint16_t burst_len,39__aicore__ inline void asc_copy_gm2l1(__cbuf__ void* dst, __gm__ void* src, uint16_t n_burst, uint16_t burst_len,
31 uint16_t src_stride, uint16_t dst_stride, pad_t pad_mode);40 uint16_t src_stride, uint16_t dst_stride, pad_t pad_mode);
@@ -599,7 +608,71 @@ __aicore__ inline void asc_set_l0c_copy_params(uint16_t nd_num, uint16_t src_nd_
599 608 
600#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)609#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
601 610 
602-#include "instr_impl/npu_arch_3510/cube_datamove_impl.h"611+// ==========asc_l0c2l1_l0c2l1===========
612+// half float
613+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ half* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
614+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
615+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
616+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
617+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
618+ bool c0_pad_en);
619+ 
620+// int8_t float
621+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
622+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
623+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
624+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
625+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
626+ bool c0_pad_en);
627+ 
628+ 
629+// uint8_t float
630+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ uint8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
631+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
632+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
633+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
634+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
635+ bool c0_pad_en);
636+ 
637+// float float
638+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ float* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size,
639+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
640+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
641+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
642+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
643+ bool c0_pad_en);
644+ 
645+// half int32_t
646+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ half* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
647+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
648+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
649+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
650+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
651+ bool c0_pad_en);
652+ 
653+// int8_t int32_t
654+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
655+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
656+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
657+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
658+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
659+ bool c0_pad_en);
660+ 
661+// uint8_t int32_t
662+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ uint8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
663+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
664+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
665+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
666+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
667+ bool c0_pad_en);
668+ 
669+// int32_t int32_t
670+__aicore__ inline void asc_copy_l0c2l1(__cbuf__ int32_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size,
671+ uint32_t dst_stride, uint16_t src_stride, uint8_t clip_relu_pre,
672+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre,
673+ bool channel_split, bool nz2nd_en, uint64_t quant_post, uint8_t relu_post,
674+ bool clip_relu_post, uint8_t eltwise_op, uint8_t eltwise_antq_cfg,
675+ bool c0_pad_en);
603 676 
604// ==========asc_copy_l12l0a_mx==========677// ==========asc_copy_l12l0a_mx==========
605__aicore__ inline void asc_copy_l12l0a_mx(uint64_t dst, __cbuf__ fp8_e8m0_t* src, uint16_t x_start_pos,678__aicore__ inline void asc_copy_l12l0a_mx(uint64_t dst, __cbuf__ fp8_e8m0_t* src, uint16_t x_start_pos,
Minclude/c_api/scalar_compute/scalar_compute.h+10-4
@@ -16,6 +16,16 @@
16#ifndef INCLUDE_C_API_SCALAR_COMPUTE_H16#ifndef INCLUDE_C_API_SCALAR_COMPUTE_H
17#define INCLUDE_C_API_SCALAR_COMPUTE_H17#define INCLUDE_C_API_SCALAR_COMPUTE_H
18 18 
19+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
20+ 
21+#include "instr_impl/npu_arch_2201/scalar_compute_impl.h"
22+ 
23+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
24+ 
25+#include "instr_impl/npu_arch_3510/scalar_compute_impl.h"
26+ 
27+#endif
28+ 
19__aicore__ inline int64_t asc_sflbits(int64_t value);29__aicore__ inline int64_t asc_sflbits(int64_t value);
20 30 
21__aicore__ inline int64_t asc_ffz(uint64_t value);31__aicore__ inline int64_t asc_ffz(uint64_t value);
@@ -26,8 +36,6 @@ __aicore__ inline int64_t asc_popc(uint64_t value);
26 36 
27#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)37#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
28 38 
29-#include "instr_impl/npu_arch_2201/scalar_compute_impl.h"
30- 
31__aicore__ inline int64_t asc_clz(uint64_t value_in);39__aicore__ inline int64_t asc_clz(uint64_t value_in);
32 40 
33__aicore__ inline int64_t asc_zero_bits_cnt(uint64_t value);41__aicore__ inline int64_t asc_zero_bits_cnt(uint64_t value);
@@ -46,8 +54,6 @@ __aicore__ inline int32_t asc_float2int32_rna(float value);
46 54 
47#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)55#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
48 56 
49-#include "instr_impl/npu_arch_3510/scalar_compute_impl.h"
50- 
51__aicore__ inline void asc_store_dev(__gm__ int8_t* addr, int8_t value);57__aicore__ inline void asc_store_dev(__gm__ int8_t* addr, int8_t value);
52 58 
53__aicore__ inline void asc_store_dev(__gm__ uint8_t* addr, uint8_t value);59__aicore__ inline void asc_store_dev(__gm__ uint8_t* addr, uint8_t value);
Minclude/c_api/sync/sync.h+10-10
@@ -17,6 +17,16 @@
17#ifndef INCLUDE_C_API_SYNC_SYNC_H17#ifndef INCLUDE_C_API_SYNC_SYNC_H
18#define INCLUDE_C_API_SYNC_SYNC_H18#define INCLUDE_C_API_SYNC_SYNC_H
19 19 
20+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
21+ 
22+#include "instr_impl/npu_arch_2201/sync_impl.h"
23+ 
24+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
25+ 
26+#include "instr_impl/npu_arch_3510/sync_impl.h"
27+ 
28+#endif
29+ 
20#define asc_sync_notify(pipe, tpipe, id) asc_sync_notify_impl(pipe, tpipe, id)30#define asc_sync_notify(pipe, tpipe, id) asc_sync_notify_impl(pipe, tpipe, id)
21 31 
22#define asc_sync_wait(pipe, tpipe, id) asc_sync_wait_impl(pipe, tpipe, id)32#define asc_sync_wait(pipe, tpipe, id) asc_sync_wait_impl(pipe, tpipe, id)
@@ -31,16 +41,6 @@ __aicore__ inline void asc_sync_mte2(int id);
31 41 
32__aicore__ inline void asc_sync();42__aicore__ inline void asc_sync();
33 43 
34-#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
35- 
36-#include "instr_impl/npu_arch_2201/sync_impl.h"
37- 
38-#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
39- 
40-#include "instr_impl/npu_arch_3510/sync_impl.h"
41- 
42-#endif
43- 
44#endif44#endif
45 45 
46#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H) 46#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H)
Minclude/c_api/sys_var/sys_var.h+10-6
@@ -17,6 +17,16 @@
17#ifndef INCLUDE_C_API_SYS_VAR_SYS_VAR_H17#ifndef INCLUDE_C_API_SYS_VAR_SYS_VAR_H
18#define INCLUDE_C_API_SYS_VAR_SYS_VAR_H18#define INCLUDE_C_API_SYS_VAR_SYS_VAR_H
19 19 
20+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
21+ 
22+#include "instr_impl/npu_arch_2201/sys_var_impl.h"
23+ 
24+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
25+ 
26+#include "instr_impl/npu_arch_3510/sys_var_impl.h"
27+ 
28+#endif
29+ 
20__aicore__ inline int64_t asc_get_ctrl();30__aicore__ inline int64_t asc_get_ctrl();
21 31 
22__aicore__ inline int64_t asc_get_block_num();32__aicore__ inline int64_t asc_get_block_num();
@@ -27,8 +37,6 @@ __aicore__ inline void asc_set_ctrl(uint64_t config);
27 37 
28#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)38#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
29 39 
30-#include "instr_impl/npu_arch_2201/sys_var_impl.h"
31- 
32__aicore__ inline int64_t asc_get_core_id();40__aicore__ inline int64_t asc_get_core_id();
33 41 
34__aicore__ inline int64_t asc_get_block_idx();42__aicore__ inline int64_t asc_get_block_idx();
@@ -47,10 +55,6 @@ __aicore__ inline void asc_get_arch_ver(uint32_t& coreVersion);
47 55 
48__simd_callee__ inline int64_t asc_get_ar_spr();56__simd_callee__ inline int64_t asc_get_ar_spr();
49 57 
50-#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
51- 
52-#include "instr_impl/npu_arch_3510/sys_var_impl.h"
53- 
54#endif58#endif
55 59 
56#endif60#endif
Minclude/c_api/vector_datamove/vector_datamove.h+10-8
@@ -21,7 +21,15 @@
21 21 
22#include "instr_impl/npu_arch_2201/vector_datamove_impl.h"22#include "instr_impl/npu_arch_2201/vector_datamove_impl.h"
23 23 
24-__aicore__ inline void asc_copy_gm2ub(__ubuf__ void* dst, __gm__ void* src, uint8_t sid,24+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
25+ 
26+#include "instr_impl/npu_arch_3510/vector_datamove_impl.h"
27+ 
28+#endif
29+ 
30+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
31+ 
32+__aicore__ inline void asc_copy_gm2ub(__ubuf__ void* dst, __gm__ void* src,
25 uint16_t n_burst, uint16_t burst_len, uint16_t src_gap, uint16_t dst_gap);33 uint16_t n_burst, uint16_t burst_len, uint16_t src_gap, uint16_t dst_gap);
26 34 
27__aicore__ inline void asc_copy_gm2ub(__ubuf__ void* dst, __gm__ void* src, uint32_t size);35__aicore__ inline void asc_copy_gm2ub(__ubuf__ void* dst, __gm__ void* src, uint32_t size);
@@ -30,7 +38,7 @@ __aicore__ inline void asc_copy_gm2ub_sync(__ubuf__ void* dst, __gm__ void* src,
30 38 
31__aicore__ inline void asc_copy_ub2gm(__gm__ void* dst, __ubuf__ void* src, uint32_t size);39__aicore__ inline void asc_copy_ub2gm(__gm__ void* dst, __ubuf__ void* src, uint32_t size);
32 40 
33-__aicore__ inline void asc_copy_ub2gm(__gm__ void* dst, __ubuf__ void* src, uint8_t sid,41+__aicore__ inline void asc_copy_ub2gm(__gm__ void* dst, __ubuf__ void* src,
34 uint16_t n_burst, uint16_t burst_len, uint16_t src_gap, uint16_t dst_gap);42 uint16_t n_burst, uint16_t burst_len, uint16_t src_gap, uint16_t dst_gap);
35 43 
36__aicore__ inline void asc_copy_ub2gm_sync(__gm__ void* dst, __ubuf__ void* src, uint32_t size);44__aicore__ inline void asc_copy_ub2gm_sync(__gm__ void* dst, __ubuf__ void* src, uint32_t size);
@@ -186,8 +194,6 @@ __aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint64_t* dst, __ubuf__
186 194 
187#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)195#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
188 196 
189-#include "instr_impl/npu_arch_3510/vector_datamove_impl.h"
190- 
191__aicore__ inline void asc_set_ub2gm_loop_size(uint32_t loop1_size, uint32_t loop2_size);197__aicore__ inline void asc_set_ub2gm_loop_size(uint32_t loop1_size, uint32_t loop2_size);
192 198 
193__aicore__ inline void asc_set_ub2gm_loop1_stride(uint64_t loop1_src_stride, uint64_t loop1_dst_stride);199__aicore__ inline void asc_set_ub2gm_loop1_stride(uint64_t loop1_src_stride, uint64_t loop1_dst_stride);
@@ -298,10 +304,6 @@ __aicore__ inline void asc_ndim_copy_gm2ub(__ubuf__ float* dst, __gm__ float* sr
298 uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,304 uint32_t loop0_size, uint32_t loop1_size, uint32_t loop2_size, uint32_t loop3_size, uint32_t loop4_size,
299 uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);305 uint8_t loop0_lp_count, uint8_t loop0_rp_count, bool padding_mode, uint8_t cache_mode);
300 306
301-#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3101)
302- 
303-#include "instr_impl/npu_arch_3510/vector_datamove_impl.h"
304- 
305#endif307#endif
306 308 
307#endif309#endif
Atests/api/c_api/npu_arch_3510/cube_datamove/test_copy_l0c2l1_instr.cpp+115-0
@@ -0,0 +1,115 @@
1+/**
2+* Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+* This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+* CANN Open Software License Agreement Version 2.0 (the "License").
5+* Please refer to the License for details. You may not use this file except in compliance with the License.
6+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+* See LICENSE in the root of the software repository for the full text of the License.
9+*/
10+ 
11+#ifndef TESTS_UNIT_BASIC_API_UT_TESTCASE_C_API_NPU_ARCH_3510_UTILS_TEST_FIXPIPE_L0C2L1_INSTR_H
12+#define TESTS_UNIT_BASIC_API_UT_TESTCASE_C_API_NPU_ARCH_3510_UTILS_TEST_FIXPIPE_L0C2L1_INSTR_H
13+ 
14+#include <gtest/gtest.h>
15+#include <mockcpp/mockcpp.hpp>
16+#include "c_api/stub/cce_stub.h"
17+#include "c_api/asc_simd.h"
18+ 
19+#define TEST_CUBE_COMPUTE_FIXPIPE_L0C2L1_INSTR(class_name, c_api_name, cce_name, dst_data_type, src_data_type) \
20+ \
21+class TestCubeDatamove##class_name##_##dst_data_type##src_data_type : public testing::Test { \
22+protected: \
23+ void SetUp() { \
24+ g_c_api_core_type = C_API_AIC_TYPE; \
25+ } \
26+ void TearDown() { \
27+ g_c_api_core_type = C_API_AIV_TYPE; \
28+ } \
29+}; \
30+ \
31+namespace { \
32+void c_api_name##_##dst_data_type##_##src_data_type##_Stub(__cbuf__ dst_data_type* dst_in, __cc__ src_data_type* src_in, \
33+ uint8_t sid_in, uint16_t n_size_in, uint16_t m_size_in, uint32_t dst_stride_in, uint16_t src_stride_in, \
34+ uint8_t clip_relu_pre_in, uint8_t unit_flag_mode_in, QuantMode_t quant_pre_in, uint8_t relu_pre_in, \
35+ bool channel_split_in, bool nz2nd_en_in, QuantMode_post quant_post_in, uint8_t relu_post_in, bool clip_relu_post_in, \
36+ uint8_t eltwise_op_in, uint8_t eltwise_antq_cfg_in, bool c0_pad_en_in) \
37+{ \
38+ __cbuf__ dst_data_type * dst = reinterpret_cast<__cbuf__ dst_data_type *>(1); \
39+ __cc__ src_data_type * src = reinterpret_cast<__cc__ src_data_type *>(2); \
40+ uint8_t sid = 3; \
41+ uint16_t n_size = 4; \
42+ uint16_t m_size = 5; \
43+ uint32_t dst_stride = 6; \
44+ uint16_t src_stride = 7; \
45+ uint8_t clip_relu_pre = 8; \
46+ uint8_t unit_flag_mode = 10; \
47+ uint64_t quant_pre = 11; \
48+ uint8_t relu_pre = 12; \
49+ bool channel_split = true; \
50+ bool nz2nd_en = true; \
51+ uint64_t quant_post = 13; \
52+ uint8_t relu_post = 14; \
53+ bool clip_relu_post = true; \
54+ uint8_t eltwise_op = 15; \
55+ uint8_t eltwise_antq_cfg = 15; \
56+ bool c0_pad_en = true; \
57+ \
58+ EXPECT_EQ(dst, dst_in); \
59+ EXPECT_EQ(src, src_in); \
60+ EXPECT_EQ(sid, sid_in); \
61+ EXPECT_EQ(n_size, n_size_in); \
62+ EXPECT_EQ(m_size, m_size_in); \
63+ EXPECT_EQ(dst_stride, dst_stride_in); \
64+ EXPECT_EQ(src_stride, src_stride_in); \
65+ EXPECT_EQ(clip_relu_pre, clip_relu_pre_in); \
66+ EXPECT_EQ(unit_flag_mode, unit_flag_mode_in); \
67+ EXPECT_EQ(relu_pre, relu_pre_in); \
68+ EXPECT_EQ(channel_split, channel_split_in); \
69+ EXPECT_EQ(nz2nd_en, nz2nd_en_in); \
70+ EXPECT_EQ(relu_post, relu_post_in); \
71+ EXPECT_EQ(clip_relu_post, clip_relu_post_in); \
72+ EXPECT_EQ(eltwise_op, eltwise_op_in); \
73+ EXPECT_EQ(eltwise_antq_cfg, eltwise_antq_cfg_in); \
74+ EXPECT_EQ(c0_pad_en, c0_pad_en_in); \
75+} \
76+} \
77+ \
78+TEST_F(TestCubeDatamove##class_name##_##dst_data_type##src_data_type, c_api_name_##dst_data_type##_##src_data_type##_Succ) \
79+{ \
80+ __cbuf__ dst_data_type * dst = reinterpret_cast<__cbuf__ dst_data_type *>(1); \
81+ __cc__ src_data_type * src = reinterpret_cast<__cc__ src_data_type *>(2); \
82+ uint8_t sid = 3; \
83+ uint16_t n_size = 4; \
84+ uint16_t m_size = 5; \
85+ uint32_t dst_stride = 6; \
86+ uint16_t src_stride = 7; \
87+ uint8_t clip_relu_pre = 8; \
88+ uint8_t unit_flag_mode = 10; \
89+ uint64_t quant_pre = 11; \
90+ uint8_t relu_pre = 12; \
91+ bool channel_split = true; \
92+ bool nz2nd_en = true; \
93+ uint64_t quant_post = 13; \
94+ uint8_t relu_post = 14; \
95+ bool clip_relu_post = true; \
96+ uint8_t eltwise_op = 15; \
97+ uint8_t eltwise_antq_cfg = 15; \
98+ bool c0_pad_en = true; \
99+ \
100+ c_api_name(dst, src, n_size, m_size, dst_stride, src_stride, clip_relu_pre, unit_flag_mode, \
101+ quant_pre, relu_pre, channel_split, nz2nd_en, quant_post, relu_post, clip_relu_post, eltwise_op, \
102+ eltwise_antq_cfg, c0_pad_en); \
103+ GlobalMockObject::verify(); \
104+}
105+ 
106+#endif
107+ 
108+TEST_CUBE_COMPUTE_FIXPIPE_L0C2L1_INSTR(L0c2L1, asc_copy_l0c2l1, copy_matrix_cc_to_cbuf, half, float);
109+TEST_CUBE_COMPUTE_FIXPIPE_L0C2L1_INSTR(L0c2L1, asc_copy_l0c2l1, copy_matrix_cc_to_cbuf, int8_t, float);
110+TEST_CUBE_COMPUTE_FIXPIPE_L0C2L1_INSTR(L0c2L1, asc_copy_l0c2l1, copy_matrix_cc_to_cbuf, uint8_t, float);
111+TEST_CUBE_COMPUTE_FIXPIPE_L0C2L1_INSTR(L0c2L1, asc_copy_l0c2l1, copy_matrix_cc_to_cbuf, float, float);
112+TEST_CUBE_COMPUTE_FIXPIPE_L0C2L1_INSTR(L0c2L1, asc_copy_l0c2l1, copy_matrix_cc_to_cbuf, half, int32_t);
113+TEST_CUBE_COMPUTE_FIXPIPE_L0C2L1_INSTR(L0c2L1, asc_copy_l0c2l1, copy_matrix_cc_to_cbuf, int8_t, int32_t);
114+TEST_CUBE_COMPUTE_FIXPIPE_L0C2L1_INSTR(L0c2L1, asc_copy_l0c2l1, copy_matrix_cc_to_cbuf, uint8_t, int32_t);
115+TEST_CUBE_COMPUTE_FIXPIPE_L0C2L1_INSTR(L0c2L1, asc_copy_l0c2l1, copy_matrix_cc_to_cbuf, int32_t, int32_t);