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优化头文件目录 #5031
JC1126创建于 25 天前
优化头文件目录 #5031
已合并
JC1126创建于 25 天前
从JC1126/asc-devkitjc_0811合入到cann/asc-devkitmaster
共 94 个文件变更+11956-9830
Mimpl/c_api/instr_impl/npu_arch_2201/utils_impl/utils_impl.h+3-4
@@ -25,8 +25,9 @@
25 25 
26#include <cstdint>26#include <cstdint>
27#include <type_traits>27#include <type_traits>
28-#include "c_api/utils_intf.h"28+#include "c_api/defs/constant.h"
29-#include "impl/c_api/instr_impl/npu_arch_2201/utils_impl/utils_type.h"29+#include "c_api/defs/enum.h"
30+#include "c_api/defs/union.h"
30#include "impl/utils/common_types.h"31#include "impl/utils/common_types.h"
31#include "impl/utils/sys_macros.h"32#include "impl/utils/sys_macros.h"
32#include "utils/base/sys_constants.h"33#include "utils/base/sys_constants.h"
@@ -71,10 +72,8 @@ constexpr asc_c_api_half_default_repeat_stride ASC_C_API_HALF_DEFAULT_REPEAT_STR
71constexpr asc_c_api_one_fourth_default_repeat_stride ASC_C_API_ONE_FOURTH_DEFAULT_REPEAT_STRIDE;72constexpr asc_c_api_one_fourth_default_repeat_stride ASC_C_API_ONE_FOURTH_DEFAULT_REPEAT_STRIDE;
72 73 
73constexpr uint16_t ASC_C_API_DATABLOCK_NUM = 8;74constexpr uint16_t ASC_C_API_DATABLOCK_NUM = 8;
74-constexpr uint8_t ASC_C_API_MRGSORT_ELEMENT_LEN = 4;
75constexpr uint16_t ASC_C_API_ONE_DATABLOCK_SIZE = 32;75constexpr uint16_t ASC_C_API_ONE_DATABLOCK_SIZE = 32;
76constexpr uint16_t ASC_C_API_REDUCE_DEFAULT_REPEAT_STRIDE = 1;76constexpr uint16_t ASC_C_API_REDUCE_DEFAULT_REPEAT_STRIDE = 1;
77-constexpr uint8_t ASC_VDEQ_SIZE = 16;
78 77 
79using order_t = Order_t;78using order_t = Order_t;
80 79 
Mimpl/c_api/instr_impl/npu_arch_3510/utils_impl.h+2-2
@@ -18,9 +18,9 @@
18#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_UTILS_IMPL_H18#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_UTILS_IMPL_H
19#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_UTILS_IMPL_H19#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_UTILS_IMPL_H
20 20 
21-#include "c_api/utils/enum.h"21+#include "c_api/defs/enum.h"
22+#include "c_api/defs/type.h"
22#include "impl/c_api/instr_impl/npu_arch_3510/utils_impl/utils_impl.h"23#include "impl/c_api/instr_impl/npu_arch_3510/utils_impl/utils_impl.h"
23-#include "impl/c_api/instr_impl/npu_arch_3510/utils_impl/utils_type.h"
24 24 
25#endif25#endif
26 26 
Mimpl/c_api/instr_impl/npu_arch_3510/utils_impl/utils_impl.h+30-1
@@ -11,7 +11,36 @@
11#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_UTILS_IMPL_UTILS_C_API_IMPL_H11#ifndef IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_UTILS_IMPL_UTILS_C_API_IMPL_H
12#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_UTILS_IMPL_UTILS_C_API_IMPL_H12#define IMPL_C_API_INSTR_IMPL_NPU_ARCH_3510_UTILS_IMPL_UTILS_C_API_IMPL_H
13 13 
14-#include "impl/c_api/instr_impl/npu_arch_2201/utils_impl/utils_impl.h"14+#include "utils/base/sys_constants.h"
15+ 
16+constexpr uint32_t C_API_AIC_TYPE = AscendC::AIC;
17+constexpr uint32_t C_API_AIV_TYPE = AscendC::AIV;
18+constexpr uint32_t C_API_MIX_TYPE = AscendC::MIX;
19+ 
20+#define ASC_IS_AIV ASCEND_IS_AIV
21+#define ASC_IS_AIC ASCEND_IS_AIC
22+ 
23+constexpr uint16_t ASC_C_API_ONE_DATABLOCK_SIZE = 32;
24+ 
25+__aicore__ inline void asc_sync_post_process() { pipe_barrier(pipe_t::PIPE_ALL); }
26+ 
27+union asc_capi_fpc_reg_config {
28+ uint64_t config;
29+ struct {
30+ uint64_t relu_units : 8;
31+ uint64_t quant_units : 8;
32+ uint64_t reserved : 47;
33+ uint64_t unit_flag : 1;
34+ };
35+};
36+ 
37+union asc_scalar_bitcode {
38+ __aicore__ asc_scalar_bitcode() {}
39+ half input_half;
40+ int16_t input_int16_t;
41+ uint16_t input_uint16_t;
42+ uint64_t output;
43+};
15 44 
16union asc_gm2l1_loop_size_config {45union asc_gm2l1_loop_size_config {
17 uint64_t config;46 uint64_t config;
Ainclude/c_api/asc_cube.h+32-0
@@ -0,0 +1,32 @@
1+/**
2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+ * See LICENSE in the root of the software repository for the full text of the License.
9+ */
10+ 
11+#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12+#error "asc_cube.h cannot be used with compile flag --enable-simt enabled."
13+#endif
14+ 
15+#ifndef INCLUDE_C_API_ASC_CUBE_H
16+#define INCLUDE_C_API_ASC_CUBE_H
17+ 
18+#include "utils/debug/asc_assert.h"
19+#include "utils/debug/asc_dump.h"
20+#include "utils/debug/asc_printf.h"
21+#include "utils/debug/asc_time.h"
22+#include "c_api/defs/defs.h"
23+#include "c_api/atomic/atomic.h"
24+#include "c_api/cache_ctrl/cache_ctrl.h"
25+#include "c_api/cube_compute/cube_compute.h"
26+#include "c_api/cube_datamove/cube_datamove.h"
27+#include "c_api/scalar_compute/scalar_compute.h"
28+#include "c_api/sync/sync.h"
29+#include "c_api/utils/utils.h"
30+#include "c_api/spr/spr.h"
31+ 
32+#endif
Ainclude/c_api/asc_memory_vector.h+31-0
@@ -0,0 +1,31 @@
1+/**
2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+ * See LICENSE in the root of the software repository for the full text of the License.
9+ */
10+ 
11+#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12+#error "asc_memory_vector.h cannot be used with compile flag --enable-simt enabled."
13+#endif
14+ 
15+#ifndef INCLUDE_C_API_ASC_MEMORY_VECTOR_H
16+#define INCLUDE_C_API_ASC_MEMORY_VECTOR_H
17+ 
18+#include "utils/debug/asc_assert.h"
19+#include "utils/debug/asc_dump.h"
20+#include "utils/debug/asc_printf.h"
21+#include "utils/debug/asc_time.h"
22+#include "c_api/defs/defs.h"
23+#include "c_api/atomic/atomic.h"
24+#include "c_api/cache_ctrl/cache_ctrl.h"
25+#include "c_api/scalar_compute/scalar_compute.h"
26+#include "c_api/sync/sync.h"
27+#include "c_api/utils/utils.h"
28+#include "c_api/vector_compute/vector_compute.h"
29+#include "c_api/vector_datamove/vector_datamove.h"
30+ 
31+#endif
Ainclude/c_api/asc_reg_vector.h+37-0
@@ -0,0 +1,37 @@
1+/**
2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+ * See LICENSE in the root of the software repository for the full text of the License.
9+ */
10+ 
11+#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12+#error "asc_reg_vector.h cannot be used with compile flag --enable-simt enabled."
13+#endif
14+ 
15+#ifndef INCLUDE_C_API_ASC_REG_VECTOR_H
16+#define INCLUDE_C_API_ASC_REG_VECTOR_H
17+ 
18+#if (defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510))
19+#include "utils/base/helpers.h"
20+#include "utils/debug/asc_assert.h"
21+#include "utils/debug/asc_dump.h"
22+#include "utils/debug/asc_printf.h"
23+#include "utils/debug/asc_time.h"
24+#include "c_api/defs/defs.h"
25+#include "c_api/atomic/atomic.h"
26+#include "c_api/cache_ctrl/cache_ctrl.h"
27+#include "c_api/scalar_compute/scalar_compute.h"
28+#include "c_api/sync/sync.h"
29+#include "c_api/utils/utils.h"
30+#include "c_api/vector_datamove/vector_datamove.h"
31+#include "c_api/vector_compute/compute/vector_permute_sel.h"
32+#include "c_api/vector_compute/compute/vector_sort.h"
33+#include "c_api/spr/spr.h"
34+#include "c_api/reg_compute/reg_compute.h"
35+#endif
36+ 
37+#endif
Minclude/c_api/asc_simd.h+4-19
@@ -20,26 +20,11 @@
20#ifndef INCLUDE_C_API_ASC_SIMD_H20#ifndef INCLUDE_C_API_ASC_SIMD_H
21#define INCLUDE_C_API_ASC_SIMD_H21#define INCLUDE_C_API_ASC_SIMD_H
22 22 
23-#include "impl/c_api/instr_impl/npu_arch_2201/utils_impl/utils_impl.h"23+#include "c_api/asc_cube.h"
24-#include "utils/base/helpers.h"24+#include "c_api/asc_memory_vector.h"
25- 
26-#include "c_api/atomic/atomic.h"
27-#include "c_api/cache_ctrl/cache_ctrl.h"
28-#include "c_api/cube_compute/cube_compute.h"
29-#include "c_api/cube_datamove/cube_datamove.h"
30-#include "c_api/misc/misc.h"
31-#include "c_api/scalar_compute/scalar_compute.h"
32-#include "c_api/sync/sync.h"
33-#include "c_api/sys_var/sys_var.h"
34-#include "c_api/vector_datamove/vector_datamove.h"
35-#include "c_api/vector_compute/vector_compute.h"
36- 
37-#if !defined(__NPU_ARCH__) || (defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510))
38-#include "c_api/reg_compute/reg_convert.h"
39-#include "c_api/reg_compute/reg_load.h"
40-#include "c_api/reg_compute/reg_store.h"
41-#include "c_api/reg_compute/reg_vector.h"
42 25 
26+#if (defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510))
27+#include "c_api/asc_reg_vector.h"
43#endif28#endif
44 29 
45#endif30#endif
Minclude/c_api/atomic/atomic.h+2-51
@@ -19,58 +19,9 @@
19 19 
20#ifndef INCLUDE_C_API_ATOMIC_ATOMIC_H20#ifndef INCLUDE_C_API_ATOMIC_ATOMIC_H
21#define INCLUDE_C_API_ATOMIC_ATOMIC_H21#define INCLUDE_C_API_ATOMIC_ATOMIC_H
22-#include "impl/c_api/instr_impl/npu_arch_2201/utils_impl/utils_impl.h"
23-#include "c_api/utils/union.h"
24 22 
25-#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)23+#include "c_api/atomic/memcpy_atomic.h"
26- 24+#include "c_api/atomic/scalar_atomic.h"
27-#include "impl/c_api/instr_impl/npu_arch_2201/atomic_impl.h"
28- 
29-#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510)
30- 
31-#include "impl/c_api/instr_impl/npu_arch_3510/atomic_impl.h"
32- 
33-#endif
34- 
35-__aicore__ inline void asc_set_atomic_add_float();
36-__aicore__ inline void asc_set_atomic_add_int8();
37-__aicore__ inline void asc_set_atomic_add_int16();
38-__aicore__ inline void asc_set_atomic_add_int32();
39- 
40-__aicore__ inline void asc_set_atomic_none();
41-[[deprecated("NOTICE: asc_get_store_atomic_config is deprecated."
42- "Please use asc_atomic_add instead for atomic add operation.")]]
43-__aicore__ inline void asc_get_store_atomic_config(asc_store_atomic_config& config);
44-__aicore__ inline void asc_set_store_atomic_config_v1(uint16_t type, uint16_t op);
45-__aicore__ inline void asc_set_atomic_add_bfloat();
46-__aicore__ inline void asc_set_atomic_add_float16();
47-__aicore__ inline void asc_set_atomic_max_bfloat();
48-__aicore__ inline void asc_set_atomic_max_float();
49-__aicore__ inline void asc_set_atomic_max_float16();
50-__aicore__ inline void asc_set_atomic_max_int8();
51-__aicore__ inline void asc_set_atomic_max_int16();
52-__aicore__ inline void asc_set_atomic_max_int32();
53-__aicore__ inline void asc_set_atomic_min_bfloat();
54-__aicore__ inline void asc_set_atomic_min_float();
55-__aicore__ inline void asc_set_atomic_min_float16();
56-__aicore__ inline void asc_set_atomic_min_int8();
57-__aicore__ inline void asc_set_atomic_min_int16();
58-__aicore__ inline void asc_set_atomic_min_int32();
59- 
60-[[deprecated("NOTICE: asc_set_store_atomic_config_v2 is deprecated."
61- "Please use asc_atomic_add instead for atomic add operation.")]] __aicore__ inline void
62-asc_set_store_atomic_config_v2(uint16_t type, uint16_t op);
63- 
64-// ==================== Deprecated interfaces ====================
65- 
66-[[deprecated("NOTICE: asc_set_atomic_add_int is deprecated. Please use asc_set_atomic_add_int32 instead.")]]
67-__aicore__ inline void asc_set_atomic_add_int();
68- 
69-[[deprecated("NOTICE: asc_set_atomic_max_int is deprecated. Please use asc_set_atomic_max_int32 instead.")]]
70-__aicore__ inline void asc_set_atomic_max_int();
71- 
72-[[deprecated("NOTICE: asc_set_atomic_min_int is deprecated. Please use asc_set_atomic_min_int32 instead.")]]
73-__aicore__ inline void asc_set_atomic_min_int();
74 25 
75#endif26#endif
76 27 
Ainclude/c_api/atomic/memcpy_atomic.h+65-0
@@ -0,0 +1,65 @@
1+/**
2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+ * See LICENSE in the root of the software repository for the full text of the License.
9+ */
10+ 
11+#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12+#error "memcpy_atomic.h cannot be used with compile flag --enable-simt enabled."
13+#endif
14+ 
15+#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
16+#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
17+#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
18+#endif
19+ 
20+#ifndef INCLUDE_C_API_ATOMIC_MEMCPY_ATOMIC_H
21+#define INCLUDE_C_API_ATOMIC_MEMCPY_ATOMIC_H
22+ 
23+#include "c_api/defs/defs.h"
24+ 
25+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
26+#include "impl/c_api/instr_impl/npu_arch_2201/atomic_impl.h"
27+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510)
28+#include "impl/c_api/instr_impl/npu_arch_3510/atomic_impl.h"
29+#endif
30+ 
31+__aicore__ inline void asc_set_atomic_add_float();
32+__aicore__ inline void asc_set_atomic_add_int8();
33+__aicore__ inline void asc_set_atomic_add_int16();
34+__aicore__ inline void asc_set_atomic_add_int32();
35+__aicore__ inline void asc_set_atomic_none();
36+__aicore__ inline void asc_set_atomic_add_bfloat();
37+__aicore__ inline void asc_set_atomic_add_float16();
38+__aicore__ inline void asc_set_atomic_max_bfloat();
39+__aicore__ inline void asc_set_atomic_max_float();
40+__aicore__ inline void asc_set_atomic_max_float16();
41+__aicore__ inline void asc_set_atomic_max_int8();
42+__aicore__ inline void asc_set_atomic_max_int16();
43+__aicore__ inline void asc_set_atomic_max_int32();
44+__aicore__ inline void asc_set_atomic_min_bfloat();
45+__aicore__ inline void asc_set_atomic_min_float();
46+__aicore__ inline void asc_set_atomic_min_float16();
47+__aicore__ inline void asc_set_atomic_min_int8();
48+__aicore__ inline void asc_set_atomic_min_int16();
49+__aicore__ inline void asc_set_atomic_min_int32();
50+ 
51+[[deprecated("NOTICE: asc_set_atomic_add_int is deprecated. Please use asc_set_atomic_add_int32 instead.")]]
52+__aicore__ inline void asc_set_atomic_add_int();
53+ 
54+[[deprecated("NOTICE: asc_set_atomic_max_int is deprecated. Please use asc_set_atomic_max_int32 instead.")]]
55+__aicore__ inline void asc_set_atomic_max_int();
56+ 
57+[[deprecated("NOTICE: asc_set_atomic_min_int is deprecated. Please use asc_set_atomic_min_int32 instead.")]]
58+__aicore__ inline void asc_set_atomic_min_int();
59+ 
60+#endif
61+ 
62+#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H)
63+#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
64+#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
65+#endif
Ainclude/c_api/atomic/scalar_atomic.h+99-0
@@ -0,0 +1,99 @@
1+/**
2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+ * See LICENSE in the root of the software repository for the full text of the License.
9+ */
10+ 
11+#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12+#error "scalar_atomic.h cannot be used with compile flag --enable-simt enabled."
13+#endif
14+ 
15+#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
16+#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
17+#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
18+#endif
19+ 
20+#ifndef INCLUDE_C_API_ATOMIC_SCALAR_ATOMIC_H
21+#define INCLUDE_C_API_ATOMIC_SCALAR_ATOMIC_H
22+ 
23+#include "c_api/defs/defs.h"
24+ 
25+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
26+#include "impl/c_api/instr_impl/npu_arch_2201/atomic_impl.h"
27+#include "impl/c_api/instr_impl/npu_arch_2201/scalar_compute_impl.h"
28+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510)
29+#include "impl/c_api/instr_impl/npu_arch_3510/atomic_impl.h"
30+#include "impl/c_api/instr_impl/npu_arch_3510/scalar_compute_impl.h"
31+#endif
32+ 
33+namespace __asc_aicore {
34+__aicore__ inline int32_t asc_atomic_add(__gm__ int32_t* address, int32_t val);
35+__aicore__ inline uint32_t asc_atomic_add(__gm__ uint32_t* address, uint32_t val);
36+__aicore__ inline float asc_atomic_add(__gm__ float* address, float val);
37+__aicore__ inline int64_t asc_atomic_add(__gm__ int64_t* address, int64_t val);
38+__aicore__ inline uint64_t asc_atomic_add(__gm__ uint64_t* address, uint64_t val);
39+__aicore__ inline int32_t asc_atomic_sub(__gm__ int32_t* address, int32_t val);
40+__aicore__ inline uint32_t asc_atomic_sub(__gm__ uint32_t* address, uint32_t val);
41+__aicore__ inline float asc_atomic_sub(__gm__ float* address, float val);
42+__aicore__ inline int64_t asc_atomic_sub(__gm__ int64_t* address, int64_t val);
43+__aicore__ inline uint64_t asc_atomic_sub(__gm__ uint64_t* address, uint64_t val);
44+__aicore__ inline int32_t asc_atomic_exch(__gm__ int32_t* address, int32_t val);
45+__aicore__ inline uint32_t asc_atomic_exch(__gm__ uint32_t* address, uint32_t val);
46+__aicore__ inline float asc_atomic_exch(__gm__ float* address, float val);
47+__aicore__ inline int64_t asc_atomic_exch(__gm__ int64_t* address, int64_t val);
48+__aicore__ inline uint64_t asc_atomic_exch(__gm__ uint64_t* address, uint64_t val);
49+__aicore__ inline int32_t asc_atomic_max(__gm__ int32_t* address, int32_t val);
50+__aicore__ inline uint32_t asc_atomic_max(__gm__ uint32_t* address, uint32_t val);
51+__aicore__ inline float asc_atomic_max(__gm__ float* address, float val);
52+__aicore__ inline int64_t asc_atomic_max(__gm__ int64_t* address, int64_t val);
53+__aicore__ inline uint64_t asc_atomic_max(__gm__ uint64_t* address, uint64_t val);
54+__aicore__ inline int32_t asc_atomic_min(__gm__ int32_t* address, int32_t val);
55+__aicore__ inline uint32_t asc_atomic_min(__gm__ uint32_t* address, uint32_t val);
56+__aicore__ inline float asc_atomic_min(__gm__ float* address, float val);
57+__aicore__ inline int64_t asc_atomic_min(__gm__ int64_t* address, int64_t val);
58+__aicore__ inline uint64_t asc_atomic_min(__gm__ uint64_t* address, uint64_t val);
59+__aicore__ inline int32_t asc_atomic_cas(__gm__ int32_t* address, int32_t compare, int32_t val);
60+__aicore__ inline uint32_t asc_atomic_cas(__gm__ uint32_t* address, uint32_t compare, uint32_t val);
61+__aicore__ inline float asc_atomic_cas(__gm__ float* address, float compare, float val);
62+__aicore__ inline int64_t asc_atomic_cas(__gm__ int64_t* address, int64_t compare, int64_t val);
63+__aicore__ inline uint64_t asc_atomic_cas(__gm__ uint64_t* address, uint64_t compare, uint64_t val);
64+__aicore__ inline int32_t asc_atomic_and(__gm__ int32_t* address, int32_t val);
65+__aicore__ inline uint32_t asc_atomic_and(__gm__ uint32_t* address, uint32_t val);
66+__aicore__ inline int64_t asc_atomic_and(__gm__ int64_t* address, int64_t val);
67+__aicore__ inline uint64_t asc_atomic_and(__gm__ uint64_t* address, uint64_t val);
68+__aicore__ inline int32_t asc_atomic_or(__gm__ int32_t* address, int32_t val);
69+__aicore__ inline uint32_t asc_atomic_or(__gm__ uint32_t* address, uint32_t val);
70+__aicore__ inline int64_t asc_atomic_or(__gm__ int64_t* address, int64_t val);
71+__aicore__ inline uint64_t asc_atomic_or(__gm__ uint64_t* address, uint64_t val);
72+__aicore__ inline int32_t asc_atomic_xor(__gm__ int32_t* address, int32_t val);
73+__aicore__ inline uint32_t asc_atomic_xor(__gm__ uint32_t* address, uint32_t val);
74+__aicore__ inline int64_t asc_atomic_xor(__gm__ int64_t* address, int64_t val);
75+__aicore__ inline uint64_t asc_atomic_xor(__gm__ uint64_t* address, uint64_t val);
76+__aicore__ inline uint32_t asc_atomic_inc(__gm__ uint32_t* address, uint32_t val);
77+__aicore__ inline uint64_t asc_atomic_inc(__gm__ uint64_t* address, uint64_t val);
78+__aicore__ inline uint32_t asc_atomic_dec(__gm__ uint32_t* address, uint32_t val);
79+__aicore__ inline uint64_t asc_atomic_dec(__gm__ uint64_t* address, uint64_t val);
80+} // namespace __asc_aicore
81+ 
82+[[deprecated("NOTICE: asc_get_store_atomic_config is deprecated."
83+ "Please use asc_atomic_add instead for atomic add operation.")]]
84+__aicore__ inline void asc_get_store_atomic_config(asc_store_atomic_config& config);
85+ 
86+__aicore__ inline void asc_set_store_atomic_config_v1(uint16_t type, uint16_t op);
87+ 
88+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510)
89+[[deprecated("NOTICE: asc_set_store_atomic_config_v2 is deprecated."
90+ "Please use asc_atomic_add instead for atomic add operation.")]] __aicore__ inline void
91+asc_set_store_atomic_config_v2(uint16_t type, uint16_t op);
92+#endif
93+ 
94+#endif
95+ 
96+#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H)
97+#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
98+#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
99+#endif
Minclude/c_api/cache_ctrl/cache_ctrl.h+1-1
@@ -19,7 +19,7 @@
19 19 
20#ifndef INCLUDE_C_API_CACHE_CTRL_CACHE_CTRL_H20#ifndef INCLUDE_C_API_CACHE_CTRL_CACHE_CTRL_H
21#define INCLUDE_C_API_CACHE_CTRL_CACHE_CTRL_H21#define INCLUDE_C_API_CACHE_CTRL_CACHE_CTRL_H
22-#include "impl/c_api/instr_impl/npu_arch_2201/utils_impl/utils_impl.h"22+#include "c_api/defs/defs.h"
23 23 
24#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)24#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
25 25 
Ainclude/c_api/composite/cube_compute_composite.h+167-0
@@ -0,0 +1,167 @@
1+/**
2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+ * See LICENSE in the root of the software repository for the full text of the License.
9+ */
10+ 
11+#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12+#error "composite/cube_compute_composite.h cannot be used with compile flag --enable-simt enabled."
13+#endif
14+ 
15+#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
16+#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
17+#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
18+#endif
19+ 
20+#ifndef INCLUDE_C_API_COMPOSITE_CUBE_COMPUTE_COMPOSITE_H
21+#define INCLUDE_C_API_COMPOSITE_CUBE_COMPUTE_COMPOSITE_H
22+#include "c_api/defs/defs.h"
23+ 
24+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
25+#include "impl/c_api/instr_impl/npu_arch_2201/cube_compute_impl.h"
26+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510)
27+#include "impl/c_api/instr_impl/npu_arch_3510/cube_compute_impl.h"
28+#endif
29+ 
30+__aicore__ inline void asc_mmad_sync(
31+ __cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix, uint16_t left_height,
32+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source,
33+ bool c_matrix_init_val);
34+ 
35+__aicore__ inline void asc_mmad_sync(
36+ __cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix, uint16_t left_height,
37+ uint16_t n_dim, uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag,
38+ bool k_direction_align, bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
39+ 
40+__aicore__ inline void asc_mmad_sync(
41+ __cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height, uint16_t n_dim,
42+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
43+ 
44+__aicore__ inline void asc_mmad_sync(
45+ __cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height, uint16_t n_dim,
46+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
47+ bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
48+ 
49+__aicore__ inline void asc_mmad_sync(
50+ __cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height, uint16_t n_dim,
51+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
52+ 
53+__aicore__ inline void asc_mmad_sync(
54+ __cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height, uint16_t n_dim,
55+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
56+ bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
57+ 
58+__aicore__ inline void asc_mmad_sync(
59+ __cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height, uint16_t n_dim,
60+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
61+ 
62+__aicore__ inline void asc_mmad_sync(
63+ __cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height, uint16_t n_dim,
64+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
65+ bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
66+ 
67+__aicore__ inline void asc_mmad_s4_sync(
68+ __cc__ int32_t* c_matrix, __ca__ int4b_t* a_matrix, __cb__ int4b_t* b_matrix, uint16_t left_height, uint16_t n_dim,
69+ uint16_t right_width, uint8_t unit_flag, bool k_direction_align, bool c_matrix_source, bool c_matrix_init_val);
70+ 
71+__aicore__ inline void asc_mmad_s4_sync(
72+ __cc__ int32_t* c_matrix, __ca__ int4b_t* a_matrix, __cb__ int4b_t* b_matrix, uint16_t left_height, uint16_t n_dim,
73+ uint16_t right_width, uint8_t feat_offset, uint8_t smask_offset, uint8_t unit_flag, bool k_direction_align,
74+ bool is_weight_offset, bool c_matrix_source, bool c_matrix_init_val);
75+ 
76+__aicore__ inline void asc_mmad_sparse_sync(
77+ __cc__ int32_t* c, __ca__ int8_t* a, __cb__ int8_t* b, uint16_t m, uint16_t k, uint16_t n, uint8_t unit_flag,
78+ bool c_matrix_source, bool c_matrix_init_val);
79+ 
80+__aicore__ inline void asc_mmad_mx_sync(
81+ __cc__ float* c_matrix, __ca__ fp4x2_e1m2_t* a_matrix, __cb__ fp4x2_e1m2_t* b_matrix, uint16_t left_height,
82+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
83+ bool c_matrix_init_val);
84+ 
85+__aicore__ inline void asc_mmad_mx_sync(
86+ __cc__ float* c_matrix, __ca__ fp4x2_e1m2_t* a_matrix, __cb__ fp4x2_e2m1_t* b_matrix, uint16_t left_height,
87+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
88+ bool c_matrix_init_val);
89+ 
90+__aicore__ inline void asc_mmad_mx_sync(
91+ __cc__ float* c_matrix, __ca__ fp4x2_e2m1_t* a_matrix, __cb__ fp4x2_e1m2_t* b_matrix, uint16_t left_height,
92+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
93+ bool c_matrix_init_val);
94+ 
95+__aicore__ inline void asc_mmad_mx_sync(
96+ __cc__ float* c_matrix, __ca__ fp4x2_e2m1_t* a_matrix, __cb__ fp4x2_e2m1_t* b_matrix, uint16_t left_height,
97+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
98+ bool c_matrix_init_val);
99+ 
100+__aicore__ inline void asc_mmad_mx_sync(
101+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
102+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
103+ bool c_matrix_init_val);
104+ 
105+__aicore__ inline void asc_mmad_mx_sync(
106+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
107+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
108+ bool c_matrix_init_val);
109+ 
110+__aicore__ inline void asc_mmad_mx_sync(
111+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
112+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
113+ bool c_matrix_init_val);
114+ 
115+__aicore__ inline void asc_mmad_mx_sync(
116+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
117+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
118+ bool c_matrix_init_val);
119+ 
120+__aicore__ inline void asc_mmad_sync(
121+ __cc__ float* c_matrix, __ca__ bfloat16_t* a_matrix, __cb__ bfloat16_t* b_matrix, uint16_t left_height,
122+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
123+ bool c_matrix_init_val);
124+ 
125+__aicore__ inline void asc_mmad_sync(
126+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
127+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
128+ bool c_matrix_init_val);
129+ 
130+__aicore__ inline void asc_mmad_sync(
131+ __cc__ float* c_matrix, __ca__ fp8_e4m3fn_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
132+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
133+ bool c_matrix_init_val);
134+ 
135+__aicore__ inline void asc_mmad_sync(
136+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e4m3fn_t* b_matrix, uint16_t left_height,
137+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
138+ bool c_matrix_init_val);
139+ 
140+__aicore__ inline void asc_mmad_sync(
141+ __cc__ float* c_matrix, __ca__ fp8_e5m2_t* a_matrix, __cb__ fp8_e5m2_t* b_matrix, uint16_t left_height,
142+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
143+ bool c_matrix_init_val);
144+ 
145+__aicore__ inline void asc_mmad_sync(
146+ __cc__ float* c_matrix, __ca__ half* a_matrix, __cb__ half* b_matrix, uint16_t left_height, uint16_t n_dim,
147+ uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);
148+ 
149+__aicore__ inline void asc_mmad_sync(
150+ __cc__ float* c_matrix, __ca__ float* a_matrix, __cb__ float* b_matrix, uint16_t left_height, uint16_t n_dim,
151+ uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);
152+ 
153+__aicore__ inline void asc_mmad_sync(
154+ __cc__ int32_t* c_matrix, __ca__ int8_t* a_matrix, __cb__ int8_t* b_matrix, uint16_t left_height, uint16_t n_dim,
155+ uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source, bool c_matrix_init_val);
156+ 
157+__aicore__ inline void asc_mmad_sync(
158+ __cc__ float* c_matrix, __ca__ hifloat8_t* a_matrix, __cb__ hifloat8_t* b_matrix, uint16_t left_height,
159+ uint16_t n_dim, uint16_t right_width, uint8_t unit_flag, bool disable_gemv, bool c_matrix_source,
160+ bool c_matrix_init_val);
161+ 
162+#endif
163+ 
164+#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H)
165+#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
166+#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
167+#endif
Ainclude/c_api/composite/cube_datamove_composite.h+1384-0
@@ -0,0 +1,1384 @@
1+/**
2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+ * See LICENSE in the root of the software repository for the full text of the License.
9+ */
10+ 
11+#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12+#error "composite/cube_datamove_composite.h cannot be used with compile flag --enable-simt enabled."
13+#endif
14+ 
15+#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
16+#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
17+#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
18+#endif
19+ 
20+#ifndef INCLUDE_C_API_COMPOSITE_CUBE_DATAMOVE_COMPOSITE_H
21+#define INCLUDE_C_API_COMPOSITE_CUBE_DATAMOVE_COMPOSITE_H
22+#include "c_api/defs/defs.h"
23+ 
24+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
25+#include "impl/c_api/instr_impl/npu_arch_2201/cube_datamove_impl.h"
26+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510)
27+#include "impl/c_api/instr_impl/npu_arch_3510/cube_datamove_impl.h"
28+#endif
29+__aicore__ inline void asc_copy_l12fb_sync(__fbuf__ void* dst, __cbuf__ void* src, uint32_t size);
30+ 
31+__aicore__ inline void asc_copy_l12bt_sync(uint64_t dst, __cbuf__ void* src, uint32_t size);
32+ 
33+__aicore__ inline void asc_fill_l0a_sync(__ca__ half* dst, half value, const asc_fill_value_config& config);
34+ 
35+__aicore__ inline void asc_fill_l0a_sync(__ca__ half* dst, uint32_t value, const asc_fill_value_config& config);
36+ 
37+__aicore__ inline void asc_fill_l0a_sync(__ca__ float* dst, half value, const asc_fill_value_config& config);
38+ 
39+__aicore__ inline void asc_fill_l0a_sync(__ca__ float* dst, uint32_t value, const asc_fill_value_config& config);
40+ 
41+__aicore__ inline void asc_fill_l0a_sync(__ca__ int16_t* dst, half value, const asc_fill_value_config& config);
42+ 
43+__aicore__ inline void asc_fill_l0a_sync(__ca__ int16_t* dst, uint32_t value, const asc_fill_value_config& config);
44+ 
45+__aicore__ inline void asc_fill_l0a_sync(__ca__ int32_t* dst, half value, const asc_fill_value_config& config);
46+ 
47+__aicore__ inline void asc_fill_l0a_sync(__ca__ int32_t* dst, uint32_t value, const asc_fill_value_config& config);
48+ 
49+__aicore__ inline void asc_fill_l0a_sync(__ca__ uint16_t* dst, half value, const asc_fill_value_config& config);
50+ 
51+__aicore__ inline void asc_fill_l0a_sync(__ca__ uint16_t* dst, uint32_t value, const asc_fill_value_config& config);
52+ 
53+__aicore__ inline void asc_fill_l0a_sync(__ca__ uint32_t* dst, half value, const asc_fill_value_config& config);
54+ 
55+__aicore__ inline void asc_fill_l0a_sync(__ca__ uint32_t* dst, uint32_t value, const asc_fill_value_config& config);
56+ 
57+__aicore__ inline void asc_fill_l0a_sync(__ca__ bfloat16_t* dst, bfloat16_t value, const asc_fill_value_config& config);
58+ 
59+__aicore__ inline void asc_fill_l1_sync(__cbuf__ half* dst, half value, const asc_fill_value_config& config);
60+ 
61+__aicore__ inline void asc_fill_l1_sync(__cbuf__ half* dst, uint32_t value, const asc_fill_value_config& config);
62+ 
63+__aicore__ inline void asc_fill_l1_sync(__cbuf__ float* dst, half value, const asc_fill_value_config& config);
64+ 
65+__aicore__ inline void asc_fill_l1_sync(__cbuf__ float* dst, uint32_t value, const asc_fill_value_config& config);
66+ 
67+__aicore__ inline void asc_fill_l1_sync(__cbuf__ int16_t* dst, half value, const asc_fill_value_config& config);
68+ 
69+__aicore__ inline void asc_fill_l1_sync(__cbuf__ int16_t* dst, uint32_t value, const asc_fill_value_config& config);
70+ 
71+__aicore__ inline void asc_fill_l1_sync(__cbuf__ int32_t* dst, half value, const asc_fill_value_config& config);
72+ 
73+__aicore__ inline void asc_fill_l1_sync(__cbuf__ int32_t* dst, uint32_t value, const asc_fill_value_config& config);
74+ 
75+__aicore__ inline void asc_fill_l1_sync(__cbuf__ uint16_t* dst, half value, const asc_fill_value_config& config);
76+ 
77+__aicore__ inline void asc_fill_l1_sync(__cbuf__ uint16_t* dst, uint32_t value, const asc_fill_value_config& config);
78+ 
79+__aicore__ inline void asc_fill_l1_sync(__cbuf__ uint32_t* dst, half value, const asc_fill_value_config& config);
80+ 
81+__aicore__ inline void asc_fill_l1_sync(__cbuf__ uint32_t* dst, uint32_t value, const asc_fill_value_config& config);
82+ 
83+__aicore__ inline void asc_fill_l1_sync(
84+ __cbuf__ bfloat16_t* dst, bfloat16_t value, const asc_fill_value_config& config);
85+ 
86+__aicore__ inline void asc_fill_l1_sync(__cbuf__ bfloat16_t* dst, half value, const asc_fill_value_config& config);
87+ 
88+__aicore__ inline void asc_fill_l1_sync(__cbuf__ bfloat16_t* dst, uint32_t value, const asc_fill_value_config& config);
89+ 
90+__aicore__ inline void asc_fill_l0b_sync(__cb__ half* dst, half value, const asc_fill_value_config& config);
91+ 
92+__aicore__ inline void asc_fill_l0b_sync(__cb__ half* dst, uint32_t value, const asc_fill_value_config& config);
93+ 
94+__aicore__ inline void asc_fill_l0b_sync(__cb__ float* dst, half value, const asc_fill_value_config& config);
95+ 
96+__aicore__ inline void asc_fill_l0b_sync(__cb__ float* dst, uint32_t value, const asc_fill_value_config& config);
97+ 
98+__aicore__ inline void asc_fill_l0b_sync(__cb__ int16_t* dst, half value, const asc_fill_value_config& config);
99+ 
100+__aicore__ inline void asc_fill_l0b_sync(__cb__ int16_t* dst, uint32_t value, const asc_fill_value_config& config);
101+ 
102+__aicore__ inline void asc_fill_l0b_sync(__cb__ int32_t* dst, half value, const asc_fill_value_config& config);
103+ 
104+__aicore__ inline void asc_fill_l0b_sync(__cb__ int32_t* dst, uint32_t value, const asc_fill_value_config& config);
105+ 
106+__aicore__ inline void asc_fill_l0b_sync(__cb__ uint16_t* dst, half value, const asc_fill_value_config& config);
107+ 
108+__aicore__ inline void asc_fill_l0b_sync(__cb__ uint16_t* dst, uint32_t value, const asc_fill_value_config& config);
109+ 
110+__aicore__ inline void asc_fill_l0b_sync(__cb__ uint32_t* dst, half value, const asc_fill_value_config& config);
111+ 
112+__aicore__ inline void asc_fill_l0b_sync(__cb__ uint32_t* dst, uint32_t value, const asc_fill_value_config& config);
113+ 
114+__aicore__ inline void asc_fill_l0b_sync(__cb__ bfloat16_t* dst, bfloat16_t value, const asc_fill_value_config& config);
115+ 
116+__aicore__ inline void asc_fill_l0b_sync(__cb__ bfloat16_t* dst, half value, const asc_fill_value_config& config);
117+ 
118+__aicore__ inline void asc_fill_l0b_sync(__cb__ bfloat16_t* dst, uint32_t value, const asc_fill_value_config& config);
119+ 
120+__aicore__ inline void asc_copy_gm2l1_sync(__cbuf__ void* dst, __gm__ void* src, uint32_t size);
121+ 
122+__aicore__ inline void asc_copy_gm2l1_pad1_sync(__cbuf__ void* dst, __gm__ void* src, uint32_t size);
123+ 
124+__aicore__ inline void asc_copy_gm2l1_pad2_sync(__cbuf__ void* dst, __gm__ void* src, uint32_t size);
125+ 
126+__aicore__ inline void asc_copy_gm2l1_pad3_sync(__cbuf__ void* dst, __gm__ void* src, uint32_t size);
127+ 
128+__aicore__ inline void asc_copy_gm2l1_pad4_sync(__cbuf__ void* dst, __gm__ void* src, uint32_t size);
129+ 
130+__aicore__ inline void asc_copy_gm2l1_pad5_sync(__cbuf__ void* dst, __gm__ void* src, uint32_t size);
131+ 
132+__aicore__ inline void asc_copy_gm2l1_pad6_sync(__cbuf__ void* dst, __gm__ void* src, uint32_t size);
133+ 
134+__aicore__ inline void asc_copy_gm2l1_pad7_sync(__cbuf__ void* dst, __gm__ void* src, uint32_t size);
135+ 
136+__aicore__ inline void asc_copy_gm2l1_pad8_sync(__cbuf__ void* dst, __gm__ void* src, uint32_t size);
137+ 
138+__aicore__ inline void asc_copy_gm2l1_sync(
139+ __cbuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride,
140+ uint16_t dst_gap);
141+ 
142+__aicore__ inline void asc_copy_gm2l1_sync(
143+ __cbuf__ half* dst, __gm__ half* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
144+ 
145+__aicore__ inline void asc_copy_gm2l1_sync(
146+ __cbuf__ float* dst, __gm__ float* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
147+ 
148+__aicore__ inline void asc_copy_gm2l1_sync(
149+ __cbuf__ int32_t* dst, __gm__ int32_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride,
150+ uint16_t dst_gap);
151+ 
152+__aicore__ inline void asc_copy_gm2l1_sync(
153+ __cbuf__ int8_t* dst, __gm__ int8_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
154+ 
155+__aicore__ inline void asc_copy_gm2l1_sync(
156+ __cbuf__ uint32_t* dst, __gm__ uint32_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride,
157+ uint16_t dst_gap);
158+ 
159+__aicore__ inline void asc_copy_gm2l1_sync(
160+ __cbuf__ uint8_t* dst, __gm__ uint8_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride,
161+ uint16_t dst_gap);
162+ 
163+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
164+ __cbuf__ int8_t* dst, __gm__ int8_t* src, uint16_t nd_num, uint16_t n_value, uint16_t d_value,
165+ uint16_t src_nd_matrix_stride, uint16_t src_d_value, uint16_t dst_nz_c0_stride, uint16_t dst_nz_n_stride,
166+ uint16_t dst_nz_matrix_stride);
167+ 
168+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
169+ __cbuf__ uint8_t* dst, __gm__ uint8_t* src, uint16_t nd_num, uint16_t n_value, uint16_t d_value,
170+ uint16_t src_nd_matrix_stride, uint16_t src_d_value, uint16_t dst_nz_c0_stride, uint16_t dst_nz_n_stride,
171+ uint16_t dst_nz_matrix_stride);
172+ 
173+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
174+ __cbuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint16_t nd_num, uint16_t n_value, uint16_t d_value,
175+ uint16_t src_nd_matrix_stride, uint16_t src_d_value, uint16_t dst_nz_c0_stride, uint16_t dst_nz_n_stride,
176+ uint16_t dst_nz_matrix_stride);
177+ 
178+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
179+ __cbuf__ half* dst, __gm__ half* src, uint16_t nd_num, uint16_t n_value, uint16_t d_value,
180+ uint16_t src_nd_matrix_stride, uint16_t src_d_value, uint16_t dst_nz_c0_stride, uint16_t dst_nz_n_stride,
181+ uint16_t dst_nz_matrix_stride);
182+ 
183+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
184+ __cbuf__ int16_t* dst, __gm__ int16_t* src, uint16_t nd_num, uint16_t n_value, uint16_t d_value,
185+ uint16_t src_nd_matrix_stride, uint16_t src_d_value, uint16_t dst_nz_c0_stride, uint16_t dst_nz_n_stride,
186+ uint16_t dst_nz_matrix_stride);
187+ 
188+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
189+ __cbuf__ float* dst, __gm__ float* src, uint16_t nd_num, uint16_t n_value, uint16_t d_value,
190+ uint16_t src_nd_matrix_stride, uint16_t src_d_value, uint16_t dst_nz_c0_stride, uint16_t dst_nz_n_stride,
191+ uint16_t dst_nz_matrix_stride);
192+ 
193+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
194+ __cbuf__ int32_t* dst, __gm__ int32_t* src, uint16_t nd_num, uint16_t n_value, uint16_t d_value,
195+ uint16_t src_nd_matrix_stride, uint16_t src_d_value, uint16_t dst_nz_c0_stride, uint16_t dst_nz_n_stride,
196+ uint16_t dst_nz_matrix_stride);
197+ 
198+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
199+ __cbuf__ uint32_t* dst, __gm__ uint32_t* src, uint16_t nd_num, uint16_t n_value, uint16_t d_value,
200+ uint16_t src_nd_matrix_stride, uint16_t src_d_value, uint16_t dst_nz_c0_stride, uint16_t dst_nz_n_stride,
201+ uint16_t dst_nz_matrix_stride);
202+ 
203+__aicore__ inline void asc_copy_l12l0b_sync(
204+ __cb__ int4b_t* dst, __cbuf__ int4b_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
205+ uint16_t dst_gap);
206+ 
207+__aicore__ inline void asc_copy_l12l0b_sync(
208+ __cb__ uint8_t* dst, __cbuf__ uint8_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
209+ uint16_t dst_gap);
210+ 
211+__aicore__ inline void asc_copy_l12l0b_sync(
212+ __cb__ int8_t* dst, __cbuf__ int8_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
213+ uint16_t dst_gap);
214+ 
215+__aicore__ inline void asc_copy_l12l0b_sync(
216+ __cb__ half* dst, __cbuf__ half* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
217+ 
218+__aicore__ inline void asc_copy_l12l0b_sync(
219+ __cb__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
220+ uint16_t dst_gap);
221+ 
222+__aicore__ inline void asc_copy_l12l0b_sync(
223+ __cb__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
224+ uint16_t dst_gap);
225+ 
226+__aicore__ inline void asc_copy_l12l0b_sync(
227+ __cb__ int32_t* dst, __cbuf__ int32_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
228+ uint16_t dst_gap);
229+ 
230+__aicore__ inline void asc_copy_l12l0b_sync(
231+ __cb__ float* dst, __cbuf__ float* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
232+ uint16_t dst_gap);
233+ 
234+__aicore__ inline void asc_copy_l12l0b_sync(
235+ __cb__ half* dst, __cbuf__ half* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
236+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
237+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
238+ bool f_matrix_ctrl, uint16_t channel_size);
239+ 
240+__aicore__ inline void asc_copy_l12l0b_sync(
241+ __cb__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
242+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
243+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
244+ bool f_matrix_ctrl, uint16_t channel_size);
245+ 
246+__aicore__ inline void asc_copy_l12l0b_sync(
247+ __cb__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
248+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
249+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
250+ bool f_matrix_ctrl, uint16_t channel_size);
251+ 
252+__aicore__ inline void asc_copy_l12l0b_sync(
253+ __cb__ int32_t* dst, __cbuf__ int32_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
254+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
255+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
256+ bool f_matrix_ctrl, uint16_t channel_size);
257+ 
258+__aicore__ inline void asc_copy_l12l0b_sync(
259+ __cb__ float* dst, __cbuf__ float* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
260+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
261+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
262+ bool f_matrix_ctrl, uint16_t channel_size);
263+ 
264+__aicore__ inline void asc_copy_l12l0a_sync(
265+ __ca__ int4b_t* dst, __cbuf__ int4b_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
266+ uint16_t dst_gap);
267+ 
268+__aicore__ inline void asc_copy_l12l0a_sync(
269+ __ca__ uint8_t* dst, __cbuf__ uint8_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
270+ uint16_t dst_gap);
271+ 
272+__aicore__ inline void asc_copy_l12l0a_sync(
273+ __ca__ int8_t* dst, __cbuf__ int8_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
274+ uint16_t dst_gap);
275+ 
276+__aicore__ inline void asc_copy_l12l0a_sync(
277+ __ca__ half* dst, __cbuf__ half* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
278+ 
279+__aicore__ inline void asc_copy_l12l0a_sync(
280+ __ca__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
281+ uint16_t dst_gap);
282+ 
283+__aicore__ inline void asc_copy_l12l0a_sync(
284+ __ca__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
285+ uint16_t dst_gap);
286+ 
287+__aicore__ inline void asc_copy_l12l0a_sync(
288+ __ca__ int32_t* dst, __cbuf__ int32_t* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
289+ uint16_t dst_gap);
290+ 
291+__aicore__ inline void asc_copy_l12l0a_sync(
292+ __ca__ float* dst, __cbuf__ float* src, uint16_t start_index, uint8_t repeat, uint16_t src_stride,
293+ uint16_t dst_gap);
294+ 
295+__aicore__ inline void asc_copy_l12l0a_sync(
296+ __ca__ int4b_t* dst, __cbuf__ int4b_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
297+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
298+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
299+ bool f_matrix_ctrl, uint16_t channel_size);
300+ 
301+__aicore__ inline void asc_copy_l12l0a_sync(
302+ __ca__ uint8_t* dst, __cbuf__ uint8_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
303+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
304+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
305+ bool f_matrix_ctrl, uint16_t channel_size);
306+ 
307+__aicore__ inline void asc_copy_l12l0a_sync(
308+ __ca__ int8_t* dst, __cbuf__ int8_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
309+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
310+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
311+ bool f_matrix_ctrl, uint16_t channel_size);
312+ 
313+__aicore__ inline void asc_copy_l12l0a_sync(
314+ __ca__ half* dst, __cbuf__ half* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
315+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
316+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
317+ bool f_matrix_ctrl, uint16_t channel_size);
318+ 
319+__aicore__ inline void asc_copy_l12l0a_sync(
320+ __ca__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
321+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
322+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
323+ bool f_matrix_ctrl, uint16_t channel_size);
324+ 
325+__aicore__ inline void asc_copy_l12l0a_sync(
326+ __ca__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
327+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
328+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
329+ bool f_matrix_ctrl, uint16_t channel_size);
330+ 
331+__aicore__ inline void asc_copy_l12l0a_sync(
332+ __ca__ int32_t* dst, __cbuf__ int32_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
333+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
334+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
335+ bool f_matrix_ctrl, uint16_t channel_size);
336+ 
337+__aicore__ inline void asc_copy_l12l0a_sync(
338+ __ca__ float* dst, __cbuf__ float* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
339+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
340+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
341+ bool f_matrix_ctrl, uint16_t channel_size);
342+ 
343+__aicore__ inline void asc_copy_l12l0b_sparse_sync(
344+ __cb__ int8_t* dst, __cbuf__ int8_t* src, __cbuf__ int8_t* index, uint16_t start_index, uint8_t repeat);
345+ 
346+__aicore__ inline void asc_copy_l12l0a_trans_sync(
347+ __ca__ half* dst, __cbuf__ half* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap,
348+ bool enable_addr_decrement, uint16_t dst_frac_gap);
349+ 
350+__aicore__ inline void asc_copy_l12l0a_trans_sync(
351+ __ca__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
352+ uint16_t dst_gap, bool enable_addr_decrement, uint16_t dst_frac_gap);
353+ 
354+__aicore__ inline void asc_copy_l12l0a_trans_sync(
355+ __ca__ float* dst, __cbuf__ float* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap,
356+ bool enable_addr_decrement, uint16_t dst_frac_gap);
357+ 
358+__aicore__ inline void asc_copy_l12l0a_trans_sync(
359+ __ca__ int32_t* dst, __cbuf__ int32_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
360+ uint16_t dst_gap, bool enable_addr_decrement, uint16_t dst_frac_gap);
361+ 
362+__aicore__ inline void asc_copy_l12l0a_trans_sync(
363+ __ca__ int8_t* dst, __cbuf__ int8_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap,
364+ bool enable_addr_decrement, uint16_t dst_frac_gap);
365+ 
366+__aicore__ inline void asc_copy_l12l0a_trans_sync(
367+ __ca__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
368+ uint16_t dst_gap, bool enable_addr_decrement, uint16_t dst_frac_gap);
369+ 
370+__aicore__ inline void asc_copy_l12l0a_trans_sync(
371+ __ca__ uint8_t* dst, __cbuf__ uint8_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
372+ uint16_t dst_gap, bool enable_addr_decrement, uint16_t dst_frac_gap);
373+ 
374+__aicore__ inline void asc_copy_l12l0b_trans_sync(
375+ __cb__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
376+ uint16_t dst_gap, bool enable_addr_decrement, uint16_t dst_frac_gap);
377+ 
378+__aicore__ inline void asc_copy_l12l0b_trans_sync(
379+ __cb__ half* dst, __cbuf__ half* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap,
380+ bool enable_addr_decrement, uint16_t dst_frac_gap);
381+ 
382+__aicore__ inline void asc_copy_l12l0b_trans_sync(
383+ __cb__ float* dst, __cbuf__ float* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap,
384+ bool enable_addr_decrement, uint16_t dst_frac_gap);
385+ 
386+__aicore__ inline void asc_copy_l12l0b_trans_sync(
387+ __cb__ int32_t* dst, __cbuf__ int32_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
388+ uint16_t dst_gap, bool enable_addr_decrement, uint16_t dst_frac_gap);
389+ 
390+__aicore__ inline void asc_copy_l12l0b_trans_sync(
391+ __cb__ int8_t* dst, __cbuf__ int8_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap,
392+ bool enable_addr_decrement, uint16_t dst_frac_gap);
393+ 
394+__aicore__ inline void asc_copy_l12l0b_trans_sync(
395+ __cb__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
396+ uint16_t dst_gap, bool enable_addr_decrement, uint16_t dst_frac_gap);
397+ 
398+__aicore__ inline void asc_copy_l12l0b_trans_sync(
399+ __cb__ uint8_t* dst, __cbuf__ uint8_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
400+ uint16_t dst_gap, bool enable_addr_decrement, uint16_t dst_frac_gap);
401+ 
402+__aicore__ inline void asc_copy_l0c2gm_sync(
403+ __gm__ half* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
404+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool channel_split,
405+ bool nz2nd_en);
406+ 
407+__aicore__ inline void asc_copy_l0c2gm_sync(
408+ __gm__ bfloat16_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
409+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool channel_split,
410+ bool nz2nd_en);
411+ 
412+__aicore__ inline void asc_copy_l0c2gm_sync(
413+ __gm__ int8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
414+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool channel_split,
415+ bool nz2nd_en);
416+ 
417+__aicore__ inline void asc_copy_l0c2gm_sync(
418+ __gm__ uint8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
419+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool channel_split,
420+ bool nz2nd_en);
421+ 
422+__aicore__ inline void asc_copy_l0c2gm_sync(
423+ __gm__ float* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
424+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool channel_split,
425+ bool nz2nd_en);
426+ 
427+__aicore__ inline void asc_copy_l0c2gm_sync(
428+ __gm__ half* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
429+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool channel_split,
430+ bool nz2nd_en);
431+ 
432+__aicore__ inline void asc_copy_l0c2gm_sync(
433+ __gm__ int16_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
434+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool channel_split,
435+ bool nz2nd_en);
436+ 
437+__aicore__ inline void asc_copy_l0c2gm_sync(
438+ __gm__ int8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
439+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool channel_split,
440+ bool nz2nd_en);
441+ 
442+__aicore__ inline void asc_copy_l0c2gm_sync(
443+ __gm__ int32_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride_dst_d,
444+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool channel_split,
445+ bool nz2nd_en);
446+ 
447+__aicore__ inline void asc_load_image_to_cbuf_sync(
448+ __cbuf__ half* dst, uint16_t hor_size, uint16_t ver_size, uint16_t hor_start_pos, uint16_t ver_start_pos,
449+ uint16_t src_hor_size, uint8_t top_pad_size, uint8_t bot_pad_size, uint16_t left_pad_size, uint16_t right_pad_size);
450+ 
451+__aicore__ inline void asc_load_image_to_cbuf_sync(
452+ __cbuf__ int8_t* dst, uint16_t hor_size, uint16_t ver_size, uint16_t hor_start_pos, uint16_t ver_start_pos,
453+ uint16_t src_hor_size, uint8_t top_pad_size, uint8_t bot_pad_size, uint16_t left_pad_size, uint16_t right_pad_size);
454+ 
455+__aicore__ inline void asc_copy_gm2l0b_sync(
456+ __cb__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride,
457+ uint16_t dst_gap);
458+ 
459+__aicore__ inline void asc_copy_gm2l0b_sync(
460+ __cb__ half* dst, __gm__ half* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
461+ 
462+__aicore__ inline void asc_copy_gm2l0b_sync(
463+ __cb__ float* dst, __gm__ float* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
464+ 
465+__aicore__ inline void asc_copy_gm2l0b_sync(
466+ __cb__ int32_t* dst, __gm__ int32_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
467+ 
468+__aicore__ inline void asc_copy_gm2l0b_sync(
469+ __cb__ int8_t* dst, __gm__ int8_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
470+ 
471+__aicore__ inline void asc_copy_gm2l0b_sync(
472+ __cb__ uint32_t* dst, __gm__ uint32_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride,
473+ uint16_t dst_gap);
474+ 
475+__aicore__ inline void asc_copy_gm2l0b_sync(
476+ __cb__ uint8_t* dst, __gm__ uint8_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
477+ 
478+__aicore__ inline void asc_copy_gm2l0b_sync(
479+ __cb__ int4b_t* dst, __gm__ int4b_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
480+ 
481+__aicore__ inline void asc_copy_gm2l0a_sync(
482+ __ca__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride,
483+ uint16_t dst_gap);
484+ 
485+__aicore__ inline void asc_copy_gm2l0a_sync(
486+ __ca__ half* dst, __gm__ half* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
487+ 
488+__aicore__ inline void asc_copy_gm2l0a_sync(
489+ __ca__ float* dst, __gm__ float* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
490+ 
491+__aicore__ inline void asc_copy_gm2l0a_sync(
492+ __ca__ int32_t* dst, __gm__ int32_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
493+ 
494+__aicore__ inline void asc_copy_gm2l0a_sync(
495+ __ca__ uint8_t* dst, __gm__ uint8_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
496+ 
497+__aicore__ inline void asc_copy_gm2l0a_sync(
498+ __ca__ int8_t* dst, __gm__ int8_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
499+ 
500+__aicore__ inline void asc_copy_gm2l0a_sync(
501+ __ca__ uint32_t* dst, __gm__ uint32_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride,
502+ uint16_t dst_gap);
503+ 
504+__aicore__ inline void asc_copy_gm2l0a_sync(
505+ __ca__ int4b_t* dst, __gm__ int4b_t* src, uint16_t base_idx, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap);
506+ 
507+__aicore__ inline void asc_copy_l0c2l1_sync(
508+ __cbuf__ half* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
509+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool enable_channel_split, bool enable_nz2nd);
510+ 
511+__aicore__ inline void asc_copy_l0c2l1_sync(
512+ __cbuf__ bfloat16_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
513+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool enable_channel_split,
514+ bool enable_nz2nd);
515+ 
516+__aicore__ inline void asc_copy_l0c2l1_sync(
517+ __cbuf__ int8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
518+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool enable_channel_split, bool enable_nz2nd);
519+ 
520+__aicore__ inline void asc_copy_l0c2l1_sync(
521+ __cbuf__ half* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
522+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool enable_channel_split, bool enable_nz2nd);
523+ 
524+__aicore__ inline void asc_copy_l0c2l1_sync(
525+ __cbuf__ int16_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
526+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool enable_channel_split,
527+ bool enable_nz2nd);
528+ 
529+__aicore__ inline void asc_copy_l0c2l1_sync(
530+ __cbuf__ int8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
531+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool enable_channel_split,
532+ bool enable_nz2nd);
533+ 
534+__aicore__ inline void asc_copy_l0c2l1_sync(
535+ __cbuf__ uint8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
536+ uint16_t src_stride, uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool enable_channel_split,
537+ bool enable_nz2nd);
538+ 
539+__aicore__ inline void asc_copy_l0c2l1_sync(
540+ __cbuf__ void* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
541+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool enable_channel_split, bool enable_nz2nd);
542+ 
543+__aicore__ inline void asc_copy_l0c2l1_sync(
544+ __cbuf__ void* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
545+ uint8_t unit_flag_mode, uint64_t quant_pre, uint8_t relu_pre, bool enable_channel_split, bool enable_nz2nd);
546+ 
547+__aicore__ inline void asc_copy_l12l0a_mx_sync(
548+ uint64_t dst, __cbuf__ fp8_e8m0_t* src, uint16_t x_start_pos, uint16_t y_start_pos, uint8_t x_step, uint8_t y_step,
549+ uint16_t src_stride, uint16_t dst_stride);
550+ 
551+__aicore__ inline void asc_copy_l12l0b_mx_sync(
552+ uint64_t dst, __cbuf__ fp8_e8m0_t* src, uint16_t x_start_pos, uint16_t y_start_pos, uint8_t x_step, uint8_t y_step,
553+ uint16_t src_stride, uint16_t dst_stride);
554+ 
555+__aicore__ inline void asc_copy_l12l0a_sync(
556+ __ca__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t m_start_position, uint16_t k_start_position,
557+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
558+ 
559+__aicore__ inline void asc_copy_l12l0a_sync(
560+ __ca__ fp8_e4m3fn_t* dst, __cbuf__ fp8_e4m3fn_t* src, uint16_t m_start_position, uint16_t k_start_position,
561+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
562+ 
563+__aicore__ inline void asc_copy_l12l0a_sync(
564+ __ca__ fp8_e5m2_t* dst, __cbuf__ fp8_e5m2_t* src, uint16_t m_start_position, uint16_t k_start_position,
565+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
566+ 
567+__aicore__ inline void asc_copy_l12l0a_sync(
568+ __ca__ half* dst, __cbuf__ half* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
569+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
570+ 
571+__aicore__ inline void asc_copy_l12l0a_sync(
572+ __ca__ float* dst, __cbuf__ float* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
573+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
574+ 
575+__aicore__ inline void asc_copy_l12l0a_sync(
576+ __ca__ hifloat8_t* dst, __cbuf__ hifloat8_t* src, uint16_t m_start_position, uint16_t k_start_position,
577+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
578+ 
579+__aicore__ inline void asc_copy_l12l0a_sync(
580+ __ca__ int16_t* dst, __cbuf__ int16_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
581+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
582+ 
583+__aicore__ inline void asc_copy_l12l0a_sync(
584+ __ca__ int32_t* dst, __cbuf__ int32_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
585+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
586+ 
587+__aicore__ inline void asc_copy_l12l0a_sync(
588+ __ca__ int8_t* dst, __cbuf__ int8_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
589+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
590+ 
591+__aicore__ inline void asc_copy_l12l0a_sync(
592+ __ca__ uint16_t* dst, __cbuf__ uint16_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
593+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
594+ 
595+__aicore__ inline void asc_copy_l12l0a_sync(
596+ __ca__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
597+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
598+ 
599+__aicore__ inline void asc_copy_l12l0a_sync(
600+ __ca__ uint8_t* dst, __cbuf__ uint8_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
601+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
602+ 
603+__aicore__ inline void asc_copy_l12l0a_sync(
604+ __ca__ int4b_t* dst, __cbuf__ int4b_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
605+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
606+ 
607+__aicore__ inline void asc_copy_l12l0a_sync(
608+ __ca__ fp4x2_e2m1_t* dst, __cbuf__ fp4x2_e2m1_t* src, uint16_t m_start_position, uint16_t k_start_position,
609+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
610+ 
611+__aicore__ inline void asc_copy_l12l0a_sync(
612+ __ca__ fp4x2_e1m2_t* dst, __cbuf__ fp4x2_e1m2_t* src, uint16_t m_start_position, uint16_t k_start_position,
613+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
614+ 
615+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
616+ __ca__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t m_start_position, uint16_t k_start_position,
617+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
618+ 
619+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
620+ __ca__ fp8_e4m3fn_t* dst, __cbuf__ fp8_e4m3fn_t* src, uint16_t m_start_position, uint16_t k_start_position,
621+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
622+ 
623+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
624+ __ca__ fp8_e5m2_t* dst, __cbuf__ fp8_e5m2_t* src, uint16_t m_start_position, uint16_t k_start_position,
625+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
626+ 
627+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
628+ __ca__ half* dst, __cbuf__ half* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
629+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
630+ 
631+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
632+ __ca__ float* dst, __cbuf__ float* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
633+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
634+ 
635+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
636+ __ca__ hifloat8_t* dst, __cbuf__ hifloat8_t* src, uint16_t m_start_position, uint16_t k_start_position,
637+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
638+ 
639+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
640+ __ca__ int16_t* dst, __cbuf__ int16_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
641+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
642+ 
643+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
644+ __ca__ int32_t* dst, __cbuf__ int32_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
645+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
646+ 
647+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
648+ __ca__ int8_t* dst, __cbuf__ int8_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
649+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
650+ 
651+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
652+ __ca__ uint16_t* dst, __cbuf__ uint16_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
653+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
654+ 
655+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
656+ __ca__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
657+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
658+ 
659+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
660+ __ca__ uint8_t* dst, __cbuf__ uint8_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
661+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
662+ 
663+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
664+ __ca__ int4b_t* dst, __cbuf__ int4b_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
665+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
666+ 
667+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
668+ __ca__ fp4x2_e2m1_t* dst, __cbuf__ fp4x2_e2m1_t* src, uint16_t m_start_position, uint16_t k_start_position,
669+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
670+ 
671+__aicore__ inline void asc_copy_l12l0a_transpose_sync(
672+ __ca__ fp4x2_e1m2_t* dst, __cbuf__ fp4x2_e1m2_t* src, uint16_t m_start_position, uint16_t k_start_position,
673+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
674+ 
675+__aicore__ inline void asc_copy_l12l0b_sync(
676+ __cb__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t m_start_position, uint16_t k_start_position,
677+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
678+ 
679+__aicore__ inline void asc_copy_l12l0b_sync(
680+ __cb__ fp8_e4m3fn_t* dst, __cbuf__ fp8_e4m3fn_t* src, uint16_t m_start_position, uint16_t k_start_position,
681+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
682+ 
683+__aicore__ inline void asc_copy_l12l0b_sync(
684+ __cb__ fp8_e5m2_t* dst, __cbuf__ fp8_e5m2_t* src, uint16_t m_start_position, uint16_t k_start_position,
685+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
686+ 
687+__aicore__ inline void asc_copy_l12l0b_sync(
688+ __cb__ half* dst, __cbuf__ half* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
689+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
690+ 
691+__aicore__ inline void asc_copy_l12l0b_sync(
692+ __cb__ float* dst, __cbuf__ float* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
693+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
694+ 
695+__aicore__ inline void asc_copy_l12l0b_sync(
696+ __cb__ hifloat8_t* dst, __cbuf__ hifloat8_t* src, uint16_t m_start_position, uint16_t k_start_position,
697+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
698+ 
699+__aicore__ inline void asc_copy_l12l0b_sync(
700+ __cb__ int16_t* dst, __cbuf__ int16_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
701+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
702+ 
703+__aicore__ inline void asc_copy_l12l0b_sync(
704+ __cb__ int32_t* dst, __cbuf__ int32_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
705+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
706+ 
707+__aicore__ inline void asc_copy_l12l0b_sync(
708+ __cb__ int8_t* dst, __cbuf__ int8_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
709+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
710+ 
711+__aicore__ inline void asc_copy_l12l0b_sync(
712+ __cb__ uint16_t* dst, __cbuf__ uint16_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
713+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
714+ 
715+__aicore__ inline void asc_copy_l12l0b_sync(
716+ __cb__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
717+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
718+ 
719+__aicore__ inline void asc_copy_l12l0b_sync(
720+ __cb__ uint8_t* dst, __cbuf__ uint8_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
721+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
722+ 
723+__aicore__ inline void asc_copy_l12l0b_sync(
724+ __cb__ int4b_t* dst, __cbuf__ int4b_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
725+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
726+ 
727+__aicore__ inline void asc_copy_l12l0b_sync(
728+ __cb__ fp4x2_e2m1_t* dst, __cbuf__ fp4x2_e2m1_t* src, uint16_t m_start_position, uint16_t k_start_position,
729+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
730+ 
731+__aicore__ inline void asc_copy_l12l0b_sync(
732+ __cb__ fp4x2_e1m2_t* dst, __cbuf__ fp4x2_e1m2_t* src, uint16_t m_start_position, uint16_t k_start_position,
733+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
734+ 
735+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
736+ __cb__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t m_start_position, uint16_t k_start_position,
737+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
738+ 
739+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
740+ __cb__ fp8_e4m3fn_t* dst, __cbuf__ fp8_e4m3fn_t* src, uint16_t m_start_position, uint16_t k_start_position,
741+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
742+ 
743+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
744+ __cb__ fp8_e5m2_t* dst, __cbuf__ fp8_e5m2_t* src, uint16_t m_start_position, uint16_t k_start_position,
745+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
746+ 
747+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
748+ __cb__ half* dst, __cbuf__ half* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
749+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
750+ 
751+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
752+ __cb__ float* dst, __cbuf__ float* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
753+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
754+ 
755+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
756+ __cb__ hifloat8_t* dst, __cbuf__ hifloat8_t* src, uint16_t m_start_position, uint16_t k_start_position,
757+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
758+ 
759+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
760+ __cb__ int16_t* dst, __cbuf__ int16_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
761+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
762+ 
763+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
764+ __cb__ int32_t* dst, __cbuf__ int32_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
765+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
766+ 
767+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
768+ __cb__ int8_t* dst, __cbuf__ int8_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
769+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
770+ 
771+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
772+ __cb__ uint16_t* dst, __cbuf__ uint16_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
773+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
774+ 
775+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
776+ __cb__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
777+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
778+ 
779+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
780+ __cb__ uint8_t* dst, __cbuf__ uint8_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
781+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
782+ 
783+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
784+ __cb__ int4b_t* dst, __cbuf__ int4b_t* src, uint16_t m_start_position, uint16_t k_start_position, uint8_t m_step,
785+ uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
786+ 
787+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
788+ __cb__ fp4x2_e2m1_t* dst, __cbuf__ fp4x2_e2m1_t* src, uint16_t m_start_position, uint16_t k_start_position,
789+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
790+ 
791+__aicore__ inline void asc_copy_l12l0b_transpose_sync(
792+ __cb__ fp4x2_e1m2_t* dst, __cbuf__ fp4x2_e1m2_t* src, uint16_t m_start_position, uint16_t k_start_position,
793+ uint8_t m_step, uint8_t k_step, int16_t src_stride, uint16_t dst_stride);
794+ 
795+__aicore__ inline void asc_copy_l12l0b_trans_sync(
796+ __cb__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
797+ uint16_t dst_gap, uint16_t dst_frac_gap, uint16_t src_frac_gap);
798+ 
799+__aicore__ inline void asc_copy_l12l0b_trans_sync(
800+ __cb__ fp8_e4m3fn_t* dst, __cbuf__ fp8_e4m3fn_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
801+ uint16_t dst_gap, uint16_t dst_frac_gap, uint16_t src_frac_gap);
802+ 
803+__aicore__ inline void asc_copy_l12l0b_trans_sync(
804+ __cb__ fp8_e5m2_t* dst, __cbuf__ fp8_e5m2_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
805+ uint16_t dst_gap, uint16_t dst_frac_gap, uint16_t src_frac_gap);
806+ 
807+__aicore__ inline void asc_copy_l12l0b_trans_sync(
808+ __cb__ half* dst, __cbuf__ half* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap,
809+ uint16_t dst_frac_gap, uint16_t src_frac_gap);
810+ 
811+__aicore__ inline void asc_copy_l12l0b_trans_sync(
812+ __cb__ float* dst, __cbuf__ float* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap,
813+ uint16_t dst_frac_gap, uint16_t src_frac_gap);
814+ 
815+__aicore__ inline void asc_copy_l12l0b_trans_sync(
816+ __cb__ hifloat8_t* dst, __cbuf__ hifloat8_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
817+ uint16_t dst_gap, uint16_t dst_frac_gap, uint16_t src_frac_gap);
818+ 
819+__aicore__ inline void asc_copy_l12l0b_trans_sync(
820+ __cb__ int32_t* dst, __cbuf__ int32_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
821+ uint16_t dst_gap, uint16_t dst_frac_gap, uint16_t src_frac_gap);
822+ 
823+__aicore__ inline void asc_copy_l12l0b_trans_sync(
824+ __cb__ int8_t* dst, __cbuf__ int8_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride, uint16_t dst_gap,
825+ uint16_t dst_frac_gap, uint16_t src_frac_gap);
826+ 
827+__aicore__ inline void asc_copy_l12l0b_trans_sync(
828+ __cb__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
829+ uint16_t dst_gap, uint16_t dst_frac_gap, uint16_t src_frac_gap);
830+ 
831+__aicore__ inline void asc_copy_l12l0b_trans_sync(
832+ __cb__ uint8_t* dst, __cbuf__ uint8_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
833+ uint16_t dst_gap, uint16_t dst_frac_gap, uint16_t src_frac_gap);
834+ 
835+__aicore__ inline void asc_copy_l12l0b_trans_sync(
836+ __cb__ fp4x2_e1m2_t* dst, __cbuf__ fp4x2_e1m2_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
837+ uint16_t dst_gap, uint16_t dst_frac_gap, uint16_t src_frac_gap);
838+ 
839+__aicore__ inline void asc_copy_l12l0b_trans_sync(
840+ __cb__ fp4x2_e2m1_t* dst, __cbuf__ fp4x2_e2m1_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
841+ uint16_t dst_gap, uint16_t dst_frac_gap, uint16_t src_frac_gap);
842+ 
843+__aicore__ inline void asc_copy_l12l0b_trans_sync(
844+ __cb__ int4b_t* dst, __cbuf__ int4b_t* src, uint16_t index_id, uint8_t repeat, uint16_t src_stride,
845+ uint16_t dst_gap, uint16_t dst_frac_gap, uint16_t src_frac_gap);
846+ 
847+__aicore__ inline void asc_copy_l12gm_sync(
848+ __gm__ void* dst, __cbuf__ void* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);
849+ 
850+__aicore__ inline void asc_copy_l12l0c_sync(
851+ __cc__ bfloat16_t* dst, __cbuf__ bfloat16_t* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap,
852+ uint16_t dst_gap);
853+ 
854+__aicore__ inline void asc_copy_l12l0c_sync(
855+ __cc__ half* dst, __cbuf__ half* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);
856+ 
857+__aicore__ inline void asc_copy_l12l0c_sync(
858+ __cc__ half* dst, __cbuf__ float* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);
859+ 
860+__aicore__ inline void asc_copy_l12l0c_sync(
861+ __cc__ bfloat16_t* dst, __cbuf__ float* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap,
862+ uint16_t dst_gap);
863+ 
864+__aicore__ inline void asc_copy_l12l0c_sync(
865+ __cc__ float* dst, __cbuf__ float* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap, uint16_t dst_gap);
866+ 
867+__aicore__ inline void asc_copy_l12l0c_sync(
868+ __cc__ int32_t* dst, __cbuf__ int32_t* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap,
869+ uint16_t dst_gap);
870+ 
871+__aicore__ inline void asc_copy_l12l0c_sync(
872+ __cc__ uint32_t* dst, __cbuf__ uint32_t* src, uint16_t n_burst, uint16_t len_burst, uint16_t src_gap,
873+ uint16_t dst_gap);
874+ 
875+__aicore__ inline void asc_copy_l12l0a_sync(
876+ __ca__ fp8_e4m3fn_t* dst, __cbuf__ fp8_e4m3fn_t* src, uint16_t k_extension, uint16_t m_extension,
877+ uint16_t k_start_pt, uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
878+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
879+ bool f_matrix_ctrl, uint16_t channel_size);
880+ 
881+__aicore__ inline void asc_copy_l12l0a_sync(
882+ __ca__ fp8_e5m2_t* dst, __cbuf__ fp8_e5m2_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
883+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
884+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
885+ bool f_matrix_ctrl, uint16_t channel_size);
886+ 
887+__aicore__ inline void asc_copy_l12l0a_sync(
888+ __ca__ hifloat8_t* dst, __cbuf__ hifloat8_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
889+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
890+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
891+ bool f_matrix_ctrl, uint16_t channel_size);
892+ 
893+__aicore__ inline void asc_copy_l12l0a_sync(
894+ __ca__ int16_t* dst, __cbuf__ int16_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
895+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
896+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
897+ bool f_matrix_ctrl, uint16_t channel_size);
898+ 
899+__aicore__ inline void asc_copy_l12l0a_sync(
900+ __ca__ uint16_t* dst, __cbuf__ uint16_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
901+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
902+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
903+ bool f_matrix_ctrl, uint16_t channel_size);
904+ 
905+__aicore__ inline void asc_copy_l12l0b_sync(
906+ __cb__ fp8_e4m3fn_t* dst, __cbuf__ fp8_e4m3fn_t* src, uint16_t k_extension, uint16_t m_extension,
907+ uint16_t k_start_pt, uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
908+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
909+ bool f_matrix_ctrl, uint16_t channel_size);
910+ 
911+__aicore__ inline void asc_copy_l12l0b_sync(
912+ __cb__ fp8_e5m2_t* dst, __cbuf__ fp8_e5m2_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
913+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
914+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
915+ bool f_matrix_ctrl, uint16_t channel_size);
916+ 
917+__aicore__ inline void asc_copy_l12l0b_sync(
918+ __cb__ hifloat8_t* dst, __cbuf__ hifloat8_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
919+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
920+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
921+ bool f_matrix_ctrl, uint16_t channel_size);
922+ 
923+__aicore__ inline void asc_copy_l12l0b_sync(
924+ __cb__ int8_t* dst, __cbuf__ int8_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
925+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
926+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
927+ bool f_matrix_ctrl, uint16_t channel_size);
928+ 
929+__aicore__ inline void asc_copy_l12l0b_sync(
930+ __cb__ uint8_t* dst, __cbuf__ uint8_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
931+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
932+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
933+ bool f_matrix_ctrl, uint16_t channel_size);
934+ 
935+__aicore__ inline void asc_copy_l12l0b_sync(
936+ __cb__ int16_t* dst, __cbuf__ int16_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
937+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
938+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
939+ bool f_matrix_ctrl, uint16_t channel_size);
940+ 
941+__aicore__ inline void asc_copy_l12l0b_sync(
942+ __cb__ uint16_t* dst, __cbuf__ uint16_t* src, uint16_t k_extension, uint16_t m_extension, uint16_t k_start_pt,
943+ uint16_t m_start_pt, uint8_t stride_w, uint8_t stride_h, uint8_t filter_w, uint8_t filter_h,
944+ uint8_t dilation_filter_w, uint8_t dilation_filter_h, bool filter_size_w, bool filter_size_h, bool transpose,
945+ bool f_matrix_ctrl, uint16_t channel_size);
946+ 
947+__aicore__ inline void asc_copy_gm2l1_align_sync(
948+ __cbuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint32_t n_burst, uint32_t len_burst, uint8_t left_padding_count,
949+ uint8_t right_padding_count, bool data_select_bit, uint8_t l2_cache_ctl, uint64_t burst_src_stride,
950+ uint32_t burst_dst_stride);
951+ 
952+__aicore__ inline void asc_copy_gm2l1_align_sync(
953+ __cbuf__ half* dst, __gm__ half* src, uint32_t n_burst, uint32_t len_burst, uint8_t left_padding_count,
954+ uint8_t right_padding_count, bool data_select_bit, uint8_t l2_cache_ctl, uint64_t burst_src_stride,
955+ uint32_t burst_dst_stride);
956+ 
957+__aicore__ inline void asc_copy_gm2l1_align_sync(
958+ __cbuf__ float* dst, __gm__ float* src, uint32_t n_burst, uint32_t len_burst, uint8_t left_padding_count,
959+ uint8_t right_padding_count, bool data_select_bit, uint8_t l2_cache_ctl, uint64_t burst_src_stride,
960+ uint32_t burst_dst_stride);
961+ 
962+__aicore__ inline void asc_copy_gm2l1_align_sync(
963+ __cbuf__ hifloat8_t* dst, __gm__ hifloat8_t* src, uint32_t n_burst, uint32_t len_burst, uint8_t left_padding_count,
964+ uint8_t right_padding_count, bool data_select_bit, uint8_t l2_cache_ctl, uint64_t burst_src_stride,
965+ uint32_t burst_dst_stride);
966+ 
967+__aicore__ inline void asc_copy_gm2l1_align_sync(
968+ __cbuf__ int16_t* dst, __gm__ int16_t* src, uint32_t n_burst, uint32_t len_burst, uint8_t left_padding_count,
969+ uint8_t right_padding_count, bool data_select_bit, uint8_t l2_cache_ctl, uint64_t burst_src_stride,
970+ uint32_t burst_dst_stride);
971+ 
972+__aicore__ inline void asc_copy_gm2l1_align_sync(
973+ __cbuf__ int32_t* dst, __gm__ int32_t* src, uint32_t n_burst, uint32_t len_burst, uint8_t left_padding_count,
974+ uint8_t right_padding_count, bool data_select_bit, uint8_t l2_cache_ctl, uint64_t burst_src_stride,
975+ uint32_t burst_dst_stride);
976+ 
977+__aicore__ inline void asc_copy_gm2l1_align_sync(
978+ __cbuf__ int8_t* dst, __gm__ int8_t* src, uint32_t n_burst, uint32_t len_burst, uint8_t left_padding_count,
979+ uint8_t right_padding_count, bool data_select_bit, uint8_t l2_cache_ctl, uint64_t burst_src_stride,
980+ uint32_t burst_dst_stride);
981+ 
982+__aicore__ inline void asc_copy_gm2l1_align_sync(
983+ __cbuf__ uint16_t* dst, __gm__ uint16_t* src, uint32_t n_burst, uint32_t len_burst, uint8_t left_padding_count,
984+ uint8_t right_padding_count, bool data_select_bit, uint8_t l2_cache_ctl, uint64_t burst_src_stride,
985+ uint32_t burst_dst_stride);
986+ 
987+__aicore__ inline void asc_copy_gm2l1_align_sync(
988+ __cbuf__ uint32_t* dst, __gm__ uint32_t* src, uint32_t n_burst, uint32_t len_burst, uint8_t left_padding_count,
989+ uint8_t right_padding_count, bool data_select_bit, uint8_t l2_cache_ctl, uint64_t burst_src_stride,
990+ uint32_t burst_dst_stride);
991+ 
992+__aicore__ inline void asc_copy_gm2l1_align_sync(
993+ __cbuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t n_burst, uint32_t len_burst, uint8_t left_padding_count,
994+ uint8_t right_padding_count, bool data_select_bit, uint8_t l2_cache_ctl, uint64_t burst_src_stride,
995+ uint32_t burst_dst_stride);
996+ 
997+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
998+ __cbuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
999+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1000+ 
1001+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
1002+ __cbuf__ fp8_e4m3fn_t* dst, __gm__ fp8_e4m3fn_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl,
1003+ uint16_t n_value, uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1004+ 
1005+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
1006+ __cbuf__ fp8_e5m2_t* dst, __gm__ fp8_e5m2_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1007+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1008+ 
1009+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
1010+ __cbuf__ half* dst, __gm__ half* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1011+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1012+ 
1013+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
1014+ __cbuf__ float* dst, __gm__ float* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1015+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1016+ 
1017+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
1018+ __cbuf__ hifloat8_t* dst, __gm__ hifloat8_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1019+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1020+ 
1021+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
1022+ __cbuf__ int16_t* dst, __gm__ int16_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1023+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1024+ 
1025+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
1026+ __cbuf__ int32_t* dst, __gm__ int32_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1027+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1028+ 
1029+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
1030+ __cbuf__ int8_t* dst, __gm__ int8_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1031+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1032+ 
1033+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
1034+ __cbuf__ uint16_t* dst, __gm__ uint16_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1035+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1036+ 
1037+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
1038+ __cbuf__ uint32_t* dst, __gm__ uint32_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1039+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1040+ 
1041+__aicore__ inline void asc_copy_gm2l1_dn2nz_sync(
1042+ __cbuf__ uint8_t* dst, __gm__ uint8_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1043+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1044+ 
1045+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1046+ __cbuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1047+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1048+ 
1049+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1050+ __cbuf__ fp8_e4m3fn_t* dst, __gm__ fp8_e4m3fn_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl,
1051+ uint16_t n_value, uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1052+ 
1053+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1054+ __cbuf__ fp8_e5m2_t* dst, __gm__ fp8_e5m2_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1055+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1056+ 
1057+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1058+ __cbuf__ half* dst, __gm__ half* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1059+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1060+ 
1061+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1062+ __cbuf__ float* dst, __gm__ float* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1063+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1064+ 
1065+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1066+ __cbuf__ hifloat8_t* dst, __gm__ hifloat8_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1067+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1068+ 
1069+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1070+ __cbuf__ int16_t* dst, __gm__ int16_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1071+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1072+ 
1073+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1074+ __cbuf__ int32_t* dst, __gm__ int32_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1075+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1076+ 
1077+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1078+ __cbuf__ int8_t* dst, __gm__ int8_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1079+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1080+ 
1081+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1082+ __cbuf__ uint16_t* dst, __gm__ uint16_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1083+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1084+ 
1085+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1086+ __cbuf__ uint32_t* dst, __gm__ uint32_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1087+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1088+ 
1089+__aicore__ inline void asc_copy_gm2l1_nd2nz_sync(
1090+ __cbuf__ uint8_t* dst, __gm__ uint8_t* src, uint64_t loop1_src_stride, uint8_t l2_cache_ctl, uint16_t n_value,
1091+ uint32_t d_value, uint64_t loop4_src_stride, bool smallc0_en);
1092+ 
1093+__aicore__ inline void asc_copy_gm2l1_sync(
1094+ __cbuf__ void* dst, __gm__ void* src, uint32_t n_burst, uint32_t len_burst, uint8_t pad_func_mode,
1095+ uint64_t src_stride, uint32_t dst_stride);
1096+ 
1097+__aicore__ inline void asc_copy_l12bt_sync(uint64_t dst, __cbuf__ bfloat16_t* src, uint32_t size);
1098+ 
1099+__aicore__ inline void asc_copy_l12bt_sync(uint64_t dst, __cbuf__ half* src, uint32_t size);
1100+ 
1101+__aicore__ inline void asc_copy_l12bt_sync(uint64_t dst, __cbuf__ float* src, uint32_t size);
1102+ 
1103+__aicore__ inline void asc_copy_l12bt_sync(uint64_t dst, __cbuf__ int32_t* src, uint32_t size);
1104+ 
1105+__aicore__ inline void asc_copy_l12ub_sync(
1106+ __ubuf__ void* dst_addr, __cbuf__ void* src_addr, bool sub_blockid, uint16_t n_burst, uint16_t len_burst,
1107+ uint16_t src_gap, uint16_t dst_gap);
1108+ 
1109+__aicore__ inline void asc_copy_l0c2l1_sync(
1110+ __cbuf__ int4b_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1111+ uint16_t src_stride, uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1112+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1113+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1114+ bool enable_nz2dn);
1115+ 
1116+__aicore__ inline void asc_copy_l0c2l1_sync(
1117+ __cbuf__ int4b_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1118+ uint16_t src_stride, uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1119+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1120+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1121+ bool enable_nz2dn);
1122+ 
1123+__aicore__ inline void asc_copy_l0c2gm_sync(
1124+ __gm__ bfloat16_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1125+ uint16_t src_stride, uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1126+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1127+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1128+ bool enable_nz2dn);
1129+ 
1130+__aicore__ inline void asc_copy_l0c2gm_sync(
1131+ __gm__ half* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
1132+ uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode, uint64_t quant_pre_mode,
1133+ uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post, uint8_t relu_post,
1134+ bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1135+ bool enable_nz2dn);
1136+ 
1137+__aicore__ inline void asc_copy_l0c2gm_sync(
1138+ __gm__ fp8_e4m3fn_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1139+ uint16_t src_stride, uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1140+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1141+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1142+ bool enable_nz2dn);
1143+ 
1144+__aicore__ inline void asc_copy_l0c2gm_sync(
1145+ __gm__ hifloat8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1146+ uint16_t src_stride, uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1147+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1148+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1149+ bool enable_nz2dn);
1150+ 
1151+__aicore__ inline void asc_copy_l0c2gm_sync(
1152+ __gm__ int8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
1153+ uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode, uint64_t quant_pre_mode,
1154+ uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post, uint8_t relu_post,
1155+ bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1156+ bool enable_nz2dn);
1157+ 
1158+__aicore__ inline void asc_copy_l0c2gm_sync(
1159+ __gm__ uint8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
1160+ uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode, uint64_t quant_pre_mode,
1161+ uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post, uint8_t relu_post,
1162+ bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1163+ bool enable_nz2dn);
1164+ 
1165+__aicore__ inline void asc_copy_l0c2gm_sync(
1166+ __gm__ float* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
1167+ uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode, uint64_t quant_pre_mode,
1168+ uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post, uint8_t relu_post,
1169+ bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1170+ bool enable_nz2dn);
1171+ 
1172+__aicore__ inline void asc_copy_l0c2gm_sync(
1173+ __gm__ bfloat16_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1174+ uint16_t src_stride, uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1175+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1176+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1177+ bool enable_nz2dn);
1178+ 
1179+__aicore__ inline void asc_copy_l0c2gm_sync(
1180+ __gm__ half* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
1181+ uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode, uint64_t quant_pre_mode,
1182+ uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post, uint8_t relu_post,
1183+ bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1184+ bool enable_nz2dn);
1185+ 
1186+__aicore__ inline void asc_copy_l0c2gm_sync(
1187+ __gm__ int8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
1188+ uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode, uint64_t quant_pre_mode,
1189+ uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post, uint8_t relu_post,
1190+ bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1191+ bool enable_nz2dn);
1192+ 
1193+__aicore__ inline void asc_copy_l0c2gm_sync(
1194+ __gm__ uint8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1195+ uint16_t src_stride, uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1196+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1197+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1198+ bool enable_nz2dn);
1199+ 
1200+__aicore__ inline void asc_copy_l0c2gm_sync(
1201+ __gm__ int32_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1202+ uint16_t src_stride, uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1203+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1204+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1205+ bool enable_nz2dn);
1206+ 
1207+__aicore__ inline void asc_copy_l0c2gm_sync(
1208+ __gm__ int4b_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
1209+ uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode, uint64_t quant_pre_mode,
1210+ uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post, uint8_t relu_post,
1211+ bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1212+ bool enable_nz2dn);
1213+ 
1214+__aicore__ inline void asc_copy_l0c2gm_sync(
1215+ __gm__ int4b_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1216+ uint16_t src_stride, uint8_t l2_cache_mode, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1217+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1218+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1219+ bool enable_nz2dn);
1220+ 
1221+__aicore__ inline void asc_copy_l0c2ub_sync(
1222+ __ubuf__ bfloat16_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1223+ uint16_t src_stride, uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1224+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1225+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1226+ bool enable_nz2dn);
1227+ 
1228+__aicore__ inline void asc_copy_l0c2ub_sync(
1229+ __ubuf__ half* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
1230+ uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1231+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1232+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1233+ bool enable_nz2dn);
1234+ 
1235+__aicore__ inline void asc_copy_l0c2ub_sync(
1236+ __ubuf__ fp8_e4m3fn_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1237+ uint16_t src_stride, uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1238+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1239+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1240+ bool enable_nz2dn);
1241+ 
1242+__aicore__ inline void asc_copy_l0c2ub_sync(
1243+ __ubuf__ hifloat8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1244+ uint16_t src_stride, uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1245+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1246+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1247+ bool enable_nz2dn);
1248+ 
1249+__aicore__ inline void asc_copy_l0c2ub_sync(
1250+ __ubuf__ int8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
1251+ uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1252+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1253+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1254+ bool enable_nz2dn);
1255+ 
1256+__aicore__ inline void asc_copy_l0c2ub_sync(
1257+ __ubuf__ uint8_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1258+ uint16_t src_stride, uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1259+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1260+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1261+ bool enable_nz2dn);
1262+ 
1263+__aicore__ inline void asc_copy_l0c2ub_sync(
1264+ __ubuf__ float* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
1265+ uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1266+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1267+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1268+ bool enable_nz2dn);
1269+ 
1270+__aicore__ inline void asc_copy_l0c2ub_sync(
1271+ __ubuf__ bfloat16_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1272+ uint16_t src_stride, uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1273+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1274+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1275+ bool enable_nz2dn);
1276+ 
1277+__aicore__ inline void asc_copy_l0c2ub_sync(
1278+ __ubuf__ half* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride, uint16_t src_stride,
1279+ uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1280+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1281+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1282+ bool enable_nz2dn);
1283+ 
1284+__aicore__ inline void asc_copy_l0c2ub_sync(
1285+ __ubuf__ int8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1286+ uint16_t src_stride, uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1287+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1288+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1289+ bool enable_nz2dn);
1290+ 
1291+__aicore__ inline void asc_copy_l0c2ub_sync(
1292+ __ubuf__ uint8_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1293+ uint16_t src_stride, uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1294+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1295+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1296+ bool enable_nz2dn);
1297+ 
1298+__aicore__ inline void asc_copy_l0c2ub_sync(
1299+ __ubuf__ int32_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1300+ uint16_t src_stride, uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1301+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1302+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1303+ bool enable_nz2dn);
1304+ 
1305+__aicore__ inline void asc_copy_l0c2ub_sync(
1306+ __ubuf__ int4b_t* dst, __cc__ float* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1307+ uint16_t src_stride, uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1308+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1309+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1310+ bool enable_nz2dn);
1311+ 
1312+__aicore__ inline void asc_copy_l0c2ub_sync(
1313+ __ubuf__ int4b_t* dst, __cc__ int32_t* src, uint16_t n_size, uint16_t m_size, uint32_t dst_stride,
1314+ uint16_t src_stride, uint8_t dual_dst_ctrl, bool sub_blockid, uint8_t enable_clip_relu_pre, uint8_t unit_flag_mode,
1315+ uint64_t quant_pre_mode, uint8_t relu_pre_mode, bool enable_channel_split, bool enable_nz2nd, uint64_t quant_post,
1316+ uint8_t relu_post, bool clip_relu_post, uint8_t eltwise_op, bool eltwise_antq_en, bool c0_pad_en, bool broadcast_en,
1317+ bool enable_nz2dn);
1318+ 
1319+__aicore__ inline void asc_copy_gm2l1_sync(
1320+ __cbuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint32_t m_start_position, uint32_t k_start_position,
1321+ uint16_t dst_stride, uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1322+ 
1323+__aicore__ inline void asc_copy_gm2l1_sync(
1324+ __cbuf__ float* dst, __gm__ float* src, uint32_t m_start_position, uint32_t k_start_position, uint16_t dst_stride,
1325+ uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1326+ 
1327+__aicore__ inline void asc_copy_gm2l1_sync(
1328+ __cbuf__ fp8_e4m3fn_t* dst, __gm__ fp8_e4m3fn_t* src, uint32_t m_start_position, uint32_t k_start_position,
1329+ uint16_t dst_stride, uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1330+ 
1331+__aicore__ inline void asc_copy_gm2l1_sync(
1332+ __cbuf__ fp8_e5m2_t* dst, __gm__ fp8_e5m2_t* src, uint32_t m_start_position, uint32_t k_start_position,
1333+ uint16_t dst_stride, uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1334+ 
1335+__aicore__ inline void asc_copy_gm2l1_sync(
1336+ __cbuf__ half* dst, __gm__ half* src, uint32_t m_start_position, uint32_t k_start_position, uint16_t dst_stride,
1337+ uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1338+ 
1339+__aicore__ inline void asc_copy_gm2l1_sync(
1340+ __cbuf__ hifloat8_t* dst, __gm__ hifloat8_t* src, uint32_t m_start_position, uint32_t k_start_position,
1341+ uint16_t dst_stride, uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1342+ 
1343+__aicore__ inline void asc_copy_gm2l1_sync(
1344+ __cbuf__ int16_t* dst, __gm__ int16_t* src, uint32_t m_start_position, uint32_t k_start_position,
1345+ uint16_t dst_stride, uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1346+ 
1347+__aicore__ inline void asc_copy_gm2l1_sync(
1348+ __cbuf__ int32_t* dst, __gm__ int32_t* src, uint32_t m_start_position, uint32_t k_start_position,
1349+ uint16_t dst_stride, uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1350+ 
1351+__aicore__ inline void asc_copy_gm2l1_sync(
1352+ __cbuf__ int8_t* dst, __gm__ int8_t* src, uint32_t m_start_position, uint32_t k_start_position, uint16_t dst_stride,
1353+ uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1354+ 
1355+__aicore__ inline void asc_copy_gm2l1_sync(
1356+ __cbuf__ uint16_t* dst, __gm__ uint16_t* src, uint32_t m_start_position, uint32_t k_start_position,
1357+ uint16_t dst_stride, uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1358+ 
1359+__aicore__ inline void asc_copy_gm2l1_sync(
1360+ __cbuf__ uint32_t* dst, __gm__ uint32_t* src, uint32_t m_start_position, uint32_t k_start_position,
1361+ uint16_t dst_stride, uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1362+ 
1363+__aicore__ inline void asc_copy_gm2l1_sync(
1364+ __cbuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t m_start_position, uint32_t k_start_position,
1365+ uint16_t dst_stride, uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1366+ 
1367+__aicore__ inline void asc_copy_gm2l1_sync(
1368+ __cbuf__ fp4x2_e1m2_t* dst, __gm__ fp4x2_e1m2_t* src, uint32_t m_start_position, uint32_t k_start_position,
1369+ uint16_t dst_stride, uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1370+ 
1371+__aicore__ inline void asc_copy_gm2l1_sync(
1372+ __cbuf__ fp4x2_e2m1_t* dst, __gm__ fp4x2_e2m1_t* src, uint32_t m_start_position, uint32_t k_start_position,
1373+ uint16_t dst_stride, uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1374+ 
1375+__aicore__ inline void asc_copy_gm2l1_sync(
1376+ __cbuf__ void* dst, __gm__ void* src, uint32_t m_start_position, uint32_t k_start_position, uint16_t dst_stride,
1377+ uint16_t m_step, uint16_t k_step, uint8_t decomp_mode, uint8_t l2_cache_ctl);
1378+ 
1379+#endif
1380+ 
1381+#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H)
1382+#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
1383+#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
1384+#endif
Ainclude/c_api/composite/loadunalign_composite.h+67-0
@@ -0,0 +1,67 @@
1+/**
2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+ * See LICENSE in the root of the software repository for the full text of the License.
9+ */
10+ 
11+#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12+#error "composite/loadunalign_composite.h cannot be used with compile flag --enable-simt enabled."
13+#endif
14+ 
15+#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
16+#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
17+#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
18+#endif
19+ 
20+#ifndef INCLUDE_C_API_COMPOSITE_LOADUNALIGN_COMPOSITE_H
21+#define INCLUDE_C_API_COMPOSITE_LOADUNALIGN_COMPOSITE_H
22+#include "c_api/defs/defs.h"
23+ 
24+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510)
25+#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl.h"
26+#endif
27+ 
28+__simd_callee__ inline void asc_load(vector_int8_t& dst, __ubuf__ int8_t* src);
29+ 
30+__simd_callee__ inline void asc_load(vector_uint8_t& dst, __ubuf__ uint8_t* src);
31+ 
32+__simd_callee__ inline void asc_load(vector_int16_t& dst, __ubuf__ int16_t* src);
33+ 
34+__simd_callee__ inline void asc_load(vector_uint16_t& dst, __ubuf__ uint16_t* src);
35+ 
36+__simd_callee__ inline void asc_load(vector_int32_t& dst, __ubuf__ int32_t* src);
37+ 
38+__simd_callee__ inline void asc_load(vector_uint32_t& dst, __ubuf__ uint32_t* src);
39+ 
40+__simd_callee__ inline void asc_load(vector_half& dst, __ubuf__ half* src);
41+ 
42+__simd_callee__ inline void asc_load(vector_float& dst, __ubuf__ float* src);
43+ 
44+__simd_callee__ inline void asc_load(vector_int64_t& dst, __ubuf__ int64_t* src);
45+ 
46+__simd_callee__ inline void asc_load(vector_bfloat16_t& dst, __ubuf__ bfloat16_t* src);
47+ 
48+__simd_callee__ inline void asc_load(vector_fp8_e4m3fn_t& dst, __ubuf__ fp8_e4m3fn_t* src);
49+ 
50+__simd_callee__ inline void asc_load(vector_hifloat8_t& dst, __ubuf__ hifloat8_t* src);
51+ 
52+__simd_callee__ inline void asc_load(vector_fp8_e5m2_t& dst, __ubuf__ fp8_e5m2_t* src);
53+ 
54+__simd_callee__ inline void asc_load(vector_fp8_e8m0_t& dst, __ubuf__ fp8_e8m0_t* src);
55+ 
56+__simd_callee__ inline void asc_load(vector_fp4x2_e2m1_t& dst, __ubuf__ fp4x2_e2m1_t* src);
57+ 
58+__simd_callee__ inline void asc_load(vector_fp4x2_e1m2_t& dst, __ubuf__ fp4x2_e1m2_t* src);
59+ 
60+__simd_callee__ inline void asc_load(vector_int4x2_t& dst, __ubuf__ int4b_t* src);
61+ 
62+#endif
63+ 
64+#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H)
65+#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
66+#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
67+#endif
Ainclude/c_api/composite/storeunalign_composite.h+99-0
@@ -0,0 +1,99 @@
1+/**
2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+ * See LICENSE in the root of the software repository for the full text of the License.
9+ */
10+ 
11+#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12+#error "composite/storeunalign_composite.h cannot be used with compile flag --enable-simt enabled."
13+#endif
14+ 
15+#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
16+#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
17+#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
18+#endif
19+ 
20+#ifndef INCLUDE_C_API_COMPOSITE_STOREUNALIGN_COMPOSITE_H
21+#define INCLUDE_C_API_COMPOSITE_STOREUNALIGN_COMPOSITE_H
22+#include "c_api/defs/defs.h"
23+ 
24+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510)
25+#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl.h"
26+#endif
27+ 
28+__simd_callee__ inline void asc_store(__ubuf__ int8_t* dst, vector_int8_t src);
29+ 
30+__simd_callee__ inline void asc_store(__ubuf__ uint8_t* dst, vector_uint8_t src);
31+ 
32+__simd_callee__ inline void asc_store(__ubuf__ fp4x2_e2m1_t* dst, vector_fp4x2_e2m1_t src);
33+ 
34+__simd_callee__ inline void asc_store(__ubuf__ fp4x2_e1m2_t* dst, vector_fp4x2_e1m2_t src);
35+ 
36+__simd_callee__ inline void asc_store(__ubuf__ int4b_t* dst, vector_int4x2_t src);
37+ 
38+__simd_callee__ inline void asc_store(__ubuf__ fp8_e8m0_t* dst, vector_fp8_e8m0_t src);
39+ 
40+__simd_callee__ inline void asc_store(__ubuf__ fp8_e5m2_t* dst, vector_fp8_e5m2_t src);
41+ 
42+__simd_callee__ inline void asc_store(__ubuf__ fp8_e4m3fn_t* dst, vector_fp8_e4m3fn_t src);
43+ 
44+__simd_callee__ inline void asc_store(__ubuf__ hifloat8_t* dst, vector_hifloat8_t src);
45+ 
46+__simd_callee__ inline void asc_store(__ubuf__ int16_t* dst, vector_int16_t src);
47+ 
48+__simd_callee__ inline void asc_store(__ubuf__ uint16_t* dst, vector_uint16_t src);
49+ 
50+__simd_callee__ inline void asc_store(__ubuf__ half* dst, vector_half src);
51+ 
52+__simd_callee__ inline void asc_store(__ubuf__ bfloat16_t* dst, vector_bfloat16_t src);
53+ 
54+__simd_callee__ inline void asc_store(__ubuf__ int32_t* dst, vector_int32_t src);
55+ 
56+__simd_callee__ inline void asc_store(__ubuf__ uint32_t* dst, vector_uint32_t src);
57+ 
58+__simd_callee__ inline void asc_store(__ubuf__ float* dst, vector_float src);
59+ 
60+__simd_callee__ inline void asc_store(__ubuf__ int64_t* dst, vector_int64_t src);
61+ 
62+__simd_callee__ inline void asc_store(__ubuf__ int8_t* dst, vector_int8_t src, uint32_t count);
63+ 
64+__simd_callee__ inline void asc_store(__ubuf__ uint8_t* dst, vector_uint8_t src, uint32_t count);
65+ 
66+__simd_callee__ inline void asc_store(__ubuf__ int16_t* dst, vector_int16_t src, uint32_t count);
67+ 
68+__simd_callee__ inline void asc_store(__ubuf__ uint16_t* dst, vector_uint16_t src, uint32_t count);
69+ 
70+__simd_callee__ inline void asc_store(__ubuf__ int32_t* dst, vector_int32_t src, uint32_t count);
71+ 
72+__simd_callee__ inline void asc_store(__ubuf__ uint32_t* dst, vector_uint32_t src, uint32_t count);
73+ 
74+__simd_callee__ inline void asc_store(__ubuf__ float* dst, vector_float src, uint32_t count);
75+ 
76+__simd_callee__ inline void asc_store(__ubuf__ int64_t* dst, vector_int64_t src, uint32_t count);
77+ 
78+__simd_callee__ inline void asc_store(__ubuf__ bfloat16_t* dst, vector_bfloat16_t src, uint32_t count);
79+ 
80+__simd_callee__ inline void asc_store(__ubuf__ fp8_e8m0_t* dst, vector_fp8_e8m0_t src, uint32_t count);
81+ 
82+__simd_callee__ inline void asc_store(__ubuf__ fp8_e5m2_t* dst, vector_fp8_e5m2_t src, uint32_t count);
83+ 
84+__simd_callee__ inline void asc_store(__ubuf__ fp8_e4m3fn_t* dst, vector_fp8_e4m3fn_t src, uint32_t count);
85+ 
86+__simd_callee__ inline void asc_store(__ubuf__ hifloat8_t* dst, vector_hifloat8_t src, uint32_t count);
87+ 
88+__simd_callee__ inline void asc_store(__ubuf__ fp4x2_e2m1_t* dst, vector_fp4x2_e2m1_t src, uint32_t count);
89+ 
90+__simd_callee__ inline void asc_store(__ubuf__ fp4x2_e1m2_t* dst, vector_fp4x2_e1m2_t src, uint32_t count);
91+ 
92+__simd_callee__ inline void asc_store(__ubuf__ int4b_t* dst, vector_int4x2_t src, uint32_t count);
93+ 
94+#endif
95+ 
96+#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H)
97+#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
98+#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
99+#endif
Ainclude/c_api/composite/vector_compute_composite.h+839-0
@@ -0,0 +1,839 @@
1+/**
2+ * Copyright (c) 2026 Huawei Technologies Co., Ltd.
3+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4+ * CANN Open Software License Agreement Version 2.0 (the "License").
5+ * Please refer to the License for details. You may not use this file except in compliance with the License.
6+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8+ * See LICENSE in the root of the software repository for the full text of the License.
9+ */
10+ 
11+#if defined(__NPU_COMPILER_INTERNAL_PURE_SIMT__)
12+#error "composite/vector_compute_composite.h cannot be used with compile flag --enable-simt enabled."
13+#endif
14+ 
15+#if !defined(ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS)
16+#define ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
17+#define UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
18+#endif
19+ 
20+#ifndef INCLUDE_C_API_COMPOSITE_VECTOR_COMPUTE_COMPOSITE_H
21+#define INCLUDE_C_API_COMPOSITE_VECTOR_COMPUTE_COMPOSITE_H
22+#include "c_api/defs/defs.h"
23+ 
24+#if defined(__NPU_ARCH__) && (__NPU_ARCH__ == 2201)
25+#include "impl/c_api/instr_impl/npu_arch_2201/vector_compute_impl.h"
26+#include "impl/c_api/instr_impl/npu_arch_2201/vector_datamove_impl.h"
27+#elif defined(__NPU_ARCH__) && (__NPU_ARCH__ == 3510)
28+#include "impl/c_api/instr_impl/npu_arch_3510/vector_compute_impl.h"
29+#include "impl/c_api/instr_impl/npu_arch_3510/vector_datamove_impl.h"
30+#endif
31+__aicore__ inline void asc_add_sync(__ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
32+ 
33+__aicore__ inline void asc_add_sync(__ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
34+ 
35+__aicore__ inline void asc_add_sync(
36+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src0, __ubuf__ int16_t* src1, uint32_t count);
37+ 
38+__aicore__ inline void asc_add_sync(
39+ __ubuf__ int32_t* dst, __ubuf__ int32_t* src0, __ubuf__ int32_t* src1, uint32_t count);
40+ 
41+__aicore__ inline void asc_add_scalar_sync(__ubuf__ half* dst, __ubuf__ half* src, half value, uint32_t count);
42+ 
43+__aicore__ inline void asc_add_scalar_sync(__ubuf__ float* dst, __ubuf__ float* src, float value, uint32_t count);
44+ 
45+__aicore__ inline void asc_add_scalar_sync(__ubuf__ int16_t* dst, __ubuf__ int16_t* src, int16_t value, uint32_t count);
46+ 
47+__aicore__ inline void asc_add_scalar_sync(__ubuf__ int32_t* dst, __ubuf__ int32_t* src, int32_t value, uint32_t count);
48+ 
49+__aicore__ inline void asc_brcb_sync(
50+ __ubuf__ uint16_t* dst, __ubuf__ uint16_t* src, uint16_t dst_block_stride, uint16_t dst_repeat_stride,
51+ uint8_t repeat);
52+ 
53+__aicore__ inline void asc_brcb_sync(
54+ __ubuf__ uint32_t* dst, __ubuf__ uint32_t* src, uint16_t dst_block_stride, uint16_t dst_repeat_stride,
55+ uint8_t repeat);
56+ 
57+__aicore__ inline void asc_bitsort_sync(
58+ __ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ uint32_t* src1, int32_t repeat);
59+ 
60+__aicore__ inline void asc_bitsort_sync(
61+ __ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ uint32_t* src1, int32_t repeat);
62+ 
63+__aicore__ inline void asc_transpose_sync(__ubuf__ int16_t* dst, __ubuf__ int16_t* src);
64+ 
65+__aicore__ inline void asc_transpose_sync(__ubuf__ uint16_t* dst, __ubuf__ uint16_t* src);
66+ 
67+__aicore__ inline void asc_datablock_reduce_sum_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
68+ 
69+__aicore__ inline void asc_datablock_reduce_sum_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
70+ 
71+__aicore__ inline void asc_datablock_reduce_max_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
72+ 
73+__aicore__ inline void asc_datablock_reduce_max_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
74+ 
75+__aicore__ inline void asc_datablock_reduce_min_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
76+ 
77+__aicore__ inline void asc_datablock_reduce_min_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
78+ 
79+__aicore__ inline void asc_repeat_reduce_sum_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
80+ 
81+__aicore__ inline void asc_repeat_reduce_sum_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
82+ 
83+__aicore__ inline void asc_repeat_reduce_max_index_value_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
84+ 
85+__aicore__ inline void asc_repeat_reduce_max_index_value_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
86+ 
87+__aicore__ inline void asc_repeat_reduce_max_value_index_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
88+ 
89+__aicore__ inline void asc_repeat_reduce_max_value_index_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
90+ 
91+__aicore__ inline void asc_repeat_reduce_max_only_value_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
92+ 
93+__aicore__ inline void asc_repeat_reduce_max_only_value_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
94+ 
95+__aicore__ inline void asc_repeat_reduce_max_only_index_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
96+ 
97+__aicore__ inline void asc_repeat_reduce_max_only_index_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
98+ 
99+__aicore__ inline void asc_repeat_reduce_min_index_value_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
100+ 
101+__aicore__ inline void asc_repeat_reduce_min_index_value_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
102+ 
103+__aicore__ inline void asc_repeat_reduce_min_value_index_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
104+ 
105+__aicore__ inline void asc_repeat_reduce_min_value_index_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
106+ 
107+__aicore__ inline void asc_repeat_reduce_min_only_value_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
108+ 
109+__aicore__ inline void asc_repeat_reduce_min_only_value_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
110+ 
111+__aicore__ inline void asc_repeat_reduce_min_only_index_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
112+ 
113+__aicore__ inline void asc_repeat_reduce_min_only_index_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
114+ 
115+__aicore__ inline void asc_eq_sync(
116+ __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
117+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
118+ 
119+__aicore__ inline void asc_eq_sync(
120+ __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
121+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
122+ 
123+__aicore__ inline void asc_eq_sync(
124+ __ubuf__ uint8_t* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride,
125+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
126+ uint8_t src1_repeat_stride);
127+ 
128+__aicore__ inline void asc_eq_sync(
129+ __ubuf__ uint8_t* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride,
130+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
131+ uint8_t src1_repeat_stride);
132+ 
133+__aicore__ inline void asc_eq_sync(
134+ __ubuf__ uint8_t* dst, __ubuf__ int32_t* src0, __ubuf__ int32_t* src1, uint8_t repeat, uint8_t dst_block_stride,
135+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
136+ uint8_t src1_repeat_stride);
137+ 
138+__aicore__ inline void asc_bfloat162float_sync(__ubuf__ float* dst, __ubuf__ bfloat16_t* src, uint32_t count);
139+ 
140+__aicore__ inline void asc_bfloat162int32_rna_sync(__ubuf__ int32_t* dst, __ubuf__ bfloat16_t* src, uint32_t count);
141+ 
142+__aicore__ inline void asc_bfloat162int32_ru_sync(__ubuf__ int32_t* dst, __ubuf__ bfloat16_t* src, uint32_t count);
143+ 
144+__aicore__ inline void asc_bfloat162int32_rd_sync(__ubuf__ int32_t* dst, __ubuf__ bfloat16_t* src, uint32_t count);
145+ 
146+__aicore__ inline void asc_bfloat162int32_rn_sync(__ubuf__ int32_t* dst, __ubuf__ bfloat16_t* src, uint32_t count);
147+ 
148+__aicore__ inline void asc_bfloat162int32_rz_sync(__ubuf__ int32_t* dst, __ubuf__ bfloat16_t* src, uint32_t count);
149+ 
150+__aicore__ inline void asc_float2bfloat16_rn_sync(__ubuf__ bfloat16_t* dst, __ubuf__ float* src, uint32_t count);
151+ 
152+__aicore__ inline void asc_float2bfloat16_rna_sync(__ubuf__ bfloat16_t* dst, __ubuf__ float* src, uint32_t count);
153+ 
154+__aicore__ inline void asc_float2bfloat16_rd_sync(__ubuf__ bfloat16_t* dst, __ubuf__ float* src, uint32_t count);
155+ 
156+__aicore__ inline void asc_float2bfloat16_ru_sync(__ubuf__ bfloat16_t* dst, __ubuf__ float* src, uint32_t count);
157+ 
158+__aicore__ inline void asc_float2bfloat16_rz_sync(__ubuf__ bfloat16_t* dst, __ubuf__ float* src, uint32_t count);
159+ 
160+__aicore__ inline void asc_float2float_rn_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
161+ 
162+__aicore__ inline void asc_float2float_rd_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
163+ 
164+__aicore__ inline void asc_float2float_ru_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
165+ 
166+__aicore__ inline void asc_float2float_rna_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
167+ 
168+__aicore__ inline void asc_float2float_rz_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
169+ 
170+__aicore__ inline void asc_float2half_sync(__ubuf__ half* dst, __ubuf__ float* src, uint32_t count);
171+ 
172+__aicore__ inline void asc_float2half_rn_sync(__ubuf__ half* dst, __ubuf__ float* src, uint32_t count);
173+ 
174+__aicore__ inline void asc_float2half_rna_sync(__ubuf__ half* dst, __ubuf__ float* src, uint32_t count);
175+ 
176+__aicore__ inline void asc_float2half_rd_sync(__ubuf__ half* dst, __ubuf__ float* src, uint32_t count);
177+ 
178+__aicore__ inline void asc_float2half_ru_sync(__ubuf__ half* dst, __ubuf__ float* src, uint32_t count);
179+ 
180+__aicore__ inline void asc_float2half_rz_sync(__ubuf__ half* dst, __ubuf__ float* src, uint32_t count);
181+ 
182+__aicore__ inline void asc_float2half_ro_sync(__ubuf__ half* dst, __ubuf__ float* src, uint32_t count);
183+ 
184+__aicore__ inline void asc_float2int32_rna_sync(__ubuf__ int32_t* dst, __ubuf__ float* src, uint32_t count);
185+ 
186+__aicore__ inline void asc_float2int32_ru_sync(__ubuf__ int32_t* dst, __ubuf__ float* src, uint32_t count);
187+ 
188+__aicore__ inline void asc_float2int32_rd_sync(__ubuf__ int32_t* dst, __ubuf__ float* src, uint32_t count);
189+ 
190+__aicore__ inline void asc_float2int32_rn_sync(__ubuf__ int32_t* dst, __ubuf__ float* src, uint32_t count);
191+ 
192+__aicore__ inline void asc_float2int32_rz_sync(__ubuf__ int32_t* dst, __ubuf__ float* src, uint32_t count);
193+ 
194+__aicore__ inline void asc_float2int64_rna_sync(__ubuf__ int64_t* dst, __ubuf__ float* src, uint32_t count);
195+ 
196+__aicore__ inline void asc_float2int64_ru_sync(__ubuf__ int64_t* dst, __ubuf__ float* src, uint32_t count);
197+ 
198+__aicore__ inline void asc_float2int64_rd_sync(__ubuf__ int64_t* dst, __ubuf__ float* src, uint32_t count);
199+ 
200+__aicore__ inline void asc_float2int64_rn_sync(__ubuf__ int64_t* dst, __ubuf__ float* src, uint32_t count);
201+ 
202+__aicore__ inline void asc_float2int64_rz_sync(__ubuf__ int64_t* dst, __ubuf__ float* src, uint32_t count);
203+ 
204+__aicore__ inline void asc_half2float_sync(__ubuf__ float* dst, __ubuf__ half* src, uint32_t count);
205+ 
206+__aicore__ inline void asc_half2int4_sync(__ubuf__ int4b_t* dst, __ubuf__ half* src, uint32_t count);
207+ 
208+__aicore__ inline void asc_half2int4_rna_sync(__ubuf__ int4b_t* dst, __ubuf__ half* src, uint32_t count);
209+ 
210+__aicore__ inline void asc_half2int4_ru_sync(__ubuf__ int4b_t* dst, __ubuf__ half* src, uint32_t count);
211+ 
212+__aicore__ inline void asc_half2int4_rd_sync(__ubuf__ int4b_t* dst, __ubuf__ half* src, uint32_t count);
213+ 
214+__aicore__ inline void asc_half2int4_rn_sync(__ubuf__ int4b_t* dst, __ubuf__ half* src, uint32_t count);
215+ 
216+__aicore__ inline void asc_half2int4_rz_sync(__ubuf__ int4b_t* dst, __ubuf__ half* src, uint32_t count);
217+ 
218+__aicore__ inline void asc_half2int8_sync(__ubuf__ int8_t* dst, __ubuf__ half* src, uint32_t count);
219+ 
220+__aicore__ inline void asc_half2int8_rna_sync(__ubuf__ int8_t* dst, __ubuf__ half* src, uint32_t count);
221+ 
222+__aicore__ inline void asc_half2int8_ru_sync(__ubuf__ int8_t* dst, __ubuf__ half* src, uint32_t count);
223+ 
224+__aicore__ inline void asc_half2int8_rd_sync(__ubuf__ int8_t* dst, __ubuf__ half* src, uint32_t count);
225+ 
226+__aicore__ inline void asc_half2int8_rn_sync(__ubuf__ int8_t* dst, __ubuf__ half* src, uint32_t count);
227+ 
228+__aicore__ inline void asc_half2int8_rz_sync(__ubuf__ int8_t* dst, __ubuf__ half* src, uint32_t count);
229+ 
230+__aicore__ inline void asc_half2int16_rna_sync(__ubuf__ int16_t* dst, __ubuf__ half* src, uint32_t count);
231+ 
232+__aicore__ inline void asc_half2int16_ru_sync(__ubuf__ int16_t* dst, __ubuf__ half* src, uint32_t count);
233+ 
234+__aicore__ inline void asc_half2int16_rd_sync(__ubuf__ int16_t* dst, __ubuf__ half* src, uint32_t count);
235+ 
236+__aicore__ inline void asc_half2int16_rn_sync(__ubuf__ int16_t* dst, __ubuf__ half* src, uint32_t count);
237+ 
238+__aicore__ inline void asc_half2int16_rz_sync(__ubuf__ int16_t* dst, __ubuf__ half* src, uint32_t count);
239+ 
240+__aicore__ inline void asc_half2int32_rna_sync(__ubuf__ int32_t* dst, __ubuf__ half* src, uint32_t count);
241+ 
242+__aicore__ inline void asc_half2int32_ru_sync(__ubuf__ int32_t* dst, __ubuf__ half* src, uint32_t count);
243+ 
244+__aicore__ inline void asc_half2int32_rd_sync(__ubuf__ int32_t* dst, __ubuf__ half* src, uint32_t count);
245+ 
246+__aicore__ inline void asc_half2int32_rn_sync(__ubuf__ int32_t* dst, __ubuf__ half* src, uint32_t count);
247+ 
248+__aicore__ inline void asc_half2int32_rz_sync(__ubuf__ int32_t* dst, __ubuf__ half* src, uint32_t count);
249+ 
250+__aicore__ inline void asc_div_sync(__ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
251+ 
252+__aicore__ inline void asc_div_sync(__ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
253+ 
254+__aicore__ inline void asc_duplicate_sync(__ubuf__ half* dst, half src, uint32_t count);
255+ 
256+__aicore__ inline void asc_duplicate_sync(__ubuf__ int16_t* dst, int16_t src, uint32_t count);
257+ 
258+__aicore__ inline void asc_duplicate_sync(__ubuf__ uint16_t* dst, uint16_t src, uint32_t count);
259+ 
260+__aicore__ inline void asc_duplicate_sync(__ubuf__ bfloat16_t* dst, bfloat16_t src, uint32_t count);
261+ 
262+__aicore__ inline void asc_duplicate_sync(__ubuf__ float* dst, float src, uint32_t count);
263+ 
264+__aicore__ inline void asc_duplicate_sync(__ubuf__ int32_t* dst, int32_t src, uint32_t count);
265+ 
266+__aicore__ inline void asc_duplicate_sync(__ubuf__ uint32_t* dst, uint32_t src, uint32_t count);
267+ 
268+__aicore__ inline void asc_exp_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
269+ 
270+__aicore__ inline void asc_exp_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
271+ 
272+__aicore__ inline void asc_log_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
273+ 
274+__aicore__ inline void asc_log_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
275+ 
276+__aicore__ inline void asc_gt_scalar_sync(
277+ __ubuf__ uint8_t* dst, __ubuf__ half* src, half value, uint8_t repeat, uint16_t dst_block_stride,
278+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
279+ 
280+__aicore__ inline void asc_gt_scalar_sync(
281+ __ubuf__ uint8_t* dst, __ubuf__ float* src, float value, uint8_t repeat, uint16_t dst_block_stride,
282+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
283+ 
284+__aicore__ inline void asc_abs_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
285+ 
286+__aicore__ inline void asc_abs_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
287+ 
288+__aicore__ inline void asc_shiftleft_sync(
289+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src, uint32_t distance, uint32_t count);
290+ 
291+__aicore__ inline void asc_shiftleft_sync(
292+ __ubuf__ uint16_t* dst, __ubuf__ uint16_t* src, uint32_t distance, uint32_t count);
293+ 
294+__aicore__ inline void asc_shiftleft_sync(
295+ __ubuf__ int32_t* dst, __ubuf__ int32_t* src, uint32_t distance, uint32_t count);
296+ 
297+__aicore__ inline void asc_shiftleft_sync(
298+ __ubuf__ uint32_t* dst, __ubuf__ uint32_t* src, uint32_t distance, uint32_t count);
299+ 
300+__aicore__ inline void asc_mul_cast_half2int8_sync(
301+ __ubuf__ int8_t* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
302+ 
303+__aicore__ inline void asc_mul_cast_half2uint8_sync(
304+ __ubuf__ uint8_t* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
305+ 
306+__aicore__ inline void asc_ne_sync(
307+ __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
308+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
309+ 
310+__aicore__ inline void asc_ne_sync(
311+ __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
312+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
313+ 
314+__aicore__ inline void asc_ne_sync(
315+ __ubuf__ uint8_t* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride,
316+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
317+ uint8_t src1_repeat_stride);
318+ 
319+__aicore__ inline void asc_ne_sync(
320+ __ubuf__ uint8_t* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride,
321+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
322+ uint8_t src1_repeat_stride);
323+ 
324+__aicore__ inline void asc_ge_scalar_sync(
325+ __ubuf__ uint8_t* dst, __ubuf__ half* src, half value, uint8_t repeat, uint16_t dst_block_stride,
326+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
327+ 
328+__aicore__ inline void asc_ge_scalar_sync(
329+ __ubuf__ uint8_t* dst, __ubuf__ float* src, float value, uint8_t repeat, uint16_t dst_block_stride,
330+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
331+ 
332+__aicore__ inline void asc_deq_int322half_sync(__ubuf__ half* dst, __ubuf__ int32_t* src, uint32_t count);
333+ 
334+__aicore__ inline void asc_mrgsort4_sync(
335+ __ubuf__ half* dst, __ubuf__ half* src[ASC_C_API_MRGSORT_ELEMENT_LEN], uint8_t repeat, uint16_t element_length_0,
336+ uint16_t element_length_1, uint16_t element_length_2, uint16_t element_length_3, bool if_exhausted_suspension,
337+ uint8_t valid_bit);
338+ 
339+__aicore__ inline void asc_mrgsort4_sync(
340+ __ubuf__ float* dst, __ubuf__ float* src[ASC_C_API_MRGSORT_ELEMENT_LEN], uint8_t repeat, uint16_t element_length_0,
341+ uint16_t element_length_1, uint16_t element_length_2, uint16_t element_length_3, bool if_exhausted_suspension,
342+ uint8_t valid_bit);
343+ 
344+__aicore__ inline void asc_relu_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
345+ 
346+__aicore__ inline void asc_relu_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
347+ 
348+__aicore__ inline void asc_relu_sync(__ubuf__ int32_t* dst, __ubuf__ int32_t* src, uint32_t count);
349+ 
350+__aicore__ inline void asc_max_sync(__ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
351+ 
352+__aicore__ inline void asc_max_sync(__ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
353+ 
354+__aicore__ inline void asc_max_sync(
355+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src0, __ubuf__ int16_t* src1, uint32_t count);
356+ 
357+__aicore__ inline void asc_max_sync(
358+ __ubuf__ int32_t* dst, __ubuf__ int32_t* src0, __ubuf__ int32_t* src1, uint32_t count);
359+ 
360+__aicore__ inline void asc_max_scalar_sync(__ubuf__ half* dst, __ubuf__ half* src, half value, uint32_t count);
361+ 
362+__aicore__ inline void asc_max_scalar_sync(__ubuf__ float* dst, __ubuf__ float* src, float value, uint32_t count);
363+ 
364+__aicore__ inline void asc_max_scalar_sync(__ubuf__ int16_t* dst, __ubuf__ int16_t* src, int16_t value, uint32_t count);
365+ 
366+__aicore__ inline void asc_max_scalar_sync(__ubuf__ int32_t* dst, __ubuf__ int32_t* src, int32_t value, uint32_t count);
367+ 
368+__aicore__ inline void asc_min_sync(__ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
369+ 
370+__aicore__ inline void asc_min_sync(__ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
371+ 
372+__aicore__ inline void asc_min_sync(
373+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src0, __ubuf__ int16_t* src1, uint32_t count);
374+ 
375+__aicore__ inline void asc_min_sync(
376+ __ubuf__ int32_t* dst, __ubuf__ int32_t* src0, __ubuf__ int32_t* src1, uint32_t count);
377+ 
378+__aicore__ inline void asc_fma_sync(__ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
379+ 
380+__aicore__ inline void asc_fma_sync(__ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
381+ 
382+__aicore__ inline void asc_fma_sync(__ubuf__ float* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
383+ 
384+__aicore__ inline void asc_mul_sync(__ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
385+ 
386+__aicore__ inline void asc_mul_sync(__ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
387+ 
388+__aicore__ inline void asc_mul_sync(
389+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src0, __ubuf__ int16_t* src1, uint32_t count);
390+ 
391+__aicore__ inline void asc_mul_sync(
392+ __ubuf__ int32_t* dst, __ubuf__ int32_t* src0, __ubuf__ int32_t* src1, uint32_t count);
393+ 
394+__aicore__ inline void asc_mul_scalar_sync(__ubuf__ half* dst, __ubuf__ half* src, half value, uint32_t count);
395+ 
396+__aicore__ inline void asc_mul_scalar_sync(__ubuf__ float* dst, __ubuf__ float* src, float value, uint32_t count);
397+ 
398+__aicore__ inline void asc_mul_scalar_sync(__ubuf__ int16_t* dst, __ubuf__ int16_t* src, int16_t value, uint32_t count);
399+ 
400+__aicore__ inline void asc_mul_scalar_sync(__ubuf__ int32_t* dst, __ubuf__ int32_t* src, int32_t value, uint32_t count);
401+ 
402+__aicore__ inline void asc_select_sync(__ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
403+ 
404+__aicore__ inline void asc_select_sync(__ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
405+ 
406+__aicore__ inline void asc_sub_sync(__ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
407+ 
408+__aicore__ inline void asc_sub_sync(__ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
409+ 
410+__aicore__ inline void asc_sub_sync(
411+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src0, __ubuf__ int16_t* src1, uint32_t count);
412+ 
413+__aicore__ inline void asc_sub_sync(
414+ __ubuf__ int32_t* dst, __ubuf__ int32_t* src0, __ubuf__ int32_t* src1, uint32_t count);
415+ 
416+__aicore__ inline void asc_sub_scalar_sync(__ubuf__ half* dst, __ubuf__ half* src, half value, uint32_t count);
417+ 
418+__aicore__ inline void asc_sub_scalar_sync(__ubuf__ float* dst, __ubuf__ float* src, float value, uint32_t count);
419+ 
420+__aicore__ inline void asc_sub_scalar_sync(__ubuf__ int16_t* dst, __ubuf__ int16_t* src, int16_t value, uint32_t count);
421+ 
422+__aicore__ inline void asc_sub_scalar_sync(__ubuf__ int32_t* dst, __ubuf__ int32_t* src, int32_t value, uint32_t count);
423+ 
424+__aicore__ inline void asc_or_sync(
425+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src0, __ubuf__ int16_t* src1, uint32_t count);
426+ 
427+__aicore__ inline void asc_or_sync(
428+ __ubuf__ uint16_t* dst, __ubuf__ uint16_t* src0, __ubuf__ uint16_t* src1, uint32_t count);
429+ 
430+__aicore__ inline void asc_not_sync(__ubuf__ int16_t* dst, __ubuf__ int16_t* src, uint32_t count);
431+ 
432+__aicore__ inline void asc_not_sync(__ubuf__ uint16_t* dst, __ubuf__ uint16_t* src, uint32_t count);
433+ 
434+__aicore__ inline void asc_rcp_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
435+ 
436+__aicore__ inline void asc_rcp_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
437+ 
438+__aicore__ inline void asc_shiftright_sync(__ubuf__ int16_t* dst, __ubuf__ int16_t* src, int32_t value, uint32_t count);
439+ 
440+__aicore__ inline void asc_shiftright_sync(__ubuf__ int32_t* dst, __ubuf__ int32_t* src, int32_t value, uint32_t count);
441+ 
442+__aicore__ inline void asc_shiftright_sync(
443+ __ubuf__ uint16_t* dst, __ubuf__ uint16_t* src, uint32_t value, uint32_t count);
444+ 
445+__aicore__ inline void asc_shiftright_sync(
446+ __ubuf__ uint32_t* dst, __ubuf__ uint32_t* src, uint32_t value, uint32_t count);
447+ 
448+__aicore__ inline void asc_shiftright_round_sync(
449+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src, int32_t value, uint32_t count);
450+ 
451+__aicore__ inline void asc_shiftright_round_sync(
452+ __ubuf__ int32_t* dst, __ubuf__ int32_t* src, int32_t value, uint32_t count);
453+ 
454+__aicore__ inline void asc_mul_add_sync(__ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
455+ 
456+__aicore__ inline void asc_mul_add_sync(
457+ __ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
458+ 
459+__aicore__ inline void asc_mul_add_relu_sync(
460+ __ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
461+ 
462+__aicore__ inline void asc_mul_add_relu_sync(
463+ __ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
464+ 
465+__aicore__ inline void asc_eq_scalar_sync(
466+ __ubuf__ uint8_t* dst, __ubuf__ half* src, half value, uint8_t repeat, uint16_t dst_block_stride,
467+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
468+ 
469+__aicore__ inline void asc_eq_scalar_sync(
470+ __ubuf__ uint8_t* dst, __ubuf__ float* src, float value, uint8_t repeat, uint16_t dst_block_stride,
471+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
472+ 
473+__aicore__ inline void asc_eq_scalar_sync(
474+ __ubuf__ uint8_t* dst, __ubuf__ int32_t* src, int32_t value, uint8_t repeat, uint16_t dst_block_stride,
475+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
476+ 
477+__aicore__ inline void asc_deq_int162b8_h_sync(__ubuf__ int8_t* dst, __ubuf__ int16_t* src, uint32_t count);
478+ 
479+__aicore__ inline void asc_deq_int162b8_h_sync(__ubuf__ uint8_t* dst, __ubuf__ int16_t* src, uint32_t count);
480+ 
481+__aicore__ inline void asc_deq_int162b8_l_sync(__ubuf__ int8_t* dst, __ubuf__ int16_t* src, uint32_t count);
482+ 
483+__aicore__ inline void asc_deq_int162b8_l_sync(__ubuf__ uint8_t* dst, __ubuf__ int16_t* src, uint32_t count);
484+ 
485+__aicore__ inline void asc_int42half_sync(__ubuf__ half* dst, __ubuf__ int4b_t* src, uint32_t count);
486+ 
487+__aicore__ inline void asc_int82half_sync(__ubuf__ half* dst, __ubuf__ int8_t* src, uint32_t count);
488+ 
489+__aicore__ inline void asc_uint82half_sync(__ubuf__ half* dst, __ubuf__ uint8_t* src, uint32_t count);
490+ 
491+__aicore__ inline void asc_int162float_sync(__ubuf__ float* dst, __ubuf__ int16_t* src, uint32_t count);
492+ 
493+__aicore__ inline void asc_int322float_sync(__ubuf__ float* dst, __ubuf__ int32_t* src, uint32_t count);
494+ 
495+__aicore__ inline void asc_int322float_rna_sync(__ubuf__ float* dst, __ubuf__ int32_t* src, uint32_t count);
496+ 
497+__aicore__ inline void asc_int322float_ru_sync(__ubuf__ float* dst, __ubuf__ int32_t* src, uint32_t count);
498+ 
499+__aicore__ inline void asc_int322float_rd_sync(__ubuf__ float* dst, __ubuf__ int32_t* src, uint32_t count);
500+ 
501+__aicore__ inline void asc_int322float_rn_sync(__ubuf__ float* dst, __ubuf__ int32_t* src, uint32_t count);
502+ 
503+__aicore__ inline void asc_int322float_rz_sync(__ubuf__ float* dst, __ubuf__ int32_t* src, uint32_t count);
504+ 
505+__aicore__ inline void asc_int322int16_sync(__ubuf__ int16_t* dst, __ubuf__ int32_t* src, uint32_t count);
506+ 
507+__aicore__ inline void asc_int322int64_sync(__ubuf__ int64_t* dst, __ubuf__ int32_t* src, uint32_t count);
508+ 
509+__aicore__ inline void asc_int642int32_sync(__ubuf__ int32_t* dst, __ubuf__ int64_t* src, uint32_t count);
510+ 
511+__aicore__ inline void asc_gather_sync(
512+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src, __ubuf__ uint32_t* src_offset, uint32_t count);
513+ 
514+__aicore__ inline void asc_gather_sync(
515+ __ubuf__ uint16_t* dst, __ubuf__ uint16_t* src, __ubuf__ uint32_t* src_offset, uint32_t count);
516+ 
517+__aicore__ inline void asc_gather_sync(
518+ __ubuf__ half* dst, __ubuf__ half* src, __ubuf__ uint32_t* src_offset, uint32_t count);
519+ 
520+__aicore__ inline void asc_gather_sync(
521+ __ubuf__ bfloat16_t* dst, __ubuf__ bfloat16_t* src, __ubuf__ uint32_t* src_offset, uint32_t count);
522+ 
523+__aicore__ inline void asc_gather_sync(
524+ __ubuf__ int32_t* dst, __ubuf__ int32_t* src, __ubuf__ uint32_t* src_offset, uint32_t count);
525+ 
526+__aicore__ inline void asc_gather_sync(
527+ __ubuf__ uint32_t* dst, __ubuf__ uint32_t* src, __ubuf__ uint32_t* src_offset, uint32_t count);
528+ 
529+__aicore__ inline void asc_gather_sync(
530+ __ubuf__ float* dst, __ubuf__ float* src, __ubuf__ uint32_t* src_offset, uint32_t count);
531+ 
532+__aicore__ inline void asc_and_sync(
533+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src0, __ubuf__ int16_t* src1, uint32_t count);
534+ 
535+__aicore__ inline void asc_and_sync(
536+ __ubuf__ uint16_t* dst, __ubuf__ uint16_t* src0, __ubuf__ uint16_t* src1, uint32_t count);
537+ 
538+__aicore__ inline void asc_leakyrelu_sync(__ubuf__ half* dst, __ubuf__ half* src, half value, uint32_t count);
539+ 
540+__aicore__ inline void asc_leakyrelu_sync(__ubuf__ float* dst, __ubuf__ float* src, float value, uint32_t count);
541+ 
542+__aicore__ inline void asc_lt_scalar_sync(
543+ __ubuf__ uint8_t* dst, __ubuf__ half* src, half value, uint8_t repeat, uint16_t dst_block_stride,
544+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
545+ 
546+__aicore__ inline void asc_lt_scalar_sync(
547+ __ubuf__ uint8_t* dst, __ubuf__ float* src, float value, uint8_t repeat, uint16_t dst_block_stride,
548+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
549+ 
550+__aicore__ inline void asc_sub_relu_sync(__ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
551+ 
552+__aicore__ inline void asc_sub_relu_sync(
553+ __ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
554+ 
555+__aicore__ inline void asc_sub_relu_sync(
556+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src0, __ubuf__ int16_t* src1, uint32_t count);
557+ 
558+__aicore__ inline void asc_sub_relu_sync(
559+ __ubuf__ int8_t* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
560+ 
561+__aicore__ inline void asc_sub_relu_sync(
562+ __ubuf__ half* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
563+ 
564+__aicore__ inline void asc_sub_relu_sync(
565+ __ubuf__ int8_t* dst, __ubuf__ int16_t* src0, __ubuf__ int16_t* src1, uint32_t count);
566+ 
567+__aicore__ inline void asc_float2int16_rna_sync(__ubuf__ int16_t* dst, __ubuf__ float* src, uint32_t count);
568+ 
569+__aicore__ inline void asc_float2int16_ru_sync(__ubuf__ int16_t* dst, __ubuf__ float* src, uint32_t count);
570+ 
571+__aicore__ inline void asc_float2int16_rd_sync(__ubuf__ int16_t* dst, __ubuf__ float* src, uint32_t count);
572+ 
573+__aicore__ inline void asc_float2int16_rn_sync(__ubuf__ int16_t* dst, __ubuf__ float* src, uint32_t count);
574+ 
575+__aicore__ inline void asc_float2int16_rz_sync(__ubuf__ int16_t* dst, __ubuf__ float* src, uint32_t count);
576+ 
577+__aicore__ inline void asc_rsqrt_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
578+ 
579+__aicore__ inline void asc_rsqrt_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
580+ 
581+__aicore__ inline void asc_add_relu_sync(__ubuf__ half* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
582+ 
583+__aicore__ inline void asc_add_relu_sync(
584+ __ubuf__ float* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
585+ 
586+__aicore__ inline void asc_add_relu_sync(
587+ __ubuf__ int16_t* dst, __ubuf__ int16_t* src0, __ubuf__ int16_t* src1, uint32_t count);
588+ 
589+__aicore__ inline void asc_ge_sync(
590+ __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
591+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
592+ 
593+__aicore__ inline void asc_ge_sync(
594+ __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
595+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
596+ 
597+__aicore__ inline void asc_ge_sync(
598+ __ubuf__ uint8_t* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride,
599+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
600+ uint8_t src1_repeat_stride);
601+ 
602+__aicore__ inline void asc_ge_sync(
603+ __ubuf__ uint8_t* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride,
604+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
605+ uint8_t src1_repeat_stride);
606+ 
607+__aicore__ inline void asc_reduce_sync(
608+ __ubuf__ uint16_t* dst, __ubuf__ uint16_t* src0, __ubuf__ uint16_t* src1, uint32_t count);
609+ 
610+__aicore__ inline void asc_reduce_sync(
611+ __ubuf__ uint32_t* dst, __ubuf__ uint32_t* src0, __ubuf__ uint32_t* src1, uint32_t count);
612+ 
613+__aicore__ inline void asc_int642float_rna_sync(__ubuf__ float* dst, __ubuf__ int64_t* src, uint32_t count);
614+ 
615+__aicore__ inline void asc_int642float_ru_sync(__ubuf__ float* dst, __ubuf__ int64_t* src, uint32_t count);
616+ 
617+__aicore__ inline void asc_int642float_rd_sync(__ubuf__ float* dst, __ubuf__ int64_t* src, uint32_t count);
618+ 
619+__aicore__ inline void asc_int642float_rn_sync(__ubuf__ float* dst, __ubuf__ int64_t* src, uint32_t count);
620+ 
621+__aicore__ inline void asc_int642float_rz_sync(__ubuf__ float* dst, __ubuf__ int64_t* src, uint32_t count);
622+ 
623+__aicore__ inline void asc_vdeq_int162b8_h_sync(__ubuf__ int8_t* dst, __ubuf__ int16_t* src, uint32_t count);
624+ 
625+__aicore__ inline void asc_vdeq_int162b8_h_sync(__ubuf__ uint8_t* dst, __ubuf__ int16_t* src, uint32_t count);
626+ 
627+__aicore__ inline void asc_vdeq_int162b8_l_sync(__ubuf__ int8_t* dst, __ubuf__ int16_t* src, uint32_t count);
628+ 
629+__aicore__ inline void asc_vdeq_int162b8_l_sync(__ubuf__ uint8_t* dst, __ubuf__ int16_t* src, uint32_t count);
630+ 
631+__aicore__ inline void asc_sqrt_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
632+ 
633+__aicore__ inline void asc_sqrt_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
634+ 
635+__aicore__ inline void asc_axpy_sync(__ubuf__ half* dst, __ubuf__ half* src, half value, uint32_t count);
636+ 
637+__aicore__ inline void asc_axpy_sync(__ubuf__ float* dst, __ubuf__ float* src, float value, uint32_t count);
638+ 
639+__aicore__ inline void asc_axpy_sync(__ubuf__ float* dst, __ubuf__ half* src, half value, uint32_t count);
640+ 
641+__aicore__ inline void asc_lt_sync(
642+ __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
643+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
644+ 
645+__aicore__ inline void asc_lt_sync(
646+ __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
647+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
648+ 
649+__aicore__ inline void asc_lt_sync(
650+ __ubuf__ uint8_t* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride,
651+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
652+ uint8_t src1_repeat_stride);
653+ 
654+__aicore__ inline void asc_lt_sync(
655+ __ubuf__ uint8_t* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride,
656+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
657+ uint8_t src1_repeat_stride);
658+ 
659+__aicore__ inline void asc_ne_scalar_sync(
660+ __ubuf__ uint8_t* dst, __ubuf__ half* src, half value, uint8_t repeat, uint16_t dst_block_stride,
661+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
662+ 
663+__aicore__ inline void asc_ne_scalar_sync(
664+ __ubuf__ uint8_t* dst, __ubuf__ float* src, float value, uint8_t repeat, uint16_t dst_block_stride,
665+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
666+ 
667+__aicore__ inline void asc_int162half_sync(__ubuf__ half* dst, __ubuf__ int16_t* src, uint32_t count);
668+ 
669+__aicore__ inline void asc_int162half_rna_sync(__ubuf__ half* dst, __ubuf__ int16_t* src, uint32_t count);
670+ 
671+__aicore__ inline void asc_int162half_ru_sync(__ubuf__ half* dst, __ubuf__ int16_t* src, uint32_t count);
672+ 
673+__aicore__ inline void asc_int162half_rd_sync(__ubuf__ half* dst, __ubuf__ int16_t* src, uint32_t count);
674+ 
675+__aicore__ inline void asc_int162half_rn_sync(__ubuf__ half* dst, __ubuf__ int16_t* src, uint32_t count);
676+ 
677+__aicore__ inline void asc_int162half_rz_sync(__ubuf__ half* dst, __ubuf__ int16_t* src, uint32_t count);
678+ 
679+__aicore__ inline void asc_gather_datablock_sync(
680+ __ubuf__ uint16_t* dst, __ubuf__ uint16_t* src, __ubuf__ uint32_t* src_offset, uint16_t dst_repeat_stride,
681+ uint8_t dst_block_stride, uint8_t repeat);
682+ 
683+__aicore__ inline void asc_gather_datablock_sync(
684+ __ubuf__ uint32_t* dst, __ubuf__ uint32_t* src, __ubuf__ uint32_t* src_offset, uint16_t dst_repeat_stride,
685+ uint8_t dst_block_stride, uint8_t repeat);
686+ 
687+__aicore__ inline void asc_min_scalar_sync(__ubuf__ half* dst, __ubuf__ half* src, half value, uint32_t count);
688+ 
689+__aicore__ inline void asc_min_scalar_sync(__ubuf__ float* dst, __ubuf__ float* src, float value, uint32_t count);
690+ 
691+__aicore__ inline void asc_min_scalar_sync(__ubuf__ int16_t* dst, __ubuf__ int16_t* src, int16_t value, uint32_t count);
692+ 
693+__aicore__ inline void asc_min_scalar_sync(__ubuf__ int32_t* dst, __ubuf__ int32_t* src, int32_t value, uint32_t count);
694+ 
695+__aicore__ inline void asc_add_relu_sync(
696+ __ubuf__ int8_t* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint32_t count);
697+ 
698+__aicore__ inline void asc_add_relu_sync(
699+ __ubuf__ half* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint32_t count);
700+ 
701+__aicore__ inline void asc_add_relu_sync(
702+ __ubuf__ int8_t* dst, __ubuf__ int16_t* src0, __ubuf__ int16_t* src1, uint32_t count);
703+ 
704+__aicore__ inline void asc_gt_sync(
705+ __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
706+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
707+ 
708+__aicore__ inline void asc_gt_sync(
709+ __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
710+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
711+ 
712+__aicore__ inline void asc_gt_sync(
713+ __ubuf__ uint8_t* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride,
714+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
715+ uint8_t src1_repeat_stride);
716+ 
717+__aicore__ inline void asc_gt_sync(
718+ __ubuf__ uint8_t* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride,
719+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
720+ uint8_t src1_repeat_stride);
721+ 
722+__aicore__ inline void asc_half2uint8_sync(__ubuf__ uint8_t* dst, __ubuf__ half* src, uint32_t count);
723+ 
724+__aicore__ inline void asc_half2uint8_rna_sync(__ubuf__ uint8_t* dst, __ubuf__ half* src, uint32_t count);
725+ 
726+__aicore__ inline void asc_half2uint8_ru_sync(__ubuf__ uint8_t* dst, __ubuf__ half* src, uint32_t count);
727+ 
728+__aicore__ inline void asc_half2uint8_rd_sync(__ubuf__ uint8_t* dst, __ubuf__ half* src, uint32_t count);
729+ 
730+__aicore__ inline void asc_half2uint8_rn_sync(__ubuf__ uint8_t* dst, __ubuf__ half* src, uint32_t count);
731+ 
732+__aicore__ inline void asc_half2uint8_rz_sync(__ubuf__ uint8_t* dst, __ubuf__ half* src, uint32_t count);
733+ 
734+__aicore__ inline void asc_le_sync(
735+ __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
736+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
737+ 
738+__aicore__ inline void asc_le_sync(
739+ __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride, uint8_t src0_block_stride,
740+ uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride, uint8_t src1_repeat_stride);
741+ 
742+__aicore__ inline void asc_le_sync(
743+ __ubuf__ uint8_t* dst, __ubuf__ half* src0, __ubuf__ half* src1, uint8_t repeat, uint8_t dst_block_stride,
744+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
745+ uint8_t src1_repeat_stride);
746+ 
747+__aicore__ inline void asc_le_sync(
748+ __ubuf__ uint8_t* dst, __ubuf__ float* src0, __ubuf__ float* src1, uint8_t repeat, uint8_t dst_block_stride,
749+ uint8_t src0_block_stride, uint8_t src1_block_stride, uint8_t dst_repeat_stride, uint8_t src0_repeat_stride,
750+ uint8_t src1_repeat_stride);
751+ 
752+__aicore__ inline void asc_le_scalar_sync(
753+ __ubuf__ uint8_t* dst, __ubuf__ half* src, half value, uint8_t repeat, uint16_t dst_block_stride,
754+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
755+ 
756+__aicore__ inline void asc_le_scalar_sync(
757+ __ubuf__ uint8_t* dst, __ubuf__ float* src, float value, uint8_t repeat, uint16_t dst_block_stride,
758+ uint16_t src_block_stride, uint16_t dst_repeat_stride, uint16_t src_repeat_stride);
759+ 
760+__aicore__ inline void asc_pair_reduce_sum_sync(__ubuf__ half* dst, __ubuf__ half* src, uint32_t count);
761+ 
762+__aicore__ inline void asc_pair_reduce_sum_sync(__ubuf__ float* dst, __ubuf__ float* src, uint32_t count);
763+ 
764+__aicore__ inline void asc_copy_sync(__ubuf__ int16_t* dst, __ubuf__ int16_t* src, uint32_t count);
765+ 
766+__aicore__ inline void asc_copy_sync(__ubuf__ uint16_t* dst, __ubuf__ uint16_t* src, uint32_t count);
767+ 
768+__aicore__ inline void asc_copy_sync(__ubuf__ int32_t* dst, __ubuf__ int32_t* src, uint32_t count);
769+ 
770+__aicore__ inline void asc_copy_sync(__ubuf__ uint32_t* dst, __ubuf__ uint32_t* src, uint32_t count);
771+ 
772+__aicore__ inline void asc_copy_ub2ub_sync(__ubuf__ void* dst, __ubuf__ void* src, uint32_t size);
773+ 
774+__aicore__ inline void asc_copy_gm2ub_sync(__ubuf__ void* dst, __gm__ void* src, uint32_t size);
775+ 
776+__aicore__ inline void asc_copy_ub2gm_sync(__gm__ void* dst, __ubuf__ void* src, uint32_t size);
777+ 
778+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ int8_t* dst, __gm__ int8_t* src, uint32_t size);
779+ 
780+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ uint8_t* dst, __gm__ uint8_t* src, uint32_t size);
781+ 
782+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ half* dst, __gm__ half* src, uint32_t size);
783+ 
784+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ bfloat16_t* dst, __gm__ bfloat16_t* src, uint32_t size);
785+ 
786+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ int16_t* dst, __gm__ int16_t* src, uint32_t size);
787+ 
788+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ uint16_t* dst, __gm__ uint16_t* src, uint32_t size);
789+ 
790+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ float* dst, __gm__ float* src, uint32_t size);
791+ 
792+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ int32_t* dst, __gm__ int32_t* src, uint32_t size);
793+ 
794+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ uint32_t* dst, __gm__ uint32_t* src, uint32_t size);
795+ 
796+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint8_t* dst, __ubuf__ uint8_t* src, uint32_t size);
797+ 
798+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int8_t* dst, __ubuf__ int8_t* src, uint32_t size);
799+ 
800+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ half* dst, __ubuf__ half* src, uint32_t size);
801+ 
802+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint16_t* dst, __ubuf__ uint16_t* src, uint32_t size);
803+ 
804+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int16_t* dst, __ubuf__ int16_t* src, uint32_t size);
805+ 
806+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ bfloat16_t* dst, __ubuf__ bfloat16_t* src, uint32_t size);
807+ 
808+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint32_t* dst, __ubuf__ uint32_t* src, uint32_t size);
809+ 
810+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ float* dst, __ubuf__ float* src, uint32_t size);
811+ 
812+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int32_t* dst, __ubuf__ int32_t* src, uint32_t size);
813+ 
814+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ double* dst, __ubuf__ double* src, uint32_t size);
815+ 
816+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ int64_t* dst, __ubuf__ int64_t* src, uint32_t size);
817+ 
818+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ uint64_t* dst, __ubuf__ uint64_t* src, uint32_t size);
819+ 
820+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ hifloat8_t* dst, __gm__ hifloat8_t* src, uint32_t size);
821+ 
822+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ fp8_e5m2_t* dst, __gm__ fp8_e5m2_t* src, uint32_t size);
823+ 
824+__aicore__ inline void asc_copy_gm2ub_align_sync(__ubuf__ fp8_e4m3fn_t* dst, __gm__ fp8_e4m3fn_t* src, uint32_t size);
825+ 
826+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ hifloat8_t* dst, __ubuf__ hifloat8_t* src, uint32_t size);
827+ 
828+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ fp8_e5m2_t* dst, __ubuf__ fp8_e5m2_t* src, uint32_t size);
829+ 
830+__aicore__ inline void asc_copy_ub2gm_align_sync(__gm__ fp8_e4m3fn_t* dst, __ubuf__ fp8_e4m3fn_t* src, uint32_t size);
831+ 
832+__aicore__ inline void asc_copy_ub2l1_sync(__cbuf__ void* dst, __ubuf__ void* src, uint32_t size);
833+ 
834+#endif
835+ 
836+#if defined(UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H)
837+#undef ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS
838+#undef UNDEF_ASCENDC_C_API_INCLUDE_COMPILER_INTERNAL_HEADERS_ASCENDC_C_API_H
839+#endif
Rimpl/c_api/instr_impl/npu_arch_3510/utils_impl/utils_type.h→include/c_api/defs/type.h+15-10
Rimpl/c_api/instr_impl/npu_arch_2201/utils_impl/utils_type.h→include/c_api/reg_compute/reg_sync.h+17-11