已合并
vnpu: resolve a series of timing issues #139
任文杰创建于 8月25日
vnpu: resolve a series of timing issues #139
已合并
任文杰创建于 8月25日
共 34 个文件变更+2170-2544
@@ -526,6 +526,7 @@ typedef struct ka_sysinfo {
526#define ka_mm_iommu_get_domain_for_dev(dev) iommu_get_domain_for_dev(dev)526#define ka_mm_iommu_get_domain_for_dev(dev) iommu_get_domain_for_dev(dev)
527#define ka_mm_iommu_domain_alloc(bus) iommu_domain_alloc(bus)527#define ka_mm_iommu_domain_alloc(bus) iommu_domain_alloc(bus)
528#define ka_mm_iommu_group_get(dev) iommu_group_get(dev)528#define ka_mm_iommu_group_get(dev) iommu_group_get(dev)
529+#define ka_mm_iommu_group_put(group) iommu_group_put(group)
529#define ka_mm_iommu_detach_group(domain, group) iommu_detach_group(domain, group)530#define ka_mm_iommu_detach_group(domain, group) iommu_detach_group(domain, group)
530#define ka_mm_iommu_domain_free(domain) iommu_domain_free(domain)531#define ka_mm_iommu_domain_free(domain) iommu_domain_free(domain)
531#define ka_mm_put_iova_domain(iovad) put_iova_domain(iovad)532#define ka_mm_put_iova_domain(iovad) put_iova_domain(iovad)
@@ -903,4 +904,4 @@ int ka_walk_page_range_pte_lock(ka_vm_area_struct_t *vma, u64 start, u64 end, st
903#define ka_mm_virt_to_page(kaddr) virt_to_page(kaddr)904#define ka_mm_virt_to_page(kaddr) virt_to_page(kaddr)
904#define ka_mm_offset_in_page(p) offset_in_page(p)905#define ka_mm_offset_in_page(p) offset_in_page(p)
905 906 
906-#endif907+#endif
@@ -15,21 +15,21 @@ KERNEL_DIR=/lib/modules/$(UNAME)/build
15KERNEL_SOURCE_DIR=/lib/modules/$(UNAME)/source15KERNEL_SOURCE_DIR=/lib/modules/$(UNAME)/source
16 16 
17ifneq ($(TOP_DIR),)17ifneq ($(TOP_DIR),)
18- EXTRA_CFLAGS += -I$(TOP_DIR)/driver/driver/src/sdk_driver/kernel_adapt/include18+ ccflags-y += -I$(TOP_DIR)/driver/driver/src/sdk_driver/kernel_adapt/include
19endif19endif
20 20 
21ifeq ($(DAVINCI_HIAI_DKMS), y)21ifeq ($(DAVINCI_HIAI_DKMS), y)
22- EXTRA_CFLAGS += -I$(HIAI_DKMS_DIR)/kernel_adapt/include22+ ccflags-y += -I$(HIAI_DKMS_DIR)/kernel_adapt/include
23else23else
24- EXTRA_CFLAGS += -I$(PWD)/../kernel_adapt/include24+ ccflags-y += -I$(PWD)/../kernel_adapt/include
25endif25endif
26 26 
27ifeq ($(ENABLE_OPEN_SRC), y)27ifeq ($(ENABLE_OPEN_SRC), y)
28- EXTRA_CFLAGS += -I$(DRIVER_KERNEL_DIR)/kernel_adapt/include28+ ccflags-y += -I$(DRIVER_KERNEL_DIR)/kernel_adapt/include
29endif29endif
30 30 
31ifneq ($(NOT_SUPPORT_SP), y)31ifneq ($(NOT_SUPPORT_SP), y)
32- EXTRA_CFLAGS += -fstack-protector-all32+ ccflags-y += -fstack-protector-all
33endif33endif
34 34 
35ifeq ($(DAVINCI_TEST),y)35ifeq ($(DAVINCI_TEST),y)
@@ -19,78 +19,72 @@
19#include "vfio_ops.h"19#include "vfio_ops.h"
20#include "priv_ops.h"20#include "priv_ops.h"
21 21 
22-#define DAVINCI_PCI_BASE_CLASS 0xb22+#define DAVINCI_PCI_BASE_CLASS 0xb
23-#define DAVINCI_COMMON_CFG_COMMAND_IO_ENABLE 123+#define DAVINCI_COMMON_CFG_COMMAND_IO_ENABLE 1
24-#define DAVINCI_COMMON_CFG_COMMAND_MEM_ENABLE (1 << 1)24+#define DAVINCI_COMMON_CFG_COMMAND_MEM_ENABLE (1 << 1)
25-#define DAVINCI_COMMON_CFG_COMMAND_BUSMASTER_ENABLE (1 << 2)25+#define DAVINCI_COMMON_CFG_COMMAND_BUSMASTER_ENABLE (1 << 2)
26-#define DAVINCI_COMMON_CFG_COMMAND_PARERR_ENABLE (1 << 6)26+#define DAVINCI_COMMON_CFG_COMMAND_PARERR_ENABLE (1 << 6)
27-#define DAVINCI_COMMON_CFG_COMMAND_SERR_ENABLE (1 << 8)27+#define DAVINCI_COMMON_CFG_COMMAND_SERR_ENABLE (1 << 8)
28-#define DAVINCI_COMMON_CFG_COMMAND_DISINTX_ENABLE (1 << 10)28+#define DAVINCI_COMMON_CFG_COMMAND_DISINTX_ENABLE (1 << 10)
29-#define DAVINCI_COMMON_CFG_COMMAND (DAVINCI_COMMON_CFG_COMMAND_IO_ENABLE | \29+#define DAVINCI_COMMON_CFG_COMMAND \
30- DAVINCI_COMMON_CFG_COMMAND_MEM_ENABLE | \30+ (DAVINCI_COMMON_CFG_COMMAND_IO_ENABLE | DAVINCI_COMMON_CFG_COMMAND_MEM_ENABLE | \
31- DAVINCI_COMMON_CFG_COMMAND_BUSMASTER_ENABLE | \31+ DAVINCI_COMMON_CFG_COMMAND_BUSMASTER_ENABLE | DAVINCI_COMMON_CFG_COMMAND_PARERR_ENABLE | \
32- DAVINCI_COMMON_CFG_COMMAND_PARERR_ENABLE | \32+ DAVINCI_COMMON_CFG_COMMAND_SERR_ENABLE | DAVINCI_COMMON_CFG_COMMAND_DISINTX_ENABLE)
33- DAVINCI_COMMON_CFG_COMMAND_SERR_ENABLE | \
34- DAVINCI_COMMON_CFG_COMMAND_DISINTX_ENABLE)
35 33 
36-#define DAVINCI_COMMON_CFG_STATUS_CAP_ENABLE (1 << 4)34+#define DAVINCI_COMMON_CFG_STATUS_CAP_ENABLE (1 << 4)
37-#define DAVINCI_COMMON_CFG_STATUS DAVINCI_COMMON_CFG_STATUS_CAP_ENABLE35+#define DAVINCI_COMMON_CFG_STATUS DAVINCI_COMMON_CFG_STATUS_CAP_ENABLE
38-#define DAVINCI_COMMON_CFG_REV_ID 0x7136+#define DAVINCI_COMMON_CFG_REV_ID 0x71
39-#define DAVINCI_COMMON_CFG_BASE_CLASS 0x1237+#define DAVINCI_COMMON_CFG_BASE_CLASS 0x12
40-#define DAVINCI_COMMON_CFG_CACHE_LINE_SIZE 0x838+#define DAVINCI_COMMON_CFG_CACHE_LINE_SIZE 0x8
41-#define DAVINCI_COMMON_CFG_BAR_64B (1 << 2)39+#define DAVINCI_COMMON_CFG_BAR_64B (1 << 2)
42-#define DAVINCI_COMMON_CFG_BAR_PREFETCHABLE (1 << 3)40+#define DAVINCI_COMMON_CFG_BAR_PREFETCHABLE (1 << 3)
43-#define DAVINCI_COMMON_CFG_BAR_0 (DAVINCI_COMMON_CFG_BAR_64B | \41+#define DAVINCI_COMMON_CFG_BAR_0 (DAVINCI_COMMON_CFG_BAR_64B | DAVINCI_COMMON_CFG_BAR_PREFETCHABLE)
44- DAVINCI_COMMON_CFG_BAR_PREFETCHABLE)42+#define DAVINCI_COMMON_CFG_BAR_2 (DAVINCI_COMMON_CFG_BAR_64B)
45-#define DAVINCI_COMMON_CFG_BAR_2 (DAVINCI_COMMON_CFG_BAR_64B)43+#define DAVINCI_COMMON_CFG_BAR_4 (DAVINCI_COMMON_CFG_BAR_64B | DAVINCI_COMMON_CFG_BAR_PREFETCHABLE)
46-#define DAVINCI_COMMON_CFG_BAR_4 (DAVINCI_COMMON_CFG_BAR_64B | \44+#define DAVINCI_COMMON_CFG_SUBSYSTEM_ID 0x01000300
47- DAVINCI_COMMON_CFG_BAR_PREFETCHABLE)45+#define DAVINCI_COMMON_CFG_INT_LINE 0xff
48-#define DAVINCI_COMMON_CFG_SUBSYSTEM_ID 0x0100030046+#define DAVINCI_COMMON_CFG_INT_PIN 0x1
49-#define DAVINCI_COMMON_CFG_INT_LINE 0xff
50-#define DAVINCI_COMMON_CFG_INT_PIN 0x1
51 47 
52-#define DAVINCI_PCI_EXP 0x4048+#define DAVINCI_PCI_EXP 0x40
53-#define DAVINCI_PCI_EXP_NEXT_CAP_POINTER (DAVINCI_PCI_EXP + 1)49+#define DAVINCI_PCI_EXP_NEXT_CAP_POINTER (DAVINCI_PCI_EXP + 1)
54-#define DAVINCI_PCI_EXP_FLAGS (DAVINCI_PCI_EXP + PCI_EXP_FLAGS)50+#define DAVINCI_PCI_EXP_FLAGS (DAVINCI_PCI_EXP + PCI_EXP_FLAGS)
55-#define DAVINCI_PCI_EXP_DEVCAP (DAVINCI_PCI_EXP + PCI_EXP_DEVCAP)51+#define DAVINCI_PCI_EXP_DEVCAP (DAVINCI_PCI_EXP + PCI_EXP_DEVCAP)
56-#define DAVINCI_PCI_EXP_DEVCTL (DAVINCI_PCI_EXP + PCI_EXP_DEVCTL)52+#define DAVINCI_PCI_EXP_DEVCTL (DAVINCI_PCI_EXP + PCI_EXP_DEVCTL)
57-#define DAVINCI_PCI_EXP_LNKCAP (DAVINCI_PCI_EXP + PCI_EXP_LNKCAP)53+#define DAVINCI_PCI_EXP_LNKCAP (DAVINCI_PCI_EXP + PCI_EXP_LNKCAP)
58-#define DAVINCI_PCI_EXP_LNKCTL (DAVINCI_PCI_EXP + PCI_EXP_LNKCTL)54+#define DAVINCI_PCI_EXP_LNKCTL (DAVINCI_PCI_EXP + PCI_EXP_LNKCTL)
59-#define DAVINCI_PCI_EXP_LNKSTA (DAVINCI_PCI_EXP + PCI_EXP_LNKSTA)55+#define DAVINCI_PCI_EXP_LNKSTA (DAVINCI_PCI_EXP + PCI_EXP_LNKSTA)
60-#define DAVINCI_PCI_EXP_DEVCAP2 (DAVINCI_PCI_EXP + PCI_EXP_DEVCAP2)56+#define DAVINCI_PCI_EXP_DEVCAP2 (DAVINCI_PCI_EXP + PCI_EXP_DEVCAP2)
61-#define DAVINCI_PCI_EXP_LNKCAP2 (DAVINCI_PCI_EXP + PCI_EXP_LNKCAP2)57+#define DAVINCI_PCI_EXP_LNKCAP2 (DAVINCI_PCI_EXP + PCI_EXP_LNKCAP2)
62-#define DAVINCI_PCI_EXP_LNKCTL2 (DAVINCI_PCI_EXP + PCI_EXP_LNKCTL2)58+#define DAVINCI_PCI_EXP_LNKCTL2 (DAVINCI_PCI_EXP + PCI_EXP_LNKCTL2)
63-#define DAVINCI_PCI_EXP_LNKSTA2 (DAVINCI_PCI_EXP + PCI_EXP_LNKSTA2)59+#define DAVINCI_PCI_EXP_LNKSTA2 (DAVINCI_PCI_EXP + PCI_EXP_LNKSTA2)
64-#define DAVINCI_PCI_EXP_SLTCTL2 (DAVINCI_PCI_EXP + PCI_EXP_SLTCTL2)60+#define DAVINCI_PCI_EXP_SLTCTL2 (DAVINCI_PCI_EXP + PCI_EXP_SLTCTL2)
65 61 
66-#define DAVINCI_EXP_CAP_CFG_CAP_REG 0x000262+#define DAVINCI_EXP_CAP_CFG_CAP_REG 0x0002
67-#define DAVINCI_EXP_CAP_CFG_DEV_CAP_REG 0x10008fe263+#define DAVINCI_EXP_CAP_CFG_DEV_CAP_REG 0x10008fe2
68-#define DAVINCI_EXP_CAP_CFG_DEV_CONTROL_REG 0x291f64+#define DAVINCI_EXP_CAP_CFG_DEV_CONTROL_REG 0x291f
69-#define DAVINCI_EXP_CAP_CFG_LINK_CAP_REG 0x0043f04365+#define DAVINCI_EXP_CAP_CFG_LINK_CAP_REG 0x0043f043
70-#define DAVINCI_EXP_CAP_CFG_LINK_CONTROL_REG 0x000866+#define DAVINCI_EXP_CAP_CFG_LINK_CONTROL_REG 0x0008
71-#define DAVINCI_EXP_CAP_CFG_LINK_STATUS_REG 0x004367+#define DAVINCI_EXP_CAP_CFG_LINK_STATUS_REG 0x0043
72-#define DAVINCI_EXP_CAP_CFG_DEV_2_CAP_REG 0x0010000068+#define DAVINCI_EXP_CAP_CFG_DEV_2_CAP_REG 0x00100000
73-#define DAVINCI_EXP_CAP_CFG_LINK_2_CAP_REG 0x0000000e69+#define DAVINCI_EXP_CAP_CFG_LINK_2_CAP_REG 0x0000000e
74-#define DAVINCI_EXP_CAP_CFG_LINK_2_CONTROL_REG 0x000370+#define DAVINCI_EXP_CAP_CFG_LINK_2_CONTROL_REG 0x0003
75-#define DAVINCI_EXP_CAP_CFG_LINK_2_STATUS_REG 0x001e71+#define DAVINCI_EXP_CAP_CFG_LINK_2_STATUS_REG 0x001e
76-#define DAVINCI_EXP_CAP_CFG_SLOT_2_CONTROL_REG 0x001e72+#define DAVINCI_EXP_CAP_CFG_SLOT_2_CONTROL_REG 0x001e
77 73 
78-#define DAVINCI_MSIX_CAP_CFG_TABLE_SIZE 0x7f74+#define DAVINCI_MSIX_CAP_CFG_TABLE_SIZE 0x7f
79-#define DAVINCI_MSIX_CAP_CFG_TABLE_SIZE_VF 0xff75+#define DAVINCI_MSIX_CAP_CFG_TABLE_SIZE_VF 0xff
80-#define DAVINCI_MSIX_CAP_CFG_MSIX_ENABLE (1 << 15)76+#define DAVINCI_MSIX_CAP_CFG_MSIX_ENABLE (1 << 15)
81-#define DAVINCI_MSIX_CAP_CFG_CONTROL (DAVINCI_MSIX_CAP_CFG_TABLE_SIZE | \77+#define DAVINCI_MSIX_CAP_CFG_CONTROL (DAVINCI_MSIX_CAP_CFG_TABLE_SIZE | DAVINCI_MSIX_CAP_CFG_MSIX_ENABLE)
82- DAVINCI_MSIX_CAP_CFG_MSIX_ENABLE)78+#define DAVINCI_MSIX_CAP_CFG_CONTROL_VF (DAVINCI_MSIX_CAP_CFG_TABLE_SIZE_VF | DAVINCI_MSIX_CAP_CFG_MSIX_ENABLE)
83-#define DAVINCI_MSIX_CAP_CFG_CONTROL_VF (DAVINCI_MSIX_CAP_CFG_TABLE_SIZE_VF | \79+#define DAVINCI_MSIX_CAP_CFG_MSIX_TABLE_OFFSET 0x00010000
84- DAVINCI_MSIX_CAP_CFG_MSIX_ENABLE)80+#define DAVINCI_MSIX_CAP_CFG_PBA_TABLE_OFFSET 0x00014000
85-#define DAVINCI_MSIX_CAP_CFG_MSIX_TABLE_OFFSET 0x0001000081+#define DAVINCI_MSIX_CAP_CFG_MSIX_TABLE_OFFSET_VF 0x7000000
86-#define DAVINCI_MSIX_CAP_CFG_PBA_TABLE_OFFSET 0x0001400082+#define DAVINCI_MSIX_CAP_CFG_PBA_TABLE_OFFSET_VF 0x7004000
87-#define DAVINCI_MSIX_CAP_CFG_MSIX_TABLE_OFFSET_VF 0x7000000
88-#define DAVINCI_MSIX_CAP_CFG_PBA_TABLE_OFFSET_VF 0x7004000
89 83 
90-#define DAVINCI_PCI_CFG_RW 0xFF84+#define DAVINCI_PCI_CFG_RW 0xFF
91-#define DAVINCI_PCI_COMMAND_HI_RW_MASK 0x0785+#define DAVINCI_PCI_COMMAND_HI_RW_MASK 0x07
92-#define DAVINCI_PCI_CFG_RO 0x0086+#define DAVINCI_PCI_CFG_RO 0x00
93-#define DAVINCI_PCI_STATUS_HI_RW1C 0xF987+#define DAVINCI_PCI_STATUS_HI_RW1C 0xF9
94 88 
95struct hw_vdavinci_cfg_init_ops {89struct hw_vdavinci_cfg_init_ops {
96 unsigned short device;90 unsigned short device;
@@ -62,21 +62,23 @@ void hw_dvt_debugfs_add_vdavinci(struct hw_vdavinci *vdavinci)
62 name = ka_mm_kzalloc(MAX_NAME_LEN, KA_GFP_KERNEL);62 name = ka_mm_kzalloc(MAX_NAME_LEN, KA_GFP_KERNEL);
63 if (!name) {63 if (!name) {
64 ret = -ENOMEM;64 ret = -ENOMEM;
65- vascend_err(vdavinci_to_dev(vdavinci), "add debugfs failed, "65+ vascend_err(vdavinci_to_dev(vdavinci),
66- "malloc name fialed, vid: %u, ret: %d\n", vdavinci->id, ret);66+ "add debugfs failed, "
67+ "malloc name fialed, vid: %u, ret: %d\n",
68+ vdavinci->id, ret);
67 return;69 return;
68 }70 }
69 71 
70 if (vdavinci->dvt->dvt_dev.dev_num > 1) {72 if (vdavinci->dvt->dvt_dev.dev_num > 1) {
71- ret = snprintf_s(name, MAX_NAME_LEN, MAX_NAME_LEN - 1, "vascend_p%u_%u",73+ ret = snprintf_s(name, MAX_NAME_LEN, MAX_NAME_LEN - 1, "vascend_p%u_%u", vdavinci->dev.dev_index, vdavinci->id);
72- vdavinci->dev.dev_index, vdavinci->id);
73 } else {74 } else {
74- ret = snprintf_s(name, MAX_NAME_LEN, MAX_NAME_LEN - 1, "vascend%u",75+ ret = snprintf_s(name, MAX_NAME_LEN, MAX_NAME_LEN - 1, "vascend%u", vdavinci->id);
75- vdavinci->id);
76 }76 }
77 if (ret < 0) {77 if (ret < 0) {
78- vascend_err(vdavinci_to_dev(vdavinci), "add debugfs failed, "78+ vascend_err(vdavinci_to_dev(vdavinci),
79- "vid: %u, ret: %d\n", vdavinci->id, ret);79+ "add debugfs failed, "
80+ "vid: %u, ret: %d\n",
81+ vdavinci->id, ret);
80 goto out;82 goto out;
81 }83 }
82 84 
@@ -85,10 +87,8 @@ void hw_dvt_debugfs_add_vdavinci(struct hw_vdavinci *vdavinci)
85 goto out;87 goto out;
86 }88 }
87 89 
88- ka_debugfs_create_u64("notify_count", 0400, vdavinci->debugfs.debugfs,90+ ka_debugfs_create_u64("notify_count", 0400, vdavinci->debugfs.debugfs, &vdavinci->debugfs.notify_count);
89- &vdavinci->debugfs.notify_count);91+ ka_fs_debugfs_create_file("msix_count", 0400, vdavinci->debugfs.debugfs, vdavinci, &vdavinci_msix_count_fops);
90- ka_fs_debugfs_create_file("msix_count", 0400, vdavinci->debugfs.debugfs, vdavinci,
91- &vdavinci_msix_count_fops);
92out:92out:
93 ka_mm_kfree(name);93 ka_mm_kfree(name);
94}94}
@@ -123,6 +123,7 @@ void hw_dvt_debugfs_init(struct hw_dvt *dvt)
123 ka_base_kref_init(&debugfs_ref);123 ka_base_kref_init(&debugfs_ref);
124 vascend_debugfs_root = vdavinci_debugfs_create_dir("vascend", NULL);124 vascend_debugfs_root = vdavinci_debugfs_create_dir("vascend", NULL);
125 if (vascend_debugfs_root == NULL) {125 if (vascend_debugfs_root == NULL) {
126+ ka_task_mutex_unlock(&debugfs_vascend_lock);
126 goto debugfs_root;127 goto debugfs_root;
127 }128 }
128 } else {129 } else {
@@ -133,16 +134,20 @@ void hw_dvt_debugfs_init(struct hw_dvt *dvt)
133 name = ka_mm_kzalloc(MAX_NAME_LEN, KA_GFP_KERNEL);134 name = ka_mm_kzalloc(MAX_NAME_LEN, KA_GFP_KERNEL);
134 if (!name) {135 if (!name) {
135 ret = -ENOMEM;136 ret = -ENOMEM;
136- vascend_err(vdavinci_priv->dev, "debugfs init failed, "137+ vascend_err(vdavinci_priv->dev,
137- "malloc name fialed, ret: %d\n", ret);138+ "debugfs init failed, "
139+ "malloc name fialed, ret: %d\n",
140+ ret);
138 goto debugfs_root;141 goto debugfs_root;
139 }142 }
140 143 
141- ret = snprintf_s(name, MAX_NAME_LEN, MAX_NAME_LEN - 1, "vascend_%02x_%02x_%u",144+ ret = snprintf_s(name, MAX_NAME_LEN, MAX_NAME_LEN - 1, "vascend_%02x_%02x_%u", pdev->bus->number,
142- pdev->bus->number, KA_PCI_SLOT(pdev->devfn), KA_PCI_FUNC(pdev->devfn));145+ KA_PCI_SLOT(pdev->devfn), KA_PCI_FUNC(pdev->devfn));
143 if (ret < 0) {146 if (ret < 0) {
144- vascend_err(vdavinci_priv->dev, "debugfs init failed, "147+ vascend_err(vdavinci_priv->dev,
145- "snprientf_s fialed, ret: %d\n", ret);148+ "debugfs init failed, "
149+ "snprientf_s fialed, ret: %d\n",
150+ ret);
146 goto free_name;151 goto free_name;
147 }152 }
148 153 
@@ -19,13 +19,13 @@
19/* VDAVINCI_PAGES_OF_SCHEDULE = 1G19/* VDAVINCI_PAGES_OF_SCHEDULE = 1G
20 * CONFIG_PREEMPT is not set and the time of20 * CONFIG_PREEMPT is not set and the time of
21 * dealing pin/map pages MEM is less than watchdog_thresh(10s) */21 * dealing pin/map pages MEM is less than watchdog_thresh(10s) */
22-#define VDAVINCI_PAGES_OF_SCHEDULE (((unsigned long)1 * (1 << 30)) / KA_MM_PAGE_SIZE)22+#define VDAVINCI_PAGES_OF_SCHEDULE (((unsigned long)1 * (1 << 30)) / KA_MM_PAGE_SIZE)
23-#define VDAVINCI_PIN_PAGES_OF_SCHEDULE (VDAVINCI_PAGES_OF_SCHEDULE * 4)23+#define VDAVINCI_PIN_PAGES_OF_SCHEDULE (VDAVINCI_PAGES_OF_SCHEDULE * 4)
24-#define VDAVINCI_MAP_PAGES_OF_SCHEDULE (VDAVINCI_PAGES_OF_SCHEDULE * 16)24+#define VDAVINCI_MAP_PAGES_OF_SCHEDULE (VDAVINCI_PAGES_OF_SCHEDULE * 16)
25 25 
26-#define VDAVINCI_TIME_OF_SCHEDULE 1 /* ms */26+#define VDAVINCI_TIME_OF_SCHEDULE 1 /* ms */
27-#define VDAVINCI_PIN_TIME_OF_SCHEDULE (VDAVINCI_TIME_OF_SCHEDULE * 100)27+#define VDAVINCI_PIN_TIME_OF_SCHEDULE (VDAVINCI_TIME_OF_SCHEDULE * 100)
28-#define VDAVINCI_MAP_TIME_OF_SCHEDULE (VDAVINCI_TIME_OF_SCHEDULE * 200)28+#define VDAVINCI_MAP_TIME_OF_SCHEDULE (VDAVINCI_TIME_OF_SCHEDULE * 200)
29 29 
30struct vdavinci_iova_info {30struct vdavinci_iova_info {
31 /* sg table */31 /* sg table */
@@ -42,43 +42,23 @@ struct vdavinci_iova_info {
42void hw_vdavinci_unpin_pages(struct hw_vdavinci *vdavinci);42void hw_vdavinci_unpin_pages(struct hw_vdavinci *vdavinci);
43void hw_vdavinci_dma_pool_uninit(struct hw_vdavinci *vdavinci);43void hw_vdavinci_dma_pool_uninit(struct hw_vdavinci *vdavinci);
44int hw_vdavinci_dma_pool_init(struct hw_vdavinci *vdavinci);44int hw_vdavinci_dma_pool_init(struct hw_vdavinci *vdavinci);
45-void hw_vdavinci_unplug_ram(struct hw_vdavinci *vdavinci,45+void hw_vdavinci_unplug_ram(struct hw_vdavinci *vdavinci, unsigned long start_gfn, unsigned long size);
46- unsigned long start_gfn, unsigned long size);
47void hw_vdavinci_put_iova(ka_sg_table_t *dma_sgt);46void hw_vdavinci_put_iova(ka_sg_table_t *dma_sgt);
48-int hw_vdavinci_get_iova(struct hw_vdavinci *vdavinci,47+int hw_vdavinci_get_iova(struct hw_vdavinci *vdavinci, unsigned long gfn, unsigned long size, ka_sg_table_t **dma_sgt);
49- unsigned long gfn, unsigned long size,48+int hw_vdavinci_get_iova_batch(struct hw_vdavinci *vdavinci, unsigned long *gfn, unsigned long *dma_addr,
50- ka_sg_table_t **dma_sgt);
51-int hw_vdavinci_get_iova_batch(struct hw_vdavinci *vdavinci,
52- unsigned long *gfn, unsigned long *dma_addr,
53 unsigned long count);49 unsigned long count);
54-int hw_vdavinci_get_iova_sg(struct hw_vdavinci *vdavinci,50+int hw_vdavinci_get_iova_sg(struct hw_vdavinci *vdavinci, struct vm_dom_info *vm_dom, unsigned long gfn,
55- struct vm_dom_info *vm_dom,51+ unsigned long size, ka_sg_table_t **dma_sgt);
56- unsigned long gfn, unsigned long size,52+int hw_vdavinci_get_iova_array(struct hw_vdavinci *vdavinci, struct vm_dom_info *vm_dom, unsigned long *gfn,
57- ka_sg_table_t **dma_sgt);53+ unsigned long *dma_addr, unsigned long count);
58-int hw_vdavinci_get_iova_array(struct hw_vdavinci *vdavinci,54+int vf_get_iova_sg(struct hw_vdavinci *vdavinci, struct vm_dom_info *vm_dom, unsigned long gfn, unsigned long size,
59- struct vm_dom_info *vm_dom,
60- unsigned long *gfn,
61- unsigned long *dma_addr,
62- unsigned long count);
63-int vf_get_iova_sg(struct hw_vdavinci *vdavinci,
64- struct vm_dom_info *vm_dom,
65- unsigned long gfn, unsigned long size,
66 ka_sg_table_t **dma_sgt);55 ka_sg_table_t **dma_sgt);
67-int vf_get_iova_array(struct hw_vdavinci *vdavinci,56+int vf_get_iova_array(struct hw_vdavinci *vdavinci, struct vm_dom_info *vm_dom, unsigned long *gfn,
68- struct vm_dom_info *vm_dom,57+ unsigned long *dma_addr, unsigned long count);
69- unsigned long *gfn,
70- unsigned long *dma_addr,
71- unsigned long count);
72void hw_vdavinci_iommu_detach_group(struct hw_vdavinci *vdavinci);58void hw_vdavinci_iommu_detach_group(struct hw_vdavinci *vdavinci);
73int hw_vdavinci_iommu_attach_group(struct hw_vdavinci *vdavinci);59int hw_vdavinci_iommu_attach_group(struct hw_vdavinci *vdavinci);
74-bool hw_vdavinci_scheduled(struct hw_vdavinci *vdavinci,60+bool hw_vdavinci_scheduled(struct hw_vdavinci *vdavinci, unsigned long current_pages, unsigned long max_pages,
75- unsigned long current_pages,61+ unsigned int timeout, ka_page_t *page);
76- unsigned long max_pages,62+bool is_vm_pfn_valid(ka_device_t *dev, unsigned long pfn, unsigned long size);
77- unsigned int timeout,63+struct ram_range_info *get_ram_range_by_gfn(struct vm_dom_info *vm_dom, unsigned long gfn, unsigned long size);
78- ka_page_t *page);
79-bool is_vm_pfn_valid(ka_device_t *dev,
80- unsigned long pfn, unsigned long size);
81-struct ram_range_info *get_ram_range_by_gfn(struct vm_dom_info *vm_dom,
82- unsigned long gfn,
83- unsigned long size);
84#endif64#endif
@@ -17,15 +17,11 @@
17#include "dma_pool.h"17#include "dma_pool.h"
18#include "dma_pool_map.h"18#include "dma_pool_map.h"
19 19 
20-STATIC void dev_map_scheduled(struct hw_vdavinci *vdavinci,20+STATIC void dev_map_scheduled(struct hw_vdavinci *vdavinci, unsigned long *count)
21- unsigned long *count)
22{21{
23 (*count)++;22 (*count)++;
24- if (hw_vdavinci_scheduled(vdavinci,23+ if (hw_vdavinci_scheduled(vdavinci, (*count) * KA_VFIO_PIN_PAGES_MAX_ENTRIES, VDAVINCI_MAP_PAGES_OF_SCHEDULE,
25- (*count) * KA_VFIO_PIN_PAGES_MAX_ENTRIES,24+ VDAVINCI_MAP_TIME_OF_SCHEDULE, NULL)) {
26- VDAVINCI_MAP_PAGES_OF_SCHEDULE,
27- VDAVINCI_MAP_TIME_OF_SCHEDULE,
28- NULL)) {
29 (*count) = 0;25 (*count) = 0;
30 }26 }
31}27}
@@ -46,8 +42,7 @@ STATIC void dev_unmap_2m(ka_device_t *dev, ka_sg_table_t *dma_sgt)
46 ka_mm_kfree(dma_sgt);42 ka_mm_kfree(dma_sgt);
47}43}
48 44 
49-STATIC int dev_map_2m(ka_device_t *dev, unsigned long gfn,45+STATIC int dev_map_2m(ka_device_t *dev, unsigned long gfn, ka_sg_table_t **dma_sgt,
50- ka_sg_table_t **dma_sgt,
51 struct page_info_list *dma_page_list, unsigned long size)46 struct page_info_list *dma_page_list, unsigned long size)
52{47{
53 int ret;48 int ret;
@@ -65,14 +60,15 @@ STATIC int dev_map_2m(ka_device_t *dev, unsigned long gfn,
65 60 
66 ret = ka_base_sg_alloc_table(*dma_sgt, dma_page_list->elem_num, KA_GFP_KERNEL);61 ret = ka_base_sg_alloc_table(*dma_sgt, dma_page_list->elem_num, KA_GFP_KERNEL);
67 if (ret) {62 if (ret) {
68- vascend_err(dev, "ka_base_sg_alloc_table return error result, ret: %d, sg_len: %u",63+ vascend_err(dev, "ka_base_sg_alloc_table return error result, ret: %d, sg_len: %u", ret,
69- ret, dma_page_list->elem_num);64+ dma_page_list->elem_num);
70 ret = -ENOMEM;65 ret = -ENOMEM;
71 goto err_free_sgt;66 goto err_free_sgt;
72 }67 }
73 68 
74 sgl = (*dma_sgt)->sgl;69 sgl = (*dma_sgt)->sgl;
75- ka_list_for_each_entry(dma_page_info, &dma_page_list->head, list) {70+ ka_list_for_each_entry(dma_page_info, &dma_page_list->head, list)
71+ {
76 ka_base_sg_set_page(sgl, dma_page_info->page, dma_page_info->length, 0);72 ka_base_sg_set_page(sgl, dma_page_info->page, dma_page_info->length, 0);
77 sgl = ka_base_sg_next(sgl);73 sgl = ka_base_sg_next(sgl);
78 }74 }
@@ -93,8 +89,7 @@ err_free_sgt:
93 return ret;89 return ret;
94}90}
95 91 
96-void dev_dma_unmap_ram_range(struct hw_vdavinci *vdavinci,92+void dev_dma_unmap_ram_range(struct hw_vdavinci *vdavinci, struct ram_range_info *ram_info)
97- struct ram_range_info *ram_info)
98{93{
99 int i;94 int i;
100 bool found = false;95 bool found = false;
@@ -107,7 +102,8 @@ void dev_dma_unmap_ram_range(struct hw_vdavinci *vdavinci,
107 if (ka_list_empty(&(vdavinci->vdev.dev_dma_info_list_head))) {102 if (ka_list_empty(&(vdavinci->vdev.dev_dma_info_list_head))) {
108 return;103 return;
109 }104 }
110- ka_list_for_each_safe(pos, next, &(vdavinci->vdev.dev_dma_info_list_head)) {105+ ka_list_for_each_safe(pos, next, &(vdavinci->vdev.dev_dma_info_list_head))
106+ {
111 dma_info = ka_list_entry(pos, struct dev_dma_info, list);107 dma_info = ka_list_entry(pos, struct dev_dma_info, list);
112 if (ram_info != dma_info->ram_info) {108 if (ram_info != dma_info->ram_info) {
113 continue;109 continue;
@@ -119,8 +115,10 @@ void dev_dma_unmap_ram_range(struct hw_vdavinci *vdavinci,
119 dev_unmap_2m(dev, dev_dma_sgt->dma_sgt);115 dev_unmap_2m(dev, dev_dma_sgt->dma_sgt);
120 ka_mm_kfree(dev_dma_sgt);116 ka_mm_kfree(dev_dma_sgt);
121 }117 }
118+ ka_mm_kfree(dma_info->sgt_array);
122 ka_mm_kfree(dma_info);119 ka_mm_kfree(dma_info);
123 found = true;120 found = true;
121+ break;
124 }122 }
125 if (!found) {123 if (!found) {
126 return;124 return;
@@ -128,17 +126,14 @@ void dev_dma_unmap_ram_range(struct hw_vdavinci *vdavinci,
128 ka_base_atomic_dec(&ram_info->map_count);126 ka_base_atomic_dec(&ram_info->map_count);
129}127}
130 128 
131-STATIC struct dev_dma_sgt *dev_map_sgt_2m(struct hw_vdavinci *vdavinci,129+STATIC struct dev_dma_sgt *dev_map_sgt_2m(struct hw_vdavinci *vdavinci, struct dma_info_2m *dma_array_node)
132- struct dma_info_2m *dma_array_node)
133{130{
134 int ret = 0;131 int ret = 0;
135 ka_sg_table_t *dma_sgt = NULL;132 ka_sg_table_t *dma_sgt = NULL;
136 struct dev_dma_sgt *dev_dma_sgt = NULL;133 struct dev_dma_sgt *dev_dma_sgt = NULL;
137 ka_device_t *dev = vdavinci_get_device(vdavinci);134 ka_device_t *dev = vdavinci_get_device(vdavinci);
138 135 
139- ret = dev_map_2m(dev, dma_array_node->gfn, &dma_sgt,136+ ret = dev_map_2m(dev, dma_array_node->gfn, &dma_sgt, &dma_array_node->dma_page_list, dma_array_node->size);
140- &dma_array_node->dma_page_list,
141- dma_array_node->size);
142 if (ret != 0) {137 if (ret != 0) {
143 goto out;138 goto out;
144 }139 }
@@ -159,13 +154,11 @@ STATIC struct dev_dma_sgt *dev_map_sgt_2m(struct hw_vdavinci *vdavinci,
159free:154free:
160 dev_unmap_2m(dev, dma_sgt);155 dev_unmap_2m(dev, dma_sgt);
161out:156out:
162- vascend_err(dev, "dma map page failed, ret: %d, size: 0x%lx\n",157+ vascend_err(dev, "dma map page failed, ret: %d, size: 0x%lx\n", ret, dma_array_node->size);
163- ret, dma_array_node->size);
164 return NULL;158 return NULL;
165}159}
166 160 
167-int dev_dma_map_ram_range(struct hw_vdavinci *vdavinci,161+int dev_dma_map_ram_range(struct hw_vdavinci *vdavinci, struct ram_range_info *ram_info)
168- struct ram_range_info *ram_info)
169{162{
170 int ret = 0, i = 0, j = 0;163 int ret = 0, i = 0, j = 0;
171 unsigned long count = 0;164 unsigned long count = 0;
@@ -175,8 +168,8 @@ int dev_dma_map_ram_range(struct hw_vdavinci *vdavinci,
175 ka_device_t *dev = vdavinci_get_device(vdavinci);168 ka_device_t *dev = vdavinci_get_device(vdavinci);
176 struct dev_dma_info *dma_info = NULL;169 struct dev_dma_info *dma_info = NULL;
177 170 
178- sgt_array = (struct dev_dma_sgt **)171+ sgt_array = (struct dev_dma_sgt **)ka_mm_kzalloc(sizeof(struct dev_dma_sgt *) * ram_info->dma_array_len,
179- ka_mm_kzalloc(sizeof(struct dev_dma_sgt *) * ram_info->dma_array_len, KA_GFP_KERNEL);172+ KA_GFP_KERNEL);
180 if (sgt_array == NULL) {173 if (sgt_array == NULL) {
181 return -ENOMEM;174 return -ENOMEM;
182 }175 }
@@ -215,14 +208,14 @@ free_sgt:
215 return ret;208 return ret;
216}209}
217 210 
218-STATIC void vf_unmap_2m(ka_device_t *dev, ka_dma_addr_t base_2m_iova,211+STATIC void vf_unmap_2m(ka_device_t *dev, ka_dma_addr_t base_2m_iova, struct page_info_list *dma_page_list)
219- struct page_info_list *dma_page_list)
220{212{
221 struct page_info_entry *dma_page_info = NULL;213 struct page_info_entry *dma_page_info = NULL;
222 ka_list_head_t *pos = NULL, *next = NULL;214 ka_list_head_t *pos = NULL, *next = NULL;
223 ka_dma_addr_t iova = base_2m_iova;215 ka_dma_addr_t iova = base_2m_iova;
224 216 
225- ka_list_for_each_safe(pos, next, &(dma_page_list->head)) {217+ ka_list_for_each_safe(pos, next, &(dma_page_list->head))
218+ {
226 dma_page_info = ka_list_entry(pos, struct page_info_entry, list);219 dma_page_info = ka_list_entry(pos, struct page_info_entry, list);
227 vdavinci_iommu_unmap(dev, iova, dma_page_info->length);220 vdavinci_iommu_unmap(dev, iova, dma_page_info->length);
228 iova += dma_page_info->length;221 iova += dma_page_info->length;
@@ -234,9 +227,7 @@ STATIC void vf_unmap_2m(ka_device_t *dev, ka_dma_addr_t base_2m_iova,
234 * addresses. Then you can use this function to convert the pfn address to the iova227 * addresses. Then you can use this function to convert the pfn address to the iova
235 * address of the corresponding pcie device.228 * address of the corresponding pcie device.
236 */229 */
237-STATIC int vf_map_2m(ka_device_t *dev,230+STATIC int vf_map_2m(ka_device_t *dev, ka_dma_addr_t base_2m_iova, struct page_info_list *dma_page_list, int prot)
238- ka_dma_addr_t base_2m_iova, struct page_info_list *dma_page_list,
239- int prot)
240{231{
241 struct page_info_entry *dma_page_info = NULL;232 struct page_info_entry *dma_page_info = NULL;
242 struct page_info_entry *dma_page_info_err = NULL;233 struct page_info_entry *dma_page_info_err = NULL;
@@ -248,7 +239,8 @@ STATIC int vf_map_2m(ka_device_t *dev,
248 return -EINVAL;239 return -EINVAL;
249 }240 }
250 241 
251- ka_list_for_each_safe(pos, next, &(dma_page_list->head)) {242+ ka_list_for_each_safe(pos, next, &(dma_page_list->head))
243+ {
252 dma_page_info = ka_list_entry(pos, struct page_info_entry, list);244 dma_page_info = ka_list_entry(pos, struct page_info_entry, list);
253 245 
254 phys = ka_mm_page_to_phys(dma_page_info->page);246 phys = ka_mm_page_to_phys(dma_page_info->page);
@@ -265,7 +257,8 @@ STATIC int vf_map_2m(ka_device_t *dev,
265 257 
266unmap:258unmap:
267 iova = base_2m_iova;259 iova = base_2m_iova;
268- ka_list_for_each_safe(pos, next, &(dma_page_list->head)) {260+ ka_list_for_each_safe(pos, next, &(dma_page_list->head))
261+ {
269 dma_page_info = ka_list_entry(pos, struct page_info_entry, list);262 dma_page_info = ka_list_entry(pos, struct page_info_entry, list);
270 263 
271 if (dma_page_info != dma_page_info_err) {264 if (dma_page_info != dma_page_info_err) {
@@ -279,8 +272,7 @@ unmap:
279 return -EFAULT;272 return -EFAULT;
280}273}
281 274 
282-void vf_unmap_ram_range(struct hw_vdavinci *vdavinci,275+void vf_unmap_ram_range(struct hw_vdavinci *vdavinci, struct ram_range_info *ram_info)
283- struct ram_range_info *ram_info)
284{276{
285 int j;277 int j;
286 bool found = false;278 bool found = false;
@@ -293,7 +285,8 @@ void vf_unmap_ram_range(struct hw_vdavinci *vdavinci,
293 if (ka_list_empty(&(vdavinci->vdev.dev_dma_info_list_head))) {285 if (ka_list_empty(&(vdavinci->vdev.dev_dma_info_list_head))) {
294 return;286 return;
295 }287 }
296- ka_list_for_each_safe(pos, next, &(vdavinci->vdev.dev_dma_info_list_head)) {288+ ka_list_for_each_safe(pos, next, &(vdavinci->vdev.dev_dma_info_list_head))
289+ {
297 dma_info = ka_list_entry(pos, struct dev_dma_info, list);290 dma_info = ka_list_entry(pos, struct dev_dma_info, list);
298 if (ram_info != dma_info->ram_info) {291 if (ram_info != dma_info->ram_info) {
299 continue;292 continue;
@@ -302,9 +295,8 @@ void vf_unmap_ram_range(struct hw_vdavinci *vdavinci,
302 for (j = 0; j < ram_info->dma_array_len; j++) {295 for (j = 0; j < ram_info->dma_array_len; j++) {
303 dev_map_scheduled(vdavinci, &count);296 dev_map_scheduled(vdavinci, &count);
304 dma_array_node = ram_info->dma_array[j];297 dma_array_node = ram_info->dma_array[j];
305- vf_unmap_2m(dev, dma_info->base_iova +298+ vf_unmap_2m(dev, dma_info->base_iova + j * KA_VFIO_PIN_PAGES_MAX_ENTRIES * KA_MM_PAGE_SIZE,
306- j * KA_VFIO_PIN_PAGES_MAX_ENTRIES * KA_MM_PAGE_SIZE,299+ &(dma_array_node->dma_page_list));
307- &(dma_array_node->dma_page_list));
308 }300 }
309 ka_mm_kfree(dma_info);301 ka_mm_kfree(dma_info);
310 found = true;302 found = true;
@@ -315,8 +307,7 @@ void vf_unmap_ram_range(struct hw_vdavinci *vdavinci,
315 ka_base_atomic_dec(&ram_info->map_count);307 ka_base_atomic_dec(&ram_info->map_count);
316}308}
317 309 
318-int vf_map_ram_range(struct hw_vdavinci *vdavinci,310+int vf_map_ram_range(struct hw_vdavinci *vdavinci, struct ram_range_info *ram_info)
319- struct ram_range_info *ram_info)
320{311{
321 unsigned long count = 0;312 unsigned long count = 0;
322 int i = 0, j = 0, ret = 0;313 int i = 0, j = 0, ret = 0;
@@ -336,8 +327,7 @@ int vf_map_ram_range(struct hw_vdavinci *vdavinci,
336 dev_map_scheduled(vdavinci, &count);327 dev_map_scheduled(vdavinci, &count);
337 dma_array_node = ram_info->dma_array[i];328 dma_array_node = ram_info->dma_array[i];
338 ret = vf_map_2m(dev, base_iova + i * KA_VFIO_PIN_PAGES_MAX_ENTRIES * KA_MM_PAGE_SIZE,329 ret = vf_map_2m(dev, base_iova + i * KA_VFIO_PIN_PAGES_MAX_ENTRIES * KA_MM_PAGE_SIZE,
339- &(dma_array_node->dma_page_list),330+ &(dma_array_node->dma_page_list), prot);
340- prot);
341 if (ret != 0) {331 if (ret != 0) {
342 goto out;332 goto out;
343 }333 }
@@ -31,9 +31,9 @@ struct dev_dma_sgt {
31 31 
32struct dev_dma_info {32struct dev_dma_info {
33 ka_device_t *dev;33 ka_device_t *dev;
34- ka_dma_addr_t base_iova; /* for arm */34+ ka_dma_addr_t base_iova; /* for arm */
35 struct ram_range_info *ram_info;35 struct ram_range_info *ram_info;
36- struct dev_dma_sgt **sgt_array; /* for x86 */36+ struct dev_dma_sgt **sgt_array; /* for x86 */
37 ka_list_head_t list;37 ka_list_head_t list;
38};38};
39 39 
@@ -54,20 +54,16 @@ struct ram_range_info {
54 unsigned long npages;54 unsigned long npages;
55 unsigned long userspace_addr;55 unsigned long userspace_addr;
56 int dma_array_len;56 int dma_array_len;
57- struct dma_info_2m** dma_array;57+ struct dma_info_2m **dma_array;
58 ka_list_head_t list;58 ka_list_head_t list;
59 ka_atomic_t map_count;59 ka_atomic_t map_count;
60};60};
61 61 
62-int dev_dma_map_ram_range(struct hw_vdavinci *vdavinci,62+int dev_dma_map_ram_range(struct hw_vdavinci *vdavinci, struct ram_range_info *ram_info);
63- struct ram_range_info *ram_info);
64 63 
65-void dev_dma_unmap_ram_range(struct hw_vdavinci *vdavinci,64+void dev_dma_unmap_ram_range(struct hw_vdavinci *vdavinci, struct ram_range_info *ram_info);
66- struct ram_range_info *ram_info);
67 65 
68-int vf_map_ram_range(struct hw_vdavinci *vdavinci,66+int vf_map_ram_range(struct hw_vdavinci *vdavinci, struct ram_range_info *ram_info);
69- struct ram_range_info *ram_info);
70 67 
71-void vf_unmap_ram_range(struct hw_vdavinci *vdavinci,68+void vf_unmap_ram_range(struct hw_vdavinci *vdavinci, struct ram_range_info *ram_info);
72- struct ram_range_info *ram_info);
73#endif69#endif
@@ -31,6 +31,7 @@ void hw_vdavinci_iommu_detach_group(struct hw_vdavinci *vdavinci)
31 ka_mm_iommu_domain_free(vf->domain);31 ka_mm_iommu_domain_free(vf->domain);
32 vf->domain = NULL;32 vf->domain = NULL;
33 ka_mm_put_iova_domain(&vf->iovad);33 ka_mm_put_iova_domain(&vf->iovad);
34+ ka_mm_iommu_group_put(group);
34}35}
35 36 
36STATIC bool vfio_iommu_has_sw_msi(ka_iommu_group_t *group, phys_addr_t *base)37STATIC bool vfio_iommu_has_sw_msi(ka_iommu_group_t *group, phys_addr_t *base)
@@ -42,7 +43,8 @@ STATIC bool vfio_iommu_has_sw_msi(ka_iommu_group_t *group, phys_addr_t *base)
42 43 
43 KA_INIT_LIST_HEAD(&group_resv_regions);44 KA_INIT_LIST_HEAD(&group_resv_regions);
44 ka_mm_iommu_get_group_resv_regions(group, &group_resv_regions);45 ka_mm_iommu_get_group_resv_regions(group, &group_resv_regions);
45- ka_list_for_each_entry(region, &group_resv_regions, list) {46+ ka_list_for_each_entry(region, &group_resv_regions, list)
47+ {
46 /*48 /*
47 * The presence of any 'real' MSI regions should take49 * The presence of any 'real' MSI regions should take
48 * precedence over the software-managed one if the50 * precedence over the software-managed one if the
@@ -59,7 +61,8 @@ STATIC bool vfio_iommu_has_sw_msi(ka_iommu_group_t *group, phys_addr_t *base)
59 }61 }
60 }62 }
61 63 
62- ka_list_for_each_entry_safe(region, next, &group_resv_regions, list) {64+ ka_list_for_each_entry_safe(region, next, &group_resv_regions, list)
65+ {
63 ka_mm_kfree(region);66 ka_mm_kfree(region);
64 }67 }
65#endif68#endif
@@ -75,12 +78,35 @@ STATIC void init_vf_iovad(struct hw_vdavinci *vdavinci)
75 ka_copy_reserved_iova(&vm_dom->iovad, &vf->iovad);78 ka_copy_reserved_iova(&vm_dom->iovad, &vf->iovad);
76}79}
77 80 
81+STATIC int hw_vdavinci_get_msi_cookie(struct hw_vdavinci *vdavinci, ka_iommu_group_t *group)
82+{
83+ int ret = 0;
84+ struct hw_vf_info *vf = &vdavinci->vf;
85+ bool resv_msi = false;
86+ phys_addr_t resv_msi_base = 0;
87+ ka_device_t *dev = vdavinci_resource_dev(vdavinci);
88+ 
89+ if (group == NULL) {
90+ return -ENODEV;
91+ }
92+ resv_msi = vfio_iommu_has_sw_msi(group, &resv_msi_base);
93+ if (resv_msi) {
94+#if IS_VDAVINCI_KERNEL_VERSION_SUPPORT
95+ ret = ka_mm_iommu_get_msi_cookie(vf->domain, resv_msi_base);
96+#endif
97+ if (ret != 0) {
98+ vascend_err(dev, "Failed to allocate msi cookie.");
99+ return ret;
100+ }
101+ }
102+ 
103+ return 0;
104+}
105+ 
78int hw_vdavinci_iommu_attach_group(struct hw_vdavinci *vdavinci)106int hw_vdavinci_iommu_attach_group(struct hw_vdavinci *vdavinci)
79{107{
80 struct hw_vf_info *vf = &vdavinci->vf;108 struct hw_vf_info *vf = &vdavinci->vf;
81 ka_iommu_group_t *group;109 ka_iommu_group_t *group;
82- bool resv_msi = false;
83- phys_addr_t resv_msi_base = 0;
84 ka_device_t *dev = vdavinci_resource_dev(vdavinci);110 ka_device_t *dev = vdavinci_resource_dev(vdavinci);
85 int ret;111 int ret;
86 112 
@@ -107,19 +133,13 @@ int hw_vdavinci_iommu_attach_group(struct hw_vdavinci *vdavinci)
107 vascend_err(dev, "Failed to attach group.");133 vascend_err(dev, "Failed to attach group.");
108 goto out_domain;134 goto out_domain;
109 }135 }
110- 136+ ret = hw_vdavinci_get_msi_cookie(vdavinci, group);
111- resv_msi = vfio_iommu_has_sw_msi(group, &resv_msi_base);137+ if (ret != 0) {
112- if (resv_msi) {138+ goto out_group;
113-#if IS_VDAVINCI_KERNEL_VERSION_SUPPORT
114- ret = ka_mm_iommu_get_msi_cookie(vf->domain, resv_msi_base);
115-#endif
116- if (ret) {
117- vascend_err(dev, "Failed to allocate msi cookie.");
118- goto out_group;
119- }
120 }139 }
121- 
122 init_vf_iovad(vdavinci);140 init_vf_iovad(vdavinci);
141+ ka_mm_iommu_group_put(group);
142+ 
123 return 0;143 return 0;
124 144 
125out_group:145out_group:
@@ -127,6 +147,9 @@ out_group:
127out_domain:147out_domain:
128 ka_mm_iommu_domain_free(vf->domain);148 ka_mm_iommu_domain_free(vf->domain);
129 vf->domain = NULL;149 vf->domain = NULL;
150+ if (group != NULL) {
151+ ka_mm_iommu_group_put(group);
152+ }
130 return ret;153 return ret;
131}154}
132 155 
@@ -138,8 +161,8 @@ STATIC unsigned long aligned_nrpages(unsigned long addr, size_t size)
138 return KA_MM_PAGE_ALIGN(page_addr + size) >> KA_MM_PAGE_SHIFT;161 return KA_MM_PAGE_ALIGN(page_addr + size) >> KA_MM_PAGE_SHIFT;
139}162}
140 163 
141-STATIC ka_dma_addr_t vdavinci_do_map(struct hw_vdavinci *vdavinci, phys_addr_t paddr,164+STATIC ka_dma_addr_t vdavinci_do_map(struct hw_vdavinci *vdavinci, phys_addr_t paddr, size_t size, int dir,
142- size_t size, int dir, u64 dma_mask)165+ u64 dma_mask)
143{166{
144 ka_dma_addr_t iova_addr = 0, start_paddr = 0;167 ka_dma_addr_t iova_addr = 0, start_paddr = 0;
145 int ret = 0, prot = 0;168 int ret = 0, prot = 0;
@@ -149,8 +172,7 @@ STATIC ka_dma_addr_t vdavinci_do_map(struct hw_vdavinci *vdavinci, phys_addr_t p
149 unsigned long nr_pages = aligned_nrpages(paddr, size);172 unsigned long nr_pages = aligned_nrpages(paddr, size);
150 ka_device_t *dev = vdavinci_resource_dev(vdavinci);173 ka_device_t *dev = vdavinci_resource_dev(vdavinci);
151 174 
152- new_iova = ka_alloc_iova(&vf->iovad, nr_pages,175+ new_iova = ka_alloc_iova(&vf->iovad, nr_pages, dma_mask >> KA_MM_PAGE_SHIFT, true);
153- dma_mask >> KA_MM_PAGE_SHIFT, true);
154 if (new_iova == NULL) {176 if (new_iova == NULL) {
155 vascend_err(vdavinci_to_dev(vdavinci), "alloc iova failed");177 vascend_err(vdavinci_to_dev(vdavinci), "alloc iova failed");
156 goto error;178 goto error;
@@ -166,9 +188,8 @@ STATIC ka_dma_addr_t vdavinci_do_map(struct hw_vdavinci *vdavinci, phys_addr_t p
166 prot |= KA_IOMMU_WRITE;188 prot |= KA_IOMMU_WRITE;
167 }189 }
168 190 
169- ret = vdavinci_iommu_map(dev, iova_pfn << KA_MM_PAGE_SHIFT,191+ ret = vdavinci_iommu_map(dev, iova_pfn << KA_MM_PAGE_SHIFT, paddr_pfn << KA_MM_PAGE_SHIFT, KA_MM_PAGE_ALIGN(size),
170- paddr_pfn << KA_MM_PAGE_SHIFT,192+ prot);
171- KA_MM_PAGE_ALIGN(size), prot);
172 if (ret != 0) {193 if (ret != 0) {
173 vascend_err(vdavinci_to_dev(vdavinci), "iommu map failed %d", ret);194 vascend_err(vdavinci_to_dev(vdavinci), "iommu map failed %d", ret);
174 goto error;195 goto error;
@@ -186,8 +207,7 @@ error:
186 return KA_DMA_MAPPING_ERROR;207 return KA_DMA_MAPPING_ERROR;
187}208}
188 209 
189-STATIC ka_dma_addr_t vdavinci_do_map_single(ka_device_t *dev, phys_addr_t paddr,210+STATIC ka_dma_addr_t vdavinci_do_map_single(ka_device_t *dev, phys_addr_t paddr, size_t size, int dir, u64 dma_mask)
190- size_t size, int dir, u64 dma_mask)
191{211{
192 struct hw_vdavinci *vdavinci = find_vdavinci(dev);212 struct hw_vdavinci *vdavinci = find_vdavinci(dev);
193 struct vm_dom_info *vm_dom = NULL;213 struct vm_dom_info *vm_dom = NULL;
@@ -227,13 +247,12 @@ STATIC ka_dma_addr_t vdavinci_do_map_single(ka_device_t *dev, phys_addr_t paddr,
227error:247error:
228 ka_task_up_read(&vm_dom->sem);248 ka_task_up_read(&vm_dom->sem);
229 249 
230- vascend_err(dev, "Device request: %zx@%llx dir %d --- failed\n",250+ vascend_err(dev, "Device request: %zx@%llx dir %d --- failed\n", size, (unsigned long long)paddr, dir);
231- size, (unsigned long long)paddr, dir);
232 return KA_DMA_MAPPING_ERROR;251 return KA_DMA_MAPPING_ERROR;
233}252}
234 253 
235-ka_dma_addr_t vdavinci_dma_map_page(ka_device_t *dev, ka_page_t *page, size_t offset,254+ka_dma_addr_t vdavinci_dma_map_page(ka_device_t *dev, ka_page_t *page, size_t offset, size_t size,
236- size_t size, ka_dma_data_direction_t dir)255+ ka_dma_data_direction_t dir)
237{256{
238 if (!ka_valid_dma_direction(dir)) {257 if (!ka_valid_dma_direction(dir)) {
239 vascend_err(dev, "invalid dma direction %d\n", dir);258 vascend_err(dev, "invalid dma direction %d\n", dir);
@@ -248,8 +267,7 @@ ka_dma_addr_t vdavinci_dma_map_page(ka_device_t *dev, ka_page_t *page, size_t of
248 return vdavinci_do_map_single(dev, ka_mm_page_to_phys(page) + offset, size, dir, *dev->dma_mask);267 return vdavinci_do_map_single(dev, ka_mm_page_to_phys(page) + offset, size, dir, *dev->dma_mask);
249}268}
250 269 
251-ka_dma_addr_t vdavinci_dma_map_single(ka_device_t *dev, void *ptr, size_t size,270+ka_dma_addr_t vdavinci_dma_map_single(ka_device_t *dev, void *ptr, size_t size, ka_dma_data_direction_t dir)
252- ka_dma_data_direction_t dir)
253{271{
254 ka_page_t *page;272 ka_page_t *page;
255 size_t offset;273 size_t offset;
@@ -268,6 +286,7 @@ ka_dma_addr_t vdavinci_dma_map_single(ka_device_t *dev, void *ptr, size_t size,
268 offset = ka_mm_offset_in_page(ptr);286 offset = ka_mm_offset_in_page(ptr);
269 if (offset != 0) {287 if (offset != 0) {
270 vascend_err(dev, "address should PAGE align, %zx\n", offset);288 vascend_err(dev, "address should PAGE align, %zx\n", offset);
289+ return KA_DMA_MAPPING_ERROR;
271 }290 }
272 291 
273 return vdavinci_do_map_single(dev, ka_mm_page_to_phys(page) + offset, size, dir, *dev->dma_mask);292 return vdavinci_do_map_single(dev, ka_mm_page_to_phys(page) + offset, size, dir, *dev->dma_mask);
@@ -289,20 +308,17 @@ STATIC void vdavinci_do_unmap(ka_device_t *dev, ka_dma_addr_t dev_addr, size_t s
289 ka_free_iova(&vf->iovad, iova_pfn);308 ka_free_iova(&vf->iovad, iova_pfn);
290}309}
291 310 
292-void vdavinci_dma_unmap_single(ka_device_t *dev, ka_dma_addr_t addr, size_t size,311+void vdavinci_dma_unmap_single(ka_device_t *dev, ka_dma_addr_t addr, size_t size, ka_dma_data_direction_t dir)
293- ka_dma_data_direction_t dir)
294{312{
295 vdavinci_do_unmap(dev, addr, size);313 vdavinci_do_unmap(dev, addr, size);
296}314}
297 315 
298-void vdavinci_dma_unmap_page(ka_device_t *dev, ka_dma_addr_t addr, size_t size,316+void vdavinci_dma_unmap_page(ka_device_t *dev, ka_dma_addr_t addr, size_t size, ka_dma_data_direction_t dir)
299- ka_dma_data_direction_t dir)
300{317{
301 vdavinci_do_unmap(dev, addr, size);318 vdavinci_do_unmap(dev, addr, size);
302}319}
303 320 
304-void *vdavinci_dma_alloc_coherent(ka_device_t *dev, size_t size,321+void *vdavinci_dma_alloc_coherent(ka_device_t *dev, size_t size, ka_dma_addr_t *dma_handle, ka_gfp_t flags)
305- ka_dma_addr_t *dma_handle, ka_gfp_t flags)
306{322{
307 ka_page_t *page = NULL;323 ka_page_t *page = NULL;
308 size_t align_size = KA_MM_PAGE_ALIGN(size);324 size_t align_size = KA_MM_PAGE_ALIGN(size);
@@ -314,8 +330,7 @@ void *vdavinci_dma_alloc_coherent(ka_device_t *dev, size_t size,
314 return NULL;330 return NULL;
315 }331 }
316 332 
317- *dma_handle = vdavinci_do_map_single(dev, ka_mm_page_to_phys(page),333+ *dma_handle = vdavinci_do_map_single(dev, ka_mm_page_to_phys(page), align_size, KA_DMA_BIDIRECTIONAL,
318- align_size, KA_DMA_BIDIRECTIONAL,
319 dev->coherent_dma_mask);334 dev->coherent_dma_mask);
320 if (*dma_handle != KA_DMA_MAPPING_ERROR) {335 if (*dma_handle != KA_DMA_MAPPING_ERROR) {
321 return ka_mm_page_address(page);336 return ka_mm_page_address(page);
@@ -325,8 +340,7 @@ void *vdavinci_dma_alloc_coherent(ka_device_t *dev, size_t size,
325 return NULL;340 return NULL;
326}341}
327 342 
328-void vdavinci_dma_free_coherent(ka_device_t *dev, size_t size,343+void vdavinci_dma_free_coherent(ka_device_t *dev, size_t size, void *vaddr, ka_dma_addr_t dma_handle)
329- void *vaddr, ka_dma_addr_t dma_handle)
330{344{
331 size_t align_size = KA_MM_PAGE_ALIGN(size);345 size_t align_size = KA_MM_PAGE_ALIGN(size);
332 int order = ka_mm_get_order(align_size);346 int order = ka_mm_get_order(align_size);
@@ -20,10 +20,10 @@
20#include "vfio_ops.h"20#include "vfio_ops.h"
21 21 
22#define START(map) ((map)->start)22#define START(map) ((map)->start)
23-#define LAST(map) ((map)->end - 1)23+#define LAST(map) ((map)->end - 1)
24 24 
25-KA_INTERVAL_TREE_DEFINE(struct vm_pfn_node, rb, unsigned long, subtree_last,25+KA_INTERVAL_TREE_DEFINE(struct vm_pfn_node, rb, unsigned long, subtree_last, START, LAST, ka_maybe_unused static,
26- START, LAST, ka_maybe_unused static, pfn_tree)26+ pfn_tree)
27 27 
28KA_LIST_HEAD(g_vm_domains);28KA_LIST_HEAD(g_vm_domains);
29KA_TASK_DEFINE_MUTEX(g_vm_domains_lock);29KA_TASK_DEFINE_MUTEX(g_vm_domains_lock);
@@ -45,18 +45,19 @@ void dev_dom_release(ka_kref_t *ref)
45 45 
46 ka_list_del(&dev_dom->list);46 ka_list_del(&dev_dom->list);
47 47 
48- ka_list_for_each_entry(ram_info, &dev_dom->vm_dom->ram_info_list->head, list) {48+ ka_list_for_each_entry(ram_info, &dev_dom->vm_dom->ram_info_list->head, list)
49+ {
49 dev_dom->ops.dev_dma_unmap_ram_range(dev_dom->vdavinci, ram_info);50 dev_dom->ops.dev_dma_unmap_ram_range(dev_dom->vdavinci, ram_info);
50 }51 }
51 ka_mm_kfree(dev_dom);52 ka_mm_kfree(dev_dom);
52}53}
53 54 
54-struct dev_dom_info *dev_dom_info_find(struct vm_dom_info *vm_dom,55+struct dev_dom_info *dev_dom_info_find(struct vm_dom_info *vm_dom, struct hw_vdavinci *vdavinci)
55- struct hw_vdavinci *vdavinci)
56{56{
57 struct dev_dom_info *dev_dom = NULL;57 struct dev_dom_info *dev_dom = NULL;
58 58 
59- ka_list_for_each_entry(dev_dom, &vm_dom->dev_dom_list_head, list) {59+ ka_list_for_each_entry(dev_dom, &vm_dom->dev_dom_list_head, list)
60+ {
60 if (dev_dom->vdavinci == vdavinci) {61 if (dev_dom->vdavinci == vdavinci) {
61 return dev_dom;62 return dev_dom;
62 }63 }
@@ -65,11 +66,9 @@ struct dev_dom_info *dev_dom_info_find(struct vm_dom_info *vm_dom,
65 return NULL;66 return NULL;
66}67}
67 68 
68-struct dev_dom_info *dev_dom_info_new(struct vm_dom_info *vm_dom,69+struct dev_dom_info *dev_dom_info_new(struct vm_dom_info *vm_dom, struct hw_vdavinci *vdavinci)
69- struct hw_vdavinci *vdavinci)
70{70{
71- struct dev_dom_info *dev_dom =71+ struct dev_dom_info *dev_dom = (struct dev_dom_info *)ka_mm_kzalloc(sizeof(struct dev_dom_info), KA_GFP_KERNEL);
72- (struct dev_dom_info *)ka_mm_kzalloc(sizeof(struct dev_dom_info), KA_GFP_KERNEL);
73 if (!dev_dom) {72 if (!dev_dom) {
74 return NULL;73 return NULL;
75 }74 }
@@ -84,8 +83,7 @@ struct dev_dom_info *dev_dom_info_new(struct vm_dom_info *vm_dom,
84}83}
85 84 
86/* hold vm_dom_info->rw_semaphore before call this function */85/* hold vm_dom_info->rw_semaphore before call this function */
87-struct dev_dom_info *dev_dom_info_get(struct vm_dom_info *vm_dom,86+struct dev_dom_info *dev_dom_info_get(struct vm_dom_info *vm_dom, struct hw_vdavinci *vdavinci)
88- struct hw_vdavinci *vdavinci)
89{87{
90 struct dev_dom_info *dev_dom = NULL;88 struct dev_dom_info *dev_dom = NULL;
91 89 
@@ -99,8 +97,7 @@ struct dev_dom_info *dev_dom_info_get(struct vm_dom_info *vm_dom,
99}97}
100 98 
101/* hold vm_dom_info->rw_semaphore before call this function */99/* hold vm_dom_info->rw_semaphore before call this function */
102-void dev_dom_info_put(struct dev_dom_info *dev_dom,100+void dev_dom_info_put(struct dev_dom_info *dev_dom, struct hw_vdavinci *vdavinci)
103- struct hw_vdavinci *vdavinci)
104{101{
105 if (ka_base_kref_put(&dev_dom->ref, dev_dom_release)) {102 if (ka_base_kref_put(&dev_dom->ref, dev_dom_release)) {
106 if (vdavinci->is_passthrough) {103 if (vdavinci->is_passthrough) {
@@ -149,7 +146,8 @@ struct vm_dom_info *vm_dom_info_find(const ka_kvm_t *kvm)
149{146{
150 struct vm_dom_info *vm_dom = NULL;147 struct vm_dom_info *vm_dom = NULL;
151 148 
152- ka_list_for_each_entry(vm_dom, &g_vm_domains, node) {149+ ka_list_for_each_entry(vm_dom, &g_vm_domains, node)
150+ {
153 if (vm_dom->kvm == kvm) {151 if (vm_dom->kvm == kvm) {
154 return vm_dom;152 return vm_dom;
155 }153 }
@@ -167,8 +165,8 @@ struct vm_dom_info *vm_dom_info_new(ka_kvm_t *kvm)
167 return NULL;165 return NULL;
168 }166 }
169 167 
170- vm_dom->ram_info_list = (struct ram_range_info_list *)168+ vm_dom->ram_info_list = (struct ram_range_info_list *)ka_mm_kzalloc(sizeof(struct ram_range_info_list),
171- ka_mm_kzalloc(sizeof(struct ram_range_info_list), KA_GFP_KERNEL);169+ KA_GFP_KERNEL);
172 if (!vm_dom->ram_info_list) {170 if (!vm_dom->ram_info_list) {
173 ka_mm_kfree(vm_dom);171 ka_mm_kfree(vm_dom);
174 return NULL;172 return NULL;
@@ -208,8 +206,7 @@ out:
208 return vm_dom;206 return vm_dom;
209}207}
210 208 
211-int vm_add_and_merge_pfn(struct vm_dom_info *vm_dom,209+int vm_add_and_merge_pfn(struct vm_dom_info *vm_dom, unsigned long pfn, unsigned long size)
212- unsigned long pfn, unsigned long size)
213{210{
214#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))211#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))
215 struct vm_pfn_node *node;212 struct vm_pfn_node *node;
@@ -222,8 +219,7 @@ int vm_add_and_merge_pfn(struct vm_dom_info *vm_dom,
222 }219 }
223 pfn_root = &vm_dom->pfn_root;220 pfn_root = &vm_dom->pfn_root;
224 while (true) {221 while (true) {
225- node = pfn_tree_iter_first(pfn_root,222+ node = pfn_tree_iter_first(pfn_root, (start > 0) ? start - 1 : 0, end);
226- (start > 0) ? start - 1 : 0, end);
227 if (node == NULL) {223 if (node == NULL) {
228 break;224 break;
229 }225 }
@@ -244,18 +240,25 @@ int vm_add_and_merge_pfn(struct vm_dom_info *vm_dom,
244 return 0;240 return 0;
245}241}
246 242 
247-bool is_vm_pfn_managed(struct vm_dom_info *vm_dom,243+bool is_vm_pfn_managed(struct vm_dom_info *vm_dom, unsigned long pfn, unsigned long size)
248- unsigned long pfn, unsigned long size)
249{244{
250#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))245#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))
251 ka_rb_root_cached_t *pfn_root;246 ka_rb_root_cached_t *pfn_root;
247+ struct vm_pfn_node *node;
252 248 
253 if (ka_unlikely(vm_dom == NULL || size == 0)) {249 if (ka_unlikely(vm_dom == NULL || size == 0)) {
254 return false;250 return false;
255 }251 }
252+ if (ka_unlikely(pfn + size < pfn)) {
253+ return false;
254+ }
256 pfn_root = &vm_dom->pfn_root;255 pfn_root = &vm_dom->pfn_root;
256+ node = pfn_tree_iter_first(pfn_root, pfn, pfn + size - 1);
257+ if (ka_unlikely(node == NULL)) {
258+ return false;
259+ }
257 260 
258- return (pfn_tree_iter_first(pfn_root, pfn, pfn + size - 1) != NULL);261+ return (node->start <= pfn && (pfn + size) <= node->end);
259#else262#else
260 return false;263 return false;
261#endif264#endif
@@ -17,11 +17,11 @@
17#include "hw_vdavinci.h"17#include "hw_vdavinci.h"
18#include "dma_pool_map.h"18#include "dma_pool_map.h"
19 19 
20-#define DOMAIN_PIN_STATUS_INVALID 0x020+#define DOMAIN_PIN_STATUS_INVALID 0x0
21-#define DOMAIN_PIN_STATUS_READY 0x121+#define DOMAIN_PIN_STATUS_READY 0x1
22-#define DOMAIN_MAP_STATUS_INVALID 0x222+#define DOMAIN_MAP_STATUS_INVALID 0x2
23-#define DOMAIN_MAP_STATUS_READY 0x423+#define DOMAIN_MAP_STATUS_READY 0x4
24-#define DOMAIN_DMA_BIT_MASK_32 3224+#define DOMAIN_DMA_BIT_MASK_32 32
25 25 
26struct dev_dom_info {26struct dev_dom_info {
27 struct hw_vdavinci *vdavinci;27 struct hw_vdavinci *vdavinci;
@@ -31,19 +31,12 @@ struct dev_dom_info {
31 struct vm_dom_info *vm_dom;31 struct vm_dom_info *vm_dom;
32 ka_list_head_t list;32 ka_list_head_t list;
33 struct {33 struct {
34- int (*dev_dma_map_ram_range)(struct hw_vdavinci *vdavinci,34+ int (*dev_dma_map_ram_range)(struct hw_vdavinci *vdavinci, struct ram_range_info *ram_info);
35- struct ram_range_info *ram_info);35+ void (*dev_dma_unmap_ram_range)(struct hw_vdavinci *vdavinci, struct ram_range_info *ram_info);
36- void (*dev_dma_unmap_ram_range)(struct hw_vdavinci *vdavinci,36+ int (*hw_vdavinci_get_iova_sg)(struct hw_vdavinci *vdavinci, struct vm_dom_info *vm_dom, unsigned long gfn,
37- struct ram_range_info *ram_info);37+ unsigned long size, ka_sg_table_t **dma_sgt);
38- int (*hw_vdavinci_get_iova_sg)(struct hw_vdavinci *vdavinci,38+ int (*hw_vdavinci_get_iova_array)(struct hw_vdavinci *vdavinci, struct vm_dom_info *vm_dom, unsigned long *gfn,
39- struct vm_dom_info *vm_dom,39+ unsigned long *dma_addr, unsigned long count);
40- unsigned long gfn, unsigned long size,
41- ka_sg_table_t **dma_sgt);
42- int (*hw_vdavinci_get_iova_array)(struct hw_vdavinci *vdavinci,
43- struct vm_dom_info *vm_dom,
44- unsigned long *gfn,
45- unsigned long *dma_addr,
46- unsigned long count);
47 } ops;40 } ops;
48};41};
49 42 
@@ -78,23 +71,16 @@ ka_list_head_t *get_vm_domains_list(void);
78ka_mutex_t *get_vm_domains_lock(void);71ka_mutex_t *get_vm_domains_lock(void);
79 72 
80void dev_dom_release(ka_kref_t *ref);73void dev_dom_release(ka_kref_t *ref);
81-struct dev_dom_info *dev_dom_info_find(struct vm_dom_info *vm_dom,74+struct dev_dom_info *dev_dom_info_find(struct vm_dom_info *vm_dom, struct hw_vdavinci *vdavinci);
82- struct hw_vdavinci *vdavinci);75+struct dev_dom_info *dev_dom_info_new(struct vm_dom_info *vm_dom, struct hw_vdavinci *vdavinci);
83-struct dev_dom_info *dev_dom_info_new(struct vm_dom_info *vm_dom,76+struct dev_dom_info *dev_dom_info_get(struct vm_dom_info *vm_dom, struct hw_vdavinci *vdavinci);
84- struct hw_vdavinci *vdavinci);77+void dev_dom_info_put(struct dev_dom_info *dev_dom, struct hw_vdavinci *vdavinci);
85-struct dev_dom_info *dev_dom_info_get(struct vm_dom_info *vm_dom,78+int dma_domain_add_reserve_mem(struct vm_dom_info *vm_dom, unsigned long pfn_lo, unsigned long pfn_hi);
86- struct hw_vdavinci *vdavinci);
87-void dev_dom_info_put(struct dev_dom_info *dev_dom,
88- struct hw_vdavinci *vdavinci);
89-int dma_domain_add_reserve_mem(struct vm_dom_info *vm_dom,
90- unsigned long pfn_lo, unsigned long pfn_hi);
91void vm_dom_info_release(ka_kref_t *ref);79void vm_dom_info_release(ka_kref_t *ref);
92struct vm_dom_info *vm_dom_info_find(const ka_kvm_t *kvm);80struct vm_dom_info *vm_dom_info_find(const ka_kvm_t *kvm);
93struct vm_dom_info *vm_dom_info_new(ka_kvm_t *kvm);81struct vm_dom_info *vm_dom_info_new(ka_kvm_t *kvm);
94struct vm_dom_info *vm_dom_info_get(ka_kvm_t *kvm);82struct vm_dom_info *vm_dom_info_get(ka_kvm_t *kvm);
95-int vm_add_and_merge_pfn(struct vm_dom_info *vm_dom,83+int vm_add_and_merge_pfn(struct vm_dom_info *vm_dom, unsigned long pfn, unsigned long size);
96- unsigned long pfn, unsigned long size);84+bool is_vm_pfn_managed(struct vm_dom_info *vm_dom, unsigned long pfn, unsigned long size);
97-bool is_vm_pfn_managed(struct vm_dom_info *vm_dom,
98- unsigned long pfn, unsigned long size);
99 85 
100#endif86#endif
@@ -28,86 +28,86 @@
28#endif28#endif
29 29 
30#ifndef KA_PCI_CFG_SPACE_EXP_SIZE30#ifndef KA_PCI_CFG_SPACE_EXP_SIZE
31-#define KA_PCI_CFG_SPACE_EXP_SIZE 409631+#define KA_PCI_CFG_SPACE_EXP_SIZE 4096
32#endif32#endif
33 33 
34#define DVT_MAX_VDAVINCI 1634#define DVT_MAX_VDAVINCI 16
35#define BYTES_TO_KB(b) ((b) >> 10ULL)35#define BYTES_TO_KB(b) ((b) >> 10ULL)
36#define HW_DVT_MAX_DEV_NUM 236#define HW_DVT_MAX_DEV_NUM 2
37#define HW_DVT_MAX_BAR_NUM 637#define HW_DVT_MAX_BAR_NUM 6
38-#define F_UNALIGN (1 << 6)38+#define F_UNALIGN (1 << 6)
39 39 
40-#define DAVINCI_PCI_MSIX 0xa040+#define DAVINCI_PCI_MSIX 0xa0
41-#define DAVINCI_PCI_MSIX_NEXT_CAP_POINTER (DAVINCI_PCI_MSIX + 1)41+#define DAVINCI_PCI_MSIX_NEXT_CAP_POINTER (DAVINCI_PCI_MSIX + 1)
42-#define DAVINCI_PCI_MSIX_FLAGS (DAVINCI_PCI_MSIX + PCI_MSIX_FLAGS)42+#define DAVINCI_PCI_MSIX_FLAGS (DAVINCI_PCI_MSIX + PCI_MSIX_FLAGS)
43-#define DAVINCI_PCI_MSIX_TABLE (DAVINCI_PCI_MSIX + PCI_MSIX_TABLE)43+#define DAVINCI_PCI_MSIX_TABLE (DAVINCI_PCI_MSIX + PCI_MSIX_TABLE)
44-#define DAVINCI_PCI_MSIX_PBA (DAVINCI_PCI_MSIX + PCI_MSIX_PBA)44+#define DAVINCI_PCI_MSIX_PBA (DAVINCI_PCI_MSIX + PCI_MSIX_PBA)
45 45 
46-#define DAVINCI_PCI_PM 0xb046+#define DAVINCI_PCI_PM 0xb0
47-#define DAVINCI_PCI_PM_PMC (DAVINCI_PCI_PM + PCI_PM_PMC)47+#define DAVINCI_PCI_PM_PMC (DAVINCI_PCI_PM + PCI_PM_PMC)
48-#define DAVINCI_PCI_PM_CTRL (DAVINCI_PCI_PM + PCI_PM_CTRL)48+#define DAVINCI_PCI_PM_CTRL (DAVINCI_PCI_PM + PCI_PM_CTRL)
49-#define DAVINCI_PM_CAP_CFG_CAP 0xf80349+#define DAVINCI_PM_CAP_CFG_CAP 0xf803
50-#define DAVINCI_PM_CAP_CFG_CSR 0x000850+#define DAVINCI_PM_CAP_CFG_CSR 0x0008
51-#define PCI_VENDOR_ID_HUAWEI 0x19e551+#define PCI_VENDOR_ID_HUAWEI 0x19e5
52#ifdef DAVINCI_TEST52#ifdef DAVINCI_TEST
53-#define PCI_DEVICE_ID_ASCEND310 0xd10053+#define PCI_DEVICE_ID_ASCEND310 0xd100
54#endif54#endif
55-#define PCI_DEVICE_ID_ASCEND310P 0xd50055+#define PCI_DEVICE_ID_ASCEND310P 0xd500
56-#define PCI_DEVICE_ID_ASCEND910 0xd80156+#define PCI_DEVICE_ID_ASCEND910 0xd801
57-#define PCI_DEVICE_ID_ASCEND910B 0xd80257+#define PCI_DEVICE_ID_ASCEND910B 0xd802
58-#define PCI_DEVICE_ID_ASCEND910_93 0xd80358+#define PCI_DEVICE_ID_ASCEND910_93 0xd803
59-#define PCI_DEVICE_ID_ASCEND950 0xd80659+#define PCI_DEVICE_ID_ASCEND950 0xd806
60-#define PCI_DEVICE_ID_ASCEND350 0xd80860+#define PCI_DEVICE_ID_ASCEND350 0xd808
61-#define DVT_MMIO_BAR0_SIZE 0x2000061+#define DVT_MMIO_BAR0_SIZE 0x20000
62-#define DVT_MMIO_BAR2_SIZE 0x200000062+#define DVT_MMIO_BAR2_SIZE 0x2000000
63-#define DVT_MMIO_BAR4_SIZE 0x450000063+#define DVT_MMIO_BAR4_SIZE 0x4500000
64-#define VF_BAR0_SPARSE_SIZE 664+#define VF_BAR0_SPARSE_SIZE 6
65#define VF_BAR0_DOORBELL_OFFSET 065#define VF_BAR0_DOORBELL_OFFSET 0
66-#define VF_BAR0_DOORBELL_SIZE 0x2000066+#define VF_BAR0_DOORBELL_SIZE 0x20000
67-#define VF_BAR0_VPC_OFFSET 0x2000067+#define VF_BAR0_VPC_OFFSET 0x20000
68-#define VF_BAR0_VPC_SIZE 0x400000068+#define VF_BAR0_VPC_SIZE 0x4000000
69-#define VF_BAR0_DVPP_OFFSET 0x402000069+#define VF_BAR0_DVPP_OFFSET 0x4020000
70-#define VF_BAR0_DVPP_SIZE 0x180000070+#define VF_BAR0_DVPP_SIZE 0x1800000
71-#define VF_BAR0_MSG_OFFSET 0x600000071+#define VF_BAR0_MSG_OFFSET 0x6000000
72-#define VF_BAR0_MSG_SIZE 0x100000072+#define VF_BAR0_MSG_SIZE 0x1000000
73-#define VF_BAR0_TOPIC_OFFSET 0x700000073+#define VF_BAR0_TOPIC_OFFSET 0x7000000
74-#define VF_BAR0_TOPIC_SIZE 0x1000074+#define VF_BAR0_TOPIC_SIZE 0x10000
75-#define VF_BAR0_MSIX_OFFSET 0x701000075+#define VF_BAR0_MSIX_OFFSET 0x7010000
76-#define VF_BAR0_MSIX_SIZE 0x400076+#define VF_BAR0_MSIX_SIZE 0x4000
77-#define VF_BAR4_SPARSE_SIZE 177+#define VF_BAR4_SPARSE_SIZE 1
78-#define VF_BAR4_HBM_OFFSET 078+#define VF_BAR4_HBM_OFFSET 0
79-#define VF_BAR4_HBM_SIZE 0x10000000079+#define VF_BAR4_HBM_SIZE 0x100000000
80-#define VF_MMIO_BAR0_SIZE_910B 0x800000080+#define VF_MMIO_BAR0_SIZE_910B 0x8000000
81-#define VF_MMIO_BAR2_SIZE_910B 0x400000081+#define VF_MMIO_BAR2_SIZE_910B 0x4000000
82-#define VF_MMIO_BAR4_SIZE_910B 0x10000000082+#define VF_MMIO_BAR4_SIZE_910B 0x100000000
83-#define VF_MMIO_BAR0_SIZE_910_93 0x800000083+#define VF_MMIO_BAR0_SIZE_910_93 0x8000000
84-#define VF_MMIO_BAR2_SIZE_910_93 0x400000084+#define VF_MMIO_BAR2_SIZE_910_93 0x4000000
85-#define VF_MMIO_BAR4_SIZE_910_93 0x10000000085+#define VF_MMIO_BAR4_SIZE_910_93 0x100000000
86-#define VF_MMIO_BAR0_SIZE_950 0x800000086+#define VF_MMIO_BAR0_SIZE_950 0x8000000
87-#define VF_MMIO_BAR2_SIZE_950 0x400000087+#define VF_MMIO_BAR2_SIZE_950 0x4000000
88-#define VF_MMIO_BAR4_SIZE_950 0x10000000088+#define VF_MMIO_BAR4_SIZE_950 0x100000000
89-#define VDAVINCI_NAME "vnpu"89+#define VDAVINCI_NAME "vnpu"
90-#define VDAVINCI_PREFIX VDAVINCI_NAME"-"90+#define VDAVINCI_PREFIX VDAVINCI_NAME "-"
91-#define VDAVINCI_VFG_MAX 491+#define VDAVINCI_VFG_MAX 4
92-#define VDAVINCI_VF_MAX 1292+#define VDAVINCI_VF_MAX 12
93-#define STORE_LE16(addr, val) (*(u16 *)addr = val)93+#define STORE_LE16(addr, val) (*(u16 *)addr = val)
94-#define STORE_LE32(addr, val) (*(u32 *)addr = val)94+#define STORE_LE32(addr, val) (*(u32 *)addr = val)
95-#define STORE_LE64(addr, val) (*(u64 *)addr = val)95+#define STORE_LE64(addr, val) (*(u64 *)addr = val)
96-#define MASK_HIGH_BIT 3196+#define MASK_HIGH_BIT 31
97-#define MASK_MID_LOW_BIT 497+#define MASK_MID_LOW_BIT 4
98-#define MASK_MID_HIGH_BIT 398+#define MASK_MID_HIGH_BIT 3
99-#define BAR_OFFSET_ALIGN 499+#define BAR_OFFSET_ALIGN 4
100-#define BAR_OFFSET_LENGTH 32100+#define BAR_OFFSET_LENGTH 32
101-#define BAR_SIZE_ALIGN 8101+#define BAR_SIZE_ALIGN 8
102-#define VFIO_PCI_OFFSET_SHIFT 40102+#define VFIO_PCI_OFFSET_SHIFT 40
103-#define VFIO_PCI_OFFSET_TO_INDEX(off) ((off) >> VFIO_PCI_OFFSET_SHIFT)103+#define VFIO_PCI_OFFSET_TO_INDEX(off) ((off) >> VFIO_PCI_OFFSET_SHIFT)
104#define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)104#define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
105-#define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)105+#define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
106 106 
107struct pci_sriov {107struct pci_sriov {
108- u16 padding[10];108+ u16 padding[10];
109- u16 offset;109+ u16 offset;
110- u16 stride;110+ u16 stride;
111};111};
112 112 
113struct page_info_list {113struct page_info_list {
@@ -225,10 +225,10 @@ struct hw_vdavinci_mmio {
225};225};
226 226 
227struct hw_vf_info {227struct hw_vf_info {
228- ka_pci_dev_t *pdev;228+ ka_pci_dev_t *pdev;
229- int irq_type;229+ int irq_type;
230- ka_iommu_domain_t *domain;230+ ka_iommu_domain_t *domain;
231- ka_iova_domain_t iovad;231+ ka_iova_domain_t iovad;
232};232};
233 233 
234struct vdavinci_ioeventfd {234struct vdavinci_ioeventfd {
@@ -303,18 +303,15 @@ bool handle_valid(uintptr_t handle);
303struct vdavinci_priv *kdev_to_davinci(ka_device_t *kdev);303struct vdavinci_priv *kdev_to_davinci(ka_device_t *kdev);
304void hw_dvt_update_vdavinci_types(struct hw_dvt *dvt, unsigned int dev_index);304void hw_dvt_update_vdavinci_types(struct hw_dvt *dvt, unsigned int dev_index);
305 305 
306-struct hw_vdavinci *hw_dvt_create_vdavinci(struct hw_dvt *dvt,306+struct hw_vdavinci *hw_dvt_create_vdavinci(struct hw_dvt *dvt, struct hw_vdavinci_type *type, ka_uuid_le_t uuid);
307- struct hw_vdavinci_type *type, ka_uuid_le_t uuid);
308void hw_dvt_destroy_vdavinci(struct hw_vdavinci *vdavinci);307void hw_dvt_destroy_vdavinci(struct hw_vdavinci *vdavinci);
309void hw_dvt_release_vdavinci(struct hw_vdavinci *vdavinci);308void hw_dvt_release_vdavinci(struct hw_vdavinci *vdavinci);
310int hw_dvt_reset_vdavinci(struct hw_vdavinci *vdavinci);309int hw_dvt_reset_vdavinci(struct hw_vdavinci *vdavinci);
311void hw_dvt_activate_vdavinci(struct hw_vdavinci *vdavinci);310void hw_dvt_activate_vdavinci(struct hw_vdavinci *vdavinci);
312void hw_dvt_deactivate_vdavinci(struct hw_vdavinci *vdavinci);311void hw_dvt_deactivate_vdavinci(struct hw_vdavinci *vdavinci);
313 312 
314-int hw_vdavinci_emulate_cfg_read(struct hw_vdavinci *vdavinci,313+int hw_vdavinci_emulate_cfg_read(struct hw_vdavinci *vdavinci, unsigned int offset, void *buf, unsigned int bytes);
315- unsigned int offset, void *buf, unsigned int bytes);314+int hw_vdavinci_emulate_cfg_write(struct hw_vdavinci *vdavinci, unsigned int offset, void *buf, unsigned int bytes);
316-int hw_vdavinci_emulate_cfg_write(struct hw_vdavinci *vdavinci,
317- unsigned int offset, void *buf, unsigned int bytes);
318void hw_vdavinci_init_cfg_space(struct hw_vdavinci *vdavinci);315void hw_vdavinci_init_cfg_space(struct hw_vdavinci *vdavinci);
319void hw_vdavinci_reset_cfg_space(struct hw_vdavinci *vdavinci);316void hw_vdavinci_reset_cfg_space(struct hw_vdavinci *vdavinci);
320void hw_dvt_debugfs_add_vdavinci(struct hw_vdavinci *vdavinci);317void hw_dvt_debugfs_add_vdavinci(struct hw_vdavinci *vdavinci);
@@ -325,27 +322,19 @@ bool davinci_vfg_support(unsigned short vendor, unsigned short device);
325int get_reserve_iova_for_check(ka_device_t *dev, ka_dma_addr_t *iova_addr, size_t *size);322int get_reserve_iova_for_check(ka_device_t *dev, ka_dma_addr_t *iova_addr, size_t *size);
326 323 
327struct hw_vdavinci_ops {324struct hw_vdavinci_ops {
328- int (*emulate_cfg_read)(struct hw_vdavinci *vdavinci, unsigned int offset,325+ int (*emulate_cfg_read)(struct hw_vdavinci *vdavinci, unsigned int offset, void *buf, unsigned int bytes);
329- void *buf, unsigned int bytes);326+ int (*emulate_cfg_write)(struct hw_vdavinci *vdavinci, unsigned int offset, void *buf, unsigned int bytes);
330- int (*emulate_cfg_write)(struct hw_vdavinci *vdavinci, unsigned int offset,327+ int (*emulate_mmio_read)(struct hw_vdavinci *vdavinci, uint64_t pa, void *buf, unsigned int bytes);
331- void *buf, unsigned int bytes);328+ int (*emulate_mmio_quirk_read)(struct hw_vdavinci *vdavinci, uint64_t pa, void *buf, unsigned int bytes);
332- int (*emulate_mmio_read)(struct hw_vdavinci *vdavinci, uint64_t pa,329+ int (*emulate_mmio_quirk_write)(struct hw_vdavinci *vdavinci, uint64_t pa, void *buf, unsigned int bytes);
333- void *buf, unsigned int bytes);330+ int (*emulate_mmio_write)(struct hw_vdavinci *vdavinci, uint64_t pa, void *buf, unsigned int bytes);
334- int (*emulate_mmio_quirk_read)(struct hw_vdavinci *vdavinci, uint64_t pa,331+ struct hw_vdavinci *(*vdavinci_create)(struct hw_dvt *dvt, struct hw_vdavinci_type *type, ka_uuid_le_t uuid);
335- void *buf, unsigned int bytes);
336- int (*emulate_mmio_quirk_write)(struct hw_vdavinci *vdavinci, uint64_t pa,
337- void *buf, unsigned int bytes);
338- int (*emulate_mmio_write)(struct hw_vdavinci *vdavinci, uint64_t pa,
339- void *buf, unsigned int bytes);
340- struct hw_vdavinci *(*vdavinci_create)(struct hw_dvt *dvt,
341- struct hw_vdavinci_type *type, ka_uuid_le_t uuid);
342 void (*vdavinci_destroy)(struct hw_vdavinci *vdavinci);332 void (*vdavinci_destroy)(struct hw_vdavinci *vdavinci);
343 void (*vdavinci_release)(struct hw_vdavinci *vdavinci);333 void (*vdavinci_release)(struct hw_vdavinci *vdavinci);
344 int (*vdavinci_reset)(struct hw_vdavinci *vdavinci);334 int (*vdavinci_reset)(struct hw_vdavinci *vdavinci);
345 void (*vdavinci_activate)(struct hw_vdavinci *vdavinci);335 void (*vdavinci_activate)(struct hw_vdavinci *vdavinci);
346 void (*vdavinci_deactivate)(struct hw_vdavinci *vdavinci);336 void (*vdavinci_deactivate)(struct hw_vdavinci *vdavinci);
347- struct hw_vdavinci_type *(*dvt_find_vdavinci_type)(struct hw_dvt *dvt,337+ struct hw_vdavinci_type *(*dvt_find_vdavinci_type)(struct hw_dvt *dvt, const char *name);
348- const char *name);
349};338};
350 339 
351struct vdavinci_drv_ops {340struct vdavinci_drv_ops {
@@ -358,27 +347,27 @@ struct vdavinci_drv_ops {
358 int (*vdavinci_hypervisor_dma_pool_init)(void *__vdavinci);347 int (*vdavinci_hypervisor_dma_pool_init)(void *__vdavinci);
359 void (*vdavinci_hypervisor_dma_pool_uninit)(void *__vdavinci);348 void (*vdavinci_hypervisor_dma_pool_uninit)(void *__vdavinci);
360 int (*vdavinci_hypervisor_dma_map_guest_page)(void *__vdavinci, unsigned long gfn, unsigned long size,349 int (*vdavinci_hypervisor_dma_map_guest_page)(void *__vdavinci, unsigned long gfn, unsigned long size,
361- ka_sg_table_t **dma_sgt);350+ ka_sg_table_t **dma_sgt);
362 void (*vdavinci_hypervisor_dma_unmap_guest_page)(void *__vdavinci, ka_sg_table_t *dma_sgt);351 void (*vdavinci_hypervisor_dma_unmap_guest_page)(void *__vdavinci, ka_sg_table_t *dma_sgt);
363 bool (*vdavinci_hypervisor_dma_pool_active)(void *__vdavinci);352 bool (*vdavinci_hypervisor_dma_pool_active)(void *__vdavinci);
364 int (*vdavinci_hypervisor_dma_map_guest_page_batch)(void *__vdavinci, unsigned long *gfn, unsigned long *dma_addr,353 int (*vdavinci_hypervisor_dma_map_guest_page_batch)(void *__vdavinci, unsigned long *gfn, unsigned long *dma_addr,
365- unsigned long count);354+ unsigned long count);
366 void (*vdavinci_hypervisor_dma_unmap_guest_page_batch)(void *__vdavinci, unsigned long *gfn,355 void (*vdavinci_hypervisor_dma_unmap_guest_page_batch)(void *__vdavinci, unsigned long *gfn,
367- unsigned long *dma_addr, unsigned long count);356+ unsigned long *dma_addr, unsigned long count);
368 bool (*vdavinci_hypervisor_is_valid_gfn)(void *__vdavinci, unsigned long gfn);357 bool (*vdavinci_hypervisor_is_valid_gfn)(void *__vdavinci, unsigned long gfn);
369 int (*vdavinci_hypervisor_mmio_get)(void **dst, int *size, void *__vdavinci, int bar);358 int (*vdavinci_hypervisor_mmio_get)(void **dst, int *size, void *__vdavinci, int bar);
370- void *(*vdavinci_hypervisor_dma_alloc_coherent)(ka_device_t *dev, size_t size,359+ void *(*vdavinci_hypervisor_dma_alloc_coherent)(ka_device_t *dev, size_t size, ka_dma_addr_t *dma_handle,
371- ka_dma_addr_t *dma_handle, ka_gfp_t gfp);360+ ka_gfp_t gfp);
372- void (*vdavinci_hypervisor_dma_free_coherent)(ka_device_t *dev, size_t size,361+ void (*vdavinci_hypervisor_dma_free_coherent)(ka_device_t *dev, size_t size, void *cpu_addr,
373- void *cpu_addr, ka_dma_addr_t dma_handle);362+ ka_dma_addr_t dma_handle);
374 ka_dma_addr_t (*vdavinci_hypervisor_dma_map_single)(ka_device_t *dev, void *ptr, size_t size,363 ka_dma_addr_t (*vdavinci_hypervisor_dma_map_single)(ka_device_t *dev, void *ptr, size_t size,
375- ka_dma_data_direction_t dir);364+ ka_dma_data_direction_t dir);
376 void (*vdavinci_hypervisor_dma_unmap_single)(ka_device_t *dev, ka_dma_addr_t addr, size_t size,365 void (*vdavinci_hypervisor_dma_unmap_single)(ka_device_t *dev, ka_dma_addr_t addr, size_t size,
377- ka_dma_data_direction_t dir);366+ ka_dma_data_direction_t dir);
378- ka_dma_addr_t (*vdavinci_hypervisor_dma_map_page)(ka_device_t *dev, ka_page_t *page, size_t offset,367+ ka_dma_addr_t (*vdavinci_hypervisor_dma_map_page)(ka_device_t *dev, ka_page_t *page, size_t offset, size_t size,
379- size_t size, ka_dma_data_direction_t dir);368+ ka_dma_data_direction_t dir);
380 void (*vdavinci_hypervisor_dma_unmap_page)(ka_device_t *dev, ka_dma_addr_t addr, size_t size,369 void (*vdavinci_hypervisor_dma_unmap_page)(ka_device_t *dev, ka_dma_addr_t addr, size_t size,
381- ka_dma_data_direction_t dir);370+ ka_dma_data_direction_t dir);
382 int (*vdavinci_get_reserve_iova_for_check)(ka_device_t *dev, ka_dma_addr_t *iova_addr, size_t *size);371 int (*vdavinci_get_reserve_iova_for_check)(ka_device_t *dev, ka_dma_addr_t *iova_addr, size_t *size);
383 bool (*vdavinci_is_vm_pfn_valid)(ka_device_t *dev, unsigned long pfn, unsigned long size);372 bool (*vdavinci_is_vm_pfn_valid)(ka_device_t *dev, unsigned long pfn, unsigned long size);
384};373};
@@ -412,14 +401,10 @@ unsigned int hw_dvt_get_used_aicpu_num(struct hw_dvt *dvt, unsigned int dev_inde
412 401 
413#if IS_VDAVINCI_KERNEL_VERSION_SUPPORT402#if IS_VDAVINCI_KERNEL_VERSION_SUPPORT
414/* vdavinci only enables eventfd support for BAR0 doorbell region */403/* vdavinci only enables eventfd support for BAR0 doorbell region */
415-long hw_vdavinci_set_ioeventfd(struct hw_vdavinci *vdavinci, loff_t offset, uint64_t data,404+long hw_vdavinci_set_ioeventfd(struct hw_vdavinci *vdavinci, loff_t offset, uint64_t data, int count, int fd);
416- int count, int fd);405+void hw_vdavinci_ioeventfd_deactive(struct hw_vdavinci *vdavinci, struct vdavinci_ioeventfd *ioeventfd);
417-void hw_vdavinci_ioeventfd_deactive(struct hw_vdavinci *vdavinci,
418- struct vdavinci_ioeventfd *ioeventfd);
419#endif406#endif
420 407 
421-ssize_t hw_vdavinci_rw(struct hw_vdavinci *vdavinci, char *buf,408+ssize_t hw_vdavinci_rw(struct hw_vdavinci *vdavinci, char *buf, size_t count, loff_t *ppos, bool write);
422- size_t count, loff_t *ppos, bool write);409+int init_vdavinci_type(struct hw_vdavinci_type *type, struct vdavinci_type *tp);
423-int init_vdavinci_type(struct hw_vdavinci_type *type,
424- struct vdavinci_type *tp);
425#endif /* DVT_H_ */410#endif /* DVT_H_ */
@@ -24,8 +24,7 @@ STATIC unsigned int sriov_virtfn_bus(ka_pci_dev_t *dev, unsigned int vf_id)
24 if (!dev->is_physfn) {24 if (!dev->is_physfn) {
25 return -EINVAL;25 return -EINVAL;
26 }26 }
27- return dev->bus->number + ((dev->devfn + dev->sriov->offset +27+ return dev->bus->number + ((dev->devfn + dev->sriov->offset + dev->sriov->stride * vf_id) >> SHIFT);
28- dev->sriov->stride * vf_id) >> SHIFT);
29}28}
30 29 
31STATIC unsigned int sriov_virtfn_devfn(ka_pci_dev_t *dev, unsigned int vf_id)30STATIC unsigned int sriov_virtfn_devfn(ka_pci_dev_t *dev, unsigned int vf_id)
@@ -63,9 +62,7 @@ STATIC void hw_dvt_clean_vdavinci_vfs(struct hw_dvt *dvt)
63 dvt->is_sriov_enabled = false;62 dvt->is_sriov_enabled = false;
64}63}
65 64 
66-STATIC int hw_dvt_sriov_init_vf_array(struct hw_dvt *dvt,65+STATIC int hw_dvt_sriov_init_vf_array(struct hw_dvt *dvt, ka_pci_dev_t *dev, int num_vfs)
67- ka_pci_dev_t *dev,
68- int num_vfs)
69{66{
70 unsigned int i = 0, j = 0;67 unsigned int i = 0, j = 0;
71 ka_device_t *kdev = NULL;68 ka_device_t *kdev = NULL;
@@ -80,8 +77,7 @@ STATIC int hw_dvt_sriov_init_vf_array(struct hw_dvt *dvt,
80 return -ENOMEM;77 return -ENOMEM;
81 }78 }
82 for (i = 0; i < (unsigned int)num_vfs; i++) {79 for (i = 0; i < (unsigned int)num_vfs; i++) {
83- dvt->sriov.vf_array[i].vf = ka_pci_get_domain_bus_and_slot(ka_pci_domain_nr(dev->bus),80+ dvt->sriov.vf_array[i].vf = ka_pci_get_domain_bus_and_slot(ka_pci_domain_nr(dev->bus), sriov_virtfn_bus(dev, i),
84- sriov_virtfn_bus(dev, i),
85 sriov_virtfn_devfn(dev, i));81 sriov_virtfn_devfn(dev, i));
86 if (dvt->sriov.vf_array[i].vf == NULL) {82 if (dvt->sriov.vf_array[i].vf == NULL) {
87 vascend_err(kdev, "Failed to enable vf\n");83 vascend_err(kdev, "Failed to enable vf\n");
@@ -102,9 +98,7 @@ out_free_vf:
102 return -EINVAL;98 return -EINVAL;
103}99}
104 100 
105-STATIC int hw_dvt_sriov_init_pf(struct hw_dvt *dvt,101+STATIC int hw_dvt_sriov_init_pf(struct hw_dvt *dvt, ka_pci_dev_t *dev, int num_vfs)
106- ka_pci_dev_t *dev,
107- int num_vfs)
108{102{
109 int ret = 0;103 int ret = 0;
110 ka_device_t *kdev = NULL;104 ka_device_t *kdev = NULL;
@@ -16,8 +16,7 @@
16#include "dvt.h"16#include "dvt.h"
17#include "dvt_sysfs.h"17#include "dvt_sysfs.h"
18 18 
19-STATIC struct hw_vdavinci_type *get_vdavinci_type(ka_device_t *dev,19+STATIC struct hw_vdavinci_type *get_vdavinci_type(ka_device_t *dev, const char *name)
20- const char *name)
21{20{
22 struct hw_vdavinci_type *type = NULL;21 struct hw_vdavinci_type *type = NULL;
23 struct vdavinci_priv *priv = NULL;22 struct vdavinci_priv *priv = NULL;
@@ -66,11 +65,11 @@ ssize_t description_ops(ka_device_t *dev, const char *name, char *buf)
66 }65 }
67 66 
68 return snprintf_s(buf, KA_MM_PAGE_SIZE, KA_MM_PAGE_SIZE - 1,67 return snprintf_s(buf, KA_MM_PAGE_SIZE, KA_MM_PAGE_SIZE - 1,
69- "type name: %s\naicore num: %u\nmemory size: %luGB\naicpu num: %u\nvpc num: %u\n"\68+ "type name: %s\naicore num: %u\nmemory size: %luGB\naicpu num: %u\nvpc num: %u\n"
70- "jpegd num: %u\njpege num: %u\nvenc num: %u\nvdec num: %u\nbar2 size: %uKB\nbar4 size: %luKB\n",69+ "jpegd num: %u\njpege num: %u\nvenc num: %u\nvdec num: %u\nbar2 size: %uKB\nbar4 size: %luKB\n",
71- type->template_name, type->aicore_num, type->mem_size, type->aicpu_num, type->vpc_num,70+ type->template_name, type->aicore_num, type->mem_size, type->aicpu_num, type->vpc_num,
72- type->jpegd_num, type->jpege_num, type->venc_num, type->vdec_num,71+ type->jpegd_num, type->jpege_num, type->venc_num, type->vdec_num, BYTES_TO_KB(type->bar2_size),
73- BYTES_TO_KB(type->bar2_size), BYTES_TO_KB(type->bar4_size));72+ BYTES_TO_KB(type->bar4_size));
74}73}
75 74 
76ssize_t device_api_ops(ka_device_t *dev, char *buf)75ssize_t device_api_ops(ka_device_t *dev, char *buf)
@@ -80,13 +79,11 @@ ssize_t device_api_ops(ka_device_t *dev, char *buf)
80 if (buf == NULL) {79 if (buf == NULL) {
81 return 0;80 return 0;
82 }81 }
83- ret = snprintf_s(buf, KA_MM_PAGE_SIZE, KA_MM_PAGE_SIZE - 1, "%s\n",82+ ret = snprintf_s(buf, KA_MM_PAGE_SIZE, KA_MM_PAGE_SIZE - 1, "%s\n", KA_VFIO_DEVICE_API_PCI_STRING);
84- KA_VFIO_DEVICE_API_PCI_STRING);
85 return ret == -1 ? 0 : ret;83 return ret == -1 ? 0 : ret;
86}84}
87 85 
88-ssize_t vfg_id_store_ops(ka_device_t *dev, const char *name,86+ssize_t vfg_id_store_ops(ka_device_t *dev, const char *name, const char *buf, size_t count)
89- const char *buf, size_t count)
90{87{
91 unsigned int vfg_id;88 unsigned int vfg_id;
92 struct hw_vdavinci_type *type = NULL;89 struct hw_vdavinci_type *type = NULL;
@@ -109,8 +106,7 @@ ssize_t vfg_id_store_ops(ka_device_t *dev, const char *name,
109 return count;106 return count;
110}107}
111 108 
112-STATIC ssize_t109+STATIC ssize_t vdavinci_id_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
113-vdavinci_id_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
114{110{
115 struct hw_vdavinci *vdavinci = get_vdavinci_from_dev(dev);111 struct hw_vdavinci *vdavinci = get_vdavinci_from_dev(dev);
116 int ret;112 int ret;
@@ -123,8 +119,7 @@ vdavinci_id_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
123 return ret == -1 ? 0 : ret;119 return ret == -1 ? 0 : ret;
124}120}
125 121 
126-STATIC ssize_t122+STATIC ssize_t hw_id_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
127-hw_id_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
128{123{
129 struct hw_vdavinci *vdavinci = get_vdavinci_from_dev(dev);124 struct hw_vdavinci *vdavinci = get_vdavinci_from_dev(dev);
130 int ret;125 int ret;
@@ -132,15 +127,13 @@ hw_id_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
132 if (vdavinci == NULL) {127 if (vdavinci == NULL) {
133 return 0;128 return 0;
134 }129 }
135- ret = snprintf_s(buf, KA_MM_PAGE_SIZE, KA_MM_PAGE_SIZE - 1,130+ ret = snprintf_s(buf, KA_MM_PAGE_SIZE, KA_MM_PAGE_SIZE - 1, "Device [%x:%x]\n", vdavinci->dvt->vendor,
136- "Device [%x:%x]\n", vdavinci->dvt->vendor,
137 vdavinci->dvt->device);131 vdavinci->dvt->device);
138 132 
139 return ret == -1 ? 0 : ret;133 return ret == -1 ? 0 : ret;
140}134}
141 135 
142-STATIC ssize_t136+STATIC ssize_t vfg_id_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
143-vfg_id_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
144{137{
145 struct hw_vdavinci *vdavinci = get_vdavinci_from_dev(dev);138 struct hw_vdavinci *vdavinci = get_vdavinci_from_dev(dev);
146 int ret;139 int ret;
@@ -153,8 +146,7 @@ vfg_id_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
153 return ret == -1 ? 0 : ret;146 return ret == -1 ? 0 : ret;
154}147}
155 148 
156-STATIC ssize_t149+STATIC ssize_t vf_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
157-vf_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
158{150{
159 struct hw_vdavinci *vdavinci = get_vdavinci_from_dev(dev);151 struct hw_vdavinci *vdavinci = get_vdavinci_from_dev(dev);
160 ka_pci_dev_t *pdev = NULL;152 ka_pci_dev_t *pdev = NULL;
@@ -167,11 +159,14 @@ vf_show(ka_device_t *dev, ka_device_attribute_t *attr, char *buf)
167 dvt = vdavinci->dvt;159 dvt = vdavinci->dvt;
168 if (dvt->is_sriov_enabled && dvt->sriov.vf_num > 0) {160 if (dvt->is_sriov_enabled && dvt->sriov.vf_num > 0) {
169 pdev = vdavinci->vf.pdev;161 pdev = vdavinci->vf.pdev;
170- ret = snprintf_s(buf, KA_MM_PAGE_SIZE, KA_MM_PAGE_SIZE - 1,162+ if (pdev == NULL) {
171- "%02x:%02x.%u\n", pdev->bus->number, KA_PCI_SLOT(pdev->devfn),163+ goto out;
172- KA_PCI_FUNC(pdev->devfn));164+ }
165+ ret = snprintf_s(buf, KA_MM_PAGE_SIZE, KA_MM_PAGE_SIZE - 1, "%02x:%02x.%u\n", pdev->bus->number,
166+ KA_PCI_SLOT(pdev->devfn), KA_PCI_FUNC(pdev->devfn));
173 return ret == -1 ? 0 : ret;167 return ret == -1 ? 0 : ret;
174 }168 }
169+out:
175 ret = snprintf_s(buf, KA_MM_PAGE_SIZE, KA_MM_PAGE_SIZE - 1, "\n");170 ret = snprintf_s(buf, KA_MM_PAGE_SIZE, KA_MM_PAGE_SIZE - 1, "\n");
176 return ret == -1 ? 0 : ret;171 return ret == -1 ? 0 : ret;
177}172}
@@ -180,13 +175,8 @@ static KA_DEVICE_ATTR_RO(vdavinci_id);
180static KA_DEVICE_ATTR_RO(hw_id);175static KA_DEVICE_ATTR_RO(hw_id);
181static KA_DEVICE_ATTR_RO(vf);176static KA_DEVICE_ATTR_RO(vf);
182 177 
183-static ka_attribute_t *hw_vdavinci_attrs[] = {178+static ka_attribute_t *hw_vdavinci_attrs[] = {&dev_attr_vdavinci_id.attr, &dev_attr_hw_id.attr, &dev_attr_vfg_id.attr,
184- &dev_attr_vdavinci_id.attr,179+ &dev_attr_vf.attr, NULL};
185- &dev_attr_hw_id.attr,
186- &dev_attr_vfg_id.attr,
187- &dev_attr_vf.attr,
188- NULL
189-};
190 180 
191static ka_attribute_group_t hw_vdavinci_group = {181static ka_attribute_group_t hw_vdavinci_group = {
192 .name = "hw_vdavinci",182 .name = "hw_vdavinci",
@@ -18,6 +18,5 @@ const ka_attribute_group_t **get_hw_vdavinci_groups(void);
18ssize_t available_instances_ops(ka_device_t *dev, const char *name, char *buf);18ssize_t available_instances_ops(ka_device_t *dev, const char *name, char *buf);
19ssize_t description_ops(ka_device_t *dev, const char *name, char *buf);19ssize_t description_ops(ka_device_t *dev, const char *name, char *buf);
20ssize_t device_api_ops(ka_device_t *dev, char *buf);20ssize_t device_api_ops(ka_device_t *dev, char *buf);
21-ssize_t vfg_id_store_ops(ka_device_t *dev, const char *name,21+ssize_t vfg_id_store_ops(ka_device_t *dev, const char *name, const char *buf, size_t count);
22- const char *buf, size_t count);
23#endif22#endif
@@ -21,19 +21,16 @@ int hw_dvt_init(void *vdavinci_priv)
21 return -EINVAL;21 return -EINVAL;
22 }22 }
23 if (!IS_ENABLED(CONFIG_VFIO_MDEV)) {23 if (!IS_ENABLED(CONFIG_VFIO_MDEV)) {
24- vascend_warn(((struct vdavinci_priv *)vdavinci_priv)->dev,24+ vascend_warn(((struct vdavinci_priv *)vdavinci_priv)->dev, "mdev is not enable");
25- "mdev is not enable");
26 return 0;25 return 0;
27 }26 }
28 ret = hw_dvt_init_device((struct vdavinci_priv *)vdavinci_priv);27 ret = hw_dvt_init_device((struct vdavinci_priv *)vdavinci_priv);
29 if (ret == -ENOTSUPP) {28 if (ret == -ENOTSUPP) {
30- vascend_warn(((struct vdavinci_priv *)vdavinci_priv)->dev,29+ vascend_warn(((struct vdavinci_priv *)vdavinci_priv)->dev, "vdavinci: unsupported device");
31- "vdavinci is not support");
32 return 0;30 return 0;
33 }31 }
34 if (ret) {32 if (ret) {
35- vascend_err(((struct vdavinci_priv *)vdavinci_priv)->dev,33+ vascend_err(((struct vdavinci_priv *)vdavinci_priv)->dev, "Fail to init DVT device, ret: %d\n", ret);
36- "Fail to init DVT device, ret: %d\n", ret);
37 return ret;34 return ret;
38 }35 }
39 36 
@@ -49,8 +46,7 @@ int hw_dvt_uninit(void *vdavinci_priv)
49 }46 }
50 ret = hw_dvt_uninit_device((struct vdavinci_priv *)vdavinci_priv);47 ret = hw_dvt_uninit_device((struct vdavinci_priv *)vdavinci_priv);
51 if (ret) {48 if (ret) {
52- vascend_err(((struct vdavinci_priv *)vdavinci_priv)->dev,49+ vascend_err(((struct vdavinci_priv *)vdavinci_priv)->dev, "Fail to uninit DVT device, ret: %d\n", ret);
53- "Fail to uninit DVT device, ret: %d\n", ret);
54 return ret;50 return ret;
55 }51 }
56 52 
@@ -18,34 +18,34 @@
18#include "ka_kvm_pub.h"18#include "ka_kvm_pub.h"
19#include "ka_memory_pub.h"19#include "ka_memory_pub.h"
20 20 
21-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,18,0))21+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 18, 0))
22-#define IS_VDAVINCI_KERNEL_VERSION_SUPPORT 122+#define IS_VDAVINCI_KERNEL_VERSION_SUPPORT 1
23#else23#else
24-#define IS_VDAVINCI_KERNEL_VERSION_SUPPORT 024+#define IS_VDAVINCI_KERNEL_VERSION_SUPPORT 0
25#endif25#endif
26 26 
27-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0))27+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0))
28-#define IS_VDAVINCI_IODEV_SUPPORT 128+#define IS_VDAVINCI_IODEV_SUPPORT 1
29#else29#else
30-#define IS_VDAVINCI_IODEV_SUPPORT 030+#define IS_VDAVINCI_IODEV_SUPPORT 0
31#endif31#endif
32 32 
33#ifdef VM_ALLOW_ANY_UNCACHED33#ifdef VM_ALLOW_ANY_UNCACHED
34-#define IS_VDAVINCI_NORMAL_NC_SUPPORT 134+#define IS_VDAVINCI_NORMAL_NC_SUPPORT 1
35#else35#else
36-#define IS_VDAVINCI_NORMAL_NC_SUPPORT 036+#define IS_VDAVINCI_NORMAL_NC_SUPPORT 0
37#endif37#endif
38 38 
39-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,10,0)) && defined(CONFIG_KEXEC_KERNEL_HOTUPGRADE)39+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)) && defined(CONFIG_KEXEC_KERNEL_HOTUPGRADE)
40-#define IS_VDAVINCI_VPMEM_SUPPORT 140+#define IS_VDAVINCI_VPMEM_SUPPORT 1
41#else41#else
42-#define IS_VDAVINCI_VPMEM_SUPPORT 042+#define IS_VDAVINCI_VPMEM_SUPPORT 0
43#endif43#endif
44 44 
45-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,10,0))45+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0))
46-#define IS_VDAVINCI_PIN_HVA_SUPPORT 146+#define IS_VDAVINCI_PIN_HVA_SUPPORT 1
47#else47#else
48-#define IS_VDAVINCI_PIN_HVA_SUPPORT 048+#define IS_VDAVINCI_PIN_HVA_SUPPORT 0
49#endif49#endif
50 50 
51#define RESERVE_SIZE 4051#define RESERVE_SIZE 40
@@ -158,7 +158,7 @@ enum HW_VDAVINCI_TYPE_950_BIN0 {
158 TYPE_VIR04_1C_15G_BIN0,158 TYPE_VIR04_1C_15G_BIN0,
159 TYPE_MAX_950_BIN0159 TYPE_MAX_950_BIN0
160};160};
161- 161+ 
162/* 32core, 128G */162/* 32core, 128G */
163enum HW_VDAVINCI_TYPE_950_BIN1 {163enum HW_VDAVINCI_TYPE_950_BIN1 {
164 TYPE_VIR16_7C_60G_BIN1,164 TYPE_VIR16_7C_60G_BIN1,
@@ -166,14 +166,14 @@ enum HW_VDAVINCI_TYPE_950_BIN1 {
166 TYPE_VIR04_1C_15G_BIN1,166 TYPE_VIR04_1C_15G_BIN1,
167 TYPE_MAX_950_BIN1167 TYPE_MAX_950_BIN1
168};168};
169- 169+ 
170/* 28core, 128G */170/* 28core, 128G */
171enum HW_VDAVINCI_TYPE_950_BIN2 {171enum HW_VDAVINCI_TYPE_950_BIN2 {
172 TYPE_VIR14_5C_60G_BIN2,172 TYPE_VIR14_5C_60G_BIN2,
173 TYPE_VIR07_2C_30G_BIN2,173 TYPE_VIR07_2C_30G_BIN2,
174 TYPE_MAX_950_BIN2174 TYPE_MAX_950_BIN2
175};175};
176- 176+ 
177/* 28core, 112G */177/* 28core, 112G */
178enum HW_VDAVINCI_TYPE_950_BIN3 {178enum HW_VDAVINCI_TYPE_950_BIN3 {
179 TYPE_VIR14_5C_52G_BIN3,179 TYPE_VIR14_5C_52G_BIN3,
@@ -199,7 +199,7 @@ struct vdavinci_type {
199 int type;199 int type;
200 unsigned int bar0_size;200 unsigned int bar0_size;
201 unsigned int bar2_size;201 unsigned int bar2_size;
202- unsigned long bar4_size; /* if non-zero, use this value first */202+ unsigned long bar4_size; /* if non-zero, use this value first */
203 unsigned int aicore_num;203 unsigned int aicore_num;
204 unsigned long mem_size;204 unsigned long mem_size;
205 unsigned int aicpu_num;205 unsigned int aicpu_num;
@@ -208,7 +208,7 @@ struct vdavinci_type {
208 unsigned int jpege_num;208 unsigned int jpege_num;
209 unsigned int venc_num;209 unsigned int venc_num;
210 unsigned int vdec_num;210 unsigned int vdec_num;
211- unsigned int share; /* the minimum value is 1 */211+ unsigned int share; /* the minimum value is 1 */
212 unsigned long ddrmem_size;212 unsigned long ddrmem_size;
213 unsigned long hbmmem_size;213 unsigned long hbmmem_size;
214};214};
@@ -236,8 +236,8 @@ struct vdavinci_bar_map {
236 size_t offset;236 size_t offset;
237 enum HW_MAP_TYPE map_type;237 enum HW_MAP_TYPE map_type;
238 union {238 union {
239- u64 paddr; /* vaild when map_type is MAP_TYPE_PASSTHROUGH */239+ u64 paddr; /* vaild when map_type is MAP_TYPE_PASSTHROUGH */
240- void *vaddr; /* vaild when map_type is MAP_TYPE_BACKEND */240+ void *vaddr; /* vaild when map_type is MAP_TYPE_BACKEND */
241 };241 };
242 size_t size;242 size_t size;
243};243};
@@ -259,20 +259,17 @@ struct vdavinci_dev {
259 * dev_index value [0, 1 ...]259 * dev_index value [0, 1 ...]
260 */260 */
261struct vdavinci_priv_ops {261struct vdavinci_priv_ops {
262- int (*vdavinci_create)(struct vdavinci_dev *dev, void *vdavinci,262+ int (*vdavinci_create)(struct vdavinci_dev *dev, void *vdavinci, struct vdavinci_type *type, ka_uuid_le_t uuid);
263- struct vdavinci_type *type, ka_uuid_le_t uuid);
264 void (*vdavinci_destroy)(struct vdavinci_dev *dev);263 void (*vdavinci_destroy)(struct vdavinci_dev *dev);
265 void (*vdavinci_release)(struct vdavinci_dev *dev);264 void (*vdavinci_release)(struct vdavinci_dev *dev);
266 int (*vdavinci_reset)(struct vdavinci_dev *dev);265 int (*vdavinci_reset)(struct vdavinci_dev *dev);
267 int (*vdavinci_flr)(struct vdavinci_dev *dev);266 int (*vdavinci_flr)(struct vdavinci_dev *dev);
268 void (*vdavinci_notify)(struct vdavinci_dev *dev, int db_index);267 void (*vdavinci_notify)(struct vdavinci_dev *dev, int db_index);
269- int (*vdavinci_getmapinfo)(struct vdavinci_dev *dev,268+ int (*vdavinci_getmapinfo)(struct vdavinci_dev *dev, struct vdavinci_type *type, u32 bar_id,
270- struct vdavinci_type *type, u32 bar_id,
271 struct vdavinci_mapinfo *mapinfo);269 struct vdavinci_mapinfo *mapinfo);
272 int (*vdavinci_putmapinfo)(struct vdavinci_dev *dev);270 int (*vdavinci_putmapinfo)(struct vdavinci_dev *dev);
273 int (*davinci_getdevnum)(ka_device_t *dev);271 int (*davinci_getdevnum)(ka_device_t *dev);
274- int (*davinci_getdevinfo)(ka_device_t *dev, u32 dev_index,272+ int (*davinci_getdevinfo)(ka_device_t *dev, u32 dev_index, struct dvt_devinfo *dev_info);
275- struct dvt_devinfo* dev_info);
276 int (*vascend_enable_sriov)(ka_pci_dev_t *pdev, int numvfs);273 int (*vascend_enable_sriov)(ka_pci_dev_t *pdev, int numvfs);
277};274};
278 275 
@@ -304,8 +301,7 @@ int hw_dvt_hypervisor_inject_msix(void *__vdavinci, u32 vector, int irq);
304 * Returns:301 * Returns:
305 * Zero on success, negative error code if failed.302 * Zero on success, negative error code if failed.
306 */303 */
307-int hw_dvt_hypervisor_read_gpa(void *__vdavinci, unsigned long gpa,304+int hw_dvt_hypervisor_read_gpa(void *__vdavinci, unsigned long gpa, void *buf, unsigned long len);
308- void *buf, unsigned long len);
309 305 
310/**306/**
311 * hw_dvt_hypervisor_write_gpa - copy data from host data buffer to GPA307 * hw_dvt_hypervisor_write_gpa - copy data from host data buffer to GPA
@@ -317,8 +313,7 @@ int hw_dvt_hypervisor_read_gpa(void *__vdavinci, unsigned long gpa,
317 * Returns:313 * Returns:
318 * Zero on success, negative error code if failed.314 * Zero on success, negative error code if failed.
319 */315 */
320-int hw_dvt_hypervisor_write_gpa(void *__vdavinci, unsigned long gpa,316+int hw_dvt_hypervisor_write_gpa(void *__vdavinci, unsigned long gpa, void *buf, unsigned long len);
321- void *buf, unsigned long len);
322 317 
323/**318/**
324 * hw_dvt_hypervisor_gfn_to_mfn - translate a GFN to MFN319 * hw_dvt_hypervisor_gfn_to_mfn - translate a GFN to MFN
@@ -328,8 +323,7 @@ int hw_dvt_hypervisor_write_gpa(void *__vdavinci, unsigned long gpa,
328 * Returns:323 * Returns:
329 * MFN on success, hw_dvt_INVALID_ADDR if failed.324 * MFN on success, hw_dvt_INVALID_ADDR if failed.
330 */325 */
331-unsigned long hw_dvt_hypervisor_gfn_to_mfn(void *__vdavinci,326+unsigned long hw_dvt_hypervisor_gfn_to_mfn(void *__vdavinci, unsigned long gfn);
332- unsigned long gfn);
333 327 
334/**328/**
335 * hw_dvt_hypervisor_dma_pool_init - dma pool init329 * hw_dvt_hypervisor_dma_pool_init - dma pool init
@@ -356,8 +350,7 @@ void hw_dvt_hypervisor_dma_pool_uninit(void *__vdavinci);
356 * Returns:350 * Returns:
357 * 0 on success, negative error code if failed.351 * 0 on success, negative error code if failed.
358 */352 */
359-int hw_dvt_hypervisor_dma_map_guest_page(void *__vdavinci, unsigned long gfn,353+int hw_dvt_hypervisor_dma_map_guest_page(void *__vdavinci, unsigned long gfn, unsigned long size,
360- unsigned long size,
361 ka_sg_table_t **dma_sgt);354 ka_sg_table_t **dma_sgt);
362 355 
363/**356/**
@@ -365,8 +358,7 @@ int hw_dvt_hypervisor_dma_map_guest_page(void *__vdavinci, unsigned long gfn,
365 * @vdavinci: a vdavinci358 * @vdavinci: a vdavinci
366 * @dma_sgt: the dma addr list(sg_table)359 * @dma_sgt: the dma addr list(sg_table)
367 */360 */
368-void hw_dvt_hypervisor_dma_unmap_guest_page(void *__vdavinci,361+void hw_dvt_hypervisor_dma_unmap_guest_page(void *__vdavinci, ka_sg_table_t *dma_sgt);
369- ka_sg_table_t *dma_sgt);
370 362 
371/**363/**
372 * hw_dvt_hypervisor_dma_pool_active - dma pool active or not364 * hw_dvt_hypervisor_dma_pool_active - dma pool active or not
@@ -388,9 +380,7 @@ bool hw_dvt_hypervisor_dma_pool_active(void *__vdavinci);
388 * Returns:380 * Returns:
389 * 0 on success, negative error code if failed.381 * 0 on success, negative error code if failed.
390 */382 */
391-int hw_dvt_hypervisor_dma_map_guest_page_batch(void *__vdavinci,383+int hw_dvt_hypervisor_dma_map_guest_page_batch(void *__vdavinci, unsigned long *gfn, unsigned long *dma_addr,
392- unsigned long *gfn,
393- unsigned long *dma_addr,
394 unsigned long count);384 unsigned long count);
395 385 
396/**386/**
@@ -401,9 +391,7 @@ int hw_dvt_hypervisor_dma_map_guest_page_batch(void *__vdavinci,
401 * @dma_addr: retrieve dma addr array391 * @dma_addr: retrieve dma addr array
402 * @count: array size392 * @count: array size
403 */393 */
404-void hw_dvt_hypervisor_dma_unmap_guest_page_batch(void *__vdavinci,394+void hw_dvt_hypervisor_dma_unmap_guest_page_batch(void *__vdavinci, unsigned long *gfn, unsigned long *dma_addr,
405- unsigned long *gfn,
406- unsigned long *dma_addr,
407 unsigned long count);395 unsigned long count);
408/**396/**
409 * hw_dvt_hypervisor_is_valid_gfn - check if a visible gfn397 * hw_dvt_hypervisor_is_valid_gfn - check if a visible gfn
@@ -428,21 +416,14 @@ bool hw_dvt_hypervisor_is_valid_gfn(void *__vdavinci, unsigned long gfn);
428 416 
429int hw_dvt_hypervisor_mmio_get(void **dst, int *size, void *__vdavinci, int bar);417int hw_dvt_hypervisor_mmio_get(void **dst, int *size, void *__vdavinci, int bar);
430 418 
431-bool hw_dvt_hypervisor_is_vm_pfn_valid(ka_device_t *dev,419+bool hw_dvt_hypervisor_is_vm_pfn_valid(ka_device_t *dev, unsigned long pfn, unsigned long size);
432- unsigned long pfn, unsigned long size);
433 420 
434- 421+void *vdavinci_dma_alloc_coherent(ka_device_t *dev, size_t size, ka_dma_addr_t *dma_handle, ka_gfp_t flags);
435-void *vdavinci_dma_alloc_coherent(ka_device_t *dev, size_t size,422+void vdavinci_dma_free_coherent(ka_device_t *dev, size_t size, void *vaddr, ka_dma_addr_t dma_handle);
436- ka_dma_addr_t *dma_handle, ka_gfp_t flags);423+ka_dma_addr_t vdavinci_dma_map_single(ka_device_t *dev, void *ptr, size_t size, ka_dma_data_direction_t dir);
437-void vdavinci_dma_free_coherent(ka_device_t *dev, size_t size,424+ka_dma_addr_t vdavinci_dma_map_page(ka_device_t *dev, ka_page_t *page, size_t offset, size_t size,
438- void *vaddr, ka_dma_addr_t dma_handle);425+ ka_dma_data_direction_t dir);
439-ka_dma_addr_t vdavinci_dma_map_single(ka_device_t *dev, void *ptr, size_t size,426+void vdavinci_dma_unmap_single(ka_device_t *dev, ka_dma_addr_t addr, size_t size, ka_dma_data_direction_t dir);
440- ka_dma_data_direction_t dir);427+void vdavinci_dma_unmap_page(ka_device_t *dev, ka_dma_addr_t addr, size_t size, ka_dma_data_direction_t dir);
441-ka_dma_addr_t vdavinci_dma_map_page(ka_device_t *dev, ka_page_t *page, size_t offset,
442- size_t size, ka_dma_data_direction_t dir);
443-void vdavinci_dma_unmap_single(ka_device_t *dev, ka_dma_addr_t addr, size_t size,
444- ka_dma_data_direction_t dir);
445-void vdavinci_dma_unmap_page(ka_device_t *dev, ka_dma_addr_t addr, size_t size,
446- ka_dma_data_direction_t dir);
447 428 
448#endif /* HW_VDAVINCI_H_ */429#endif /* HW_VDAVINCI_H_ */
@@ -35,8 +35,7 @@ int hw_dvt_hypervisor_inject_msix(void *__vdavinci, u32 vector, int irq)
35 command = *(u16 *)(&vdavinci_cfg_space(vdavinci)[KA_PCI_COMMAND]);35 command = *(u16 *)(&vdavinci_cfg_space(vdavinci)[KA_PCI_COMMAND]);
36 control = *(u16 *)(&vdavinci_cfg_space(vdavinci)[DAVINCI_PCI_MSIX_FLAGS]);36 control = *(u16 *)(&vdavinci_cfg_space(vdavinci)[DAVINCI_PCI_MSIX_FLAGS]);
37 37 
38- if (!(command & KA_PCI_COMMAND_INTX_DISABLE) ||38+ if (!(command & KA_PCI_COMMAND_INTX_DISABLE) || !(control & KA_PCI_MSIX_FLAGS_ENABLE) ||
39- !(control & KA_PCI_MSIX_FLAGS_ENABLE) ||
40 (control & KA_PCI_MSIX_FLAGS_MASKALL)) {39 (control & KA_PCI_MSIX_FLAGS_MASKALL)) {
41 vascend_info(vdavinci->dvt->vdavinci_priv->dev, "msix cap flag did't support\n");40 vascend_info(vdavinci->dvt->vdavinci_priv->dev, "msix cap flag did't support\n");
42 return -EPERM;41 return -EPERM;
@@ -57,8 +56,7 @@ int hw_dvt_hypervisor_inject_msix(void *__vdavinci, u32 vector, int irq)
57 * Returns:56 * Returns:
58 * Zero on success, negative error code if failed.57 * Zero on success, negative error code if failed.
59 */58 */
60-int hw_dvt_hypervisor_read_gpa(void *__vdavinci,59+int hw_dvt_hypervisor_read_gpa(void *__vdavinci, unsigned long gpa, void *buf, unsigned long len)
61- unsigned long gpa, void *buf, unsigned long len)
62{60{
63 struct hw_vdavinci *vdavinci = (struct hw_vdavinci *)__vdavinci;61 struct hw_vdavinci *vdavinci = (struct hw_vdavinci *)__vdavinci;
64 62 
@@ -78,8 +76,7 @@ int hw_dvt_hypervisor_read_gpa(void *__vdavinci,
78 * Returns:76 * Returns:
79 * Zero on success, negative error code if failed.77 * Zero on success, negative error code if failed.
80 */78 */
81-int hw_dvt_hypervisor_write_gpa(void *__vdavinci,79+int hw_dvt_hypervisor_write_gpa(void *__vdavinci, unsigned long gpa, void *buf, unsigned long len)
82- unsigned long gpa, void *buf, unsigned long len)
83{80{
84 struct hw_vdavinci *vdavinci = (struct hw_vdavinci *)__vdavinci;81 struct hw_vdavinci *vdavinci = (struct hw_vdavinci *)__vdavinci;
85 82 
@@ -149,8 +146,7 @@ void hw_dvt_hypervisor_dma_pool_uninit(void *__vdavinci)
149 * Returns:146 * Returns:
150 * 0 on success, negative error code if failed.147 * 0 on success, negative error code if failed.
151 */148 */
152-int hw_dvt_hypervisor_dma_map_guest_page(void *__vdavinci,149+int hw_dvt_hypervisor_dma_map_guest_page(void *__vdavinci, unsigned long gfn, unsigned long size,
153- unsigned long gfn, unsigned long size,
154 ka_sg_table_t **dma_sgt)150 ka_sg_table_t **dma_sgt)
155{151{
156 struct hw_vdavinci *vdavinci = (struct hw_vdavinci *)__vdavinci;152 struct hw_vdavinci *vdavinci = (struct hw_vdavinci *)__vdavinci;
@@ -167,8 +163,7 @@ int hw_dvt_hypervisor_dma_map_guest_page(void *__vdavinci,
167 * @vdavinci: a vdavinci163 * @vdavinci: a vdavinci
168 * @dma_sgt: the dma addr list(sg_table)164 * @dma_sgt: the dma addr list(sg_table)
169 */165 */
170-void hw_dvt_hypervisor_dma_unmap_guest_page(void *__vdavinci,166+void hw_dvt_hypervisor_dma_unmap_guest_page(void *__vdavinci, ka_sg_table_t *dma_sgt)
171- ka_sg_table_t *dma_sgt)
172{167{
173 if (__vdavinci == NULL || dma_sgt == NULL) {168 if (__vdavinci == NULL || dma_sgt == NULL) {
174 ka_dfx_pr_err("vdavinci or dma_sgt is null\n");169 ka_dfx_pr_err("vdavinci or dma_sgt is null\n");
@@ -179,12 +174,12 @@ void hw_dvt_hypervisor_dma_unmap_guest_page(void *__vdavinci,
179}174}
180 175 
181/**176/**
182- * hw_dvt_hypervisor_dma_pool_active - dma pool active or not177+ * hw_dvt_hypervisor_dma_pool_active - dma pool active or not
183- * @__vdavinci: a vdavinci178+ * @__vdavinci: a vdavinci
184- *179+ *
185- * Returns:180+ * Returns:
186- * true on active, false on inactive.181+ * true on active, false on inactive.
187- */182+ */
188bool hw_dvt_hypervisor_dma_pool_active(void *__vdavinci)183bool hw_dvt_hypervisor_dma_pool_active(void *__vdavinci)
189{184{
190 if (__vdavinci == NULL) {185 if (__vdavinci == NULL) {
@@ -195,23 +190,22 @@ bool hw_dvt_hypervisor_dma_pool_active(void *__vdavinci)
195}190}
196 191 
197/**192/**
198- * hw_dvt_hypervisor_dma_map_guest_page_batch193+ * hw_dvt_hypervisor_dma_map_guest_page_batch
199- * - setup dma map for guest page when dma pool is active194+ * - setup dma map for guest page when dma pool is active
200- * @__vdavinci: a vdavinci195+ * @__vdavinci: a vdavinci
201- * @gfn: guest pfn array196+ * @gfn: guest pfn array
202- * @dma_addr: retrieve dma addr array197+ * @dma_addr: retrieve dma addr array
203- * @count: array size198+ * @count: array size
204- *199+ *
205- * Returns:200+ * Returns:
206- * 0 on success, negative error code if failed.201+ * 0 on success, negative error code if failed.
207- */202+ */
208-int hw_dvt_hypervisor_dma_map_guest_page_batch(void *__vdavinci,203+int hw_dvt_hypervisor_dma_map_guest_page_batch(void *__vdavinci, unsigned long *gfn, unsigned long *dma_addr,
209- unsigned long *gfn, unsigned long *dma_addr, unsigned long count)204+ unsigned long count)
210{205{
211 struct hw_vdavinci *vdavinci = (struct hw_vdavinci *)__vdavinci;206 struct hw_vdavinci *vdavinci = (struct hw_vdavinci *)__vdavinci;
212 207 
213- if (vdavinci == NULL || gfn == NULL || dma_addr == NULL208+ if (vdavinci == NULL || gfn == NULL || dma_addr == NULL || count == 0) {
214- || count == 0) {
215 return -EINVAL;209 return -EINVAL;
216 }210 }
217 211 
@@ -219,17 +213,16 @@ int hw_dvt_hypervisor_dma_map_guest_page_batch(void *__vdavinci,
219}213}
220 214 
221/**215/**
222- * hw_dvt_hypervisor_dma_unmap_guest_page_batch216+ * hw_dvt_hypervisor_dma_unmap_guest_page_batch
223- * - cancel dma map for guest page when dma pool is active217+ * - cancel dma map for guest page when dma pool is active
224- * @__vdavinci: a vdavinci218+ * @__vdavinci: a vdavinci
225- * @gfn: guest pfn array219+ * @gfn: guest pfn array
226- * @dma_addr: retrieve dma addr array220+ * @dma_addr: retrieve dma addr array
227- * @count: array size221+ * @count: array size
228- */222+ */
229-void hw_dvt_hypervisor_dma_unmap_guest_page_batch(void *__vdavinci, unsigned long *gfn,223+void hw_dvt_hypervisor_dma_unmap_guest_page_batch(void *__vdavinci, unsigned long *gfn, unsigned long *dma_addr,
230- unsigned long *dma_addr, unsigned long count)224+ unsigned long count)
231-{225+{}
232-}
233 226 
234/**227/**
235 * hw_dvt_hypervisor_is_valid_gfn - check if a visible gfn228 * hw_dvt_hypervisor_is_valid_gfn - check if a visible gfn
@@ -255,16 +248,14 @@ bool hw_dvt_hypervisor_is_valid_gfn(void *__vdavinci, unsigned long gfn)
255 248 
256int hw_dvt_hypervisor_mmio_get(void **dst, int *size, void *__vdavinci, int bar)249int hw_dvt_hypervisor_mmio_get(void **dst, int *size, void *__vdavinci, int bar)
257{250{
258- if (g_hw_kvmdt_ops.mmio_get == NULL || __vdavinci == NULL ||251+ if (g_hw_kvmdt_ops.mmio_get == NULL || __vdavinci == NULL || dst == NULL || size == NULL) {
259- dst == NULL || size == NULL) {
260 return -EINVAL;252 return -EINVAL;
261 }253 }
262 254 
263 return g_hw_kvmdt_ops.mmio_get(dst, size, __vdavinci, bar);255 return g_hw_kvmdt_ops.mmio_get(dst, size, __vdavinci, bar);
264}256}
265 257 
266-bool hw_dvt_hypervisor_is_vm_pfn_valid(ka_device_t *dev,258+bool hw_dvt_hypervisor_is_vm_pfn_valid(ka_device_t *dev, unsigned long pfn, unsigned long size)
267- unsigned long pfn, unsigned long size)
268{259{
269 if (ka_unlikely(dev == NULL || size == 0)) {260 if (ka_unlikely(dev == NULL || size == 0)) {
270 return false;261 return false;
@@ -28,10 +28,10 @@
28#include "vdavinci.h"28#include "vdavinci.h"
29#include "kvmdt.h"29#include "kvmdt.h"
30 30 
31-#define HW_VDAVINCI_READ_SUPPORT_TYPES 331+#define HW_VDAVINCI_READ_SUPPORT_TYPES 3
32-#define HW_VDAVINCI_WRITE_SUPPORT_TYPES 232+#define HW_VDAVINCI_WRITE_SUPPORT_TYPES 2
33 33 
34-#define HW_VDAVINCI_IRQ_BYPASS_REGISTERED 034+#define HW_VDAVINCI_IRQ_BYPASS_REGISTERED 0
35 35 
36enum {36enum {
37 IO_REGION_INDEX,37 IO_REGION_INDEX,
@@ -18,7 +18,7 @@
18#include "ka_memory_pub.h"18#include "ka_memory_pub.h"
19#include "dvt.h"19#include "dvt.h"
20 20 
21-#define KVMDT_ERROR_PFN (~0UL)21+#define KVMDT_ERROR_PFN (~0UL)
22 22 
23/*23/*
24 * Specific MPT modules function collections.24 * Specific MPT modules function collections.
@@ -30,22 +30,18 @@ struct hw_kvmdt_ops {
30 void (*detach_vdavinci)(void *vdavinci);30 void (*detach_vdavinci)(void *vdavinci);
31 int (*inject_msix)(uintptr_t handle, u32 vector, int irq);31 int (*inject_msix)(uintptr_t handle, u32 vector, int irq);
32 unsigned long (*from_virt_to_mfn)(void *addr);32 unsigned long (*from_virt_to_mfn)(void *addr);
33- int (*read_gpa)(uintptr_t handle, unsigned long gpa, void *buf,33+ int (*read_gpa)(uintptr_t handle, unsigned long gpa, void *buf, unsigned long len);
34- unsigned long len);34+ int (*write_gpa)(uintptr_t handle, unsigned long gpa, void *buf, unsigned long len);
35- int (*write_gpa)(uintptr_t handle, unsigned long gpa, void *buf,
36- unsigned long len);
37 unsigned long (*gfn_to_mfn)(uintptr_t handle, unsigned long gfn);35 unsigned long (*gfn_to_mfn)(uintptr_t handle, unsigned long gfn);
38 bool (*is_valid_gfn)(uintptr_t handle, unsigned long gfn);36 bool (*is_valid_gfn)(uintptr_t handle, unsigned long gfn);
39- int (*mmio_get)(void **dst, int *size, void *_vdavinci, int bar);37+ int (*mmio_get)(void **dst, int *size, void *_vdavinci, int bar);
40 int (*dma_pool_init)(struct hw_vdavinci *vdavinci);38 int (*dma_pool_init)(struct hw_vdavinci *vdavinci);
41 void (*dma_pool_uninit)(struct hw_vdavinci *vdavinci);39 void (*dma_pool_uninit)(struct hw_vdavinci *vdavinci);
42- int (*dma_get_iova)(struct hw_vdavinci *vdavinci, unsigned long gfn,40+ int (*dma_get_iova)(struct hw_vdavinci *vdavinci, unsigned long gfn, unsigned long size, ka_sg_table_t **dma_sgt);
43- unsigned long size, ka_sg_table_t **dma_sgt);
44 void (*dma_put_iova)(ka_sg_table_t *dma_sgt);41 void (*dma_put_iova)(ka_sg_table_t *dma_sgt);
45- int (*dma_get_iova_batch)(struct hw_vdavinci *vdavinci, unsigned long *gfn,42+ int (*dma_get_iova_batch)(struct hw_vdavinci *vdavinci, unsigned long *gfn, unsigned long *dma_addr,
46- unsigned long *dma_addr, unsigned long count);43+ unsigned long count);
47- bool (*is_pfn_valid)(ka_device_t *dev,44+ bool (*is_pfn_valid)(ka_device_t *dev, unsigned long pfn, unsigned long size);
48- unsigned long pfn, unsigned long size);
49};45};
50 46 
51struct kvmdt_guest_info {47struct kvmdt_guest_info {
@@ -58,14 +54,10 @@ ka_vdev *hw_vdavinci_create(struct kobject *kobj, ka_mdev_device_t *mdev);
58int hw_vdavinci_remove(ka_mdev_device_t *mdev);54int hw_vdavinci_remove(ka_mdev_device_t *mdev);
59int hw_vdavinci_open(ka_mdev_device_t *mdev);55int hw_vdavinci_open(ka_mdev_device_t *mdev);
60void hw_vdavinci_release(ka_mdev_device_t *mdev);56void hw_vdavinci_release(ka_mdev_device_t *mdev);
61-ssize_t hw_vdavinci_read(ka_mdev_device_t *mdev, char __ka_user *buf,57+ssize_t hw_vdavinci_read(ka_mdev_device_t *mdev, char __ka_user *buf, size_t count, loff_t *ppos);
62- size_t count, loff_t *ppos);58+size_t hw_vdavinci_write(ka_mdev_device_t *mdev, const char __ka_user *buf, size_t count, loff_t *ppos);
63-size_t hw_vdavinci_write(ka_mdev_device_t *mdev,
64- const char __ka_user *buf,
65- size_t count, loff_t *ppos);
66int hw_vdavinci_mmap(ka_mdev_device_t *mdev, ka_vm_area_struct_t *vma);59int hw_vdavinci_mmap(ka_mdev_device_t *mdev, ka_vm_area_struct_t *vma);
67-long hw_vdavinci_ioctl(ka_mdev_device_t *mdev, unsigned int cmd,60+long hw_vdavinci_ioctl(ka_mdev_device_t *mdev, unsigned int cmd, unsigned long arg);
68- unsigned long arg);
69void hw_vdavinci_release_vm(struct hw_vdavinci *vdavinci);61void hw_vdavinci_release_vm(struct hw_vdavinci *vdavinci);
70static inline bool hw_vdavinci_is_support_normal_nc(void)62static inline bool hw_vdavinci_is_support_normal_nc(void)
71{63{
@@ -18,23 +18,26 @@
18 18 
19#define module_devdrv "vascend"19#define module_devdrv "vascend"
20#ifdef DAVINCI_DEBUG20#ifdef DAVINCI_DEBUG
21-#define vascend_err(dev, fmt, ...) ka_dev_err(dev, "[%s] [CPU %d] [%s/%d/%d] [%s %d] " \21+#define vascend_err(dev, fmt, ...) \
22- fmt, module_devdrv, ka_system_smp_processor_id(), ka_task_get_current()->comm, ka_task_get_current()->tgid, ka_task_get_current()->pid, \22+ ka_dev_err(dev, "[%s] [CPU %d] [%s/%d/%d] [%s %d] " fmt, module_devdrv, ka_system_smp_processor_id(), \
23- __func__, __LINE__, ##__VA_ARGS__)23+ ka_task_get_current()->comm, ka_task_get_current()->tgid, ka_task_get_current()->pid, __func__, \
24-#define vascend_warn(dev, fmt, ...) ka_dev_warn(dev, "[%s] [CPU %d] [%s/%d/%d] [%s %d] " \24+ __LINE__, ##__VA_ARGS__)
25- fmt, module_devdrv, ka_system_smp_processor_id(), ka_task_get_current()->comm, ka_task_get_current()->tgid, ka_task_get_current()->pid, \25+#define vascend_warn(dev, fmt, ...) \
26- __func__, __LINE__, ##__VA_ARGS__)26+ ka_dev_warn(dev, "[%s] [CPU %d] [%s/%d/%d] [%s %d] " fmt, module_devdrv, ka_system_smp_processor_id(), \
27-#define vascend_info(dev, fmt, ...) ka_dev_info(dev, "[%s] [CPU %d] [%s/%d/%d] [%s %d] " \27+ ka_task_get_current()->comm, ka_task_get_current()->tgid, ka_task_get_current()->pid, __func__, \
28- fmt, module_devdrv, ka_system_smp_processor_id(), ka_task_get_current()->comm, ka_task_get_current()->tgid, ka_task_get_current()->pid, \28+ __LINE__, ##__VA_ARGS__)
29- __func__, __LINE__, ##__VA_ARGS__)29+#define vascend_info(dev, fmt, ...) \
30+ ka_dev_info(dev, "[%s] [CPU %d] [%s/%d/%d] [%s %d] " fmt, module_devdrv, ka_system_smp_processor_id(), \
31+ ka_task_get_current()->comm, ka_task_get_current()->tgid, ka_task_get_current()->pid, __func__, \
32+ __LINE__, ##__VA_ARGS__)
30#define vascend_debug(fmt, ...) pr_info("[%s]" fmt, __func__, ##__VA_ARGS__)33#define vascend_debug(fmt, ...) pr_info("[%s]" fmt, __func__, ##__VA_ARGS__)
31#else34#else
32-#define vascend_err(dev, fmt, ...) ka_dev_err(dev, "[%s] [%s %d] " \35+#define vascend_err(dev, fmt, ...) \
33- fmt, module_devdrv, __func__, __LINE__, ##__VA_ARGS__)36+ ka_dev_err(dev, "[%s] [%s %d] " fmt, module_devdrv, __func__, __LINE__, ##__VA_ARGS__)
34-#define vascend_warn(dev, fmt, ...) ka_dev_warn(dev, "[%s] [%s %d] " \37+#define vascend_warn(dev, fmt, ...) \
35- fmt, module_devdrv, __func__, __LINE__, ##__VA_ARGS__)38+ ka_dev_warn(dev, "[%s] [%s %d] " fmt, module_devdrv, __func__, __LINE__, ##__VA_ARGS__)
36-#define vascend_info(dev, fmt, ...) ka_dev_info(dev, "[%s] [%s %d] " \39+#define vascend_info(dev, fmt, ...) \
37- fmt, module_devdrv, __func__, __LINE__, ##__VA_ARGS__)40+ ka_dev_info(dev, "[%s] [%s %d] " fmt, module_devdrv, __func__, __LINE__, ##__VA_ARGS__)
38#define vascend_debug(fmt, ...)41#define vascend_debug(fmt, ...)
39#endif /* DAVINCI_DEBUG */42#endif /* DAVINCI_DEBUG */
40 43 
@@ -20,17 +20,17 @@
20#include "mmio.h"20#include "mmio.h"
21#include "priv_ops.h"21#include "priv_ops.h"
22 22 
23-#define VF_BAR2_SPARSE_SIZE 523+#define VF_BAR2_SPARSE_SIZE 5
24-#define VF_BAR2_STARS_OFFSET 0x800024+#define VF_BAR2_STARS_OFFSET 0x8000
25-#define VF_BAR2_STARS_SIZE 0x200000025+#define VF_BAR2_STARS_SIZE 0x2000000
26-#define VF_BAR2_TS_DOORBELL_OFFSET 0x200800026+#define VF_BAR2_TS_DOORBELL_OFFSET 0x2008000
27-#define VF_BAR2_TS_DOORBELL_SIZE 0x4000027+#define VF_BAR2_TS_DOORBELL_SIZE 0x40000
28-#define VF_BAR2_HWTS_OFFSET 0x240800028+#define VF_BAR2_HWTS_OFFSET 0x2408000
29-#define VF_BAR2_HWTS_SIZE 0x1000029+#define VF_BAR2_HWTS_SIZE 0x10000
30#define VF_BAR2_SOC_DOORBELL_OFFSET 0x280800030#define VF_BAR2_SOC_DOORBELL_OFFSET 0x2808000
31-#define VF_BAR2_SOC_DOORBELL_SIZE 0x100031+#define VF_BAR2_SOC_DOORBELL_SIZE 0x1000
32-#define VF_BAR2_PARA_OFFSET 0x290800032+#define VF_BAR2_PARA_OFFSET 0x2908000
33-#define VF_BAR2_PARA_SIZE 0x400033+#define VF_BAR2_PARA_SIZE 0x4000
34 34 
35#define DVT_MMIO_BAR0_SIZE_910B 0x4000000035#define DVT_MMIO_BAR0_SIZE_910B 0x40000000
36#define DVT_MMIO_BAR2_SIZE_910B 0x2000000036#define DVT_MMIO_BAR2_SIZE_910B 0x20000000
@@ -50,15 +50,13 @@ struct mmio_device_init_info {
50};50};
51 51 
52STATIC const struct mmio_device_init_info mmio_init_info[] = {52STATIC const struct mmio_device_init_info mmio_init_info[] = {
53- { PCI_DEVICE_ID_ASCEND910B, KA_PCI_CFG_SPACE_EXP_SIZE, DVT_MMIO_BAR0_SIZE_910B, 0 },53+ {PCI_DEVICE_ID_ASCEND910B, KA_PCI_CFG_SPACE_EXP_SIZE, DVT_MMIO_BAR0_SIZE_910B, 0},
54- { PCI_DEVICE_ID_ASCEND910_93, KA_PCI_CFG_SPACE_EXP_SIZE, DVT_MMIO_BAR0_SIZE_910_93, 0 },54+ {PCI_DEVICE_ID_ASCEND910_93, KA_PCI_CFG_SPACE_EXP_SIZE, DVT_MMIO_BAR0_SIZE_910_93, 0},
55- { PCI_DEVICE_ID_ASCEND950, KA_PCI_CFG_SPACE_EXP_SIZE, DVT_MMIO_BAR0_SIZE_950, 0 },55+ {PCI_DEVICE_ID_ASCEND950, KA_PCI_CFG_SPACE_EXP_SIZE, DVT_MMIO_BAR0_SIZE_950, 0},
56- { KA_PCI_ANY_ID, KA_PCI_CFG_SPACE_EXP_SIZE, DVT_MMIO_BAR0_SIZE, 0 },56+ {KA_PCI_ANY_ID, KA_PCI_CFG_SPACE_EXP_SIZE, DVT_MMIO_BAR0_SIZE, 0},
57- {}57+ {}};
58-};
59 58 
60-STATIC void hw_vdavinci_reset_sparse_mmio(struct hw_vdavinci *vdavinci,59+STATIC void hw_vdavinci_reset_sparse_mmio(struct hw_vdavinci *vdavinci, struct vdavinci_mapinfo *mmio_map_info)
61- struct vdavinci_mapinfo *mmio_map_info)
62{60{
63 int ret = 0;61 int ret = 0;
64 u64 i = 0;62 u64 i = 0;
@@ -69,8 +67,10 @@ STATIC void hw_vdavinci_reset_sparse_mmio(struct hw_vdavinci *vdavinci,
69 if (map->map_type == MAP_TYPE_BACKEND) {67 if (map->map_type == MAP_TYPE_BACKEND) {
70 ret = memset_s(map->vaddr, map->size, 0, map->size);68 ret = memset_s(map->vaddr, map->size, 0, map->size);
71 if (ret != 0) {69 if (ret != 0) {
72- vascend_err(vdavinci_to_dev(vdavinci), "vdavinci reset mmio sapce "70+ vascend_err(vdavinci_to_dev(vdavinci),
73- "failed, vid: %u, ret: %d\n", vdavinci->id, ret);71+ "vdavinci reset mmio sapce "
72+ "failed, vid: %u, ret: %d\n",
73+ vdavinci->id, ret);
74 }74 }
75 }75 }
76 }76 }
@@ -94,17 +94,15 @@ STATIC int hw_vdavinci_mmio_check_sparse(struct hw_vdavinci *vdavinci)
94 }94 }
95 95 
96 if (vdavinci->mmio.mem_sparse.num > HW_BAR_SPARSE_MAP_MAX) {96 if (vdavinci->mmio.mem_sparse.num > HW_BAR_SPARSE_MAP_MAX) {
97- vascend_err(vdavinci_to_dev(vdavinci),97+ vascend_err(vdavinci_to_dev(vdavinci), "invalid sparse num %llu\n", vdavinci->mmio.mem_sparse.num);
98- "invalid sparse num %llu\n", vdavinci->mmio.mem_sparse.num);
99 return -EINVAL;98 return -EINVAL;
100 }99 }
101 100 
102 for (i = 0; i < vdavinci->mmio.mem_sparse.num; i++) {101 for (i = 0; i < vdavinci->mmio.mem_sparse.num; i++) {
103 map = &vdavinci->mmio.mem_sparse.map_info[i];102 map = &vdavinci->mmio.mem_sparse.map_info[i];
104- if (map->offset == 0 || map->offset > vdavinci->type->bar4_size ||103+ if (map->offset == 0 || map->offset > vdavinci->type->bar4_size || map->size == 0 ||
105- map->size == 0 || map->size > vdavinci->type->bar4_size - map->offset ||104+ map->size > vdavinci->type->bar4_size - map->offset || !KA_MM_PAGE_ALIGNED(map->offset) ||
106- !KA_MM_PAGE_ALIGNED(map->offset) || !KA_MM_PAGE_ALIGNED(map->size) ||105+ !KA_MM_PAGE_ALIGNED(map->size) || !KA_MM_PAGE_ALIGNED(map->paddr)) {
107- !KA_MM_PAGE_ALIGNED(map->paddr)) {
108 vascend_err(vdavinci_to_dev(vdavinci),106 vascend_err(vdavinci_to_dev(vdavinci),
109 "check sparse failed: invalid map: offset:%lx size:%lx paddr:%llx, bar4_size:%lx\n",107 "check sparse failed: invalid map: offset:%lx size:%lx paddr:%llx, bar4_size:%lx\n",
110 map->offset, map->size, map->paddr, vdavinci->type->bar4_size);108 map->offset, map->size, map->paddr, vdavinci->type->bar4_size);
@@ -116,8 +114,7 @@ STATIC int hw_vdavinci_mmio_check_sparse(struct hw_vdavinci *vdavinci)
116 vascend_err(vdavinci_to_dev(vdavinci),114 vascend_err(vdavinci_to_dev(vdavinci),
117 "check sparse failed: map not continuous:"115 "check sparse failed: map not continuous:"
118 "offset:%lx size:%lx, next offset:%lx\n",116 "offset:%lx size:%lx, next offset:%lx\n",
119- map->offset, map->size,117+ map->offset, map->size, vdavinci->mmio.mem_sparse.map_info[i + 1].offset);
120- vdavinci->mmio.mem_sparse.map_info[i + 1].offset);
121 return -EINVAL;118 return -EINVAL;
122 }119 }
123 }120 }
@@ -146,23 +143,21 @@ STATIC int hw_dvt_vdavinci_getmapinfo(struct hw_vdavinci *vdavinci)
146 if (ret != 0) {143 if (ret != 0) {
147 return ret;144 return ret;
148 }145 }
149- ret = vdavinci_priv_vdev_getmapinfo(vdavinci, &tp, VFIO_PCI_BAR4_REGION_INDEX,146+ ret = vdavinci_priv_vdev_getmapinfo(vdavinci, &tp, VFIO_PCI_BAR4_REGION_INDEX, &vdavinci->mmio.mem_sparse);
150- &vdavinci->mmio.mem_sparse);
151 if (ret != 0) {147 if (ret != 0) {
152- vascend_err(dvt->vdavinci_priv->dev,148+ vascend_err(dvt->vdavinci_priv->dev, "get map info failed, vid:%u type bar4_size:%lx ret:%d\n", vdavinci->id,
153- "get map info failed, vid:%u type bar4_size:%lx ret:%d\n",149+ vdavinci->type->bar4_size, ret);
154- vdavinci->id, vdavinci->type->bar4_size, ret);
155 return ret;150 return ret;
156 }151 }
157 152 
158 return 0;153 return 0;
159}154}
160 155 
161-STATIC void hw_vdavinci_sparse_mmio_uninit(struct hw_vdavinci *vdavinci,156+STATIC void hw_vdavinci_sparse_mmio_uninit(struct hw_vdavinci *vdavinci, struct vdavinci_mapinfo *mmio_map_info)
162- struct vdavinci_mapinfo *mmio_map_info)
163{157{
164 u64 i = 0;158 u64 i = 0;
165 ka_pci_dev_t *pdev = NULL;159 ka_pci_dev_t *pdev = NULL;
160+ ka_device_t *res_dev = NULL;
166 struct vdavinci_bar_map *map;161 struct vdavinci_bar_map *map;
167 162 
168 for (i = 0; i < mmio_map_info->num; i++) {163 for (i = 0; i < mmio_map_info->num; i++) {
@@ -175,10 +170,11 @@ STATIC void hw_vdavinci_sparse_mmio_uninit(struct hw_vdavinci *vdavinci,
175 170 
176 mmio_map_info->num = 0;171 mmio_map_info->num = 0;
177 if (mmio_map_info->io_addr != NULL) {172 if (mmio_map_info->io_addr != NULL) {
178- pdev = ka_container_of(vdavinci_resource_dev(vdavinci), ka_pci_dev_t, dev);173+ res_dev = vdavinci_resource_dev(vdavinci);
179- if (pdev == NULL) {174+ if (res_dev == NULL) {
180 return;175 return;
181 }176 }
177+ pdev = ka_container_of(res_dev, ka_pci_dev_t, dev);
182 ka_mm_pci_iounmap(pdev, mmio_map_info->io_addr);178 ka_mm_pci_iounmap(pdev, mmio_map_info->io_addr);
183 mmio_map_info->io_addr = NULL;179 mmio_map_info->io_addr = NULL;
184 }180 }
@@ -217,20 +213,17 @@ int hw_vdavinci_310_mmio_init(struct hw_vdavinci *vdavinci)
217 vdavinci->mmio.bar4_sparse.map_info[0].offset = 0;213 vdavinci->mmio.bar4_sparse.map_info[0].offset = 0;
218 vdavinci->mmio.bar4_sparse.map_info[0].size = vdavinci->type->bar4_size;214 vdavinci->mmio.bar4_sparse.map_info[0].size = vdavinci->type->bar4_size;
219 215 
220- vdavinci->mmio.bar0_sparse.map_info[0].vaddr =216+ vdavinci->mmio.bar0_sparse.map_info[0].vaddr = ka_mm_vzalloc(vdavinci->mmio.bar0_sparse.map_info[0].size);
221- ka_mm_vzalloc(vdavinci->mmio.bar0_sparse.map_info[0].size);
222 if (!vdavinci->mmio.bar0_sparse.map_info[0].vaddr) {217 if (!vdavinci->mmio.bar0_sparse.map_info[0].vaddr) {
223 goto put_mapinfo;218 goto put_mapinfo;
224 }219 }
225 220 
226- vdavinci->mmio.bar2_sparse.map_info[0].vaddr =221+ vdavinci->mmio.bar2_sparse.map_info[0].vaddr = vmalloc_user(vdavinci->mmio.bar2_sparse.map_info[0].size);
227- vmalloc_user(vdavinci->mmio.bar2_sparse.map_info[0].size);
228 if (!vdavinci->mmio.bar2_sparse.map_info[0].vaddr) {222 if (!vdavinci->mmio.bar2_sparse.map_info[0].vaddr) {
229 goto io_failed;223 goto io_failed;
230 }224 }
231 225 
232- vdavinci->mmio.bar4_sparse.map_info[0].vaddr =226+ vdavinci->mmio.bar4_sparse.map_info[0].vaddr = vmalloc_user(vdavinci->mmio.bar4_sparse.map_info[0].size);
233- vmalloc_user(vdavinci->mmio.bar4_sparse.map_info[0].size);
234 if (!vdavinci->mmio.bar4_sparse.map_info[0].vaddr) {227 if (!vdavinci->mmio.bar4_sparse.map_info[0].vaddr) {
235 goto mem_failed;228 goto mem_failed;
236 }229 }
@@ -309,14 +302,12 @@ int hw_vdavinci_310pro_mmio_init(struct hw_vdavinci *vdavinci)
309 vdavinci->mmio.bar4_sparse.map_info[1].size = vdavinci->mmio.mem_sparse.map_info[0].size;302 vdavinci->mmio.bar4_sparse.map_info[1].size = vdavinci->mmio.mem_sparse.map_info[0].size;
310 vdavinci->mmio.bar4_sparse.map_info[1].paddr = vdavinci->mmio.mem_sparse.map_info[0].paddr;303 vdavinci->mmio.bar4_sparse.map_info[1].paddr = vdavinci->mmio.mem_sparse.map_info[0].paddr;
311 304 
312- vdavinci->mmio.bar2_sparse.map_info[0].vaddr =305+ vdavinci->mmio.bar2_sparse.map_info[0].vaddr = vmalloc_user(vdavinci->mmio.bar2_sparse.map_info[0].size);
313- vmalloc_user(vdavinci->mmio.bar2_sparse.map_info[0].size);
314 if (!vdavinci->mmio.bar2_sparse.map_info[0].vaddr) {306 if (!vdavinci->mmio.bar2_sparse.map_info[0].vaddr) {
315 goto put_mapinfo;307 goto put_mapinfo;
316 }308 }
317 309 
318- vdavinci->mmio.bar4_sparse.map_info[0].vaddr =310+ vdavinci->mmio.bar4_sparse.map_info[0].vaddr = vmalloc_user(vdavinci->mmio.bar4_sparse.map_info[0].size);
319- vmalloc_user(vdavinci->mmio.bar4_sparse.map_info[0].size);
320 if (!vdavinci->mmio.bar4_sparse.map_info[0].vaddr) {311 if (!vdavinci->mmio.bar4_sparse.map_info[0].vaddr) {
321 goto mem_failed;312 goto mem_failed;
322 }313 }
@@ -381,14 +372,12 @@ int hw_vdavinci_910_mmio_init(struct hw_vdavinci *vdavinci)
381 vdavinci->mmio.bar4_sparse.map_info[0].offset = 0;372 vdavinci->mmio.bar4_sparse.map_info[0].offset = 0;
382 vdavinci->mmio.bar4_sparse.map_info[0].size = vdavinci->type->bar4_size;373 vdavinci->mmio.bar4_sparse.map_info[0].size = vdavinci->type->bar4_size;
383 374 
384- vdavinci->mmio.bar2_sparse.map_info[0].vaddr =375+ vdavinci->mmio.bar2_sparse.map_info[0].vaddr = vmalloc_user(vdavinci->mmio.bar2_sparse.map_info[0].size);
385- vmalloc_user(vdavinci->mmio.bar2_sparse.map_info[0].size);
386 if (!vdavinci->mmio.bar2_sparse.map_info[0].vaddr) {376 if (!vdavinci->mmio.bar2_sparse.map_info[0].vaddr) {
387 goto put_mapinfo;377 goto put_mapinfo;
388 }378 }
389 379 
390- vdavinci->mmio.bar4_sparse.map_info[0].vaddr =380+ vdavinci->mmio.bar4_sparse.map_info[0].vaddr = vmalloc_user(vdavinci->mmio.bar4_sparse.map_info[0].size);
391- vmalloc_user(vdavinci->mmio.bar4_sparse.map_info[0].size);
392 if (!vdavinci->mmio.bar4_sparse.map_info[0].vaddr) {381 if (!vdavinci->mmio.bar4_sparse.map_info[0].vaddr) {
393 goto mem_failed;382 goto mem_failed;
394 }383 }
@@ -450,15 +439,14 @@ void hw_vdavinci_950_vf_mmio_uninit(struct hw_vdavinci *vdavinci)
450 hw_vdavinci_sparse_mmio_uninit(vdavinci, &vdavinci->mmio.bar0_sparse);439 hw_vdavinci_sparse_mmio_uninit(vdavinci, &vdavinci->mmio.bar0_sparse);
451 hw_vdavinci_sparse_mmio_uninit(vdavinci, &vdavinci->mmio.bar2_sparse);440 hw_vdavinci_sparse_mmio_uninit(vdavinci, &vdavinci->mmio.bar2_sparse);
452 hw_vdavinci_sparse_mmio_uninit(vdavinci, &vdavinci->mmio.bar4_sparse);441 hw_vdavinci_sparse_mmio_uninit(vdavinci, &vdavinci->mmio.bar4_sparse);
453- 442+ 
454 vdavinci->mmio.io_base = NULL;443 vdavinci->mmio.io_base = NULL;
455 vdavinci->mmio.mem_base = NULL;444 vdavinci->mmio.mem_base = NULL;
456- 445+ 
457 vascend_info(vdavinci_to_dev(vdavinci), "vf mmio uninit success\n");446 vascend_info(vdavinci_to_dev(vdavinci), "vf mmio uninit success\n");
458}447}
459 448 
460-STATIC int hw_vdavinci_vf_bar0_init(struct hw_vdavinci *vdavinci, phys_addr_t base,449+STATIC int hw_vdavinci_vf_bar0_init(struct hw_vdavinci *vdavinci, phys_addr_t base, int *io_base_idx, int *mem_base_idx)
461- int *io_base_idx, int *mem_base_idx)
462{450{
463 int idx = 0;451 int idx = 0;
464 vdavinci->mmio.bar0_sparse.num = VF_BAR0_SPARSE_SIZE;452 vdavinci->mmio.bar0_sparse.num = VF_BAR0_SPARSE_SIZE;
@@ -474,8 +462,7 @@ STATIC int hw_vdavinci_vf_bar0_init(struct hw_vdavinci *vdavinci, phys_addr_t ba
474 vdavinci->mmio.bar0_sparse.map_info[idx].map_type = MAP_TYPE_BACKEND;462 vdavinci->mmio.bar0_sparse.map_info[idx].map_type = MAP_TYPE_BACKEND;
475 vdavinci->mmio.bar0_sparse.map_info[idx].offset = VF_BAR0_VPC_OFFSET;463 vdavinci->mmio.bar0_sparse.map_info[idx].offset = VF_BAR0_VPC_OFFSET;
476 vdavinci->mmio.bar0_sparse.map_info[idx].size = VF_BAR0_VPC_SIZE;464 vdavinci->mmio.bar0_sparse.map_info[idx].size = VF_BAR0_VPC_SIZE;
477- vdavinci->mmio.bar0_sparse.map_info[idx].vaddr =465+ vdavinci->mmio.bar0_sparse.map_info[idx].vaddr = vmalloc_user(vdavinci->mmio.bar0_sparse.map_info[idx].size);
478- vmalloc_user(vdavinci->mmio.bar0_sparse.map_info[idx].size);
479 if (!vdavinci->mmio.bar0_sparse.map_info[idx].vaddr) {466 if (!vdavinci->mmio.bar0_sparse.map_info[idx].vaddr) {
480 vascend_err(vdavinci_to_dev(vdavinci), "not enough memory");467 vascend_err(vdavinci_to_dev(vdavinci), "not enough memory");
481 return -ENOMEM;468 return -ENOMEM;
@@ -490,8 +477,7 @@ STATIC int hw_vdavinci_vf_bar0_init(struct hw_vdavinci *vdavinci, phys_addr_t ba
490 vdavinci->mmio.bar0_sparse.map_info[idx].map_type = MAP_TYPE_BACKEND;477 vdavinci->mmio.bar0_sparse.map_info[idx].map_type = MAP_TYPE_BACKEND;
491 vdavinci->mmio.bar0_sparse.map_info[idx].offset = VF_BAR0_DVPP_OFFSET;478 vdavinci->mmio.bar0_sparse.map_info[idx].offset = VF_BAR0_DVPP_OFFSET;
492 vdavinci->mmio.bar0_sparse.map_info[idx].size = VF_BAR0_DVPP_SIZE;479 vdavinci->mmio.bar0_sparse.map_info[idx].size = VF_BAR0_DVPP_SIZE;
493- vdavinci->mmio.bar0_sparse.map_info[idx].vaddr =480+ vdavinci->mmio.bar0_sparse.map_info[idx].vaddr = vmalloc_user(vdavinci->mmio.bar0_sparse.map_info[idx].size);
494- vmalloc_user(vdavinci->mmio.bar0_sparse.map_info[idx].size);
495 if (!vdavinci->mmio.bar0_sparse.map_info[idx].vaddr) {481 if (!vdavinci->mmio.bar0_sparse.map_info[idx].vaddr) {
496 ka_mm_vfree(vdavinci->mmio.bar0_sparse.map_info[*io_base_idx].vaddr);482 ka_mm_vfree(vdavinci->mmio.bar0_sparse.map_info[*io_base_idx].vaddr);
497 vascend_err(vdavinci_to_dev(vdavinci), "not enough memory");483 vascend_err(vdavinci_to_dev(vdavinci), "not enough memory");
@@ -532,8 +518,8 @@ out_invaild_idx:
532 return -EINVAL;518 return -EINVAL;
533}519}
534 520 
535-STATIC int hw_vdavinci_910_93_vf_bar0_init(struct hw_vdavinci *vdavinci, phys_addr_t base,521+STATIC int hw_vdavinci_910_93_vf_bar0_init(struct hw_vdavinci *vdavinci, phys_addr_t base, phys_addr_t len,
536- phys_addr_t len, int *io_base_idx, int *mem_base_idx)522+ int *io_base_idx, int *mem_base_idx)
537{523{
538 int idx = 0;524 int idx = 0;
539 vdavinci->mmio.bar0_sparse.num = VF_BAR0_SPARSE_SIZE;525 vdavinci->mmio.bar0_sparse.num = VF_BAR0_SPARSE_SIZE;
@@ -549,8 +535,7 @@ STATIC int hw_vdavinci_910_93_vf_bar0_init(struct hw_vdavinci *vdavinci, phys_ad
549 vdavinci->mmio.bar0_sparse.map_info[idx].map_type = MAP_TYPE_BACKEND;535 vdavinci->mmio.bar0_sparse.map_info[idx].map_type = MAP_TYPE_BACKEND;
550 vdavinci->mmio.bar0_sparse.map_info[idx].offset = VF_BAR0_VPC_OFFSET;536 vdavinci->mmio.bar0_sparse.map_info[idx].offset = VF_BAR0_VPC_OFFSET;
551 vdavinci->mmio.bar0_sparse.map_info[idx].size = VF_BAR0_VPC_SIZE;537 vdavinci->mmio.bar0_sparse.map_info[idx].size = VF_BAR0_VPC_SIZE;
552- vdavinci->mmio.bar0_sparse.map_info[idx].vaddr =538+ vdavinci->mmio.bar0_sparse.map_info[idx].vaddr = vmalloc_user(vdavinci->mmio.bar0_sparse.map_info[idx].size);
553- vmalloc_user(vdavinci->mmio.bar0_sparse.map_info[idx].size);
554 if (!vdavinci->mmio.bar0_sparse.map_info[idx].vaddr) {539 if (!vdavinci->mmio.bar0_sparse.map_info[idx].vaddr) {
555 vascend_err(vdavinci_to_dev(vdavinci), "not enough memory");540 vascend_err(vdavinci_to_dev(vdavinci), "not enough memory");
556 return -ENOMEM;541 return -ENOMEM;
@@ -565,8 +550,7 @@ STATIC int hw_vdavinci_910_93_vf_bar0_init(struct hw_vdavinci *vdavinci, phys_ad
565 vdavinci->mmio.bar0_sparse.map_info[idx].map_type = MAP_TYPE_BACKEND;550 vdavinci->mmio.bar0_sparse.map_info[idx].map_type = MAP_TYPE_BACKEND;
566 vdavinci->mmio.bar0_sparse.map_info[idx].offset = VF_BAR0_DVPP_OFFSET;551 vdavinci->mmio.bar0_sparse.map_info[idx].offset = VF_BAR0_DVPP_OFFSET;
567 vdavinci->mmio.bar0_sparse.map_info[idx].size = VF_BAR0_DVPP_SIZE;552 vdavinci->mmio.bar0_sparse.map_info[idx].size = VF_BAR0_DVPP_SIZE;
568- vdavinci->mmio.bar0_sparse.map_info[idx].vaddr =553+ vdavinci->mmio.bar0_sparse.map_info[idx].vaddr = vmalloc_user(vdavinci->mmio.bar0_sparse.map_info[idx].size);
569- vmalloc_user(vdavinci->mmio.bar0_sparse.map_info[idx].size);
570 if (!vdavinci->mmio.bar0_sparse.map_info[idx].vaddr) {554 if (!vdavinci->mmio.bar0_sparse.map_info[idx].vaddr) {
571 ka_mm_vfree(vdavinci->mmio.bar0_sparse.map_info[*io_base_idx].vaddr);555 ka_mm_vfree(vdavinci->mmio.bar0_sparse.map_info[*io_base_idx].vaddr);
572 vascend_err(vdavinci_to_dev(vdavinci), "not enough memory");556 vascend_err(vdavinci_to_dev(vdavinci), "not enough memory");
@@ -580,8 +564,8 @@ STATIC int hw_vdavinci_910_93_vf_bar0_init(struct hw_vdavinci *vdavinci, phys_ad
580 /* map the remaining lengths */564 /* map the remaining lengths */
581 vdavinci->mmio.bar0_sparse.map_info[idx].map_type = MAP_TYPE_PASSTHROUGH;565 vdavinci->mmio.bar0_sparse.map_info[idx].map_type = MAP_TYPE_PASSTHROUGH;
582 vdavinci->mmio.bar0_sparse.map_info[idx].offset = VF_BAR0_MSG_OFFSET;566 vdavinci->mmio.bar0_sparse.map_info[idx].offset = VF_BAR0_MSG_OFFSET;
583- vdavinci->mmio.bar0_sparse.map_info[idx].size =567+ vdavinci->mmio.bar0_sparse.map_info[idx].size = ka_base_min(
584- ka_base_min((unsigned long)len, (unsigned long)(DVT_MMIO_BAR0_SIZE_910_93 - VF_BAR0_MSG_OFFSET));568+ (unsigned long)len, (unsigned long)(DVT_MMIO_BAR0_SIZE_910_93 - VF_BAR0_MSG_OFFSET));
585 vdavinci->mmio.bar0_sparse.map_info[idx].paddr = base;569 vdavinci->mmio.bar0_sparse.map_info[idx].paddr = base;
586 if (++idx >= vdavinci->mmio.bar0_sparse.num) {570 if (++idx >= vdavinci->mmio.bar0_sparse.num) {
587 goto out_invaild_idx;571 goto out_invaild_idx;
@@ -612,9 +596,9 @@ STATIC void hw_vdavinci_vf_bar2_init(struct hw_vdavinci *vdavinci, phys_addr_t b
612 int i = 0;596 int i = 0;
613 597 
614 vdavinci->mmio.bar2_sparse.num = VF_BAR2_SPARSE_SIZE;598 vdavinci->mmio.bar2_sparse.num = VF_BAR2_SPARSE_SIZE;
615- for (i = 0; i < VF_BAR2_SPARSE_SIZE; i++) {599+ for (i = 0; i < VF_BAR2_SPARSE_SIZE; i++) {
616 vdavinci->mmio.bar2_sparse.map_info[i].map_type = bar2_sparse_info[i].map_type;600 vdavinci->mmio.bar2_sparse.map_info[i].map_type = bar2_sparse_info[i].map_type;
617- vdavinci->mmio.bar2_sparse.map_info[i].offset = bar2_sparse_info[i].offset;601+ vdavinci->mmio.bar2_sparse.map_info[i].offset = bar2_sparse_info[i].offset;
618 vdavinci->mmio.bar2_sparse.map_info[i].size = bar2_sparse_info[i].size;602 vdavinci->mmio.bar2_sparse.map_info[i].size = bar2_sparse_info[i].size;
619 vdavinci->mmio.bar2_sparse.map_info[i].paddr = base + bar2_sparse_info[i].offset;603 vdavinci->mmio.bar2_sparse.map_info[i].paddr = base + bar2_sparse_info[i].offset;
620 }604 }
@@ -675,8 +659,7 @@ int hw_vdavinci_910_93_vf_mmio_init(struct hw_vdavinci *vdavinci)
675 bar0_len = ka_pci_resource_len(pdev, VFIO_PCI_BAR0_REGION_INDEX);659 bar0_len = ka_pci_resource_len(pdev, VFIO_PCI_BAR0_REGION_INDEX);
676 bar4_len = ka_pci_resource_len(pdev, VFIO_PCI_BAR4_REGION_INDEX);660 bar4_len = ka_pci_resource_len(pdev, VFIO_PCI_BAR4_REGION_INDEX);
677 661 
678- ret = hw_vdavinci_910_93_vf_bar0_init(vdavinci, bar0_base, bar0_len,662+ ret = hw_vdavinci_910_93_vf_bar0_init(vdavinci, bar0_base, bar0_len, &io_base_idx, &mem_base_idx);
679- &io_base_idx, &mem_base_idx);
680 if (ret != 0) {663 if (ret != 0) {
681 return ret;664 return ret;
682 }665 }
@@ -704,23 +687,23 @@ int hw_vdavinci_950_vf_mmio_init(struct hw_vdavinci *vdavinci)
704 phys_addr_t bar0_base, bar2_base, bar4_base;687 phys_addr_t bar0_base, bar2_base, bar4_base;
705 int io_base_idx, mem_base_idx;688 int io_base_idx, mem_base_idx;
706 int ret;689 int ret;
707- 690+ 
708 bar0_base = ka_pci_resource_start(pdev, VFIO_PCI_BAR0_REGION_INDEX);691 bar0_base = ka_pci_resource_start(pdev, VFIO_PCI_BAR0_REGION_INDEX);
709 bar2_base = ka_pci_resource_start(pdev, VFIO_PCI_BAR2_REGION_INDEX);692 bar2_base = ka_pci_resource_start(pdev, VFIO_PCI_BAR2_REGION_INDEX);
710 bar4_base = ka_pci_resource_start(pdev, VFIO_PCI_BAR4_REGION_INDEX);693 bar4_base = ka_pci_resource_start(pdev, VFIO_PCI_BAR4_REGION_INDEX);
711- 694+ 
712 ret = hw_vdavinci_vf_bar0_init(vdavinci, bar0_base, &io_base_idx, &mem_base_idx);695 ret = hw_vdavinci_vf_bar0_init(vdavinci, bar0_base, &io_base_idx, &mem_base_idx);
713 if (ret != 0) {696 if (ret != 0) {
714 return ret;697 return ret;
715 }698 }
716- 699+ 
717 hw_vdavinci_vf_bar2_init(vdavinci, bar2_base);700 hw_vdavinci_vf_bar2_init(vdavinci, bar2_base);
718 hw_vdavinci_vf_bar4_init(vdavinci, bar4_base);701 hw_vdavinci_vf_bar4_init(vdavinci, bar4_base);
719- 702+ 
720 /* mmio.io_base ref for vpc cqsq, mmio.mem_base ref for dvpp share memory */703 /* mmio.io_base ref for vpc cqsq, mmio.mem_base ref for dvpp share memory */
721 vdavinci->mmio.io_base = vdavinci->mmio.bar0_sparse.map_info[io_base_idx].vaddr;704 vdavinci->mmio.io_base = vdavinci->mmio.bar0_sparse.map_info[io_base_idx].vaddr;
722 vdavinci->mmio.mem_base = vdavinci->mmio.bar0_sparse.map_info[mem_base_idx].vaddr;705 vdavinci->mmio.mem_base = vdavinci->mmio.bar0_sparse.map_info[mem_base_idx].vaddr;
723- 706+ 
724 vascend_info(vdavinci_to_dev(vdavinci), "VF mmio init success, vf_index: %d\n", vdavinci->vf_index);707 vascend_info(vdavinci_to_dev(vdavinci), "VF mmio init success, vf_index: %d\n", vdavinci->vf_index);
725 return 0;708 return 0;
726}709}
@@ -731,8 +714,7 @@ int hw_vdavinci_910b_mmio_init(struct hw_vdavinci *vdavinci)
731}714}
732 715 
733void hw_vdavinci_910b_mmio_uninit(struct hw_vdavinci *vdavinci)716void hw_vdavinci_910b_mmio_uninit(struct hw_vdavinci *vdavinci)
734-{717+{}
735-}
736 718 
737int hw_vdavinci_910_93_mmio_init(struct hw_vdavinci *vdavinci)719int hw_vdavinci_910_93_mmio_init(struct hw_vdavinci *vdavinci)
738{720{
@@ -740,8 +722,7 @@ int hw_vdavinci_910_93_mmio_init(struct hw_vdavinci *vdavinci)
740}722}
741 723 
742void hw_vdavinci_910_93_mmio_uninit(struct hw_vdavinci *vdavinci)724void hw_vdavinci_910_93_mmio_uninit(struct hw_vdavinci *vdavinci)
743-{725+{}
744-}
745 726 
746int hw_vdavinci_950_mmio_init(struct hw_vdavinci *vdavinci)727int hw_vdavinci_950_mmio_init(struct hw_vdavinci *vdavinci)
747{728{
@@ -749,8 +730,7 @@ int hw_vdavinci_950_mmio_init(struct hw_vdavinci *vdavinci)
749}730}
750 731 
751void hw_vdavinci_950_mmio_uninit(struct hw_vdavinci *vdavinci)732void hw_vdavinci_950_mmio_uninit(struct hw_vdavinci *vdavinci)
752-{733+{}
753-}
754 734 
755int hw_dvt_set_mmio_device_info(struct hw_dvt *dvt)735int hw_dvt_set_mmio_device_info(struct hw_dvt *dvt)
756{736{
@@ -758,8 +738,7 @@ int hw_dvt_set_mmio_device_info(struct hw_dvt *dvt)
758 struct hw_dvt_device_info *info = &dvt->device_info;738 struct hw_dvt_device_info *info = &dvt->device_info;
759 739 
760 for (i = 0; mmio_init_info[i].device != 0; i++) {740 for (i = 0; mmio_init_info[i].device != 0; i++) {
761- if (dvt->device == mmio_init_info[i].device ||741+ if (dvt->device == mmio_init_info[i].device || mmio_init_info[i].device == (unsigned short)KA_PCI_ANY_ID) {
762- mmio_init_info[i].device == (unsigned short)KA_PCI_ANY_ID) {
763 info->cfg_space_size = mmio_init_info[i].cfg_space_size;742 info->cfg_space_size = mmio_init_info[i].cfg_space_size;
764 info->mmio_bar = mmio_init_info[i].mmio_bar;743 info->mmio_bar = mmio_init_info[i].mmio_bar;
765 info->mmio_size = mmio_init_info[i].mmio_size;744 info->mmio_size = mmio_init_info[i].mmio_size;
@@ -18,11 +18,10 @@
18struct hw_dvt;18struct hw_dvt;
19struct hw_vdavinci;19struct hw_vdavinci;
20 20 
21-#define DOORBELL_MAX 102421+#define DOORBELL_MAX 1024
22-#define DOORBELL_SIZE 422+#define DOORBELL_SIZE 4
23 23 
24-typedef int (*dvt_mmio_func)(struct hw_vdavinci *, unsigned int,24+typedef int (*dvt_mmio_func)(struct hw_vdavinci *, unsigned int, void *, unsigned int);
25- void *, unsigned int);
26 25 
27enum MMIO_INFO_TYPE {26enum MMIO_INFO_TYPE {
28 DOORBELL = 0,27 DOORBELL = 0,
@@ -64,13 +63,9 @@ void hw_vdavinci_950_vf_mmio_uninit(struct hw_vdavinci *vdavinci);
64 63 
65int hw_dvt_set_mmio_device_info(struct hw_dvt *dvt);64int hw_dvt_set_mmio_device_info(struct hw_dvt *dvt);
66 65 
67-int hw_vdavinci_emulate_mmio_read(struct hw_vdavinci *vdavinci,66+int hw_vdavinci_emulate_mmio_read(struct hw_vdavinci *vdavinci, uint64_t pa, void *buf, unsigned int bytes);
68- uint64_t pa, void *buf, unsigned int bytes);67+int hw_vdavinci_emulate_mmio_write(struct hw_vdavinci *vdavinci, uint64_t pa, void *buf, unsigned int bytes);
69-int hw_vdavinci_emulate_mmio_write(struct hw_vdavinci *vdavinci,68+int hw_vdavinci_emulate_mmio_quirk_read(struct hw_vdavinci *vdavinci, uint64_t pa, void *buf, unsigned int bytes);
70- uint64_t pa, void *buf, unsigned int bytes);69+int hw_vdavinci_emulate_mmio_quirk_write(struct hw_vdavinci *vdavinci, uint64_t pa, void *buf, unsigned int bytes);
71-int hw_vdavinci_emulate_mmio_quirk_read(struct hw_vdavinci *vdavinci, uint64_t pa,
72- void *buf, unsigned int bytes);
73-int hw_vdavinci_emulate_mmio_quirk_write(struct hw_vdavinci *vdavinci, uint64_t pa,
74- void *buf, unsigned int bytes);
75void hw_vdavinci_map_quirk_split(struct hw_vdavinci *vdavinci, phys_addr_t base);70void hw_vdavinci_map_quirk_split(struct hw_vdavinci *vdavinci, phys_addr_t base);
76#endif71#endif
@@ -1,176 +1,170 @@
1-/*1+/*
2- * Copyright (c) Huawei Technologies Co., Ltd. 2025-2025. All rights reserved.2+ * Copyright (c) Huawei Technologies Co., Ltd. 2025-2025. All rights reserved.
3- *3+ *
4- * This program is free software; you can redistribute it and/or modify4+ * This program is free software; you can redistribute it and/or modify
5- * it under the terms of the GNU General Public License version 2 and5+ * it under the terms of the GNU General Public License version 2 and
6- * only version 2 as published by the Free Software Foundation.6+ * only version 2 as published by the Free Software Foundation.
7- *7+ *
8- * This program is distributed in the hope that it will be useful,8+ * This program is distributed in the hope that it will be useful,
9- * but WITHOUT ANY WARRANTY; without even the implied warranty of9+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
10- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the10+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11- * GNU General Public License for more details.11+ * GNU General Public License for more details.
12- */12+ */
13- 13+ 
14-#include "ka_compiler_pub.h"14+#include "ka_compiler_pub.h"
15-#include "hw_vdavinci.h"15+#include "hw_vdavinci.h"
16-#include "priv_ops.h"16+#include "priv_ops.h"
17- 17+ 
18-static inline bool vdavinci_priv_check(struct vdavinci_priv *priv)18+static inline bool vdavinci_priv_check(struct vdavinci_priv *priv)
19-{19+{
20- if (ka_unlikely(priv == NULL || priv->ops == NULL)) {20+ if (ka_unlikely(priv == NULL || priv->ops == NULL)) {
21- return false;21+ return false;
22- }22+ }
23- 23+ 
24- return true;24+ return true;
25-}25+}
26- 26+ 
27-int vdavinci_priv_vdev_create(struct hw_vdavinci *vdavinci,27+int vdavinci_priv_vdev_create(struct hw_vdavinci *vdavinci, struct vdavinci_type *tp, ka_uuid_le_t uuid)
28- struct vdavinci_type *tp, ka_uuid_le_t uuid)28+{
29-{29+ if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {
30- if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {30+ return -EINVAL;
31- return -EINVAL;31+ }
32- }32+ if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_create == NULL) {
33- if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_create == NULL) {33+ vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's create ops is null\n");
34- vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's create ops is null\n");34+ return -EINVAL;
35- return -EINVAL;35+ }
36- }36+ 
37- 37+ return vdavinci->dvt->vdavinci_priv->ops->vdavinci_create(&vdavinci->dev, vdavinci, tp, uuid);
38- return vdavinci->dvt->vdavinci_priv->ops->vdavinci_create(&vdavinci->dev, vdavinci,38+}
39- tp, uuid);39+ 
40-}40+void vdavinci_priv_vdev_destroy(struct hw_vdavinci *vdavinci)
41- 41+{
42-void vdavinci_priv_vdev_destroy(struct hw_vdavinci *vdavinci)42+ if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {
43-{43+ return;
44- if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {44+ }
45- return;45+ if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_destroy == NULL) {
46- }46+ vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's destroy ops is null\n");
47- if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_destroy == NULL) {47+ return;
48- vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's destroy ops is null\n");48+ }
49- return;49+ 
50- }50+ vdavinci->dvt->vdavinci_priv->ops->vdavinci_destroy(&vdavinci->dev);
51- 51+}
52- vdavinci->dvt->vdavinci_priv->ops->vdavinci_destroy(&vdavinci->dev);52+ 
53-}53+void vdavinci_priv_vdev_release(struct hw_vdavinci *vdavinci)
54- 54+{
55-void vdavinci_priv_vdev_release(struct hw_vdavinci *vdavinci)55+ if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {
56-{56+ return;
57- if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {57+ }
58- return;58+ if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_release == NULL) {
59- }59+ vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's release ops is null\n");
60- if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_release == NULL) {60+ return;
61- vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's release ops is null\n");61+ }
62- return;62+ 
63- }63+ vdavinci->dvt->vdavinci_priv->ops->vdavinci_release(&vdavinci->dev);
64- 64+}
65- vdavinci->dvt->vdavinci_priv->ops->vdavinci_release(&vdavinci->dev);65+ 
66-}66+int vdavinci_priv_vdev_reset(struct hw_vdavinci *vdavinci)
67- 67+{
68-int vdavinci_priv_vdev_reset(struct hw_vdavinci *vdavinci)68+ if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {
69-{69+ return -EINVAL;
70- if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {70+ }
71- return -EINVAL;71+ if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_reset == NULL) {
72- }72+ vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's reset ops is null\n");
73- if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_reset == NULL) {73+ return -EINVAL;
74- vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's reset ops is null\n");74+ }
75- return -EINVAL;75+ 
76- }76+ return vdavinci->dvt->vdavinci_priv->ops->vdavinci_reset(&vdavinci->dev);
77- 77+}
78- return vdavinci->dvt->vdavinci_priv->ops->vdavinci_reset(&vdavinci->dev);78+ 
79-}79+int vdavinci_priv_vdev_flr(struct hw_vdavinci *vdavinci)
80- 80+{
81-int vdavinci_priv_vdev_flr(struct hw_vdavinci *vdavinci)81+ if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {
82-{82+ return -EINVAL;
83- if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {83+ }
84- return -EINVAL;84+ if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_flr == NULL) {
85- }85+ vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's flr ops is null\n");
86- if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_flr == NULL) {86+ return -EINVAL;
87- vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's flr ops is null\n");87+ }
88- return -EINVAL;88+ 
89- }89+ return vdavinci->dvt->vdavinci_priv->ops->vdavinci_flr(&vdavinci->dev);
90- 90+}
91- return vdavinci->dvt->vdavinci_priv->ops->vdavinci_flr(&vdavinci->dev);91+ 
92-}92+void vdavinci_priv_vdev_notify(struct hw_vdavinci *vdavinci, int db_index)
93- 93+{
94-void vdavinci_priv_vdev_notify(struct hw_vdavinci *vdavinci, int db_index)94+ if (ka_unlikely(!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv))) {
95-{95+ return;
96- if (ka_unlikely(!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv))) {96+ }
97- return;97+ if (ka_unlikely(vdavinci->dvt->vdavinci_priv->ops->vdavinci_notify == NULL)) {
98- }98+ vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's notify ops is null\n");
99- if (ka_unlikely(vdavinci->dvt->vdavinci_priv->ops->vdavinci_notify == NULL)) {99+ return;
100- vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's notify ops is null\n");100+ }
101- return;101+ 
102- }102+ vdavinci->dvt->vdavinci_priv->ops->vdavinci_notify(&vdavinci->dev, db_index);
103- 103+}
104- vdavinci->dvt->vdavinci_priv->ops->vdavinci_notify(&vdavinci->dev, db_index);104+ 
105-}105+int vdavinci_priv_vdev_getmapinfo(struct hw_vdavinci *vdavinci, struct vdavinci_type *tp, u32 bar_id,
106- 106+ struct vdavinci_mapinfo *map_info)
107-int vdavinci_priv_vdev_getmapinfo(struct hw_vdavinci *vdavinci,107+{
108- struct vdavinci_type *tp, u32 bar_id,108+ if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {
109- struct vdavinci_mapinfo *map_info)109+ return -EINVAL;
110-{110+ }
111- if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {111+ if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_getmapinfo == NULL) {
112- return -EINVAL;112+ vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's getmapinfo ops is null\n");
113- }113+ return -EINVAL;
114- if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_getmapinfo == NULL) {114+ }
115- vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's getmapinfo ops is null\n");115+ 
116- return -EINVAL;116+ return vdavinci->dvt->vdavinci_priv->ops->vdavinci_getmapinfo(&vdavinci->dev, tp, bar_id, map_info);
117- }117+}
118- 118+ 
119- return vdavinci->dvt->vdavinci_priv->ops->vdavinci_getmapinfo(&vdavinci->dev, tp,119+int vdavinci_priv_vdev_putmapinfo(struct hw_vdavinci *vdavinci)
120- bar_id, map_info);120+{
121-}121+ if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {
122- 122+ return -EINVAL;
123-int vdavinci_priv_vdev_putmapinfo(struct hw_vdavinci *vdavinci)123+ }
124-{124+ if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_putmapinfo == NULL) {
125- if (!vdavinci_priv_check(vdavinci->dvt->vdavinci_priv)) {125+ vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's putmapinfo ops is null\n");
126- return -EINVAL;126+ return -EINVAL;
127- }127+ }
128- if (vdavinci->dvt->vdavinci_priv->ops->vdavinci_putmapinfo == NULL) {128+ 
129- vascend_err(vdavinci_to_dev(vdavinci), "vdavinci_priv's putmapinfo ops is null\n");129+ return vdavinci->dvt->vdavinci_priv->ops->vdavinci_putmapinfo(&vdavinci->dev);
130- return -EINVAL;130+}
131- }131+ 
132- 132+unsigned int vdavinci_priv_vdev_getdevnum(struct vdavinci_priv *priv, ka_device_t *dev)
133- return vdavinci->dvt->vdavinci_priv->ops->vdavinci_putmapinfo(&vdavinci->dev);133+{
134-}134+ if (!vdavinci_priv_check(priv)) {
135- 135+ return 0;
136-unsigned int vdavinci_priv_vdev_getdevnum(struct vdavinci_priv *priv, ka_device_t *dev)136+ }
137-{137+ if (priv->ops->davinci_getdevnum == NULL) {
138- if (!vdavinci_priv_check(priv)) {138+ vascend_err(dev, "priv's getdevnum ops is null\n");
139- return 0;139+ return 0;
140- }140+ }
141- if (priv->ops->davinci_getdevnum == NULL) {141+ 
142- vascend_err(dev, "priv's getdevnum ops is null\n");142+ return (unsigned int)priv->ops->davinci_getdevnum(dev);
143- return 0;143+}
144- }144+ 
145- 145+int vdavinci_priv_vdev_getdevinfo(struct vdavinci_priv *priv, ka_device_t *dev, u32 dev_index,
146- return (unsigned int)priv->ops->davinci_getdevnum(dev);146+ struct dvt_devinfo *dev_info)
147-}147+{
148- 148+ if (!vdavinci_priv_check(priv)) {
149-int vdavinci_priv_vdev_getdevinfo(struct vdavinci_priv *priv,149+ return -EINVAL;
150- ka_device_t *dev, u32 dev_index,150+ }
151- struct dvt_devinfo *dev_info)151+ if (priv->ops->davinci_getdevinfo == NULL) {
152-{152+ vascend_err(dev, "vdavinci_priv's getdevinfo ops is null\n");
153- if (!vdavinci_priv_check(priv)) {153+ return -EINVAL;
154- return -EINVAL;154+ }
155- }155+ 
156- if (priv->ops->davinci_getdevinfo == NULL) {156+ return priv->ops->davinci_getdevinfo(dev, dev_index, dev_info);
157- vascend_err(dev, "vdavinci_priv's getdevinfo ops is null\n");157+}
158- return -EINVAL;158+ 
159- }159+int vdavinci_priv_vdev_enable_sriov(struct vdavinci_priv *priv, ka_pci_dev_t *pdev, int numvfs)
160- 160+{
161- return priv->ops->davinci_getdevinfo(dev, dev_index, dev_info);161+ if (!vdavinci_priv_check(priv)) {
162-}162+ return -EINVAL;
163- 163+ }
164-int vdavinci_priv_vdev_enable_sriov(struct vdavinci_priv *priv,164+ if (priv->ops->vascend_enable_sriov == NULL) {
165- ka_pci_dev_t *pdev, int numvfs)165+ vascend_err(&pdev->dev, "vdavinci_priv's vascend_enable_sriov ops is null\n");
166-{166+ return -EINVAL;
167- if (!vdavinci_priv_check(priv)) {167+ }
168- return -EINVAL;168+ 
169- }169+ return priv->ops->vascend_enable_sriov(pdev, numvfs);
170- if (priv->ops->vascend_enable_sriov == NULL) {
171- vascend_err(&pdev->dev, "vdavinci_priv's vascend_enable_sriov ops is null\n");
172- return -EINVAL;
173- }
174- 
175- return priv->ops->vascend_enable_sriov(pdev, numvfs);
176}170}
@@ -1,37 +1,33 @@
1-/*1+/*
2- * Copyright (c) Huawei Technologies Co., Ltd. 2025-2025. All rights reserved.2+ * Copyright (c) Huawei Technologies Co., Ltd. 2025-2025. All rights reserved.
3- *3+ *
4- * This program is free software; you can redistribute it and/or modify4+ * This program is free software; you can redistribute it and/or modify
5- * it under the terms of the GNU General Public License version 2 and5+ * it under the terms of the GNU General Public License version 2 and
6- * only version 2 as published by the Free Software Foundation.6+ * only version 2 as published by the Free Software Foundation.
7- *7+ *
8- * This program is distributed in the hope that it will be useful,8+ * This program is distributed in the hope that it will be useful,
9- * but WITHOUT ANY WARRANTY; without even the implied warranty of9+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
10- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the10+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11- * GNU General Public License for more details.11+ * GNU General Public License for more details.
12- */12+ */
13- 13+ 
14-#ifndef _PRIV_OPS_H_14+#ifndef _PRIV_OPS_H_
15-#define _PRIV_OPS_H_15+#define _PRIV_OPS_H_
16- 16+ 
17-#include "dvt.h"17+#include "dvt.h"
18- 18+ 
19-int vdavinci_priv_vdev_create(struct hw_vdavinci *vdavinci,19+int vdavinci_priv_vdev_create(struct hw_vdavinci *vdavinci, struct vdavinci_type *tp, ka_uuid_le_t uuid);
20- struct vdavinci_type *tp, ka_uuid_le_t uuid);20+void vdavinci_priv_vdev_destroy(struct hw_vdavinci *vdavinci);
21-void vdavinci_priv_vdev_destroy(struct hw_vdavinci *vdavinci);21+void vdavinci_priv_vdev_release(struct hw_vdavinci *vdavinci);
22-void vdavinci_priv_vdev_release(struct hw_vdavinci *vdavinci);22+int vdavinci_priv_vdev_reset(struct hw_vdavinci *vdavinci);
23-int vdavinci_priv_vdev_reset(struct hw_vdavinci *vdavinci);23+int vdavinci_priv_vdev_flr(struct hw_vdavinci *vdavinci);
24-int vdavinci_priv_vdev_flr(struct hw_vdavinci *vdavinci);24+void vdavinci_priv_vdev_notify(struct hw_vdavinci *vdavinci, int db_index);
25-void vdavinci_priv_vdev_notify(struct hw_vdavinci *vdavinci, int db_index);25+int vdavinci_priv_vdev_getmapinfo(struct hw_vdavinci *vdavinci, struct vdavinci_type *tp, u32 bar_id,
26-int vdavinci_priv_vdev_getmapinfo(struct hw_vdavinci *vdavinci,26+ struct vdavinci_mapinfo *map_info);
27- struct vdavinci_type *tp, u32 bar_id,27+int vdavinci_priv_vdev_putmapinfo(struct hw_vdavinci *vdavinci);
28- struct vdavinci_mapinfo *map_info);28+unsigned int vdavinci_priv_vdev_getdevnum(struct vdavinci_priv *priv, ka_device_t *dev);
29-int vdavinci_priv_vdev_putmapinfo(struct hw_vdavinci *vdavinci);29+int vdavinci_priv_vdev_getdevinfo(struct vdavinci_priv *priv, ka_device_t *dev, u32 dev_index,
30-unsigned int vdavinci_priv_vdev_getdevnum(struct vdavinci_priv *priv, ka_device_t *dev);30+ struct dvt_devinfo *dev_info);
31-int vdavinci_priv_vdev_getdevinfo(struct vdavinci_priv *priv,31+int vdavinci_priv_vdev_enable_sriov(struct vdavinci_priv *priv, ka_pci_dev_t *pdev, int numvfs);
32- ka_device_t *dev, u32 dev_index,32+ 
33- struct dvt_devinfo *dev_info);
34-int vdavinci_priv_vdev_enable_sriov(struct vdavinci_priv *priv,
35- ka_pci_dev_t *pdev, int numvfs);
36- 
37#endif /* _PRIV_OPS_H_ */33#endif /* _PRIV_OPS_H_ */
@@ -1,134 +1,131 @@
1-/*1+/*
2- * Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.2+ * Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.
3- *3+ *
4- * This program is free software; you can redistribute it and/or modify4+ * This program is free software; you can redistribute it and/or modify
5- * it under the terms of the GNU General Public License version 2 and5+ * it under the terms of the GNU General Public License version 2 and
6- * only version 2 as published by the Free Software Foundation.6+ * only version 2 as published by the Free Software Foundation.
7- *7+ *
8- * This program is distributed in the hope that it will be useful,8+ * This program is distributed in the hope that it will be useful,
9- * but WITHOUT ANY WARRANTY; without even the implied warranty of9+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
10- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the10+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11- * GNU General Public License for more details.11+ * GNU General Public License for more details.
12- */12+ */
13- 13+ 
14-#include "ka_system_pub.h"14+#include "ka_system_pub.h"
15-#include "hw_vdavinci.h"15+#include "hw_vdavinci.h"
16-#include "dvt.h"16+#include "dvt.h"
17-#include "vfio_ops.h"17+#include "vfio_ops.h"
18-#include "schedule.h"18+#include "schedule.h"
19- 19+ 
20-bool hw_vdavinci_changed_cpu(ka_task_struct_t *p,20+bool hw_vdavinci_changed_cpu(ka_task_struct_t *p, const ka_cpumask_t *next_mask)
21- const ka_cpumask_t *next_mask)21+{
22-{22+#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))
23-#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))23+ if (ka_base_cpumask_empty(next_mask)) {
24- if (ka_base_cpumask_empty(next_mask)) {24+ return false;
25- return false;25+ }
26- }26+ 
27- 27+ if (cpumask_test_cpu(ka_system_smp_processor_id(), next_mask)) {
28- if (cpumask_test_cpu(ka_system_smp_processor_id(), next_mask)) {28+ return false;
29- return false;29+ }
30- }30+ 
31- 31+ if (ka_base_set_cpus_allowed_ptr(p, next_mask) != 0) {
32- if (ka_base_set_cpus_allowed_ptr(p, next_mask) != 0) {32+ return false;
33- return false;33+ }
34- }34+#endif
35-#endif35+ return true;
36- return true;36+}
37-}37+ 
38- 38+bool hw_vdavinci_scheduled(struct hw_vdavinci *vdavinci, unsigned long current_pages, unsigned long max_pages,
39-bool hw_vdavinci_scheduled(struct hw_vdavinci *vdavinci,39+ unsigned int timeout, ka_page_t *page)
40- unsigned long current_pages,40+{
41- unsigned long max_pages,41+#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))
42- unsigned int timeout,42+ ka_cpumask_var_t next_mask;
43- ka_page_t *page)43+ bool ret;
44-{44+ 
45-#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))45+ if (page != NULL) {
46- ka_cpumask_var_t next_mask;46+ if (!ka_base_zalloc_cpumask_var(&next_mask, KA_GFP_KERNEL)) {
47- bool ret;47+ return false;
48- 48+ }
49- if (page != NULL) {49+ ret = get_node_cpu_by_page(vdavinci, ka_system_smp_processor_id(), page, next_mask);
50- if (!ka_base_zalloc_cpumask_var(&next_mask, KA_GFP_KERNEL)) {50+ if (ret && hw_vdavinci_changed_cpu(ka_task_get_current(), next_mask)) {
51- return false;51+ ka_base_free_cpumask_var(next_mask);
52- }52+ return true;
53- ret = get_node_cpu_by_page(vdavinci, ka_system_smp_processor_id(), page, next_mask);53+ }
54- if (ret && hw_vdavinci_changed_cpu(ka_task_get_current(), next_mask)) {54+ ka_base_free_cpumask_var(next_mask);
55- ka_base_free_cpumask_var(next_mask);55+ }
56- return true;56+ if (current_pages >= max_pages) {
57- }57+ ka_task_set_current_state(KA_TASK_INTERRUPTIBLE);
58- ka_base_free_cpumask_var(next_mask);58+ ka_task_schedule_timeout((long)ka_system_msecs_to_jiffies(timeout));
59- }59+ return true;
60- if (current_pages >= max_pages) {60+ }
61- ka_task_set_current_state(KA_TASK_INTERRUPTIBLE);61+#endif
62- ka_task_schedule_timeout((long)ka_system_msecs_to_jiffies(timeout));62+ return false;
63- return true;63+}
64- }64+ 
65-#endif65+#ifdef CONFIG_NUMA
66- return false;66+#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))
67-}67+STATIC bool is_vcpu_thread(ka_task_struct_t *task)
68- 68+{
69-#ifdef CONFIG_NUMA69+ return ka_strstarts(task->comm, "CPU ");
70-#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))70+}
71-STATIC bool is_vcpu_thread(ka_task_struct_t *task)71+ 
72-{72+STATIC int get_page_node(ka_page_t *page)
73- return ka_strstarts(task->comm, "CPU ");73+{
74-}74+ if (!ka_mm_pfn_valid(ka_mm_page_to_pfn(page))) {
75- 75+ return -1;
76-STATIC int get_page_node(ka_page_t *page)76+ }
77-{77+ 
78- if (!ka_mm_pfn_valid(ka_mm_page_to_pfn(page))) {78+ return ka_mm_page_to_nid(page);
79- return -1;79+}
80- }80+#endif /* VERSION_SUPPORT */
81- 81+#endif /* CONFIG_NUMA */
82- return ka_mm_page_to_nid(page);82+ 
83-}83+bool get_node_cpu_by_page(struct hw_vdavinci *vdavinci, unsigned int current_cpu, ka_page_t *page,
84-#endif /* VERSION_SUPPORT */84+ ka_cpumask_t *cpumask)
85-#endif /* CONFIG_NUMA */85+{
86- 86+#ifdef CONFIG_NUMA
87-bool get_node_cpu_by_page(struct hw_vdavinci *vdavinci,87+#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))
88- unsigned int current_cpu,88+ unsigned int cpu = 0;
89- ka_page_t *page,89+ ka_task_struct_t *me = NULL;
90- ka_cpumask_t *cpumask)90+ ka_task_struct_t *thread = NULL;
91-{91+ int page_node = get_page_node(page);
92-#ifdef CONFIG_NUMA92+ ka_task_struct_t *qemu_task = vdavinci->qemu_task;
93-#if (IS_VDAVINCI_KERNEL_VERSION_SUPPORT || (defined(DRV_UT)))93+ const ka_cpumask_t *thread_mask;
94- unsigned int cpu = 0;94+ 
95- ka_task_struct_t *me = NULL;95+ if (page_node < 0) {
96- ka_task_struct_t *thread = NULL;96+ return false;
97- int page_node = get_page_node(page);97+ }
98- ka_task_struct_t *qemu_task = vdavinci->qemu_task;98+ if (page_node == ka_system_cpu_to_node(current_cpu)) {
99- const ka_cpumask_t *thread_mask;99+ return false;
100- 100+ }
101- if (page_node < 0) {101+ me = qemu_task;
102- return false;102+ thread = me;
103- }103+ do {
104- if (page_node == ka_system_cpu_to_node(current_cpu)) {104+ if (!is_vcpu_thread(thread)) {
105- return false;105+ continue;
106- }106+ }
107- me = qemu_task;107+ cpu = ka_task_task_cpu(thread);
108- thread = me;108+ if (ka_system_cpu_to_node(cpu) == page_node) {
109- do {109+ ka_base_cpumask_set_cpu(cpu, cpumask);
110- if (!is_vcpu_thread(thread)) {110+ }
111- continue;111+ thread_mask = ka_get_cpumask(thread);
112- }112+ ka_base_cpumask_or(&(vdavinci->vm_cpus_mask), &(vdavinci->vm_cpus_mask), thread_mask);
113- cpu = ka_task_task_cpu(thread);113+ }
114- if (ka_system_cpu_to_node(cpu) == page_node) {114+ ka_while_each_thread(me, thread);
115- ka_base_cpumask_set_cpu(cpu, cpumask);115+ ka_base_for_each_cpu(cpu, &(vdavinci->vm_cpus_mask))
116- }116+ {
117- thread_mask = ka_get_cpumask(thread);117+ if (ka_system_cpu_to_node(cpu) == page_node) {
118- ka_base_cpumask_or(&(vdavinci->vm_cpus_mask), &(vdavinci->vm_cpus_mask), thread_mask);118+ ka_base_cpumask_set_cpu(cpu, cpumask);
119- } ka_while_each_thread(me, thread);119+ }
120- ka_base_for_each_cpu(cpu, &(vdavinci->vm_cpus_mask)) {120+ }
121- if (ka_system_cpu_to_node(cpu) == page_node) {121+ thread_mask = ka_get_cpumask(qemu_task);
122- ka_base_cpumask_set_cpu(cpu, cpumask);122+ ka_base_for_each_cpu(cpu, thread_mask)
123- }123+ {
124- }124+ if (ka_system_cpu_to_node(cpu) == page_node) {
125- thread_mask = ka_get_cpumask(qemu_task);125+ ka_base_cpumask_set_cpu(cpu, cpumask);
126- ka_base_for_each_cpu(cpu, thread_mask) {126+ }
127- if (ka_system_cpu_to_node(cpu) == page_node) {127+ }
128- ka_base_cpumask_set_cpu(cpu, cpumask);128+#endif /* VERSION_SUPPORT */
129- }129+#endif /* CONFIG_NUMA */
130- }130+ return true;
131-#endif /* VERSION_SUPPORT */
132-#endif /* CONFIG_NUMA */
133- return true;
134}131}
@@ -1,29 +1,23 @@
1-/*1+/*
2- * Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.2+ * Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.
3- *3+ *
4- * This program is free software; you can redistribute it and/or modify4+ * This program is free software; you can redistribute it and/or modify
5- * it under the terms of the GNU General Public License version 2 and5+ * it under the terms of the GNU General Public License version 2 and
6- * only version 2 as published by the Free Software Foundation.6+ * only version 2 as published by the Free Software Foundation.
7- *7+ *
8- * This program is distributed in the hope that it will be useful,8+ * This program is distributed in the hope that it will be useful,
9- * but WITHOUT ANY WARRANTY; without even the implied warranty of9+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
10- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the10+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11- * GNU General Public License for more details.11+ * GNU General Public License for more details.
12- */12+ */
13- 13+ 
14-#ifndef _SCHEDULE_H_14+#ifndef _SCHEDULE_H_
15-#define _SCHEDULE_H_15+#define _SCHEDULE_H_
16- 16+ 
17-bool hw_vdavinci_changed_cpu(ka_task_struct_t *p,17+bool hw_vdavinci_changed_cpu(ka_task_struct_t *p, const ka_cpumask_t *next_mask);
18- const ka_cpumask_t *next_mask);18+bool hw_vdavinci_scheduled(struct hw_vdavinci *vdavinci, unsigned long current_pages, unsigned long max_pages,
19-bool hw_vdavinci_scheduled(struct hw_vdavinci *vdavinci,19+ unsigned int timeout, ka_page_t *page);
20- unsigned long current_pages,20+bool get_node_cpu_by_page(struct hw_vdavinci *vdavinci, unsigned int current_cpu, ka_page_t *page,
21- unsigned long max_pages,21+ ka_cpumask_t *cpumask);
22- unsigned int timeout,22+ 
23- ka_page_t *page);
24-bool get_node_cpu_by_page(struct hw_vdavinci *vdavinci,
25- unsigned int current_cpu,
26- ka_page_t *page,
27- ka_cpumask_t *cpumask);
28- 
29#endif23#endif
@@ -42,15 +42,17 @@ static void hw_vdavinci_reset_debugfs_info(struct hw_vdavinci *vdavinci)
42 if (vdavinci->debugfs.msix_count) {42 if (vdavinci->debugfs.msix_count) {
43 ret = memset_s(vdavinci->debugfs.msix_count, destmax_count, 0, destmax_count);43 ret = memset_s(vdavinci->debugfs.msix_count, destmax_count, 0, destmax_count);
44 if (ret)44 if (ret)
45- vascend_err(vdavinci_to_dev(vdavinci), "vdavinci reset msix_count failed, "45+ vascend_err(vdavinci_to_dev(vdavinci),
46- "ret: %d\n", ret);46+ "vdavinci reset msix_count failed, "
47+ "ret: %d\n",
48+ ret);
47 }49 }
48 50 
49 vdavinci->debugfs.notify_count = 0;51 vdavinci->debugfs.notify_count = 0;
50}52}
51 53 
52-STATIC void hw_dvt_vdavinci_init(struct hw_vdavinci *vdavinci, struct hw_dvt *dvt,54+STATIC void hw_dvt_vdavinci_init(struct hw_vdavinci *vdavinci, struct hw_dvt *dvt, struct hw_vdavinci_type *type,
53- struct hw_vdavinci_type *type, unsigned int id)55+ unsigned int id)
54{56{
55 vdavinci->id = id;57 vdavinci->id = id;
56 vdavinci->dvt = dvt;58 vdavinci->dvt = dvt;
@@ -81,7 +83,8 @@ struct hw_vdavinci *find_vdavinci(ka_device_t *dev)
81 if (dev == NULL) {83 if (dev == NULL) {
82 return NULL;84 return NULL;
83 }85 }
84- ka_list_for_each_entry_safe(vdavinci, next, head, list) {86+ ka_list_for_each_entry_safe(vdavinci, next, head, list)
87+ {
85 if (vdavinci->dev.resource_dev == dev) {88 if (vdavinci->dev.resource_dev == dev) {
86 return vdavinci;89 return vdavinci;
87 }90 }
@@ -105,7 +108,8 @@ STATIC void unregister_vdavinci(struct hw_vdavinci *vdavinci)
105 struct hw_vdavinci *vdavinci_node = NULL, *next = NULL;108 struct hw_vdavinci *vdavinci_node = NULL, *next = NULL;
106 ka_list_head_t *head = get_vdavinci_list();109 ka_list_head_t *head = get_vdavinci_list();
107 110 
108- ka_list_for_each_entry_safe(vdavinci_node, next, head, list) {111+ ka_list_for_each_entry_safe(vdavinci_node, next, head, list)
112+ {
109 if (vdavinci_node == vdavinci) {113 if (vdavinci_node == vdavinci) {
110 ka_list_del(&vdavinci_node->list);114 ka_list_del(&vdavinci_node->list);
111 }115 }
@@ -121,8 +125,7 @@ STATIC int register_vdavinci(struct hw_vdavinci *vdavinci)
121 if (ka_unlikely(vdavinci == NULL)) {125 if (ka_unlikely(vdavinci == NULL)) {
122 return -EINVAL;126 return -EINVAL;
123 }127 }
124- old = ka_xa_store(&g_vdavinci_xa, (uintptr_t)vdavinci->dev.resource_dev,128+ old = ka_xa_store(&g_vdavinci_xa, (uintptr_t)vdavinci->dev.resource_dev, vdavinci, KA_GFP_KERNEL);
125- vdavinci, KA_GFP_KERNEL);
126 if (ka_unlikely(ka_xa_is_err(old))) {129 if (ka_unlikely(ka_xa_is_err(old))) {
127 return ka_xa_err(old);130 return ka_xa_err(old);
128 }131 }
@@ -179,10 +182,19 @@ STATIC int hw_dvt_alloc_vf(struct hw_vdavinci *vdavinci)
179 ret = register_vdavinci(vdavinci);182 ret = register_vdavinci(vdavinci);
180 if (ret != 0) {183 if (ret != 0) {
181 vascend_err(dev, "register vdavinci error: %d\n", ret);184 vascend_err(dev, "register vdavinci error: %d\n", ret);
182- return ret;185+ goto out;
183 }186 }
184 187 
185 return 0;188 return 0;
189+out:
190+ vdavinci->is_passthrough = false;
191+ vdavinci->vf.irq_type = -1;
192+ dvt->sriov.vf_used -= 1;
193+ vdavinci->dev.resource_dev = NULL;
194+ vdavinci->vf.pdev = NULL;
195+ dvt->sriov.vf_array[index].used = false;
196+ dvt->sriov.vf_array[index].vdavinci = NULL;
197+ return ret;
186}198}
187 199 
188STATIC int hw_dvt_reclaim_vf(struct hw_vdavinci *vdavinci)200STATIC int hw_dvt_reclaim_vf(struct hw_vdavinci *vdavinci)
@@ -203,16 +215,14 @@ STATIC int hw_dvt_reclaim_vf(struct hw_vdavinci *vdavinci)
203 return 0;215 return 0;
204}216}
205 217 
206-int init_vdavinci_type(struct hw_vdavinci_type *type,218+int init_vdavinci_type(struct hw_vdavinci_type *type, struct vdavinci_type *tp)
207- struct vdavinci_type *tp)
208{219{
209 int ret = 0;220 int ret = 0;
210 221 
211 if (type == NULL || tp == NULL) {222 if (type == NULL || tp == NULL) {
212 return -EINVAL;223 return -EINVAL;
213 }224 }
214- ret = snprintf_s(tp->template_name, HW_DVT_MAX_TYPE_NAME,225+ ret = snprintf_s(tp->template_name, HW_DVT_MAX_TYPE_NAME, HW_DVT_MAX_TYPE_NAME - 1, "%s", type->template_name);
215- HW_DVT_MAX_TYPE_NAME - 1, "%s", type->template_name);
216 if (ret < 0) {226 if (ret < 0) {
217 ka_dfx_pr_err("vdavinci type init failed, ret: %d\n", ret);227 ka_dfx_pr_err("vdavinci type init failed, ret: %d\n", ret);
218 return ret;228 return ret;
@@ -236,9 +246,7 @@ int init_vdavinci_type(struct hw_vdavinci_type *type,
236 return 0;246 return 0;
237}247}
238 248 
239-STATIC int hw_dvt_ops_create_vdavinci(struct hw_vdavinci *vdavinci,249+STATIC int hw_dvt_ops_create_vdavinci(struct hw_vdavinci *vdavinci, struct hw_vdavinci_type *type, ka_uuid_le_t uuid)
240- struct hw_vdavinci_type *type,
241- ka_uuid_le_t uuid)
242{250{
243 struct vdavinci_type tp;251 struct vdavinci_type tp;
244 int ret = 0;252 int ret = 0;
@@ -250,16 +258,17 @@ STATIC int hw_dvt_ops_create_vdavinci(struct hw_vdavinci *vdavinci,
250 }258 }
251 ret = vdavinci_priv_vdev_create(vdavinci, &tp, uuid);259 ret = vdavinci_priv_vdev_create(vdavinci, &tp, uuid);
252 if (ret != 0) {260 if (ret != 0) {
253- vascend_err(vdavinci_to_dev(vdavinci), "create vdavinci failed, call vdavinci_create failed, "261+ vascend_err(vdavinci_to_dev(vdavinci),
254- "pf : %u, vid: %u, ret: %d\n", vdavinci->dev.dev_index, vdavinci->id, ret);262+ "create vdavinci failed, call vdavinci_create failed, "
263+ "pf : %u, vid: %u, ret: %d\n",
264+ vdavinci->dev.dev_index, vdavinci->id, ret);
255 return ret;265 return ret;
256 }266 }
257 267 
258 return 0;268 return 0;
259}269}
260 270 
261-struct hw_vdavinci *hw_dvt_create_vdavinci(struct hw_dvt *dvt,271+struct hw_vdavinci *hw_dvt_create_vdavinci(struct hw_dvt *dvt, struct hw_vdavinci_type *type, ka_uuid_le_t uuid)
262- struct hw_vdavinci_type *type, ka_uuid_le_t uuid)
263{272{
264 struct hw_vdavinci *vdavinci;273 struct hw_vdavinci *vdavinci;
265 int ret;274 int ret;
@@ -270,8 +279,7 @@ struct hw_vdavinci *hw_dvt_create_vdavinci(struct hw_dvt *dvt,
270 return KA_ERR_PTR(-ENOMEM);279 return KA_ERR_PTR(-ENOMEM);
271 }280 }
272 281 
273- ret = ka_base_idr_alloc(&pf_info->vdavinci_idr, vdavinci, 0,282+ ret = ka_base_idr_alloc(&pf_info->vdavinci_idr, vdavinci, 0, DVT_MAX_VDAVINCI, KA_GFP_KERNEL);
274- DVT_MAX_VDAVINCI, KA_GFP_KERNEL);
275 if (ret < 0)283 if (ret < 0)
276 goto free_vdavinci;284 goto free_vdavinci;
277 285 
@@ -296,6 +304,7 @@ struct hw_vdavinci *hw_dvt_create_vdavinci(struct hw_dvt *dvt,
296 }304 }
297 hw_dvt_debugfs_add_vdavinci(vdavinci);305 hw_dvt_debugfs_add_vdavinci(vdavinci);
298 ka_task_mutex_init(&vdavinci->ioeventfds_lock);306 ka_task_mutex_init(&vdavinci->ioeventfds_lock);
307+ ka_task_mutex_init(&vdavinci->vdev.cache_lock);
299 KA_INIT_LIST_HEAD(&vdavinci->ioeventfds_list);308 KA_INIT_LIST_HEAD(&vdavinci->ioeventfds_list);
300 309 
301 return vdavinci;310 return vdavinci;
@@ -321,10 +330,9 @@ void hw_dvt_destroy_vdavinci(struct hw_vdavinci *vdavinci)
321 dvt->mmio_uninit(vdavinci);330 dvt->mmio_uninit(vdavinci);
322 hw_dvt_reclaim_vf(vdavinci);331 hw_dvt_reclaim_vf(vdavinci);
323 ka_base_idr_remove(&pf_info->vdavinci_idr, vdavinci->id);332 ka_base_idr_remove(&pf_info->vdavinci_idr, vdavinci->id);
324- 333+ ka_task_mutex_destroy(&vdavinci->vdev.cache_lock);
325- hw_dvt_debugfs_remove_vdavinci(vdavinci);
326 ka_task_mutex_destroy(&vdavinci->ioeventfds_lock);334 ka_task_mutex_destroy(&vdavinci->ioeventfds_lock);
327- 335+ hw_dvt_debugfs_remove_vdavinci(vdavinci);
328 if (vdavinci->debugfs.msix_count) {336 if (vdavinci->debugfs.msix_count) {
329 ka_mm_kfree(vdavinci->debugfs.msix_count);337 ka_mm_kfree(vdavinci->debugfs.msix_count);
330 vdavinci->debugfs.msix_count = NULL;338 vdavinci->debugfs.msix_count = NULL;
@@ -348,14 +356,15 @@ int hw_dvt_reset_vdavinci(struct hw_vdavinci *vdavinci)
348 if (ka_unlikely(vdavinci == NULL)) {356 if (ka_unlikely(vdavinci == NULL)) {
349 return -EINVAL;357 return -EINVAL;
350 }358 }
351- vascend_info(vdavinci_to_dev(vdavinci),359+ vascend_info(vdavinci_to_dev(vdavinci), "enter reset vdavinci, pf : %u, vid: %u\n", vdavinci->dev.dev_index,
352- "enter reset vdavinci, pf : %u, vid: %u\n", vdavinci->dev.dev_index, vdavinci->id);360+ vdavinci->id);
353 ka_task_mutex_lock(&vdavinci->vdavinci_lock);361 ka_task_mutex_lock(&vdavinci->vdavinci_lock);
354 ret = vdavinci_priv_vdev_reset(vdavinci);362 ret = vdavinci_priv_vdev_reset(vdavinci);
355 if (ka_unlikely(ret != 0)) {363 if (ka_unlikely(ret != 0)) {
356 vascend_err(vdavinci_to_dev(vdavinci),364 vascend_err(vdavinci_to_dev(vdavinci),
357 "reset vdavinci failed, call vdavinci_reset failed, "365 "reset vdavinci failed, call vdavinci_reset failed, "
358- "pf : %u, vid: %u, ret: %d\n", vdavinci->dev.dev_index, vdavinci->id, ret);366+ "pf : %u, vid: %u, ret: %d\n",
367+ vdavinci->dev.dev_index, vdavinci->id, ret);
359 goto out;368 goto out;
360 }369 }
361 370 
@@ -364,8 +373,8 @@ int hw_dvt_reset_vdavinci(struct hw_vdavinci *vdavinci)
364 hw_vdavinci_reset_debugfs_info(vdavinci);373 hw_vdavinci_reset_debugfs_info(vdavinci);
365 vdavinci->msix_injection_allowed = false;374 vdavinci->msix_injection_allowed = false;
366 375 
367- vascend_info(vdavinci_to_dev(vdavinci),376+ vascend_info(vdavinci_to_dev(vdavinci), "leave reset vdavinci, pf : %u, vid: %u\n", vdavinci->dev.dev_index,
368- "leave reset vdavinci, pf : %u, vid: %u\n", vdavinci->dev.dev_index, vdavinci->id);377+ vdavinci->id);
369 378 
370out:379out:
371 ka_task_mutex_unlock(&vdavinci->vdavinci_lock);380 ka_task_mutex_unlock(&vdavinci->vdavinci_lock);
@@ -1,22 +1,21 @@
1-/*1+/*
2- * Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.2+ * Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.
3- *3+ *
4- * This program is free software; you can redistribute it and/or modify4+ * This program is free software; you can redistribute it and/or modify
5- * it under the terms of the GNU General Public License version 2 and5+ * it under the terms of the GNU General Public License version 2 and
6- * only version 2 as published by the Free Software Foundation.6+ * only version 2 as published by the Free Software Foundation.
7- *7+ *
8- * This program is distributed in the hope that it will be useful,8+ * This program is distributed in the hope that it will be useful,
9- * but WITHOUT ANY WARRANTY; without even the implied warranty of9+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
10- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the10+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11- * GNU General Public License for more details.11+ * GNU General Public License for more details.
12- */12+ */
13- 13+ 
14-#ifndef _VDAVINCI_H_14+#ifndef _VDAVINCI_H_
15-#define _VDAVINCI_H_15+#define _VDAVINCI_H_
16- 16+ 
17-void hw_vdavinci_unregister_iodev(struct hw_vdavinci *vdavinci);17+void hw_vdavinci_unregister_iodev(struct hw_vdavinci *vdavinci);
18-int hw_vdavinci_register_iodev(struct hw_vdavinci *vdavinci,18+int hw_vdavinci_register_iodev(struct hw_vdavinci *vdavinci, gpa_t addr, int len, int index);
19- gpa_t addr, int len, int index);19+void vdavinci_module_exit(void);
20-void vdavinci_module_exit(void);20+ 
21- 21+#endif
22-#endif
@@ -37,14 +37,12 @@ STATIC int hw_vdavinci_rw_bar0(struct hw_vdavinci *vdavinci, struct position *p,
37 uint64_t pos = p->pos;37 uint64_t pos = p->pos;
38 size_t count = p->count;38 size_t count = p->count;
39 39 
40- bar_start = (*(u64 *)(vdavinci->cfg_space.config + KA_PCI_BASE_ADDRESS_0)) &40+ bar_start = (*(u64 *)(vdavinci->cfg_space.config + KA_PCI_BASE_ADDRESS_0)) & KA_PCI_BASE_ADDRESS_MEM_MASK;
41- KA_PCI_BASE_ADDRESS_MEM_MASK;
42#if IS_VDAVINCI_IODEV_SUPPORT41#if IS_VDAVINCI_IODEV_SUPPORT
43 if (ka_unlikely(vdavinci->iodev == NULL)) {42 if (ka_unlikely(vdavinci->iodev == NULL)) {
44 ret = hw_vdavinci_register_iodev(vdavinci, bar_start, DOORBELL_MAX * DOORBELL_SIZE, index);43 ret = hw_vdavinci_register_iodev(vdavinci, bar_start, DOORBELL_MAX * DOORBELL_SIZE, index);
45 if (ret != 0) {44 if (ret != 0) {
46- vascend_warn(vdavinci_to_dev(vdavinci),45+ vascend_warn(vdavinci_to_dev(vdavinci), "vdavinci iodev is not support, ret: %d\n", ret);
47- "vdavinci iodev is not support, ret: %d\n", ret);
48 vdavinci->iodev = KA_ERR_PTR(ret);46 vdavinci->iodev = KA_ERR_PTR(ret);
49 }47 }
50 }48 }
@@ -78,27 +76,22 @@ STATIC int _hw_vdavinci_rw(struct hw_vdavinci *vdavinci, struct position *p, cha
78 ret = hw_vdavinci_rw_bar0(vdavinci, p, buf, write);76 ret = hw_vdavinci_rw_bar0(vdavinci, p, buf, write);
79 break;77 break;
80 case VFIO_PCI_BAR2_REGION_INDEX:78 case VFIO_PCI_BAR2_REGION_INDEX:
81- bar_start = (*(u64 *)(vdavinci->cfg_space.config + KA_PCI_BASE_ADDRESS_2)) &79+ bar_start = (*(u64 *)(vdavinci->cfg_space.config + KA_PCI_BASE_ADDRESS_2)) & KA_PCI_BASE_ADDRESS_MEM_MASK;
82- KA_PCI_BASE_ADDRESS_MEM_MASK;
83 if (write) {80 if (write) {
84- ret = g_hw_vdavinci_ops.emulate_mmio_quirk_write(vdavinci, bar_start + pos,81+ ret = g_hw_vdavinci_ops.emulate_mmio_quirk_write(vdavinci, bar_start + pos, buf, count);
85- buf, count);
86 } else {82 } else {
87- ret = g_hw_vdavinci_ops.emulate_mmio_quirk_read(vdavinci, bar_start + pos,83+ ret = g_hw_vdavinci_ops.emulate_mmio_quirk_read(vdavinci, bar_start + pos, buf, count);
88- buf, count);
89 }84 }
90 break;85 break;
91 default:86 default:
92- vascend_err(vdavinci_to_dev(vdavinci), "unsupported region: %u, vid: %u\n",87+ vascend_err(vdavinci_to_dev(vdavinci), "unsupported region: %u, vid: %u\n", index, vdavinci->id);
93- index, vdavinci->id);
94 return -EINVAL;88 return -EINVAL;
95 }89 }
96 90 
97 return ret == 0 ? count : ret;91 return ret == 0 ? count : ret;
98}92}
99 93 
100-ssize_t hw_vdavinci_rw(struct hw_vdavinci *vdavinci, char *buf,94+ssize_t hw_vdavinci_rw(struct hw_vdavinci *vdavinci, char *buf, size_t count, loff_t *ppos, bool write)
101- size_t count, loff_t *ppos, bool write)
102{95{
103 unsigned int index;96 unsigned int index;
104 uint64_t pos;97 uint64_t pos;
@@ -108,16 +101,14 @@ ssize_t hw_vdavinci_rw(struct hw_vdavinci *vdavinci, char *buf,
108 return -EINVAL;101 return -EINVAL;
109 }102 }
110 if (*ppos < 0) {103 if (*ppos < 0) {
111- vascend_err(vdavinci_to_dev(vdavinci),104+ vascend_err(vdavinci_to_dev(vdavinci), "invalid pos: %lld, or vdavinci is null\n", *ppos);
112- "invalid pos: %lld, or vdavinci is null\n", *ppos);
113 return -EINVAL;105 return -EINVAL;
114 }106 }
115 107 
116 pos = (*(u64 *)ppos) & VFIO_PCI_OFFSET_MASK;108 pos = (*(u64 *)ppos) & VFIO_PCI_OFFSET_MASK;
117 index = VFIO_PCI_OFFSET_TO_INDEX(*(u64 *)ppos);109 index = VFIO_PCI_OFFSET_TO_INDEX(*(u64 *)ppos);
118 if (index >= VFIO_PCI_NUM_REGIONS) {110 if (index >= VFIO_PCI_NUM_REGIONS) {
119- vascend_err(vdavinci_to_dev(vdavinci), "invalid index: %u, vid: %u\n",111+ vascend_err(vdavinci_to_dev(vdavinci), "invalid index: %u, vid: %u\n", index, vdavinci->id);
120- index, vdavinci->id);
121 return -EINVAL;112 return -EINVAL;
122 }113 }
123 114 
@@ -142,15 +133,14 @@ STATIC int vdavinci_ioeventfd_handler(void *opaque, void *unused)
142 return 0;133 return 0;
143}134}
144 135 
145-STATIC struct vdavinci_ioeventfd *136+STATIC struct vdavinci_ioeventfd *ioeventfd_find_exist(struct hw_vdavinci *vdavinci, loff_t pos, int bar, uint64_t data,
146-ioeventfd_find_exist(struct hw_vdavinci *vdavinci, loff_t pos,137+ int count)
147- int bar, uint64_t data, int count)
148{138{
149 struct vdavinci_ioeventfd *ioeventfd;139 struct vdavinci_ioeventfd *ioeventfd;
150 140 
151- ka_list_for_each_entry(ioeventfd, &vdavinci->ioeventfds_list, next) {141+ ka_list_for_each_entry(ioeventfd, &vdavinci->ioeventfds_list, next)
152- if (ioeventfd->pos == pos && ioeventfd->bar == bar &&142+ {
153- ioeventfd->data == data && ioeventfd->count == count) {143+ if (ioeventfd->pos == pos && ioeventfd->bar == bar && ioeventfd->data == data && ioeventfd->count == count) {
154 return ioeventfd;144 return ioeventfd;
155 }145 }
156 }146 }
@@ -158,8 +148,7 @@ ioeventfd_find_exist(struct hw_vdavinci *vdavinci, loff_t pos,
158 return NULL;148 return NULL;
159}149}
160 150 
161-void hw_vdavinci_ioeventfd_deactive(struct hw_vdavinci *vdavinci,151+void hw_vdavinci_ioeventfd_deactive(struct hw_vdavinci *vdavinci, struct vdavinci_ioeventfd *ioeventfd)
162- struct vdavinci_ioeventfd *ioeventfd)
163{152{
164 ka_vfio_virqfd_disable(&ioeventfd->virqfd);153 ka_vfio_virqfd_disable(&ioeventfd->virqfd);
165 ka_list_del(&ioeventfd->next);154 ka_list_del(&ioeventfd->next);
@@ -167,8 +156,7 @@ void hw_vdavinci_ioeventfd_deactive(struct hw_vdavinci *vdavinci,
167 vdavinci->ioeventfds_nr--;156 vdavinci->ioeventfds_nr--;
168}157}
169 158 
170-long hw_vdavinci_set_ioeventfd(struct hw_vdavinci *vdavinci, loff_t offset, uint64_t data,159+long hw_vdavinci_set_ioeventfd(struct hw_vdavinci *vdavinci, loff_t offset, uint64_t data, int count, int fd)
171- int count, int fd)
172{160{
173 int ret = 0;161 int ret = 0;
174 struct vdavinci_ioeventfd *ioeventfd;162 struct vdavinci_ioeventfd *ioeventfd;
@@ -193,8 +181,10 @@ long hw_vdavinci_set_ioeventfd(struct hw_vdavinci *vdavinci, loff_t offset, uint
193 hw_vdavinci_ioeventfd_deactive(vdavinci, ioeventfd);181 hw_vdavinci_ioeventfd_deactive(vdavinci, ioeventfd);
194 } else {182 } else {
195 ret = -EEXIST;183 ret = -EEXIST;
196- vascend_err(vdavinci_to_dev(vdavinci), "ioeventfd exist, bar %d, pos %lld,"184+ vascend_err(vdavinci_to_dev(vdavinci),
197- " count %d, data %llu fd %d\n", bar, pos, count, data, fd);185+ "ioeventfd exist, bar %d, pos %lld,"
186+ " count %d, data %llu fd %d\n",
187+ bar, pos, count, data, fd);
198 }188 }
199 goto out_unlock;189 goto out_unlock;
200 }190 }
@@ -220,8 +210,7 @@ long hw_vdavinci_set_ioeventfd(struct hw_vdavinci *vdavinci, loff_t offset, uint
220 ioeventfd->pos = pos;210 ioeventfd->pos = pos;
221 ioeventfd->count = count;211 ioeventfd->count = count;
222 212 
223- ret = ka_vfio_virqfd_enable(ioeventfd, vdavinci_ioeventfd_handler, NULL,213+ ret = ka_vfio_virqfd_enable(ioeventfd, vdavinci_ioeventfd_handler, NULL, NULL, &ioeventfd->virqfd, fd);
224- NULL, &ioeventfd->virqfd, fd);
225 if (ret) {214 if (ret) {
226 ka_mm_kfree(ioeventfd);215 ka_mm_kfree(ioeventfd);
227 goto out_unlock;216 goto out_unlock;
@@ -230,8 +219,10 @@ long hw_vdavinci_set_ioeventfd(struct hw_vdavinci *vdavinci, loff_t offset, uint
230 ka_list_add(&ioeventfd->next, &vdavinci->ioeventfds_list);219 ka_list_add(&ioeventfd->next, &vdavinci->ioeventfds_list);
231 vdavinci->ioeventfds_nr++;220 vdavinci->ioeventfds_nr++;
232 221 
233- vascend_info(vdavinci_to_dev(vdavinci), "set ioeventfd success, bar %d, pos %lld, "222+ vascend_info(vdavinci_to_dev(vdavinci),
234- "count %d, fd %d\n", bar, pos, count, fd);223+ "set ioeventfd success, bar %d, pos %lld, "
224+ "count %d, fd %d\n",
225+ bar, pos, count, fd);
235 226 
236out_unlock:227out_unlock:
237 ka_task_mutex_unlock(&vdavinci->ioeventfds_lock);228 ka_task_mutex_unlock(&vdavinci->ioeventfds_lock);
@@ -242,58 +233,56 @@ out_unlock:
242#if IS_VDAVINCI_IODEV_SUPPORT233#if IS_VDAVINCI_IODEV_SUPPORT
243STATIC unsigned long hw_kvm_mmio_read_buf(const void *buf, unsigned int len)234STATIC unsigned long hw_kvm_mmio_read_buf(const void *buf, unsigned int len)
244{235{
245-#define CHAR_LEN 1236+#define CHAR_LEN 1
246-#define HWORD_LEN 2237+#define HWORD_LEN 2
247-#define WORD_LEN 4238+#define WORD_LEN 4
248-#define DWORD_LEN 8239+#define DWORD_LEN 8
249 const size_t destMax = 8;240 const size_t destMax = 8;
250 unsigned long data = 0;241 unsigned long data = 0;
251 union {242 union {
252- u16 hword;243+ u16 hword;
253- u32 word;244+ u32 word;
254- u64 dword;245+ u64 dword;
255 } tmp;246 } tmp;
256 247 
257 if (ka_unlikely(buf == NULL)) {248 if (ka_unlikely(buf == NULL)) {
258 return 0;249 return 0;
259 }250 }
260 switch (len) {251 switch (len) {
261- case CHAR_LEN:252+ case CHAR_LEN:
262- data = *(u8 *)buf;253+ data = *(u8 *)buf;
263- break;254+ break;
264- case HWORD_LEN:255+ case HWORD_LEN:
265- (void)memcpy_s(&tmp.hword, destMax, buf, len);256+ (void)memcpy_s(&tmp.hword, destMax, buf, len);
266- data = tmp.hword;257+ data = tmp.hword;
267- break;258+ break;
268- case WORD_LEN:259+ case WORD_LEN:
269- (void)memcpy_s(&tmp.word, destMax, buf, len);260+ (void)memcpy_s(&tmp.word, destMax, buf, len);
270- data = tmp.word;261+ data = tmp.word;
271- break;262+ break;
272- case DWORD_LEN:263+ case DWORD_LEN:
273- (void)memcpy_s(&tmp.dword, destMax, buf, len);264+ (void)memcpy_s(&tmp.dword, destMax, buf, len);
274- data = tmp.dword;265+ data = tmp.dword;
275- break;266+ break;
276 }267 }
277 268 
278 return data;269 return data;
279}270}
280- 271+ 
281STATIC bool inline hw_iodev_in_range(struct hw_vdavinci_kvm_iodev *iodev, gpa_t addr)272STATIC bool inline hw_iodev_in_range(struct hw_vdavinci_kvm_iodev *iodev, gpa_t addr)
282{273{
283 return (addr >= iodev->addr) && (addr < iodev->addr + (gpa_t)iodev->len);274 return (addr >= iodev->addr) && (addr < iodev->addr + (gpa_t)iodev->len);
284}275}
285- 276+ 
286-STATIC int hw_vdavinci_mmio_read(ka_kvm_vcpu_t *vcpu, ka_kvm_io_device_t *dev,277+STATIC int hw_vdavinci_mmio_read(ka_kvm_vcpu_t *vcpu, ka_kvm_io_device_t *dev, gpa_t addr, int len, void *val)
287- gpa_t addr, int len, void *val)
288{278{
289 return -EOPNOTSUPP;279 return -EOPNOTSUPP;
290}280}
291- 281+ 
292-STATIC int hw_vdavinci_mmio_write(ka_kvm_vcpu_t *vcpu, ka_kvm_io_device_t *dev,282+STATIC int hw_vdavinci_mmio_write(ka_kvm_vcpu_t *vcpu, ka_kvm_io_device_t *dev, gpa_t addr, int len, const void *val)
293- gpa_t addr, int len, const void *val)
294{283{
295 struct hw_vdavinci_kvm_iodev *iodev = NULL;284 struct hw_vdavinci_kvm_iodev *iodev = NULL;
296- struct position p = { 0 };285+ struct position p = {0};
297 unsigned long value = hw_kvm_mmio_read_buf(val, len);286 unsigned long value = hw_kvm_mmio_read_buf(val, len);
298 287 
299 if (ka_unlikely(vcpu == NULL || dev == NULL || val == NULL)) {288 if (ka_unlikely(vcpu == NULL || dev == NULL || val == NULL)) {
@@ -316,14 +305,19 @@ STATIC int hw_vdavinci_mmio_write(ka_kvm_vcpu_t *vcpu, ka_kvm_io_device_t *dev,
316 return 0;305 return 0;
317}306}
318 307 
308+STATIC void hw_vdavinci_iodev_destructor(ka_kvm_io_device_t *dev)
309+{
310+ struct hw_vdavinci_kvm_iodev *iodev = NULL;
311+ 
312+ iodev = ka_container_of(dev, struct hw_vdavinci_kvm_iodev, dev);
313+ ka_mm_kfree(iodev);
314+}
315+ 
319STATIC const ka_kvm_io_device_ops_t g_hw_vdavinci_iodev_ops = {316STATIC const ka_kvm_io_device_ops_t g_hw_vdavinci_iodev_ops = {
320- .read = hw_vdavinci_mmio_read,317+ .read = hw_vdavinci_mmio_read, .write = hw_vdavinci_mmio_write, .destructor = hw_vdavinci_iodev_destructor};
321- .write = hw_vdavinci_mmio_write,
322-};
323 318 
324/* r1 < r2 => -1, r1 > r2 => 1, else 0 */319/* r1 < r2 => -1, r1 > r2 => 1, else 0 */
325-STATIC inline int hw_kvm_io_bus_cmp(const ka_kvm_io_range_t *r1,320+STATIC inline int hw_kvm_io_bus_cmp(const ka_kvm_io_range_t *r1, const ka_kvm_io_range_t *r2)
326- const ka_kvm_io_range_t *r2)
327{321{
328 if (r1->addr < r2->addr) {322 if (r1->addr < r2->addr) {
329 return -1;323 return -1;
@@ -336,13 +330,11 @@ STATIC inline int hw_kvm_io_bus_cmp(const ka_kvm_io_range_t *r1,
336 return 0;330 return 0;
337}331}
338 332 
339-STATIC int hw_kvm_io_bus_register_dev(ka_kvm_t *kvm, ka_kvm_bus_t bus_idx,333+STATIC int hw_kvm_io_bus_register_dev(ka_kvm_t *kvm, ka_kvm_bus_t bus_idx, gpa_t addr, int len, ka_kvm_io_device_t *dev)
340- gpa_t addr, int len,
341- ka_kvm_io_device_t *dev)
342{334{
343 int i;335 int i;
344 ka_kvm_io_bus_t *new_bus = NULL, *bus = NULL;336 ka_kvm_io_bus_t *new_bus = NULL, *bus = NULL;
345- ka_kvm_io_range_t range = { 0 };337+ ka_kvm_io_range_t range = {0};
346 338 
347 bus = ka_kvm_get_bus(kvm, bus_idx);339 bus = ka_kvm_get_bus(kvm, bus_idx);
348 if (bus == NULL) {340 if (bus == NULL) {
@@ -353,8 +345,7 @@ STATIC int hw_kvm_io_bus_register_dev(ka_kvm_t *kvm, ka_kvm_bus_t bus_idx,
353 return -ENOSPC;345 return -ENOSPC;
354 }346 }
355 347 
356- new_bus = ka_mm_kzalloc(ka_struct_size(bus, range, bus->dev_count + 1),348+ new_bus = ka_mm_kzalloc(ka_struct_size(bus, range, bus->dev_count + 1), KA_GFP_KERNEL_ACCOUNT);
357- KA_GFP_KERNEL_ACCOUNT);
358 if (new_bus == NULL) {349 if (new_bus == NULL) {
359 return -ENOMEM;350 return -ENOMEM;
360 }351 }
@@ -369,21 +360,20 @@ STATIC int hw_kvm_io_bus_register_dev(ka_kvm_t *kvm, ka_kvm_bus_t bus_idx,
369 }360 }
370 }361 }
371 362 
372- (void)memcpy_s(new_bus, sizeof(*bus) + i * sizeof(ka_kvm_io_range_t),363+ (void)memcpy_s(new_bus, sizeof(*bus) + i * sizeof(ka_kvm_io_range_t), bus,
373- bus, sizeof(*bus) + i * sizeof(ka_kvm_io_range_t));364+ sizeof(*bus) + i * sizeof(ka_kvm_io_range_t));
374 new_bus->dev_count++;365 new_bus->dev_count++;
375 new_bus->range[i] = range;366 new_bus->range[i] = range;
376- (void)memcpy_s(new_bus->range + i + 1, (bus->dev_count - i) * sizeof(ka_kvm_io_range_t),367+ (void)memcpy_s(new_bus->range + i + 1, (bus->dev_count - i) * sizeof(ka_kvm_io_range_t), bus->range + i,
377- bus->range + i, (bus->dev_count - i) * sizeof(ka_kvm_io_range_t));368+ (bus->dev_count - i) * sizeof(ka_kvm_io_range_t));
378 ka_rcu_assign_pointer(kvm->buses[bus_idx], new_bus);369 ka_rcu_assign_pointer(kvm->buses[bus_idx], new_bus);
379 ka_synchronize_srcu_expedited(&kvm->srcu);370 ka_synchronize_srcu_expedited(&kvm->srcu);
380 ka_mm_kfree(bus);371 ka_mm_kfree(bus);
381 372 
382 return 0;373 return 0;
383}374}
384- 375+ 
385-int hw_vdavinci_register_iodev(struct hw_vdavinci *vdavinci,376+int hw_vdavinci_register_iodev(struct hw_vdavinci *vdavinci, gpa_t addr, int len, int index)
386- gpa_t addr, int len, int index)
387{377{
388 int ret = 0;378 int ret = 0;
389 struct hw_vdavinci_kvm_iodev *iodev = NULL;379 struct hw_vdavinci_kvm_iodev *iodev = NULL;
@@ -404,26 +394,23 @@ int hw_vdavinci_register_iodev(struct hw_vdavinci *vdavinci,
404 ka_task_mutex_lock(&vdavinci->vdev.kvm->slots_lock);394 ka_task_mutex_lock(&vdavinci->vdev.kvm->slots_lock);
405 ka_kvm_iodevice_init(&iodev->dev, &g_hw_vdavinci_iodev_ops);395 ka_kvm_iodevice_init(&iodev->dev, &g_hw_vdavinci_iodev_ops);
406 396 
407- ret = hw_kvm_io_bus_register_dev(vdavinci->vdev.kvm, KVM_MMIO_BUS,397+ ret = hw_kvm_io_bus_register_dev(vdavinci->vdev.kvm, KVM_MMIO_BUS, iodev->addr, iodev->len, &iodev->dev);
408- iodev->addr, iodev->len, &iodev->dev);
409 398 
410 ka_task_mutex_unlock(&vdavinci->vdev.kvm->slots_lock);399 ka_task_mutex_unlock(&vdavinci->vdev.kvm->slots_lock);
411 400 
412 if (ret != 0) {401 if (ret != 0) {
413 ka_mm_kfree(iodev);402 ka_mm_kfree(iodev);
414 vdavinci->iodev = NULL;403 vdavinci->iodev = NULL;
415- vascend_err(vdavinci_to_dev(vdavinci),404+ vascend_err(vdavinci_to_dev(vdavinci), "vdavinci register iodev failed, ret: %d\n", ret);
416- "vdavinci register iodev failed, ret: %d\n", ret);
417 return ret;405 return ret;
418 }406 }
419 407 
420 vascend_info(vdavinci_to_dev(vdavinci), "vdavinci register iodev success\n");408 vascend_info(vdavinci_to_dev(vdavinci), "vdavinci register iodev success\n");
421 return 0;409 return 0;
422}410}
423- 411+ 
424/* Caller must hold slots_lock. */412/* Caller must hold slots_lock. */
425-STATIC int hw_kvm_io_bus_unregister_dev(ka_kvm_t *kvm, ka_kvm_bus_t bus_idx,413+STATIC int hw_kvm_io_bus_unregister_dev(ka_kvm_t *kvm, ka_kvm_bus_t bus_idx, ka_kvm_io_device_t *dev)
426- ka_kvm_io_device_t *dev)
427{414{
428 int i;415 int i;
429 ka_kvm_io_bus_t *new_bus, *bus;416 ka_kvm_io_bus_t *new_bus, *bus;
@@ -443,23 +430,22 @@ STATIC int hw_kvm_io_bus_unregister_dev(ka_kvm_t *kvm, ka_kvm_bus_t bus_idx,
443 return 0;430 return 0;
444 }431 }
445 432 
446- new_bus = ka_mm_kzalloc(ka_struct_size(bus, range, bus->dev_count - 1),433+ new_bus = ka_mm_kzalloc(ka_struct_size(bus, range, bus->dev_count - 1), KA_GFP_KERNEL_ACCOUNT);
447- KA_GFP_KERNEL_ACCOUNT);434+ if (new_bus == NULL) {
448- if (new_bus != NULL) {435+ return -ENOMEM;
449- (void)memcpy_s(new_bus, ka_struct_size(bus, range, i),
450- bus, ka_struct_size(bus, range, i));
451- new_bus->dev_count--;
452- (void)memcpy_s(new_bus->range + i, ka_flex_array_size(new_bus, range, new_bus->dev_count - i),
453- bus->range + i + 1, ka_flex_array_size(new_bus, range, new_bus->dev_count - i));
454 }436 }
437+ (void)memcpy_s(new_bus, ka_struct_size(bus, range, i), bus, ka_struct_size(bus, range, i));
438+ new_bus->dev_count--;
439+ (void)memcpy_s(new_bus->range + i, ka_flex_array_size(new_bus, range, new_bus->dev_count - i), bus->range + i + 1,
440+ ka_flex_array_size(new_bus, range, new_bus->dev_count - i));
455 441 
456 ka_rcu_assign_pointer(kvm->buses[bus_idx], new_bus);442 ka_rcu_assign_pointer(kvm->buses[bus_idx], new_bus);
457 ka_synchronize_srcu_expedited(&kvm->srcu);443 ka_synchronize_srcu_expedited(&kvm->srcu);
458- 
459 ka_mm_kfree(bus);444 ka_mm_kfree(bus);
460- return new_bus != NULL ? 0 : -ENOMEM;445+ 
446+ return 0;
461}447}
462- 448+ 
463void hw_vdavinci_unregister_iodev(struct hw_vdavinci *vdavinci)449void hw_vdavinci_unregister_iodev(struct hw_vdavinci *vdavinci)
464{450{
465 int ret;451 int ret;
@@ -476,26 +462,22 @@ void hw_vdavinci_unregister_iodev(struct hw_vdavinci *vdavinci)
476 ka_task_mutex_lock(&vdavinci->vdev.kvm->slots_lock);462 ka_task_mutex_lock(&vdavinci->vdev.kvm->slots_lock);
477 ret = hw_kvm_io_bus_unregister_dev(vdavinci->vdev.kvm, KVM_MMIO_BUS, &iodev->dev);463 ret = hw_kvm_io_bus_unregister_dev(vdavinci->vdev.kvm, KVM_MMIO_BUS, &iodev->dev);
478 ka_task_mutex_unlock(&vdavinci->vdev.kvm->slots_lock);464 ka_task_mutex_unlock(&vdavinci->vdev.kvm->slots_lock);
479- 465+ iodev->vdavinci = NULL;
480- ka_mm_kfree(iodev);
481- vdavinci->iodev = NULL;
482- 
483 if (ret != 0) {466 if (ret != 0) {
484- vascend_err(vdavinci_to_dev(vdavinci),467+ vdavinci->iodev = NULL;
485- "vdavinci unregister iodev error, ret: %d\n", ret);468+ vascend_err(vdavinci_to_dev(vdavinci), "vdavinci unregister iodev error, ret: %d\n", ret);
486 return;469 return;
487 }470 }
488- 471+ ka_mm_kfree(iodev);
472+ vdavinci->iodev = NULL;
489 vascend_info(vdavinci_to_dev(vdavinci), "vdavinci unregister iodev success\n");473 vascend_info(vdavinci_to_dev(vdavinci), "vdavinci unregister iodev success\n");
490}474}
491#else475#else
492-int hw_vdavinci_register_iodev(struct hw_vdavinci *vdavinci,476+int hw_vdavinci_register_iodev(struct hw_vdavinci *vdavinci, gpa_t addr, int len, int index)
493- gpa_t addr, int len, int index)
494{477{
495 return -ENOTSUPP;478 return -ENOTSUPP;
496}479}
497 480 
498void hw_vdavinci_unregister_iodev(struct hw_vdavinci *vdavinci)481void hw_vdavinci_unregister_iodev(struct hw_vdavinci *vdavinci)
499-{482+{}
500-}
501#endif /* IS_VDAVINCI_IODEV_SUPPORT */483#endif /* IS_VDAVINCI_IODEV_SUPPORT */
@@ -30,8 +30,8 @@
30#include "vfio_ops.h"30#include "vfio_ops.h"
31 31 
32struct vdavinci_monitor {32struct vdavinci_monitor {
33- ka_atomic_t map_count;33+ ka_atomic64_t map_count;
34- ka_atomic_t pin_count;34+ ka_atomic64_t pin_count;
35};35};
36 36 
37#if IS_VDAVINCI_VPMEM_SUPPORT37#if IS_VDAVINCI_VPMEM_SUPPORT
@@ -39,8 +39,8 @@ static bool (*pfn_is_vpmem_fn)(unsigned long pfn) = NULL;
39#endif39#endif
40 40 
41STATIC struct vdavinci_monitor monitor = {41STATIC struct vdavinci_monitor monitor = {
42- .map_count = KA_BASE_ATOMIC_INIT(0),42+ .map_count = KA_BASE_ATOMIC64_INIT(0),
43- .pin_count = KA_BASE_ATOMIC_INIT(0),43+ .pin_count = KA_BASE_ATOMIC64_INIT(0),
44};44};
45 45 
46void vdavinci_iommu_unmap(ka_device_t *dev, unsigned long iova, size_t size)46void vdavinci_iommu_unmap(ka_device_t *dev, unsigned long iova, size_t size)
@@ -48,31 +48,37 @@ void vdavinci_iommu_unmap(ka_device_t *dev, unsigned long iova, size_t size)
48 size_t unmapped;48 size_t unmapped;
49 ka_iommu_domain_t *domain = NULL;49 ka_iommu_domain_t *domain = NULL;
50 50 
51- ka_mm_dma_sync_single_for_cpu(dev, iova, size, KA_DMA_BIDIRECTIONAL);
52 domain = ka_pci_iommu_get_domain_for_dev(dev);51 domain = ka_pci_iommu_get_domain_for_dev(dev);
52+ if (domain == NULL) {
53+ vascend_err(dev, "iommu domain is null\n");
54+ return;
55+ }
56+ ka_mm_dma_sync_single_for_cpu(dev, iova, size, KA_DMA_BIDIRECTIONAL);
53 unmapped = ka_iommu_unmap(domain, iova, size);57 unmapped = ka_iommu_unmap(domain, iova, size);
54 KA_WARN_ON(unmapped != size);58 KA_WARN_ON(unmapped != size);
55- ka_base_atomic_sub((int)unmapped, &monitor.map_count);59+ ka_base_atomic64_sub((long)unmapped, &monitor.map_count);
56}60}
57 61 
58-int vdavinci_iommu_map(ka_device_t *dev, unsigned long iova,62+int vdavinci_iommu_map(ka_device_t *dev, unsigned long iova, phys_addr_t paddr, size_t size, int prot)
59- phys_addr_t paddr, size_t size, int prot)
60{63{
61 int ret = 0;64 int ret = 0;
62 ka_iommu_domain_t *domain = ka_pci_iommu_get_domain_for_dev(dev);65 ka_iommu_domain_t *domain = ka_pci_iommu_get_domain_for_dev(dev);
63 66 
67+ if (domain == NULL) {
68+ vascend_err(dev, "iommu domain is null\n");
69+ return -ENODEV;
70+ }
64 ret = ka_iommu_map(domain, iova, paddr, size, prot, KA_GFP_KERNEL);71 ret = ka_iommu_map(domain, iova, paddr, size, prot, KA_GFP_KERNEL);
65 if (ret == 0 && !ka_is_dev_dma_coherent(dev)) {72 if (ret == 0 && !ka_is_dev_dma_coherent(dev)) {
66 ka_mm_dma_sync_single_for_device(dev, iova, size, KA_DMA_BIDIRECTIONAL);73 ka_mm_dma_sync_single_for_device(dev, iova, size, KA_DMA_BIDIRECTIONAL);
67 }74 }
68 if (ret == 0) {75 if (ret == 0) {
69- ka_base_atomic_add((int)size, &monitor.map_count);76+ ka_base_atomic64_add((long)size, &monitor.map_count);
70 }77 }
71 return ret;78 return ret;
72}79}
73 80 
74-STATIC int vdavinci_pin_vpmem_pages(struct hw_vdavinci *vdavinci,81+STATIC int vdavinci_pin_vpmem_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info)
75- ka_pin_info *pin_info)
76{82{
77 unsigned long pfn = 0;83 unsigned long pfn = 0;
78 int i = 0;84 int i = 0;
@@ -86,8 +92,7 @@ STATIC int vdavinci_pin_vpmem_pages(struct hw_vdavinci *vdavinci,
86 for (i = 0; i < pin_info->npage; i++) {92 for (i = 0; i < pin_info->npage; i++) {
87 pfn = hw_dvt_hypervisor_gfn_to_mfn(vdavinci, pin_info->gfn + i);93 pfn = hw_dvt_hypervisor_gfn_to_mfn(vdavinci, pin_info->gfn + i);
88 if (pfn == KVMDT_ERROR_PFN) {94 if (pfn == KVMDT_ERROR_PFN) {
89- vascend_err(vdavinci_to_dev(vdavinci), "error pfn: 0x%lx, gfn: 0x%lx\n",95+ vascend_err(vdavinci_to_dev(vdavinci), "error pfn: 0x%lx, gfn: 0x%lx\n", pfn, pin_info->gfn + i);
90- pfn, pin_info->gfn + i);
91 return -EFAULT;96 return -EFAULT;
92 }97 }
93 pin_info->pages[i] = ka_mm_pfn_to_page(pfn);98 pin_info->pages[i] = ka_mm_pfn_to_page(pfn);
@@ -96,8 +101,7 @@ STATIC int vdavinci_pin_vpmem_pages(struct hw_vdavinci *vdavinci,
96 return pin_info->npage;101 return pin_info->npage;
97}102}
98 103 
99-STATIC void vdavinci_unpin_vpmem_pages(struct hw_vdavinci *vdavinci,104+STATIC void vdavinci_unpin_vpmem_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info)
100- ka_pin_info *pin_info)
101{105{
102 int i = 0;106 int i = 0;
103 107 
@@ -109,8 +113,7 @@ STATIC void vdavinci_unpin_vpmem_pages(struct hw_vdavinci *vdavinci,
109 }113 }
110}114}
111 115 
112-STATIC int vdavinci_pin_hva_pages(struct hw_vdavinci *vdavinci,116+STATIC int vdavinci_pin_hva_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info)
113- ka_pin_info *pin_info)
114{117{
115 int pins = -EFAULT;118 int pins = -EFAULT;
116#if IS_VDAVINCI_PIN_HVA_SUPPORT119#if IS_VDAVINCI_PIN_HVA_SUPPORT
@@ -126,8 +129,7 @@ STATIC int vdavinci_pin_hva_pages(struct hw_vdavinci *vdavinci,
126 }129 }
127 hva = kvmdt_gfn_to_hva(vdavinci->handle, pin_info->gfn);130 hva = kvmdt_gfn_to_hva(vdavinci->handle, pin_info->gfn);
128 if (hva == KVMDT_ERROR_PFN) {131 if (hva == KVMDT_ERROR_PFN) {
129- vascend_err(vdavinci_to_dev(vdavinci), "error hva: 0x%lx, gfn: 0x%lx\n",132+ vascend_err(vdavinci_to_dev(vdavinci), "error hva: 0x%lx, gfn: 0x%lx\n", hva, pin_info->gfn);
130- hva, pin_info->gfn);
131 return -EFAULT;133 return -EFAULT;
132 }134 }
133 mm = vdavinci->mm;135 mm = vdavinci->mm;
@@ -135,8 +137,7 @@ STATIC int vdavinci_pin_hva_pages(struct hw_vdavinci *vdavinci,
135 return -ENODEV;137 return -ENODEV;
136 }138 }
137 ka_mm_mmap_read_lock(mm);139 ka_mm_mmap_read_lock(mm);
138- pins = ka_mm_pin_user_pages_remote(vdavinci->qemu_task, mm, hva, pin_info->npage,140+ pins = ka_mm_pin_user_pages_remote(vdavinci->qemu_task, mm, hva, pin_info->npage, KA_FOLL_WRITE | KA_FOLL_LONGTERM,
139- KA_FOLL_WRITE | KA_FOLL_LONGTERM,
140 pin_info->pages, NULL);141 pin_info->pages, NULL);
141 ka_mm_mmap_read_unlock(mm);142 ka_mm_mmap_read_unlock(mm);
142 ka_mm_mmput(mm);143 ka_mm_mmput(mm);
@@ -144,8 +145,7 @@ STATIC int vdavinci_pin_hva_pages(struct hw_vdavinci *vdavinci,
144 return pins;145 return pins;
145 }146 }
146 if (pins != pin_info->npage) {147 if (pins != pin_info->npage) {
147- vascend_err(vdavinci_to_dev(vdavinci), "pin partial fail: total=%d, success=%d\n",148+ vascend_err(vdavinci_to_dev(vdavinci), "pin partial fail: total=%d, success=%d\n", pin_info->npage, pins);
148- pin_info->npage, pins);
149 for (i = 0; i < pins; i++) {149 for (i = 0; i < pins; i++) {
150 ka_mm_unpin_user_page(pin_info->pages[i]);150 ka_mm_unpin_user_page(pin_info->pages[i]);
151 }151 }
@@ -155,8 +155,7 @@ STATIC int vdavinci_pin_hva_pages(struct hw_vdavinci *vdavinci,
155 return pins;155 return pins;
156}156}
157 157 
158-STATIC void vdavinci_unpin_hva_pages(struct hw_vdavinci *vdavinci,158+STATIC void vdavinci_unpin_hva_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info)
159- ka_pin_info *pin_info)
160{159{
161#if IS_VDAVINCI_PIN_HVA_SUPPORT160#if IS_VDAVINCI_PIN_HVA_SUPPORT
162 int i;161 int i;
@@ -193,7 +192,7 @@ void vdavinci_unpin_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info)
193 } else {192 } else {
194 ka_vfio_unpin_pages(vdavinci->vdev.vfio_device, pin_info);193 ka_vfio_unpin_pages(vdavinci->vdev.vfio_device, pin_info);
195 }194 }
196- ka_base_atomic_sub(pin_info->npage, &monitor.pin_count);195+ ka_base_atomic64_sub(pin_info->npage, &monitor.pin_count);
197}196}
198 197 
199int vdavinci_pin_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info)198int vdavinci_pin_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info)
@@ -211,7 +210,7 @@ int vdavinci_pin_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info)
211 ret = ka_vfio_pin_pages(vdavinci->vdev.vfio_device, pin_info);210 ret = ka_vfio_pin_pages(vdavinci->vdev.vfio_device, pin_info);
212 }211 }
213 if (ret > 0) {212 if (ret > 0) {
214- ka_base_atomic_add(ret, &monitor.pin_count);213+ ka_base_atomic64_add(ret, &monitor.pin_count);
215 }214 }
216 return ret;215 return ret;
217}216}
@@ -256,9 +255,7 @@ STATIC void vdavinci_clean_type_ops(ka_dvt_dev *dvt)
256 dvt->type_ops = NULL;255 dvt->type_ops = NULL;
257}256}
258 257 
259-int vdavinci_register_device(ka_device_t *dev,258+int vdavinci_register_device(ka_device_t *dev, ka_dvt_dev *dvt, const char *name)
260- ka_dvt_dev *dvt,
261- const char *name)
262{259{
263 int ret = 0;260 int ret = 0;
264 261 
@@ -338,6 +335,7 @@ int vdavinci_group_notify(void *data, void *group_data)
338 vm_dom = vm_dom_info_get(vdavinci->vdev.kvm);335 vm_dom = vm_dom_info_get(vdavinci->vdev.kvm);
339 if (vm_dom == NULL) {336 if (vm_dom == NULL) {
340 vascend_err(vdavinci_to_dev(vdavinci), "vnpu init domain failed.\n");337 vascend_err(vdavinci_to_dev(vdavinci), "vnpu init domain failed.\n");
338+ return KA_NOTIFY_BAD;
341 }339 }
342 vdavinci->vdev.domain = vm_dom;340 vdavinci->vdev.domain = vm_dom;
343 }341 }
@@ -365,8 +363,10 @@ int vdavinci_register_vfio_group(struct hw_vdavinci *vdavinci)
365 vdavinci->vdev.domain = NULL;363 vdavinci->vdev.domain = NULL;
366 ret = ka_vdev_register_vfio_group(&vdavinci->vdev);364 ret = ka_vdev_register_vfio_group(&vdavinci->vdev);
367 if (ret != 0) {365 if (ret != 0) {
368- vascend_err(vdavinci_to_dev(vdavinci), "vfio register iommu notifier failed, "366+ vascend_err(vdavinci_to_dev(vdavinci),
369- "vid: %u, ret: %d\n", vdavinci->id, ret);367+ "vfio register iommu notifier failed, "
368+ "vid: %u, ret: %d\n",
369+ vdavinci->id, ret);
370 return ret;370 return ret;
371 }371 }
372 if (vdavinci->vdev.domain != NULL) {372 if (vdavinci->vdev.domain != NULL) {
@@ -381,7 +381,7 @@ int vdavinci_register_vfio_group(struct hw_vdavinci *vdavinci)
381 vascend_err(vdavinci_to_dev(vdavinci), "get vm's domain failed\n");381 vascend_err(vdavinci_to_dev(vdavinci), "get vm's domain failed\n");
382 return -EINVAL;382 return -EINVAL;
383 }383 }
384- 384+ 
385 return 0;385 return 0;
386}386}
387 387 
@@ -433,10 +433,9 @@ int vdavinci_get_vfio_device(struct hw_vdavinci *vdavinci)
433 return 0;433 return 0;
434}434}
435 435 
436-int vdavinci_rw_gpa(struct kvmdt_guest_info *info, unsigned long gpa,436+int vdavinci_rw_gpa(struct kvmdt_guest_info *info, unsigned long gpa, void *buf, unsigned long len, bool write)
437- void *buf, unsigned long len, bool write)
438{437{
439- ka_vfio_gpa info_gpa = { 0 };438+ ka_vfio_gpa info_gpa = {0};
440 439 
441 info_gpa.kvm = info->kvm;440 info_gpa.kvm = info->kvm;
442 info_gpa.group = info->vdavinci->vdev.vfio_group;441 info_gpa.group = info->vdavinci->vdev.vfio_group;
@@ -445,8 +444,7 @@ int vdavinci_rw_gpa(struct kvmdt_guest_info *info, unsigned long gpa,
445 return ka_vfio_rw_gpa(&info_gpa, gpa, buf, len, write);444 return ka_vfio_rw_gpa(&info_gpa, gpa, buf, len, write);
446}445}
447 446 
448-ka_dentry_t *vdavinci_debugfs_create_dir(const char *name,447+ka_dentry_t *vdavinci_debugfs_create_dir(const char *name, ka_dentry_t *parent)
449- ka_dentry_t *parent)
450{448{
451 ka_dentry_t *node = NULL;449 ka_dentry_t *node = NULL;
452 450 
@@ -468,16 +466,15 @@ void vdavinci_debugfs_remove(ka_dentry_t *dentry)
468 466 
469void vdavinci_check(struct hw_vdavinci *vdavinci)467void vdavinci_check(struct hw_vdavinci *vdavinci)
470{468{
471- int pin_count = ka_base_atomic_read(&monitor.pin_count);469+ long pin_count = ka_base_atomic64_read(&monitor.pin_count);
472- int map_count = ka_base_atomic_read(&monitor.map_count);470+ long map_count = ka_base_atomic64_read(&monitor.map_count);
473 471 
474- ka_base_atomic_set(&monitor.pin_count, 0);472+ ka_base_atomic64_set(&monitor.pin_count, 0);
475- ka_base_atomic_set(&monitor.map_count, 0);473+ ka_base_atomic64_set(&monitor.map_count, 0);
476 if (pin_count == 0 && map_count == 0) {474 if (pin_count == 0 && map_count == 0) {
477 return;475 return;
478 }476 }
479- vascend_warn(vdavinci_to_dev(vdavinci), "check warning: pin count: %d, map count: %d\n",477+ vascend_warn(vdavinci_to_dev(vdavinci), "check warning: pin count: %ld, map count: %ld\n", pin_count, map_count);
480- pin_count, map_count);
481}478}
482 479 
483bool vdavinci_pfn_is_vpmem(unsigned long pfn)480bool vdavinci_pfn_is_vpmem(unsigned long pfn)
@@ -19,20 +19,15 @@
19#include "ka_memory_pub.h"19#include "ka_memory_pub.h"
20 20 
21void vdavinci_iommu_unmap(ka_device_t *dev, unsigned long iova, size_t size);21void vdavinci_iommu_unmap(ka_device_t *dev, unsigned long iova, size_t size);
22-int vdavinci_iommu_map(ka_device_t *dev, unsigned long iova,22+int vdavinci_iommu_map(ka_device_t *dev, unsigned long iova, phys_addr_t paddr, size_t size, int prot);
23- phys_addr_t paddr, size_t size, int prot);
24void vdavinci_unpin_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info);23void vdavinci_unpin_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info);
25int vdavinci_pin_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info);24int vdavinci_pin_pages(struct hw_vdavinci *vdavinci, ka_pin_info *pin_info);
26-int vdavinci_register_device(ka_device_t *dev,25+int vdavinci_register_device(ka_device_t *dev, ka_dvt_dev *dvt, const char *name);
27- ka_dvt_dev *dvt,
28- const char *name);
29void vdavinci_unregister_device(ka_device_t *dev, ka_dvt_dev *dvt);26void vdavinci_unregister_device(ka_device_t *dev, ka_dvt_dev *dvt);
30int vdavinci_register_vfio_group(struct hw_vdavinci *vdavinci);27int vdavinci_register_vfio_group(struct hw_vdavinci *vdavinci);
31void vdavinci_unregister_vfio_group(struct hw_vdavinci *vdavinci);28void vdavinci_unregister_vfio_group(struct hw_vdavinci *vdavinci);
32-int vdavinci_rw_gpa(struct kvmdt_guest_info *info, unsigned long gpa,29+int vdavinci_rw_gpa(struct kvmdt_guest_info *info, unsigned long gpa, void *buf, unsigned long len, bool write);
33- void *buf, unsigned long len, bool write);30+ka_dentry_t *vdavinci_debugfs_create_dir(const char *name, ka_dentry_t *parent);
34-ka_dentry_t *vdavinci_debugfs_create_dir(const char *name,
35- ka_dentry_t *parent);
36void vdavinci_debugfs_remove(ka_dentry_t *dentry);31void vdavinci_debugfs_remove(ka_dentry_t *dentry);
37void vdavinci_put_vfio_device(struct hw_vdavinci *vdavinci);32void vdavinci_put_vfio_device(struct hw_vdavinci *vdavinci);
38int vdavinci_get_vfio_device(struct hw_vdavinci *vdavinci);33int vdavinci_get_vfio_device(struct hw_vdavinci *vdavinci);