已合并
【fix】: 删除AscirRegister当前不使用的成员函数 #1053
liyuewei创建于 6月25日
【fix】: 删除AscirRegister当前不使用的成员函数 #1053
已合并
共 5 个文件变更+2-51
| @@ -138,7 +138,6 @@ REG_ASC_IR(Store) | |||
| 138 | REG_ASC_IR(Broadcast) | 138 | REG_ASC_IR(Broadcast) |
| 139 | .Input("x", "T") | 139 | .Input("x", "T") |
| 140 | .Output("y", "T") | 140 | .Output("y", "T") |
| 141 | - .CalcTmpBufSize("CalcBroadCastTmpSize") | ||
| 142 | .ComputeType(ComputeType::kComputeBroadcast) | 141 | .ComputeType(ComputeType::kComputeBroadcast) |
| 143 | .Impl(v1_soc_versions, {af::ascir::AscIrImplCreator<af::ascir::BroadcastAscIrAttImpl>(), | 142 | .Impl(v1_soc_versions, {af::ascir::AscIrImplCreator<af::ascir::BroadcastAscIrAttImpl>(), |
| 144 | af::ascir::AscIrImplCreator<af::ascir::BroadcastAscIrCodegenImpl>(), | 143 | af::ascir::AscIrImplCreator<af::ascir::BroadcastAscIrCodegenImpl>(), |
| @@ -157,7 +156,6 @@ REG_ASC_IR(RemovePad) | |||
| 157 | REG_ASC_IR(Pad) | 156 | REG_ASC_IR(Pad) |
| 158 | .Input("x", "T") | 157 | .Input("x", "T") |
| 159 | .Output("y", "T") | 158 | .Output("y", "T") |
| 160 | - .CalcTmpBufSize("CalcPadTmpSize") | ||
| 161 | .ComputeType(ComputeType::kComputeElewise) | 159 | .ComputeType(ComputeType::kComputeElewise) |
| 162 | .Impl(v1_soc_versions, {af::ascir::AscIrImplCreator<af::ascir::PadAscIrAttImpl>(), | 160 | .Impl(v1_soc_versions, {af::ascir::AscIrImplCreator<af::ascir::PadAscIrAttImpl>(), |
| 163 | af::ascir::AscIrImplCreator<af::ascir::PadAscIrCodegenImpl>(), | 161 | af::ascir::AscIrImplCreator<af::ascir::PadAscIrCodegenImpl>(), |
| @@ -675,7 +673,6 @@ REG_ASC_IR(Gather) | |||
| 675 | REG_ASC_IR(Transpose) | 673 | REG_ASC_IR(Transpose) |
| 676 | .Input("x", "T") | 674 | .Input("x", "T") |
| 677 | .Output("y", "T") | 675 | .Output("y", "T") |
| 678 | - .ApiTilingDataType("ConfusionTransposeTiling") | ||
| 679 | .ComputeType(ComputeType::kComputeTranspose) | 676 | .ComputeType(ComputeType::kComputeTranspose) |
| 680 | .Impl(v1_soc_versions, {af::ascir::AscIrImplCreator<af::ascir::TransposeAscIrAttImpl>(), | 677 | .Impl(v1_soc_versions, {af::ascir::AscIrImplCreator<af::ascir::TransposeAscIrAttImpl>(), |
| 681 | af::ascir::AscIrImplCreator<af::ascir::TransposeAscIrCodegenImpl>(), | 678 | af::ascir::AscIrImplCreator<af::ascir::TransposeAscIrCodegenImpl>(), |
| @@ -853,8 +850,6 @@ REG_ASC_IR(Conv2D) | |||
| 853 | .Input("x", "T1") | 850 | .Input("x", "T1") |
| 854 | .Input("filter", "T1") | 851 | .Input("filter", "T1") |
| 855 | .Output("y", "T2") | 852 | .Output("y", "T2") |
| 856 | - .DataType("T1", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 857 | - .DataType("T2", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 858 | .Attr<std::vector<int64_t>>("strides") | 853 | .Attr<std::vector<int64_t>>("strides") |
| 859 | .Attr<std::vector<int64_t>>("pads") | 854 | .Attr<std::vector<int64_t>>("pads") |
| 860 | .Attr<std::vector<int64_t>>("dilations") | 855 | .Attr<std::vector<int64_t>>("dilations") |
| @@ -875,8 +870,6 @@ REG_ASC_IR(Conv2DBias) | |||
| 875 | .Input("filter", "T1") | 870 | .Input("filter", "T1") |
| 876 | .Input("bias", "T2") | 871 | .Input("bias", "T2") |
| 877 | .Output("y", "T2") | 872 | .Output("y", "T2") |
| 878 | - .DataType("T1", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 879 | - .DataType("T2", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 880 | .Attr<std::vector<int64_t>>("strides") | 873 | .Attr<std::vector<int64_t>>("strides") |
| 881 | .Attr<std::vector<int64_t>>("pads") | 874 | .Attr<std::vector<int64_t>>("pads") |
| 882 | .Attr<std::vector<int64_t>>("dilations") | 875 | .Attr<std::vector<int64_t>>("dilations") |
| @@ -897,9 +890,6 @@ REG_ASC_IR(Conv2DOffset) | |||
| 897 | .Input("filter", "T1") | 890 | .Input("filter", "T1") |
| 898 | .Input("offset_w", "T3") | 891 | .Input("offset_w", "T3") |
| 899 | .Output("y", "T2") | 892 | .Output("y", "T2") |
| 900 | - .DataType("T1", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 901 | - .DataType("T2", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 902 | - .DataType("T3", TensorType{DT_INT8}) | ||
| 903 | .Attr<std::vector<int64_t>>("strides") | 893 | .Attr<std::vector<int64_t>>("strides") |
| 904 | .Attr<std::vector<int64_t>>("pads") | 894 | .Attr<std::vector<int64_t>>("pads") |
| 905 | .Attr<std::vector<int64_t>>("dilations") | 895 | .Attr<std::vector<int64_t>>("dilations") |
| @@ -922,9 +912,6 @@ REG_ASC_IR(Conv2DOffsetBias) | |||
| 922 | .Input("bias", "T2") | 912 | .Input("bias", "T2") |
| 923 | .Input("offset_w", "T3") | 913 | .Input("offset_w", "T3") |
| 924 | .Output("y", "T2") | 914 | .Output("y", "T2") |
| 925 | - .DataType("T1", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 926 | - .DataType("T2", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 927 | - .DataType("T3", TensorType{DT_INT8}) | ||
| 928 | .Attr<std::vector<int64_t>>("strides") | 915 | .Attr<std::vector<int64_t>>("strides") |
| 929 | .Attr<std::vector<int64_t>>("pads") | 916 | .Attr<std::vector<int64_t>>("pads") |
| 930 | .Attr<std::vector<int64_t>>("dilations") | 917 | .Attr<std::vector<int64_t>>("dilations") |
| @@ -89,10 +89,6 @@ AscirRegister &AscirRegister::Output(const char_t *output_name, const char_t *da | |||
| 89 | ir_def_.MutableDataTypeSymbolStore().SetOutputSymbol(output_name, kIrOutputRequired, datatype_symbol); | 89 | ir_def_.MutableDataTypeSymbolStore().SetOutputSymbol(output_name, kIrOutputRequired, datatype_symbol); |
| 90 | return *this; | 90 | return *this; |
| 91 | } | 91 | } |
| 92 | -AscirRegister &AscirRegister::DataType(const char_t *datatype_symbol, const TensorType &type_range) { | ||
| 93 | - ir_def_.MutableDataTypeSymbolStore().DeclareSymbol(datatype_symbol, type_range); | ||
| 94 | - return *this; | ||
| 95 | -} | ||
| 96 | 92 | ||
| 97 | AscirRegister &AscirRegister::DynamicInput(const char_t *input_name, const char_t *datatype_symbol) { | 93 | AscirRegister &AscirRegister::DynamicInput(const char_t *input_name, const char_t *datatype_symbol) { |
| 98 | ir_def_.AppendInput(input_name, IrInputType::kIrInputDynamic); | 94 | ir_def_.AppendInput(input_name, IrInputType::kIrInputDynamic); |
| @@ -108,25 +104,11 @@ AscirRegister &AscirRegister::DynamicOutput(const char_t *output_name, const cha | |||
| 108 | return *this; | 104 | return *this; |
| 109 | } | 105 | } |
| 110 | 106 | ||
| 111 | -AscirRegister &AscirRegister::DataType(const char_t *datatype_symbol, const OrderedTensorTypeList &type_range) { | ||
| 112 | - ir_def_.MutableDataTypeSymbolStore().DeclareSymbol(datatype_symbol, type_range); | ||
| 113 | - return *this; | ||
| 114 | -} | ||
| 115 | - | ||
| 116 | -AscirRegister &AscirRegister::CalcTmpBufSize(const std::string &calc_tmp_buf_size_func) { | ||
| 117 | - ir_def_.SetCalcTmpBufSizeFunc(calc_tmp_buf_size_func, CalcTmpBufSizeFuncType::CustomizeType); | ||
| 118 | - return *this; | ||
| 119 | -} | ||
| 120 | AscirRegister &AscirRegister::SameTmpBufSizeFromFirstInput() { | 107 | AscirRegister &AscirRegister::SameTmpBufSizeFromFirstInput() { |
| 121 | ir_def_.SetCalcTmpBufSizeFunc("SameTmpBufSizeWithFirstInput", CalcTmpBufSizeFuncType::CommonType); | 108 | ir_def_.SetCalcTmpBufSizeFunc("SameTmpBufSizeWithFirstInput", CalcTmpBufSizeFuncType::CommonType); |
| 122 | return *this; | 109 | return *this; |
| 123 | } | 110 | } |
| 124 | 111 | ||
| 125 | -AscirRegister &AscirRegister::ApiTilingDataType(const std::string &tiling_data_name) { | ||
| 126 | - ir_def_.SetApiTilingDataName(tiling_data_name); | ||
| 127 | - return *this; | ||
| 128 | -} | ||
| 129 | - | ||
| 130 | AscirRegister &AscirRegister::Impl(const std::vector<std::string> &soc_version, const AscIrImpl &impl) { | 112 | AscirRegister &AscirRegister::Impl(const std::vector<std::string> &soc_version, const AscIrImpl &impl) { |
| 131 | ir_def_.AddSocImpl(soc_version, impl); | 113 | ir_def_.AddSocImpl(soc_version, impl); |
| 132 | return *this; | 114 | return *this; |
| @@ -28,8 +28,6 @@ class AscirRegister { | |||
| 28 | AscirRegister(const char *type, const char *def_file_path, int64_t line); | 28 | AscirRegister(const char *type, const char *def_file_path, int64_t line); |
| 29 | AscirRegister &Inputs(std::vector<ge::AscendString> &&input_names); | 29 | AscirRegister &Inputs(std::vector<ge::AscendString> &&input_names); |
| 30 | AscirRegister &Input(const char_t *input_name, const char_t *datatype_symbol); | 30 | AscirRegister &Input(const char_t *input_name, const char_t *datatype_symbol); |
| 31 | - AscirRegister &DataType(const char_t *datatype_symbol, const TensorType &type_range); | ||
| 32 | - AscirRegister &DataType(const char_t *datatype_symbol, const OrderedTensorTypeList &type_range); | ||
| 33 | AscirRegister &DynamicInput(const std::string &input_name); | 31 | AscirRegister &DynamicInput(const std::string &input_name); |
| 34 | AscirRegister &DynamicInput(const char_t *input_name, const char_t *datatype_symbol); | 32 | AscirRegister &DynamicInput(const char_t *input_name, const char_t *datatype_symbol); |
| 35 | AscirRegister &OptionalInput(const std::string &input_name); | 33 | AscirRegister &OptionalInput(const std::string &input_name); |
| @@ -68,11 +66,8 @@ class AscirRegister { | |||
| 68 | AscirRegister(AscirRegister &&) noexcept = delete; | 66 | AscirRegister(AscirRegister &&) noexcept = delete; |
| 69 | AscirRegister &operator=(AscirRegister &&) noexcept = delete; | 67 | AscirRegister &operator=(AscirRegister &&) noexcept = delete; |
| 70 | 68 | ||
| 71 | - AscirRegister &CalcTmpBufSize(const std::string &calc_tmp_buf_size_func); | ||
| 72 | AscirRegister &SameTmpBufSizeFromFirstInput(); | 69 | AscirRegister &SameTmpBufSizeFromFirstInput(); |
| 73 | 70 | ||
| 74 | - AscirRegister &ApiTilingDataType(const std::string &tiling_data_name); | ||
| 75 | - | ||
| 76 | AscirRegister &Impl(const std::vector<std::string> &soc_version, const AscIrImpl &impl); | 71 | AscirRegister &Impl(const std::vector<std::string> &soc_version, const AscIrImpl &impl); |
| 77 | 72 | ||
| 78 | AscirRegister &Impl(const std::vector<std::string> &soc_version, const AscIrImplV2 &impl); | 73 | AscirRegister &Impl(const std::vector<std::string> &soc_version, const AscIrImplV2 &impl); |
| @@ -90,9 +85,6 @@ class AscirRegister { | |||
| 90 | #define REG_ASC_IR_START_NODE(type) REG_ASC_IR(type).Inputs({}).Outputs({"y"}).StartNode() | 85 | #define REG_ASC_IR_START_NODE(type) REG_ASC_IR(type).Inputs({}).Outputs({"y"}).StartNode() |
| 91 | #define REG_ASC_IR_START_NODE_WITH_ATTR(type) \ | 86 | #define REG_ASC_IR_START_NODE_WITH_ATTR(type) \ |
| 92 | REG_ASC_IR(type).Inputs({}).Outputs({"y"}).Attr<int64_t>("index").StartNode() | 87 | REG_ASC_IR(type).Inputs({}).Outputs({"y"}).Attr<int64_t>("index").StartNode() |
| 93 | -#define REG_ASC_IR_1IO(type) REG_ASC_IR(type).Input("x", "T").Output("y", "T").DataType("T", TensorType::ALL()) | ||
| 94 | -#define REG_ASC_IR_2I1O(type) \ | ||
| 95 | - REG_ASC_IR(type).Input("x1", "T").Input("x2", "T").Output("y", "T").DataType("T", TensorType::ALL()) | ||
| 96 | 88 | ||
| 97 | #define EXPAND_CHAIN_CALL(...) #__VA_ARGS__ | 89 | #define EXPAND_CHAIN_CALL(...) #__VA_ARGS__ |
| 98 | #define REG_ASC_IR_WITH_COMMENT(type, ...) \ | 90 | #define REG_ASC_IR_WITH_COMMENT(type, ...) \ |
| @@ -25,7 +25,7 @@ using namespace codegen; | |||
| 25 | using namespace af::ascir_op; | 25 | using namespace af::ascir_op; |
| 26 | using namespace testing; | 26 | using namespace testing; |
| 27 | using namespace codegen; | 27 | using namespace codegen; |
| 28 | -namespace ge { | 28 | +namespace af { |
| 29 | namespace ascir { | 29 | namespace ascir { |
| 30 | extern std::vector<std::unique_ptr<af::TmpBufDesc>> CalcPadTmpSize(const af::AscNode &node); | 30 | extern std::vector<std::unique_ptr<af::TmpBufDesc>> CalcPadTmpSize(const af::AscNode &node); |
| 31 | 31 | ||
| @@ -246,4 +246,4 @@ TEST(PadApiCallTest, PadApiCall_1) { | |||
| 246 | "KernelUtils::BlkAlign<float>(z1_actual_size * z0_actual_size * z2_actual_size));\n}\n"}); | 246 | "KernelUtils::BlkAlign<float>(z1_actual_size * z0_actual_size * z2_actual_size));\n}\n"}); |
| 247 | } | 247 | } |
| 248 | } // namespace ascir | 248 | } // namespace ascir |
| 249 | -} // namespace ge | 249 | +} // namespace af |
| @@ -901,8 +901,6 @@ REG_ASC_IR(Conv2D) | |||
| 901 | .Input("x", "T1") | 901 | .Input("x", "T1") |
| 902 | .Input("filter", "T1") | 902 | .Input("filter", "T1") |
| 903 | .Output("y", "T2") | 903 | .Output("y", "T2") |
| 904 | - .DataType("T1", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 905 | - .DataType("T2", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 906 | .Attr<std::vector<int64_t>>("strides") | 904 | .Attr<std::vector<int64_t>>("strides") |
| 907 | .Attr<std::vector<int64_t>>("pads") | 905 | .Attr<std::vector<int64_t>>("pads") |
| 908 | .Attr<std::vector<int64_t>>("dilations") | 906 | .Attr<std::vector<int64_t>>("dilations") |
| @@ -923,8 +921,6 @@ REG_ASC_IR(Conv2DBias) | |||
| 923 | .Input("filter", "T1") | 921 | .Input("filter", "T1") |
| 924 | .Input("bias", "T2") | 922 | .Input("bias", "T2") |
| 925 | .Output("y", "T2") | 923 | .Output("y", "T2") |
| 926 | - .DataType("T1", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 927 | - .DataType("T2", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 928 | .Attr<std::vector<int64_t>>("strides") | 924 | .Attr<std::vector<int64_t>>("strides") |
| 929 | .Attr<std::vector<int64_t>>("pads") | 925 | .Attr<std::vector<int64_t>>("pads") |
| 930 | .Attr<std::vector<int64_t>>("dilations") | 926 | .Attr<std::vector<int64_t>>("dilations") |
| @@ -945,9 +941,6 @@ REG_ASC_IR(Conv2DOffset) | |||
| 945 | .Input("filter", "T1") | 941 | .Input("filter", "T1") |
| 946 | .Input("offset_w", "T3") | 942 | .Input("offset_w", "T3") |
| 947 | .Output("y", "T2") | 943 | .Output("y", "T2") |
| 948 | - .DataType("T1", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 949 | - .DataType("T2", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 950 | - .DataType("T3", TensorType{DT_INT8}) | ||
| 951 | .Attr<std::vector<int64_t>>("strides") | 944 | .Attr<std::vector<int64_t>>("strides") |
| 952 | .Attr<std::vector<int64_t>>("pads") | 945 | .Attr<std::vector<int64_t>>("pads") |
| 953 | .Attr<std::vector<int64_t>>("dilations") | 946 | .Attr<std::vector<int64_t>>("dilations") |
| @@ -970,9 +963,6 @@ REG_ASC_IR(Conv2DOffsetBias) | |||
| 970 | .Input("bias", "T2") | 963 | .Input("bias", "T2") |
| 971 | .Input("offset_w", "T3") | 964 | .Input("offset_w", "T3") |
| 972 | .Output("y", "T2") | 965 | .Output("y", "T2") |
| 973 | - .DataType("T1", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 974 | - .DataType("T2", TensorType{DT_FLOAT16, DT_FLOAT, DT_BF16, DT_HIFLOAT8}) | ||
| 975 | - .DataType("T3", TensorType{DT_INT8}) | ||
| 976 | .Attr<std::vector<int64_t>>("strides") | 966 | .Attr<std::vector<int64_t>>("strides") |
| 977 | .Attr<std::vector<int64_t>>("pads") | 967 | .Attr<std::vector<int64_t>>("pads") |
| 978 | .Attr<std::vector<int64_t>>("dilations") | 968 | .Attr<std::vector<int64_t>>("dilations") |