已合并
add common ops #78
每天都要吃馒头创建于 2月13日
add common ops #78
已合并
共 34 个文件变更+1000-92
| @@ -0,0 +1,55 @@ | |||
| 1 | +# asc.language.basic.check_local_memory_ia | ||
| 2 | + | ||
| 3 | +### asc.language.basic.check_local_memory_ia(check_params: CheckLocalMemoryIAParam) | ||
| 4 | + | ||
| 5 | +Check设定范围内的UB读写行为,如果有设定范围的读写行为则会出现EXCEPTION报错,无设定范围的读写行为则不会报错。 | ||
| 6 | + | ||
| 7 | +**对应的Ascend C函数原型** | ||
| 8 | + | ||
| 9 | +```c++ | ||
| 10 | +__aicore__ inline void CheckLocalMemoryIA(const CheckLocalMemoryIAParam& checkParams) | ||
| 11 | +``` | ||
| 12 | + | ||
| 13 | +**参数说明** | ||
| 14 | + | ||
| 15 | +- check_params:用于配置对UB访问的检查行为,类型为CheckLocalMemoryIAParam。 | ||
| 16 | + - enable_bit:配置的异常寄存器,取值范围:enable_bit∈[0,3],默认为0。 | ||
| 17 | + - 0:异常寄存器0。 | ||
| 18 | + - 1:异常寄存器1。 | ||
| 19 | + - 2:异常寄存器2。 | ||
| 20 | + - 3:异常寄存器3。 | ||
| 21 | + - start_addr:Check的起始地址,32B对齐,取值范围:start_addr∈[0, 65535],默认值为0。比如,可通过LocalTensor.get_phy_addr()/32来获取start_addr。 | ||
| 22 | + - end_addr:Check的结束地址,32B对齐,取值范围:end_addr∈[0, 65535]。默认值为0。 | ||
| 23 | + - is_scalar_read:Check标量读访问。 | ||
| 24 | + - false:不开启,默认为false。 | ||
| 25 | + - true:开启。 | ||
| 26 | + - is_scalar_write: Check标量写访问。 | ||
| 27 | + - false:不开启,默认为false。 | ||
| 28 | + - true:开启。 | ||
| 29 | + - is_vector_read: Check矢量读访问。 | ||
| 30 | + - false:不开启,默认为false。 | ||
| 31 | + - true:开启。 | ||
| 32 | + - is_vector_write: Check矢量写访问。 | ||
| 33 | + - false:不开启,默认为false。 | ||
| 34 | + - true:开启。 | ||
| 35 | + - is_mte_read: Check MTE读访问。 | ||
| 36 | + - false:不开启,默认为false。 | ||
| 37 | + - true:开启。 | ||
| 38 | + - is_mte_write: Check MTE写访问。 | ||
| 39 | + - false:不开启,默认为false。 | ||
| 40 | + - true:开启。 | ||
| 41 | + - is_enable: 是否使能enable_bit参数配置的异常寄存器。 | ||
| 42 | + - false:不使能,默认为false。 | ||
| 43 | + - true:使能。 | ||
| 44 | + | ||
| 45 | +**约束说明** | ||
| 46 | + | ||
| 47 | +- start_addr/end_addr的单位是32B,check的范围不包含start_addr,包含end_addr,即(start_addr, end_addr]。 | ||
| 48 | +- 每次调用完该接口需要进行复位(配置is_enable为False进行复位)。 | ||
| 49 | + | ||
| 50 | +**调用示例** | ||
| 51 | + | ||
| 52 | +```python | ||
| 53 | +params = asc.CheckLocalMemoryIAParam() | ||
| 54 | +asc.check_local_memory_ia(params) | ||
| 55 | +``` | ||
| @@ -1,8 +1,8 @@ | |||
| 1 | # asc.language.basic.gather_mask | 1 | # asc.language.basic.gather_mask |
| 2 | 2 | ||
| 3 | -### asc.language.basic.gather_mask(dst: [LocalTensor](../core.md#asc.language.core.LocalTensor), src0: [LocalTensor](../core.md#asc.language.core.LocalTensor), src1_pattern: [LocalTensor](../core.md#asc.language.core.LocalTensor), reduce_mode: bool, mask: int, params: GatherMaskParams, rsvd_cnt: int, gather_mask_mode=GatherMaskMode.DEFAULT) | 3 | +### asc.language.basic.gather_mask(dst: [LocalTensor](../core.md#asc.language.core.LocalTensor), src0: [LocalTensor](../core.md#asc.language.core.LocalTensor), src1_pattern: [LocalTensor](../core.md#asc.language.core.LocalTensor), reduce_mode: bool, mask: int, params: GatherMaskParams, gather_mask_mode=GatherMaskMode.DEFAULT) → int |
| 4 | 4 | ||
| 5 | -### asc.language.basic.gather_mask(dst: [LocalTensor](../core.md#asc.language.core.LocalTensor), src0: [LocalTensor](../core.md#asc.language.core.LocalTensor), src1_pattern: int, reduce_mode: bool, mask: int, params: GatherMaskParams, rsvd_cnt: int, gather_mask_mode=GatherMaskMode.DEFAULT) | 5 | +### asc.language.basic.gather_mask(dst: [LocalTensor](../core.md#asc.language.core.LocalTensor), src0: [LocalTensor](../core.md#asc.language.core.LocalTensor), src1_pattern: int, reduce_mode: bool, mask: int, params: GatherMaskParams, gather_mask_mode=GatherMaskMode.DEFAULT) → int |
| 6 | 6 | ||
| 7 | 以内置固定模式对应的二进制或者用户自定义输入的Tensor数值对应的二进制为gather mask(数据收集的掩码),从源操作数中选取元素写入目的操作数中。 | 7 | 以内置固定模式对应的二进制或者用户自定义输入的Tensor数值对应的二进制为gather mask(数据收集的掩码),从源操作数中选取元素写入目的操作数中。 |
| 8 | 8 | ||
| @@ -40,7 +40,7 @@ __aicore__ inline void GatherMask(const LocalTensor<T>& dst, const LocalTensor<T | |||
| 40 | 7:11111111…1111 # 每个repeat内取全部元素 | 40 | 7:11111111…1111 # 每个repeat内取全部元素 |
| 41 | - 用户自定义模式:src1_pattern数据类型为LocalTensor,迭代间间隔由src1_repeat_stride决定,迭代内src1_pattern连续消耗。 | 41 | - 用户自定义模式:src1_pattern数据类型为LocalTensor,迭代间间隔由src1_repeat_stride决定,迭代内src1_pattern连续消耗。 |
| 42 | - reduce_mode: 用于选择mask参数模式,数据类型为bool,支持如下取值: | 42 | - reduce_mode: 用于选择mask参数模式,数据类型为bool,支持如下取值: |
| 43 | - - False:Normal模式。该模式下,每次repeat操作256Bytes数据,总的数据计算量为repeat_times \* 256Bytes。mask参数无效,建议设置为0。按需配置repeat_times、src0BlockStride、src0_repeat_stride参数。支持src1_pattern配置为内置固定模式或用户自定义模式。用户自定义模式下可根据实际情况配置src1_repeat_stride。 | 43 | + - False:Normal模式。该模式下,每次repeat操作256Bytes数据,总的数据计算量为repeat_times \* 256Bytes。mask参数无效,建议设置为0。按需配置repeat_times、src0_block_stride、src0_repeat_stride参数。支持src1_pattern配置为内置固定模式或用户自定义模式。用户自定义模式下可根据实际情况配置src1_repeat_stride。 |
| 44 | - True:Counter模式。根据mask等参数含义的不同,该模式有以下两种配置方式: | 44 | - True:Counter模式。根据mask等参数含义的不同,该模式有以下两种配置方式: |
| 45 | 45 | ||
| 46 | 配置方式一:每次repeat操作mask个元素,总的数据计算量为repeat_times \* mask个元素。mask值配置为每一次repeat计算的元素个数。按需配置repeat_times、src0_block_stride、src0_repeat_stride参数。支持src1_pattern配置为内置固定模式或用户自定义模式。用户自定义模式下可根据实际情况配置src1_repeat_stride。 | 46 | 配置方式一:每次repeat操作mask个元素,总的数据计算量为repeat_times \* mask个元素。mask值配置为每一次repeat计算的元素个数。按需配置repeat_times、src0_block_stride、src0_repeat_stride参数。支持src1_pattern配置为内置固定模式或用户自定义模式。用户自定义模式下可根据实际情况配置src1_repeat_stride。 |
| @@ -54,7 +54,10 @@ __aicore__ inline void GatherMask(const LocalTensor<T>& dst, const LocalTensor<T | |||
| 54 | - src0_repeat_stride: 用于设置src0相邻迭代间的地址步长。 | 54 | - src0_repeat_stride: 用于设置src0相邻迭代间的地址步长。 |
| 55 | - src1_repeat_stride: 用于设置src1相邻迭代间的地址步长。 | 55 | - src1_repeat_stride: 用于设置src1相邻迭代间的地址步长。 |
| 56 | - mode: 模板参数,用于指定gather_mask的模式,当前仅支持默认模式GatherMaskMode.DEFAULT,为后续功能做预留。 | 56 | - mode: 模板参数,用于指定gather_mask的模式,当前仅支持默认模式GatherMaskMode.DEFAULT,为后续功能做预留。 |
| 57 | -- rsvd_cnt: 该条指令筛选后保留下来的元素计数,对应dst_local中有效元素个数,数据类型为uint64_t。 | 57 | + |
| 58 | +**返回值说明** | ||
| 59 | + | ||
| 60 | +该条指令筛选后保留下来的元素计数,对应dst_local中有效元素个数,数据类型为uint64_t。 | ||
| 58 | 61 | ||
| 59 | **约束说明** | 62 | **约束说明** |
| 60 | 63 | ||
| @@ -72,6 +75,5 @@ reduce_mode = False | |||
| 72 | gather_mask_mode = asc.GatherMaskMode.DEFAULT | 75 | gather_mask_mode = asc.GatherMaskMode.DEFAULT |
| 73 | mask = 0 | 76 | mask = 0 |
| 74 | params = asc.GatherMaskParams(src0_block_stride=1, repeat_times=1, src0_repeat_stride=0, src1_repeat_stride=0) | 77 | params = asc.GatherMaskParams(src0_block_stride=1, repeat_times=1, src0_repeat_stride=0, src1_repeat_stride=0) |
| 75 | -rsvd_cnt = 0 | 78 | +rsvd_cnt = asc.gather_mask(dst_local, src0_local, pattern_value, reduce_mode, mask, params, gather_mask_mode) |
| 76 | -asc.gather_mask(dst_local, src0_local, pattern_value, reduce_mode, mask, params, rsvd_cnt, gather_mask_mode) | ||
| 77 | ``` | 79 | ``` |
| @@ -0,0 +1,57 @@ | |||
| 1 | +# asc.language.basic.get_mrg_sort_result | ||
| 2 | + | ||
| 3 | +### asc.language.basic.get_mrg_sort_result() → tuple[int, int, int, int] | ||
| 4 | + | ||
| 5 | +获取mrg_sort已经处理过的队列里的Region Proposal个数,并依次存储在四个出参中。 | ||
| 6 | + | ||
| 7 | +本接口和mrg_sort相关指令的配合关系如下: | ||
| 8 | + | ||
| 9 | +- 配合mrg_sort_4指令使用,获取mrg_sort_4指令处理过的队列里的Region Proposal个数。使用时,需要将mrg_sort_4中的mrg_sort_4_info.if_exhausted_suspension参数配置为TTrue,该配置模式下某条队列耗尽后,mrg_sort_4指令即停止。 | ||
| 10 | + 以上说明适用于如下型号: | ||
| 11 | + - Atlas 推理系列产品AI Core | ||
| 12 | +- 配合mrg_sort指令使用,获取mrg_sort指令处理过的队列里的Region Proposal个数。使用时,需要将mrg_sort中的mrg_sort_4_info.if_exhausted_suspension参数配置为True,该配置模式下某条队列耗尽后,mrg_sort指令即停止。 | ||
| 13 | + 以上说明适用于如下型号: | ||
| 14 | + - Atlas A3 训练系列产品/Atlas A3 推理系列产品 | ||
| 15 | + - Atlas A2 训练系列产品/Atlas A2 推理系列产品 | ||
| 16 | + - Atlas 200I/500 A2 推理产品 | ||
| 17 | + | ||
| 18 | +**对应的Ascend C函数原型** | ||
| 19 | + | ||
| 20 | +```c++ | ||
| 21 | +__aicore__ inline void GetMrgSortResult(uint16_t &mrgSortList1, uint16_t &mrgSortList2, uint16_t &mrgSortList3, uint16_t &mrgSortList4) | ||
| 22 | +``` | ||
| 23 | + | ||
| 24 | +**参数说明** | ||
| 25 | + | ||
| 26 | +无。 | ||
| 27 | + | ||
| 28 | +**返回值说明** | ||
| 29 | + | ||
| 30 | +- mrg_sort_list1(第一个返回值):类型为uint16_t,表示mrg_sort第一个队列里已经处理过的Region Proposal个数。 | ||
| 31 | +- mrg_sort_list2(第二个返回值):类型为uint16_t,表示mrg_sort第二个队列里已经处理过的Region Proposal个数。 | ||
| 32 | +- mrg_sort_list3(第三个返回值):类型为uint16_t,表示mrg_sort第三个队列里已经处理过的Region Proposal个数。 | ||
| 33 | +- mrg_sort_list4(第四个返回值):类型为uint16_t,表示mrg_sort第四个队列里已经处理过的Region Proposal个数。 | ||
| 34 | + | ||
| 35 | +**约束说明** | ||
| 36 | + | ||
| 37 | +无。 | ||
| 38 | + | ||
| 39 | +**调用示例** | ||
| 40 | + | ||
| 41 | +```python | ||
| 42 | +src1 = asc.LocalTensor(dtype=asc.float16, pos=asc.TPosition.VECIN, addr=0, tile_size=512) | ||
| 43 | +src2 = asc.LocalTensor(dtype=asc.float16, pos=asc.TPosition.VECIN, addr=512, tile_size=512) | ||
| 44 | +src3 = asc.LocalTensor(dtype=asc.float16, pos=asc.TPosition.VECIN, addr=1024, tile_size=512) | ||
| 45 | +src4 = asc.LocalTensor(dtype=asc.float16, pos=asc.TPosition.VECIN, addr=1536, tile_size=512) | ||
| 46 | +dst = asc.LocalTensor(dtype=asc.float16, pos=asc.TPosition.VECOUT, addr=0, tile_size=2048) | ||
| 47 | +element_count_list = [128, 128, 128, 128] | ||
| 48 | +sorted_num = [0, 0, 0, 0] | ||
| 49 | +asc.mrg_sort(dst, sort_list, element_count_list, sorted_num, valid_bit=15, repeat_time=1) | ||
| 50 | +asc.mrg_sort(dst, sort_list, element_count_list, sorted_num, valid_bit=15, | ||
| 51 | + repeat_time=1, is_exhausted_suspension=True) | ||
| 52 | +mrg_sort4_info = asc.MrgSort4Info(element_count_list, if_exhausted_suspension=False, | ||
| 53 | + valid_bit=7, repeat_times=1) | ||
| 54 | +asc.mrg_sort(dst, sort_list, mrg_sort4_info) | ||
| 55 | + | ||
| 56 | +mrg1, mrg2, mrg3, mrg4 = asc.get_mrg_sort_result() | ||
| 57 | +``` | ||
| @@ -0,0 +1,39 @@ | |||
| 1 | +# asc.language.basic.get_store_atomic_config | ||
| 2 | + | ||
| 3 | +### asc.language.basic.get_store_atomic_config() → tuple[int, int] | ||
| 4 | + | ||
| 5 | +获取原子操作使能位与原子操作类型的值。 | ||
| 6 | + | ||
| 7 | +**对应的Ascend C函数原型** | ||
| 8 | + | ||
| 9 | +```c++ | ||
| 10 | +__aicore__ inline void GetStoreAtomicConfig(uint16_t& atomicType, uint16_t& atomicOp) | ||
| 11 | +``` | ||
| 12 | + | ||
| 13 | +**参数说明** | ||
| 14 | + | ||
| 15 | +无。 | ||
| 16 | + | ||
| 17 | +**返回值说明** | ||
| 18 | + | ||
| 19 | +- atomic_type(第一个返回值):原子操作使能位。 | ||
| 20 | + - 0:无原子操作 | ||
| 21 | + - 1:使能原子操作,进行原子操作的数据类型为float | ||
| 22 | + - 2:使能原子操作,进行原子操作的数据类型为half | ||
| 23 | + - 3:使能原子操作,进行原子操作的数据类型为int16_t | ||
| 24 | + - 4:使能原子操作,进行原子操作的数据类型为int32_t | ||
| 25 | + - 5:使能原子操作,进行原子操作的数据类型为int8_t | ||
| 26 | + - 6:使能原子操作,进行原子操作的数据类型为bfloat16_t | ||
| 27 | +- atomic_op(第二个返回值):原子操作类型。 | ||
| 28 | + - 0:求和操作 | ||
| 29 | + | ||
| 30 | +**约束说明** | ||
| 31 | + | ||
| 32 | +此接口需要与set_store_atomic_config(ISASI)配合使用,用以获取原子操作使能位与原子操作类型的值。 | ||
| 33 | + | ||
| 34 | +**调用示例** | ||
| 35 | + | ||
| 36 | +```python | ||
| 37 | +asc.set_store_atomic_config(asc.AtomicDtype.ATOMIC_F16, asc.AtomicOp.ATOMIC_SUM) | ||
| 38 | +atomic_type, atomic_op = asc.get_store_atomic_config() | ||
| 39 | +``` | ||
| @@ -0,0 +1,25 @@ | |||
| 1 | +# asc.language.basic.init_soc_state | ||
| 2 | + | ||
| 3 | +### asc.language.basic.init_soc_state() → None | ||
| 4 | + | ||
| 5 | +在由于AI Core上存在一些全局状态,如原子累加状态、Mask模式等,在实际运行中,这些值可以被前序执行的算子修改而导致计算出现不符合预期的行为,在静态Tensor编程的场景中用户必须在Kernel入口处调用此函数来初始化AI Core状态 。 | ||
| 6 | + | ||
| 7 | +**对应的Ascend C函数原型** | ||
| 8 | + | ||
| 9 | +```c++ | ||
| 10 | +__aicore__ inline void InitSocState() | ||
| 11 | +``` | ||
| 12 | + | ||
| 13 | +**参数说明** | ||
| 14 | + | ||
| 15 | +无。 | ||
| 16 | + | ||
| 17 | +**约束说明** | ||
| 18 | + | ||
| 19 | +不调用该接口,在部分场景下可能导致计算结果出现精度错误或者卡死等问题。 | ||
| 20 | + | ||
| 21 | +**调用示例** | ||
| 22 | + | ||
| 23 | +```python | ||
| 24 | +asc.init_soc_state() | ||
| 25 | +``` | ||
| @@ -12,6 +12,9 @@ | |||
| 12 | 12 | ||
| 13 | **对应的Ascend C函数原型** | 13 | **对应的Ascend C函数原型** |
| 14 | 14 | ||
| 15 | +```c++ | ||
| 16 | +__aicore__ inline void PrintTimeStamp(uint32_t descId) | ||
| 17 | +``` | ||
| 15 | **参数说明** | 18 | **参数说明** |
| 16 | 19 | ||
| 17 | - desc_id:用户自定义标识符(自定义数字),用于区分不同打点位置。[0, 0xffff]是预留给Ascend C内部各个模块使用的id值,用户自定义的desc_id建议使用大于0xffff的数值。 | 20 | - desc_id:用户自定义标识符(自定义数字),用于区分不同打点位置。[0, 0xffff]是预留给Ascend C内部各个模块使用的id值,用户自定义的desc_id建议使用大于0xffff的数值。 |
| @@ -0,0 +1,41 @@ | |||
| 1 | +# asc.language.basic.set_store_atomic_config | ||
| 2 | + | ||
| 3 | +### asc.language.basic.set_store_atomic_config(atomic_type: AtomicDtype, atomic_op: AtomicOp) → None | ||
| 4 | + | ||
| 5 | +设置原子操作使能位与原子操作类型。 | ||
| 6 | + | ||
| 7 | +**对应的Ascend C函数原型** | ||
| 8 | + | ||
| 9 | +```c++ | ||
| 10 | +template <AtomicDtype type, AtomicOp op> | ||
| 11 | +__aicore__ inline void SetStoreAtomicConfig() | ||
| 12 | +``` | ||
| 13 | + | ||
| 14 | +**参数说明** | ||
| 15 | + | ||
| 16 | +- type:原子操作使能位,AtomicDtype枚举类的定义如下: | ||
| 17 | + ```python | ||
| 18 | + class AtomicDtype(IntEnum): | ||
| 19 | + ATOMIC_NONE = 0 // 无原子操作 | ||
| 20 | + ATOMIC_F32 = 1 // 使能原子操作,进行原子操作的数据类型为float | ||
| 21 | + ATOMIC_F16 = 2 // 使能原子操作,进行原子操作的数据类型为half | ||
| 22 | + ATOMIC_S16 = 3 // 使能原子操作,进行原子操作的数据类型为int16_t | ||
| 23 | + ATOMIC_S32 = 4 // 使能原子操作,进行原子操作的数据类型为int32_t | ||
| 24 | + ATOMIC_S8 = 5 // 使能原子操作,进行原子操作的数据类型为int8_t | ||
| 25 | + ATOMIC_BF16 = 6 // 使能原子操作,进行原子操作的数据类型为bfloat16_t | ||
| 26 | + ``` | ||
| 27 | +- op:原子操作类型,仅当使能原子操作时有效(即“type”为非“ATOMIC_NONE”的场景),当前仅支持求和操作。 | ||
| 28 | + ```python | ||
| 29 | + class AtomicOp(IntEnum): | ||
| 30 | + ATOMIC_SUM = 0 // 求和操作 | ||
| 31 | + ``` | ||
| 32 | + | ||
| 33 | +**约束说明** | ||
| 34 | + | ||
| 35 | +无。 | ||
| 36 | + | ||
| 37 | +**调用示例** | ||
| 38 | + | ||
| 39 | +```python | ||
| 40 | +asc.set_store_atomic_config(asc.AtomicDtype.ATOMIC_F16, asc.AtomicOp.ATOMIC_SUM) | ||
| 41 | +``` | ||
| @@ -23,6 +23,7 @@ Common operations | |||
| 23 | brcb | 23 | brcb |
| 24 | cast | 24 | cast |
| 25 | cast_deq | 25 | cast_deq |
| 26 | + check_local_memory_ia | ||
| 26 | copy | 27 | copy |
| 27 | cross_core_set_flag | 28 | cross_core_set_flag |
| 28 | cross_core_wait_flag | 29 | cross_core_wait_flag |
| @@ -43,7 +44,9 @@ Common operations | |||
| 43 | get_data_block_size_in_bytes | 44 | get_data_block_size_in_bytes |
| 44 | get_hccl_context | 45 | get_hccl_context |
| 45 | get_icache_preload_status | 46 | get_icache_preload_status |
| 47 | + get_mrg_sort_result | ||
| 46 | get_program_counter | 48 | get_program_counter |
| 49 | + get_store_atomic_config | ||
| 47 | get_sub_block_idx | 50 | get_sub_block_idx |
| 48 | get_system_cycle | 51 | get_system_cycle |
| 49 | get_sys_workspace | 52 | get_sys_workspace |
| @@ -51,6 +54,7 @@ Common operations | |||
| 51 | ib_set | 54 | ib_set |
| 52 | ib_wait | 55 | ib_wait |
| 53 | icache_preload | 56 | icache_preload |
| 57 | + init_soc_state | ||
| 54 | load_data | 58 | load_data |
| 55 | load_data_with_transpose | 59 | load_data_with_transpose |
| 56 | load_image_to_local | 60 | load_image_to_local |
| @@ -89,6 +93,7 @@ Common operations | |||
| 89 | set_mask_norm | 93 | set_mask_norm |
| 90 | set_mm_layout_transform | 94 | set_mm_layout_transform |
| 91 | set_pad_value | 95 | set_pad_value |
| 96 | + set_store_atomic_config | ||
| 92 | set_vector_mask | 97 | set_vector_mask |
| 93 | sort | 98 | sort |
| 94 | sort32 | 99 | sort32 |
| @@ -109,6 +109,11 @@ def BrcbRepeatParams : APIType<"BrcbRepeatParams"> { | |||
| 109 | let apiName = "AscendC::BrcbRepeatParams"; | 109 | let apiName = "AscendC::BrcbRepeatParams"; |
| 110 | } | 110 | } |
| 111 | 111 | ||
| 112 | +def CheckLocalMemoryIAParam : APIType<"CheckLocalMemoryIAParam"> { | ||
| 113 | + let mnemonic = "check_local_memory_ia_param"; | ||
| 114 | + let apiName = "AscendC::CheckLocalMemoryIAParam"; | ||
| 115 | +} | ||
| 116 | + | ||
| 112 | def CopyRepeatParams : APIType<"CopyRepeatParams"> { | 117 | def CopyRepeatParams : APIType<"CopyRepeatParams"> { |
| 113 | let mnemonic = "copy_repeat_params"; | 118 | let mnemonic = "copy_repeat_params"; |
| 114 | let apiName = "AscendC::CopyRepeatParams"; | 119 | let apiName = "AscendC::CopyRepeatParams"; |
| @@ -53,17 +53,8 @@ void printPrettyLayoutMode(AsmPrinter &odsPrinter, const LayoutModeAttr &attr); | |||
| 53 | ParseResult parsePrettyCO2Layout(AsmParser &odsParser, CO2LayoutAttr &attr); | 53 | ParseResult parsePrettyCO2Layout(AsmParser &odsParser, CO2LayoutAttr &attr); |
| 54 | void printPrettyCO2Layout(AsmPrinter &odsPrinter, const CO2LayoutAttr &attr); | 54 | void printPrettyCO2Layout(AsmPrinter &odsPrinter, const CO2LayoutAttr &attr); |
| 55 | 55 | ||
| 56 | -ParseResult parsePrettyAippInputFormat(AsmParser &odsParser, AippInputFormatAttr &attr); | ||
| 57 | -void printPrettyAippInputFormat(AsmPrinter &odsPrinter, const AippInputFormatAttr &attr); | ||
| 58 | - | ||
| 59 | void registerExternalModels(DialectRegistry ®istry); | 56 | void registerExternalModels(DialectRegistry ®istry); |
| 60 | 57 | ||
| 61 | -ParseResult parsePrettyCmpMode(AsmParser &odsParser, CMPMODEAttr &attr); | ||
| 62 | -void printPrettyCmpMode(AsmPrinter &odsPrinter, const CMPMODEAttr &attr); | ||
| 63 | - | ||
| 64 | -ParseResult parsePrettySelMode(AsmParser &odsParser, SELMODEAttr &attr); | ||
| 65 | -void printPrettySelMode(AsmPrinter &odsPrinter, const SELMODEAttr &attr); | ||
| 66 | - | ||
| 67 | } // namespace ascendc | 58 | } // namespace ascendc |
| 68 | } // namespace mlir | 59 | } // namespace mlir |
| 69 | 60 | ||
| @@ -20,4 +20,31 @@ include "mlir/Interfaces/CastInterfaces.td" | |||
| 20 | include "mlir/Interfaces/SideEffectInterfaces.td" | 20 | include "mlir/Interfaces/SideEffectInterfaces.td" |
| 21 | include "mlir/IR/OpBase.td" | 21 | include "mlir/IR/OpBase.td" |
| 22 | 22 | ||
| 23 | +def AscendC_InitSocStateOp : APIOp<"init_soc_state", "InitSocState", [AscFunc]> { | ||
| 24 | + let summary = "Initialize AI Core global state"; | ||
| 25 | + let description = "Initialize global state registers like atomic accumulation state and mask mode"; | ||
| 26 | + let assemblyFormat = "attr-dict"; | ||
| 27 | +} | ||
| 28 | + | ||
| 29 | +def AscendC_SetStoreAtomicConfigOp : APIOp<"set_store_atomic_config", "SetStoreAtomicConfig", [AscFunc]> { | ||
| 30 | + let summary = "Set atomic operation enable bit and atomic operation type"; | ||
| 31 | + let description = "Configure atomic operation enable bit and atomic operation type"; | ||
| 32 | + let arguments = (ins AscendC_AtomicDtypeAttr:$atomicType, AscendC_AtomicOpAttr:$atomicOp); | ||
| 33 | + let assemblyFormat = "$atomicType `,` $atomicOp attr-dict"; | ||
| 34 | + let paramTypeLists = [3, 3]; | ||
| 35 | +} | ||
| 36 | + | ||
| 37 | +def AscendC_GetStoreAtomicConfigOp : APIOp<"get_store_atomic_config", "GetStoreAtomicConfig"> { | ||
| 38 | + let summary = "Get atomic operation enable bit and atomic operation type"; | ||
| 39 | + let description = "Get the values of atomic operation enable bit and atomic operation type"; | ||
| 40 | + let results = (outs AnyType:$atomicType, AnyType:$atomicOp); | ||
| 41 | + let assemblyFormat = "attr-dict `:` type($atomicType) `,` type($atomicOp)"; | ||
| 42 | +} | ||
| 43 | + | ||
| 44 | +def AscendC_CheckLocalMemoryIAOp : APIOp<"check_local_memory_ia", "CheckLocalMemoryIA", [AscFunc]> { | ||
| 45 | + let description = "Get the values of atomic operation enable bit and atomic operation type"; | ||
| 46 | + let arguments = (ins AscendC_CheckLocalMemoryIAParam:$param); | ||
| 47 | + let paramTypeLists = [0]; | ||
| 48 | +} | ||
| 49 | + | ||
| 23 | #endif // ASC_BASIC_OP_COMMON_TD | 50 | #endif // ASC_BASIC_OP_COMMON_TD |
| @@ -91,4 +91,10 @@ def AscendC_SortOp : APIOp<"sort", "Sort"> { | |||
| 91 | UnitAttr:$isFullSort); | 91 | UnitAttr:$isFullSort); |
| 92 | } | 92 | } |
| 93 | 93 | ||
| 94 | +def AscendC_GetMrgSortResultOp : VectorOp<"get_mrg_sort_result", "GetMrgSortResult"> { | ||
| 95 | + let description = "Get merge sort result"; | ||
| 96 | + let results = (outs AnyType:$mrgSortList1, AnyType:$mrgSortList2, AnyType:$mrgSortList3, AnyType:$mrgSortList4); | ||
| 97 | + let assemblyFormat = "attr-dict `:` type($mrgSortList1) `,` type($mrgSortList2) `,` type($mrgSortList3) `,` type($mrgSortList4)"; | ||
| 98 | +} | ||
| 99 | + | ||
| 94 | #endif //ASC_BASIC_OP_PROPOSAL_TD | 100 | #endif //ASC_BASIC_OP_PROPOSAL_TD |
| @@ -31,9 +31,14 @@ def AscendC_GatherMaskOp : APIOp<"gather_mask", "GatherMask"> { | |||
| 31 | let arguments = (ins AscendC_LocalTensor:$dst, AscendC_LocalTensor:$src0, | 31 | let arguments = (ins AscendC_LocalTensor:$dst, AscendC_LocalTensor:$src0, |
| 32 | AnyType:$src1Pattern, | 32 | AnyType:$src1Pattern, |
| 33 | AnyType:$reduceMode, AnyType:$mask, | 33 | AnyType:$reduceMode, AnyType:$mask, |
| 34 | - AscendC_GatherMaskParams:$params, AnyType:$rsvdCnt, | 34 | + AscendC_GatherMaskParams:$params, |
| 35 | - DefaultValuedAttr<AscendC_GatherMaskModeAttr, | 35 | + AscendC_GatherMaskModeAttr:$gatherMaskMode); |
| 36 | - "::mlir::ascendc::GatherMaskMode::DEFAULT">:$gatherMaskMode); | 36 | + let results = (outs AnyType:$rsvdCnt); |
| 37 | + let assemblyFormat = [{ | ||
| 38 | + $dst `,` $src0 `,` $src1Pattern `,` $reduceMode `,` $mask `,` $params `,` $gatherMaskMode | ||
| 39 | + attr-dict `:` qualified(type($dst)) `,` qualified(type($src0)) `,` qualified(type($src1Pattern)) `,` | ||
| 40 | + type($reduceMode) `,` type($mask) `,` type($params) `->` type($rsvdCnt) | ||
| 41 | + }]; | ||
| 37 | } | 42 | } |
| 38 | 43 | ||
| 39 | def AscendC_GetGatherMaskRemainCountOp : APIOp<"get_gather_mask_remain_count", "GetGatherMaskRemainCount",[AscFunc]> { | 44 | def AscendC_GetGatherMaskRemainCountOp : APIOp<"get_gather_mask_remain_count", "GetGatherMaskRemainCount",[AscFunc]> { |
| @@ -180,7 +180,7 @@ def AscendC_FmatrixModeAttr : I32EnumAttr<"FmatrixMode", "", [ | |||
| 180 | } | 180 | } |
| 181 | 181 | ||
| 182 | def AscendC_GatherMaskModeAttr : I32EnumAttr<"GatherMaskMode", "", [ | 182 | def AscendC_GatherMaskModeAttr : I32EnumAttr<"GatherMaskMode", "", [ |
| 183 | - I32EnumAttrCase<"DEFAULT", 0>, | 183 | + I32EnumAttrCase<"DEFAULT", 0, "default">, |
| 184 | ]> { | 184 | ]> { |
| 185 | let cppNamespace = "::mlir::ascendc"; | 185 | let cppNamespace = "::mlir::ascendc"; |
| 186 | let description = "Represents AscendC::GatherMaskMode"; | 186 | let description = "Represents AscendC::GatherMaskMode"; |
| @@ -516,4 +516,27 @@ def AscendC_MemDsbAttr : I32EnumAttr<"MemDsbT", "", [ | |||
| 516 | let underlyingType = "uint8_t"; | 516 | let underlyingType = "uint8_t"; |
| 517 | } | 517 | } |
| 518 | 518 | ||
| 519 | + | ||
| 520 | +def AscendC_AtomicDtypeAttr : I32EnumAttr<"AtomicDtype", "", [ | ||
| 521 | + I32EnumAttrCase<"ATOMIC_NONE", 0, "atomic_none">, | ||
| 522 | + I32EnumAttrCase<"ATOMIC_F32", 1, "atomic_f32">, | ||
| 523 | + I32EnumAttrCase<"ATOMIC_F16", 2, "atomic_f16">, | ||
| 524 | + I32EnumAttrCase<"ATOMIC_S16", 3, "atomic_s16">, | ||
| 525 | + I32EnumAttrCase<"ATOMIC_S32", 4, "atomic_s32">, | ||
| 526 | + I32EnumAttrCase<"ATOMIC_S8", 5, "atomic_s8">, | ||
| 527 | + I32EnumAttrCase<"ATOMIC_BF16", 6, "atomic_bf16"> | ||
| 528 | +]> { | ||
| 529 | + let cppNamespace = "::mlir::ascendc"; | ||
| 530 | + let description = "Represents AscendC::AtomicDtype"; | ||
| 531 | + let underlyingType = "uint8_t"; | ||
| 532 | +} | ||
| 533 | + | ||
| 534 | +def AscendC_AtomicOpAttr : I32EnumAttr<"AtomicOp", "", [ | ||
| 535 | + I32EnumAttrCase<"ATOMIC_SUM", 0, "atomic_sum">, | ||
| 536 | +]> { | ||
| 537 | + let cppNamespace = "::mlir::ascendc"; | ||
| 538 | + let description = "Represents AscendC::AtomicOp"; | ||
| 539 | + let underlyingType = "uint8_t"; | ||
| 540 | +} | ||
| 541 | + | ||
| 519 | #endif // ASC_CORE_ATTRIBUTES_TD | 542 | #endif // ASC_CORE_ATTRIBUTES_TD |
| @@ -38,6 +38,8 @@ LogicalResult printOperation(CodeEmitter &emitter, ascendc::ConstructOp op); | |||
| 38 | 38 | ||
| 39 | LogicalResult printOperation(CodeEmitter &emitter, ascendc::FftsCrossCoreSyncOp op); | 39 | LogicalResult printOperation(CodeEmitter &emitter, ascendc::FftsCrossCoreSyncOp op); |
| 40 | 40 | ||
| 41 | +LogicalResult printOperation(CodeEmitter &emitter, ascendc::GetMrgSortResultOp op); | ||
| 42 | + | ||
| 41 | LogicalResult printOperation(CodeEmitter &emitter, ascendc::MrgSortOp op); | 43 | LogicalResult printOperation(CodeEmitter &emitter, ascendc::MrgSortOp op); |
| 42 | 44 | ||
| 43 | LogicalResult printOperation(CodeEmitter &emitter, ascendc::SortOp op); | 45 | LogicalResult printOperation(CodeEmitter &emitter, ascendc::SortOp op); |
| @@ -52,6 +54,8 @@ LogicalResult printOperation(CodeEmitter &emitter, ascendc::FixpipeOp op); | |||
| 52 | 54 | ||
| 53 | LogicalResult printOperation(CodeEmitter &emitter, ascendc::FixpipeWithWorkspaceOp op); | 55 | LogicalResult printOperation(CodeEmitter &emitter, ascendc::FixpipeWithWorkspaceOp op); |
| 54 | 56 | ||
| 57 | +LogicalResult printOperation(CodeEmitter &emitter, ascendc::GetStoreAtomicConfigOp op); | ||
| 58 | + | ||
| 55 | template <typename FixpipeOp> | 59 | template <typename FixpipeOp> |
| 56 | auto printFixpipeTemplate(CodeEmitter &emitter, FixpipeOp op) | 60 | auto printFixpipeTemplate(CodeEmitter &emitter, FixpipeOp op) |
| 57 | { | 61 | { |
| @@ -172,6 +172,28 @@ LogicalResult mlir::ascendc::printOperation(CodeEmitter &emitter, ascendc::FftsC | |||
| 172 | return success(); | 172 | return success(); |
| 173 | } | 173 | } |
| 174 | 174 | ||
| 175 | +LogicalResult mlir::ascendc::printOperation(CodeEmitter &emitter, ascendc::GetMrgSortResultOp op) | ||
| 176 | +{ | ||
| 177 | + auto &os = emitter.ostream(); | ||
| 178 | + Value mrgSortList1Value = op.getMrgSortList1(); | ||
| 179 | + Value mrgSortList2Value = op.getMrgSortList2(); | ||
| 180 | + Value mrgSortList3Value = op.getMrgSortList3(); | ||
| 181 | + Value mrgSortList4Value = op.getMrgSortList4(); | ||
| 182 | + | ||
| 183 | + os << "uint16_t " << emitter.getOrCreateName(mrgSortList1Value) << ";\n"; | ||
| 184 | + os << "uint16_t " << emitter.getOrCreateName(mrgSortList2Value) << ";\n"; | ||
| 185 | + os << "uint16_t " << emitter.getOrCreateName(mrgSortList3Value) << ";\n"; | ||
| 186 | + os << "uint16_t " << emitter.getOrCreateName(mrgSortList4Value) << ";\n"; | ||
| 187 | + | ||
| 188 | + os << ascNamespace << "::" << op.getAPIName(); | ||
| 189 | + os << "(" << emitter.getOrCreateName(mrgSortList1Value); | ||
| 190 | + os << ", " << emitter.getOrCreateName(mrgSortList2Value); | ||
| 191 | + os << ", " << emitter.getOrCreateName(mrgSortList3Value); | ||
| 192 | + os << ", " << emitter.getOrCreateName(mrgSortList4Value) << ")"; | ||
| 193 | + | ||
| 194 | + return success(); | ||
| 195 | +} | ||
| 196 | + | ||
| 175 | LogicalResult mlir::ascendc::printOperation(CodeEmitter &emitter, ascendc::MrgSortOp op) | 197 | LogicalResult mlir::ascendc::printOperation(CodeEmitter &emitter, ascendc::MrgSortOp op) |
| 176 | { | 198 | { |
| 177 | static int elementCountListCounter = 0; | 199 | static int elementCountListCounter = 0; |
| @@ -258,4 +280,21 @@ LogicalResult mlir::ascendc::printOperation(CodeEmitter &emitter, ascendc::Fixpi | |||
| 258 | << emitter.getOrCreateName(op.getCbufWorkspace()) << ", " | 280 | << emitter.getOrCreateName(op.getCbufWorkspace()) << ", " |
| 259 | << emitter.getOrCreateName(op.getIntriParams()) << ")"; | 281 | << emitter.getOrCreateName(op.getIntriParams()) << ")"; |
| 260 | return success(); | 282 | return success(); |
| 283 | +} | ||
| 284 | + | ||
| 285 | +LogicalResult mlir::ascendc::printOperation(CodeEmitter &emitter, ascendc::GetStoreAtomicConfigOp op) | ||
| 286 | +{ | ||
| 287 | + auto &os = emitter.ostream(); | ||
| 288 | + Value atomicTypeValue = op.getAtomicType(); | ||
| 289 | + Value atomicOpValue = op.getAtomicOp(); | ||
| 290 | + | ||
| 291 | + | ||
| 292 | + os << "uint16_t " << emitter.getOrCreateName(atomicTypeValue) << ";\n"; | ||
| 293 | + os << "uint16_t " << emitter.getOrCreateName(atomicOpValue) << ";\n"; | ||
| 294 | + | ||
| 295 | + os << ascNamespace << "::" << op.getAPIName(); | ||
| 296 | + os << "(" << emitter.getOrCreateName(atomicTypeValue); | ||
| 297 | + os << ", " << emitter.getOrCreateName(atomicOpValue) << ")"; | ||
| 298 | + | ||
| 299 | + return success(); | ||
| 261 | } | 300 | } |
| @@ -20,6 +20,10 @@ using namespace mlir::ascendc; | |||
| 20 | LogicalResult mlir::ascendc::printOperation(CodeEmitter &emitter, ascendc::GatherMaskOp op) | 20 | LogicalResult mlir::ascendc::printOperation(CodeEmitter &emitter, ascendc::GatherMaskOp op) |
| 21 | { | 21 | { |
| 22 | auto &os = emitter.ostream(); | 22 | auto &os = emitter.ostream(); |
| 23 | + Value rsvdCntVal = op.getRsvdCnt(); | ||
| 24 | + os << "uint64_t " << emitter.getOrCreateName(rsvdCntVal) << ";\n"; | ||
| 25 | + | ||
| 26 | + | ||
| 23 | auto dstType = op.getDst().getType(); | 27 | auto dstType = op.getDst().getType(); |
| 24 | auto src1PatternType = op.getSrc1Pattern().getType(); | 28 | auto src1PatternType = op.getSrc1Pattern().getType(); |
| 25 | if (auto dstLocalTensorType = dyn_cast<ascendc::LocalTensorType>(dstType)) { | 29 | if (auto dstLocalTensorType = dyn_cast<ascendc::LocalTensorType>(dstType)) { |
| @@ -40,12 +44,7 @@ LogicalResult mlir::ascendc::printOperation(CodeEmitter &emitter, ascendc::Gathe | |||
| 40 | } else { | 44 | } else { |
| 41 | return op.emitOpError("dst operand must be LocalTensor type"); | 45 | return op.emitOpError("dst operand must be LocalTensor type"); |
| 42 | } | 46 | } |
| 43 | - Value rsvd_cnt_val = op.getRsvdCnt(); | 47 | + os << emitter.getOrCreateName(rsvdCntVal); |
| 44 | - if (isa<MemRefType>(rsvd_cnt_val.getType())) { | ||
| 45 | - os << "*" << emitter.getOrCreateName(rsvd_cnt_val); | ||
| 46 | - } else { | ||
| 47 | - os << emitter.getOrCreateName(rsvd_cnt_val); | ||
| 48 | - } | ||
| 49 | os << ")"; | 48 | os << ")"; |
| 50 | 49 | ||
| 51 | return success(); | 50 | return success(); |
| @@ -139,8 +139,8 @@ using PrintableOpTypes = std::tuple< | |||
| 139 | // Other operations | 139 | // Other operations |
| 140 | ascendc::ConstructOp, ascendc::AscendIsAICOp, ascendc::AscendIsAIVOp, LLVM::UndefOp, ascendc::FftsCrossCoreSyncOp, | 140 | ascendc::ConstructOp, ascendc::AscendIsAICOp, ascendc::AscendIsAIVOp, LLVM::UndefOp, ascendc::FftsCrossCoreSyncOp, |
| 141 | ascendc::SetFftsBaseAddrOp, ascendc::PopStackBufferOp, | 141 | ascendc::SetFftsBaseAddrOp, ascendc::PopStackBufferOp, |
| 142 | - ascendc::MrgSortOp, ascendc::SortOp, | 142 | + ascendc::GetMrgSortResultOp, ascendc::MrgSortOp, ascendc::SortOp, |
| 143 | - ascendc::FixpipeOp, ascendc::FixpipeWithWorkspaceOp, | 143 | + ascendc::FixpipeOp, ascendc::FixpipeWithWorkspaceOp, ascendc::GetStoreAtomicConfigOp, |
| 144 | // Scalar operations | 144 | // Scalar operations |
| 145 | ascendc::ScalarCastOp, | 145 | ascendc::ScalarCastOp, |
| 146 | // Swap and workspace operations | 146 | // Swap and workspace operations |
| @@ -32,9 +32,12 @@ from .basic.cache import data_cache_clean_and_invalid, get_icache_preload_status | |||
| 32 | from .basic.common import ( | 32 | from .basic.common import ( |
| 33 | ascend_is_aic, | 33 | ascend_is_aic, |
| 34 | ascend_is_aiv, | 34 | ascend_is_aiv, |
| 35 | + check_local_memory_ia, | ||
| 35 | data_cache_preload, | 36 | data_cache_preload, |
| 36 | get_hccl_context, | 37 | get_hccl_context, |
| 38 | + get_store_atomic_config, | ||
| 37 | get_sys_workspace, | 39 | get_sys_workspace, |
| 40 | + init_soc_state, | ||
| 38 | reset_mask, | 41 | reset_mask, |
| 39 | set_aipp_functions, | 42 | set_aipp_functions, |
| 40 | set_hccl_context, | 43 | set_hccl_context, |
| @@ -43,6 +46,7 @@ from .basic.common import ( | |||
| 43 | set_mask_count, | 46 | set_mask_count, |
| 44 | set_mask_norm, | 47 | set_mask_norm, |
| 45 | set_mm_layout_transform, | 48 | set_mm_layout_transform, |
| 49 | + set_store_atomic_config, | ||
| 46 | set_sys_workspace, | 50 | set_sys_workspace, |
| 47 | set_vector_mask, | 51 | set_vector_mask, |
| 48 | ) | 52 | ) |
| @@ -132,6 +136,7 @@ from .basic.vec_gather import gather, gatherb | |||
| 132 | from .basic.vec_gather_mask import gather_mask, get_gather_mask_remain_count | 136 | from .basic.vec_gather_mask import gather_mask, get_gather_mask_remain_count |
| 133 | from .basic.vec_transpose import transpose, trans_data_to_5hd | 137 | from .basic.vec_transpose import transpose, trans_data_to_5hd |
| 134 | from .basic.proposal import ( | 138 | from .basic.proposal import ( |
| 139 | + get_mrg_sort_result, | ||
| 135 | mrg_sort, | 140 | mrg_sort, |
| 136 | mrg_sort4, | 141 | mrg_sort4, |
| 137 | proposal_concat, | 142 | proposal_concat, |
| @@ -226,6 +231,8 @@ from .core.enums import ( | |||
| 226 | QuantModes, | 231 | QuantModes, |
| 227 | MatmulConfigMode, | 232 | MatmulConfigMode, |
| 228 | SelMode, | 233 | SelMode, |
| 234 | + AtomicDtype, | ||
| 235 | + AtomicOp, | ||
| 229 | ) | 236 | ) |
| 230 | from .core.ir_value import GlobalAddress | 237 | from .core.ir_value import GlobalAddress |
| 231 | from .core.memory_allocator import LocalMemAllocator | 238 | from .core.memory_allocator import LocalMemAllocator |
| @@ -242,6 +249,7 @@ from .core.tensor import GlobalTensor, LocalTensor, LocalTensorAuto, MrgSortSrcL | |||
| 242 | from .core.types import ( | 249 | from .core.types import ( |
| 243 | BinaryRepeatParams, | 250 | BinaryRepeatParams, |
| 244 | BrcbRepeatParams, | 251 | BrcbRepeatParams, |
| 252 | + CheckLocalMemoryIAParam, | ||
| 245 | CopyRepeatParams, | 253 | CopyRepeatParams, |
| 246 | DataCopyParams, | 254 | DataCopyParams, |
| 247 | DataCopyEnhancedParams, | 255 | DataCopyEnhancedParams, |
| @@ -22,9 +22,12 @@ from .cache import data_cache_clean_and_invalid, get_icache_preload_status, icac | |||
| 22 | from .common import ( | 22 | from .common import ( |
| 23 | ascend_is_aic, | 23 | ascend_is_aic, |
| 24 | ascend_is_aiv, | 24 | ascend_is_aiv, |
| 25 | + check_local_memory_ia, | ||
| 25 | data_cache_preload, | 26 | data_cache_preload, |
| 26 | get_hccl_context, | 27 | get_hccl_context, |
| 28 | + get_store_atomic_config, | ||
| 27 | get_sys_workspace, | 29 | get_sys_workspace, |
| 30 | + init_soc_state, | ||
| 28 | reset_mask, | 31 | reset_mask, |
| 29 | set_aipp_functions, | 32 | set_aipp_functions, |
| 30 | set_hccl_context, | 33 | set_hccl_context, |
| @@ -33,6 +36,7 @@ from .common import ( | |||
| 33 | set_mask_count, | 36 | set_mask_count, |
| 34 | set_mask_norm, | 37 | set_mask_norm, |
| 35 | set_mm_layout_transform, | 38 | set_mm_layout_transform, |
| 39 | + set_store_atomic_config, | ||
| 36 | set_sys_workspace, | 40 | set_sys_workspace, |
| 37 | set_vector_mask, | 41 | set_vector_mask, |
| 38 | ) | 42 | ) |
| @@ -125,6 +129,7 @@ from .vec_gather import ( | |||
| 125 | ) | 129 | ) |
| 126 | from .vec_gather_mask import gather_mask, get_gather_mask_remain_count | 130 | from .vec_gather_mask import gather_mask, get_gather_mask_remain_count |
| 127 | from .proposal import ( | 131 | from .proposal import ( |
| 132 | + get_mrg_sort_result, | ||
| 128 | mrg_sort, | 133 | mrg_sort, |
| 129 | mrg_sort4, | 134 | mrg_sort4, |
| 130 | proposal_concat, | 135 | proposal_concat, |
| @@ -181,10 +186,12 @@ __all__ = [ | |||
| 181 | # .common | 186 | # .common |
| 182 | "ascend_is_aic", | 187 | "ascend_is_aic", |
| 183 | "ascend_is_aiv", | 188 | "ascend_is_aiv", |
| 189 | + "check_local_memory_ia", | ||
| 184 | "data_cache_preload", | 190 | "data_cache_preload", |
| 185 | - | ||
| 186 | "get_hccl_context", | 191 | "get_hccl_context", |
| 192 | + "get_store_atomic_config", | ||
| 187 | "get_sys_workspace", | 193 | "get_sys_workspace", |
| 194 | + "init_soc_state", | ||
| 188 | "reset_mask", | 195 | "reset_mask", |
| 189 | "set_aipp_functions", | 196 | "set_aipp_functions", |
| 190 | "set_hccl_context", | 197 | "set_hccl_context", |
| @@ -193,6 +200,7 @@ __all__ = [ | |||
| 193 | "set_mask_count", | 200 | "set_mask_count", |
| 194 | "set_mask_norm", | 201 | "set_mask_norm", |
| 195 | "set_mm_layout_transform", | 202 | "set_mm_layout_transform", |
| 203 | + "set_store_atomic_config", | ||
| 196 | "set_sys_workspace", | 204 | "set_sys_workspace", |
| 197 | "set_vector_mask", | 205 | "set_vector_mask", |
| 198 | # .data_cache | 206 | # .data_cache |
| @@ -300,8 +308,14 @@ __all__ = [ | |||
| 300 | "gather", | 308 | "gather", |
| 301 | "gatherb", | 309 | "gatherb", |
| 302 | # .vec_proposal | 310 | # .vec_proposal |
| 311 | + "get_mrg_sort_result", | ||
| 312 | + "mrg_sort", | ||
| 313 | + "mrg_sort4", | ||
| 303 | "proposal_concat", | 314 | "proposal_concat", |
| 304 | "proposal_extract", | 315 | "proposal_extract", |
| 316 | + "rp_sort16", | ||
| 317 | + "sort", | ||
| 318 | + "sort32", | ||
| 305 | # .vec_reduce | 319 | # .vec_reduce |
| 306 | "block_reduce_sum", | 320 | "block_reduce_sum", |
| 307 | "block_reduce_max", | 321 | "block_reduce_max", |
| @@ -316,12 +330,6 @@ __all__ = [ | |||
| 316 | "reduce_sum", | 330 | "reduce_sum", |
| 317 | # .vec_scatter | 331 | # .vec_scatter |
| 318 | "scatter", | 332 | "scatter", |
| 319 | - # .vec_sort | ||
| 320 | - "mrg_sort", | ||
| 321 | - "mrg_sort4", | ||
| 322 | - "rp_sort16", | ||
| 323 | - "sort", | ||
| 324 | - "sort32", | ||
| 325 | # .vec_ternary_scalar | 333 | # .vec_ternary_scalar |
| 326 | "axpy", | 334 | "axpy", |
| 327 | # .vec_unary | 335 | # .vec_unary |
| @@ -9,12 +9,12 @@ | |||
| 9 | from typing import overload | 9 | from typing import overload |
| 10 | 10 | ||
| 11 | from ..._C import ir | 11 | from ..._C import ir |
| 12 | +from ..core.aipp_types import AippParams | ||
| 12 | from ..core.dtype import DataType, KnownTypes, KnownTypes as KT | 13 | from ..core.dtype import DataType, KnownTypes, KnownTypes as KT |
| 13 | -from ..core.enums import MaskMode, TPosition | 14 | +from ..core.enums import AippInputFormat, MaskMode, TPosition, AtomicDtype, AtomicOp |
| 14 | from ..core.ir_value import GlobalAddress, PlainValue, materialize_ir_value as _mat, RuntimeBool, RuntimeInt | 15 | from ..core.ir_value import GlobalAddress, PlainValue, materialize_ir_value as _mat, RuntimeBool, RuntimeInt |
| 15 | from ..core.tensor import LocalTensor, GlobalTensor | 16 | from ..core.tensor import LocalTensor, GlobalTensor |
| 16 | -from ..core.aipp_types import AippParams | 17 | +from ..core.types import CheckLocalMemoryIAParam |
| 17 | -from ..core.enums import AippInputFormat | ||
| 18 | from ..core.utils import require_jit, global_builder, OverloadDispatcher | 18 | from ..core.utils import require_jit, global_builder, OverloadDispatcher |
| 19 | from .utils import set_common_docstring | 19 | from .utils import set_common_docstring |
| 20 | 20 | ||
| @@ -221,3 +221,39 @@ def set_vector_mask(*args, dtype: DataType, mode: MaskMode) -> None: | |||
| 221 | ) | 221 | ) |
| 222 | 222 | ||
| 223 | dispatcher(*args, dtype=dtype, mode=mode) | 223 | dispatcher(*args, dtype=dtype, mode=mode) |
| 224 | + | ||
| 225 | + | ||
| 226 | + | ||
| 227 | + | ||
| 228 | +def init_soc_state() -> None: | ||
| 229 | + global_builder.get_ir_builder().create_asc_InitSocStateOp() | ||
| 230 | + | ||
| 231 | + | ||
| 232 | + | ||
| 233 | +def set_store_atomic_config(atomic_type: AtomicDtype, atomic_op: AtomicOp) -> None: | ||
| 234 | + ... | ||
| 235 | + | ||
| 236 | + | ||
| 237 | + | ||
| 238 | + | ||
| 239 | +def set_store_atomic_config(atomic_type: AtomicDtype, atomic_op: AtomicOp) -> None: | ||
| 240 | + global_builder.get_ir_builder().create_asc_SetStoreAtomicConfigOp(atomic_type, atomic_op) | ||
| 241 | + | ||
| 242 | + | ||
| 243 | + | ||
| 244 | +def get_store_atomic_config() -> tuple[int, int]: | ||
| 245 | + ... | ||
| 246 | + | ||
| 247 | + | ||
| 248 | + | ||
| 249 | + | ||
| 250 | +def get_store_atomic_config() -> tuple[RuntimeInt, RuntimeInt]: | ||
| 251 | + builder = global_builder.get_ir_builder() | ||
| 252 | + atomic_type, atomic_op = builder.create_asc_GetStoreAtomicConfigAndResult(KT.int16.to_ir(), KT.int16.to_ir()) | ||
| 253 | + return PlainValue(atomic_type), PlainValue(atomic_op) | ||
| 254 | + | ||
| 255 | + | ||
| 256 | + | ||
| 257 | + | ||
| 258 | +def check_local_memory_ia(check_params: CheckLocalMemoryIAParam): | ||
| 259 | + global_builder.get_ir_builder().create_asc_CheckLocalMemoryIAOp(check_params.to_ir()) | ||
| @@ -6,14 +6,28 @@ | |||
| 6 | # INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. | 6 | # INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. |
| 7 | # See LICENSE in the root of the software repository for the full text of the License. | 7 | # See LICENSE in the root of the software repository for the full text of the License. |
| 8 | 8 | ||
| 9 | -from typing import List, overload | 9 | +from typing import List, Tuple, overload |
| 10 | -from ..core.ir_value import RuntimeBool, RuntimeInt, materialize_ir_value as _mat | 10 | +from ..core.ir_value import PlainValue, RuntimeBool, RuntimeInt, materialize_ir_value as _mat |
| 11 | from ..core.tensor import LocalTensor, MrgSortSrcList | 11 | from ..core.tensor import LocalTensor, MrgSortSrcList |
| 12 | -from ..core.types import KnownTypes, MrgSort4Info | 12 | +from ..core.types import KnownTypes as KT, MrgSort4Info |
| 13 | from ..core.utils import DefaultValued, require_jit, global_builder, OverloadDispatcher | 13 | from ..core.utils import DefaultValued, require_jit, global_builder, OverloadDispatcher |
| 14 | from .utils import set_common_docstring | 14 | from .utils import set_common_docstring |
| 15 | 15 | ||
| 16 | 16 | ||
| 17 | + | ||
| 18 | +def get_mrg_sort_result() -> tuple[int, int, int, int]: | ||
| 19 | + ... | ||
| 20 | + | ||
| 21 | + | ||
| 22 | + | ||
| 23 | + | ||
| 24 | +def get_mrg_sort_result() -> Tuple[RuntimeInt, RuntimeInt, RuntimeInt, RuntimeInt]: | ||
| 25 | + builder = global_builder.get_ir_builder() | ||
| 26 | + arg1, arg2, arg3, arg4 = builder.create_asc_GetMrgSortResults(KT.uint16.to_ir(), | ||
| 27 | + KT.uint16.to_ir(), KT.uint16.to_ir(), KT.uint16.to_ir()) | ||
| 28 | + return PlainValue(arg1), PlainValue(arg2), PlainValue(arg3), PlainValue(arg4) | ||
| 29 | + | ||
| 30 | + | ||
| 17 | 31 | ||
| 18 | def mrg_sort(dst: LocalTensor, sort_list: MrgSortSrcList, element_count_list: List[int], | 32 | def mrg_sort(dst: LocalTensor, sort_list: MrgSortSrcList, element_count_list: List[int], |
| 19 | sorted_num: List[int], valid_bit: int, repeat_time: int, | 33 | sorted_num: List[int], valid_bit: int, repeat_time: int, |
| @@ -44,15 +58,15 @@ def mrg_sort(dst: LocalTensor, sort_list: MrgSortSrcList, *args, **kwargs) -> No | |||
| 44 | f"This parameter must be a compile-time constant." | 58 | f"This parameter must be a compile-time constant." |
| 45 | ) | 59 | ) |
| 46 | 60 | ||
| 47 | - element_count_list_ir = [_mat(count, KnownTypes.uint16).to_ir() for count in element_count_list] | 61 | + element_count_list_ir = [_mat(count, KT.uint16).to_ir() for count in element_count_list] |
| 48 | - sorted_num_ir = [_mat(num, KnownTypes.uint32).to_ir() for num in sorted_num] | 62 | + sorted_num_ir = [_mat(num, KT.uint32).to_ir() for num in sorted_num] |
| 49 | 63 | ||
| 50 | builder.create_asc_MrgSortOp( | 64 | builder.create_asc_MrgSortOp( |
| 51 | dst.to_ir(), sort_list.to_ir(), | 65 | dst.to_ir(), sort_list.to_ir(), |
| 52 | element_count_list_ir, | 66 | element_count_list_ir, |
| 53 | sorted_num_ir, | 67 | sorted_num_ir, |
| 54 | - _mat(valid_bit, KnownTypes.uint16).to_ir(), | 68 | + _mat(valid_bit, KT.uint16).to_ir(), |
| 55 | - _mat(repeat_time, KnownTypes.uint16).to_ir(), | 69 | + _mat(repeat_time, KT.uint16).to_ir(), |
| 56 | is_exhausted_suspension | 70 | is_exhausted_suspension |
| 57 | ) | 71 | ) |
| 58 | 72 | ||
| @@ -106,7 +120,7 @@ def rp_sort16(dst: LocalTensor, src: LocalTensor, repeat_time: RuntimeInt) -> No | |||
| 106 | builder.create_asc_RpSort16Op( | 120 | builder.create_asc_RpSort16Op( |
| 107 | dst.to_ir(), | 121 | dst.to_ir(), |
| 108 | src.to_ir(), | 122 | src.to_ir(), |
| 109 | - _mat(repeat_time, KnownTypes.int32).to_ir() | 123 | + _mat(repeat_time, KT.int32).to_ir() |
| 110 | ) | 124 | ) |
| 111 | 125 | ||
| 112 | 126 | ||
| @@ -133,7 +147,7 @@ def sort(dst: LocalTensor, concat: LocalTensor, index: LocalTensor, tmp: LocalTe | |||
| 133 | concat.to_ir(), | 147 | concat.to_ir(), |
| 134 | index.to_ir(), | 148 | index.to_ir(), |
| 135 | tmp.to_ir(), | 149 | tmp.to_ir(), |
| 136 | - _mat(repeat_time, KnownTypes.int32).to_ir(), | 150 | + _mat(repeat_time, KT.int32).to_ir(), |
| 137 | is_full_sort | 151 | is_full_sort |
| 138 | ) | 152 | ) |
| 139 | 153 | ||
| @@ -151,5 +165,5 @@ def sort32(dst: LocalTensor, src0: LocalTensor, src1: LocalTensor, repeat_time: | |||
| 151 | dst.to_ir(), | 165 | dst.to_ir(), |
| 152 | src0.to_ir(), | 166 | src0.to_ir(), |
| 153 | src1.to_ir(), | 167 | src1.to_ir(), |
| 154 | - _mat(repeat_time, KnownTypes.int32).to_ir() | 168 | + _mat(repeat_time, KT.int32).to_ir() |
| 155 | ) | 169 | ) |
| @@ -109,7 +109,6 @@ def trap() -> None: | |||
| 109 | global_builder.get_ir_builder().create_asc_TrapOp() | 109 | global_builder.get_ir_builder().create_asc_TrapOp() |
| 110 | 110 | ||
| 111 | 111 | ||
| 112 | - | ||
| 113 | 112 | ||
| 114 | def get_sub_block_num() -> RuntimeInt: | 113 | def get_sub_block_num() -> RuntimeInt: |
| 115 | return PlainValue(global_builder.get_ir_builder().create_asc_GetSubBlockNumOp(KnownTypes.uint64.to_ir())) | 114 | return PlainValue(global_builder.get_ir_builder().create_asc_GetSubBlockNumOp(KnownTypes.uint64.to_ir())) |
| @@ -1448,6 +1448,7 @@ def print_time_stamp_docstring(): | |||
| 1448 | **对应的Ascend C函数原型** | 1448 | **对应的Ascend C函数原型** |
| 1449 | 1449 | ||
| 1450 | .. code-block:: c++ | 1450 | .. code-block:: c++ |
| 1451 | + | ||
| 1451 | __aicore__ inline void PrintTimeStamp(uint32_t descId) | 1452 | __aicore__ inline void PrintTimeStamp(uint32_t descId) |
| 1452 | """ | 1453 | """ |
| 1453 | 1454 | ||
| @@ -1628,6 +1629,82 @@ def get_icache_preload_status_docstring(): | |||
| 1628 | return [func_introduction, cpp_signature, param_list, return_list, "", py_example] | 1629 | return [func_introduction, cpp_signature, param_list, return_list, "", py_example] |
| 1629 | 1630 | ||
| 1630 | 1631 | ||
| 1632 | +def get_mrg_sort_result_docstring(): | ||
| 1633 | + func_introduction = """ | ||
| 1634 | + 获取mrg_sort已经处理过的队列里的Region Proposal个数,并依次存储在四个出参中。 | ||
| 1635 | + | ||
| 1636 | + 本接口和mrg_sort相关指令的配合关系如下: | ||
| 1637 | + | ||
| 1638 | + - 配合mrg_sort_4指令使用,获取mrg_sort_4指令处理过的队列里的Region Proposal个数。使用时,需要将mrg_sort_4中的mrg_sort_4_info.if_exhausted_suspension参数配置为TTrue,该配置模式下某条队列耗尽后,mrg_sort_4指令即停止。 | ||
| 1639 | + 以上说明适用于如下型号: | ||
| 1640 | + | ||
| 1641 | + - Atlas 推理系列产品AI Core | ||
| 1642 | + | ||
| 1643 | + - 配合mrg_sort指令使用,获取mrg_sort指令处理过的队列里的Region Proposal个数。使用时,需要将mrg_sort中的mrg_sort_4_info.if_exhausted_suspension参数配置为True,该配置模式下某条队列耗尽后,mrg_sort指令即停止。 | ||
| 1644 | + 以上说明适用于如下型号: | ||
| 1645 | + | ||
| 1646 | + - Atlas A3 训练系列产品/Atlas A3 推理系列产品 | ||
| 1647 | + - Atlas A2 训练系列产品/Atlas A2 推理系列产品 | ||
| 1648 | + - Atlas 200I/500 A2 推理产品 | ||
| 1649 | + | ||
| 1650 | + """ | ||
| 1651 | + | ||
| 1652 | + cpp_signature = """ | ||
| 1653 | + **对应的Ascend C函数原型** | ||
| 1654 | + | ||
| 1655 | + .. code-block:: c++ | ||
| 1656 | + | ||
| 1657 | + __aicore__ inline void GetMrgSortResult(uint16_t &mrgSortList1, uint16_t &mrgSortList2, uint16_t &mrgSortList3, uint16_t &mrgSortList4) | ||
| 1658 | + | ||
| 1659 | + | ||
| 1660 | + """ | ||
| 1661 | + | ||
| 1662 | + param_list = """ | ||
| 1663 | + **参数说明** | ||
| 1664 | + | ||
| 1665 | + 无。 | ||
| 1666 | + | ||
| 1667 | + """ | ||
| 1668 | + | ||
| 1669 | + return_list = """ | ||
| 1670 | + **返回值说明** | ||
| 1671 | + | ||
| 1672 | + - mrg_sort_list1(第一个返回值):类型为uint16_t,表示mrg_sort第一个队列里已经处理过的Region Proposal个数。 | ||
| 1673 | + - mrg_sort_list2(第二个返回值):类型为uint16_t,表示mrg_sort第二个队列里已经处理过的Region Proposal个数。 | ||
| 1674 | + - mrg_sort_list3(第三个返回值):类型为uint16_t,表示mrg_sort第三个队列里已经处理过的Region Proposal个数。 | ||
| 1675 | + - mrg_sort_list4(第四个返回值):类型为uint16_t,表示mrg_sort第四个队列里已经处理过的Region Proposal个数。 | ||
| 1676 | + """ | ||
| 1677 | + | ||
| 1678 | + constraint_list = """ | ||
| 1679 | + **约束说明** | ||
| 1680 | + | ||
| 1681 | + 无。 | ||
| 1682 | + """ | ||
| 1683 | + | ||
| 1684 | + py_example = """ | ||
| 1685 | + **调用示例** | ||
| 1686 | + | ||
| 1687 | + .. code-block:: python | ||
| 1688 | + | ||
| 1689 | + src1 = asc.LocalTensor(dtype=asc.float16, pos=asc.TPosition.VECIN, addr=0, tile_size=512) | ||
| 1690 | + src2 = asc.LocalTensor(dtype=asc.float16, pos=asc.TPosition.VECIN, addr=512, tile_size=512) | ||
| 1691 | + src3 = asc.LocalTensor(dtype=asc.float16, pos=asc.TPosition.VECIN, addr=1024, tile_size=512) | ||
| 1692 | + src4 = asc.LocalTensor(dtype=asc.float16, pos=asc.TPosition.VECIN, addr=1536, tile_size=512) | ||
| 1693 | + dst = asc.LocalTensor(dtype=asc.float16, pos=asc.TPosition.VECOUT, addr=0, tile_size=2048) | ||
| 1694 | + element_count_list = [128, 128, 128, 128] | ||
| 1695 | + sorted_num = [0, 0, 0, 0] | ||
| 1696 | + asc.mrg_sort(dst, sort_list, element_count_list, sorted_num, valid_bit=15, repeat_time=1) | ||
| 1697 | + asc.mrg_sort(dst, sort_list, element_count_list, sorted_num, valid_bit=15, repeat_time=1, is_exhausted_suspension=True) | ||
| 1698 | + mrg_sort4_info = asc.MrgSort4Info(element_count_list, if_exhausted_suspension=False, valid_bit=7, repeat_times=1) | ||
| 1699 | + asc.mrg_sort(dst, sort_list, mrg_sort4_info) | ||
| 1700 | + | ||
| 1701 | + mrg1, mrg2, mrg3, mrg4 = asc.get_mrg_sort_result() | ||
| 1702 | + | ||
| 1703 | + """ | ||
| 1704 | + | ||
| 1705 | + return [func_introduction, cpp_signature, param_list, return_list, constraint_list, py_example] | ||
| 1706 | + | ||
| 1707 | + | ||
| 1631 | def get_program_counter_docstring(): | 1708 | def get_program_counter_docstring(): |
| 1632 | func_introduction = """ | 1709 | func_introduction = """ |
| 1633 | 获取程序计数器的指针,程序计数器用于记录当前程序执行的位置。 | 1710 | 获取程序计数器的指针,程序计数器用于记录当前程序执行的位置。 |
| @@ -4745,7 +4822,7 @@ def gather_mask_docstring(): | |||
| 4745 | 4822 | ||
| 4746 | - reduce_mode: 用于选择mask参数模式,数据类型为bool,支持如下取值: | 4823 | - reduce_mode: 用于选择mask参数模式,数据类型为bool,支持如下取值: |
| 4747 | 4824 | ||
| 4748 | - - False:Normal模式。该模式下,每次repeat操作256Bytes数据,总的数据计算量为repeat_times * 256Bytes。mask参数无效,建议设置为0。按需配置repeat_times、src0BlockStride、src0_repeat_stride参数。支持src1_pattern配置为内置固定模式或用户自定义模式。用户自定义模式下可根据实际情况配置src1_repeat_stride。 | 4825 | + - False:Normal模式。该模式下,每次repeat操作256Bytes数据,总的数据计算量为repeat_times * 256Bytes。mask参数无效,建议设置为0。按需配置repeat_times、src0_block_stride、src0_repeat_stride参数。支持src1_pattern配置为内置固定模式或用户自定义模式。用户自定义模式下可根据实际情况配置src1_repeat_stride。 |
| 4749 | - True:Counter模式。根据mask等参数含义的不同,该模式有以下两种配置方式: | 4826 | - True:Counter模式。根据mask等参数含义的不同,该模式有以下两种配置方式: |
| 4750 | 4827 | ||
| 4751 | 配置方式一:每次repeat操作mask个元素,总的数据计算量为repeat_times * mask个元素。mask值配置为每一次repeat计算的元素个数。按需配置repeat_times、src0_block_stride、src0_repeat_stride参数。支持src1_pattern配置为内置固定模式或用户自定义模式。用户自定义模式下可根据实际情况配置src1_repeat_stride。 | 4828 | 配置方式一:每次repeat操作mask个元素,总的数据计算量为repeat_times * mask个元素。mask值配置为每一次repeat计算的元素个数。按需配置repeat_times、src0_block_stride、src0_repeat_stride参数。支持src1_pattern配置为内置固定模式或用户自定义模式。用户自定义模式下可根据实际情况配置src1_repeat_stride。 |
| @@ -4760,7 +4837,13 @@ def gather_mask_docstring(): | |||
| 4760 | - src0_repeat_stride: 用于设置src0相邻迭代间的地址步长。 | 4837 | - src0_repeat_stride: 用于设置src0相邻迭代间的地址步长。 |
| 4761 | - src1_repeat_stride: 用于设置src1相邻迭代间的地址步长。 | 4838 | - src1_repeat_stride: 用于设置src1相邻迭代间的地址步长。 |
| 4762 | - mode: 模板参数,用于指定gather_mask的模式,当前仅支持默认模式GatherMaskMode.DEFAULT,为后续功能做预留。 | 4839 | - mode: 模板参数,用于指定gather_mask的模式,当前仅支持默认模式GatherMaskMode.DEFAULT,为后续功能做预留。 |
| 4763 | - - rsvd_cnt: 该条指令筛选后保留下来的元素计数,对应dst_local中有效元素个数,数据类型为uint64_t。 | 4840 | + """ |
| 4841 | + | ||
| 4842 | + return_list = """ | ||
| 4843 | + **返回值说明** | ||
| 4844 | + | ||
| 4845 | + 该条指令筛选后保留下来的元素计数,对应dst_local中有效元素个数,数据类型为uint64_t。 | ||
| 4846 | + | ||
| 4764 | """ | 4847 | """ |
| 4765 | 4848 | ||
| 4766 | constraint_list = """ | 4849 | constraint_list = """ |
| @@ -4783,11 +4866,10 @@ def gather_mask_docstring(): | |||
| 4783 | gather_mask_mode = asc.GatherMaskMode.DEFAULT | 4866 | gather_mask_mode = asc.GatherMaskMode.DEFAULT |
| 4784 | mask = 0 | 4867 | mask = 0 |
| 4785 | params = asc.GatherMaskParams(src0_block_stride=1, repeat_times=1, src0_repeat_stride=0, src1_repeat_stride=0) | 4868 | params = asc.GatherMaskParams(src0_block_stride=1, repeat_times=1, src0_repeat_stride=0, src1_repeat_stride=0) |
| 4786 | - rsvd_cnt = 0 | 4869 | + rsvd_cnt = asc.gather_mask(dst_local, src0_local, pattern_value, reduce_mode, mask, params, gather_mask_mode) |
| 4787 | - asc.gather_mask(dst_local, src0_local, pattern_value, reduce_mode, mask, params, rsvd_cnt, gather_mask_mode) | ||
| 4788 | 4870 | ||
| 4789 | """ | 4871 | """ |
| 4790 | - return [func_introduction, cpp_signature, param_list, "", constraint_list, py_example] | 4872 | + return [func_introduction, cpp_signature, param_list, return_list, constraint_list, py_example] |
| 4791 | 4873 | ||
| 4792 | 4874 | ||
| 4793 | def scalar_cast_docstring(): | 4875 | def scalar_cast_docstring(): |
| @@ -7513,6 +7595,230 @@ def reduce_sum_docstring(): | |||
| 7513 | return [func_introduction, cpp_signature, param_list, "", constraint_list, py_example] | 7595 | return [func_introduction, cpp_signature, param_list, "", constraint_list, py_example] |
| 7514 | 7596 | ||
| 7515 | 7597 | ||
| 7598 | +def init_soc_state_docstring(): | ||
| 7599 | + func_introduction = """ | ||
| 7600 | + 在由于AI Core上存在一些全局状态,如原子累加状态、Mask模式等,在实际运行中,这些值可以被前序执行的算子修改而导致计算出现不符合预期的行为,在静态Tensor编程的场景中用户必须在Kernel入口处调用此函数来初始化AI Core状态 。 | ||
| 7601 | + """ | ||
| 7602 | + | ||
| 7603 | + cpp_signature = """ | ||
| 7604 | + **对应的Ascend C函数原型** | ||
| 7605 | + | ||
| 7606 | + .. code-block:: c++ | ||
| 7607 | + | ||
| 7608 | + __aicore__ inline void InitSocState() | ||
| 7609 | + | ||
| 7610 | + """ | ||
| 7611 | + | ||
| 7612 | + param_list = """ | ||
| 7613 | + **参数说明** | ||
| 7614 | + | ||
| 7615 | + 无。 | ||
| 7616 | + """ | ||
| 7617 | + | ||
| 7618 | + constraint_list = """ | ||
| 7619 | + **约束说明** | ||
| 7620 | + | ||
| 7621 | + 不调用该接口,在部分场景下可能导致计算结果出现精度错误或者卡死等问题。 | ||
| 7622 | + """ | ||
| 7623 | + | ||
| 7624 | + py_example = """ | ||
| 7625 | + **调用示例** | ||
| 7626 | + | ||
| 7627 | + .. code-block:: python | ||
| 7628 | + | ||
| 7629 | + asc.init_soc_state() | ||
| 7630 | + | ||
| 7631 | + """ | ||
| 7632 | + | ||
| 7633 | + return [func_introduction, cpp_signature, param_list, "", constraint_list, py_example] | ||
| 7634 | + | ||
| 7635 | + | ||
| 7636 | +def set_store_atomic_config_docstring(): | ||
| 7637 | + func_introduction = """ | ||
| 7638 | + 设置原子操作使能位与原子操作类型。 | ||
| 7639 | + """ | ||
| 7640 | + | ||
| 7641 | + cpp_signature = """ | ||
| 7642 | + **对应的Ascend C函数原型** | ||
| 7643 | + | ||
| 7644 | + .. code-block:: c++ | ||
| 7645 | + | ||
| 7646 | + template <AtomicDtype type, AtomicOp op> | ||
| 7647 | + __aicore__ inline void SetStoreAtomicConfig() | ||
| 7648 | + | ||
| 7649 | + | ||
| 7650 | + """ | ||
| 7651 | + | ||
| 7652 | + param_list = """ | ||
| 7653 | + **参数说明** | ||
| 7654 | + | ||
| 7655 | + - type:原子操作使能位,AtomicDtype枚举类的定义如下: | ||
| 7656 | + | ||
| 7657 | + .. code-block:: python | ||
| 7658 | + | ||
| 7659 | + class AtomicDtype(IntEnum): | ||
| 7660 | + ATOMIC_NONE = 0 // 无原子操作 | ||
| 7661 | + ATOMIC_F32 = 1 // 使能原子操作,进行原子操作的数据类型为float | ||
| 7662 | + ATOMIC_F16 = 2 // 使能原子操作,进行原子操作的数据类型为half | ||
| 7663 | + ATOMIC_S16 = 3 // 使能原子操作,进行原子操作的数据类型为int16_t | ||
| 7664 | + ATOMIC_S32 = 4 // 使能原子操作,进行原子操作的数据类型为int32_t | ||
| 7665 | + ATOMIC_S8 = 5 // 使能原子操作,进行原子操作的数据类型为int8_t | ||
| 7666 | + ATOMIC_BF16 = 6 // 使能原子操作,进行原子操作的数据类型为bfloat16_t | ||
| 7667 | + | ||
| 7668 | + - op:原子操作类型,仅当使能原子操作时有效(即“type”为非“ATOMIC_NONE”的场景),当前仅支持求和操作。 | ||
| 7669 | + | ||
| 7670 | + .. code-block:: python | ||
| 7671 | + | ||
| 7672 | + class AtomicOp(IntEnum): | ||
| 7673 | + ATOMIC_SUM = 0 // 求和操作 | ||
| 7674 | + | ||
| 7675 | + """ | ||
| 7676 | + | ||
| 7677 | + constraint_list = """ | ||
| 7678 | + **约束说明** | ||
| 7679 | + | ||
| 7680 | + 无。 | ||
| 7681 | + """ | ||
| 7682 | + | ||
| 7683 | + py_example = """ | ||
| 7684 | + **调用示例** | ||
| 7685 | + | ||
| 7686 | + .. code-block:: python | ||
| 7687 | + | ||
| 7688 | + asc.set_store_atomic_config(asc.AtomicDtype.ATOMIC_F16, asc.AtomicOp.ATOMIC_SUM) | ||
| 7689 | + | ||
| 7690 | + """ | ||
| 7691 | + | ||
| 7692 | + return [func_introduction, cpp_signature, param_list, "", constraint_list, py_example] | ||
| 7693 | + | ||
| 7694 | + | ||
| 7695 | +def get_store_atomic_config_docstring(): | ||
| 7696 | + func_introduction = """ | ||
| 7697 | + 获取原子操作使能位与原子操作类型的值。 | ||
| 7698 | + """ | ||
| 7699 | + | ||
| 7700 | + cpp_signature = """ | ||
| 7701 | + **对应的Ascend C函数原型** | ||
| 7702 | + | ||
| 7703 | + .. code-block:: c++ | ||
| 7704 | + | ||
| 7705 | + __aicore__ inline void GetStoreAtomicConfig(uint16_t& atomicType, uint16_t& atomicOp) | ||
| 7706 | + | ||
| 7707 | + """ | ||
| 7708 | + | ||
| 7709 | + param_list = """ | ||
| 7710 | + **参数说明** | ||
| 7711 | + | ||
| 7712 | + 无。 | ||
| 7713 | + | ||
| 7714 | + """ | ||
| 7715 | + | ||
| 7716 | + return_list = """ | ||
| 7717 | + **返回值说明** | ||
| 7718 | + | ||
| 7719 | + - atomic_type(第一个返回值):原子操作使能位。 | ||
| 7720 | + | ||
| 7721 | + - 0:无原子操作 | ||
| 7722 | + - 1:使能原子操作,进行原子操作的数据类型为float | ||
| 7723 | + - 2:使能原子操作,进行原子操作的数据类型为half | ||
| 7724 | + - 3:使能原子操作,进行原子操作的数据类型为int16_t | ||
| 7725 | + - 4:使能原子操作,进行原子操作的数据类型为int32_t | ||
| 7726 | + - 5:使能原子操作,进行原子操作的数据类型为int8_t | ||
| 7727 | + - 6:使能原子操作,进行原子操作的数据类型为bfloat16_t | ||
| 7728 | + | ||
| 7729 | + - atomic_op(第二个返回值):原子操作类型。 | ||
| 7730 | + | ||
| 7731 | + - 0:求和操作 | ||
| 7732 | + """ | ||
| 7733 | + | ||
| 7734 | + constraint_list = """ | ||
| 7735 | + **约束说明** | ||
| 7736 | + | ||
| 7737 | + 此接口需要与set_store_atomic_config(ISASI)配合使用,用以获取原子操作使能位与原子操作类型的值。 | ||
| 7738 | + """ | ||
| 7739 | + | ||
| 7740 | + py_example = """ | ||
| 7741 | + **调用示例** | ||
| 7742 | + | ||
| 7743 | + .. code-block:: python | ||
| 7744 | + | ||
| 7745 | + asc.set_store_atomic_config(asc.AtomicDtype.ATOMIC_F16, asc.AtomicOp.ATOMIC_SUM) | ||
| 7746 | + atomic_type, atomic_op = asc.get_store_atomic_config() | ||
| 7747 | + | ||
| 7748 | + """ | ||
| 7749 | + | ||
| 7750 | + return [func_introduction, cpp_signature, param_list, return_list, constraint_list, py_example] | ||
| 7751 | + | ||
| 7752 | + | ||
| 7753 | +def check_local_memory_ia_docstring(): | ||
| 7754 | + func_introduction = """ | ||
| 7755 | + Check设定范围内的UB读写行为,如果有设定范围的读写行为则会出现EXCEPTION报错,无设定范围的读写行为则不会报错。 | ||
| 7756 | + | ||
| 7757 | + """ | ||
| 7758 | + | ||
| 7759 | + cpp_signature = """ | ||
| 7760 | + **对应的Ascend C函数原型** | ||
| 7761 | + | ||
| 7762 | + .. code-block:: c++ | ||
| 7763 | + | ||
| 7764 | + __aicore__ inline void CheckLocalMemoryIA(const CheckLocalMemoryIAParam& checkParams) | ||
| 7765 | + | ||
| 7766 | + """ | ||
| 7767 | + | ||
| 7768 | + param_list = """ | ||
| 7769 | + **参数说明** | ||
| 7770 | + | ||
| 7771 | + - check_params:用于配置对UB访问的检查行为,类型为CheckLocalMemoryIAParam。 | ||
| 7772 | + - enable_bit:配置的异常寄存器,取值范围:enable_bit∈[0,3],默认为0。 | ||
| 7773 | + - 0:异常寄存器0。 | ||
| 7774 | + - 1:异常寄存器1。 | ||
| 7775 | + - 2:异常寄存器2。 | ||
| 7776 | + - 3:异常寄存器3。 | ||
| 7777 | + - start_addr:Check的起始地址,32B对齐,取值范围:start_addr∈[0, 65535],默认值为0。比如,可通过LocalTensor.get_phy_addr()/32来获取start_addr。 | ||
| 7778 | + - end_addr:Check的结束地址,32B对齐,取值范围:end_addr∈[0, 65535]。默认值为0。 | ||
| 7779 | + - is_scalar_read:Check标量读访问。 | ||
| 7780 | + - false:不开启,默认为false。 | ||
| 7781 | + - true:开启。 | ||
| 7782 | + - is_scalar_write: Check标量写访问。 | ||
| 7783 | + - false:不开启,默认为false。 | ||
| 7784 | + - true:开启。 | ||
| 7785 | + - is_vector_read: Check矢量读访问。 | ||
| 7786 | + - false:不开启,默认为false。 | ||
| 7787 | + - true:开启。 | ||
| 7788 | + - is_vector_write: Check矢量写访问。 | ||
| 7789 | + - false:不开启,默认为false。 | ||
| 7790 | + - true:开启。 | ||
| 7791 | + - is_mte_read: Check MTE读访问。 | ||
| 7792 | + - false:不开启,默认为false。 | ||
| 7793 | + - true:开启。 | ||
| 7794 | + - is_mte_write: Check MTE写访问。 | ||
| 7795 | + - false:不开启,默认为false。 | ||
| 7796 | + - true:开启。 | ||
| 7797 | + - is_enable: 是否使能enable_bit参数配置的异常寄存器。 | ||
| 7798 | + - false:不使能,默认为false。 | ||
| 7799 | + - true:使能。 | ||
| 7800 | + | ||
| 7801 | + """ | ||
| 7802 | + constraint_list = """ | ||
| 7803 | + **约束说明** | ||
| 7804 | + | ||
| 7805 | + - start_addr/end_addr的单位是32B,check的范围不包含start_addr,包含end_addr,即(start_addr, end_addr]。 | ||
| 7806 | + - 每次调用完该接口需要进行复位(配置is_enable为False进行复位)。 | ||
| 7807 | + | ||
| 7808 | + """ | ||
| 7809 | + py_example = """ | ||
| 7810 | + **调用示例** | ||
| 7811 | + | ||
| 7812 | + .. code-block:: python | ||
| 7813 | + | ||
| 7814 | + params = asc.CheckLocalMemoryIAParam() | ||
| 7815 | + asc.check_local_memory_ia(params) | ||
| 7816 | + | ||
| 7817 | + """ | ||
| 7818 | + | ||
| 7819 | + return [func_introduction, cpp_signature, param_list, "", constraint_list, py_example] | ||
| 7820 | + | ||
| 7821 | + | ||
| 7516 | DOC_HANDLES = { | 7822 | DOC_HANDLES = { |
| 7517 | "axpy": axpy_docstring, | 7823 | "axpy": axpy_docstring, |
| 7518 | "block_reduce_sum": block_reduce_sum_docstring, | 7824 | "block_reduce_sum": block_reduce_sum_docstring, |
| @@ -7521,6 +7827,7 @@ DOC_HANDLES = { | |||
| 7521 | "brcb": brcb_docstring, | 7827 | "brcb": brcb_docstring, |
| 7522 | "cast": cast_docstring, | 7828 | "cast": cast_docstring, |
| 7523 | "cast_deq": cast_deq_docstring, | 7829 | "cast_deq": cast_deq_docstring, |
| 7830 | + "check_local_memory_ia": check_local_memory_ia_docstring, | ||
| 7524 | "compare": compare_docstring, | 7831 | "compare": compare_docstring, |
| 7525 | "compare_scalar": compare_scalar_docstring, | 7832 | "compare_scalar": compare_scalar_docstring, |
| 7526 | "copy": copy_docstring, | 7833 | "copy": copy_docstring, |
| @@ -7545,7 +7852,9 @@ DOC_HANDLES = { | |||
| 7545 | "get_data_block_size_in_bytes": get_data_block_size_in_bytes_docstring, | 7852 | "get_data_block_size_in_bytes": get_data_block_size_in_bytes_docstring, |
| 7546 | "get_hccl_context": get_hccl_context_docstring, | 7853 | "get_hccl_context": get_hccl_context_docstring, |
| 7547 | "get_icache_preload_status": get_icache_preload_status_docstring, | 7854 | "get_icache_preload_status": get_icache_preload_status_docstring, |
| 7855 | + "get_mrg_sort_result": get_mrg_sort_result_docstring, | ||
| 7548 | "get_program_counter": get_program_counter_docstring, | 7856 | "get_program_counter": get_program_counter_docstring, |
| 7857 | + "get_store_atomic_config": get_store_atomic_config_docstring, | ||
| 7549 | "get_sub_block_idx": get_sub_block_idx_docstring, | 7858 | "get_sub_block_idx": get_sub_block_idx_docstring, |
| 7550 | "get_sys_workspace": get_sys_workspace_docstring, | 7859 | "get_sys_workspace": get_sys_workspace_docstring, |
| 7551 | "get_system_cycle": get_system_cycle_docstring, | 7860 | "get_system_cycle": get_system_cycle_docstring, |
| @@ -7554,6 +7863,7 @@ DOC_HANDLES = { | |||
| 7554 | "ib_wait": ib_wait_docstring, | 7863 | "ib_wait": ib_wait_docstring, |
| 7555 | "icache_preload": icache_preload_docstring, | 7864 | "icache_preload": icache_preload_docstring, |
| 7556 | "init_const_value": init_const_value_docstring, | 7865 | "init_const_value": init_const_value_docstring, |
| 7866 | + "init_soc_state": init_soc_state_docstring, | ||
| 7557 | "load_data": load_data_docstring, | 7867 | "load_data": load_data_docstring, |
| 7558 | "load_data_with_sparse": load_data_with_sparse_docstring, | 7868 | "load_data_with_sparse": load_data_with_sparse_docstring, |
| 7559 | "load_data_with_transpose": load_data_with_transpose_docstring, | 7869 | "load_data_with_transpose": load_data_with_transpose_docstring, |
| @@ -7585,6 +7895,7 @@ DOC_HANDLES = { | |||
| 7585 | "select": select_docstring, | 7895 | "select": select_docstring, |
| 7586 | "set_aipp_functions": set_aipp_functions_docstring, | 7896 | "set_aipp_functions": set_aipp_functions_docstring, |
| 7587 | "set_atomic_add": set_atomic_add_docstring, | 7897 | "set_atomic_add": set_atomic_add_docstring, |
| 7898 | + "set_store_atomic_config": set_store_atomic_config_docstring, | ||
| 7588 | "set_atomic_max": set_atomic_max_docstring, | 7899 | "set_atomic_max": set_atomic_max_docstring, |
| 7589 | "set_atomic_min": set_atomic_min_docstring, | 7900 | "set_atomic_min": set_atomic_min_docstring, |
| 7590 | "set_atomic_none": set_atomic_none_docstring, | 7901 | "set_atomic_none": set_atomic_none_docstring, |
| @@ -8,12 +8,11 @@ | |||
| 8 | 8 | ||
| 9 | from typing import Union, overload | 9 | from typing import Union, overload |
| 10 | 10 | ||
| 11 | -from ..._C import ir | ||
| 12 | from ..core.dtype import KnownTypes as KT | 11 | from ..core.dtype import KnownTypes as KT |
| 13 | from ..core.enums import GatherMaskMode | 12 | from ..core.enums import GatherMaskMode |
| 14 | -from ..core.ir_value import materialize_ir_value as _mat | 13 | +from ..core.ir_value import materialize_ir_value as _mat, PlainValue, RuntimeBool, RuntimeInt |
| 15 | from ..core.tensor import LocalTensor | 14 | from ..core.tensor import LocalTensor |
| 16 | -from ..core.utils import require_jit, global_builder | 15 | +from ..core.utils import require_jit, global_builder, DefaultValued |
| 17 | from ..core.types import GatherMaskParams | 16 | from ..core.types import GatherMaskParams |
| 18 | from .utils import OverloadDispatcher, set_common_docstring | 17 | from .utils import OverloadDispatcher, set_common_docstring |
| 19 | 18 | ||
| @@ -69,46 +68,50 @@ def check_type_gather_mask(dst: LocalTensor, src0: LocalTensor, src1_pattern: Un | |||
| 69 | 68 | ||
| 70 | def gather_mask(dst: LocalTensor, src0: LocalTensor, src1_pattern: LocalTensor, | 69 | def gather_mask(dst: LocalTensor, src0: LocalTensor, src1_pattern: LocalTensor, |
| 71 | reduce_mode: bool, mask: int, params: GatherMaskParams, | 70 | reduce_mode: bool, mask: int, params: GatherMaskParams, |
| 72 | - rsvd_cnt: int, gather_mask_mode=GatherMaskMode.DEFAULT): | 71 | + gather_mask_mode=GatherMaskMode.DEFAULT) -> int: |
| 73 | ... | 72 | ... |
| 74 | 73 | ||
| 75 | 74 | ||
| 76 | 75 | ||
| 77 | def gather_mask(dst: LocalTensor, src0: LocalTensor, src1_pattern: int, | 76 | def gather_mask(dst: LocalTensor, src0: LocalTensor, src1_pattern: int, |
| 78 | reduce_mode: bool, mask: int, params: GatherMaskParams, | 77 | reduce_mode: bool, mask: int, params: GatherMaskParams, |
| 79 | - rsvd_cnt: int, gather_mask_mode=GatherMaskMode.DEFAULT): | 78 | + gather_mask_mode=GatherMaskMode.DEFAULT) -> int: |
| 80 | ... | 79 | ... |
| 81 | 80 | ||
| 82 | 81 | ||
| 83 | 82 | ||
| 84 | 83 | ||
| 85 | -def gather_mask(dst: LocalTensor, src0: LocalTensor, *args, **kwargs): | 84 | +def gather_mask(dst: LocalTensor, src0: LocalTensor, *args, **kwargs) -> RuntimeInt: |
| 86 | builder = global_builder.get_ir_builder() | 85 | builder = global_builder.get_ir_builder() |
| 87 | 86 | ||
| 88 | dispatcher = OverloadDispatcher("gather_mask") | 87 | dispatcher = OverloadDispatcher("gather_mask") |
| 89 | 88 | ||
| 90 | - @dispatcher.register_auto | 89 | + @dispatcher.register(src1_pattern=LocalTensor, reduce_mode=RuntimeBool, mask=RuntimeInt, params=GatherMaskParams, |
| 91 | - def _(src1_pattern: LocalTensor, reduce_mode: bool, mask: int, | 90 | + gather_mask_mode=DefaultValued(GatherMaskMode, GatherMaskMode.DEFAULT)) |
| 92 | - params: GatherMaskParams, rsvd_cnt: int, gather_mask_mode: GatherMaskMode): | 91 | + def _(src1_pattern: LocalTensor, reduce_mode: RuntimeBool, mask: RuntimeInt, |
| 92 | + params: GatherMaskParams, gather_mask_mode: GatherMaskMode): | ||
| 93 | check_type_gather_mask(dst, src0, src1_pattern) | 93 | check_type_gather_mask(dst, src0, src1_pattern) |
| 94 | - rsvd_cnt_var = builder.create_memref_AllocaOp(ir.get_memref_type(builder.get_ui64_type(), 1), False) | 94 | + rsvd_cnt = builder.create_asc_GatherMaskAndResult(KT.uint64.to_ir(), |
| 95 | - builder.create_asc_GatherMaskOp( | ||
| 96 | dst.to_ir(), src0.to_ir(), src1_pattern.to_ir(), | 95 | dst.to_ir(), src0.to_ir(), src1_pattern.to_ir(), |
| 97 | _mat(reduce_mode, KT.bool_).to_ir(), _mat(mask, KT.uint32).to_ir(), | 96 | _mat(reduce_mode, KT.bool_).to_ir(), _mat(mask, KT.uint32).to_ir(), |
| 98 | - params.to_ir(), rsvd_cnt_var, gather_mask_mode | 97 | + params.to_ir(), gather_mask_mode |
| 99 | ) | 98 | ) |
| 99 | + return PlainValue(rsvd_cnt) | ||
| 100 | 100 | ||
| 101 | - @dispatcher.register_auto | 101 | + @dispatcher.register(src1_pattern=RuntimeInt, reduce_mode=RuntimeBool, mask=RuntimeInt, params=GatherMaskParams, |
| 102 | - def _(src1_pattern: int, reduce_mode: bool, mask: int, | 102 | + gather_mask_mode=DefaultValued(GatherMaskMode, GatherMaskMode.DEFAULT)) |
| 103 | - params: GatherMaskParams, rsvd_cnt: int, gather_mask_mode: GatherMaskMode): | 103 | + def _(src1_pattern: RuntimeInt, reduce_mode: RuntimeBool, mask: RuntimeInt, |
| 104 | + params: GatherMaskParams, gather_mask_mode: GatherMaskMode): | ||
| 104 | check_type_gather_mask(dst, src0, src1_pattern) | 105 | check_type_gather_mask(dst, src0, src1_pattern) |
| 105 | - rsvd_cnt_var = builder.create_memref_AllocaOp(ir.get_memref_type(builder.get_ui64_type(), 1), False) | 106 | + |
| 106 | - builder.create_asc_GatherMaskOp( | 107 | + rsvd_cnt = builder.create_asc_GatherMaskAndResult(KT.uint64.to_ir(), |
| 107 | dst.to_ir(), src0.to_ir(), _mat(src1_pattern, KT.uint8).to_ir(), | 108 | dst.to_ir(), src0.to_ir(), _mat(src1_pattern, KT.uint8).to_ir(), |
| 108 | _mat(reduce_mode, KT.bool_).to_ir(), _mat(mask, KT.uint32).to_ir(), | 109 | _mat(reduce_mode, KT.bool_).to_ir(), _mat(mask, KT.uint32).to_ir(), |
| 109 | - params.to_ir(), rsvd_cnt_var, gather_mask_mode | 110 | + params.to_ir(), gather_mask_mode |
| 110 | ) | 111 | ) |
| 111 | - dispatcher(*args, **kwargs) | 112 | + return PlainValue(rsvd_cnt) |
| 113 | + | ||
| 114 | + return dispatcher(*args, **kwargs) | ||
| 112 | 115 | ||
| 113 | 116 | ||
| 114 | 117 | ||
| @@ -67,6 +67,8 @@ from .enums import ( | |||
| 67 | TPosition, | 67 | TPosition, |
| 68 | TransposeType, | 68 | TransposeType, |
| 69 | MatmulConfigMode, | 69 | MatmulConfigMode, |
| 70 | + AtomicDtype, | ||
| 71 | + AtomicOp, | ||
| 70 | ) | 72 | ) |
| 71 | from .ir_value import GlobalAddress | 73 | from .ir_value import GlobalAddress |
| 72 | from .memory_allocator import LocalMemAllocator | 74 | from .memory_allocator import LocalMemAllocator |
| @@ -83,6 +85,7 @@ from .tensor import GlobalTensor, LocalTensor, LocalTensorAuto, MrgSortSrcList | |||
| 83 | from .types import ( | 85 | from .types import ( |
| 84 | BinaryRepeatParams, | 86 | BinaryRepeatParams, |
| 85 | BrcbRepeatParams, | 87 | BrcbRepeatParams, |
| 88 | + CheckLocalMemoryIAParam, | ||
| 86 | CopyRepeatParams, | 89 | CopyRepeatParams, |
| 87 | DataCopyParams, | 90 | DataCopyParams, |
| 88 | DataCopyEnhancedParams, | 91 | DataCopyEnhancedParams, |
| @@ -181,6 +184,8 @@ __all__ = [ | |||
| 181 | "CacheLine", | 184 | "CacheLine", |
| 182 | "DcciDst", | 185 | "DcciDst", |
| 183 | "MatmulConfigMode", | 186 | "MatmulConfigMode", |
| 187 | + "AtomicDtype", | ||
| 188 | + "AtomicOp", | ||
| 184 | # .ir_value | 189 | # .ir_value |
| 185 | "GlobalAddress", | 190 | "GlobalAddress", |
| 186 | # .memory_allocator | 191 | # .memory_allocator |
| @@ -205,6 +210,7 @@ __all__ = [ | |||
| 205 | # .core.types | 210 | # .core.types |
| 206 | "BinaryRepeatParams", | 211 | "BinaryRepeatParams", |
| 207 | "BrcbRepeatParams", | 212 | "BrcbRepeatParams", |
| 213 | + "CheckLocalMemoryIAParam", | ||
| 208 | "CopyRepeatParams", | 214 | "CopyRepeatParams", |
| 209 | "DataCopyEnhancedParams", | 215 | "DataCopyEnhancedParams", |
| 210 | "DataCopyExtParams", | 216 | "DataCopyExtParams", |
| @@ -297,4 +297,18 @@ class CO2Layout(IntEnum): | |||
| 297 | class SelMode(IntEnum): | 297 | class SelMode(IntEnum): |
| 298 | VSEL_CMPMASK_SPR = 0, | 298 | VSEL_CMPMASK_SPR = 0, |
| 299 | VSEL_TENSOR_SCALAR_MODE = 1, | 299 | VSEL_TENSOR_SCALAR_MODE = 1, |
| 300 | - VSEL_TENSOR_TENSOR_MODE = 2, | 300 | + VSEL_TENSOR_TENSOR_MODE = 2, |
| 301 | + | ||
| 302 | + | ||
| 303 | +class AtomicDtype(IntEnum): | ||
| 304 | + ATOMIC_NONE = 0 | ||
| 305 | + ATOMIC_F32 = 1 | ||
| 306 | + ATOMIC_F16 = 2 | ||
| 307 | + ATOMIC_S16 = 3 | ||
| 308 | + ATOMIC_S32 = 4 | ||
| 309 | + ATOMIC_S8 = 5 | ||
| 310 | + ATOMIC_BF16 = 6 | ||
| 311 | + | ||
| 312 | + | ||
| 313 | +class AtomicOp(IntEnum): | ||
| 314 | + ATOMIC_SUM = 0 | ||
| @@ -517,7 +517,7 @@ class TensorShape(Tuple[int, ...]): | |||
| 517 | return cls.new_impl((cls.as_int(arg), )) | 517 | return cls.new_impl((cls.as_int(arg), )) |
| 518 | 518 | ||
| 519 | 519 | ||
| 520 | - def as_int(value: Any) -> Optional[int]: | 520 | + def as_int(value: Any) -> RuntimeInt: |
| 521 | try: | 521 | try: |
| 522 | return int(value) | 522 | return int(value) |
| 523 | except Exception as e: | 523 | except Exception as e: |
| @@ -1925,7 +1925,6 @@ class VdeqInfo(IRValue): | |||
| 1925 | offset: List[int], | 1925 | offset: List[int], |
| 1926 | sign_mode: List[bool], | 1926 | sign_mode: List[bool], |
| 1927 | ) -> None: | 1927 | ) -> None: |
| 1928 | - | ||
| 1929 | ... | 1928 | ... |
| 1930 | 1929 | ||
| 1931 | 1930 | ||
| @@ -1933,7 +1932,6 @@ class VdeqInfo(IRValue): | |||
| 1933 | """This contructor should not be called by user""" | 1932 | """This contructor should not be called by user""" |
| 1934 | ... | 1933 | ... |
| 1935 | 1934 | ||
| 1936 | - | ||
| 1937 | 1935 | ||
| 1938 | def __init__( | 1936 | def __init__( |
| 1939 | self, | 1937 | self, |
| @@ -1979,3 +1977,85 @@ class VdeqInfo(IRValue): | |||
| 1979 | 1977 | ||
| 1980 | def to_ir(self) -> IRHandle: | 1978 | def to_ir(self) -> IRHandle: |
| 1981 | return self.handle | 1979 | return self.handle |
| 1980 | + | ||
| 1981 | + | ||
| 1982 | +class CheckLocalMemoryIAParam(IRValue): | ||
| 1983 | + | ||
| 1984 | + | ||
| 1985 | + def __init__(self, | ||
| 1986 | + enable_bit: int = 0, | ||
| 1987 | + start_addr: int = 0, | ||
| 1988 | + end_addr: int = 0, | ||
| 1989 | + is_scalar_read: bool = False, | ||
| 1990 | + is_scalar_write: bool = False, | ||
| 1991 | + is_vector_read: bool = False, | ||
| 1992 | + is_vector_write: bool = False, | ||
| 1993 | + is_mte_read: bool = False, | ||
| 1994 | + is_mte_write: bool = False, | ||
| 1995 | + is_enable: bool = False) -> None: | ||
| 1996 | + ... | ||
| 1997 | + | ||
| 1998 | + | ||
| 1999 | + def __init__(self, handle: IRHandle) -> None: | ||
| 2000 | + | ||
| 2001 | + """This constructor should not be called by user""" | ||
| 2002 | + ... | ||
| 2003 | + | ||
| 2004 | + | ||
| 2005 | + def __init__(self, | ||
| 2006 | + enable_bit: RuntimeInt = 0, | ||
| 2007 | + start_addr: RuntimeInt = 0, | ||
| 2008 | + end_addr: RuntimeInt = 0, | ||
| 2009 | + is_scalar_read: RuntimeBool = False, | ||
| 2010 | + is_scalar_write: RuntimeBool = False, | ||
| 2011 | + is_vector_read: RuntimeBool = False, | ||
| 2012 | + is_vector_write: RuntimeBool = False, | ||
| 2013 | + is_mte_read: RuntimeBool = False, | ||
| 2014 | + is_mte_write: RuntimeBool = False, | ||
| 2015 | + is_enable: RuntimeBool = False, | ||
| 2016 | + handle: Optional[IRHandle] = None) -> None: | ||
| 2017 | + | ||
| 2018 | + if handle is not None: | ||
| 2019 | + self.handle = handle | ||
| 2020 | + return | ||
| 2021 | + | ||
| 2022 | + builder = global_builder.get_ir_builder() | ||
| 2023 | + | ||
| 2024 | + enable_bit_ir = _mat(enable_bit, KT.uint8).to_ir() | ||
| 2025 | + start_addr_ir = _mat(start_addr, KT.uint32).to_ir() | ||
| 2026 | + end_addr_ir = _mat(end_addr, KT.uint32).to_ir() | ||
| 2027 | + is_scalar_read_ir = _mat(is_scalar_read, KT.int1).to_ir() | ||
| 2028 | + is_scalar_write_ir = _mat(is_scalar_write, KT.int1).to_ir() | ||
| 2029 | + is_vector_read_ir = _mat(is_vector_read, KT.int1).to_ir() | ||
| 2030 | + is_vector_write_ir = _mat(is_vector_write, KT.int1).to_ir() | ||
| 2031 | + is_mte_read_ir = _mat(is_mte_read, KT.int1).to_ir() | ||
| 2032 | + is_mte_write_ir = _mat(is_mte_write, KT.int1).to_ir() | ||
| 2033 | + is_enable_ir = _mat(is_enable, KT.int1).to_ir() | ||
| 2034 | + | ||
| 2035 | + self.handle = builder.create_asc_ConstructOp( | ||
| 2036 | + builder.get_asc_CheckLocalMemoryIAParamType(), | ||
| 2037 | + [enable_bit_ir, start_addr_ir, end_addr_ir, | ||
| 2038 | + is_scalar_read_ir, is_scalar_write_ir, | ||
| 2039 | + is_vector_read_ir, is_vector_write_ir, | ||
| 2040 | + is_mte_read_ir, is_mte_write_ir, | ||
| 2041 | + is_enable_ir], | ||
| 2042 | + builder.get_type_array_attr([ | ||
| 2043 | + builder.get_ui8_type(), | ||
| 2044 | + builder.get_ui32_type(), | ||
| 2045 | + builder.get_ui32_type(), | ||
| 2046 | + builder.get_i1_type(), | ||
| 2047 | + builder.get_i1_type(), | ||
| 2048 | + builder.get_i1_type(), | ||
| 2049 | + builder.get_i1_type(), | ||
| 2050 | + builder.get_i1_type(), | ||
| 2051 | + builder.get_i1_type(), | ||
| 2052 | + builder.get_i1_type(), | ||
| 2053 | + ]) | ||
| 2054 | + ) | ||
| 2055 | + | ||
| 2056 | + | ||
| 2057 | + def from_ir(cls, handle: IRHandle) -> "CheckLocalMemoryIAParam": | ||
| 2058 | + return cls(handle=handle) | ||
| 2059 | + | ||
| 2060 | + def to_ir(self) -> IRHandle: | ||
| 2061 | + return self.handle | ||
| @@ -901,20 +901,44 @@ void bind_create_asc_event_operations(py::class_<PyOpBuilder> &clss) | |||
| 901 | ; | 901 | ; |
| 902 | } | 902 | } |
| 903 | 903 | ||
| 904 | -void bind_vec_operations(py::class_<PyOpBuilder> &clss) | 904 | +void bind_create_asc_common_operations(py::class_<PyOpBuilder> &clss) |
| 905 | { | 905 | { |
| 906 | using ret = py::return_value_policy; | 906 | using ret = py::return_value_policy; |
| 907 | using namespace pybind11::literals; | 907 | using namespace pybind11::literals; |
| 908 | 908 | ||
| 909 | - clss.def("create_asc_GatherMaskOp", [](PyOpBuilder &self, const Value &dst, const Value &src0, | 909 | + clss.def("create_asc_GatherMaskAndResult", [](PyOpBuilder &self, const Type &type, const Value &dst, const Value &src0, |
| 910 | const Value &src1Pattern, const Value &reduceMode, const Value &mask, | 910 | const Value &src1Pattern, const Value &reduceMode, const Value &mask, |
| 911 | - const Value ¶ms, const Value &rsvdCnt, uint8_t mode) { | 911 | + const Value ¶ms, uint8_t mode) { |
| 912 | auto modeAttr = ascendc::symbolizeGatherMaskMode(mode); | 912 | auto modeAttr = ascendc::symbolizeGatherMaskMode(mode); |
| 913 | if (!modeAttr) { | 913 | if (!modeAttr) { |
| 914 | throw std::runtime_error("Unknown mode for GatherMaskOp"); | 914 | throw std::runtime_error("Unknown mode for GatherMaskOp"); |
| 915 | } | 915 | } |
| 916 | - self.create<ascendc::GatherMaskOp>(dst, src0, src1Pattern, reduceMode, mask, params, rsvdCnt, *modeAttr); | 916 | + return self.create<ascendc::GatherMaskOp>(type, dst, src0, src1Pattern, reduceMode, mask, params, *modeAttr).getResult(); |
| 917 | }); | 917 | }); |
| 918 | + clss.def("create_asc_GetMrgSortResults", [](PyOpBuilder &self, | ||
| 919 | + const Type &type1, const Type &type2, const Type &type3, const Type &type4) { | ||
| 920 | + auto operation = self.create<ascendc::GetMrgSortResultOp>(type1, type2, type3, type4); | ||
| 921 | + return py::make_tuple(operation.getResult(0), operation.getResult(1), operation.getResult(2), operation.getResult(3)); | ||
| 922 | + }); | ||
| 923 | + clss.def("create_asc_GetStoreAtomicConfigAndResult", [](PyOpBuilder &self, const Type &type, const Type &op) { | ||
| 924 | + auto operation = self.create<ascendc::GetStoreAtomicConfigOp>(type, op); | ||
| 925 | + return py::make_tuple(operation.getResult(0), operation.getResult(1)); | ||
| 926 | + }, "type"_a, "op"_a); | ||
| 927 | + clss.def("create_asc_SetStoreAtomicConfigOp", [](PyOpBuilder &self, uint8_t type, uint8_t op) { | ||
| 928 | + auto typeAttr = ascendc::symbolizeAtomicDtype(type); | ||
| 929 | + if (!typeAttr) { | ||
| 930 | + throw std::runtime_error("Unknown type for AtomicDtype"); | ||
| 931 | + } | ||
| 932 | + auto opAttr = ascendc::symbolizeAtomicOp(op); | ||
| 933 | + if (!opAttr) { | ||
| 934 | + throw std::runtime_error("Unknown type for AtomicOp"); | ||
| 935 | + } | ||
| 936 | + self.create<ascendc::SetStoreAtomicConfigOp>(*typeAttr, *opAttr); | ||
| 937 | + }); | ||
| 938 | + clss.def("create_asc_GetStoreAtomicConfigAndResult", [](PyOpBuilder &self, const Type &type, const Type &op) { | ||
| 939 | + auto operation = self.create<ascendc::GetStoreAtomicConfigOp>(type, op); | ||
| 940 | + return py::make_tuple(operation.getResult(0), operation.getResult(1)); | ||
| 941 | + }, "type"_a, "op"_a); | ||
| 918 | } | 942 | } |
| 919 | 943 | ||
| 920 | void pyasc_init_ir_builder(py::module &m) | 944 | void pyasc_init_ir_builder(py::module &m) |
| @@ -945,7 +969,7 @@ void pyasc_init_ir_builder(py::module &m) | |||
| 945 | bind_create_emitasc_operations(clss); | 969 | bind_create_emitasc_operations(clss); |
| 946 | bind_create_asc_pipe_operations(clss); | 970 | bind_create_asc_pipe_operations(clss); |
| 947 | bind_create_asc_event_operations(clss); | 971 | bind_create_asc_event_operations(clss); |
| 948 | - bind_vec_operations(clss); | 972 | + bind_create_asc_common_operations(clss); |
| 949 | } | 973 | } |
| 950 | } // namespace asc | 974 | } // namespace asc |
| 951 | } // namespace pybind11 | 975 | } // namespace pybind11 |
| @@ -782,6 +782,15 @@ def test_set_vector_mask_kernel(mock_launcher_run): | |||
| 782 | assert mock_launcher_run.call_count == 1 | 782 | assert mock_launcher_run.call_count == 1 |
| 783 | 783 | ||
| 784 | 784 | ||
| 785 | +def test_get_mrg_sort_result(mock_launcher_run): | ||
| 786 | + | ||
| 787 | + def kernel_get_mrg_sort_result(): | ||
| 788 | + mrg1, mrg2, mrg3, mrg4 = asc.get_mrg_sort_result() | ||
| 789 | + | ||
| 790 | + result = kernel_get_mrg_sort_result[1]() | ||
| 791 | + assert mock_launcher_run.call_count == 1 | ||
| 792 | + | ||
| 793 | + | ||
| 785 | def test_mrg_sort_kernel(mock_launcher_run): | 794 | def test_mrg_sort_kernel(mock_launcher_run): |
| 786 | 795 | ||
| 787 | 796 | ||
| @@ -923,4 +932,43 @@ def test_trans_data_to_5hd_kernel(mock_launcher_run): | |||
| 923 | asc.trans_data_to_5hd(addr_dst_list, addr_src_list, params) | 932 | asc.trans_data_to_5hd(addr_dst_list, addr_src_list, params) |
| 924 | 933 | ||
| 925 | trans_data_to_5hd_kernel[1]() | 934 | trans_data_to_5hd_kernel[1]() |
| 926 | - assert mock_launcher_run.call_count == 1 | 935 | + assert mock_launcher_run.call_count == 1 |
| 936 | + | ||
| 937 | + | ||
| 938 | +def test_init_soc_state(mock_launcher_run): | ||
| 939 | + | ||
| 940 | + def kernel_init_soc_state() -> None: | ||
| 941 | + asc.init_soc_state() | ||
| 942 | + | ||
| 943 | + kernel_init_soc_state[1]() | ||
| 944 | + assert mock_launcher_run.call_count == 1 | ||
| 945 | + | ||
| 946 | + | ||
| 947 | +def test_set_store_atomic_config(mock_launcher_run): | ||
| 948 | + | ||
| 949 | + def kernel_set_store_atomic_config() -> None: | ||
| 950 | + asc.set_store_atomic_config(asc.AtomicDtype.ATOMIC_F16, asc.AtomicOp.ATOMIC_SUM) | ||
| 951 | + | ||
| 952 | + kernel_set_store_atomic_config[1]() | ||
| 953 | + assert mock_launcher_run.call_count == 1 | ||
| 954 | + | ||
| 955 | + | ||
| 956 | +def test_get_store_atomic_config(mock_launcher_run): | ||
| 957 | + | ||
| 958 | + def kernel_get_store_atomic_config() -> None: | ||
| 959 | + asc.set_store_atomic_config(asc.AtomicDtype.ATOMIC_F16, asc.AtomicOp.ATOMIC_SUM) | ||
| 960 | + atomic_type, atomic_op = asc.get_store_atomic_config() | ||
| 961 | + | ||
| 962 | + kernel_get_store_atomic_config[1]() | ||
| 963 | + assert mock_launcher_run.call_count == 1 | ||
| 964 | + | ||
| 965 | + | ||
| 966 | +def test_check_local_memory_ia(mock_launcher_run): | ||
| 967 | + | ||
| 968 | + def kernel_check_local_memory_ia() -> None: | ||
| 969 | + params = asc.CheckLocalMemoryIAParam() | ||
| 970 | + asc.check_local_memory_ia(params) | ||
| 971 | + | ||
| 972 | + kernel_check_local_memory_ia[1]() | ||
| 973 | + assert mock_launcher_run.call_count == 1 | ||
| 974 | + | ||
| @@ -178,8 +178,7 @@ def test_gather_mask_kernel(mock_launcher_run): | |||
| 178 | gather_mask_mode = asc.GatherMaskMode.DEFAULT | 178 | gather_mask_mode = asc.GatherMaskMode.DEFAULT |
| 179 | mask = 0 | 179 | mask = 0 |
| 180 | params = asc.GatherMaskParams(src0_block_stride=1, repeat_times=1, src0_repeat_stride=0, src1_repeat_stride=0) | 180 | params = asc.GatherMaskParams(src0_block_stride=1, repeat_times=1, src0_repeat_stride=0, src1_repeat_stride=0) |
| 181 | - rsvd_cnt = 0 | 181 | + rsvd_cnt = asc.gather_mask(dst_local, src0_local, pattern_value, reduce_mode, mask, params, gather_mask_mode) |
| 182 | - asc.gather_mask(dst_local, src0_local, pattern_value, reduce_mode, mask, params, rsvd_cnt, gather_mask_mode) | ||
| 183 | 182 | ||
| 184 | gather_mask_kernel[1]() | 183 | gather_mask_kernel[1]() |
| 185 | assert mock_launcher_run.call_count == 1 | 184 | assert mock_launcher_run.call_count == 1 |
| @@ -475,3 +475,29 @@ func.func @emit_set_vector_mask(%len: i32, %maskHigh: i64, %maskLow: i64) { | |||
| 475 | ascendc.set_vector_mask_l1 %maskHigh, %maskLow {dtype = f32, mode = 0 : i32} : i64, i64 | 475 | ascendc.set_vector_mask_l1 %maskHigh, %maskLow {dtype = f32, mode = 0 : i32} : i64, i64 |
| 476 | return | 476 | return |
| 477 | } | 477 | } |
| 478 | + | ||
| 479 | + | ||
| 480 | +// CHECK-LABEL:void emit_common_test() { | ||
| 481 | +// CHECK-NEXT: AscendC::InitSocState(); | ||
| 482 | +// CHECK-NEXT: AscendC::SetStoreAtomicConfig<AscendC::AtomicDtype::ATOMIC_F32, AscendC::AtomicOp::ATOMIC_SUM>(); | ||
| 483 | +// CHECK-NEXT: uint16_t v1; | ||
| 484 | +// CHECK-NEXT: uint16_t v2; | ||
| 485 | +// CHECK-NEXT: AscendC::GetStoreAtomicConfig(v1, v2); | ||
| 486 | +// CHECK-NEXT: constexpr uint8_t v3 = 0; | ||
| 487 | +// CHECK-NEXT: constexpr uint32_t v4 = 0; | ||
| 488 | +// CHECK-NEXT: constexpr bool c0_i1 = false; | ||
| 489 | +// CHECK-NEXT: AscendC::CheckLocalMemoryIAParam v5{v3, v4, v4, c0_i1, c0_i1, c0_i1, c0_i1, c0_i1, c0_i1, c0_i1}; | ||
| 490 | +// CHECK-NEXT: AscendC::CheckLocalMemoryIA(v5); | ||
| 491 | +// CHECK-NEXT: return; | ||
| 492 | +// CHECK-NEXT:} | ||
| 493 | +func.func @emit_common_test() { | ||
| 494 | + ascendc.init_soc_state | ||
| 495 | + ascendc.set_store_atomic_config atomic_f32, atomic_sum | ||
| 496 | + %type, %op = ascendc.get_store_atomic_config : ui16, ui16 | ||
| 497 | + %val_8 = "emitc.constant"() <{value = 0 : ui8}> : () -> ui8 | ||
| 498 | + %val_32 = "emitc.constant"() <{value = 0 : ui32}> : () -> ui32 | ||
| 499 | + %false = arith.constant false | ||
| 500 | + %param = ascendc.construct !ascendc.check_local_memory_ia_param(%val_8, %val_32, %val_32, %false, %false, %false, %false, %false, %false, %false) [ui8, ui32, ui32, i1, i1, i1, i1, i1, i1, i1] : ui8, ui32, ui32, i1, i1, i1, i1, i1, i1, i1 | ||
| 501 | + ascendc.check_local_memory_ia %param : !ascendc.check_local_memory_ia_param | ||
| 502 | + return | ||
| 503 | +} | ||
| @@ -9,22 +9,22 @@ | |||
| 9 | // RUN: ascir-translate -mlir-to-ascendc %s | FileCheck %s | 9 | // RUN: ascir-translate -mlir-to-ascendc %s | FileCheck %s |
| 10 | 10 | ||
| 11 | // CHECK-LABEL:void emit_gather_mask(AscendC::LocalTensor<float> v1, AscendC::LocalTensor<float> v2, AscendC::LocalTensor<uint32_t> v3, bool v4, uint32_t v5, AscendC::GatherMaskParams v6, int64_t v7) { | 11 | // CHECK-LABEL:void emit_gather_mask(AscendC::LocalTensor<float> v1, AscendC::LocalTensor<float> v2, AscendC::LocalTensor<uint32_t> v3, bool v4, uint32_t v5, AscendC::GatherMaskParams v6, int64_t v7) { |
| 12 | -// CHECK-NEXT: int64_t v8[1]; | 12 | +// CHECK-NEXT: uint64_t v8; |
| 13 | -// CHECK-NEXT: AscendC::GatherMask<float, uint32_t, AscendC::defaultGatherMaskMode>(v1, v2, v3, v4, v5, v6, *v8); | 13 | +// CHECK-NEXT: AscendC::GatherMask<float, uint32_t, AscendC::defaultGatherMaskMode>(v1, v2, v3, v4, v5, v6, v8); |
| 14 | // CHECK-NEXT: constexpr int8_t c1_i8 = 1; | 14 | // CHECK-NEXT: constexpr int8_t c1_i8 = 1; |
| 15 | -// CHECK-NEXT: AscendC::GatherMask<float, AscendC::defaultGatherMaskMode>(v1, v2, c1_i8, v4, v5, v6, *v8); | 15 | +// CHECK-NEXT: uint64_t v9; |
| 16 | +// CHECK-NEXT: AscendC::GatherMask<float, AscendC::defaultGatherMaskMode>(v1, v2, c1_i8, v4, v5, v6, v9); | ||
| 16 | // CHECK-NEXT: return; | 17 | // CHECK-NEXT: return; |
| 17 | // CHECK-NEXT: } | 18 | // CHECK-NEXT: } |
| 18 | func.func @emit_gather_mask(%dst: !ascendc.local_tensor<1024xf32>, %src0: !ascendc.local_tensor<1024xf32>, | 19 | func.func @emit_gather_mask(%dst: !ascendc.local_tensor<1024xf32>, %src0: !ascendc.local_tensor<1024xf32>, |
| 19 | %pattern_tensor: !ascendc.local_tensor<32xui32>, %reduce_mode: i1, %mask: ui32, | 20 | %pattern_tensor: !ascendc.local_tensor<32xui32>, %reduce_mode: i1, %mask: ui32, |
| 20 | %params: !ascendc.gather_mask_params, %rsvd_cnt: i64) { | 21 | %params: !ascendc.gather_mask_params, %rsvd_cnt: i64) { |
| 21 | - %rsvd_cnt_memref = memref.alloca() : memref<1xi64> | 22 | + %0 = ascendc.gather_mask %dst, %src0, %pattern_tensor, %reduce_mode, %mask, %params, default : |
| 22 | - ascendc.gather_mask %dst, %src0, %pattern_tensor, %reduce_mode, %mask, %params, %rsvd_cnt_memref {gatherMaskMode = 0 : i32} : | 23 | + !ascendc.local_tensor<1024xf32>, !ascendc.local_tensor<1024xf32>, !ascendc.local_tensor<32xui32>, i1, ui32, !ascendc.gather_mask_params -> ui64 |
| 23 | - !ascendc.local_tensor<1024xf32>, !ascendc.local_tensor<1024xf32>, !ascendc.local_tensor<32xui32>, i1, ui32, !ascendc.gather_mask_params, memref<1xi64> | ||
| 24 | 24 | ||
| 25 | %pattern_const = arith.constant 1 : i8 | 25 | %pattern_const = arith.constant 1 : i8 |
| 26 | - ascendc.gather_mask %dst, %src0, %pattern_const, %reduce_mode, %mask, %params, %rsvd_cnt_memref {gatherMaskMode = 0 : i32} : | 26 | + ascendc.gather_mask %dst, %src0, %pattern_const, %reduce_mode, %mask, %params, default : |
| 27 | - !ascendc.local_tensor<1024xf32>, !ascendc.local_tensor<1024xf32>, i8, i1, ui32, !ascendc.gather_mask_params, memref<1xi64> | 27 | + !ascendc.local_tensor<1024xf32>, !ascendc.local_tensor<1024xf32>, i8, i1, ui32, !ascendc.gather_mask_params -> ui64 |
| 28 | return | 28 | return |
| 29 | } | 29 | } |
| 30 | 30 | ||
| @@ -32,6 +32,11 @@ | |||
| 32 | // CHECK-NEXT: v18[c3_idx] = v17; | 32 | // CHECK-NEXT: v18[c3_idx] = v17; |
| 33 | // CHECK-NEXT: AscendC::MrgSort4Info v19{v18, c0_i1, c15_i16, c1_i16}; | 33 | // CHECK-NEXT: AscendC::MrgSort4Info v19{v18, c0_i1, c15_i16, c1_i16}; |
| 34 | // CHECK-NEXT: AscendC::MrgSort(v1, v16, v19); | 34 | // CHECK-NEXT: AscendC::MrgSort(v1, v16, v19); |
| 35 | +// CHECK-NEXT: uint16_t v20; | ||
| 36 | +// CHECK-NEXT: uint16_t v21; | ||
| 37 | +// CHECK-NEXT: uint16_t v22; | ||
| 38 | +// CHECK-NEXT: uint16_t v23; | ||
| 39 | +// CHECK-NEXT: AscendC::GetMrgSortResult(v20, v21, v22, v23); | ||
| 35 | // CHECK-NEXT: return; | 40 | // CHECK-NEXT: return; |
| 36 | // CHECK-NEXT: } | 41 | // CHECK-NEXT: } |
| 37 | func.func @emit_mrg_sort(%dst: !ascendc.local_tensor<1024xf32>, | 42 | func.func @emit_mrg_sort(%dst: !ascendc.local_tensor<1024xf32>, |
| @@ -69,6 +74,7 @@ func.func @emit_mrg_sort(%dst: !ascendc.local_tensor<1024xf32>, | |||
| 69 | memref.store %c16_ui16, %alloca[%c3_idx] : memref<4xui16> | 74 | memref.store %c16_ui16, %alloca[%c3_idx] : memref<4xui16> |
| 70 | %mrg_sort4_info = ascendc.construct !ascendc.mrg_sort4_info(%alloca, %c0_i1, %c15, %c1) [memref<4xui16>, i1, i16, i16] : memref<4xui16>, i1, i16, i16 | 75 | %mrg_sort4_info = ascendc.construct !ascendc.mrg_sort4_info(%alloca, %c0_i1, %c15, %c1) [memref<4xui16>, i1, i16, i16] : memref<4xui16>, i1, i16, i16 |
| 71 | ascendc.mrg_sort_with_info %dst, %mrg_sort_src_list, %mrg_sort4_info : !ascendc.local_tensor<1024xf32>, !ascendc.mrg_sort_src_list<f32>, !ascendc.mrg_sort4_info | 76 | ascendc.mrg_sort_with_info %dst, %mrg_sort_src_list, %mrg_sort4_info : !ascendc.local_tensor<1024xf32>, !ascendc.mrg_sort_src_list<f32>, !ascendc.mrg_sort4_info |
| 77 | + %mrg1, %mrg2 , %mrg3, %mrg4 = ascendc.get_mrg_sort_result : ui16, ui16, ui16, ui16 | ||
| 72 | return | 78 | return |
| 73 | } | 79 | } |
| 74 | 80 | ||