JJérôme Forissierdrivers: caam: fix MP abstraction layer functions
| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
util: define IS_ALIGNED macro Keep a single version of the macro definition. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> | 4 年前 | |
clk: stm32mp15: embed clock names only in debug mode Don't embed clock names when not in debug mode, even when log level is DEBUG_LEVEL. This saves few bytes of SYSRAM for the pager. Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: caam: fix MP abstraction layer functions Compile manufacturing HAL functions only if the platform supports it. Fixes: d538d2936c22 ("drivers: caam: add manufacturing protection feature") Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> | 3 年前 | |
drivers: imx_ele: add ELE driver Add EdgeLock Enclave (or ELE) driver support. ELE is a built-in security subsystem available on imx8ulp and imx93 providing security features to the Cortex-A. Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: stm32_*: remove code for when DT is not supported This change removes implementation managing cases when CFG_EMBED_DTB or CFG_DT are disabled. This change aims to simplify source files and is related to commit [1] from which stm32mp1 platform requires DTB for the drivers configuration. Link: [1] 474ad1856b56 ("plat-stm32mp1: conf: mandate the use of device tree on STM32MP1x platforms") Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: rtc: add RTC API This API allows to interact with a RTC registered as the system RTC. Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com> | 4 年前 | |
drivers: scmi-msg: Propagate errors from platform voltd_get_level plat_scmi_voltd_get_level is refactored to return an SCMI error code and retrieve the voltage via an out parameter. This allows errors from the platform SCMI server implementation to be propagated to the REE. The implementation for stm32mp1 is updated to handle at least some possible errors. Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Anton Eliasson <anton.eliasson@axis.com> | 3 年前 | |
tpm2: Add TPM2 as PCR provider to TCG eventlog parsing framework TCG eventlog parsing framework parses the eventlog and extends the PCR's. For this, it needs a provider for PCR's. Register TPM2 as a provider to this framework. Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 4 年前 | |
drivers: wdt: add SMC handler for arm-smc-wdt Linux driver Add SMC handler to handle SMC coming from Linux arm-smc-wdt driver. This function is meant to be called in sm_platform_handler() since CFG_WDT_SM_HANDLER_ID is going to be defined by the platforms. Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com> | 4 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: atmel-rstc: check for secure status Check for the reset controller secure-status property and if true, then set it as secure. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: atmel-shdwc: check secure status Check for the shutdown controller secure-status property and if true, then set it as secure. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: atmel-shdwc: add atmel shdwc driver Add atmel shdwc driver for sama5d2. This driver uses assembly code which expects to run from a single cache line. For the time being, building this code is restricted to single core system since it rely on the fact that no other cores can invalidate the TLB or the I-cache. This driver will be used by PSCI to shutdown the SoC. Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com> | 4 年前 | |
drivers: atmel_tcb: Use matrix_dt_get_id() to correctly retrieve the id Use matrix_dt_get_id() instead of manual address parsing to determine which matrix ID is to be used. Previously it was plain wrong since it compared a virtual address to a physical one and thus compute a wrong value. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
drivers: atmel_wdt: enable watchdog reset In order to reset the system rather that using an interrupt handler, set the WDT_MR_WDRSTEN bit which allows to reboot the system. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Suggested-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
drivers: bcm_sotp: add sotp write support - Added write support for bcm secure one time programmable fuses. - bcm_iproc_sotp_mem_read() now takes in a bool value for sotp_add_ecc instead of an int to denote if error checking memory is supported. - Updated debug and error messages to return TEE_result codes. Signed-off-by: Vahid Dukandar <vahidd@microsoft.com> Signed-off-by: Andrew Mustea <andrew.mustea@microsoft.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> | 3 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
drivers: dra7_rng: Switch to hw_get_random_bytes() hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so implement just hw_get_random_bytes(). Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: gic: replace spaces with tabs No functional changes. Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 4 年前 | |
core: add driver for hafnium interrupt controller Adds a driver for the paravirtualized interrupt controller provided by Hafnium at S-EL2. The driver is enabled with CFG_CORE_HAFNIUM_INTC=y. The interrupt controller is limited compared to the GIC and only works with interrupt ids which are already added in the SP manifest or as predefined reserved interrupt ids. Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> | 3 年前 | |
drivers: hi16xx_rng: Switch to hw_get_random_bytes() hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so implement just hw_get_random_bytes(). Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
drivers: imx_ele: add ELE driver Add EdgeLock Enclave (or ELE) driver support. ELE is a built-in security subsystem available on imx8ulp and imx93 providing security features to the Cortex-A. Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: imx_lpuart: remove stubbed .flush() implementation There is no need to provide function stubs for unimplemented functions in struct serial_ops. Just let the compiler set the pointer to NULL. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
imx_ocotp: correct ocotp fuse address computation Not all the imx platforms have the same bank spacing. In particular the imx6 and imx7ulp both have bank sizes that are twice as large as the imx8m. The ocotp_get_die_id_mx7ulp() function was written with the old computation, so bank 2, work 6 would be 0x4e0 offset. Using the new calc, bank 1, word 6 would be 0x4e0 offset. So all the bank values should move to bank 1. This will set the correct computation. Signed-off-by: Tim Anderson <tim.anderson@foundries.io> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Clement Faure <clement.faure@nxp.com> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: driver: rework the SC API to make compatible with the new MU driver Rework the SC API to leverage the common MU driver. This re-work implies the deletion of duplicate functions that are now implemented in the MU driver instead Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> | 3 年前 | |
drivers: imx_snvs: re-work security state for imx8m platforms The current implementation of snvs_get_security_cfg() for imx8m platforms includes the read of SYS_SECURE_BOOT bit. This fourth bit shows if the board boots from internal ROM. This bit will reset to 1 for a board in the field and 0 for a test chip. The read of this bit is out of scope of the snvs_get_security_cfg() purpose which is to return the system security configuration. The SYS_SECURE_BOOT bit (msb) can be discarded. Fixes: 5cd93c5a75 (drivers: imx_snvs: fix SNVS security configuration values) Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: implement lpc_uart driver Support for lpc_uart that is a serial driver. Signed-off-by: Xiaoxu Zeng <zengxiaoxu@huawei.com> Signed-off-by: Zeng Tao <prime.zeng@hisilicon.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: drivers: nxp: always disable povdd after trying to fuse the SFP - The LX series manual specifies that the POVDD pin should always be reset to GND before powering off or resetting the SoC. - The SFP driver will leave the POVDD pin raised if it encounters an error while fusing. - Change SFP driver to always unset POVDD after any fuse attempt. Signed-off-by: Andrew Mustea <andrew.mustea@microsoft.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com> | 3 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: gpio.h: Add 'struct gpio_chip *chip' in 'struct gpio_ops' To get the GPIO controller base address, 'struct gpio_chip *chip' is passed as a member in the container 'struct gpio_ops' Also updated bcm_gpio and pl061_gpio as per modified gpio.h definition. Signed-off-by: Manish Tomar <manish.tomar@nxp.com> Reviewed-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com> | 5 年前 | |
core: gpio.h: Add 'struct gpio_chip *chip' in 'struct gpio_ops' To get the GPIO controller base address, 'struct gpio_chip *chip' is passed as a member in the container 'struct gpio_ops' Also updated bcm_gpio and pl061_gpio as per modified gpio.h definition. Signed-off-by: Manish Tomar <manish.tomar@nxp.com> Reviewed-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com> | 5 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: smccc_trng: Switch to hw_get_random_bytes() hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can simply implement just hw_get_random_bytes(). Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
core_mmu: fix phys_to_virt() to check length phys_to_virt() function without length parameter doesn t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesnt have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary. core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled. Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek) | 4 年前 | |
drivers: stm32_*: remove code for when DT is not supported This change removes implementation managing cases when CFG_EMBED_DTB or CFG_DT are disabled. This change aims to simplify source files and is related to commit [1] from which stm32mp1 platform requires DTB for the drivers configuration. Link: [1] 474ad1856b56 ("plat-stm32mp1: conf: mandate the use of device tree on STM32MP1x platforms") Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: stm32_*: remove code for when DT is not supported This change removes implementation managing cases when CFG_EMBED_DTB or CFG_DT are disabled. This change aims to simplify source files and is related to commit [1] from which stm32mp1 platform requires DTB for the drivers configuration. Link: [1] 474ad1856b56 ("plat-stm32mp1: conf: mandate the use of device tree on STM32MP1x platforms") Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: stm32_*: remove code for when DT is not supported This change removes implementation managing cases when CFG_EMBED_DTB or CFG_DT are disabled. This change aims to simplify source files and is related to commit [1] from which stm32mp1 platform requires DTB for the drivers configuration. Link: [1] 474ad1856b56 ("plat-stm32mp1: conf: mandate the use of device tree on STM32MP1x platforms") Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: stm32_i2c: optimize the master receive path Early error detection prevents an invalid read request made to the device from blocking the bus for the whole transfer timeout. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> | 3 年前 | |
drivers: stm32_iwdg: implementation of independent watchdog Implements independent watchdog (IWDG) driver to help detecting malfunctions due to software or hardware failures. IWDG instances are clocked by an independent clock and stays active if the main clock fails. The driver mandates IWDG instances configuration from an embedded DTB. For the list of features, refer to the reference manuals at: https://wiki.st.com/stm32mpu/wiki/STM32MP15_resources Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> | 4 年前 | |
drivers: stm32_*: remove code for when DT is not supported This change removes implementation managing cases when CFG_EMBED_DTB or CFG_DT are disabled. This change aims to simplify source files and is related to commit [1] from which stm32mp1 platform requires DTB for the drivers configuration. Link: [1] 474ad1856b56 ("plat-stm32mp1: conf: mandate the use of device tree on STM32MP1x platforms") Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: stm32_shared_io: introduce shared io driver This commit implements shared registers support, previously handled in core/arch/arm/plat-stm32mp1/shared_resources.c, at platform level. Default enable CFG_STM32_SHARED_IO. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: add stm32 tamper domain driver Adds stm32_tamp driver for stm32mp1 TAMP sub-system. The implementation only covers probing of the driver upon embedded DTB content and enabling some secure configuration. Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> | 4 年前 | |
drivers: stm32_*: remove code for when DT is not supported This change removes implementation managing cases when CFG_EMBED_DTB or CFG_DT are disabled. This change aims to simplify source files and is related to commit [1] from which stm32mp1 platform requires DTB for the drivers configuration. Link: [1] 474ad1856b56 ("plat-stm32mp1: conf: mandate the use of device tree on STM32MP1x platforms") Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: stm32mp15_huk: use DT HUK NVMEM layout API Adds the possibility to get the HUK from OTP definition in the device tree using the function stm32_bsec_find_otp_in_nvmem_layout(). Signed-off-by: Thomas BOURGOIN <thomas.bourgoin@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: stpmic1: export regulators API in a specific header file Split stpmic1.h in 2 parts, one specifically for STPMIC1 regulator interface. Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> | 4 年前 | |
drivers: imx_ele: add ELE driver Add EdgeLock Enclave (or ELE) driver support. ELE is a built-in security subsystem available on imx8ulp and imx93 providing security features to the Cortex-A. Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: tzc380: fix the lockdown range register value This register controls the range of regions that are locked down. The number of regions to lockdown are defined in [1]: lockdown_range[3:0] and its value goes from b0000 to b1111. If the goal of tzc_regions_lockdown() is to lock all regions supported by the platforms, then the value of lockdown_range[3:0] should be equal to no_of_regions[3:0] of the configuration register [2]. Currently, tzc.num_regions is used to defined the lockdown range which is incorrect because it has been incremented during initialization. Fix the issue by decrementing tzc.num_regions before the configuration of lockdown_range[3:0]. Link: [1] https://developer.arm.com/documentation/ddi0431/c/programmers-model/register-descriptions/lockdown-range-register Link: [2] https://developer.arm.com/documentation/ddi0431/c/programmers-model/register-descriptions/configuration-register Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> | 4 年前 | |
tzc400: simplify tzc_configure_region() arguments Change tzc_configure_region() to used the newly defined structure tzc_region_config. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> | 6 年前 | |
drivers: versal: general purpose i/o Provide access to the GPIO controller on Versal ACAP. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> | 3 年前 | |
drivers: versal: hardware unique key The hardware unique key is calculated as the AS-GCM encrypted value of the SoC DNA unique identifier. The key source used for encryption is selectable at build time using the CFG_VERSAL_HUK_KEY configuration flag. The following sources are supported VERSAL_AES_EFUSE_USER_KEY_0 (CFG_VERSAL_HUK_KEY = 6) VERSAL_AES_EFUSE_USER_KEY_1 (CFG_VERSAL_HUK_KEY = 7) VERSAL_AES_PUF_KEY (CFG_VERSAL_HUK_KEY = 11) VERSAL_AES_USER_KEY_0 (CFG_VERSAL_HUK_KEY = 12 (default)) The default configuration does not generate a secret HUK since the key is hardcoded in the driver - it however validates the algorithm; but security-wise it is not different than not enabling CFG_VERSAL_HUK and therefore using the OP-TEE provided HUK stub. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: versal: mailbox communication Mailbox driver to communicate with the PLM firmware executing on the Microblaze processor. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: versal: non volatile memory (eFuse and BBRAM) Provide an interface to access the xilnvm service executing in the PLM firmware running on the Microblaze processor. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: versal_pm: fix compilation issue The "struct ipi_cmd" was used during the development of the versal_mbox driver; during the mbox driver review, the struct was renamed to versal_ipi_cmd. The code being removed in this commit was merged by mistake. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> | 3 年前 | |
drivers: versal: physical unclonable function This driver uses the PLM xilpuf service to deliver the physical unclonable function (PUF). The Physical unclonable function (PUF) generates two device unique signatures per die. One signature is used for the key encryption key (KEK) and one signature is used as an unique identification value. The Unique ID is fully accessible and its value can be cleared (hidden) and regenerated. The KEK is never accessible and only usable from the AES-GCM engine. https://github.com/Xilinx/embeddedsw [1] TRM: https://docs.xilinx.com/r/en-US/am011-versal-acap-trm Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> | 3 年前 | |
drivers: versal: SHA3-384 engine support Enable the PLM controlled SHA3-384 cryptographic engine for TEE core usage. Since the engine does not have the concept of "context", it can't provide the level support required by user-space (multiple parallel contexts) hence why it is being provided just to the core. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Nathan Menhorn <nathan.menhorn@amd.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> | 3 年前 | |
drivers: versal: true random number generator Configure the TRNG driver to operate in Hybrid mode with derivative function. This driver was ported from its original FSBL implementation [1]. [1] https://github.com/Xilinx/embeddedsw Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
core: dt: Make it possible to alter device mapping In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device. When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly. This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
zynqmp: drivers: AES-GCM with PUF KEK Provide a mechanism to encrypt a red key using the KEK; the KEK is only available on secured boards after the RSA_EN and PPK eFUSES have been burnt (the system will only boot ROM authenticated bootloaders from here on). The main use case for OP-TEE would be to encode the zynqmp per device unique identifier (DNA0, DNA1, DNA2 eFUSEs - ie, a red key) using the KEK. The encryption key generated this way is cryptographically strong and will be used as the device HUK (ie, black key). Test code: csu_aes_encrypt_data(src, dst, BLOB_DATA_SIZE, tag, GCM_TAG_SIZE, iv, GCM_IV_SIZE, CSU_AES_KEY_SRC_DEV); csu_aes_decrypt_data(dst, src, BLOB_DATA_SIZE, tag, GCM_TAG_SIZE, iv, GCM_IV_SIZE, CSU_AES_KEY_SRC_DEV); if (memcmp(src, buffer, BLOB_DATA_SIZE)) { EMSG(" - encrypt/decrypt test failed"); Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 4 年前 | |
core: drivers: zynqmp_csu_puf.c: increase regen time to 6ms With further evaluation of the ZU+ PUF, we have determined that it is possible for the PUF regeneration time to exceed 3ms. For this reason, the 2023.1 version of the Xilinx xilskey library will bump the wait time for PUF regeneration to 6ms. This patch brings optee in line with this change. Signed-off-by: Neal Frager <neal.frager@amd.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.io> | 3 年前 | |
zynqmp: drivers: CSUDMA module This module provides a mechanism to transfer data between memory and peripherals. The data path is selected in the Secure Stream Switch register in the CSU. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 4 年前 | |
drivers: zynqmp_huk: Add AES eFuse and HUK seed support When AES eFuse is used to encrypt boot loaders and bitstreams then PUF functionality is not available for use. When AES eFuse based encryption is in use AES eFuse key becomes device key instead of PUF generated key. In order to re-plenish additional device specific entropy that PUF would provide utilize selected set of User programmable eFuses. Selected user eFuses should be programmed during device manufacturing with cryptographically good random numbers. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 | |
drivers: zymqmp_pm: add USER eFuse support Adds necessary defines for accessing USER eFuses. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> | 3 年前 |