| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
fix compile error undefined reference to `up_send_smp_call' Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch/arm64: support smp call in BMP Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch: move some macros to public code. Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch: up_addrenv_kstackfree use delayfree Only nxsched_release_tcb call up_addrenv_kstackfree, nxsched_releasetcb should use mm_delayfree instead of mm_free, because mm_free will assert for sem_wait in IDLELOOP. Signed-off-by: guanyi3 <guanyi3@xiaomi.com> | 2 个月前 | |
arm64: add mpu_addrenv.c empty implementation and change arm64_addrenv.c -> mmu_addrenv.c The support for the kernel stack in protected mode requires enabling the addrenv. Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arm64: Armv8-R aarch64 MPU stack dynamic_protect Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch/arm64: use UP_DSB, UP_DMB, UP_ISB as barrier standard API Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com> | 2 个月前 | |
arch/arm64: use UP_DSB, UP_DMB, UP_ISB as barrier standard API Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com> | 2 个月前 | |
fix compiler error common/arm64_createstack.c: In function 'up_create_stack': common/arm64_createstack.c:128:36: error: 'alignment' undeclared (first use in this function) 128 | group_memalign(tcb->group, alignment, stack_size); | ^~~~~~~~~ common/arm64_createstack.c:128:36: note: each undeclared identifier is reported only once for each function it appears in CC: ctype/lib_tolower.c make[1]: *** [Makefile:143：arm64_createstack.o] 错误 1 Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch/arm64: use UP_DSB, UP_DMB, UP_ISB as barrier standard API Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com> | 2 个月前 | |
arm64: fvp add support for BMP remove g_smp_busy_wait_flag Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arm64: not use tpidrro_el0 store exception_depth Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch/arm64: Add clkdev driver for generic timer. This commit added clkdev driver for arm64 generic timer. Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com> | 2 个月前 | |
arch/arm64: add timer initialization for the secondary CPUs. This commit added timer initialization for the secondary CPUs. Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com> | 2 个月前 | |
arm: skip backtrace asan check Signed-off-by: yinshengkai <yinshengkai@xiaomi.com> | 2 个月前 | |
arch/arm64_boot.c: Fixed the boot stage stuttering issue on iMX8QM. Before we disable dcache, we should flush all dcache. Signed-off-by: songjunfan <songjunfan@xiaomi.com> | 2 个月前 | |
Delete unused functions Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com> | 2 个月前 | |
sched/irq: add a check for the interrupt stack in irq_dispatch After irq_dispatch finished, the interrupt stack will be checked to determine whether overflow occurs. The relevant configuration reuses the configuration of stack overflow detection during context switching. Since the interrupt stack is calculated differently in different architectures, I specifically set the case where check_size is 0 to calculate the entire interrupt stack to ensure that each architecture can use its own implementation to calculate the size of the entire stack. Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com> | 2 个月前 | |
arch/arm/psci: Fixed the poweroff command blocking problem. Summary: 1. Delete redundant psci_cpu_reset interfaces 2. Adjust the correct interfaces for poweroff and reset Signed-off-by: wangming9 <wangming9@xiaomi.com> | 2 个月前 | |
pcsi: fix pcsi link failed when not enabled PCSI Signed-off-by: ligd <liguiding1@xiaomi.com> | 2 个月前 | |
arm64: fvp add support for BMP remove g_smp_busy_wait_flag Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arm64: use percpu regs store tls Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
nuttx/atomic: replace atomic_fetch_xxx with atomic_xxx just like zephyr Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com> | 2 个月前 | |
sched/arch: move suspend/resume scheduler to arch irq handler Move nxsched_suspend_scheduler/nxsched_resume_scheduler from nxsched_switch to arch-specific IRQ handlers. This change: 1. Fixes missing suspend/resume in SMP sched IPI handler (arm_smp_sched_handler calls nxsched_switch_running directly without going through nxsched_switch) 2. Avoids spurious suspend/resume when ISR triggers multiple context switches (e.g., sem_post to tasks A->B->C only records suspend(old)->resume(C), not intermediate transitions) Signed-off-by: ligd <liguiding1@xiaomi.com> | 2 个月前 | |
sched: unify the thread exit running task behavior. We already split switch_context into nxsched_suspend_scheduler and nxsched_resume_scheduler, when task_exit, set running = NULL for more compatible. The switch context is much more frequency than task_exit, we should prefer decrease the switch_context record time cost. Also the x_doirq xcp.regs save will be more unified. Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com> Signed-off-by: ligd <liguiding1@xiaomi.com> | 2 个月前 | |
arm64: use percpu regs store tls Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
assert: remove its noreturn declaration Currently, sometimes we cannot view the function parameters before the __assert function. This is because __assert is declared with noreturn, the compiler will not save the callee-saved registers of caller, and gdb cannot parse through the coredump. Therefore, we need to remove the noreturn declaration. __assert will call abort at the end, and abort is actually a noreturn function, so this does not change the actual behavior of __assert. To ensure the semantics of the PANIC and ASSERT macros remain unchanged and to prevent the compiler from incorrectly analyzing the original code, I added logic_unreachable to minimize the impact on the original semantics. Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com> | 2 个月前 | |
arch/arm64: Delete the default save for SCTLR Currently, the SCTLR register is only used to switch the thread MTE state and has no other uses. Because saving this register is special, it will take a long time after testing, so the default saving behavior is deleted. Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com> | 2 个月前 | |
arch/arm64: remove struct regs_context Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com> Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com> | 2 个月前 | |
Revert "irq: add [enter|leave]_critical_section_nonirq" This reverts commit 62d3fe9fccc8d5b056f5bc0c7fd715beddfed405. Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch/arm64: repace ncpus to percpu Signed-off-by: buxiasen <buxiasen@xiaomi.com> | 2 个月前 | |
arch/arm64: remove struct regs_context Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com> Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com> | 2 个月前 | |
Merge branch 'master' into vela apache/nuttx commit id: eb27ebba8adfe29644a7b890f86e6f16941921dc Signed-off-by: ligd <liguiding1@xiaomi.com> Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com> | 2 个月前 | |
arm64: fvp add support for BMP remove g_smp_busy_wait_flag Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch/arm64: fix BIT_MASK uses This updates arch/arm64 to drop redefinition of BIT_MASK and use GENMASK(h,l) defined by nuttx/bits.h instead. Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com> | 2 个月前 | |
arm64/gicv2: irq trigger guard The IRQ trigger function shall not be guarded for SMP only. Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com> | 2 个月前 | |
arch/arm64: add api to config irq type Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com> | 2 个月前 | |
arch/arm64: support smp call in BMP Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arm64: Use tpidr_el0/tpidrro_el0 to store the percpu base address. TPIDR_EL0 can be accessed by both user mode and the kernel. Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
fs/hostfs: add link, symlink, readlink and lstat support Implemented link(), symlink(), readlink() and lstat() in hostfs. Signed-off-by: zhengyu16 <zhengyu16@xiaomi.com> | 2 个月前 | |
arm64/hwdebug: support armv8r hwdebug These two registers need to be cleared before arm64-r hwdebug can be used.The arm64-a does not have such stringent requirements. Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com> | 2 个月前 | |
arm64: Support hardware debug Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com> | 2 个月前 | |
sched/semaphore: support recursive write in sem_rw lock Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com> | 2 个月前 | |
arm64: use percpu regs store tls Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arm64: not use tpidrro_el0 store exception_depth Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arm64: fvp add support for BMP remove g_smp_busy_wait_flag Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch/arm64: get_cpu_id according to the correct affinity level Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com> | 2 个月前 | |
note: Fix compilation errors Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com> | 2 个月前 | |
arm64: fix create page table err arm64 only PA_BITS=52 level 0 can be used as BlockDescriptors Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com> | 2 个月前 | |
modifyreg16: use small lock in modifyreg16 reason: We would like to replace the big lock with a small lock. Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
modifyreg[8|32]: use small lock in modifyreg[8|32] reason: We would like to replace the big lock with a small lock. Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
modifyreg[8|32]: use small lock in modifyreg[8|32] reason: We would like to replace the big lock with a small lock. Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch/arm64: repace ncpus to percpu Signed-off-by: buxiasen <buxiasen@xiaomi.com> | 2 个月前 | |
arm64: add mpu_usedregion interface Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
mte/kasan: Implementing KASAN memory protection for ARM64 hardware MTE 1. Add hw_tags.c, which will call arm64_mte to implement tagging of memory blocks by operating registers 2. It has been able to run normally on the default NX memory allocator, excluding mempool and tlsf 3. On more complex configurations, memory tests such as memstress can run normally without system crashes Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com> | 2 个月前 | |
up_nputs: fix AddressSanitizer: global-buffer-overflow problem ==2117790==ERROR: AddressSanitizer: global-buffer-overflow on address 0x64d9e3c0 at pc 0x59ac4e16 bp 0xcefe8058 sp 0xcefe8048 READ of size 1 at 0x64d9e3c0 thread T0 #0 0x59ac4e15 in up_nputs sim/up_nputs.c:54 #1 0x59a67e4c in syslog_default_write syslog/syslog_channel.c:220 #2 0x59a67823 in syslog_default_write syslog/syslog_write.c:101 #3 0x59a67f10 in syslog_write syslog/syslog_write.c:153 #4 0x59a651c3 in syslogstream_flush syslog/syslog_stream.c:60 #5 0x59a6564e in syslogstream_addchar syslog/syslog_stream.c:104 #6 0x59a6576f in syslogstream_putc syslog/syslog_stream.c:140 #7 0x5989fc4d in vsprintf_internal stdio/lib_libvsprintf.c:952 #8 0x598a1298 in lib_vsprintf stdio/lib_libvsprintf.c:1379 #9 0x59a64ea4 in nx_vsyslog syslog/vsyslog.c:223 #10 0x598a601a in vsyslog syslog/lib_syslog.c:68 #11 0x59b0e3dc in AIOTJS::logPrintf(int, char const*, ...) src/ajs_log.cpp:45 #12 0x59b03d56 in jse_dump_obj src/jse/quickjs/jse_quickjs.cpp:569 #13 0x59b03ea1 in jse_dump_error1(JSContext*, unsigned long long) src/jse/quickjs/jse_quickjs.cpp:602 #14 0x59b03dd9 in jse_dump_error(JSContext*) src/jse/quickjs/jse_quickjs.cpp:591 #15 0x59bed615 in ferry::DomComponent::callHook(char const*) src/framework/dom/component.cpp:65 #16 0x59bfe0ff in ferry::DomComponent::initialize() src/framework/dom/component.cpp:645 #17 0x59bb141d in dom_create_component(JSContext*, unsigned long long, unsigned long long, unsigned long long) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x365c41d) #18 0x59b4c0d3 in AIOTJS::__createComponent(JSContext*, unsigned long long, int, unsigned long long*) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x35f70d3) #19 0x5a56ec17 in js_call_c_function quickjs/quickjs.c:16108 Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com> | 2 个月前 | |
perf: add noinstrument_function to up_perf_gettime and related functions Add noinstrument_function attribute to up_perf_gettime and its helper functions (like cp15_pmu_rdccr) across all architectures. These functions are called by perf_gettime which is used in the instrument callback path, and must not be instrumented to avoid infinite recursion when CONFIG_ARCH_INSTRUMENT_ALL is enabled. Signed-off-by: yezhonghui <yezhonghui@xiaomi.com> | 2 个月前 | |
group:move addrenv to group struct addrenv is for task group so move it to group Signed-off-by: anjiahao <anjiahao@xiaomi.com> | 2 个月前 | |
arm64: Use tpidr_el0/tpidrro_el0 to store the percpu base address. TPIDR_EL0 can be accessed by both user mode and the kernel. Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
nuttx/atomic: replace atomic_fetch_xxx with atomic_xxx just like zephyr Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com> | 2 个月前 | |
perf:fix compile error that arm platform now not support pmu Signed-off-by: zhangwenjian <zhangwenjian@xiaomi.com> | 2 个月前 | |
arm64: support protectbuild Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch/arm64: Delete the default save for SCTLR Currently, the SCTLR register is only used to switch the thread MTE state and has no other uses. Because saving this register is special, it will take a long time after testing, so the default saving behavior is deleted. Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com> | 2 个月前 | |
nuttx/atomic: replace atomic_fetch_xxx with atomic_xxx just like zephyr Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com> | 2 个月前 | |
arch/arm64: Delete the default save for SCTLR Currently, the SCTLR register is only used to switch the thread MTE state and has no other uses. Because saving this register is special, it will take a long time after testing, so the default saving behavior is deleted. Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com> | 2 个月前 | |
arch: set g_running_task to NULL before context restore in sigdeliver For architectures using syscall-based fullcontextrestore (arm_a_r, arm64, risc-v, tricore), the restore goes through irq_dispatch which reads g_running_task->xcp.regs on entry. If g_running_task is not NULL, irq_dispatch overwrites tcb->xcp.regs with the syscall exception frame, causing the syscall to return to the wrong context instead of restoring saved_regs. Set g_running_task = NULL before setting xcp.regs and calling fullcontextrestore, so irq_dispatch allocates a fresh temp stack frame and correctly restores the saved context. Signed-off-by: ligd <liguiding1@xiaomi.com> | 2 个月前 | |
arch/arm64: support decouple signal related function from arch code Signed-off-by: guoshichao <guoshichao@xiaomi.com> | 2 个月前 | |
Merge remote-tracking branch 'mirtos/master' into dev-upmerge-nuttx-10.3-0806 Signed-off-by: liuhaitao <liuhaitao@xiaomi.com> | 2 个月前 | |
arch/arm64: Optimize the initialization of the timer. This commit optimized the initialization of the ARM generic timer for each cpu core. Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com> | 2 个月前 | |
arch/arm64: support smp call in BMP Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arch: Make STACK_ALIGNMENT consistent with TLS_STACK_ALIGNMENT when CONFIG_TLS_ALIGNED=y Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
sched: unify the thread exit running task behavior. We already split switch_context into nxsched_suspend_scheduler and nxsched_resume_scheduler, when task_exit, set running = NULL for more compatible. The switch context is much more frequency than task_exit, we should prefer decrease the switch_context record time cost. Also the x_doirq xcp.regs save will be more unified. Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com> Signed-off-by: ligd <liguiding1@xiaomi.com> | 2 个月前 | |
arm64: support protectbuild Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arm64: fix register size error The size of arm64 should be 8 instead of 4 Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com> | 2 个月前 | |
arch/stack_align: decrease the stack align requirements. Add ttype in up_use_stack API. We can always get tls by tcb if Flat, and through syscall if no aligned, so don't need to make kstack aligned with TLS_STACK_ALIGN. If always stack aligned will very easy to cause memory fragment when long time used. For BMP case, _percpu_size don't have to align with TLS_STACK_ALIGN after this patch, as .percpu.bss stack don't have to TLS_STACK_ALIGN. TLS_ALIGNED depends on BUILD_KERNEL || BUILD_PROTECTED. We can suppose TLS_ALIGNED will never defined in BUILD_FLAT. Signed-off-by: buxiasen <buxiasen@xiaomi.com> | 2 个月前 | |
arm64: not use tpidrro_el0 store exception_depth Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
arm64: fvp add support for BMP remove g_smp_busy_wait_flag Signed-off-by: hujun5 <hujun5@xiaomi.com> | 2 个月前 | |
elf:use SUBALIGN(SECTIONS_ALIGN) set elf section sh_aligment Some architectures of the MPU have alignment requirements for the starting position, so use SUBALGIN to set the alignment. Signed-off-by: anjiahao <anjiahao@xiaomi.com> | 2 个月前 | |
Merge branch 'master' into vela apache/nuttx commit id: eb27ebba8adfe29644a7b890f86e6f16941921dc Signed-off-by: ligd <liguiding1@xiaomi.com> Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com> | 2 个月前 |
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