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dt-bindings: Remove 'Device Tree Bindings' from end of title: As indicated in link: https://lore.kernel.org/all/20220822204945.GA808626-robh@kernel.org/ DT schema files should not have 'Device Tree Binding' as part of there title: line. Remove this in most .yaml files, so hopefully preventing developers copying it into new .yaml files, and being asked to remove it. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20220825020427.3460650-1-andrew@lunn.ch Signed-off-by: Rob Herring <robh@kernel.org> | 3 年前 | |
dt-bindings: iommu: dart: Add t8103-usb4-dart compatible mainline inclusion from mainline-v6.8-rc1 commit a08bd8df97b7549fe0edc53d087322314a0c4dfe category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I938E2 CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=a08bd8df97b7549fe0edc53d087322314a0c4dfe -------------------------------- This DART variant is found in the t8103 (M1) SoCs and used for the USB4/Thunderbolt PCIe ports. Unlike the regular t8103 DART these support up to 64 SIDs and require a slightly different MMIO layout. Acked-by: Hector Martin <marcan@marcan.st> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sven Peter <sven@svenpeter.dev> Link: https://lore.kernel.org/r/20231126151701.16534-2-sven@svenpeter.dev Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Jason Zeng <jason.zeng@intel.com> | 2 年前 | |
dt-bindings: iommu: apple,sart: Add apple,t8112-sart compatible string "apple,t8112-sart" as found on the Apple M2 SoC appears to be SART3 as well. To allow for later discovered incompatibilities use '"apple,t8112-sart", "apple,t6000-sart"' as compatible string. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: Hector Martin <marcan@marcan.st> | 3 年前 | |
dt-bindings: iommu: arm,smmu-v3: Relax order of interrupt names The QEMU devicetree uses a different order for SMMUv3 interrupt names, and there isn't a good reason for enforcing a specific order. Since all interrupt lines are optional, operating systems should not expect a fixed interrupt array layout; they should instead match each interrupt to its name individually. Besides, as a result of commit e4783856a2e8 ("dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optional"), "cmdq-sync" and "priq" are already permutable. Relax the interrupt-names array entirely by allowing any permutation, incidentally making the schema more readable. Note that dt-validate won't allow duplicate names here so we don't need to specify maxItems or add additional checks, it's quite neat. Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Acked-by: Will Deacon <will@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220916133145.1910549-1-jean-philippe@linaro.org Signed-off-by: Joerg Roedel <jroedel@suse.de> | 3 年前 | |
dt-bindings: arm-smmu: Fix SDM630 clocks description SDM630 was abusingly referencing one of the internal bus clocks, that were recently dropped from Linux (because the original implementation did not make much sense), circumventing the interconnect framework. Fix it by dropping the bus-mm clock (which requires separating 630 from similar entries) and keeping the rest as-is. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v2-4-1e506593b1bd@linaro.org Signed-off-by: Will Deacon <will@kernel.org> | 2 年前 | |
ub: ubmem_vmmu: HiSilicon ubmem_vmmu Architecture Implementation driver inclusion category: feature bugzilla: https://atomgit.com/openeuler/kernel/issues/8519 CVE: NA ----------------------------------------------------------- This patch includes the implementation of the HiSilicon ubmem_vmmu architecture. Signed-off-by: Zhipeng Lu <luzhipeng8@h-partners.com> | 5 个月前 | |
iommu/ummu: Add UMMU devicetree file ubmmu driver inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/ID40QK ----------------------------------------------------------- This patch add ummu devicetree file Signed-off-by: Jingbin Wu <wujingbin2@huawei.com> Signed-off-by: Liming An <anliming1@h-partners.com> | 8 个月前 | |
dt-bindings: Document stall property for IOMMU masters On ARM systems, some platform devices behind an IOMMU may support stall, which is the ability to recover from page faults. Let the firmware tell us when a device supports stall. Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Link: https://lore.kernel.org/r/20210526161927.24268-2-jean-philippe@linaro.org Signed-off-by: Will Deacon <will@kernel.org> | 5 年前 | |
dt-bindings: mediatek: mt8188: Add binding for MM & INFRA IOMMU Add descriptions for mt8188 IOMMU which also use ARM Short-Descriptor translation table format. In mt8188, there are two smi-common HW and IOMMU, one is for vdo(video output), the other is for vpp(video processing pipe). They connects with different smi-larbs, then some setting(larbid_remap) is different. Differentiate them with the compatible string. Something like this: IOMMU(VDO) IOMMU(VPP) | | SMI_COMMON_VDO SMI_COMMON_VPP --------------- ---------------- | | ... | | ... larb0 larb2 ... larb1 larb3 ... We also have an IOMMU that is for infra master like PCIe. And infra master don't have the larb and ports. Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com> Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230602090227.7264-2-yong.wu@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de> | 2 年前 | |
documentation: iommu: Add bindings for msm,iommu-v0 ip The MSM IOMMU is an implementation compatible with the ARM VMSA short descriptor page tables. It provides address translation for bus masters outside of the CPU, each connected to the IOMMU through a port called micro-TLB. Adding the DT bindings for the same. Signed-off-by: Sricharan R <sricharan@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Joerg Roedel <jroedel@suse.de> | 9 年前 | |
iommu/tegra: smmu: Add device tree support for SMMU The necessary info is expected to pass from DT. For more precise resource reservation, there shouldn't be any overlapping of register range between SMMU and MC. SMMU register offset needs to be calculated correctly, based on its register bank. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> | 13 年前 | |
dt-bindings: iommu: qcom,iommu: Add QSMMUv2 and MSM8976 compatibles Add compatible string "qcom,msm-iommu-v2" for the inner node, along with "qcom,msm8976-iommu" as a first user of it and "qcom,msm-iommu-v2-ns" and "qcom,msm-iommu-v2-sec" for the context bank nodes to support Qualcomm's secure fw "SMMU v2" implementation. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230622092742.74819-6-angelogioacchino.delregno@collabora.com Signed-off-by: Will Deacon <will@kernel.org> | 2 年前 | |
dt-bindings: iommu: renesas, ipmmu-vmsa: Update for R-Car Gen4 Since R-Car Gen4 does not have the main IPMMU IMSSTR register, update the bindings to drop the interrupt bit number from the renesas,ipmmu-main property. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [geert: Re-add removed items level, add minItems/maxItems constraints] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230313124026.954514-1-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Joerg Roedel <jroedel@suse.de> | 3 年前 | |
dt-bindings: More dropping redundant minItems/maxItems Another round of removing redundant minItems/maxItems from new schema in the recent merge window. If a property has an 'items' list, then a 'minItems' or 'maxItems' with the same size as the list is redundant and can be dropped. Note that is DT schema specific behavior and not standard json-schema behavior. The tooling will fixup the final schema adding any unspecified minItems/maxItems. This condition is partially checked with the meta-schema already, but only if both 'minItems' and 'maxItems' are equal to the 'items' length. An improved meta-schema is pending. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Will Deacon <will@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kamal Dasu <kdasu.kdev@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Sebastian Siewior <bigeasy@linutronix.de> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: linux-clk@vger.kernel.org Cc: iommu@lists.linux-foundation.org Cc: linux-mtd@lists.infradead.org Cc: linux-rtc@vger.kernel.org Cc: linux-usb@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20210713193453.690290-1-robh@kernel.org | 4 年前 | |
Merge tag 'iommu-updates-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: - Intel VT-d driver updates: - Domain force snooping improvement. - Cleanups, no intentional functional changes. - ARM SMMU driver updates: - Add new Qualcomm device-tree compatible strings - Add new Nvidia device-tree compatible string for Tegra234 - Fix UAF in SMMUv3 shared virtual addressing code - Force identity-mapped domains for users of ye olde SMMU legacy binding - Minor cleanups - Fix a BUG_ON in the vfio_iommu_group_notifier: - Groundwork for upcoming iommufd framework - Introduction of DMA ownership so that an entire IOMMU group is either controlled by the kernel or by user-space - MT8195 and MT8186 support in the Mediatek IOMMU driver - Make forcing of cache-coherent DMA more coherent between IOMMU drivers - Fixes for thunderbolt device DMA protection - Various smaller fixes and cleanups * tag 'iommu-updates-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (88 commits) iommu/amd: Increase timeout waiting for GA log enablement iommu/s390: Tolerate repeat attach_dev calls iommu/vt-d: Remove hard coding PGSNP bit in PASID entries iommu/vt-d: Remove domain_update_iommu_snooping() iommu/vt-d: Check domain force_snooping against attached devices iommu/vt-d: Block force-snoop domain attaching if no SC support iommu/vt-d: Size Page Request Queue to avoid overflow condition iommu/vt-d: Fold dmar_insert_one_dev_info() into its caller iommu/vt-d: Change return type of dmar_insert_one_dev_info() iommu/vt-d: Remove unneeded validity check on dev iommu/dma: Explicitly sort PCI DMA windows iommu/dma: Fix iova map result check bug iommu/mediatek: Fix NULL pointer dereference when printing dev_name iommu: iommu_group_claim_dma_owner() must always assign a domain iommu/arm-smmu: Force identity domains for legacy binding iommu/arm-smmu: Support Tegra234 SMMU dt-bindings: arm-smmu: Add compatible for Tegra234 SOC dt-bindings: arm-smmu: Document nvidia,memory-controller property iommu/arm-smmu-qcom: Add SC8280XP support dt-bindings: arm-smmu: Add compatible for Qualcomm SC8280XP ... | 4 年前 | |
dt-bindings: iommu: add bindings for sprd IOMMU This IOMMU module can be used by Unisoc's multimedia devices, such as display, Image codec(jpeg) and a few signal processors, including VSP(video), GSP(graphic), ISP(image), and CPP(camera pixel processor), etc. Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Link: https://lore.kernel.org/r/20210305093216.201897-2-zhang.lyra@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de> | 5 年前 | |
Documentation: dt: Update OMAP iommu bindings for DRA7 DSPs The DSP processor sub-systems on DRA7xx have two MMU instances each, one for the processor core and the other for an internal EDMA block. These MMUs need an additional shared register to be programmed in the DSP_SYSTEM sub-module to be enabled properly. The OMAP IOMMU bindings is updated to account for this additional syscon property required for these DSP IOMMU instances on DRA7xx SoCs. A new compatible "ti,dra7-dsp-iommu" is also defined to distinguish these devices specifically from other DRA7 IOMMU devices. An example of the DRA7 DSP IOMMU nodes is also added to the document for clarity. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Joerg Roedel <jroedel@suse.de> | 10 年前 | |
dt-bindings: use capital "OR" for multiple licenses in SPDX Documentation/process/license-rules.rst and checkpatch expect the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Correct also the format // -> .* in few Allwinner binding headers as pointed out by checkpatch: WARNING: Improper SPDX comment style for 'include/dt-bindings/reset/sun50i-h6-ccu.h', please use '/*' instead Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20230823084540.112602-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org> | 2 年前 |
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