| 文件 | 最后提交记录 | 最后更新时间 |
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Add Om for Kunpeng Opts | 5 个月前 | |
[BOLT] Add skip-non-simple for boltdiff Extra filtering for boltdiff, excluding non-simple functions from comparison. Reviewed By: #bolt, maksfb Differential Revision: https://reviews.llvm.org/D151510 | 3 年前 | |
[BOLT][CMake] Don't export bolt libraries in LLVMExports.cmake Bolt makes use of add_llvm_library and as such ends up exporting its libraries from LLVMExports.cmake, which is not correct. Bolt doesn't have its own exports file, and I assume that there is no desire to have one either -- Bolt libraries are not intended to be consumed as a cmake module, right? As such, this PR adds a NO_EXPORT option to simplify exclude these libraries from the exports file. | 8 个月前 | |
[BOLT][DWARF] Add test for DW_AT_ranges input without function output (#81794) Added a test that relies on -fbasic-block-sections=all and --gc-sections that exercises a code path that previously printed a warning. | 1 年前 | |
[BOLT] Move from RuntimeDyld to JITLink RuntimeDyld has been deprecated in favor of JITLink. [1] This patch replaces all uses of RuntimeDyld in BOLT with JITLink. Care has been taken to minimize the impact on the code structure in order to ease the inspection of this (rather large) changeset. Since BOLT relied on the RuntimeDyld API in multiple places, this wasn't always possible though and I'll explain the changes in code structure first. Design note: BOLT uses a JIT linker to perform what essentially is static linking. No linked code is ever executed; the result of linking is simply written back to an executable file. For this reason, I restricted myself to the use of the core JITLink library and avoided ORC as much as possible. RuntimeDyld contains methods for loading objects (loadObject) and symbol lookup (getSymbol). Since JITLink doesn't provide a class with a similar interface, the BOLTLinker abstract class was added to implement it. It was added to Core since both the Rewrite and RuntimeLibs libraries make use of it. Wherever a RuntimeDyld object was used before, it was replaced with a BOLTLinker object. There is one major difference between the RuntimeDyld and BOLTLinker interfaces: in JITLink, section allocation and the application of fixups (relocation) happens in a single call (jitlink::link). That is, there is no separate method like finalizeWithMemoryManagerLocking in RuntimeDyld. BOLT used to remap sections between allocating (loadObject) and linking them (finalizeWithMemoryManagerLocking). This doesn't work anymore with JITLink. Instead, BOLTLinker::loadObject accepts a callback that is called before fixups are applied which is used to remap sections. The actual implementation of the BOLTLinker interface lives in the JITLinkLinker class in the Rewrite library. It's the only part of the BOLT code that should directly interact with the JITLink API. For loading object, JITLinkLinker first creates a LinkGraph (jitlink::createLinkGraphFromObject) and then links it (jitlink::link). For the latter, it uses a custom JITLinkContext with the following properties: - Use BOLT's ExecutableFileMemoryManager. This one was updated to implement the JITLinkMemoryManager interface. Since BOLT never executes code, its finalization step is a no-op. - Pass config: don't use the default target passes since they modify DWARF sections in a way that seems incompatible with BOLT. Also run a custom pre-prune pass that makes sure sections without symbols are not pruned by JITLink. - Implement symbol lookup. This used to be implemented by BOLTSymbolResolver. - Call the section mapper callback before the final linking step. - Copy symbol values when the LinkGraph is resolved. Symbols are stored inside JITLinkLinker to ensure that later objects (i.e., instrumentation libraries) can find them. This functionality used to be provided by RuntimeDyld but I did not find a way to use JITLink directly for this. Some more minor points of interest: - BinarySection::SectionID: JITLink doesn't have something equivalent to RuntimeDyld's Section IDs. Instead, sections can only be referred to by name. Hence, SectionID was updated to a string. - There seem to be no tests for Mach-O. I've tested a small hello-world style binary but not more than that. - On Mach-O, JITLink "normalizes" section names to include the segment name. I had to parse the section name back from this manually which feels slightly hacky. [1] https://reviews.llvm.org/D145686#4222642 Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D147544 | 3 年前 | |
[Backport][BOLT] Update for rename of MemLifetimePolicy in e994f84c8a6. | 10 个月前 | |
[BOLT] Improve Linux Kernel ORC reader * Sort ORC entries in the internal table. Older Linux kernels did not sort them in the file (only during boot time). * Add an option to dump sorted ORC tables (--dump-orc). * Associate entries in the internal ORC table with a BinaryFunction even when we are not changing the function. * If the function doesn't have ORC entry at the start, propagate ORC state from a previous entry. Reviewed By: Amir Differential Revision: https://reviews.llvm.org/D155767 | 2 年前 | |
[Backport][BOLT] Incorporate umask into the output file permission Fix https://github.com/llvm/llvm-project/issues/65061 Reviewed By: maksfb, Amir Differential Revision: https://reviews.llvm.org/D159407 | 10 个月前 | |
[BOLT][NFC] Add post-CFG processing to MetadataRewriter interface Add MetadataRewriter::postCFGInitializer(). Reviewed By: jobnoorman Differential Revision: https://reviews.llvm.org/D155153 | 2 年前 | |
[Backport][BOLT] Calculate input to output address map using BOLTLinker BOLT uses MCAsmLayout to calculate the output values of basic blocks. This means output values are calculated based on a pre-linking state and any changes to symbol values during linking will cause incorrect values to be used. This issue was first addressed in D154604 by adding all basic block symbols to the symbol table for the linker to resolve them. However, the runtime overhead of handling this huge symbol table turned out to be prohibitively large. This patch solves the issue in a different way. First, a temporary section containing [input address, output symbol] pairs is emitted to the intermediary object file. The linker will resolve all these references so we end up with a section of [input address, output address] pairs. This section is then parsed and used to: - Replace BinaryBasicBlock::OffsetTranslationTable - Replace BinaryFunction::InputOffsetToAddressMap - Update BinaryBasicBlock::OutputAddressRange Note that the reason this is more performant than the previous attempt is that these symbol references do not cause entries to be added to the symbol table. Instead, section-relative references are used for the relocations. Reviewed By: maksfb Differential Revision: https://reviews.llvm.org/D155604 | 10 个月前 | |
!351 merge dev17-bolt-port into dev_17.0.6 [BOLT] Port from llvm-bolt repo [Part 1] Created-by: eastb233 Commit-by: rfwang07;牟文龙 Merged-by: openeuler-ci-bot Description: <!-- 感谢您的合入申请！ --> **PR功能描述 / 为什么需要这个合入：** llvm-bolt仓归入llvm主仓后，存量patch迁移 https://atomgit.com/src-openeuler/llvm-bolt 1、更新第一部分补丁， 0006-AArch64-Add-CFG-block-count-correction-optimization.patch补丁存在构建和用例问题，单独提交 - 0010-AArch64-Add-hybrid-guess-approach-for-edge-weight-estimation.patch - 0011-support-D-FOT-addrs-data-parsing-for-optimized-binary.patch - 0012-Add-Om-for-Kunpeng-Opts.patch - 0013-add-strict-to-Om.patch 2、用上游社区补丁代替 0003-AArch64-Add-AArch64-support-for-inline.patch：https://atomgit.com/openeuler/llvm-project/pull/360 0004-Bolt-Solving-pie-support-issue.patch：https://atomgit.com/openeuler/llvm-project/pull/364 0005-BOLT-AArch64-Don-t-change-layout-in-PatchEntries.patch：https://atomgit.com/openeuler/llvm-project/pull/362 0007-BOLT-Skip-PLT-search-for-zero-value-weak-reference-symbols.patch：https://atomgit.com/openeuler/llvm-project/pull/365 0008-merge-fdata-Support-process-no_lbr-profile-file.patch：https://atomgit.com/openeuler/llvm-project/pull/363 3、0006-AArch64-Add-CFG-block-count-correction-optimization.patch补丁PR https://atomgit.com/openeuler/llvm-project/pull/372 <!-- 回合上游社区补丁请附上社区链接 --> **希望检视人员了解的内容：** **Checklist:** PR格式 - [ ] PR标题简要总结修改内容 - [ ] commit message是否使用模板，请配置git config commit.template .gitee/commit_message - [ ] PR是否关联issue - [ ] PR是否设置审查人员（主要成员为[@cf-zhao](https://gitee.com/cf-zhao),[@eastb233](https://gitee.com/eastb233),[@liyunfei33](https://gitee.com/liyunfei33),[@wangqiang95](https://gitee.com/wangqiang95),[@chenzheng1030](https://gitee.com/chenzheng1030)） 功能验证 - 修改涉及后端架构 - [ ] 架构无关 - [ ] AArch64 - [ ] X86_64 - [ ] RISC-V - [ ] LoongArch - [ ] 其他 - CI门禁 - [x] （默认触发）基础测试 - [ ] （可选）质量加固测试，评论关键字触发/mtestrun See merge request: openeuler/llvm-project!351 | 5 个月前 | |
[BOLT][NFCI] Use MetadataRewriter interface to update SDT markers Migrate SDT markers processing to the new MetadataRewriter interface. Depends on D154020 Reviewed By: Amir Differential Revision: https://reviews.llvm.org/D154021 | 2 年前 |
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