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!351 merge dev17-bolt-port into dev_17.0.6 [BOLT] Port from llvm-bolt repo [Part 1] Created-by: eastb233 Commit-by: rfwang07;牟文龙 Merged-by: openeuler-ci-bot Description: <!-- 感谢您的合入申请！ --> **PR功能描述 / 为什么需要这个合入：** llvm-bolt仓归入llvm主仓后，存量patch迁移 https://atomgit.com/src-openeuler/llvm-bolt 1、更新第一部分补丁， 0006-AArch64-Add-CFG-block-count-correction-optimization.patch补丁存在构建和用例问题，单独提交 - 0010-AArch64-Add-hybrid-guess-approach-for-edge-weight-estimation.patch - 0011-support-D-FOT-addrs-data-parsing-for-optimized-binary.patch - 0012-Add-Om-for-Kunpeng-Opts.patch - 0013-add-strict-to-Om.patch 2、用上游社区补丁代替 0003-AArch64-Add-AArch64-support-for-inline.patch：https://atomgit.com/openeuler/llvm-project/pull/360 0004-Bolt-Solving-pie-support-issue.patch：https://atomgit.com/openeuler/llvm-project/pull/364 0005-BOLT-AArch64-Don-t-change-layout-in-PatchEntries.patch：https://atomgit.com/openeuler/llvm-project/pull/362 0007-BOLT-Skip-PLT-search-for-zero-value-weak-reference-symbols.patch：https://atomgit.com/openeuler/llvm-project/pull/365 0008-merge-fdata-Support-process-no_lbr-profile-file.patch：https://atomgit.com/openeuler/llvm-project/pull/363 3、0006-AArch64-Add-CFG-block-count-correction-optimization.patch补丁PR https://atomgit.com/openeuler/llvm-project/pull/372 <!-- 回合上游社区补丁请附上社区链接 --> **希望检视人员了解的内容：** **Checklist:** PR格式 - [ ] PR标题简要总结修改内容 - [ ] commit message是否使用模板，请配置git config commit.template .gitee/commit_message - [ ] PR是否关联issue - [ ] PR是否设置审查人员（主要成员为[@cf-zhao](https://gitee.com/cf-zhao),[@eastb233](https://gitee.com/eastb233),[@liyunfei33](https://gitee.com/liyunfei33),[@wangqiang95](https://gitee.com/wangqiang95),[@chenzheng1030](https://gitee.com/chenzheng1030)） 功能验证 - 修改涉及后端架构 - [ ] 架构无关 - [ ] AArch64 - [ ] X86_64 - [ ] RISC-V - [ ] LoongArch - [ ] 其他 - CI门禁 - [x] （默认触发）基础测试 - [ ] （可选）质量加固测试，评论关键字触发/mtestrun See merge request: openeuler/llvm-project!351 | 5 个月前 | |
!351 merge dev17-bolt-port into dev_17.0.6 [BOLT] Port from llvm-bolt repo [Part 1] Created-by: eastb233 Commit-by: rfwang07;牟文龙 Merged-by: openeuler-ci-bot Description: <!-- 感谢您的合入申请！ --> **PR功能描述 / 为什么需要这个合入：** llvm-bolt仓归入llvm主仓后，存量patch迁移 https://atomgit.com/src-openeuler/llvm-bolt 1、更新第一部分补丁， 0006-AArch64-Add-CFG-block-count-correction-optimization.patch补丁存在构建和用例问题，单独提交 - 0010-AArch64-Add-hybrid-guess-approach-for-edge-weight-estimation.patch - 0011-support-D-FOT-addrs-data-parsing-for-optimized-binary.patch - 0012-Add-Om-for-Kunpeng-Opts.patch - 0013-add-strict-to-Om.patch 2、用上游社区补丁代替 0003-AArch64-Add-AArch64-support-for-inline.patch：https://atomgit.com/openeuler/llvm-project/pull/360 0004-Bolt-Solving-pie-support-issue.patch：https://atomgit.com/openeuler/llvm-project/pull/364 0005-BOLT-AArch64-Don-t-change-layout-in-PatchEntries.patch：https://atomgit.com/openeuler/llvm-project/pull/362 0007-BOLT-Skip-PLT-search-for-zero-value-weak-reference-symbols.patch：https://atomgit.com/openeuler/llvm-project/pull/365 0008-merge-fdata-Support-process-no_lbr-profile-file.patch：https://atomgit.com/openeuler/llvm-project/pull/363 3、0006-AArch64-Add-CFG-block-count-correction-optimization.patch补丁PR https://atomgit.com/openeuler/llvm-project/pull/372 <!-- 回合上游社区补丁请附上社区链接 --> **希望检视人员了解的内容：** **Checklist:** PR格式 - [ ] PR标题简要总结修改内容 - [ ] commit message是否使用模板，请配置git config commit.template .gitee/commit_message - [ ] PR是否关联issue - [ ] PR是否设置审查人员（主要成员为[@cf-zhao](https://gitee.com/cf-zhao),[@eastb233](https://gitee.com/eastb233),[@liyunfei33](https://gitee.com/liyunfei33),[@wangqiang95](https://gitee.com/wangqiang95),[@chenzheng1030](https://gitee.com/chenzheng1030)） 功能验证 - 修改涉及后端架构 - [ ] 架构无关 - [ ] AArch64 - [ ] X86_64 - [ ] RISC-V - [ ] LoongArch - [ ] 其他 - CI门禁 - [x] （默认触发）基础测试 - [ ] （可选）质量加固测试，评论关键字触发/mtestrun See merge request: openeuler/llvm-project!351 | 5 个月前 | |
!351 merge dev17-bolt-port into dev_17.0.6 [BOLT] Port from llvm-bolt repo [Part 1] Created-by: eastb233 Commit-by: rfwang07;牟文龙 Merged-by: openeuler-ci-bot Description: <!-- 感谢您的合入申请！ --> **PR功能描述 / 为什么需要这个合入：** llvm-bolt仓归入llvm主仓后，存量patch迁移 https://atomgit.com/src-openeuler/llvm-bolt 1、更新第一部分补丁， 0006-AArch64-Add-CFG-block-count-correction-optimization.patch补丁存在构建和用例问题，单独提交 - 0010-AArch64-Add-hybrid-guess-approach-for-edge-weight-estimation.patch - 0011-support-D-FOT-addrs-data-parsing-for-optimized-binary.patch - 0012-Add-Om-for-Kunpeng-Opts.patch - 0013-add-strict-to-Om.patch 2、用上游社区补丁代替 0003-AArch64-Add-AArch64-support-for-inline.patch：https://atomgit.com/openeuler/llvm-project/pull/360 0004-Bolt-Solving-pie-support-issue.patch：https://atomgit.com/openeuler/llvm-project/pull/364 0005-BOLT-AArch64-Don-t-change-layout-in-PatchEntries.patch：https://atomgit.com/openeuler/llvm-project/pull/362 0007-BOLT-Skip-PLT-search-for-zero-value-weak-reference-symbols.patch：https://atomgit.com/openeuler/llvm-project/pull/365 0008-merge-fdata-Support-process-no_lbr-profile-file.patch：https://atomgit.com/openeuler/llvm-project/pull/363 3、0006-AArch64-Add-CFG-block-count-correction-optimization.patch补丁PR https://atomgit.com/openeuler/llvm-project/pull/372 <!-- 回合上游社区补丁请附上社区链接 --> **希望检视人员了解的内容：** **Checklist:** PR格式 - [ ] PR标题简要总结修改内容 - [ ] commit message是否使用模板，请配置git config commit.template .gitee/commit_message - [ ] PR是否关联issue - [ ] PR是否设置审查人员（主要成员为[@cf-zhao](https://gitee.com/cf-zhao),[@eastb233](https://gitee.com/eastb233),[@liyunfei33](https://gitee.com/liyunfei33),[@wangqiang95](https://gitee.com/wangqiang95),[@chenzheng1030](https://gitee.com/chenzheng1030)） 功能验证 - 修改涉及后端架构 - [ ] 架构无关 - [ ] AArch64 - [ ] X86_64 - [ ] RISC-V - [ ] LoongArch - [ ] 其他 - CI门禁 - [x] （默认触发）基础测试 - [ ] （可选）质量加固测试，评论关键字触发/mtestrun See merge request: openeuler/llvm-project!351 | 5 个月前 | |
!351 merge dev17-bolt-port into dev_17.0.6 [BOLT] Port from llvm-bolt repo [Part 1] Created-by: eastb233 Commit-by: rfwang07;牟文龙 Merged-by: openeuler-ci-bot Description: <!-- 感谢您的合入申请！ --> **PR功能描述 / 为什么需要这个合入：** llvm-bolt仓归入llvm主仓后，存量patch迁移 https://atomgit.com/src-openeuler/llvm-bolt 1、更新第一部分补丁， 0006-AArch64-Add-CFG-block-count-correction-optimization.patch补丁存在构建和用例问题，单独提交 - 0010-AArch64-Add-hybrid-guess-approach-for-edge-weight-estimation.patch - 0011-support-D-FOT-addrs-data-parsing-for-optimized-binary.patch - 0012-Add-Om-for-Kunpeng-Opts.patch - 0013-add-strict-to-Om.patch 2、用上游社区补丁代替 0003-AArch64-Add-AArch64-support-for-inline.patch：https://atomgit.com/openeuler/llvm-project/pull/360 0004-Bolt-Solving-pie-support-issue.patch：https://atomgit.com/openeuler/llvm-project/pull/364 0005-BOLT-AArch64-Don-t-change-layout-in-PatchEntries.patch：https://atomgit.com/openeuler/llvm-project/pull/362 0007-BOLT-Skip-PLT-search-for-zero-value-weak-reference-symbols.patch：https://atomgit.com/openeuler/llvm-project/pull/365 0008-merge-fdata-Support-process-no_lbr-profile-file.patch：https://atomgit.com/openeuler/llvm-project/pull/363 3、0006-AArch64-Add-CFG-block-count-correction-optimization.patch补丁PR https://atomgit.com/openeuler/llvm-project/pull/372 <!-- 回合上游社区补丁请附上社区链接 --> **希望检视人员了解的内容：** **Checklist:** PR格式 - [ ] PR标题简要总结修改内容 - [ ] commit message是否使用模板，请配置git config commit.template .gitee/commit_message - [ ] PR是否关联issue - [ ] PR是否设置审查人员（主要成员为[@cf-zhao](https://gitee.com/cf-zhao),[@eastb233](https://gitee.com/eastb233),[@liyunfei33](https://gitee.com/liyunfei33),[@wangqiang95](https://gitee.com/wangqiang95),[@chenzheng1030](https://gitee.com/chenzheng1030)） 功能验证 - 修改涉及后端架构 - [ ] 架构无关 - [ ] AArch64 - [ ] X86_64 - [ ] RISC-V - [ ] LoongArch - [ ] 其他 - CI门禁 - [x] （默认触发）基础测试 - [ ] （可选）质量加固测试，评论关键字触发/mtestrun See merge request: openeuler/llvm-project!351 | 5 个月前 | |
[BOLT] Add option instrumentation-max-size for bump allocator (#174716) While the current max memory size is sufficient for most binaries, a few binaries may encouter insufficient allocated memory space. Allow specify the max memory size of the instrumentation bump allocator. | 5 个月前 | |
[BOLT][AArch64]support inline-small-functions for AArch64 (#120187) Add some functions in AArch64MCPlusBuilder.cpp to support inline for AArch64. | 5 个月前 | |
[BOLT] Port from llvm-bolt repo [Part 4] Co-authored-by: rfwang07<wangrufeng5@huawei.com> Co-authored-by: eastb233<xiezhiheng@huawei.com> | 5 个月前 | |
Rebase: [NFC] Refactor sources to be buildable in shared mode Summary: Moves source files into separate components, and make explicit component dependency on each other, so LLVM build system knows how to build BOLT in BUILD_SHARED_LIBS=ON. Please use the -c merge.renamelimit=230 git option when rebasing your work on top of this change. To achieve this, we create a new library to hold core IR files (most classes beginning with Binary in their names), a new library to hold Utils, some command line options shared across both RewriteInstance and core IR files, a new library called Rewrite to hold most classes concerned with running top-level functions coordinating the binary rewriting process, and a new library called Profile to hold classes dealing with profile reading and writing. To remove the dependency from BinaryContext into X86-specific classes, we do some refactoring on the BinaryContext constructor to receive a reference to the specific backend directly from RewriteInstance. Then, the dependency on X86 or AArch64-specific classes is transfered to the Rewrite library. We can't have the Core library depend on targets because targets depend on Core (which would create a cycle). Files implementing the entry point of a tool are transferred to the tools/ folder. All header files are transferred to the include/ folder. The src/ folder was renamed to lib/. (cherry picked from FBD32746834) | 4 年前 |
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