| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
[Backport][BOLT][AArch64] Handle IFUNCS properly (#71104) Currently we were testing only the binaries compiled with O0, which results in indirect call to the IFUNC trampoline and the trampoline has associated IFUNC symbol with it. Compile with O3 results in direct calling the IFUNC trampoline and no symbols are associated with it, the IFUNC symbol address becomes the same as IFUNC resolver address. Since no symbol was associated the BF was not created before PLT analyze and be the algorithm we're going to analyze target relocation. As we're expecting the JUMP relocation we're also expecting the associated symbol with it to be presented. But for IFUNC relocation the IRELATIVE relocation is used and no symbol is associated with it, the addend value is pointing on the target symbol, so we need to find BF using it and use it's symbol in this situation. Currently this is checked only for AArch64 platform, so I've limited it in code to use this logic only for this platform, although I wouldn't be surprised if other platforms needs to activate this logic too. | 10 个月前 | |
[BOLT] Search section based on relocation symbol We need to search referenced section based on relocations symbol section to properly match end section symbols. For example on some binaries we can observe that init_array_end/fini_array_end might be "placed" in to the gap and since no section could be found for address the relocation would be skipped resulting in wrong ADRP imm after emitting new text resulting in binary sigsegv. Credits for the test to Vladislav Khmelevskii aka yota9. | 3 年前 | |
[DWARF] Add printout for op-index This is a preparatory patch for extending DWARFDebugLine to properly parse line number programs with maximum_operations_per_instruction > 1 for VLIW targets. Add some scaffolding for handling op-index in line number programs, and add printouts for that in the table. As this affects a lot of tests, this is done in a separate commit to get a cleaner review for the actual op-index implementation. Verbose printouts are not present in many tests, and adding op-index to those will require a bit more code changes, so that is done in the actual implementation patch. Reviewed By: StephenTozer Differential Revision: https://reviews.llvm.org/D152535 | 2 年前 | |
[Backport][BOLT] Return proper minimal alignment from BF (#67707) Currently minimal alignment of function is hardcoded to 2 bytes. Add 2 more cases: 1. In case BF is data in code return the alignment of CI as minimal alignment 2. For aarch64 and riscv platforms return the minimal value of 4 (added test for aarch64) Otherwise fallback to returning the 2 as it previously was. | 10 个月前 | |
[BOLT][TEST] Use double dash flags in tests Replace a single dash with a double dash for options that have more than a single letter. llvm-bolt-wrapper.py has special treatment for output options such as "-o" and "-w" causing issues when a single dash is used, e.g. for "-write-dwp". The wrapper can be fixed as well, but using a double dash has other advantages as well. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D127538 | 4 年前 | |
[Backport][BOLT] Fix .relr section addend patching The new relocation offset in .relr section patching was calculated wrong previously. Pass the new file offset to lambda instead of re-calculating it in it. Test removes relocation from mytext section, so in case of wrong offset calculation we won't emit right addend value in expected place, i.e. on the new relocation offset. Differential Revision: https://reviews.llvm.org/D159543 | 10 个月前 | |
[BOLT][AArch64] Handle data at the beginning of a function when disassembling and building CFG. This patch adds getFirstInstructionOffset method for BinaryFunction which is used to properly handle cases where data is at zero offset in a function. The main change is that we add basic block at first instruction offset when disassembling, which prevents assertion failures in buildCFG. Reviewed By: yota9, rafauler Differential Revision: https://reviews.llvm.org/D127111 | 4 年前 | |
[llvm-objdump] Add --no-print-imm-hex to tests depending on it. This prepares for an upcoming change to make --print-imm-hex the default behavior of llvm-objdump. These tests were updated in a semi-automatic fashion. See D136972 for details. | 3 年前 | |
[AArch64] fix bug #55005 handle DW_CFA_GNU_NegateRAState GCC on AArch64 uses DW_CFA_GNU_NegateRAState for return address signing. Differential Revision: https://reviews.llvm.org/D142572 | 3 年前 | |
[Backport][BOLT][AArch64] Fix instrumentation deadloop According to ARMv8-a architecture reference manual B2.10.5 software must avoid having any explicit memory accesses between exclusive load and associated store instruction. Otherwise exclusive monitor might clear the exclusivity without application-related cause which may result in the deadloop. Disable instrumentation for such functions, since between exclusive load and store there might be branches and we would insert instrumentation snippet which contains loads and stores. The better solution would be to analyze with BFS finding the exact BBs between load and store and not instrumenting them. Or even better to recognize such sequences and replace them with more complex one, e.g. loading value non exclusively, and for the brach where exclusive store is made make exclusive load and store sequentially, but for now just disable instrumentation for such functions completely. Differential Revision: https://reviews.llvm.org/D159520 | 10 个月前 | |
[BOLT][TEST] Use double dash flags in tests Replace a single dash with a double dash for options that have more than a single letter. llvm-bolt-wrapper.py has special treatment for output options such as "-o" and "-w" causing issues when a single dash is used, e.g. for "-write-dwp". The wrapper can be fixed as well, but using a double dash has other advantages as well. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D127538 | 4 年前 | |
[BOLT][AArch64] Handle references to the middle of Constant Islands Fix BinaryContext::handleAddressRef to properly detect references to other function's Constant islands. Revieved By: rafauler, yota9 Differential Revision: https://reviews.llvm.org/D132376 | 3 年前 | |
[BOLT][DWARF] Update handling of size 1 ranges and fix sub-programs with ranges When output range is only one entry, and input is low_pc/high_pc do not convert to ranges. This helps with size of .debug_ranges/.debug_rnglists. It also helps when either low_pc/high_pc is 0. We not generating potentially invalid ranges that result in LLDB error. Also fixed handling of DW_AT_subprogram with ranges. This can be created with -fbasic-block-sections=all. Reviewed By: maksfb Differential Revision: https://reviews.llvm.org/D156374 | 1 年前 | |
[BOLT][AArch64] Handle adrp+ld64 linker relaxations Linker might relax adrp + ldr got address loading to adrp + add for local non-preemptible symbols (e.g. hidden/protected symbols in executable). As usually linker doesn't change relocations properly after relaxation, so we have to handle such cases by ourselves. To do that during relocations reading we change LD64 reloc to ADD if instruction mismatch found and introduce FixRelaxationPass that searches for ADRP+ADD pairs and after performing some checks we're replacing ADRP target symbol to already fixed ADDs one. Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei Differential Revision: https://reviews.llvm.org/D138097 | 3 年前 | |
[Backport][BOLT] Fix typo in test | 10 个月前 | |
fixup! [GlobalISel] Always direct-call IFuncs and Aliases (#74902) The codegen change broke one of the BOLT tests. | 10 个月前 | |
[BOLT][AArch64]support inline-small-functions for AArch64 (#120187) Add some functions in AArch64MCPlusBuilder.cpp to support inline for AArch64. | 6 个月前 | |
[BOLT][AArch64]support inline-small-functions for AArch64 (#120187) Add some functions in AArch64MCPlusBuilder.cpp to support inline for AArch64. | 6 个月前 | |
[BOLT] Remove unreachable uncond branch after return This patch fixes the removal of unreachable uncondtional branch located after return instruction. Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei Reviewed By: Amir Differential Revision: https://reviews.llvm.org/D117677 | 4 年前 | |
[NFC][Py Reformat] Reformat python files in the rest of the dirs This is an ongoing series of commits that are reformatting our Python code. This catches the last of the python files to reformat. Since they where so few I bunched them together. Reformatting is done with black. If you end up having problems merging this commit because you have made changes to a python file, the best way to handle that is to run git checkout --ours <yourfile> and then reformat it with black. If you run into any problems, post to discourse about it and we will try to help. RFC Thread below: https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style Reviewed By: jhenderson, #libc, Mordante, sivachandra Differential Revision: https://reviews.llvm.org/D150784 | 3 年前 | |
[BOLT] Fix long jump negative offset issue. (#67132) In instruction encoding, the relative offset address of the PC is signed, that is, the number of positive offset bits and the number of negative offset bits is asymmetric. Therefore, the maximum and minimum values are used to replace Mask to determine the boundary. Co-authored-by: qijitao <qijitao@hisilicon.com> | 11 个月前 | |
[BOLT][AArch64] Don't change layout in PatchEntries (#71278) Due to LongJmp pass that is executed before PatchEntries we can't ignore the function here since it would change pre-calculated output layout. The test reloc-26 relied on the wrong behavior, rewritten to unittest. This is also attemp to fix #70771 | 6 个月前 | |
[BOLT][TEST] Use double dash flags in tests Replace a single dash with a double dash for options that have more than a single letter. llvm-bolt-wrapper.py has special treatment for output options such as "-o" and "-w" causing issues when a single dash is used, e.g. for "-write-dwp". The wrapper can be fixed as well, but using a double dash has other advantages as well. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D127538 | 4 年前 | |
[Backport][BOLT][AArch64] Handle .plt.got section (#71216) It seems that currently this section is only created by the mold linker if 2 conditions are met: 1. The PLT function was called directly. 2. The indirect access to PLT function was found (e.g. through ADRP relocation). Although mold created symbol for every plt entry I've removed them in yaml file to check that .plt.got was truly disassembled by bolt. | 10 个月前 | |
[BOLT][AArch64] Ignore functions with islandsInfo during VeneerEliminarion and ICF Differential Revision: https://reviews.llvm.org/D131881 Reviewed By: yota9 | 3 年前 | |
[BOLT] fix print-mem-data not working (#156332) This option print-mem-data is currently not working, use this fix to restore its functionality. | 9 个月前 | |
[BOLT] Fix unrecognized option values for print-sorted-by-order (#155613) Currently llvm-bolt does not recognize the input value for ’-print-sorted-by-order‘. This patch adds support for ascending and descending values for the flag. | 9 个月前 | |
[Backport][BOLT][AArch64] Fix strict usage during ADR Relax (#71377) Currently strict mode is used to expand number of optimized functions, not to shrink it. Revert the option usage in the pass, so passing strict option would relax adr instruction even if there are no nops around it. Also add check for nop after adr instruction. | 10 个月前 | |
Revert "Rebase: [Facebook] Revert "[BOLT] Update dynamic relocations from section relocations"" This reverts commit 76029cc53e838e6d86b13b0c39152f474fb09263. | 3 年前 | |
[BOLT][TEST] Use double dash flags in tests Replace a single dash with a double dash for options that have more than a single letter. llvm-bolt-wrapper.py has special treatment for output options such as "-o" and "-w" causing issues when a single dash is used, e.g. for "-write-dwp". The wrapper can be fixed as well, but using a double dash has other advantages as well. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D127538 | 4 年前 | |
[BOLT] Don't use section relocations when computing hash for data from other section When computing symbol hashes in BinarySection::hash, we try to find relocations in the section which reference the passed BinaryData. We do so by doing lower_bound on data begin offset and upper_bound on data end offset. Since offsets are relative to the current section, if it is a data from the previous section, we get underflow when computing offset and lower_bound returns Relocations.end(). If this data also ends where current section begins, upper_bound on zero offset will return some valid iterator if we have any relocations after the first byte. Then we'll try to iterate from lower_bound to upper_bound, since they're not equal, which in that case means we'll dereference Relocations.end(), increment it, and try to do so until we reach the second valid iterator. Of course we reach segfault earlier. In this patch we stop BOLT from searching relocations for symbols outside of the current section. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D146620 | 3 年前 | |
[BOLT][TEST] Use double dash flags in tests Replace a single dash with a double dash for options that have more than a single letter. llvm-bolt-wrapper.py has special treatment for output options such as "-o" and "-w" causing issues when a single dash is used, e.g. for "-write-dwp". The wrapper can be fixed as well, but using a double dash has other advantages as well. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D127538 | 4 年前 | |
[BOLT][TEST] Use double dash flags in tests Replace a single dash with a double dash for options that have more than a single letter. llvm-bolt-wrapper.py has special treatment for output options such as "-o" and "-w" causing issues when a single dash is used, e.g. for "-write-dwp". The wrapper can be fixed as well, but using a double dash has other advantages as well. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D127538 | 4 年前 | |
[BOLT] Don't use ld.lld in tests Summary: Addressing issue 270. (cherry picked from FBD33255608) | 4 年前 | |
[BOLT][TEST] Use double dash flags in tests Replace a single dash with a double dash for options that have more than a single letter. llvm-bolt-wrapper.py has special treatment for output options such as "-o" and "-w" causing issues when a single dash is used, e.g. for "-write-dwp". The wrapper can be fixed as well, but using a double dash has other advantages as well. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D127538 | 4 年前 | |
[BOLT][TEST] Use double dash flags in tests Replace a single dash with a double dash for options that have more than a single letter. llvm-bolt-wrapper.py has special treatment for output options such as "-o" and "-w" causing issues when a single dash is used, e.g. for "-write-dwp". The wrapper can be fixed as well, but using a double dash has other advantages as well. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D127538 | 4 年前 | |
[NFC][BOLT][AArch64] Fix AArch64 test cases failure | 6 个月前 | |
[BOLT][AArch64] Handle gold linker veneers The gold linker veneers are written between functions without symbols, so we to handle it specially in BOLT. Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei Differential Revision: https://reviews.llvm.org/D129260 | 3 年前 | |
[BOLT][AArch64] Handle gold linker veneers The gold linker veneers are written between functions without symbols, so we to handle it specially in BOLT. Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei Differential Revision: https://reviews.llvm.org/D129260 | 3 年前 |
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