| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
[BOLT] Search section based on relocation symbol We need to search referenced section based on relocations symbol section to properly match end section symbols. For example on some binaries we can observe that init_array_end/fini_array_end might be "placed" in to the gap and since no section could be found for address the relocation would be skipped resulting in wrong ADRP imm after emitting new text resulting in binary sigsegv. Credits for the test to Vladislav Khmelevskii aka yota9. | 3 年前 | |
[AArch64] fix bug #55005 handle DW_CFA_GNU_NegateRAState GCC on AArch64 uses DW_CFA_GNU_NegateRAState for return address signing. Differential Revision: https://reviews.llvm.org/D142572 | 3 年前 | |
updateDWARFObjectAddressRanges: nullify low pc In case the case the DW_AT_ranges tag already exists for the object the low pc values won't be updated and will be incorrect in after-bolt binaries. Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei Differential Revision: https://reviews.llvm.org/D117216 | 4 年前 | |
[BOLT][AArch64] Handle adrp+ld64 linker relaxations Linker might relax adrp + ldr got address loading to adrp + add for local non-preemptible symbols (e.g. hidden/protected symbols in executable). As usually linker doesn't change relocations properly after relaxation, so we have to handle such cases by ourselves. To do that during relocations reading we change LD64 reloc to ADD if instruction mismatch found and introduce FixRelaxationPass that searches for ADRP+ADD pairs and after performing some checks we're replacing ADRP target symbol to already fixed ADDs one. Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei Differential Revision: https://reviews.llvm.org/D138097 | 3 年前 | |
[Backport][BOLT][AArch64] Handle IFUNCS properly (#71104) Currently we were testing only the binaries compiled with O0, which results in indirect call to the IFUNC trampoline and the trampoline has associated IFUNC symbol with it. Compile with O3 results in direct calling the IFUNC trampoline and no symbols are associated with it, the IFUNC symbol address becomes the same as IFUNC resolver address. Since no symbol was associated the BF was not created before PLT analyze and be the algorithm we're going to analyze target relocation. As we're expecting the JUMP relocation we're also expecting the associated symbol with it to be presented. But for IFUNC relocation the IRELATIVE relocation is used and no symbol is associated with it, the addend value is pointing on the target symbol, so we need to find BF using it and use it's symbol in this situation. Currently this is checked only for AArch64 platform, so I've limited it in code to use this logic only for this platform, although I wouldn't be surprised if other platforms needs to activate this logic too. | 10 个月前 | |
[BOLT] Fix long jump negative offset issue. (#67132) In instruction encoding, the relative offset address of the PC is signed, that is, the number of positive offset bits and the number of negative offset bits is asymmetric. Therefore, the maximum and minimum values are used to replace Mask to determine the boundary. Co-authored-by: qijitao <qijitao@hisilicon.com> | 11 个月前 | |
[Test] Fix YAML mapping keys duplication. NFC. YAML specification does not allow keys duplication an a mapping. However, YAML parser in LLVM does not have any check on that and uses only the last key entry. In this change duplicated keys are merged to satisfy the spec. Differential Revision: https://reviews.llvm.org/D141848 | 3 年前 | |
[Backport][BOLT][AArch64] Handle .plt.got section (#71216) It seems that currently this section is only created by the mold linker if 2 conditions are met: 1. The PLT function was called directly. 2. The indirect access to PLT function was found (e.g. through ADRP relocation). Although mold created symbol for every plt entry I've removed them in yaml file to check that .plt.got was truly disassembled by bolt. | 10 个月前 | |
Revert "Rebase: [Facebook] Revert "[BOLT] Update dynamic relocations from section relocations"" This reverts commit 76029cc53e838e6d86b13b0c39152f474fb09263. | 3 年前 | |
Revert "Rebase: [Facebook] Revert "[BOLT] Update dynamic relocations from section relocations"" This reverts commit 76029cc53e838e6d86b13b0c39152f474fb09263. | 3 年前 | |
[BOLT] Update skipRelocation for aarch64 The ld might relax ADRP+ADD or ADRP+LDR sequences to the ADR+NOP, add the new case to the skipRelocation for aarch64. Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei Differential Revision: https://reviews.llvm.org/D123334 | 4 年前 | |
[BOLT] Don't use section relocations when computing hash for data from other section When computing symbol hashes in BinarySection::hash, we try to find relocations in the section which reference the passed BinaryData. We do so by doing lower_bound on data begin offset and upper_bound on data end offset. Since offsets are relative to the current section, if it is a data from the previous section, we get underflow when computing offset and lower_bound returns Relocations.end(). If this data also ends where current section begins, upper_bound on zero offset will return some valid iterator if we have any relocations after the first byte. Then we'll try to iterate from lower_bound to upper_bound, since they're not equal, which in that case means we'll dereference Relocations.end(), increment it, and try to do so until we reach the second valid iterator. Of course we reach segfault earlier. In this patch we stop BOLT from searching relocations for symbols outside of the current section. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D146620 | 3 年前 | |
[BOLT] Fix two aarch64 tests tls-lld test might be broken since compiler might optimize plt function call and use address directly from got table. The test is removed since plt-gnu-ld checks the same functionality + versioning symbol matching, no need to keep both of the tests. The toolchain might optimize relocations in runtime-relocs test, replace the test compilation with yaml files. Differential Revision: https://reviews.llvm.org/D123332 | 4 年前 | |
[BOLT] Fix two aarch64 tests tls-lld test might be broken since compiler might optimize plt function call and use address directly from got table. The test is removed since plt-gnu-ld checks the same functionality + versioning symbol matching, no need to keep both of the tests. The toolchain might optimize relocations in runtime-relocs test, replace the test compilation with yaml files. Differential Revision: https://reviews.llvm.org/D123332 | 4 年前 | |
[BOLT] [AArch64] Handle constant islands spanning multiple functions Fix BOLT's constant island mapping when a constant island marked by $d spans multiple functions. Currently, because BOLT only marks the constant island in the first function where $d is located, if the next function contains data at its start, BOLT will miss the data and try to disassemble it. This patch adds code to explicitly go through all symbols between $d and $x markers and mark their respective offsets as data, which stops BOLT from trying to disassemble data. It also adds MarkerType enum and refactors related functions. Reviewed By: yota9, rafauler Differential Revision: https://reviews.llvm.org/D126177 | 4 年前 |
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