| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
tcg/i386: Allow immediate as input to deposit_* We can use MOVB and MOVW with an immediate just as easily as with a register input. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 2 年前 | |
tcg/i386: Drop BYTEH deposits for 64-bit It is more useful to allow low-part deposits into all registers than to restrict allocation for high-byte deposits. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 2 年前 | |
tcg: Split out tcg-target-reg-bits.h Often, the only thing we need to know about the TCG host is the register size. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 3 年前 | |
tcg/i386: use 8-bit OR or XOR for unsigned 8-bit immediates In the case where OR or XOR has an 8-bit immediate between 128 and 255, we can operate on a low-byte register and shorten the output by two or three bytes (two if a prefix byte is needed for REX.B). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20231228120524.70239-1-pbonzini@redhat.com> [rth: Incorporate into switch.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 2 年前 | |
tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} The movcond opcode is now mandatory for backends to implement. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231026041404.1229328-7-richard.henderson@linaro.org> | 2 年前 | |
tcg/i386: Support avx512vbmi2 vector shift-double instructions We will use VPSHLD, VPSHLDV and VPSHRDV for 16-bit rotates. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 4 年前 |
| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
| 2 年前 | ||
| 2 年前 | ||
| 3 年前 | ||
| 2 年前 | ||
| 2 年前 | ||
| 4 年前 |