RRichard Hendersontcg: Remove TCG_TARGET_HAS_neg_{i32,i64}
| 文件 | 最后提交记录 | 最后更新时间 |
|---|---|---|
tcg/riscv: Support CTZ, CLZ from Zbb Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 3 年前 | |
tcg/riscv: Support ANDN, ORN, XNOR from Zbb Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 3 年前 | |
tcg: Split out tcg-target-reg-bits.h Often, the only thing we need to know about the TCG host is the register size. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 3 年前 | |
tcg/riscv: Use tcg_use_softmmu Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 2 年前 | |
tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} The movcond opcode is now mandatory for backends to implement. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231026041404.1229328-7-richard.henderson@linaro.org> | 2 年前 |