已合并
spirv-tools/headers update to vulkan-sdk-1.3.275.0 #19
AtomGit-Bot创建于 2024年4月29日
spirv-tools/headers update to vulkan-sdk-1.3.275.0 #19
已合并
从refs/pull/19/head合入到master
共 31 个文件变更+5600-849
| @@ -1,4 +1,4 @@ | |||
| 1 | -# Copyright (c) 2015-2016 The Khronos Group Inc. | 1 | +# Copyright (c) 2015-2023 The Khronos Group Inc. |
| 2 | # | 2 | # |
| 3 | # Permission is hereby granted, free of charge, to any person obtaining a | 3 | # Permission is hereby granted, free of charge, to any person obtaining a |
| 4 | # copy of this software and/or associated documentation files (the | 4 | # copy of this software and/or associated documentation files (the |
| @@ -23,115 +23,43 @@ | |||
| 23 | # CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, | 23 | # CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 24 | # TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE | 24 | # TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 25 | # MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. | 25 | # MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. |
| 26 | +cmake_minimum_required(VERSION 3.14) | ||
| 27 | +project(SPIRV-Headers LANGUAGES CXX VERSION 1.5.5) | ||
| 26 | 28 | ||
| 27 | -# | 29 | +if (CMAKE_VERSION VERSION_LESS "3.21") |
| 28 | -# The SPIR-V headers from the SPIR-V Registry | 30 | + # https://cmake.org/cmake/help/latest/variable/PROJECT_IS_TOP_LEVEL.html |
| 29 | -# https://www.khronos.org/registry/spir-v/ | 31 | + string(COMPARE EQUAL ${CMAKE_CURRENT_SOURCE_DIR} ${CMAKE_SOURCE_DIR} PROJECT_IS_TOP_LEVEL) |
| 30 | -# | ||
| 31 | -cmake_minimum_required(VERSION 3.0) | ||
| 32 | -project(SPIRV-Headers VERSION 1.5.5) | ||
| 33 | - | ||
| 34 | -# There are two ways to use this project. | ||
| 35 | -# | ||
| 36 | -# Using this source tree directly from a CMake-based project: | ||
| 37 | -# 1. Add an add_subdirectory directive to include this sub directory. | ||
| 38 | -# 2. Use ${SPIRV-Headers_SOURCE_DIR}/include} in a target_include_directories | ||
| 39 | -# command. | ||
| 40 | -# | ||
| 41 | -# Installing the headers first, then using them with an implicit include | ||
| 42 | -# directory. To install the headers: | ||
| 43 | -# 1. mkdir build ; cd build | ||
| 44 | -# 2. cmake .. | ||
| 45 | -# 3. cmake --build . --target install | ||
| 46 | - | ||
| 47 | -option(SPIRV_HEADERS_SKIP_EXAMPLES "Skip building examples" | ||
| 48 | - ${SPIRV_HEADERS_SKIP_EXAMPLES}) | ||
| 49 | - | ||
| 50 | -option(SPIRV_HEADERS_SKIP_INSTALL "Skip install" | ||
| 51 | - ${SPIRV_HEADERS_SKIP_INSTALL}) | ||
| 52 | - | ||
| 53 | -if(NOT ${SPIRV_HEADERS_SKIP_EXAMPLES}) | ||
| 54 | - set(SPIRV_HEADERS_ENABLE_EXAMPLES ON) | ||
| 55 | endif() | 32 | endif() |
| 56 | 33 | ||
| 57 | -if(NOT ${SPIRV_HEADERS_SKIP_INSTALL}) | 34 | +add_library(SPIRV-Headers INTERFACE) |
| 58 | - set(SPIRV_HEADERS_ENABLE_INSTALL ON) | 35 | +add_library(SPIRV-Headers::SPIRV-Headers ALIAS SPIRV-Headers) |
| 59 | - # legacy | 36 | +target_include_directories(SPIRV-Headers INTERFACE $<BUILD_INTERFACE:${CMAKE_CURRENT_SOURCE_DIR}/include>) |
| 60 | - add_custom_target(install-headers | ||
| 61 | - COMMAND cmake -E copy_directory ${CMAKE_CURRENT_SOURCE_DIR}/include/spirv | ||
| 62 | - $ENV{DESTDIR}${CMAKE_INSTALL_PREFIX}/include/spirv) | ||
| 63 | -endif() | ||
| 64 | 37 | ||
| 65 | -if (SPIRV_HEADERS_ENABLE_EXAMPLES) | 38 | +if (PROJECT_IS_TOP_LEVEL) |
| 66 | - message(STATUS "Building SPIRV-Header examples") | 39 | + option(BUILD_TESTS "Build the tests") |
| 67 | - add_subdirectory(example) | 40 | + if (BUILD_TESTS) |
| 68 | -endif() | 41 | + add_subdirectory(tests) |
| 69 | - | 42 | + endif() |
| 70 | -include(GNUInstallDirs) | ||
| 71 | -add_library(${PROJECT_NAME} INTERFACE) | ||
| 72 | -target_include_directories(${PROJECT_NAME} INTERFACE | ||
| 73 | - $<BUILD_INTERFACE:${CMAKE_CURRENT_SOURCE_DIR}/include> | ||
| 74 | -) | ||
| 75 | - | ||
| 76 | -# Installation | ||
| 77 | - | ||
| 78 | -if (SPIRV_HEADERS_ENABLE_INSTALL) | ||
| 79 | - message(STATUS "Installing SPIRV-Header") | ||
| 80 | - | ||
| 81 | - set(config_install_dir "${CMAKE_INSTALL_DATADIR}/cmake/${PROJECT_NAME}") | ||
| 82 | - | ||
| 83 | - set(generated_dir "${CMAKE_CURRENT_BINARY_DIR}/generated") | ||
| 84 | - | ||
| 85 | - set(version_config "${generated_dir}/${PROJECT_NAME}ConfigVersion.cmake") | ||
| 86 | - set(project_config "${generated_dir}/${PROJECT_NAME}Config.cmake") | ||
| 87 | - set(TARGETS_EXPORT_NAME "${PROJECT_NAME}Targets") | ||
| 88 | - set(namespace "${PROJECT_NAME}::") | ||
| 89 | 43 | ||
| 44 | + include(GNUInstallDirs) | ||
| 90 | include(CMakePackageConfigHelpers) | 45 | include(CMakePackageConfigHelpers) |
| 91 | 46 | ||
| 92 | - if (NOT CMAKE_VERSION VERSION_LESS 3.14) | 47 | + install(DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/include/spirv DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}) |
| 93 | - set(arch_independent_str ARCH_INDEPENDENT) | 48 | + |
| 49 | + set(cmake_install_dir "${CMAKE_INSTALL_DATADIR}/cmake/SPIRV-Headers") | ||
| 50 | + set(version_config "${CMAKE_CURRENT_BINARY_DIR}/generated/SPIRV-HeadersConfigVersion.cmake") | ||
| 51 | + | ||
| 52 | + write_basic_package_version_file("${version_config}" COMPATIBILITY SameMajorVersion ARCH_INDEPENDENT) | ||
| 53 | + install(FILES "${version_config}" DESTINATION "${cmake_install_dir}") | ||
| 54 | + | ||
| 55 | + install(TARGETS SPIRV-Headers EXPORT "SPIRV-HeadersConfig" INCLUDES DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}) | ||
| 56 | + install(EXPORT "SPIRV-HeadersConfig" NAMESPACE "SPIRV-Headers::" DESTINATION "${cmake_install_dir}") | ||
| 57 | + | ||
| 58 | + if (IS_ABSOLUTE ${CMAKE_INSTALL_INCLUDEDIR}) | ||
| 59 | + set(SPIRV_HEADERS_PKGCONFIG_INCLUDE_DIR ${CMAKE_INSTALL_INCLUDEDIR}) | ||
| 60 | + else() | ||
| 61 | + set(SPIRV_HEADERS_PKGCONFIG_INCLUDE_DIR ${CMAKE_INSTALL_PREFIX}/${CMAKE_INSTALL_INCLUDEDIR}) | ||
| 94 | endif() | 62 | endif() |
| 95 | - write_basic_package_version_file( | 63 | + configure_file(${CMAKE_CURRENT_SOURCE_DIR}/cmake/SPIRV-Headers.pc.in ${CMAKE_CURRENT_BINARY_DIR}/SPIRV-Headers.pc @ONLY) |
| 96 | - "${version_config}" | 64 | + install(FILES "${CMAKE_CURRENT_BINARY_DIR}/SPIRV-Headers.pc" DESTINATION ${CMAKE_INSTALL_DATADIR}/pkgconfig) |
| 97 | - COMPATIBILITY SameMajorVersion | ||
| 98 | - ${arch_independent_str} | ||
| 99 | - ) | ||
| 100 | - | ||
| 101 | - configure_package_config_file( | ||
| 102 | - "cmake/Config.cmake.in" | ||
| 103 | - "${project_config}" | ||
| 104 | - INSTALL_DESTINATION "${config_install_dir}" | ||
| 105 | - ) | ||
| 106 | - | ||
| 107 | - install( | ||
| 108 | - TARGETS ${PROJECT_NAME} | ||
| 109 | - EXPORT "${TARGETS_EXPORT_NAME}" | ||
| 110 | - LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR} | ||
| 111 | - ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR} | ||
| 112 | - RUNTIME DESTINATION ${CMAKE_INSTALL_BINDIR} | ||
| 113 | - INCLUDES DESTINATION ${CMAKE_INSTALL_INCLUDEDIR} | ||
| 114 | - ) | ||
| 115 | - | ||
| 116 | - install( | ||
| 117 | - DIRECTORY include/spirv | ||
| 118 | - DESTINATION ${CMAKE_INSTALL_INCLUDEDIR} | ||
| 119 | - ) | ||
| 120 | - | ||
| 121 | - install( | ||
| 122 | - FILES "${project_config}" "${version_config}" | ||
| 123 | - DESTINATION "${config_install_dir}" | ||
| 124 | - ) | ||
| 125 | - | ||
| 126 | - install( | ||
| 127 | - EXPORT "${TARGETS_EXPORT_NAME}" | ||
| 128 | - NAMESPACE "${namespace}" | ||
| 129 | - DESTINATION "${config_install_dir}" | ||
| 130 | - ) | ||
| 131 | - | ||
| 132 | - configure_file(${CMAKE_CURRENT_SOURCE_DIR}/SPIRV-Headers.pc.in ${CMAKE_BINARY_DIR}/SPIRV-Headers.pc @ONLY) | ||
| 133 | - install( | ||
| 134 | - FILES "${CMAKE_BINARY_DIR}/SPIRV-Headers.pc" | ||
| 135 | - DESTINATION ${CMAKE_INSTALL_DATADIR}/pkgconfig | ||
| 136 | - ) | ||
| 137 | endif() | 65 | endif() |
| @@ -3,7 +3,7 @@ | |||
| 3 | "Name": "spirv-headers", | 3 | "Name": "spirv-headers", |
| 4 | "License": "Apache-2.0", | 4 | "License": "Apache-2.0", |
| 5 | "License File": "LICENSE", | 5 | "License File": "LICENSE", |
| 6 | - "Version Number": "sdk-1.3.231.1", | 6 | + "Version Number": "sdk-1.3.275.0", |
| 7 | "Owner": "zhangleiyu1@huawei.com", | 7 | "Owner": "zhangleiyu1@huawei.com", |
| 8 | "Upstream URL": "https://github.com/KhronosGroup/SPIRV-Headers.git", | 8 | "Upstream URL": "https://github.com/KhronosGroup/SPIRV-Headers.git", |
| 9 | "Description": "This repository contains machine-readable files for the SPIR-V Registry." | 9 | "Description": "This repository contains machine-readable files for the SPIR-V Registry." |
| @@ -0,0 +1,13 @@ | |||
| 1 | +# Security Policy | ||
| 2 | + | ||
| 3 | +## Supported Versions | ||
| 4 | + | ||
| 5 | +Security updates are applied only to the latest release. | ||
| 6 | + | ||
| 7 | +## Reporting a Vulnerability | ||
| 8 | + | ||
| 9 | +If you have discovered a security vulnerability in this project, please report it privately. **Do not disclose it as a public issue.** This gives us time to work with you to fix the issue before public exposure, reducing the chance that the exploit will be used before a patch is released. | ||
| 10 | + | ||
| 11 | +Please disclose it at [security advisory](https://github.com/KhronosGroup/SPIRV-Headers/security/advisories/new). | ||
| 12 | + | ||
| 13 | +This project is maintained by a team of volunteers on a reasonable-effort basis. As such, please give us at least 90 days to work on a fix before public exposure. | ||
| @@ -1,4 +0,0 @@ | |||
| 1 | -@PACKAGE_INIT@ | ||
| 2 | - | ||
| 3 | -include("${CMAKE_CURRENT_LIST_DIR}/@TARGETS_EXPORT_NAME@.cmake") | ||
| 4 | -check_required_components("@PROJECT_NAME@") | ||
| @@ -1,5 +1,4 @@ | |||
| 1 | -prefix=@CMAKE_INSTALL_PREFIX@ | 1 | +includedir=@SPIRV_HEADERS_PKGCONFIG_INCLUDE_DIR@ |
| 2 | -includedir=${prefix}/@CMAKE_INSTALL_INCLUDEDIR@ | ||
| 3 | 2 | ||
| 4 | Name: SPIRV-Headers | 3 | Name: SPIRV-Headers |
| 5 | Description: Header files from the SPIR-V registry | 4 | Description: Header files from the SPIR-V registry |
| @@ -1,4 +0,0 @@ | |||
| 1 | -add_library(SPIRV-Headers-example | ||
| 2 | - ${CMAKE_CURRENT_SOURCE_DIR}/example.cpp) | ||
| 3 | -target_include_directories(SPIRV-Headers-example | ||
| 4 | - PRIVATE ${SPIRV-Headers_SOURCE_DIR}/include) | ||
| @@ -62,7 +62,7 @@ | |||
| 62 | <id value="9" vendor="Qualcomm" comment="Contact weifengz@qti.qualcomm.com"/> | 62 | <id value="9" vendor="Qualcomm" comment="Contact weifengz@qti.qualcomm.com"/> |
| 63 | <id value="10" vendor="AMD" comment="Contact Daniel Rakos, daniel.rakos@amd.com"/> | 63 | <id value="10" vendor="AMD" comment="Contact Daniel Rakos, daniel.rakos@amd.com"/> |
| 64 | <id value="11" vendor="Intel" comment="Contact Alexey, alexey.bader@intel.com"/> | 64 | <id value="11" vendor="Intel" comment="Contact Alexey, alexey.bader@intel.com"/> |
| 65 | - <id value="12" vendor="Imagination" comment="Contact James Jones"/> | 65 | + <id value="12" vendor="Imagination" comment="Contact Stephen Clarke, stephen.clarke@imgtec.com"/> |
| 66 | <id value="13" vendor="Google" tool="Shaderc over Glslang" comment="Contact David Neto, dneto@google.com"/> | 66 | <id value="13" vendor="Google" tool="Shaderc over Glslang" comment="Contact David Neto, dneto@google.com"/> |
| 67 | <id value="14" vendor="Google" tool="spiregg" comment="Contact Lei Zhang, antiagainst@google.com"/> | 67 | <id value="14" vendor="Google" tool="spiregg" comment="Contact Lei Zhang, antiagainst@google.com"/> |
| 68 | <id value="15" vendor="Google" tool="rspirv" comment="Contact Lei Zhang, antiagainst@gmail.com"/> | 68 | <id value="15" vendor="Google" tool="rspirv" comment="Contact Lei Zhang, antiagainst@gmail.com"/> |
| @@ -82,11 +82,16 @@ | |||
| 82 | <id value="29" vendor="Mikkosoft Productions" tool="MSP Shader Compiler" comment="Contact Mikko Rasa, tdb@tdb.fi"/> | 82 | <id value="29" vendor="Mikkosoft Productions" tool="MSP Shader Compiler" comment="Contact Mikko Rasa, tdb@tdb.fi"/> |
| 83 | <id value="30" vendor="SpvGenTwo community" tool="SpvGenTwo SPIR-V IR Tools" comment="https://github.com/rAzoR8/SpvGenTwo"/> | 83 | <id value="30" vendor="SpvGenTwo community" tool="SpvGenTwo SPIR-V IR Tools" comment="https://github.com/rAzoR8/SpvGenTwo"/> |
| 84 | <id value="31" vendor="Google" tool="Skia SkSL" comment="Contact Ethan Nicholas, ethannicholas@google.com"/> | 84 | <id value="31" vendor="Google" tool="Skia SkSL" comment="Contact Ethan Nicholas, ethannicholas@google.com"/> |
| 85 | - <id value="32" vendor="TornadoVM" tool="SPIRV Beehive Toolkit" comment="https://github.com/beehive-lab/spirv-beehive-toolkit"/> | 85 | + <id value="32" vendor="TornadoVM" tool="Beehive SPIRV Toolkit" comment="https://github.com/beehive-lab/beehive-spirv-toolkit"/> |
| 86 | <id value="33" vendor="DragonJoker" tool="ShaderWriter" comment="Contact Sylvain Doremus, https://github.com/DragonJoker/ShaderWriter"/> | 86 | <id value="33" vendor="DragonJoker" tool="ShaderWriter" comment="Contact Sylvain Doremus, https://github.com/DragonJoker/ShaderWriter"/> |
| 87 | <id value="34" vendor="Rayan Hatout" tool="SPIRVSmith" comment="Contact Rayan Hatout rayan.hatout@gmail.com, Repo https://github.com/rayanht/SPIRVSmith"/> | 87 | <id value="34" vendor="Rayan Hatout" tool="SPIRVSmith" comment="Contact Rayan Hatout rayan.hatout@gmail.com, Repo https://github.com/rayanht/SPIRVSmith"/> |
| 88 | <id value="35" vendor="Saarland University" tool="Shady" comment="Contact Hugo Devillers devillers@uni-saarland.de, Repo https://github.com/Hugobros3/shady"/> | 88 | <id value="35" vendor="Saarland University" tool="Shady" comment="Contact Hugo Devillers devillers@uni-saarland.de, Repo https://github.com/Hugobros3/shady"/> |
| 89 | - <unused start="36" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/> | 89 | + <id value="36" vendor="Taichi Graphics" tool="Taichi" comment="Contact Rendong Liang rendongliang@taichi.graphics, Repo https://github.com/taichi-dev/taichi"/> |
| 90 | + <id value="37" vendor="heroseh" tool="Hero C Compiler" comment="https://github.com/heroseh/hcc"/> | ||
| 91 | + <id value="38" vendor="Meta" tool="SparkSL" comment="Contact Dunfan Lu, dunfanlu@meta.com, https://sparkar.facebook.com/ar-studio/learn/sparksl/sparksl-overview"/> | ||
| 92 | + <id value="39" vendor="SirLynix" tool="Nazara ShaderLang Compiler" comment="Contact Jérôme Leclercq, https://github.com/NazaraEngine/ShaderLang"/> | ||
| 93 | + <id value="40" vendor="NVIDIA" tool="Slang Compiler" comment="Contact Theresa Foley, tfoley@nvidia.com, https://github.com/shader-slang/slang/"/> | ||
| 94 | + <unused start="41" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/> | ||
| 90 | </ids> | 95 | </ids> |
| 91 | 96 | ||
| 92 | <!-- SECTION: SPIR-V Opcodes and Enumerants --> | 97 | <!-- SECTION: SPIR-V Opcodes and Enumerants --> |
| @@ -139,13 +144,17 @@ | |||
| 139 | <ids type="opcode" start="6144" end="6271" vendor="Intel" comment="Contact michael.kinsner@intel.com"/> | 144 | <ids type="opcode" start="6144" end="6271" vendor="Intel" comment="Contact michael.kinsner@intel.com"/> |
| 140 | <ids type="opcode" start="6272" end="6399" vendor="Huawei" comment="Contact wanghuilong2@xunweitech.com"/> | 145 | <ids type="opcode" start="6272" end="6399" vendor="Huawei" comment="Contact wanghuilong2@xunweitech.com"/> |
| 141 | <ids type="opcode" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"/> | 146 | <ids type="opcode" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"/> |
| 147 | + <ids type="opcode" start="6464" end="6527" vendor="N/A" comment="Blank range to keep alignment with non-opcodes"/> | ||
| 148 | + <ids type="opcode" start="6528" end="6591" vendor="Codeplay" comment="Contact duncan.brawley@codeplay.com"/> | ||
| 149 | + <ids type="opcode" start="6592" end="6655" vendor="Saarland University" comment="Contact devillers@cg.uni-saarland.de"/> | ||
| 150 | + <ids type="opcode" start="6656" end="6719" vendor="Meta" comment="Contact dunfanlu@meta.com"/> | ||
| 142 | <!-- Opcode enumerants to reserve for future use. To get a block, allocate | 151 | <!-- Opcode enumerants to reserve for future use. To get a block, allocate |
| 143 | multiples of 64 starting at the lowest available point in this | 152 | multiples of 64 starting at the lowest available point in this |
| 144 | block and add a corresponding <ids> tag immediately above. Make | 153 | block and add a corresponding <ids> tag immediately above. Make |
| 145 | sure to fill in the vendor attribute, and preferably add a contact | 154 | sure to fill in the vendor attribute, and preferably add a contact |
| 146 | person/address in a comment attribute. --> | 155 | person/address in a comment attribute. --> |
| 147 | <!-- Example new block: <ids type="opcode" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> --> | 156 | <!-- Example new block: <ids type="opcode" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> --> |
| 148 | - <ids type="opcode" start="6464" end="65535" comment="Opcode range reservable for future use by vendors"/> | 157 | + <ids type="opcode" start="6656" end="65535" comment="Opcode range reservable for future use by vendors"/> |
| 149 | <!-- End reservations of opcodes --> | 158 | <!-- End reservations of opcodes --> |
| 150 | 159 | ||
| 151 | 160 | ||
| @@ -169,13 +178,16 @@ | |||
| 169 | <ids type="enumerant" start="6272" end="6399" vendor="Huawei" comment="Contact wanghuilong2@xunweitech.com"/> | 178 | <ids type="enumerant" start="6272" end="6399" vendor="Huawei" comment="Contact wanghuilong2@xunweitech.com"/> |
| 170 | <ids type="enumerant" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"/> | 179 | <ids type="enumerant" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"/> |
| 171 | <ids type="enumerant" start="6464" end="6527" vendor="Mikkosoft Productions" comment="Contact Mikko Rasa, tdb@tdb.fi"/> | 180 | <ids type="enumerant" start="6464" end="6527" vendor="Mikkosoft Productions" comment="Contact Mikko Rasa, tdb@tdb.fi"/> |
| 181 | + <ids type="enumerant" start="6528" end="6591" vendor="Codeplay" comment="Contact duncan.brawley@codeplay.com"/> | ||
| 182 | + <ids type="enumerant" start="6592" end="6655" vendor="Saarland University" comment="Contact devillers@cg.uni-saarland.de"/> | ||
| 183 | + <ids type="enumerant" start="6656" end="6719" vendor="Meta" comment="Contact dunfanlu@meta.com"/> | ||
| 172 | <!-- Enumerants to reserve for future use. To get a block, allocate | 184 | <!-- Enumerants to reserve for future use. To get a block, allocate |
| 173 | multiples of 64 starting at the lowest available point in this | 185 | multiples of 64 starting at the lowest available point in this |
| 174 | block and add a corresponding <ids> tag immediately above. Make | 186 | block and add a corresponding <ids> tag immediately above. Make |
| 175 | sure to fill in the vendor attribute, and preferably add a contact | 187 | sure to fill in the vendor attribute, and preferably add a contact |
| 176 | person/address in a comment attribute. --> | 188 | person/address in a comment attribute. --> |
| 177 | <!-- Example new block: <ids type="enumerant" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> --> | 189 | <!-- Example new block: <ids type="enumerant" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> --> |
| 178 | - <ids type="enumerant" start="6528" end="4294967295" comment="Enumerant range reservable for future use by vendors"/> | 190 | + <ids type="enumerant" start="6656" end="4294967295" comment="Enumerant range reservable for future use by vendors"/> |
| 179 | <!-- End reservations of enumerants --> | 191 | <!-- End reservations of enumerants --> |
| 180 | 192 | ||
| 181 | 193 | ||
| @@ -33,7 +33,7 @@ extern "C" { | |||
| 33 | 33 | ||
| 34 | 34 | ||
| 35 | enum { | 35 | enum { |
| 36 | - NonSemanticClspvReflectionRevision = 4, | 36 | + NonSemanticClspvReflectionRevision = 6, |
| 37 | NonSemanticClspvReflectionRevision_BitWidthPadding = 0x7fffffff | 37 | NonSemanticClspvReflectionRevision_BitWidthPadding = 0x7fffffff |
| 38 | }; | 38 | }; |
| 39 | 39 | ||
| @@ -73,10 +73,23 @@ enum NonSemanticClspvReflectionInstructions { | |||
| 73 | NonSemanticClspvReflectionImageArgumentInfoChannelDataTypeUniform = 33, | 73 | NonSemanticClspvReflectionImageArgumentInfoChannelDataTypeUniform = 33, |
| 74 | NonSemanticClspvReflectionArgumentStorageTexelBuffer = 34, | 74 | NonSemanticClspvReflectionArgumentStorageTexelBuffer = 34, |
| 75 | NonSemanticClspvReflectionArgumentUniformTexelBuffer = 35, | 75 | NonSemanticClspvReflectionArgumentUniformTexelBuffer = 35, |
| 76 | + NonSemanticClspvReflectionConstantDataPointerPushConstant = 36, | ||
| 77 | + NonSemanticClspvReflectionProgramScopeVariablePointerPushConstant = 37, | ||
| 78 | + NonSemanticClspvReflectionPrintfInfo = 38, | ||
| 79 | + NonSemanticClspvReflectionPrintfBufferStorageBuffer = 39, | ||
| 80 | + NonSemanticClspvReflectionPrintfBufferPointerPushConstant = 40, | ||
| 81 | + NonSemanticClspvReflectionNormalizedSamplerMaskPushConstant = 41, | ||
| 76 | NonSemanticClspvReflectionInstructionsMax = 0x7fffffff | 82 | NonSemanticClspvReflectionInstructionsMax = 0x7fffffff |
| 77 | }; | 83 | }; |
| 78 | 84 | ||
| 79 | 85 | ||
| 86 | +enum NonSemanticClspvReflectionKernelPropertyFlags { | ||
| 87 | + NonSemanticClspvReflectionNone = 0x0, | ||
| 88 | + NonSemanticClspvReflectionMayUsePrintf = 0x1, | ||
| 89 | + NonSemanticClspvReflectionKernelPropertyFlagsMax = 0x7fffffff | ||
| 90 | +}; | ||
| 91 | + | ||
| 92 | + | ||
| 80 | 93 | ||
| 81 | } | 94 | } |
| 82 | 95 | ||
| @@ -0,0 +1,50 @@ | |||
| 1 | +// Copyright (c) 2020 The Khronos Group Inc. | ||
| 2 | +// | ||
| 3 | +// Permission is hereby granted, free of charge, to any person obtaining a | ||
| 4 | +// copy of this software and/or associated documentation files (the | ||
| 5 | +// "Materials"), to deal in the Materials without restriction, including | ||
| 6 | +// without limitation the rights to use, copy, modify, merge, publish, | ||
| 7 | +// distribute, sublicense, and/or sell copies of the Materials, and to | ||
| 8 | +// permit persons to whom the Materials are furnished to do so, subject to | ||
| 9 | +// the following conditions: | ||
| 10 | +// | ||
| 11 | +// The above copyright notice and this permission notice shall be included | ||
| 12 | +// in all copies or substantial portions of the Materials. | ||
| 13 | +// | ||
| 14 | +// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS | ||
| 15 | +// KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS | ||
| 16 | +// SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT | ||
| 17 | +// https://www.khronos.org/registry/ | ||
| 18 | +// | ||
| 19 | +// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
| 20 | +// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
| 21 | +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | ||
| 22 | +// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY | ||
| 23 | +// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, | ||
| 24 | +// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE | ||
| 25 | +// MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. | ||
| 26 | +// | ||
| 27 | + | ||
| 28 | + | ||
| 29 | + | ||
| 30 | + | ||
| 31 | + | ||
| 32 | +extern "C" { | ||
| 33 | + | ||
| 34 | + | ||
| 35 | +enum { | ||
| 36 | + NonSemanticDebugBreakRevision = 1, | ||
| 37 | + NonSemanticDebugBreakRevision_BitWidthPadding = 0x7fffffff | ||
| 38 | +}; | ||
| 39 | + | ||
| 40 | +enum NonSemanticDebugBreakInstructions { | ||
| 41 | + NonSemanticDebugBreakDebugBreak = 1, | ||
| 42 | + NonSemanticDebugBreakInstructionsMax = 0x7fffffff | ||
| 43 | +}; | ||
| 44 | + | ||
| 45 | + | ||
| 46 | + | ||
| 47 | +} | ||
| 48 | + | ||
| 49 | + | ||
| 50 | + | ||
| @@ -1,12 +1,15 @@ | |||
| 1 | { | 1 | { |
| 2 | - "revision" : 4, | 2 | + "revision" : 6, |
| 3 | "instructions" : [ | 3 | "instructions" : [ |
| 4 | { | 4 | { |
| 5 | "opname" : "Kernel", | 5 | "opname" : "Kernel", |
| 6 | "opcode" : 1, | 6 | "opcode" : 1, |
| 7 | "operands" : [ | 7 | "operands" : [ |
| 8 | { "kind" : "IdRef", "name" : "Kernel" }, | 8 | { "kind" : "IdRef", "name" : "Kernel" }, |
| 9 | - { "kind" : "IdRef", "name" : "Name" } | 9 | + { "kind" : "IdRef", "name" : "Name" }, |
| 10 | + { "kind" : "IdRef", "name" : "NumArguments", "quantifier" : "?" }, | ||
| 11 | + { "kind" : "IdRef", "name" : "Flags", "quantifier" : "?" }, | ||
| 12 | + { "kind" : "IdRef", "name" : "Attributes", "quantifier" : "?" } | ||
| 10 | ] | 13 | ] |
| 11 | }, | 14 | }, |
| 12 | { | 15 | { |
| @@ -347,6 +350,77 @@ | |||
| 347 | { "kind" : "IdRef", "name" : "Binding" }, | 350 | { "kind" : "IdRef", "name" : "Binding" }, |
| 348 | { "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" } | 351 | { "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" } |
| 349 | ] | 352 | ] |
| 353 | + }, | ||
| 354 | + { | ||
| 355 | + "opname" : "ConstantDataPointerPushConstant", | ||
| 356 | + "opcode" : 36, | ||
| 357 | + "operands" : [ | ||
| 358 | + { "kind" : "IdRef", "name" : "Offset"}, | ||
| 359 | + { "kind" : "IdRef", "name" : "Size"}, | ||
| 360 | + { "kind" : "IdRef", "name" : "Data" } | ||
| 361 | + ] | ||
| 362 | + }, | ||
| 363 | + { | ||
| 364 | + "opname" : "ProgramScopeVariablePointerPushConstant", | ||
| 365 | + "opcode" : 37, | ||
| 366 | + "operands" : [ | ||
| 367 | + { "kind" : "IdRef", "name" : "Offset"}, | ||
| 368 | + { "kind" : "IdRef", "name" : "Size"}, | ||
| 369 | + { "kind" : "IdRef", "name" : "Data" } | ||
| 370 | + ] | ||
| 371 | + }, | ||
| 372 | + { | ||
| 373 | + "opname" : "PrintfInfo", | ||
| 374 | + "opcode" : 38, | ||
| 375 | + "operands" : [ | ||
| 376 | + { "kind" : "IdRef", "name" : "PrintfID" }, | ||
| 377 | + { "kind" : "IdRef", "name" : "FormatString" }, | ||
| 378 | + { "kind" : "IdRef", "quantifier" : "*", "name" : "ArgumentSizes"} | ||
| 379 | + ] | ||
| 380 | + }, | ||
| 381 | + { | ||
| 382 | + "opname" : "PrintfBufferStorageBuffer", | ||
| 383 | + "opcode" : 39, | ||
| 384 | + "operands" : [ | ||
| 385 | + { "kind" : "IdRef", "name" : "DescriptorSet" }, | ||
| 386 | + { "kind" : "IdRef", "name" : "Binding" }, | ||
| 387 | + { "kind" : "IdRef", "name" : "BufferSize"} | ||
| 388 | + ] | ||
| 389 | + }, | ||
| 390 | + { | ||
| 391 | + "opname" : "PrintfBufferPointerPushConstant", | ||
| 392 | + "opcode" : 40, | ||
| 393 | + "operands" : [ | ||
| 394 | + { "kind" : "IdRef", "name" : "Offset" }, | ||
| 395 | + { "kind" : "IdRef", "name" : "Size"}, | ||
| 396 | + { "kind" : "IdRef", "name" : "BufferSize"} | ||
| 397 | + ] | ||
| 398 | + }, | ||
| 399 | + { | ||
| 400 | + "opname" : "NormalizedSamplerMaskPushConstant", | ||
| 401 | + "opcode" : 41, | ||
| 402 | + "operands" : [ | ||
| 403 | + { "kind" : "IdRef", "name" : "Kernel" }, | ||
| 404 | + { "kind" : "IdRef", "name" : "Ordinal" }, | ||
| 405 | + { "kind" : "IdRef", "name" : "Offset" }, | ||
| 406 | + { "kind" : "IdRef", "name" : "Size" } | ||
| 407 | + ] | ||
| 408 | + } | ||
| 409 | + ], | ||
| 410 | + "operand_kinds" : [ | ||
| 411 | + { | ||
| 412 | + "category" : "BitEnum", | ||
| 413 | + "kind" : "KernelPropertyFlags", | ||
| 414 | + "enumerants" : [ | ||
| 415 | + { | ||
| 416 | + "enumerant" : "None", | ||
| 417 | + "value" : "0x0" | ||
| 418 | + }, | ||
| 419 | + { | ||
| 420 | + "enumerant" : "MayUsePrintf", | ||
| 421 | + "value" : "0x1" | ||
| 422 | + } | ||
| 423 | + ] | ||
| 350 | } | 424 | } |
| 351 | ] | 425 | ] |
| 352 | } | 426 | } |
| @@ -0,0 +1,9 @@ | |||
| 1 | +{ | ||
| 2 | + "revision" : 1, | ||
| 3 | + "instructions" : [ | ||
| 4 | + { | ||
| 5 | + "opname" : "DebugBreak", | ||
| 6 | + "opcode" : 1 | ||
| 7 | + } | ||
| 8 | + ] | ||
| 9 | +} | ||
| @@ -66,6 +66,10 @@ namespace Spv | |||
| 66 | HLSL = 5, | 66 | HLSL = 5, |
| 67 | CPP_for_OpenCL = 6, | 67 | CPP_for_OpenCL = 6, |
| 68 | SYCL = 7, | 68 | SYCL = 7, |
| 69 | + HERO_C = 8, | ||
| 70 | + NZSL = 9, | ||
| 71 | + WGSL = 10, | ||
| 72 | + Slang = 11, | ||
| 69 | } | 73 | } |
| 70 | 74 | ||
| 71 | [AllowDuplicates, CRepr] public enum ExecutionModel | 75 | [AllowDuplicates, CRepr] public enum ExecutionModel |
| @@ -153,6 +157,9 @@ namespace Spv | |||
| 153 | SubgroupsPerWorkgroupId = 37, | 157 | SubgroupsPerWorkgroupId = 37, |
| 154 | LocalSizeId = 38, | 158 | LocalSizeId = 38, |
| 155 | LocalSizeHintId = 39, | 159 | LocalSizeHintId = 39, |
| 160 | + NonCoherentColorAttachmentReadEXT = 4169, | ||
| 161 | + NonCoherentDepthAttachmentReadEXT = 4170, | ||
| 162 | + NonCoherentStencilAttachmentReadEXT = 4171, | ||
| 156 | SubgroupUniformControlFlowKHR = 4421, | 163 | SubgroupUniformControlFlowKHR = 4421, |
| 157 | PostDepthCoverage = 4446, | 164 | PostDepthCoverage = 4446, |
| 158 | DenormPreserve = 4459, | 165 | DenormPreserve = 4459, |
| @@ -162,6 +169,11 @@ namespace Spv | |||
| 162 | RoundingModeRTZ = 4463, | 169 | RoundingModeRTZ = 4463, |
| 163 | EarlyAndLateFragmentTestsAMD = 5017, | 170 | EarlyAndLateFragmentTestsAMD = 5017, |
| 164 | StencilRefReplacingEXT = 5027, | 171 | StencilRefReplacingEXT = 5027, |
| 172 | + CoalescingAMDX = 5069, | ||
| 173 | + MaxNodeRecursionAMDX = 5071, | ||
| 174 | + StaticNumWorkgroupsAMDX = 5072, | ||
| 175 | + ShaderIndexAMDX = 5073, | ||
| 176 | + MaxNumWorkgroupsAMDX = 5077, | ||
| 165 | StencilRefUnchangedFrontAMD = 5079, | 177 | StencilRefUnchangedFrontAMD = 5079, |
| 166 | StencilRefGreaterFrontAMD = 5080, | 178 | StencilRefGreaterFrontAMD = 5080, |
| 167 | StencilRefLessFrontAMD = 5081, | 179 | StencilRefLessFrontAMD = 5081, |
| @@ -192,6 +204,8 @@ namespace Spv | |||
| 192 | NoGlobalOffsetINTEL = 5895, | 204 | NoGlobalOffsetINTEL = 5895, |
| 193 | NumSIMDWorkitemsINTEL = 5896, | 205 | NumSIMDWorkitemsINTEL = 5896, |
| 194 | SchedulerTargetFmaxMhzINTEL = 5903, | 206 | SchedulerTargetFmaxMhzINTEL = 5903, |
| 207 | + StreamingInterfaceINTEL = 6154, | ||
| 208 | + RegisterMapInterfaceINTEL = 6160, | ||
| 195 | NamedBarrierCountINTEL = 6417, | 209 | NamedBarrierCountINTEL = 6417, |
| 196 | } | 210 | } |
| 197 | 211 | ||
| @@ -210,6 +224,9 @@ namespace Spv | |||
| 210 | AtomicCounter = 10, | 224 | AtomicCounter = 10, |
| 211 | Image = 11, | 225 | Image = 11, |
| 212 | StorageBuffer = 12, | 226 | StorageBuffer = 12, |
| 227 | + TileImageEXT = 4172, | ||
| 228 | + NodePayloadAMDX = 5068, | ||
| 229 | + NodeOutputPayloadAMDX = 5076, | ||
| 213 | CallableDataKHR = 5328, | 230 | CallableDataKHR = 5328, |
| 214 | CallableDataNV = 5328, | 231 | CallableDataNV = 5328, |
| 215 | IncomingCallableDataKHR = 5329, | 232 | IncomingCallableDataKHR = 5329, |
| @@ -224,6 +241,7 @@ namespace Spv | |||
| 224 | ShaderRecordBufferNV = 5343, | 241 | ShaderRecordBufferNV = 5343, |
| 225 | PhysicalStorageBuffer = 5349, | 242 | PhysicalStorageBuffer = 5349, |
| 226 | PhysicalStorageBufferEXT = 5349, | 243 | PhysicalStorageBufferEXT = 5349, |
| 244 | + HitObjectAttributeNV = 5385, | ||
| 227 | TaskPayloadWorkgroupEXT = 5402, | 245 | TaskPayloadWorkgroupEXT = 5402, |
| 228 | CodeSectionINTEL = 5605, | 246 | CodeSectionINTEL = 5605, |
| 229 | DeviceOnlyINTEL = 5936, | 247 | DeviceOnlyINTEL = 5936, |
| @@ -239,6 +257,7 @@ namespace Spv | |||
| 239 | Rect = 4, | 257 | Rect = 4, |
| 240 | Buffer = 5, | 258 | Buffer = 5, |
| 241 | SubpassData = 6, | 259 | SubpassData = 6, |
| 260 | + TileImageDataEXT = 4173, | ||
| 242 | } | 261 | } |
| 243 | 262 | ||
| 244 | [AllowDuplicates, CRepr] public enum SamplerAddressingMode | 263 | [AllowDuplicates, CRepr] public enum SamplerAddressingMode |
| @@ -345,6 +364,8 @@ namespace Spv | |||
| 345 | Float = 14, | 364 | Float = 14, |
| 346 | UnormInt24 = 15, | 365 | UnormInt24 = 15, |
| 347 | UnormInt101010_2 = 16, | 366 | UnormInt101010_2 = 16, |
| 367 | + UnsignedIntRaw10EXT = 19, | ||
| 368 | + UnsignedIntRaw12EXT = 20, | ||
| 348 | } | 369 | } |
| 349 | 370 | ||
| 350 | [AllowDuplicates, CRepr] public enum ImageOperandsShift | 371 | [AllowDuplicates, CRepr] public enum ImageOperandsShift |
| @@ -451,6 +472,7 @@ namespace Spv | |||
| 451 | NoCapture = 5, | 472 | NoCapture = 5, |
| 452 | NoWrite = 6, | 473 | NoWrite = 6, |
| 453 | NoReadWrite = 7, | 474 | NoReadWrite = 7, |
| 475 | + RuntimeAlignedINTEL = 5940, | ||
| 454 | } | 476 | } |
| 455 | 477 | ||
| 456 | [AllowDuplicates, CRepr] public enum Decoration | 478 | [AllowDuplicates, CRepr] public enum Decoration |
| @@ -504,7 +526,13 @@ namespace Spv | |||
| 504 | MaxByteOffsetId = 47, | 526 | MaxByteOffsetId = 47, |
| 505 | NoSignedWrap = 4469, | 527 | NoSignedWrap = 4469, |
| 506 | NoUnsignedWrap = 4470, | 528 | NoUnsignedWrap = 4470, |
| 529 | + WeightTextureQCOM = 4487, | ||
| 530 | + BlockMatchTextureQCOM = 4488, | ||
| 507 | ExplicitInterpAMD = 4999, | 531 | ExplicitInterpAMD = 4999, |
| 532 | + NodeSharesPayloadLimitsWithAMDX = 5019, | ||
| 533 | + NodeMaxPayloadsAMDX = 5020, | ||
| 534 | + TrackFinishWritingAMDX = 5078, | ||
| 535 | + PayloadNodeNameAMDX = 5091, | ||
| 508 | OverrideCoverageNV = 5248, | 536 | OverrideCoverageNV = 5248, |
| 509 | PassthroughNV = 5250, | 537 | PassthroughNV = 5250, |
| 510 | ViewportRelativeNV = 5252, | 538 | ViewportRelativeNV = 5252, |
| @@ -521,6 +549,7 @@ namespace Spv | |||
| 521 | RestrictPointerEXT = 5355, | 549 | RestrictPointerEXT = 5355, |
| 522 | AliasedPointer = 5356, | 550 | AliasedPointer = 5356, |
| 523 | AliasedPointerEXT = 5356, | 551 | AliasedPointerEXT = 5356, |
| 552 | + HitObjectShaderRecordBufferNV = 5386, | ||
| 524 | BindlessSamplerNV = 5398, | 553 | BindlessSamplerNV = 5398, |
| 525 | BindlessImageNV = 5399, | 554 | BindlessImageNV = 5399, |
| 526 | BoundSamplerNV = 5400, | 555 | BoundSamplerNV = 5400, |
| @@ -553,20 +582,45 @@ namespace Spv | |||
| 553 | MergeINTEL = 5834, | 582 | MergeINTEL = 5834, |
| 554 | BankBitsINTEL = 5835, | 583 | BankBitsINTEL = 5835, |
| 555 | ForcePow2DepthINTEL = 5836, | 584 | ForcePow2DepthINTEL = 5836, |
| 585 | + StridesizeINTEL = 5883, | ||
| 586 | + WordsizeINTEL = 5884, | ||
| 587 | + TrueDualPortINTEL = 5885, | ||
| 556 | BurstCoalesceINTEL = 5899, | 588 | BurstCoalesceINTEL = 5899, |
| 557 | CacheSizeINTEL = 5900, | 589 | CacheSizeINTEL = 5900, |
| 558 | DontStaticallyCoalesceINTEL = 5901, | 590 | DontStaticallyCoalesceINTEL = 5901, |
| 559 | PrefetchINTEL = 5902, | 591 | PrefetchINTEL = 5902, |
| 560 | StallEnableINTEL = 5905, | 592 | StallEnableINTEL = 5905, |
| 561 | FuseLoopsInFunctionINTEL = 5907, | 593 | FuseLoopsInFunctionINTEL = 5907, |
| 594 | + MathOpDSPModeINTEL = 5909, | ||
| 562 | AliasScopeINTEL = 5914, | 595 | AliasScopeINTEL = 5914, |
| 563 | NoAliasINTEL = 5915, | 596 | NoAliasINTEL = 5915, |
| 597 | + InitiationIntervalINTEL = 5917, | ||
| 598 | + MaxConcurrencyINTEL = 5918, | ||
| 599 | + PipelineEnableINTEL = 5919, | ||
| 564 | BufferLocationINTEL = 5921, | 600 | BufferLocationINTEL = 5921, |
| 565 | IOPipeStorageINTEL = 5944, | 601 | IOPipeStorageINTEL = 5944, |
| 566 | FunctionFloatingPointModeINTEL = 6080, | 602 | FunctionFloatingPointModeINTEL = 6080, |
| 567 | SingleElementVectorINTEL = 6085, | 603 | SingleElementVectorINTEL = 6085, |
| 568 | VectorComputeCallableFunctionINTEL = 6087, | 604 | VectorComputeCallableFunctionINTEL = 6087, |
| 569 | MediaBlockIOINTEL = 6140, | 605 | MediaBlockIOINTEL = 6140, |
| 606 | + StallFreeINTEL = 6151, | ||
| 607 | + FPMaxErrorDecorationINTEL = 6170, | ||
| 608 | + LatencyControlLabelINTEL = 6172, | ||
| 609 | + LatencyControlConstraintINTEL = 6173, | ||
| 610 | + ConduitKernelArgumentINTEL = 6175, | ||
| 611 | + RegisterMapKernelArgumentINTEL = 6176, | ||
| 612 | + MMHostInterfaceAddressWidthINTEL = 6177, | ||
| 613 | + MMHostInterfaceDataWidthINTEL = 6178, | ||
| 614 | + MMHostInterfaceLatencyINTEL = 6179, | ||
| 615 | + MMHostInterfaceReadWriteModeINTEL = 6180, | ||
| 616 | + MMHostInterfaceMaxBurstINTEL = 6181, | ||
| 617 | + MMHostInterfaceWaitRequestINTEL = 6182, | ||
| 618 | + StableKernelArgumentINTEL = 6183, | ||
| 619 | + HostAccessINTEL = 6188, | ||
| 620 | + InitModeINTEL = 6190, | ||
| 621 | + ImplementInRegisterMapINTEL = 6191, | ||
| 622 | + CacheControlLoadINTEL = 6442, | ||
| 623 | + CacheControlStoreINTEL = 6443, | ||
| 570 | } | 624 | } |
| 571 | 625 | ||
| 572 | [AllowDuplicates, CRepr] public enum BuiltIn | 626 | [AllowDuplicates, CRepr] public enum BuiltIn |
| @@ -642,6 +696,8 @@ namespace Spv | |||
| 642 | BaryCoordSmoothSampleAMD = 4997, | 696 | BaryCoordSmoothSampleAMD = 4997, |
| 643 | BaryCoordPullModelAMD = 4998, | 697 | BaryCoordPullModelAMD = 4998, |
| 644 | FragStencilRefEXT = 5014, | 698 | FragStencilRefEXT = 5014, |
| 699 | + CoalescedInputCountAMDX = 5021, | ||
| 700 | + ShaderIndexAMDX = 5073, | ||
| 645 | ViewportMaskNV = 5253, | 701 | ViewportMaskNV = 5253, |
| 646 | SecondaryPositionNV = 5257, | 702 | SecondaryPositionNV = 5257, |
| 647 | SecondaryViewportMaskNV = 5258, | 703 | SecondaryViewportMaskNV = 5258, |
| @@ -694,6 +750,9 @@ namespace Spv | |||
| 694 | HitKindKHR = 5333, | 750 | HitKindKHR = 5333, |
| 695 | HitKindNV = 5333, | 751 | HitKindNV = 5333, |
| 696 | CurrentRayTimeNV = 5334, | 752 | CurrentRayTimeNV = 5334, |
| 753 | + HitTriangleVertexPositionsKHR = 5335, | ||
| 754 | + HitMicroTriangleVertexPositionsNV = 5337, | ||
| 755 | + HitMicroTriangleVertexBarycentricsNV = 5344, | ||
| 697 | IncomingRayFlagsKHR = 5351, | 756 | IncomingRayFlagsKHR = 5351, |
| 698 | IncomingRayFlagsNV = 5351, | 757 | IncomingRayFlagsNV = 5351, |
| 699 | RayGeometryIndexKHR = 5352, | 758 | RayGeometryIndexKHR = 5352, |
| @@ -701,6 +760,8 @@ namespace Spv | |||
| 701 | SMCountNV = 5375, | 760 | SMCountNV = 5375, |
| 702 | WarpIDNV = 5376, | 761 | WarpIDNV = 5376, |
| 703 | SMIDNV = 5377, | 762 | SMIDNV = 5377, |
| 763 | + HitKindFrontFacingMicroTriangleNV = 5405, | ||
| 764 | + HitKindBackFacingMicroTriangleNV = 5406, | ||
| 704 | CullMaskKHR = 6021, | 765 | CullMaskKHR = 6021, |
| 705 | } | 766 | } |
| 706 | 767 | ||
| @@ -736,6 +797,8 @@ namespace Spv | |||
| 736 | MaxInterleavingINTEL = 21, | 797 | MaxInterleavingINTEL = 21, |
| 737 | SpeculatedIterationsINTEL = 22, | 798 | SpeculatedIterationsINTEL = 22, |
| 738 | NoFusionINTEL = 23, | 799 | NoFusionINTEL = 23, |
| 800 | + LoopCountINTEL = 24, | ||
| 801 | + MaxReinvocationDelayINTEL = 25, | ||
| 739 | } | 802 | } |
| 740 | 803 | ||
| 741 | [AllowDuplicates, CRepr] public enum LoopControlMask | 804 | [AllowDuplicates, CRepr] public enum LoopControlMask |
| @@ -758,6 +821,8 @@ namespace Spv | |||
| 758 | MaxInterleavingINTEL = 0x00200000, | 821 | MaxInterleavingINTEL = 0x00200000, |
| 759 | SpeculatedIterationsINTEL = 0x00400000, | 822 | SpeculatedIterationsINTEL = 0x00400000, |
| 760 | NoFusionINTEL = 0x00800000, | 823 | NoFusionINTEL = 0x00800000, |
| 824 | + LoopCountINTEL = 0x01000000, | ||
| 825 | + MaxReinvocationDelayINTEL = 0x02000000, | ||
| 761 | } | 826 | } |
| 762 | 827 | ||
| 763 | [AllowDuplicates, CRepr] public enum FunctionControlShift | 828 | [AllowDuplicates, CRepr] public enum FunctionControlShift |
| @@ -967,6 +1032,9 @@ namespace Spv | |||
| 967 | ShaderViewportIndex = 70, | 1032 | ShaderViewportIndex = 70, |
| 968 | UniformDecoration = 71, | 1033 | UniformDecoration = 71, |
| 969 | CoreBuiltinsARM = 4165, | 1034 | CoreBuiltinsARM = 4165, |
| 1035 | + TileImageColorReadAccessEXT = 4166, | ||
| 1036 | + TileImageDepthReadAccessEXT = 4167, | ||
| 1037 | + TileImageStencilReadAccessEXT = 4168, | ||
| 970 | FragmentShadingRateKHR = 4422, | 1038 | FragmentShadingRateKHR = 4422, |
| 971 | SubgroupBallotKHR = 4423, | 1039 | SubgroupBallotKHR = 4423, |
| 972 | DrawParameters = 4427, | 1040 | DrawParameters = 4427, |
| @@ -998,6 +1066,9 @@ namespace Spv | |||
| 998 | RayQueryKHR = 4472, | 1066 | RayQueryKHR = 4472, |
| 999 | RayTraversalPrimitiveCullingKHR = 4478, | 1067 | RayTraversalPrimitiveCullingKHR = 4478, |
| 1000 | RayTracingKHR = 4479, | 1068 | RayTracingKHR = 4479, |
| 1069 | + TextureSampleWeightedQCOM = 4484, | ||
| 1070 | + TextureBoxFilterQCOM = 4485, | ||
| 1071 | + TextureBlockMatchQCOM = 4486, | ||
| 1001 | Float16ImageAMD = 5008, | 1072 | Float16ImageAMD = 5008, |
| 1002 | ImageGatherBiasLodAMD = 5009, | 1073 | ImageGatherBiasLodAMD = 5009, |
| 1003 | FragmentMaskAMD = 5010, | 1074 | FragmentMaskAMD = 5010, |
| @@ -1005,6 +1076,7 @@ namespace Spv | |||
| 1005 | ImageReadWriteLodAMD = 5015, | 1076 | ImageReadWriteLodAMD = 5015, |
| 1006 | Int64ImageEXT = 5016, | 1077 | Int64ImageEXT = 5016, |
| 1007 | ShaderClockKHR = 5055, | 1078 | ShaderClockKHR = 5055, |
| 1079 | + ShaderEnqueueAMDX = 5067, | ||
| 1008 | SampleMaskOverrideCoverageNV = 5249, | 1080 | SampleMaskOverrideCoverageNV = 5249, |
| 1009 | GeometryShaderPassthroughNV = 5251, | 1081 | GeometryShaderPassthroughNV = 5251, |
| 1010 | ShaderViewportIndexLayerEXT = 5254, | 1082 | ShaderViewportIndexLayerEXT = 5254, |
| @@ -1046,6 +1118,7 @@ namespace Spv | |||
| 1046 | UniformTexelBufferArrayNonUniformIndexingEXT = 5311, | 1118 | UniformTexelBufferArrayNonUniformIndexingEXT = 5311, |
| 1047 | StorageTexelBufferArrayNonUniformIndexing = 5312, | 1119 | StorageTexelBufferArrayNonUniformIndexing = 5312, |
| 1048 | StorageTexelBufferArrayNonUniformIndexingEXT = 5312, | 1120 | StorageTexelBufferArrayNonUniformIndexingEXT = 5312, |
| 1121 | + RayTracingPositionFetchKHR = 5336, | ||
| 1049 | RayTracingNV = 5340, | 1122 | RayTracingNV = 5340, |
| 1050 | RayTracingMotionBlurNV = 5341, | 1123 | RayTracingMotionBlurNV = 5341, |
| 1051 | VulkanMemoryModel = 5345, | 1124 | VulkanMemoryModel = 5345, |
| @@ -1063,8 +1136,12 @@ namespace Spv | |||
| 1063 | FragmentShaderPixelInterlockEXT = 5378, | 1136 | FragmentShaderPixelInterlockEXT = 5378, |
| 1064 | DemoteToHelperInvocation = 5379, | 1137 | DemoteToHelperInvocation = 5379, |
| 1065 | DemoteToHelperInvocationEXT = 5379, | 1138 | DemoteToHelperInvocationEXT = 5379, |
| 1139 | + DisplacementMicromapNV = 5380, | ||
| 1066 | RayTracingOpacityMicromapEXT = 5381, | 1140 | RayTracingOpacityMicromapEXT = 5381, |
| 1141 | + ShaderInvocationReorderNV = 5383, | ||
| 1067 | BindlessTextureNV = 5390, | 1142 | BindlessTextureNV = 5390, |
| 1143 | + RayQueryPositionFetchKHR = 5391, | ||
| 1144 | + RayTracingDisplacementMicromapNV = 5409, | ||
| 1068 | SubgroupShuffleINTEL = 5568, | 1145 | SubgroupShuffleINTEL = 5568, |
| 1069 | SubgroupBufferBlockIOINTEL = 5569, | 1146 | SubgroupBufferBlockIOINTEL = 5569, |
| 1070 | SubgroupImageBlockIOINTEL = 5570, | 1147 | SubgroupImageBlockIOINTEL = 5570, |
| @@ -1097,10 +1174,13 @@ namespace Spv | |||
| 1097 | FPGAMemoryAccessesINTEL = 5898, | 1174 | FPGAMemoryAccessesINTEL = 5898, |
| 1098 | FPGAClusterAttributesINTEL = 5904, | 1175 | FPGAClusterAttributesINTEL = 5904, |
| 1099 | LoopFuseINTEL = 5906, | 1176 | LoopFuseINTEL = 5906, |
| 1177 | + FPGADSPControlINTEL = 5908, | ||
| 1100 | MemoryAccessAliasingINTEL = 5910, | 1178 | MemoryAccessAliasingINTEL = 5910, |
| 1179 | + FPGAInvocationPipeliningAttributesINTEL = 5916, | ||
| 1101 | FPGABufferLocationINTEL = 5920, | 1180 | FPGABufferLocationINTEL = 5920, |
| 1102 | ArbitraryPrecisionFixedPointINTEL = 5922, | 1181 | ArbitraryPrecisionFixedPointINTEL = 5922, |
| 1103 | USMStorageClassesINTEL = 5935, | 1182 | USMStorageClassesINTEL = 5935, |
| 1183 | + RuntimeAlignedAttributeINTEL = 5939, | ||
| 1104 | IOPipesINTEL = 5943, | 1184 | IOPipesINTEL = 5943, |
| 1105 | BlockingPipesINTEL = 5945, | 1185 | BlockingPipesINTEL = 5945, |
| 1106 | FPGARegINTEL = 5948, | 1186 | FPGARegINTEL = 5948, |
| @@ -1113,16 +1193,26 @@ namespace Spv | |||
| 1113 | DotProduct = 6019, | 1193 | DotProduct = 6019, |
| 1114 | DotProductKHR = 6019, | 1194 | DotProductKHR = 6019, |
| 1115 | RayCullMaskKHR = 6020, | 1195 | RayCullMaskKHR = 6020, |
| 1196 | + CooperativeMatrixKHR = 6022, | ||
| 1116 | BitInstructions = 6025, | 1197 | BitInstructions = 6025, |
| 1117 | GroupNonUniformRotateKHR = 6026, | 1198 | GroupNonUniformRotateKHR = 6026, |
| 1118 | AtomicFloat32AddEXT = 6033, | 1199 | AtomicFloat32AddEXT = 6033, |
| 1119 | AtomicFloat64AddEXT = 6034, | 1200 | AtomicFloat64AddEXT = 6034, |
| 1120 | - LongConstantCompositeINTEL = 6089, | 1201 | + LongCompositesINTEL = 6089, |
| 1121 | OptNoneINTEL = 6094, | 1202 | OptNoneINTEL = 6094, |
| 1122 | AtomicFloat16AddEXT = 6095, | 1203 | AtomicFloat16AddEXT = 6095, |
| 1123 | DebugInfoModuleINTEL = 6114, | 1204 | DebugInfoModuleINTEL = 6114, |
| 1205 | + BFloat16ConversionINTEL = 6115, | ||
| 1124 | SplitBarrierINTEL = 6141, | 1206 | SplitBarrierINTEL = 6141, |
| 1207 | + FPGAClusterAttributesV2INTEL = 6150, | ||
| 1208 | + FPGAKernelAttributesv2INTEL = 6161, | ||
| 1209 | + FPMaxErrorINTEL = 6169, | ||
| 1210 | + FPGALatencyControlINTEL = 6171, | ||
| 1211 | + FPGAArgumentInterfacesINTEL = 6174, | ||
| 1212 | + GlobalVariableHostAccessINTEL = 6187, | ||
| 1213 | + GlobalVariableFPGADecorationsINTEL = 6189, | ||
| 1125 | GroupUniformArithmeticKHR = 6400, | 1214 | GroupUniformArithmeticKHR = 6400, |
| 1215 | + CacheControlsINTEL = 6441, | ||
| 1126 | } | 1216 | } |
| 1127 | 1217 | ||
| 1128 | [AllowDuplicates, CRepr] public enum RayFlagsShift | 1218 | [AllowDuplicates, CRepr] public enum RayFlagsShift |
| @@ -1230,6 +1320,69 @@ namespace Spv | |||
| 1230 | PackedVectorFormat4x8BitKHR = 0, | 1320 | PackedVectorFormat4x8BitKHR = 0, |
| 1231 | } | 1321 | } |
| 1232 | 1322 | ||
| 1323 | + [AllowDuplicates, CRepr] public enum CooperativeMatrixOperandsShift | ||
| 1324 | + { | ||
| 1325 | + MatrixASignedComponentsKHR = 0, | ||
| 1326 | + MatrixBSignedComponentsKHR = 1, | ||
| 1327 | + MatrixCSignedComponentsKHR = 2, | ||
| 1328 | + MatrixResultSignedComponentsKHR = 3, | ||
| 1329 | + SaturatingAccumulationKHR = 4, | ||
| 1330 | + } | ||
| 1331 | + | ||
| 1332 | + [AllowDuplicates, CRepr] public enum CooperativeMatrixOperandsMask | ||
| 1333 | + { | ||
| 1334 | + MaskNone = 0, | ||
| 1335 | + MatrixASignedComponentsKHR = 0x00000001, | ||
| 1336 | + MatrixBSignedComponentsKHR = 0x00000002, | ||
| 1337 | + MatrixCSignedComponentsKHR = 0x00000004, | ||
| 1338 | + MatrixResultSignedComponentsKHR = 0x00000008, | ||
| 1339 | + SaturatingAccumulationKHR = 0x00000010, | ||
| 1340 | + } | ||
| 1341 | + | ||
| 1342 | + [AllowDuplicates, CRepr] public enum CooperativeMatrixLayout | ||
| 1343 | + { | ||
| 1344 | + RowMajorKHR = 0, | ||
| 1345 | + ColumnMajorKHR = 1, | ||
| 1346 | + } | ||
| 1347 | + | ||
| 1348 | + [AllowDuplicates, CRepr] public enum CooperativeMatrixUse | ||
| 1349 | + { | ||
| 1350 | + MatrixAKHR = 0, | ||
| 1351 | + MatrixBKHR = 1, | ||
| 1352 | + MatrixAccumulatorKHR = 2, | ||
| 1353 | + } | ||
| 1354 | + | ||
| 1355 | + [AllowDuplicates, CRepr] public enum InitializationModeQualifier | ||
| 1356 | + { | ||
| 1357 | + InitOnDeviceReprogramINTEL = 0, | ||
| 1358 | + InitOnDeviceResetINTEL = 1, | ||
| 1359 | + } | ||
| 1360 | + | ||
| 1361 | + [AllowDuplicates, CRepr] public enum HostAccessQualifier | ||
| 1362 | + { | ||
| 1363 | + NoneINTEL = 0, | ||
| 1364 | + ReadINTEL = 1, | ||
| 1365 | + WriteINTEL = 2, | ||
| 1366 | + ReadWriteINTEL = 3, | ||
| 1367 | + } | ||
| 1368 | + | ||
| 1369 | + [AllowDuplicates, CRepr] public enum LoadCacheControl | ||
| 1370 | + { | ||
| 1371 | + UncachedINTEL = 0, | ||
| 1372 | + CachedINTEL = 1, | ||
| 1373 | + StreamingINTEL = 2, | ||
| 1374 | + InvalidateAfterReadINTEL = 3, | ||
| 1375 | + ConstCachedINTEL = 4, | ||
| 1376 | + } | ||
| 1377 | + | ||
| 1378 | + [AllowDuplicates, CRepr] public enum StoreCacheControl | ||
| 1379 | + { | ||
| 1380 | + UncachedINTEL = 0, | ||
| 1381 | + WriteThroughINTEL = 1, | ||
| 1382 | + WriteBackINTEL = 2, | ||
| 1383 | + StreamingINTEL = 3, | ||
| 1384 | + } | ||
| 1385 | + | ||
| 1233 | [AllowDuplicates, CRepr] public enum Op | 1386 | [AllowDuplicates, CRepr] public enum Op |
| 1234 | { | 1387 | { |
| 1235 | OpNop = 0, | 1388 | OpNop = 0, |
| @@ -1576,6 +1729,9 @@ namespace Spv | |||
| 1576 | OpPtrEqual = 401, | 1729 | OpPtrEqual = 401, |
| 1577 | OpPtrNotEqual = 402, | 1730 | OpPtrNotEqual = 402, |
| 1578 | OpPtrDiff = 403, | 1731 | OpPtrDiff = 403, |
| 1732 | + OpColorAttachmentReadEXT = 4160, | ||
| 1733 | + OpDepthAttachmentReadEXT = 4161, | ||
| 1734 | + OpStencilAttachmentReadEXT = 4162, | ||
| 1579 | OpTerminateInvocation = 4416, | 1735 | OpTerminateInvocation = 4416, |
| 1580 | OpSubgroupBallotKHR = 4421, | 1736 | OpSubgroupBallotKHR = 4421, |
| 1581 | OpSubgroupFirstInvocationKHR = 4422, | 1737 | OpSubgroupFirstInvocationKHR = 4422, |
| @@ -1601,6 +1757,11 @@ namespace Spv | |||
| 1601 | OpUDotAccSatKHR = 4454, | 1757 | OpUDotAccSatKHR = 4454, |
| 1602 | OpSUDotAccSat = 4455, | 1758 | OpSUDotAccSat = 4455, |
| 1603 | OpSUDotAccSatKHR = 4455, | 1759 | OpSUDotAccSatKHR = 4455, |
| 1760 | + OpTypeCooperativeMatrixKHR = 4456, | ||
| 1761 | + OpCooperativeMatrixLoadKHR = 4457, | ||
| 1762 | + OpCooperativeMatrixStoreKHR = 4458, | ||
| 1763 | + OpCooperativeMatrixMulAddKHR = 4459, | ||
| 1764 | + OpCooperativeMatrixLengthKHR = 4460, | ||
| 1604 | OpTypeRayQueryKHR = 4472, | 1765 | OpTypeRayQueryKHR = 4472, |
| 1605 | OpRayQueryInitializeKHR = 4473, | 1766 | OpRayQueryInitializeKHR = 4473, |
| 1606 | OpRayQueryTerminateKHR = 4474, | 1767 | OpRayQueryTerminateKHR = 4474, |
| @@ -1608,6 +1769,10 @@ namespace Spv | |||
| 1608 | OpRayQueryConfirmIntersectionKHR = 4476, | 1769 | OpRayQueryConfirmIntersectionKHR = 4476, |
| 1609 | OpRayQueryProceedKHR = 4477, | 1770 | OpRayQueryProceedKHR = 4477, |
| 1610 | OpRayQueryGetIntersectionTypeKHR = 4479, | 1771 | OpRayQueryGetIntersectionTypeKHR = 4479, |
| 1772 | + OpImageSampleWeightedQCOM = 4480, | ||
| 1773 | + OpImageBoxFilterQCOM = 4481, | ||
| 1774 | + OpImageBlockMatchSSDQCOM = 4482, | ||
| 1775 | + OpImageBlockMatchSADQCOM = 4483, | ||
| 1611 | OpGroupIAddNonUniformAMD = 5000, | 1776 | OpGroupIAddNonUniformAMD = 5000, |
| 1612 | OpGroupFAddNonUniformAMD = 5001, | 1777 | OpGroupFAddNonUniformAMD = 5001, |
| 1613 | OpGroupFMinNonUniformAMD = 5002, | 1778 | OpGroupFMinNonUniformAMD = 5002, |
| @@ -1619,11 +1784,49 @@ namespace Spv | |||
| 1619 | OpFragmentMaskFetchAMD = 5011, | 1784 | OpFragmentMaskFetchAMD = 5011, |
| 1620 | OpFragmentFetchAMD = 5012, | 1785 | OpFragmentFetchAMD = 5012, |
| 1621 | OpReadClockKHR = 5056, | 1786 | OpReadClockKHR = 5056, |
| 1787 | + OpFinalizeNodePayloadsAMDX = 5075, | ||
| 1788 | + OpFinishWritingNodePayloadAMDX = 5078, | ||
| 1789 | + OpInitializeNodePayloadsAMDX = 5090, | ||
| 1790 | + OpHitObjectRecordHitMotionNV = 5249, | ||
| 1791 | + OpHitObjectRecordHitWithIndexMotionNV = 5250, | ||
| 1792 | + OpHitObjectRecordMissMotionNV = 5251, | ||
| 1793 | + OpHitObjectGetWorldToObjectNV = 5252, | ||
| 1794 | + OpHitObjectGetObjectToWorldNV = 5253, | ||
| 1795 | + OpHitObjectGetObjectRayDirectionNV = 5254, | ||
| 1796 | + OpHitObjectGetObjectRayOriginNV = 5255, | ||
| 1797 | + OpHitObjectTraceRayMotionNV = 5256, | ||
| 1798 | + OpHitObjectGetShaderRecordBufferHandleNV = 5257, | ||
| 1799 | + OpHitObjectGetShaderBindingTableRecordIndexNV = 5258, | ||
| 1800 | + OpHitObjectRecordEmptyNV = 5259, | ||
| 1801 | + OpHitObjectTraceRayNV = 5260, | ||
| 1802 | + OpHitObjectRecordHitNV = 5261, | ||
| 1803 | + OpHitObjectRecordHitWithIndexNV = 5262, | ||
| 1804 | + OpHitObjectRecordMissNV = 5263, | ||
| 1805 | + OpHitObjectExecuteShaderNV = 5264, | ||
| 1806 | + OpHitObjectGetCurrentTimeNV = 5265, | ||
| 1807 | + OpHitObjectGetAttributesNV = 5266, | ||
| 1808 | + OpHitObjectGetHitKindNV = 5267, | ||
| 1809 | + OpHitObjectGetPrimitiveIndexNV = 5268, | ||
| 1810 | + OpHitObjectGetGeometryIndexNV = 5269, | ||
| 1811 | + OpHitObjectGetInstanceIdNV = 5270, | ||
| 1812 | + OpHitObjectGetInstanceCustomIndexNV = 5271, | ||
| 1813 | + OpHitObjectGetWorldRayDirectionNV = 5272, | ||
| 1814 | + OpHitObjectGetWorldRayOriginNV = 5273, | ||
| 1815 | + OpHitObjectGetRayTMaxNV = 5274, | ||
| 1816 | + OpHitObjectGetRayTMinNV = 5275, | ||
| 1817 | + OpHitObjectIsEmptyNV = 5276, | ||
| 1818 | + OpHitObjectIsHitNV = 5277, | ||
| 1819 | + OpHitObjectIsMissNV = 5278, | ||
| 1820 | + OpReorderThreadWithHitObjectNV = 5279, | ||
| 1821 | + OpReorderThreadWithHintNV = 5280, | ||
| 1822 | + OpTypeHitObjectNV = 5281, | ||
| 1622 | OpImageSampleFootprintNV = 5283, | 1823 | OpImageSampleFootprintNV = 5283, |
| 1623 | OpEmitMeshTasksEXT = 5294, | 1824 | OpEmitMeshTasksEXT = 5294, |
| 1624 | OpSetMeshOutputsEXT = 5295, | 1825 | OpSetMeshOutputsEXT = 5295, |
| 1625 | OpGroupNonUniformPartitionNV = 5296, | 1826 | OpGroupNonUniformPartitionNV = 5296, |
| 1626 | OpWritePackedPrimitiveIndices4x8NV = 5299, | 1827 | OpWritePackedPrimitiveIndices4x8NV = 5299, |
| 1828 | + OpFetchMicroTriangleVertexPositionNV = 5300, | ||
| 1829 | + OpFetchMicroTriangleVertexBarycentricNV = 5301, | ||
| 1627 | OpReportIntersectionKHR = 5334, | 1830 | OpReportIntersectionKHR = 5334, |
| 1628 | OpReportIntersectionNV = 5334, | 1831 | OpReportIntersectionNV = 5334, |
| 1629 | OpIgnoreIntersectionNV = 5335, | 1832 | OpIgnoreIntersectionNV = 5335, |
| @@ -1631,6 +1834,7 @@ namespace Spv | |||
| 1631 | OpTraceNV = 5337, | 1834 | OpTraceNV = 5337, |
| 1632 | OpTraceMotionNV = 5338, | 1835 | OpTraceMotionNV = 5338, |
| 1633 | OpTraceRayMotionNV = 5339, | 1836 | OpTraceRayMotionNV = 5339, |
| 1837 | + OpRayQueryGetIntersectionTriangleVertexPositionsKHR = 5340, | ||
| 1634 | OpTypeAccelerationStructureKHR = 5341, | 1838 | OpTypeAccelerationStructureKHR = 5341, |
| 1635 | OpTypeAccelerationStructureNV = 5341, | 1839 | OpTypeAccelerationStructureNV = 5341, |
| 1636 | OpExecuteCallableNV = 5344, | 1840 | OpExecuteCallableNV = 5344, |
| @@ -1892,6 +2096,9 @@ namespace Spv | |||
| 1892 | OpTypeStructContinuedINTEL = 6090, | 2096 | OpTypeStructContinuedINTEL = 6090, |
| 1893 | OpConstantCompositeContinuedINTEL = 6091, | 2097 | OpConstantCompositeContinuedINTEL = 6091, |
| 1894 | OpSpecConstantCompositeContinuedINTEL = 6092, | 2098 | OpSpecConstantCompositeContinuedINTEL = 6092, |
| 2099 | + OpCompositeConstructContinuedINTEL = 6096, | ||
| 2100 | + OpConvertFToBF16INTEL = 6116, | ||
| 2101 | + OpConvertBF16ToFINTEL = 6117, | ||
| 1895 | OpControlBarrierArriveINTEL = 6142, | 2102 | OpControlBarrierArriveINTEL = 6142, |
| 1896 | OpControlBarrierWaitINTEL = 6143, | 2103 | OpControlBarrierWaitINTEL = 6143, |
| 1897 | OpGroupIMulKHR = 6401, | 2104 | OpGroupIMulKHR = 6401, |
| @@ -65,6 +65,10 @@ namespace Spv | |||
| 65 | HLSL = 5, | 65 | HLSL = 5, |
| 66 | CPP_for_OpenCL = 6, | 66 | CPP_for_OpenCL = 6, |
| 67 | SYCL = 7, | 67 | SYCL = 7, |
| 68 | + HERO_C = 8, | ||
| 69 | + NZSL = 9, | ||
| 70 | + WGSL = 10, | ||
| 71 | + Slang = 11, | ||
| 68 | } | 72 | } |
| 69 | 73 | ||
| 70 | public enum ExecutionModel | 74 | public enum ExecutionModel |
| @@ -152,6 +156,9 @@ namespace Spv | |||
| 152 | SubgroupsPerWorkgroupId = 37, | 156 | SubgroupsPerWorkgroupId = 37, |
| 153 | LocalSizeId = 38, | 157 | LocalSizeId = 38, |
| 154 | LocalSizeHintId = 39, | 158 | LocalSizeHintId = 39, |
| 159 | + NonCoherentColorAttachmentReadEXT = 4169, | ||
| 160 | + NonCoherentDepthAttachmentReadEXT = 4170, | ||
| 161 | + NonCoherentStencilAttachmentReadEXT = 4171, | ||
| 155 | SubgroupUniformControlFlowKHR = 4421, | 162 | SubgroupUniformControlFlowKHR = 4421, |
| 156 | PostDepthCoverage = 4446, | 163 | PostDepthCoverage = 4446, |
| 157 | DenormPreserve = 4459, | 164 | DenormPreserve = 4459, |
| @@ -161,6 +168,11 @@ namespace Spv | |||
| 161 | RoundingModeRTZ = 4463, | 168 | RoundingModeRTZ = 4463, |
| 162 | EarlyAndLateFragmentTestsAMD = 5017, | 169 | EarlyAndLateFragmentTestsAMD = 5017, |
| 163 | StencilRefReplacingEXT = 5027, | 170 | StencilRefReplacingEXT = 5027, |
| 171 | + CoalescingAMDX = 5069, | ||
| 172 | + MaxNodeRecursionAMDX = 5071, | ||
| 173 | + StaticNumWorkgroupsAMDX = 5072, | ||
| 174 | + ShaderIndexAMDX = 5073, | ||
| 175 | + MaxNumWorkgroupsAMDX = 5077, | ||
| 164 | StencilRefUnchangedFrontAMD = 5079, | 176 | StencilRefUnchangedFrontAMD = 5079, |
| 165 | StencilRefGreaterFrontAMD = 5080, | 177 | StencilRefGreaterFrontAMD = 5080, |
| 166 | StencilRefLessFrontAMD = 5081, | 178 | StencilRefLessFrontAMD = 5081, |
| @@ -191,6 +203,8 @@ namespace Spv | |||
| 191 | NoGlobalOffsetINTEL = 5895, | 203 | NoGlobalOffsetINTEL = 5895, |
| 192 | NumSIMDWorkitemsINTEL = 5896, | 204 | NumSIMDWorkitemsINTEL = 5896, |
| 193 | SchedulerTargetFmaxMhzINTEL = 5903, | 205 | SchedulerTargetFmaxMhzINTEL = 5903, |
| 206 | + StreamingInterfaceINTEL = 6154, | ||
| 207 | + RegisterMapInterfaceINTEL = 6160, | ||
| 194 | NamedBarrierCountINTEL = 6417, | 208 | NamedBarrierCountINTEL = 6417, |
| 195 | } | 209 | } |
| 196 | 210 | ||
| @@ -209,6 +223,9 @@ namespace Spv | |||
| 209 | AtomicCounter = 10, | 223 | AtomicCounter = 10, |
| 210 | Image = 11, | 224 | Image = 11, |
| 211 | StorageBuffer = 12, | 225 | StorageBuffer = 12, |
| 226 | + TileImageEXT = 4172, | ||
| 227 | + NodePayloadAMDX = 5068, | ||
| 228 | + NodeOutputPayloadAMDX = 5076, | ||
| 212 | CallableDataKHR = 5328, | 229 | CallableDataKHR = 5328, |
| 213 | CallableDataNV = 5328, | 230 | CallableDataNV = 5328, |
| 214 | IncomingCallableDataKHR = 5329, | 231 | IncomingCallableDataKHR = 5329, |
| @@ -223,6 +240,7 @@ namespace Spv | |||
| 223 | ShaderRecordBufferNV = 5343, | 240 | ShaderRecordBufferNV = 5343, |
| 224 | PhysicalStorageBuffer = 5349, | 241 | PhysicalStorageBuffer = 5349, |
| 225 | PhysicalStorageBufferEXT = 5349, | 242 | PhysicalStorageBufferEXT = 5349, |
| 243 | + HitObjectAttributeNV = 5385, | ||
| 226 | TaskPayloadWorkgroupEXT = 5402, | 244 | TaskPayloadWorkgroupEXT = 5402, |
| 227 | CodeSectionINTEL = 5605, | 245 | CodeSectionINTEL = 5605, |
| 228 | DeviceOnlyINTEL = 5936, | 246 | DeviceOnlyINTEL = 5936, |
| @@ -238,6 +256,7 @@ namespace Spv | |||
| 238 | Rect = 4, | 256 | Rect = 4, |
| 239 | Buffer = 5, | 257 | Buffer = 5, |
| 240 | SubpassData = 6, | 258 | SubpassData = 6, |
| 259 | + TileImageDataEXT = 4173, | ||
| 241 | } | 260 | } |
| 242 | 261 | ||
| 243 | public enum SamplerAddressingMode | 262 | public enum SamplerAddressingMode |
| @@ -344,6 +363,8 @@ namespace Spv | |||
| 344 | Float = 14, | 363 | Float = 14, |
| 345 | UnormInt24 = 15, | 364 | UnormInt24 = 15, |
| 346 | UnormInt101010_2 = 16, | 365 | UnormInt101010_2 = 16, |
| 366 | + UnsignedIntRaw10EXT = 19, | ||
| 367 | + UnsignedIntRaw12EXT = 20, | ||
| 347 | } | 368 | } |
| 348 | 369 | ||
| 349 | public enum ImageOperandsShift | 370 | public enum ImageOperandsShift |
| @@ -450,6 +471,7 @@ namespace Spv | |||
| 450 | NoCapture = 5, | 471 | NoCapture = 5, |
| 451 | NoWrite = 6, | 472 | NoWrite = 6, |
| 452 | NoReadWrite = 7, | 473 | NoReadWrite = 7, |
| 474 | + RuntimeAlignedINTEL = 5940, | ||
| 453 | } | 475 | } |
| 454 | 476 | ||
| 455 | public enum Decoration | 477 | public enum Decoration |
| @@ -503,7 +525,13 @@ namespace Spv | |||
| 503 | MaxByteOffsetId = 47, | 525 | MaxByteOffsetId = 47, |
| 504 | NoSignedWrap = 4469, | 526 | NoSignedWrap = 4469, |
| 505 | NoUnsignedWrap = 4470, | 527 | NoUnsignedWrap = 4470, |
| 528 | + WeightTextureQCOM = 4487, | ||
| 529 | + BlockMatchTextureQCOM = 4488, | ||
| 506 | ExplicitInterpAMD = 4999, | 530 | ExplicitInterpAMD = 4999, |
| 531 | + NodeSharesPayloadLimitsWithAMDX = 5019, | ||
| 532 | + NodeMaxPayloadsAMDX = 5020, | ||
| 533 | + TrackFinishWritingAMDX = 5078, | ||
| 534 | + PayloadNodeNameAMDX = 5091, | ||
| 507 | OverrideCoverageNV = 5248, | 535 | OverrideCoverageNV = 5248, |
| 508 | PassthroughNV = 5250, | 536 | PassthroughNV = 5250, |
| 509 | ViewportRelativeNV = 5252, | 537 | ViewportRelativeNV = 5252, |
| @@ -520,6 +548,7 @@ namespace Spv | |||
| 520 | RestrictPointerEXT = 5355, | 548 | RestrictPointerEXT = 5355, |
| 521 | AliasedPointer = 5356, | 549 | AliasedPointer = 5356, |
| 522 | AliasedPointerEXT = 5356, | 550 | AliasedPointerEXT = 5356, |
| 551 | + HitObjectShaderRecordBufferNV = 5386, | ||
| 523 | BindlessSamplerNV = 5398, | 552 | BindlessSamplerNV = 5398, |
| 524 | BindlessImageNV = 5399, | 553 | BindlessImageNV = 5399, |
| 525 | BoundSamplerNV = 5400, | 554 | BoundSamplerNV = 5400, |
| @@ -552,20 +581,45 @@ namespace Spv | |||
| 552 | MergeINTEL = 5834, | 581 | MergeINTEL = 5834, |
| 553 | BankBitsINTEL = 5835, | 582 | BankBitsINTEL = 5835, |
| 554 | ForcePow2DepthINTEL = 5836, | 583 | ForcePow2DepthINTEL = 5836, |
| 584 | + StridesizeINTEL = 5883, | ||
| 585 | + WordsizeINTEL = 5884, | ||
| 586 | + TrueDualPortINTEL = 5885, | ||
| 555 | BurstCoalesceINTEL = 5899, | 587 | BurstCoalesceINTEL = 5899, |
| 556 | CacheSizeINTEL = 5900, | 588 | CacheSizeINTEL = 5900, |
| 557 | DontStaticallyCoalesceINTEL = 5901, | 589 | DontStaticallyCoalesceINTEL = 5901, |
| 558 | PrefetchINTEL = 5902, | 590 | PrefetchINTEL = 5902, |
| 559 | StallEnableINTEL = 5905, | 591 | StallEnableINTEL = 5905, |
| 560 | FuseLoopsInFunctionINTEL = 5907, | 592 | FuseLoopsInFunctionINTEL = 5907, |
| 593 | + MathOpDSPModeINTEL = 5909, | ||
| 561 | AliasScopeINTEL = 5914, | 594 | AliasScopeINTEL = 5914, |
| 562 | NoAliasINTEL = 5915, | 595 | NoAliasINTEL = 5915, |
| 596 | + InitiationIntervalINTEL = 5917, | ||
| 597 | + MaxConcurrencyINTEL = 5918, | ||
| 598 | + PipelineEnableINTEL = 5919, | ||
| 563 | BufferLocationINTEL = 5921, | 599 | BufferLocationINTEL = 5921, |
| 564 | IOPipeStorageINTEL = 5944, | 600 | IOPipeStorageINTEL = 5944, |
| 565 | FunctionFloatingPointModeINTEL = 6080, | 601 | FunctionFloatingPointModeINTEL = 6080, |
| 566 | SingleElementVectorINTEL = 6085, | 602 | SingleElementVectorINTEL = 6085, |
| 567 | VectorComputeCallableFunctionINTEL = 6087, | 603 | VectorComputeCallableFunctionINTEL = 6087, |
| 568 | MediaBlockIOINTEL = 6140, | 604 | MediaBlockIOINTEL = 6140, |
| 605 | + StallFreeINTEL = 6151, | ||
| 606 | + FPMaxErrorDecorationINTEL = 6170, | ||
| 607 | + LatencyControlLabelINTEL = 6172, | ||
| 608 | + LatencyControlConstraintINTEL = 6173, | ||
| 609 | + ConduitKernelArgumentINTEL = 6175, | ||
| 610 | + RegisterMapKernelArgumentINTEL = 6176, | ||
| 611 | + MMHostInterfaceAddressWidthINTEL = 6177, | ||
| 612 | + MMHostInterfaceDataWidthINTEL = 6178, | ||
| 613 | + MMHostInterfaceLatencyINTEL = 6179, | ||
| 614 | + MMHostInterfaceReadWriteModeINTEL = 6180, | ||
| 615 | + MMHostInterfaceMaxBurstINTEL = 6181, | ||
| 616 | + MMHostInterfaceWaitRequestINTEL = 6182, | ||
| 617 | + StableKernelArgumentINTEL = 6183, | ||
| 618 | + HostAccessINTEL = 6188, | ||
| 619 | + InitModeINTEL = 6190, | ||
| 620 | + ImplementInRegisterMapINTEL = 6191, | ||
| 621 | + CacheControlLoadINTEL = 6442, | ||
| 622 | + CacheControlStoreINTEL = 6443, | ||
| 569 | } | 623 | } |
| 570 | 624 | ||
| 571 | public enum BuiltIn | 625 | public enum BuiltIn |
| @@ -641,6 +695,8 @@ namespace Spv | |||
| 641 | BaryCoordSmoothSampleAMD = 4997, | 695 | BaryCoordSmoothSampleAMD = 4997, |
| 642 | BaryCoordPullModelAMD = 4998, | 696 | BaryCoordPullModelAMD = 4998, |
| 643 | FragStencilRefEXT = 5014, | 697 | FragStencilRefEXT = 5014, |
| 698 | + CoalescedInputCountAMDX = 5021, | ||
| 699 | + ShaderIndexAMDX = 5073, | ||
| 644 | ViewportMaskNV = 5253, | 700 | ViewportMaskNV = 5253, |
| 645 | SecondaryPositionNV = 5257, | 701 | SecondaryPositionNV = 5257, |
| 646 | SecondaryViewportMaskNV = 5258, | 702 | SecondaryViewportMaskNV = 5258, |
| @@ -693,6 +749,9 @@ namespace Spv | |||
| 693 | HitKindKHR = 5333, | 749 | HitKindKHR = 5333, |
| 694 | HitKindNV = 5333, | 750 | HitKindNV = 5333, |
| 695 | CurrentRayTimeNV = 5334, | 751 | CurrentRayTimeNV = 5334, |
| 752 | + HitTriangleVertexPositionsKHR = 5335, | ||
| 753 | + HitMicroTriangleVertexPositionsNV = 5337, | ||
| 754 | + HitMicroTriangleVertexBarycentricsNV = 5344, | ||
| 696 | IncomingRayFlagsKHR = 5351, | 755 | IncomingRayFlagsKHR = 5351, |
| 697 | IncomingRayFlagsNV = 5351, | 756 | IncomingRayFlagsNV = 5351, |
| 698 | RayGeometryIndexKHR = 5352, | 757 | RayGeometryIndexKHR = 5352, |
| @@ -700,6 +759,8 @@ namespace Spv | |||
| 700 | SMCountNV = 5375, | 759 | SMCountNV = 5375, |
| 701 | WarpIDNV = 5376, | 760 | WarpIDNV = 5376, |
| 702 | SMIDNV = 5377, | 761 | SMIDNV = 5377, |
| 762 | + HitKindFrontFacingMicroTriangleNV = 5405, | ||
| 763 | + HitKindBackFacingMicroTriangleNV = 5406, | ||
| 703 | CullMaskKHR = 6021, | 764 | CullMaskKHR = 6021, |
| 704 | } | 765 | } |
| 705 | 766 | ||
| @@ -735,6 +796,8 @@ namespace Spv | |||
| 735 | MaxInterleavingINTEL = 21, | 796 | MaxInterleavingINTEL = 21, |
| 736 | SpeculatedIterationsINTEL = 22, | 797 | SpeculatedIterationsINTEL = 22, |
| 737 | NoFusionINTEL = 23, | 798 | NoFusionINTEL = 23, |
| 799 | + LoopCountINTEL = 24, | ||
| 800 | + MaxReinvocationDelayINTEL = 25, | ||
| 738 | } | 801 | } |
| 739 | 802 | ||
| 740 | public enum LoopControlMask | 803 | public enum LoopControlMask |
| @@ -757,6 +820,8 @@ namespace Spv | |||
| 757 | MaxInterleavingINTEL = 0x00200000, | 820 | MaxInterleavingINTEL = 0x00200000, |
| 758 | SpeculatedIterationsINTEL = 0x00400000, | 821 | SpeculatedIterationsINTEL = 0x00400000, |
| 759 | NoFusionINTEL = 0x00800000, | 822 | NoFusionINTEL = 0x00800000, |
| 823 | + LoopCountINTEL = 0x01000000, | ||
| 824 | + MaxReinvocationDelayINTEL = 0x02000000, | ||
| 760 | } | 825 | } |
| 761 | 826 | ||
| 762 | public enum FunctionControlShift | 827 | public enum FunctionControlShift |
| @@ -966,6 +1031,9 @@ namespace Spv | |||
| 966 | ShaderViewportIndex = 70, | 1031 | ShaderViewportIndex = 70, |
| 967 | UniformDecoration = 71, | 1032 | UniformDecoration = 71, |
| 968 | CoreBuiltinsARM = 4165, | 1033 | CoreBuiltinsARM = 4165, |
| 1034 | + TileImageColorReadAccessEXT = 4166, | ||
| 1035 | + TileImageDepthReadAccessEXT = 4167, | ||
| 1036 | + TileImageStencilReadAccessEXT = 4168, | ||
| 969 | FragmentShadingRateKHR = 4422, | 1037 | FragmentShadingRateKHR = 4422, |
| 970 | SubgroupBallotKHR = 4423, | 1038 | SubgroupBallotKHR = 4423, |
| 971 | DrawParameters = 4427, | 1039 | DrawParameters = 4427, |
| @@ -997,6 +1065,9 @@ namespace Spv | |||
| 997 | RayQueryKHR = 4472, | 1065 | RayQueryKHR = 4472, |
| 998 | RayTraversalPrimitiveCullingKHR = 4478, | 1066 | RayTraversalPrimitiveCullingKHR = 4478, |
| 999 | RayTracingKHR = 4479, | 1067 | RayTracingKHR = 4479, |
| 1068 | + TextureSampleWeightedQCOM = 4484, | ||
| 1069 | + TextureBoxFilterQCOM = 4485, | ||
| 1070 | + TextureBlockMatchQCOM = 4486, | ||
| 1000 | Float16ImageAMD = 5008, | 1071 | Float16ImageAMD = 5008, |
| 1001 | ImageGatherBiasLodAMD = 5009, | 1072 | ImageGatherBiasLodAMD = 5009, |
| 1002 | FragmentMaskAMD = 5010, | 1073 | FragmentMaskAMD = 5010, |
| @@ -1004,6 +1075,7 @@ namespace Spv | |||
| 1004 | ImageReadWriteLodAMD = 5015, | 1075 | ImageReadWriteLodAMD = 5015, |
| 1005 | Int64ImageEXT = 5016, | 1076 | Int64ImageEXT = 5016, |
| 1006 | ShaderClockKHR = 5055, | 1077 | ShaderClockKHR = 5055, |
| 1078 | + ShaderEnqueueAMDX = 5067, | ||
| 1007 | SampleMaskOverrideCoverageNV = 5249, | 1079 | SampleMaskOverrideCoverageNV = 5249, |
| 1008 | GeometryShaderPassthroughNV = 5251, | 1080 | GeometryShaderPassthroughNV = 5251, |
| 1009 | ShaderViewportIndexLayerEXT = 5254, | 1081 | ShaderViewportIndexLayerEXT = 5254, |
| @@ -1045,6 +1117,7 @@ namespace Spv | |||
| 1045 | UniformTexelBufferArrayNonUniformIndexingEXT = 5311, | 1117 | UniformTexelBufferArrayNonUniformIndexingEXT = 5311, |
| 1046 | StorageTexelBufferArrayNonUniformIndexing = 5312, | 1118 | StorageTexelBufferArrayNonUniformIndexing = 5312, |
| 1047 | StorageTexelBufferArrayNonUniformIndexingEXT = 5312, | 1119 | StorageTexelBufferArrayNonUniformIndexingEXT = 5312, |
| 1120 | + RayTracingPositionFetchKHR = 5336, | ||
| 1048 | RayTracingNV = 5340, | 1121 | RayTracingNV = 5340, |
| 1049 | RayTracingMotionBlurNV = 5341, | 1122 | RayTracingMotionBlurNV = 5341, |
| 1050 | VulkanMemoryModel = 5345, | 1123 | VulkanMemoryModel = 5345, |
| @@ -1062,8 +1135,12 @@ namespace Spv | |||
| 1062 | FragmentShaderPixelInterlockEXT = 5378, | 1135 | FragmentShaderPixelInterlockEXT = 5378, |
| 1063 | DemoteToHelperInvocation = 5379, | 1136 | DemoteToHelperInvocation = 5379, |
| 1064 | DemoteToHelperInvocationEXT = 5379, | 1137 | DemoteToHelperInvocationEXT = 5379, |
| 1138 | + DisplacementMicromapNV = 5380, | ||
| 1065 | RayTracingOpacityMicromapEXT = 5381, | 1139 | RayTracingOpacityMicromapEXT = 5381, |
| 1140 | + ShaderInvocationReorderNV = 5383, | ||
| 1066 | BindlessTextureNV = 5390, | 1141 | BindlessTextureNV = 5390, |
| 1142 | + RayQueryPositionFetchKHR = 5391, | ||
| 1143 | + RayTracingDisplacementMicromapNV = 5409, | ||
| 1067 | SubgroupShuffleINTEL = 5568, | 1144 | SubgroupShuffleINTEL = 5568, |
| 1068 | SubgroupBufferBlockIOINTEL = 5569, | 1145 | SubgroupBufferBlockIOINTEL = 5569, |
| 1069 | SubgroupImageBlockIOINTEL = 5570, | 1146 | SubgroupImageBlockIOINTEL = 5570, |
| @@ -1096,10 +1173,13 @@ namespace Spv | |||
| 1096 | FPGAMemoryAccessesINTEL = 5898, | 1173 | FPGAMemoryAccessesINTEL = 5898, |
| 1097 | FPGAClusterAttributesINTEL = 5904, | 1174 | FPGAClusterAttributesINTEL = 5904, |
| 1098 | LoopFuseINTEL = 5906, | 1175 | LoopFuseINTEL = 5906, |
| 1176 | + FPGADSPControlINTEL = 5908, | ||
| 1099 | MemoryAccessAliasingINTEL = 5910, | 1177 | MemoryAccessAliasingINTEL = 5910, |
| 1178 | + FPGAInvocationPipeliningAttributesINTEL = 5916, | ||
| 1100 | FPGABufferLocationINTEL = 5920, | 1179 | FPGABufferLocationINTEL = 5920, |
| 1101 | ArbitraryPrecisionFixedPointINTEL = 5922, | 1180 | ArbitraryPrecisionFixedPointINTEL = 5922, |
| 1102 | USMStorageClassesINTEL = 5935, | 1181 | USMStorageClassesINTEL = 5935, |
| 1182 | + RuntimeAlignedAttributeINTEL = 5939, | ||
| 1103 | IOPipesINTEL = 5943, | 1183 | IOPipesINTEL = 5943, |
| 1104 | BlockingPipesINTEL = 5945, | 1184 | BlockingPipesINTEL = 5945, |
| 1105 | FPGARegINTEL = 5948, | 1185 | FPGARegINTEL = 5948, |
| @@ -1112,16 +1192,26 @@ namespace Spv | |||
| 1112 | DotProduct = 6019, | 1192 | DotProduct = 6019, |
| 1113 | DotProductKHR = 6019, | 1193 | DotProductKHR = 6019, |
| 1114 | RayCullMaskKHR = 6020, | 1194 | RayCullMaskKHR = 6020, |
| 1195 | + CooperativeMatrixKHR = 6022, | ||
| 1115 | BitInstructions = 6025, | 1196 | BitInstructions = 6025, |
| 1116 | GroupNonUniformRotateKHR = 6026, | 1197 | GroupNonUniformRotateKHR = 6026, |
| 1117 | AtomicFloat32AddEXT = 6033, | 1198 | AtomicFloat32AddEXT = 6033, |
| 1118 | AtomicFloat64AddEXT = 6034, | 1199 | AtomicFloat64AddEXT = 6034, |
| 1119 | - LongConstantCompositeINTEL = 6089, | 1200 | + LongCompositesINTEL = 6089, |
| 1120 | OptNoneINTEL = 6094, | 1201 | OptNoneINTEL = 6094, |
| 1121 | AtomicFloat16AddEXT = 6095, | 1202 | AtomicFloat16AddEXT = 6095, |
| 1122 | DebugInfoModuleINTEL = 6114, | 1203 | DebugInfoModuleINTEL = 6114, |
| 1204 | + BFloat16ConversionINTEL = 6115, | ||
| 1123 | SplitBarrierINTEL = 6141, | 1205 | SplitBarrierINTEL = 6141, |
| 1206 | + FPGAClusterAttributesV2INTEL = 6150, | ||
| 1207 | + FPGAKernelAttributesv2INTEL = 6161, | ||
| 1208 | + FPMaxErrorINTEL = 6169, | ||
| 1209 | + FPGALatencyControlINTEL = 6171, | ||
| 1210 | + FPGAArgumentInterfacesINTEL = 6174, | ||
| 1211 | + GlobalVariableHostAccessINTEL = 6187, | ||
| 1212 | + GlobalVariableFPGADecorationsINTEL = 6189, | ||
| 1124 | GroupUniformArithmeticKHR = 6400, | 1213 | GroupUniformArithmeticKHR = 6400, |
| 1214 | + CacheControlsINTEL = 6441, | ||
| 1125 | } | 1215 | } |
| 1126 | 1216 | ||
| 1127 | public enum RayFlagsShift | 1217 | public enum RayFlagsShift |
| @@ -1229,6 +1319,69 @@ namespace Spv | |||
| 1229 | PackedVectorFormat4x8BitKHR = 0, | 1319 | PackedVectorFormat4x8BitKHR = 0, |
| 1230 | } | 1320 | } |
| 1231 | 1321 | ||
| 1322 | + public enum CooperativeMatrixOperandsShift | ||
| 1323 | + { | ||
| 1324 | + MatrixASignedComponentsKHR = 0, | ||
| 1325 | + MatrixBSignedComponentsKHR = 1, | ||
| 1326 | + MatrixCSignedComponentsKHR = 2, | ||
| 1327 | + MatrixResultSignedComponentsKHR = 3, | ||
| 1328 | + SaturatingAccumulationKHR = 4, | ||
| 1329 | + } | ||
| 1330 | + | ||
| 1331 | + public enum CooperativeMatrixOperandsMask | ||
| 1332 | + { | ||
| 1333 | + MaskNone = 0, | ||
| 1334 | + MatrixASignedComponentsKHR = 0x00000001, | ||
| 1335 | + MatrixBSignedComponentsKHR = 0x00000002, | ||
| 1336 | + MatrixCSignedComponentsKHR = 0x00000004, | ||
| 1337 | + MatrixResultSignedComponentsKHR = 0x00000008, | ||
| 1338 | + SaturatingAccumulationKHR = 0x00000010, | ||
| 1339 | + } | ||
| 1340 | + | ||
| 1341 | + public enum CooperativeMatrixLayout | ||
| 1342 | + { | ||
| 1343 | + RowMajorKHR = 0, | ||
| 1344 | + ColumnMajorKHR = 1, | ||
| 1345 | + } | ||
| 1346 | + | ||
| 1347 | + public enum CooperativeMatrixUse | ||
| 1348 | + { | ||
| 1349 | + MatrixAKHR = 0, | ||
| 1350 | + MatrixBKHR = 1, | ||
| 1351 | + MatrixAccumulatorKHR = 2, | ||
| 1352 | + } | ||
| 1353 | + | ||
| 1354 | + public enum InitializationModeQualifier | ||
| 1355 | + { | ||
| 1356 | + InitOnDeviceReprogramINTEL = 0, | ||
| 1357 | + InitOnDeviceResetINTEL = 1, | ||
| 1358 | + } | ||
| 1359 | + | ||
| 1360 | + public enum HostAccessQualifier | ||
| 1361 | + { | ||
| 1362 | + NoneINTEL = 0, | ||
| 1363 | + ReadINTEL = 1, | ||
| 1364 | + WriteINTEL = 2, | ||
| 1365 | + ReadWriteINTEL = 3, | ||
| 1366 | + } | ||
| 1367 | + | ||
| 1368 | + public enum LoadCacheControl | ||
| 1369 | + { | ||
| 1370 | + UncachedINTEL = 0, | ||
| 1371 | + CachedINTEL = 1, | ||
| 1372 | + StreamingINTEL = 2, | ||
| 1373 | + InvalidateAfterReadINTEL = 3, | ||
| 1374 | + ConstCachedINTEL = 4, | ||
| 1375 | + } | ||
| 1376 | + | ||
| 1377 | + public enum StoreCacheControl | ||
| 1378 | + { | ||
| 1379 | + UncachedINTEL = 0, | ||
| 1380 | + WriteThroughINTEL = 1, | ||
| 1381 | + WriteBackINTEL = 2, | ||
| 1382 | + StreamingINTEL = 3, | ||
| 1383 | + } | ||
| 1384 | + | ||
| 1232 | public enum Op | 1385 | public enum Op |
| 1233 | { | 1386 | { |
| 1234 | OpNop = 0, | 1387 | OpNop = 0, |
| @@ -1575,6 +1728,9 @@ namespace Spv | |||
| 1575 | OpPtrEqual = 401, | 1728 | OpPtrEqual = 401, |
| 1576 | OpPtrNotEqual = 402, | 1729 | OpPtrNotEqual = 402, |
| 1577 | OpPtrDiff = 403, | 1730 | OpPtrDiff = 403, |
| 1731 | + OpColorAttachmentReadEXT = 4160, | ||
| 1732 | + OpDepthAttachmentReadEXT = 4161, | ||
| 1733 | + OpStencilAttachmentReadEXT = 4162, | ||
| 1578 | OpTerminateInvocation = 4416, | 1734 | OpTerminateInvocation = 4416, |
| 1579 | OpSubgroupBallotKHR = 4421, | 1735 | OpSubgroupBallotKHR = 4421, |
| 1580 | OpSubgroupFirstInvocationKHR = 4422, | 1736 | OpSubgroupFirstInvocationKHR = 4422, |
| @@ -1600,6 +1756,11 @@ namespace Spv | |||
| 1600 | OpUDotAccSatKHR = 4454, | 1756 | OpUDotAccSatKHR = 4454, |
| 1601 | OpSUDotAccSat = 4455, | 1757 | OpSUDotAccSat = 4455, |
| 1602 | OpSUDotAccSatKHR = 4455, | 1758 | OpSUDotAccSatKHR = 4455, |
| 1759 | + OpTypeCooperativeMatrixKHR = 4456, | ||
| 1760 | + OpCooperativeMatrixLoadKHR = 4457, | ||
| 1761 | + OpCooperativeMatrixStoreKHR = 4458, | ||
| 1762 | + OpCooperativeMatrixMulAddKHR = 4459, | ||
| 1763 | + OpCooperativeMatrixLengthKHR = 4460, | ||
| 1603 | OpTypeRayQueryKHR = 4472, | 1764 | OpTypeRayQueryKHR = 4472, |
| 1604 | OpRayQueryInitializeKHR = 4473, | 1765 | OpRayQueryInitializeKHR = 4473, |
| 1605 | OpRayQueryTerminateKHR = 4474, | 1766 | OpRayQueryTerminateKHR = 4474, |
| @@ -1607,6 +1768,10 @@ namespace Spv | |||
| 1607 | OpRayQueryConfirmIntersectionKHR = 4476, | 1768 | OpRayQueryConfirmIntersectionKHR = 4476, |
| 1608 | OpRayQueryProceedKHR = 4477, | 1769 | OpRayQueryProceedKHR = 4477, |
| 1609 | OpRayQueryGetIntersectionTypeKHR = 4479, | 1770 | OpRayQueryGetIntersectionTypeKHR = 4479, |
| 1771 | + OpImageSampleWeightedQCOM = 4480, | ||
| 1772 | + OpImageBoxFilterQCOM = 4481, | ||
| 1773 | + OpImageBlockMatchSSDQCOM = 4482, | ||
| 1774 | + OpImageBlockMatchSADQCOM = 4483, | ||
| 1610 | OpGroupIAddNonUniformAMD = 5000, | 1775 | OpGroupIAddNonUniformAMD = 5000, |
| 1611 | OpGroupFAddNonUniformAMD = 5001, | 1776 | OpGroupFAddNonUniformAMD = 5001, |
| 1612 | OpGroupFMinNonUniformAMD = 5002, | 1777 | OpGroupFMinNonUniformAMD = 5002, |
| @@ -1618,11 +1783,49 @@ namespace Spv | |||
| 1618 | OpFragmentMaskFetchAMD = 5011, | 1783 | OpFragmentMaskFetchAMD = 5011, |
| 1619 | OpFragmentFetchAMD = 5012, | 1784 | OpFragmentFetchAMD = 5012, |
| 1620 | OpReadClockKHR = 5056, | 1785 | OpReadClockKHR = 5056, |
| 1786 | + OpFinalizeNodePayloadsAMDX = 5075, | ||
| 1787 | + OpFinishWritingNodePayloadAMDX = 5078, | ||
| 1788 | + OpInitializeNodePayloadsAMDX = 5090, | ||
| 1789 | + OpHitObjectRecordHitMotionNV = 5249, | ||
| 1790 | + OpHitObjectRecordHitWithIndexMotionNV = 5250, | ||
| 1791 | + OpHitObjectRecordMissMotionNV = 5251, | ||
| 1792 | + OpHitObjectGetWorldToObjectNV = 5252, | ||
| 1793 | + OpHitObjectGetObjectToWorldNV = 5253, | ||
| 1794 | + OpHitObjectGetObjectRayDirectionNV = 5254, | ||
| 1795 | + OpHitObjectGetObjectRayOriginNV = 5255, | ||
| 1796 | + OpHitObjectTraceRayMotionNV = 5256, | ||
| 1797 | + OpHitObjectGetShaderRecordBufferHandleNV = 5257, | ||
| 1798 | + OpHitObjectGetShaderBindingTableRecordIndexNV = 5258, | ||
| 1799 | + OpHitObjectRecordEmptyNV = 5259, | ||
| 1800 | + OpHitObjectTraceRayNV = 5260, | ||
| 1801 | + OpHitObjectRecordHitNV = 5261, | ||
| 1802 | + OpHitObjectRecordHitWithIndexNV = 5262, | ||
| 1803 | + OpHitObjectRecordMissNV = 5263, | ||
| 1804 | + OpHitObjectExecuteShaderNV = 5264, | ||
| 1805 | + OpHitObjectGetCurrentTimeNV = 5265, | ||
| 1806 | + OpHitObjectGetAttributesNV = 5266, | ||
| 1807 | + OpHitObjectGetHitKindNV = 5267, | ||
| 1808 | + OpHitObjectGetPrimitiveIndexNV = 5268, | ||
| 1809 | + OpHitObjectGetGeometryIndexNV = 5269, | ||
| 1810 | + OpHitObjectGetInstanceIdNV = 5270, | ||
| 1811 | + OpHitObjectGetInstanceCustomIndexNV = 5271, | ||
| 1812 | + OpHitObjectGetWorldRayDirectionNV = 5272, | ||
| 1813 | + OpHitObjectGetWorldRayOriginNV = 5273, | ||
| 1814 | + OpHitObjectGetRayTMaxNV = 5274, | ||
| 1815 | + OpHitObjectGetRayTMinNV = 5275, | ||
| 1816 | + OpHitObjectIsEmptyNV = 5276, | ||
| 1817 | + OpHitObjectIsHitNV = 5277, | ||
| 1818 | + OpHitObjectIsMissNV = 5278, | ||
| 1819 | + OpReorderThreadWithHitObjectNV = 5279, | ||
| 1820 | + OpReorderThreadWithHintNV = 5280, | ||
| 1821 | + OpTypeHitObjectNV = 5281, | ||
| 1621 | OpImageSampleFootprintNV = 5283, | 1822 | OpImageSampleFootprintNV = 5283, |
| 1622 | OpEmitMeshTasksEXT = 5294, | 1823 | OpEmitMeshTasksEXT = 5294, |
| 1623 | OpSetMeshOutputsEXT = 5295, | 1824 | OpSetMeshOutputsEXT = 5295, |
| 1624 | OpGroupNonUniformPartitionNV = 5296, | 1825 | OpGroupNonUniformPartitionNV = 5296, |
| 1625 | OpWritePackedPrimitiveIndices4x8NV = 5299, | 1826 | OpWritePackedPrimitiveIndices4x8NV = 5299, |
| 1827 | + OpFetchMicroTriangleVertexPositionNV = 5300, | ||
| 1828 | + OpFetchMicroTriangleVertexBarycentricNV = 5301, | ||
| 1626 | OpReportIntersectionKHR = 5334, | 1829 | OpReportIntersectionKHR = 5334, |
| 1627 | OpReportIntersectionNV = 5334, | 1830 | OpReportIntersectionNV = 5334, |
| 1628 | OpIgnoreIntersectionNV = 5335, | 1831 | OpIgnoreIntersectionNV = 5335, |
| @@ -1630,6 +1833,7 @@ namespace Spv | |||
| 1630 | OpTraceNV = 5337, | 1833 | OpTraceNV = 5337, |
| 1631 | OpTraceMotionNV = 5338, | 1834 | OpTraceMotionNV = 5338, |
| 1632 | OpTraceRayMotionNV = 5339, | 1835 | OpTraceRayMotionNV = 5339, |
| 1836 | + OpRayQueryGetIntersectionTriangleVertexPositionsKHR = 5340, | ||
| 1633 | OpTypeAccelerationStructureKHR = 5341, | 1837 | OpTypeAccelerationStructureKHR = 5341, |
| 1634 | OpTypeAccelerationStructureNV = 5341, | 1838 | OpTypeAccelerationStructureNV = 5341, |
| 1635 | OpExecuteCallableNV = 5344, | 1839 | OpExecuteCallableNV = 5344, |
| @@ -1891,6 +2095,9 @@ namespace Spv | |||
| 1891 | OpTypeStructContinuedINTEL = 6090, | 2095 | OpTypeStructContinuedINTEL = 6090, |
| 1892 | OpConstantCompositeContinuedINTEL = 6091, | 2096 | OpConstantCompositeContinuedINTEL = 6091, |
| 1893 | OpSpecConstantCompositeContinuedINTEL = 6092, | 2097 | OpSpecConstantCompositeContinuedINTEL = 6092, |
| 2098 | + OpCompositeConstructContinuedINTEL = 6096, | ||
| 2099 | + OpConvertFToBF16INTEL = 6116, | ||
| 2100 | + OpConvertBF16ToFINTEL = 6117, | ||
| 1894 | OpControlBarrierArriveINTEL = 6142, | 2101 | OpControlBarrierArriveINTEL = 6142, |
| 1895 | OpControlBarrierWaitINTEL = 6143, | 2102 | OpControlBarrierWaitINTEL = 6143, |
| 1896 | OpGroupIMulKHR = 6401, | 2103 | OpGroupIMulKHR = 6401, |
| @@ -73,6 +73,10 @@ typedef enum SpvSourceLanguage_ { | |||
| 73 | SpvSourceLanguageHLSL = 5, | 73 | SpvSourceLanguageHLSL = 5, |
| 74 | SpvSourceLanguageCPP_for_OpenCL = 6, | 74 | SpvSourceLanguageCPP_for_OpenCL = 6, |
| 75 | SpvSourceLanguageSYCL = 7, | 75 | SpvSourceLanguageSYCL = 7, |
| 76 | + SpvSourceLanguageHERO_C = 8, | ||
| 77 | + SpvSourceLanguageNZSL = 9, | ||
| 78 | + SpvSourceLanguageWGSL = 10, | ||
| 79 | + SpvSourceLanguageSlang = 11, | ||
| 76 | SpvSourceLanguageMax = 0x7fffffff, | 80 | SpvSourceLanguageMax = 0x7fffffff, |
| 77 | } SpvSourceLanguage; | 81 | } SpvSourceLanguage; |
| 78 | 82 | ||
| @@ -160,6 +164,9 @@ typedef enum SpvExecutionMode_ { | |||
| 160 | SpvExecutionModeSubgroupsPerWorkgroupId = 37, | 164 | SpvExecutionModeSubgroupsPerWorkgroupId = 37, |
| 161 | SpvExecutionModeLocalSizeId = 38, | 165 | SpvExecutionModeLocalSizeId = 38, |
| 162 | SpvExecutionModeLocalSizeHintId = 39, | 166 | SpvExecutionModeLocalSizeHintId = 39, |
| 167 | + SpvExecutionModeNonCoherentColorAttachmentReadEXT = 4169, | ||
| 168 | + SpvExecutionModeNonCoherentDepthAttachmentReadEXT = 4170, | ||
| 169 | + SpvExecutionModeNonCoherentStencilAttachmentReadEXT = 4171, | ||
| 163 | SpvExecutionModeSubgroupUniformControlFlowKHR = 4421, | 170 | SpvExecutionModeSubgroupUniformControlFlowKHR = 4421, |
| 164 | SpvExecutionModePostDepthCoverage = 4446, | 171 | SpvExecutionModePostDepthCoverage = 4446, |
| 165 | SpvExecutionModeDenormPreserve = 4459, | 172 | SpvExecutionModeDenormPreserve = 4459, |
| @@ -169,6 +176,11 @@ typedef enum SpvExecutionMode_ { | |||
| 169 | SpvExecutionModeRoundingModeRTZ = 4463, | 176 | SpvExecutionModeRoundingModeRTZ = 4463, |
| 170 | SpvExecutionModeEarlyAndLateFragmentTestsAMD = 5017, | 177 | SpvExecutionModeEarlyAndLateFragmentTestsAMD = 5017, |
| 171 | SpvExecutionModeStencilRefReplacingEXT = 5027, | 178 | SpvExecutionModeStencilRefReplacingEXT = 5027, |
| 179 | + SpvExecutionModeCoalescingAMDX = 5069, | ||
| 180 | + SpvExecutionModeMaxNodeRecursionAMDX = 5071, | ||
| 181 | + SpvExecutionModeStaticNumWorkgroupsAMDX = 5072, | ||
| 182 | + SpvExecutionModeShaderIndexAMDX = 5073, | ||
| 183 | + SpvExecutionModeMaxNumWorkgroupsAMDX = 5077, | ||
| 172 | SpvExecutionModeStencilRefUnchangedFrontAMD = 5079, | 184 | SpvExecutionModeStencilRefUnchangedFrontAMD = 5079, |
| 173 | SpvExecutionModeStencilRefGreaterFrontAMD = 5080, | 185 | SpvExecutionModeStencilRefGreaterFrontAMD = 5080, |
| 174 | SpvExecutionModeStencilRefLessFrontAMD = 5081, | 186 | SpvExecutionModeStencilRefLessFrontAMD = 5081, |
| @@ -199,6 +211,8 @@ typedef enum SpvExecutionMode_ { | |||
| 199 | SpvExecutionModeNoGlobalOffsetINTEL = 5895, | 211 | SpvExecutionModeNoGlobalOffsetINTEL = 5895, |
| 200 | SpvExecutionModeNumSIMDWorkitemsINTEL = 5896, | 212 | SpvExecutionModeNumSIMDWorkitemsINTEL = 5896, |
| 201 | SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903, | 213 | SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903, |
| 214 | + SpvExecutionModeStreamingInterfaceINTEL = 6154, | ||
| 215 | + SpvExecutionModeRegisterMapInterfaceINTEL = 6160, | ||
| 202 | SpvExecutionModeNamedBarrierCountINTEL = 6417, | 216 | SpvExecutionModeNamedBarrierCountINTEL = 6417, |
| 203 | SpvExecutionModeMax = 0x7fffffff, | 217 | SpvExecutionModeMax = 0x7fffffff, |
| 204 | } SpvExecutionMode; | 218 | } SpvExecutionMode; |
| @@ -217,6 +231,9 @@ typedef enum SpvStorageClass_ { | |||
| 217 | SpvStorageClassAtomicCounter = 10, | 231 | SpvStorageClassAtomicCounter = 10, |
| 218 | SpvStorageClassImage = 11, | 232 | SpvStorageClassImage = 11, |
| 219 | SpvStorageClassStorageBuffer = 12, | 233 | SpvStorageClassStorageBuffer = 12, |
| 234 | + SpvStorageClassTileImageEXT = 4172, | ||
| 235 | + SpvStorageClassNodePayloadAMDX = 5068, | ||
| 236 | + SpvStorageClassNodeOutputPayloadAMDX = 5076, | ||
| 220 | SpvStorageClassCallableDataKHR = 5328, | 237 | SpvStorageClassCallableDataKHR = 5328, |
| 221 | SpvStorageClassCallableDataNV = 5328, | 238 | SpvStorageClassCallableDataNV = 5328, |
| 222 | SpvStorageClassIncomingCallableDataKHR = 5329, | 239 | SpvStorageClassIncomingCallableDataKHR = 5329, |
| @@ -231,6 +248,7 @@ typedef enum SpvStorageClass_ { | |||
| 231 | SpvStorageClassShaderRecordBufferNV = 5343, | 248 | SpvStorageClassShaderRecordBufferNV = 5343, |
| 232 | SpvStorageClassPhysicalStorageBuffer = 5349, | 249 | SpvStorageClassPhysicalStorageBuffer = 5349, |
| 233 | SpvStorageClassPhysicalStorageBufferEXT = 5349, | 250 | SpvStorageClassPhysicalStorageBufferEXT = 5349, |
| 251 | + SpvStorageClassHitObjectAttributeNV = 5385, | ||
| 234 | SpvStorageClassTaskPayloadWorkgroupEXT = 5402, | 252 | SpvStorageClassTaskPayloadWorkgroupEXT = 5402, |
| 235 | SpvStorageClassCodeSectionINTEL = 5605, | 253 | SpvStorageClassCodeSectionINTEL = 5605, |
| 236 | SpvStorageClassDeviceOnlyINTEL = 5936, | 254 | SpvStorageClassDeviceOnlyINTEL = 5936, |
| @@ -246,6 +264,7 @@ typedef enum SpvDim_ { | |||
| 246 | SpvDimRect = 4, | 264 | SpvDimRect = 4, |
| 247 | SpvDimBuffer = 5, | 265 | SpvDimBuffer = 5, |
| 248 | SpvDimSubpassData = 6, | 266 | SpvDimSubpassData = 6, |
| 267 | + SpvDimTileImageDataEXT = 4173, | ||
| 249 | SpvDimMax = 0x7fffffff, | 268 | SpvDimMax = 0x7fffffff, |
| 250 | } SpvDim; | 269 | } SpvDim; |
| 251 | 270 | ||
| @@ -352,6 +371,8 @@ typedef enum SpvImageChannelDataType_ { | |||
| 352 | SpvImageChannelDataTypeFloat = 14, | 371 | SpvImageChannelDataTypeFloat = 14, |
| 353 | SpvImageChannelDataTypeUnormInt24 = 15, | 372 | SpvImageChannelDataTypeUnormInt24 = 15, |
| 354 | SpvImageChannelDataTypeUnormInt101010_2 = 16, | 373 | SpvImageChannelDataTypeUnormInt101010_2 = 16, |
| 374 | + SpvImageChannelDataTypeUnsignedIntRaw10EXT = 19, | ||
| 375 | + SpvImageChannelDataTypeUnsignedIntRaw12EXT = 20, | ||
| 355 | SpvImageChannelDataTypeMax = 0x7fffffff, | 376 | SpvImageChannelDataTypeMax = 0x7fffffff, |
| 356 | } SpvImageChannelDataType; | 377 | } SpvImageChannelDataType; |
| 357 | 378 | ||
| @@ -456,6 +477,7 @@ typedef enum SpvFunctionParameterAttribute_ { | |||
| 456 | SpvFunctionParameterAttributeNoCapture = 5, | 477 | SpvFunctionParameterAttributeNoCapture = 5, |
| 457 | SpvFunctionParameterAttributeNoWrite = 6, | 478 | SpvFunctionParameterAttributeNoWrite = 6, |
| 458 | SpvFunctionParameterAttributeNoReadWrite = 7, | 479 | SpvFunctionParameterAttributeNoReadWrite = 7, |
| 480 | + SpvFunctionParameterAttributeRuntimeAlignedINTEL = 5940, | ||
| 459 | SpvFunctionParameterAttributeMax = 0x7fffffff, | 481 | SpvFunctionParameterAttributeMax = 0x7fffffff, |
| 460 | } SpvFunctionParameterAttribute; | 482 | } SpvFunctionParameterAttribute; |
| 461 | 483 | ||
| @@ -509,7 +531,13 @@ typedef enum SpvDecoration_ { | |||
| 509 | SpvDecorationMaxByteOffsetId = 47, | 531 | SpvDecorationMaxByteOffsetId = 47, |
| 510 | SpvDecorationNoSignedWrap = 4469, | 532 | SpvDecorationNoSignedWrap = 4469, |
| 511 | SpvDecorationNoUnsignedWrap = 4470, | 533 | SpvDecorationNoUnsignedWrap = 4470, |
| 534 | + SpvDecorationWeightTextureQCOM = 4487, | ||
| 535 | + SpvDecorationBlockMatchTextureQCOM = 4488, | ||
| 512 | SpvDecorationExplicitInterpAMD = 4999, | 536 | SpvDecorationExplicitInterpAMD = 4999, |
| 537 | + SpvDecorationNodeSharesPayloadLimitsWithAMDX = 5019, | ||
| 538 | + SpvDecorationNodeMaxPayloadsAMDX = 5020, | ||
| 539 | + SpvDecorationTrackFinishWritingAMDX = 5078, | ||
| 540 | + SpvDecorationPayloadNodeNameAMDX = 5091, | ||
| 513 | SpvDecorationOverrideCoverageNV = 5248, | 541 | SpvDecorationOverrideCoverageNV = 5248, |
| 514 | SpvDecorationPassthroughNV = 5250, | 542 | SpvDecorationPassthroughNV = 5250, |
| 515 | SpvDecorationViewportRelativeNV = 5252, | 543 | SpvDecorationViewportRelativeNV = 5252, |
| @@ -526,6 +554,7 @@ typedef enum SpvDecoration_ { | |||
| 526 | SpvDecorationRestrictPointerEXT = 5355, | 554 | SpvDecorationRestrictPointerEXT = 5355, |
| 527 | SpvDecorationAliasedPointer = 5356, | 555 | SpvDecorationAliasedPointer = 5356, |
| 528 | SpvDecorationAliasedPointerEXT = 5356, | 556 | SpvDecorationAliasedPointerEXT = 5356, |
| 557 | + SpvDecorationHitObjectShaderRecordBufferNV = 5386, | ||
| 529 | SpvDecorationBindlessSamplerNV = 5398, | 558 | SpvDecorationBindlessSamplerNV = 5398, |
| 530 | SpvDecorationBindlessImageNV = 5399, | 559 | SpvDecorationBindlessImageNV = 5399, |
| 531 | SpvDecorationBoundSamplerNV = 5400, | 560 | SpvDecorationBoundSamplerNV = 5400, |
| @@ -558,20 +587,45 @@ typedef enum SpvDecoration_ { | |||
| 558 | SpvDecorationMergeINTEL = 5834, | 587 | SpvDecorationMergeINTEL = 5834, |
| 559 | SpvDecorationBankBitsINTEL = 5835, | 588 | SpvDecorationBankBitsINTEL = 5835, |
| 560 | SpvDecorationForcePow2DepthINTEL = 5836, | 589 | SpvDecorationForcePow2DepthINTEL = 5836, |
| 590 | + SpvDecorationStridesizeINTEL = 5883, | ||
| 591 | + SpvDecorationWordsizeINTEL = 5884, | ||
| 592 | + SpvDecorationTrueDualPortINTEL = 5885, | ||
| 561 | SpvDecorationBurstCoalesceINTEL = 5899, | 593 | SpvDecorationBurstCoalesceINTEL = 5899, |
| 562 | SpvDecorationCacheSizeINTEL = 5900, | 594 | SpvDecorationCacheSizeINTEL = 5900, |
| 563 | SpvDecorationDontStaticallyCoalesceINTEL = 5901, | 595 | SpvDecorationDontStaticallyCoalesceINTEL = 5901, |
| 564 | SpvDecorationPrefetchINTEL = 5902, | 596 | SpvDecorationPrefetchINTEL = 5902, |
| 565 | SpvDecorationStallEnableINTEL = 5905, | 597 | SpvDecorationStallEnableINTEL = 5905, |
| 566 | SpvDecorationFuseLoopsInFunctionINTEL = 5907, | 598 | SpvDecorationFuseLoopsInFunctionINTEL = 5907, |
| 599 | + SpvDecorationMathOpDSPModeINTEL = 5909, | ||
| 567 | SpvDecorationAliasScopeINTEL = 5914, | 600 | SpvDecorationAliasScopeINTEL = 5914, |
| 568 | SpvDecorationNoAliasINTEL = 5915, | 601 | SpvDecorationNoAliasINTEL = 5915, |
| 602 | + SpvDecorationInitiationIntervalINTEL = 5917, | ||
| 603 | + SpvDecorationMaxConcurrencyINTEL = 5918, | ||
| 604 | + SpvDecorationPipelineEnableINTEL = 5919, | ||
| 569 | SpvDecorationBufferLocationINTEL = 5921, | 605 | SpvDecorationBufferLocationINTEL = 5921, |
| 570 | SpvDecorationIOPipeStorageINTEL = 5944, | 606 | SpvDecorationIOPipeStorageINTEL = 5944, |
| 571 | SpvDecorationFunctionFloatingPointModeINTEL = 6080, | 607 | SpvDecorationFunctionFloatingPointModeINTEL = 6080, |
| 572 | SpvDecorationSingleElementVectorINTEL = 6085, | 608 | SpvDecorationSingleElementVectorINTEL = 6085, |
| 573 | SpvDecorationVectorComputeCallableFunctionINTEL = 6087, | 609 | SpvDecorationVectorComputeCallableFunctionINTEL = 6087, |
| 574 | SpvDecorationMediaBlockIOINTEL = 6140, | 610 | SpvDecorationMediaBlockIOINTEL = 6140, |
| 611 | + SpvDecorationStallFreeINTEL = 6151, | ||
| 612 | + SpvDecorationFPMaxErrorDecorationINTEL = 6170, | ||
| 613 | + SpvDecorationLatencyControlLabelINTEL = 6172, | ||
| 614 | + SpvDecorationLatencyControlConstraintINTEL = 6173, | ||
| 615 | + SpvDecorationConduitKernelArgumentINTEL = 6175, | ||
| 616 | + SpvDecorationRegisterMapKernelArgumentINTEL = 6176, | ||
| 617 | + SpvDecorationMMHostInterfaceAddressWidthINTEL = 6177, | ||
| 618 | + SpvDecorationMMHostInterfaceDataWidthINTEL = 6178, | ||
| 619 | + SpvDecorationMMHostInterfaceLatencyINTEL = 6179, | ||
| 620 | + SpvDecorationMMHostInterfaceReadWriteModeINTEL = 6180, | ||
| 621 | + SpvDecorationMMHostInterfaceMaxBurstINTEL = 6181, | ||
| 622 | + SpvDecorationMMHostInterfaceWaitRequestINTEL = 6182, | ||
| 623 | + SpvDecorationStableKernelArgumentINTEL = 6183, | ||
| 624 | + SpvDecorationHostAccessINTEL = 6188, | ||
| 625 | + SpvDecorationInitModeINTEL = 6190, | ||
| 626 | + SpvDecorationImplementInRegisterMapINTEL = 6191, | ||
| 627 | + SpvDecorationCacheControlLoadINTEL = 6442, | ||
| 628 | + SpvDecorationCacheControlStoreINTEL = 6443, | ||
| 575 | SpvDecorationMax = 0x7fffffff, | 629 | SpvDecorationMax = 0x7fffffff, |
| 576 | } SpvDecoration; | 630 | } SpvDecoration; |
| 577 | 631 | ||
| @@ -647,6 +701,8 @@ typedef enum SpvBuiltIn_ { | |||
| 647 | SpvBuiltInBaryCoordSmoothSampleAMD = 4997, | 701 | SpvBuiltInBaryCoordSmoothSampleAMD = 4997, |
| 648 | SpvBuiltInBaryCoordPullModelAMD = 4998, | 702 | SpvBuiltInBaryCoordPullModelAMD = 4998, |
| 649 | SpvBuiltInFragStencilRefEXT = 5014, | 703 | SpvBuiltInFragStencilRefEXT = 5014, |
| 704 | + SpvBuiltInCoalescedInputCountAMDX = 5021, | ||
| 705 | + SpvBuiltInShaderIndexAMDX = 5073, | ||
| 650 | SpvBuiltInViewportMaskNV = 5253, | 706 | SpvBuiltInViewportMaskNV = 5253, |
| 651 | SpvBuiltInSecondaryPositionNV = 5257, | 707 | SpvBuiltInSecondaryPositionNV = 5257, |
| 652 | SpvBuiltInSecondaryViewportMaskNV = 5258, | 708 | SpvBuiltInSecondaryViewportMaskNV = 5258, |
| @@ -699,6 +755,9 @@ typedef enum SpvBuiltIn_ { | |||
| 699 | SpvBuiltInHitKindKHR = 5333, | 755 | SpvBuiltInHitKindKHR = 5333, |
| 700 | SpvBuiltInHitKindNV = 5333, | 756 | SpvBuiltInHitKindNV = 5333, |
| 701 | SpvBuiltInCurrentRayTimeNV = 5334, | 757 | SpvBuiltInCurrentRayTimeNV = 5334, |
| 758 | + SpvBuiltInHitTriangleVertexPositionsKHR = 5335, | ||
| 759 | + SpvBuiltInHitMicroTriangleVertexPositionsNV = 5337, | ||
| 760 | + SpvBuiltInHitMicroTriangleVertexBarycentricsNV = 5344, | ||
| 702 | SpvBuiltInIncomingRayFlagsKHR = 5351, | 761 | SpvBuiltInIncomingRayFlagsKHR = 5351, |
| 703 | SpvBuiltInIncomingRayFlagsNV = 5351, | 762 | SpvBuiltInIncomingRayFlagsNV = 5351, |
| 704 | SpvBuiltInRayGeometryIndexKHR = 5352, | 763 | SpvBuiltInRayGeometryIndexKHR = 5352, |
| @@ -706,6 +765,8 @@ typedef enum SpvBuiltIn_ { | |||
| 706 | SpvBuiltInSMCountNV = 5375, | 765 | SpvBuiltInSMCountNV = 5375, |
| 707 | SpvBuiltInWarpIDNV = 5376, | 766 | SpvBuiltInWarpIDNV = 5376, |
| 708 | SpvBuiltInSMIDNV = 5377, | 767 | SpvBuiltInSMIDNV = 5377, |
| 768 | + SpvBuiltInHitKindFrontFacingMicroTriangleNV = 5405, | ||
| 769 | + SpvBuiltInHitKindBackFacingMicroTriangleNV = 5406, | ||
| 709 | SpvBuiltInCullMaskKHR = 6021, | 770 | SpvBuiltInCullMaskKHR = 6021, |
| 710 | SpvBuiltInMax = 0x7fffffff, | 771 | SpvBuiltInMax = 0x7fffffff, |
| 711 | } SpvBuiltIn; | 772 | } SpvBuiltIn; |
| @@ -740,6 +801,8 @@ typedef enum SpvLoopControlShift_ { | |||
| 740 | SpvLoopControlMaxInterleavingINTELShift = 21, | 801 | SpvLoopControlMaxInterleavingINTELShift = 21, |
| 741 | SpvLoopControlSpeculatedIterationsINTELShift = 22, | 802 | SpvLoopControlSpeculatedIterationsINTELShift = 22, |
| 742 | SpvLoopControlNoFusionINTELShift = 23, | 803 | SpvLoopControlNoFusionINTELShift = 23, |
| 804 | + SpvLoopControlLoopCountINTELShift = 24, | ||
| 805 | + SpvLoopControlMaxReinvocationDelayINTELShift = 25, | ||
| 743 | SpvLoopControlMax = 0x7fffffff, | 806 | SpvLoopControlMax = 0x7fffffff, |
| 744 | } SpvLoopControlShift; | 807 | } SpvLoopControlShift; |
| 745 | 808 | ||
| @@ -762,6 +825,8 @@ typedef enum SpvLoopControlMask_ { | |||
| 762 | SpvLoopControlMaxInterleavingINTELMask = 0x00200000, | 825 | SpvLoopControlMaxInterleavingINTELMask = 0x00200000, |
| 763 | SpvLoopControlSpeculatedIterationsINTELMask = 0x00400000, | 826 | SpvLoopControlSpeculatedIterationsINTELMask = 0x00400000, |
| 764 | SpvLoopControlNoFusionINTELMask = 0x00800000, | 827 | SpvLoopControlNoFusionINTELMask = 0x00800000, |
| 828 | + SpvLoopControlLoopCountINTELMask = 0x01000000, | ||
| 829 | + SpvLoopControlMaxReinvocationDelayINTELMask = 0x02000000, | ||
| 765 | } SpvLoopControlMask; | 830 | } SpvLoopControlMask; |
| 766 | 831 | ||
| 767 | typedef enum SpvFunctionControlShift_ { | 832 | typedef enum SpvFunctionControlShift_ { |
| @@ -966,6 +1031,9 @@ typedef enum SpvCapability_ { | |||
| 966 | SpvCapabilityShaderViewportIndex = 70, | 1031 | SpvCapabilityShaderViewportIndex = 70, |
| 967 | SpvCapabilityUniformDecoration = 71, | 1032 | SpvCapabilityUniformDecoration = 71, |
| 968 | SpvCapabilityCoreBuiltinsARM = 4165, | 1033 | SpvCapabilityCoreBuiltinsARM = 4165, |
| 1034 | + SpvCapabilityTileImageColorReadAccessEXT = 4166, | ||
| 1035 | + SpvCapabilityTileImageDepthReadAccessEXT = 4167, | ||
| 1036 | + SpvCapabilityTileImageStencilReadAccessEXT = 4168, | ||
| 969 | SpvCapabilityFragmentShadingRateKHR = 4422, | 1037 | SpvCapabilityFragmentShadingRateKHR = 4422, |
| 970 | SpvCapabilitySubgroupBallotKHR = 4423, | 1038 | SpvCapabilitySubgroupBallotKHR = 4423, |
| 971 | SpvCapabilityDrawParameters = 4427, | 1039 | SpvCapabilityDrawParameters = 4427, |
| @@ -997,6 +1065,9 @@ typedef enum SpvCapability_ { | |||
| 997 | SpvCapabilityRayQueryKHR = 4472, | 1065 | SpvCapabilityRayQueryKHR = 4472, |
| 998 | SpvCapabilityRayTraversalPrimitiveCullingKHR = 4478, | 1066 | SpvCapabilityRayTraversalPrimitiveCullingKHR = 4478, |
| 999 | SpvCapabilityRayTracingKHR = 4479, | 1067 | SpvCapabilityRayTracingKHR = 4479, |
| 1068 | + SpvCapabilityTextureSampleWeightedQCOM = 4484, | ||
| 1069 | + SpvCapabilityTextureBoxFilterQCOM = 4485, | ||
| 1070 | + SpvCapabilityTextureBlockMatchQCOM = 4486, | ||
| 1000 | SpvCapabilityFloat16ImageAMD = 5008, | 1071 | SpvCapabilityFloat16ImageAMD = 5008, |
| 1001 | SpvCapabilityImageGatherBiasLodAMD = 5009, | 1072 | SpvCapabilityImageGatherBiasLodAMD = 5009, |
| 1002 | SpvCapabilityFragmentMaskAMD = 5010, | 1073 | SpvCapabilityFragmentMaskAMD = 5010, |
| @@ -1004,6 +1075,7 @@ typedef enum SpvCapability_ { | |||
| 1004 | SpvCapabilityImageReadWriteLodAMD = 5015, | 1075 | SpvCapabilityImageReadWriteLodAMD = 5015, |
| 1005 | SpvCapabilityInt64ImageEXT = 5016, | 1076 | SpvCapabilityInt64ImageEXT = 5016, |
| 1006 | SpvCapabilityShaderClockKHR = 5055, | 1077 | SpvCapabilityShaderClockKHR = 5055, |
| 1078 | + SpvCapabilityShaderEnqueueAMDX = 5067, | ||
| 1007 | SpvCapabilitySampleMaskOverrideCoverageNV = 5249, | 1079 | SpvCapabilitySampleMaskOverrideCoverageNV = 5249, |
| 1008 | SpvCapabilityGeometryShaderPassthroughNV = 5251, | 1080 | SpvCapabilityGeometryShaderPassthroughNV = 5251, |
| 1009 | SpvCapabilityShaderViewportIndexLayerEXT = 5254, | 1081 | SpvCapabilityShaderViewportIndexLayerEXT = 5254, |
| @@ -1045,6 +1117,7 @@ typedef enum SpvCapability_ { | |||
| 1045 | SpvCapabilityUniformTexelBufferArrayNonUniformIndexingEXT = 5311, | 1117 | SpvCapabilityUniformTexelBufferArrayNonUniformIndexingEXT = 5311, |
| 1046 | SpvCapabilityStorageTexelBufferArrayNonUniformIndexing = 5312, | 1118 | SpvCapabilityStorageTexelBufferArrayNonUniformIndexing = 5312, |
| 1047 | SpvCapabilityStorageTexelBufferArrayNonUniformIndexingEXT = 5312, | 1119 | SpvCapabilityStorageTexelBufferArrayNonUniformIndexingEXT = 5312, |
| 1120 | + SpvCapabilityRayTracingPositionFetchKHR = 5336, | ||
| 1048 | SpvCapabilityRayTracingNV = 5340, | 1121 | SpvCapabilityRayTracingNV = 5340, |
| 1049 | SpvCapabilityRayTracingMotionBlurNV = 5341, | 1122 | SpvCapabilityRayTracingMotionBlurNV = 5341, |
| 1050 | SpvCapabilityVulkanMemoryModel = 5345, | 1123 | SpvCapabilityVulkanMemoryModel = 5345, |
| @@ -1062,8 +1135,12 @@ typedef enum SpvCapability_ { | |||
| 1062 | SpvCapabilityFragmentShaderPixelInterlockEXT = 5378, | 1135 | SpvCapabilityFragmentShaderPixelInterlockEXT = 5378, |
| 1063 | SpvCapabilityDemoteToHelperInvocation = 5379, | 1136 | SpvCapabilityDemoteToHelperInvocation = 5379, |
| 1064 | SpvCapabilityDemoteToHelperInvocationEXT = 5379, | 1137 | SpvCapabilityDemoteToHelperInvocationEXT = 5379, |
| 1138 | + SpvCapabilityDisplacementMicromapNV = 5380, | ||
| 1065 | SpvCapabilityRayTracingOpacityMicromapEXT = 5381, | 1139 | SpvCapabilityRayTracingOpacityMicromapEXT = 5381, |
| 1140 | + SpvCapabilityShaderInvocationReorderNV = 5383, | ||
| 1066 | SpvCapabilityBindlessTextureNV = 5390, | 1141 | SpvCapabilityBindlessTextureNV = 5390, |
| 1142 | + SpvCapabilityRayQueryPositionFetchKHR = 5391, | ||
| 1143 | + SpvCapabilityRayTracingDisplacementMicromapNV = 5409, | ||
| 1067 | SpvCapabilitySubgroupShuffleINTEL = 5568, | 1144 | SpvCapabilitySubgroupShuffleINTEL = 5568, |
| 1068 | SpvCapabilitySubgroupBufferBlockIOINTEL = 5569, | 1145 | SpvCapabilitySubgroupBufferBlockIOINTEL = 5569, |
| 1069 | SpvCapabilitySubgroupImageBlockIOINTEL = 5570, | 1146 | SpvCapabilitySubgroupImageBlockIOINTEL = 5570, |
| @@ -1096,10 +1173,13 @@ typedef enum SpvCapability_ { | |||
| 1096 | SpvCapabilityFPGAMemoryAccessesINTEL = 5898, | 1173 | SpvCapabilityFPGAMemoryAccessesINTEL = 5898, |
| 1097 | SpvCapabilityFPGAClusterAttributesINTEL = 5904, | 1174 | SpvCapabilityFPGAClusterAttributesINTEL = 5904, |
| 1098 | SpvCapabilityLoopFuseINTEL = 5906, | 1175 | SpvCapabilityLoopFuseINTEL = 5906, |
| 1176 | + SpvCapabilityFPGADSPControlINTEL = 5908, | ||
| 1099 | SpvCapabilityMemoryAccessAliasingINTEL = 5910, | 1177 | SpvCapabilityMemoryAccessAliasingINTEL = 5910, |
| 1178 | + SpvCapabilityFPGAInvocationPipeliningAttributesINTEL = 5916, | ||
| 1100 | SpvCapabilityFPGABufferLocationINTEL = 5920, | 1179 | SpvCapabilityFPGABufferLocationINTEL = 5920, |
| 1101 | SpvCapabilityArbitraryPrecisionFixedPointINTEL = 5922, | 1180 | SpvCapabilityArbitraryPrecisionFixedPointINTEL = 5922, |
| 1102 | SpvCapabilityUSMStorageClassesINTEL = 5935, | 1181 | SpvCapabilityUSMStorageClassesINTEL = 5935, |
| 1182 | + SpvCapabilityRuntimeAlignedAttributeINTEL = 5939, | ||
| 1103 | SpvCapabilityIOPipesINTEL = 5943, | 1183 | SpvCapabilityIOPipesINTEL = 5943, |
| 1104 | SpvCapabilityBlockingPipesINTEL = 5945, | 1184 | SpvCapabilityBlockingPipesINTEL = 5945, |
| 1105 | SpvCapabilityFPGARegINTEL = 5948, | 1185 | SpvCapabilityFPGARegINTEL = 5948, |
| @@ -1112,16 +1192,26 @@ typedef enum SpvCapability_ { | |||
| 1112 | SpvCapabilityDotProduct = 6019, | 1192 | SpvCapabilityDotProduct = 6019, |
| 1113 | SpvCapabilityDotProductKHR = 6019, | 1193 | SpvCapabilityDotProductKHR = 6019, |
| 1114 | SpvCapabilityRayCullMaskKHR = 6020, | 1194 | SpvCapabilityRayCullMaskKHR = 6020, |
| 1195 | + SpvCapabilityCooperativeMatrixKHR = 6022, | ||
| 1115 | SpvCapabilityBitInstructions = 6025, | 1196 | SpvCapabilityBitInstructions = 6025, |
| 1116 | SpvCapabilityGroupNonUniformRotateKHR = 6026, | 1197 | SpvCapabilityGroupNonUniformRotateKHR = 6026, |
| 1117 | SpvCapabilityAtomicFloat32AddEXT = 6033, | 1198 | SpvCapabilityAtomicFloat32AddEXT = 6033, |
| 1118 | SpvCapabilityAtomicFloat64AddEXT = 6034, | 1199 | SpvCapabilityAtomicFloat64AddEXT = 6034, |
| 1119 | - SpvCapabilityLongConstantCompositeINTEL = 6089, | 1200 | + SpvCapabilityLongCompositesINTEL = 6089, |
| 1120 | SpvCapabilityOptNoneINTEL = 6094, | 1201 | SpvCapabilityOptNoneINTEL = 6094, |
| 1121 | SpvCapabilityAtomicFloat16AddEXT = 6095, | 1202 | SpvCapabilityAtomicFloat16AddEXT = 6095, |
| 1122 | SpvCapabilityDebugInfoModuleINTEL = 6114, | 1203 | SpvCapabilityDebugInfoModuleINTEL = 6114, |
| 1204 | + SpvCapabilityBFloat16ConversionINTEL = 6115, | ||
| 1123 | SpvCapabilitySplitBarrierINTEL = 6141, | 1205 | SpvCapabilitySplitBarrierINTEL = 6141, |
| 1206 | + SpvCapabilityFPGAClusterAttributesV2INTEL = 6150, | ||
| 1207 | + SpvCapabilityFPGAKernelAttributesv2INTEL = 6161, | ||
| 1208 | + SpvCapabilityFPMaxErrorINTEL = 6169, | ||
| 1209 | + SpvCapabilityFPGALatencyControlINTEL = 6171, | ||
| 1210 | + SpvCapabilityFPGAArgumentInterfacesINTEL = 6174, | ||
| 1211 | + SpvCapabilityGlobalVariableHostAccessINTEL = 6187, | ||
| 1212 | + SpvCapabilityGlobalVariableFPGADecorationsINTEL = 6189, | ||
| 1124 | SpvCapabilityGroupUniformArithmeticKHR = 6400, | 1213 | SpvCapabilityGroupUniformArithmeticKHR = 6400, |
| 1214 | + SpvCapabilityCacheControlsINTEL = 6441, | ||
| 1125 | SpvCapabilityMax = 0x7fffffff, | 1215 | SpvCapabilityMax = 0x7fffffff, |
| 1126 | } SpvCapability; | 1216 | } SpvCapability; |
| 1127 | 1217 | ||
| @@ -1228,6 +1318,68 @@ typedef enum SpvPackedVectorFormat_ { | |||
| 1228 | SpvPackedVectorFormatMax = 0x7fffffff, | 1318 | SpvPackedVectorFormatMax = 0x7fffffff, |
| 1229 | } SpvPackedVectorFormat; | 1319 | } SpvPackedVectorFormat; |
| 1230 | 1320 | ||
| 1321 | +typedef enum SpvCooperativeMatrixOperandsShift_ { | ||
| 1322 | + SpvCooperativeMatrixOperandsMatrixASignedComponentsKHRShift = 0, | ||
| 1323 | + SpvCooperativeMatrixOperandsMatrixBSignedComponentsKHRShift = 1, | ||
| 1324 | + SpvCooperativeMatrixOperandsMatrixCSignedComponentsKHRShift = 2, | ||
| 1325 | + SpvCooperativeMatrixOperandsMatrixResultSignedComponentsKHRShift = 3, | ||
| 1326 | + SpvCooperativeMatrixOperandsSaturatingAccumulationKHRShift = 4, | ||
| 1327 | + SpvCooperativeMatrixOperandsMax = 0x7fffffff, | ||
| 1328 | +} SpvCooperativeMatrixOperandsShift; | ||
| 1329 | + | ||
| 1330 | +typedef enum SpvCooperativeMatrixOperandsMask_ { | ||
| 1331 | + SpvCooperativeMatrixOperandsMaskNone = 0, | ||
| 1332 | + SpvCooperativeMatrixOperandsMatrixASignedComponentsKHRMask = 0x00000001, | ||
| 1333 | + SpvCooperativeMatrixOperandsMatrixBSignedComponentsKHRMask = 0x00000002, | ||
| 1334 | + SpvCooperativeMatrixOperandsMatrixCSignedComponentsKHRMask = 0x00000004, | ||
| 1335 | + SpvCooperativeMatrixOperandsMatrixResultSignedComponentsKHRMask = 0x00000008, | ||
| 1336 | + SpvCooperativeMatrixOperandsSaturatingAccumulationKHRMask = 0x00000010, | ||
| 1337 | +} SpvCooperativeMatrixOperandsMask; | ||
| 1338 | + | ||
| 1339 | +typedef enum SpvCooperativeMatrixLayout_ { | ||
| 1340 | + SpvCooperativeMatrixLayoutRowMajorKHR = 0, | ||
| 1341 | + SpvCooperativeMatrixLayoutColumnMajorKHR = 1, | ||
| 1342 | + SpvCooperativeMatrixLayoutMax = 0x7fffffff, | ||
| 1343 | +} SpvCooperativeMatrixLayout; | ||
| 1344 | + | ||
| 1345 | +typedef enum SpvCooperativeMatrixUse_ { | ||
| 1346 | + SpvCooperativeMatrixUseMatrixAKHR = 0, | ||
| 1347 | + SpvCooperativeMatrixUseMatrixBKHR = 1, | ||
| 1348 | + SpvCooperativeMatrixUseMatrixAccumulatorKHR = 2, | ||
| 1349 | + SpvCooperativeMatrixUseMax = 0x7fffffff, | ||
| 1350 | +} SpvCooperativeMatrixUse; | ||
| 1351 | + | ||
| 1352 | +typedef enum SpvInitializationModeQualifier_ { | ||
| 1353 | + SpvInitializationModeQualifierInitOnDeviceReprogramINTEL = 0, | ||
| 1354 | + SpvInitializationModeQualifierInitOnDeviceResetINTEL = 1, | ||
| 1355 | + SpvInitializationModeQualifierMax = 0x7fffffff, | ||
| 1356 | +} SpvInitializationModeQualifier; | ||
| 1357 | + | ||
| 1358 | +typedef enum SpvHostAccessQualifier_ { | ||
| 1359 | + SpvHostAccessQualifierNoneINTEL = 0, | ||
| 1360 | + SpvHostAccessQualifierReadINTEL = 1, | ||
| 1361 | + SpvHostAccessQualifierWriteINTEL = 2, | ||
| 1362 | + SpvHostAccessQualifierReadWriteINTEL = 3, | ||
| 1363 | + SpvHostAccessQualifierMax = 0x7fffffff, | ||
| 1364 | +} SpvHostAccessQualifier; | ||
| 1365 | + | ||
| 1366 | +typedef enum SpvLoadCacheControl_ { | ||
| 1367 | + SpvLoadCacheControlUncachedINTEL = 0, | ||
| 1368 | + SpvLoadCacheControlCachedINTEL = 1, | ||
| 1369 | + SpvLoadCacheControlStreamingINTEL = 2, | ||
| 1370 | + SpvLoadCacheControlInvalidateAfterReadINTEL = 3, | ||
| 1371 | + SpvLoadCacheControlConstCachedINTEL = 4, | ||
| 1372 | + SpvLoadCacheControlMax = 0x7fffffff, | ||
| 1373 | +} SpvLoadCacheControl; | ||
| 1374 | + | ||
| 1375 | +typedef enum SpvStoreCacheControl_ { | ||
| 1376 | + SpvStoreCacheControlUncachedINTEL = 0, | ||
| 1377 | + SpvStoreCacheControlWriteThroughINTEL = 1, | ||
| 1378 | + SpvStoreCacheControlWriteBackINTEL = 2, | ||
| 1379 | + SpvStoreCacheControlStreamingINTEL = 3, | ||
| 1380 | + SpvStoreCacheControlMax = 0x7fffffff, | ||
| 1381 | +} SpvStoreCacheControl; | ||
| 1382 | + | ||
| 1231 | typedef enum SpvOp_ { | 1383 | typedef enum SpvOp_ { |
| 1232 | SpvOpNop = 0, | 1384 | SpvOpNop = 0, |
| 1233 | SpvOpUndef = 1, | 1385 | SpvOpUndef = 1, |
| @@ -1573,6 +1725,9 @@ typedef enum SpvOp_ { | |||
| 1573 | SpvOpPtrEqual = 401, | 1725 | SpvOpPtrEqual = 401, |
| 1574 | SpvOpPtrNotEqual = 402, | 1726 | SpvOpPtrNotEqual = 402, |
| 1575 | SpvOpPtrDiff = 403, | 1727 | SpvOpPtrDiff = 403, |
| 1728 | + SpvOpColorAttachmentReadEXT = 4160, | ||
| 1729 | + SpvOpDepthAttachmentReadEXT = 4161, | ||
| 1730 | + SpvOpStencilAttachmentReadEXT = 4162, | ||
| 1576 | SpvOpTerminateInvocation = 4416, | 1731 | SpvOpTerminateInvocation = 4416, |
| 1577 | SpvOpSubgroupBallotKHR = 4421, | 1732 | SpvOpSubgroupBallotKHR = 4421, |
| 1578 | SpvOpSubgroupFirstInvocationKHR = 4422, | 1733 | SpvOpSubgroupFirstInvocationKHR = 4422, |
| @@ -1598,6 +1753,11 @@ typedef enum SpvOp_ { | |||
| 1598 | SpvOpUDotAccSatKHR = 4454, | 1753 | SpvOpUDotAccSatKHR = 4454, |
| 1599 | SpvOpSUDotAccSat = 4455, | 1754 | SpvOpSUDotAccSat = 4455, |
| 1600 | SpvOpSUDotAccSatKHR = 4455, | 1755 | SpvOpSUDotAccSatKHR = 4455, |
| 1756 | + SpvOpTypeCooperativeMatrixKHR = 4456, | ||
| 1757 | + SpvOpCooperativeMatrixLoadKHR = 4457, | ||
| 1758 | + SpvOpCooperativeMatrixStoreKHR = 4458, | ||
| 1759 | + SpvOpCooperativeMatrixMulAddKHR = 4459, | ||
| 1760 | + SpvOpCooperativeMatrixLengthKHR = 4460, | ||
| 1601 | SpvOpTypeRayQueryKHR = 4472, | 1761 | SpvOpTypeRayQueryKHR = 4472, |
| 1602 | SpvOpRayQueryInitializeKHR = 4473, | 1762 | SpvOpRayQueryInitializeKHR = 4473, |
| 1603 | SpvOpRayQueryTerminateKHR = 4474, | 1763 | SpvOpRayQueryTerminateKHR = 4474, |
| @@ -1605,6 +1765,10 @@ typedef enum SpvOp_ { | |||
| 1605 | SpvOpRayQueryConfirmIntersectionKHR = 4476, | 1765 | SpvOpRayQueryConfirmIntersectionKHR = 4476, |
| 1606 | SpvOpRayQueryProceedKHR = 4477, | 1766 | SpvOpRayQueryProceedKHR = 4477, |
| 1607 | SpvOpRayQueryGetIntersectionTypeKHR = 4479, | 1767 | SpvOpRayQueryGetIntersectionTypeKHR = 4479, |
| 1768 | + SpvOpImageSampleWeightedQCOM = 4480, | ||
| 1769 | + SpvOpImageBoxFilterQCOM = 4481, | ||
| 1770 | + SpvOpImageBlockMatchSSDQCOM = 4482, | ||
| 1771 | + SpvOpImageBlockMatchSADQCOM = 4483, | ||
| 1608 | SpvOpGroupIAddNonUniformAMD = 5000, | 1772 | SpvOpGroupIAddNonUniformAMD = 5000, |
| 1609 | SpvOpGroupFAddNonUniformAMD = 5001, | 1773 | SpvOpGroupFAddNonUniformAMD = 5001, |
| 1610 | SpvOpGroupFMinNonUniformAMD = 5002, | 1774 | SpvOpGroupFMinNonUniformAMD = 5002, |
| @@ -1616,11 +1780,49 @@ typedef enum SpvOp_ { | |||
| 1616 | SpvOpFragmentMaskFetchAMD = 5011, | 1780 | SpvOpFragmentMaskFetchAMD = 5011, |
| 1617 | SpvOpFragmentFetchAMD = 5012, | 1781 | SpvOpFragmentFetchAMD = 5012, |
| 1618 | SpvOpReadClockKHR = 5056, | 1782 | SpvOpReadClockKHR = 5056, |
| 1783 | + SpvOpFinalizeNodePayloadsAMDX = 5075, | ||
| 1784 | + SpvOpFinishWritingNodePayloadAMDX = 5078, | ||
| 1785 | + SpvOpInitializeNodePayloadsAMDX = 5090, | ||
| 1786 | + SpvOpHitObjectRecordHitMotionNV = 5249, | ||
| 1787 | + SpvOpHitObjectRecordHitWithIndexMotionNV = 5250, | ||
| 1788 | + SpvOpHitObjectRecordMissMotionNV = 5251, | ||
| 1789 | + SpvOpHitObjectGetWorldToObjectNV = 5252, | ||
| 1790 | + SpvOpHitObjectGetObjectToWorldNV = 5253, | ||
| 1791 | + SpvOpHitObjectGetObjectRayDirectionNV = 5254, | ||
| 1792 | + SpvOpHitObjectGetObjectRayOriginNV = 5255, | ||
| 1793 | + SpvOpHitObjectTraceRayMotionNV = 5256, | ||
| 1794 | + SpvOpHitObjectGetShaderRecordBufferHandleNV = 5257, | ||
| 1795 | + SpvOpHitObjectGetShaderBindingTableRecordIndexNV = 5258, | ||
| 1796 | + SpvOpHitObjectRecordEmptyNV = 5259, | ||
| 1797 | + SpvOpHitObjectTraceRayNV = 5260, | ||
| 1798 | + SpvOpHitObjectRecordHitNV = 5261, | ||
| 1799 | + SpvOpHitObjectRecordHitWithIndexNV = 5262, | ||
| 1800 | + SpvOpHitObjectRecordMissNV = 5263, | ||
| 1801 | + SpvOpHitObjectExecuteShaderNV = 5264, | ||
| 1802 | + SpvOpHitObjectGetCurrentTimeNV = 5265, | ||
| 1803 | + SpvOpHitObjectGetAttributesNV = 5266, | ||
| 1804 | + SpvOpHitObjectGetHitKindNV = 5267, | ||
| 1805 | + SpvOpHitObjectGetPrimitiveIndexNV = 5268, | ||
| 1806 | + SpvOpHitObjectGetGeometryIndexNV = 5269, | ||
| 1807 | + SpvOpHitObjectGetInstanceIdNV = 5270, | ||
| 1808 | + SpvOpHitObjectGetInstanceCustomIndexNV = 5271, | ||
| 1809 | + SpvOpHitObjectGetWorldRayDirectionNV = 5272, | ||
| 1810 | + SpvOpHitObjectGetWorldRayOriginNV = 5273, | ||
| 1811 | + SpvOpHitObjectGetRayTMaxNV = 5274, | ||
| 1812 | + SpvOpHitObjectGetRayTMinNV = 5275, | ||
| 1813 | + SpvOpHitObjectIsEmptyNV = 5276, | ||
| 1814 | + SpvOpHitObjectIsHitNV = 5277, | ||
| 1815 | + SpvOpHitObjectIsMissNV = 5278, | ||
| 1816 | + SpvOpReorderThreadWithHitObjectNV = 5279, | ||
| 1817 | + SpvOpReorderThreadWithHintNV = 5280, | ||
| 1818 | + SpvOpTypeHitObjectNV = 5281, | ||
| 1619 | SpvOpImageSampleFootprintNV = 5283, | 1819 | SpvOpImageSampleFootprintNV = 5283, |
| 1620 | SpvOpEmitMeshTasksEXT = 5294, | 1820 | SpvOpEmitMeshTasksEXT = 5294, |
| 1621 | SpvOpSetMeshOutputsEXT = 5295, | 1821 | SpvOpSetMeshOutputsEXT = 5295, |
| 1622 | SpvOpGroupNonUniformPartitionNV = 5296, | 1822 | SpvOpGroupNonUniformPartitionNV = 5296, |
| 1623 | SpvOpWritePackedPrimitiveIndices4x8NV = 5299, | 1823 | SpvOpWritePackedPrimitiveIndices4x8NV = 5299, |
| 1824 | + SpvOpFetchMicroTriangleVertexPositionNV = 5300, | ||
| 1825 | + SpvOpFetchMicroTriangleVertexBarycentricNV = 5301, | ||
| 1624 | SpvOpReportIntersectionKHR = 5334, | 1826 | SpvOpReportIntersectionKHR = 5334, |
| 1625 | SpvOpReportIntersectionNV = 5334, | 1827 | SpvOpReportIntersectionNV = 5334, |
| 1626 | SpvOpIgnoreIntersectionNV = 5335, | 1828 | SpvOpIgnoreIntersectionNV = 5335, |
| @@ -1628,6 +1830,7 @@ typedef enum SpvOp_ { | |||
| 1628 | SpvOpTraceNV = 5337, | 1830 | SpvOpTraceNV = 5337, |
| 1629 | SpvOpTraceMotionNV = 5338, | 1831 | SpvOpTraceMotionNV = 5338, |
| 1630 | SpvOpTraceRayMotionNV = 5339, | 1832 | SpvOpTraceRayMotionNV = 5339, |
| 1833 | + SpvOpRayQueryGetIntersectionTriangleVertexPositionsKHR = 5340, | ||
| 1631 | SpvOpTypeAccelerationStructureKHR = 5341, | 1834 | SpvOpTypeAccelerationStructureKHR = 5341, |
| 1632 | SpvOpTypeAccelerationStructureNV = 5341, | 1835 | SpvOpTypeAccelerationStructureNV = 5341, |
| 1633 | SpvOpExecuteCallableNV = 5344, | 1836 | SpvOpExecuteCallableNV = 5344, |
| @@ -1889,6 +2092,9 @@ typedef enum SpvOp_ { | |||
| 1889 | SpvOpTypeStructContinuedINTEL = 6090, | 2092 | SpvOpTypeStructContinuedINTEL = 6090, |
| 1890 | SpvOpConstantCompositeContinuedINTEL = 6091, | 2093 | SpvOpConstantCompositeContinuedINTEL = 6091, |
| 1891 | SpvOpSpecConstantCompositeContinuedINTEL = 6092, | 2094 | SpvOpSpecConstantCompositeContinuedINTEL = 6092, |
| 2095 | + SpvOpCompositeConstructContinuedINTEL = 6096, | ||
| 2096 | + SpvOpConvertFToBF16INTEL = 6116, | ||
| 2097 | + SpvOpConvertBF16ToFINTEL = 6117, | ||
| 1892 | SpvOpControlBarrierArriveINTEL = 6142, | 2098 | SpvOpControlBarrierArriveINTEL = 6142, |
| 1893 | SpvOpControlBarrierWaitINTEL = 6143, | 2099 | SpvOpControlBarrierWaitINTEL = 6143, |
| 1894 | SpvOpGroupIMulKHR = 6401, | 2100 | SpvOpGroupIMulKHR = 6401, |
| @@ -2254,6 +2460,9 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy | |||
| 2254 | case SpvOpPtrEqual: *hasResult = true; *hasResultType = true; break; | 2460 | case SpvOpPtrEqual: *hasResult = true; *hasResultType = true; break; |
| 2255 | case SpvOpPtrNotEqual: *hasResult = true; *hasResultType = true; break; | 2461 | case SpvOpPtrNotEqual: *hasResult = true; *hasResultType = true; break; |
| 2256 | case SpvOpPtrDiff: *hasResult = true; *hasResultType = true; break; | 2462 | case SpvOpPtrDiff: *hasResult = true; *hasResultType = true; break; |
| 2463 | + case SpvOpColorAttachmentReadEXT: *hasResult = true; *hasResultType = true; break; | ||
| 2464 | + case SpvOpDepthAttachmentReadEXT: *hasResult = true; *hasResultType = true; break; | ||
| 2465 | + case SpvOpStencilAttachmentReadEXT: *hasResult = true; *hasResultType = true; break; | ||
| 2257 | case SpvOpTerminateInvocation: *hasResult = false; *hasResultType = false; break; | 2466 | case SpvOpTerminateInvocation: *hasResult = false; *hasResultType = false; break; |
| 2258 | case SpvOpSubgroupBallotKHR: *hasResult = true; *hasResultType = true; break; | 2467 | case SpvOpSubgroupBallotKHR: *hasResult = true; *hasResultType = true; break; |
| 2259 | case SpvOpSubgroupFirstInvocationKHR: *hasResult = true; *hasResultType = true; break; | 2468 | case SpvOpSubgroupFirstInvocationKHR: *hasResult = true; *hasResultType = true; break; |
| @@ -2273,6 +2482,11 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy | |||
| 2273 | case SpvOpSDotAccSat: *hasResult = true; *hasResultType = true; break; | 2482 | case SpvOpSDotAccSat: *hasResult = true; *hasResultType = true; break; |
| 2274 | case SpvOpUDotAccSat: *hasResult = true; *hasResultType = true; break; | 2483 | case SpvOpUDotAccSat: *hasResult = true; *hasResultType = true; break; |
| 2275 | case SpvOpSUDotAccSat: *hasResult = true; *hasResultType = true; break; | 2484 | case SpvOpSUDotAccSat: *hasResult = true; *hasResultType = true; break; |
| 2485 | + case SpvOpTypeCooperativeMatrixKHR: *hasResult = true; *hasResultType = false; break; | ||
| 2486 | + case SpvOpCooperativeMatrixLoadKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2487 | + case SpvOpCooperativeMatrixStoreKHR: *hasResult = false; *hasResultType = false; break; | ||
| 2488 | + case SpvOpCooperativeMatrixMulAddKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2489 | + case SpvOpCooperativeMatrixLengthKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2276 | case SpvOpTypeRayQueryKHR: *hasResult = true; *hasResultType = false; break; | 2490 | case SpvOpTypeRayQueryKHR: *hasResult = true; *hasResultType = false; break; |
| 2277 | case SpvOpRayQueryInitializeKHR: *hasResult = false; *hasResultType = false; break; | 2491 | case SpvOpRayQueryInitializeKHR: *hasResult = false; *hasResultType = false; break; |
| 2278 | case SpvOpRayQueryTerminateKHR: *hasResult = false; *hasResultType = false; break; | 2492 | case SpvOpRayQueryTerminateKHR: *hasResult = false; *hasResultType = false; break; |
| @@ -2280,6 +2494,10 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy | |||
| 2280 | case SpvOpRayQueryConfirmIntersectionKHR: *hasResult = false; *hasResultType = false; break; | 2494 | case SpvOpRayQueryConfirmIntersectionKHR: *hasResult = false; *hasResultType = false; break; |
| 2281 | case SpvOpRayQueryProceedKHR: *hasResult = true; *hasResultType = true; break; | 2495 | case SpvOpRayQueryProceedKHR: *hasResult = true; *hasResultType = true; break; |
| 2282 | case SpvOpRayQueryGetIntersectionTypeKHR: *hasResult = true; *hasResultType = true; break; | 2496 | case SpvOpRayQueryGetIntersectionTypeKHR: *hasResult = true; *hasResultType = true; break; |
| 2497 | + case SpvOpImageSampleWeightedQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2498 | + case SpvOpImageBoxFilterQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2499 | + case SpvOpImageBlockMatchSSDQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2500 | + case SpvOpImageBlockMatchSADQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2283 | case SpvOpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; | 2501 | case SpvOpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; |
| 2284 | case SpvOpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; | 2502 | case SpvOpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; |
| 2285 | case SpvOpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break; | 2503 | case SpvOpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break; |
| @@ -2291,17 +2509,56 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy | |||
| 2291 | case SpvOpFragmentMaskFetchAMD: *hasResult = true; *hasResultType = true; break; | 2509 | case SpvOpFragmentMaskFetchAMD: *hasResult = true; *hasResultType = true; break; |
| 2292 | case SpvOpFragmentFetchAMD: *hasResult = true; *hasResultType = true; break; | 2510 | case SpvOpFragmentFetchAMD: *hasResult = true; *hasResultType = true; break; |
| 2293 | case SpvOpReadClockKHR: *hasResult = true; *hasResultType = true; break; | 2511 | case SpvOpReadClockKHR: *hasResult = true; *hasResultType = true; break; |
| 2512 | + case SpvOpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; | ||
| 2513 | + case SpvOpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break; | ||
| 2514 | + case SpvOpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; | ||
| 2515 | + case SpvOpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2516 | + case SpvOpHitObjectRecordHitWithIndexMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2517 | + case SpvOpHitObjectRecordMissMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2518 | + case SpvOpHitObjectGetWorldToObjectNV: *hasResult = true; *hasResultType = true; break; | ||
| 2519 | + case SpvOpHitObjectGetObjectToWorldNV: *hasResult = true; *hasResultType = true; break; | ||
| 2520 | + case SpvOpHitObjectGetObjectRayDirectionNV: *hasResult = true; *hasResultType = true; break; | ||
| 2521 | + case SpvOpHitObjectGetObjectRayOriginNV: *hasResult = true; *hasResultType = true; break; | ||
| 2522 | + case SpvOpHitObjectTraceRayMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2523 | + case SpvOpHitObjectGetShaderRecordBufferHandleNV: *hasResult = true; *hasResultType = true; break; | ||
| 2524 | + case SpvOpHitObjectGetShaderBindingTableRecordIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2525 | + case SpvOpHitObjectRecordEmptyNV: *hasResult = false; *hasResultType = false; break; | ||
| 2526 | + case SpvOpHitObjectTraceRayNV: *hasResult = false; *hasResultType = false; break; | ||
| 2527 | + case SpvOpHitObjectRecordHitNV: *hasResult = false; *hasResultType = false; break; | ||
| 2528 | + case SpvOpHitObjectRecordHitWithIndexNV: *hasResult = false; *hasResultType = false; break; | ||
| 2529 | + case SpvOpHitObjectRecordMissNV: *hasResult = false; *hasResultType = false; break; | ||
| 2530 | + case SpvOpHitObjectExecuteShaderNV: *hasResult = false; *hasResultType = false; break; | ||
| 2531 | + case SpvOpHitObjectGetCurrentTimeNV: *hasResult = true; *hasResultType = true; break; | ||
| 2532 | + case SpvOpHitObjectGetAttributesNV: *hasResult = false; *hasResultType = false; break; | ||
| 2533 | + case SpvOpHitObjectGetHitKindNV: *hasResult = true; *hasResultType = true; break; | ||
| 2534 | + case SpvOpHitObjectGetPrimitiveIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2535 | + case SpvOpHitObjectGetGeometryIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2536 | + case SpvOpHitObjectGetInstanceIdNV: *hasResult = true; *hasResultType = true; break; | ||
| 2537 | + case SpvOpHitObjectGetInstanceCustomIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2538 | + case SpvOpHitObjectGetWorldRayDirectionNV: *hasResult = true; *hasResultType = true; break; | ||
| 2539 | + case SpvOpHitObjectGetWorldRayOriginNV: *hasResult = true; *hasResultType = true; break; | ||
| 2540 | + case SpvOpHitObjectGetRayTMaxNV: *hasResult = true; *hasResultType = true; break; | ||
| 2541 | + case SpvOpHitObjectGetRayTMinNV: *hasResult = true; *hasResultType = true; break; | ||
| 2542 | + case SpvOpHitObjectIsEmptyNV: *hasResult = true; *hasResultType = true; break; | ||
| 2543 | + case SpvOpHitObjectIsHitNV: *hasResult = true; *hasResultType = true; break; | ||
| 2544 | + case SpvOpHitObjectIsMissNV: *hasResult = true; *hasResultType = true; break; | ||
| 2545 | + case SpvOpReorderThreadWithHitObjectNV: *hasResult = false; *hasResultType = false; break; | ||
| 2546 | + case SpvOpReorderThreadWithHintNV: *hasResult = false; *hasResultType = false; break; | ||
| 2547 | + case SpvOpTypeHitObjectNV: *hasResult = true; *hasResultType = false; break; | ||
| 2294 | case SpvOpImageSampleFootprintNV: *hasResult = true; *hasResultType = true; break; | 2548 | case SpvOpImageSampleFootprintNV: *hasResult = true; *hasResultType = true; break; |
| 2295 | case SpvOpEmitMeshTasksEXT: *hasResult = false; *hasResultType = false; break; | 2549 | case SpvOpEmitMeshTasksEXT: *hasResult = false; *hasResultType = false; break; |
| 2296 | case SpvOpSetMeshOutputsEXT: *hasResult = false; *hasResultType = false; break; | 2550 | case SpvOpSetMeshOutputsEXT: *hasResult = false; *hasResultType = false; break; |
| 2297 | case SpvOpGroupNonUniformPartitionNV: *hasResult = true; *hasResultType = true; break; | 2551 | case SpvOpGroupNonUniformPartitionNV: *hasResult = true; *hasResultType = true; break; |
| 2298 | case SpvOpWritePackedPrimitiveIndices4x8NV: *hasResult = false; *hasResultType = false; break; | 2552 | case SpvOpWritePackedPrimitiveIndices4x8NV: *hasResult = false; *hasResultType = false; break; |
| 2553 | + case SpvOpFetchMicroTriangleVertexPositionNV: *hasResult = true; *hasResultType = true; break; | ||
| 2554 | + case SpvOpFetchMicroTriangleVertexBarycentricNV: *hasResult = true; *hasResultType = true; break; | ||
| 2299 | case SpvOpReportIntersectionNV: *hasResult = true; *hasResultType = true; break; | 2555 | case SpvOpReportIntersectionNV: *hasResult = true; *hasResultType = true; break; |
| 2300 | case SpvOpIgnoreIntersectionNV: *hasResult = false; *hasResultType = false; break; | 2556 | case SpvOpIgnoreIntersectionNV: *hasResult = false; *hasResultType = false; break; |
| 2301 | case SpvOpTerminateRayNV: *hasResult = false; *hasResultType = false; break; | 2557 | case SpvOpTerminateRayNV: *hasResult = false; *hasResultType = false; break; |
| 2302 | case SpvOpTraceNV: *hasResult = false; *hasResultType = false; break; | 2558 | case SpvOpTraceNV: *hasResult = false; *hasResultType = false; break; |
| 2303 | case SpvOpTraceMotionNV: *hasResult = false; *hasResultType = false; break; | 2559 | case SpvOpTraceMotionNV: *hasResult = false; *hasResultType = false; break; |
| 2304 | case SpvOpTraceRayMotionNV: *hasResult = false; *hasResultType = false; break; | 2560 | case SpvOpTraceRayMotionNV: *hasResult = false; *hasResultType = false; break; |
| 2561 | + case SpvOpRayQueryGetIntersectionTriangleVertexPositionsKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2305 | case SpvOpTypeAccelerationStructureNV: *hasResult = true; *hasResultType = false; break; | 2562 | case SpvOpTypeAccelerationStructureNV: *hasResult = true; *hasResultType = false; break; |
| 2306 | case SpvOpExecuteCallableNV: *hasResult = false; *hasResultType = false; break; | 2563 | case SpvOpExecuteCallableNV: *hasResult = false; *hasResultType = false; break; |
| 2307 | case SpvOpTypeCooperativeMatrixNV: *hasResult = true; *hasResultType = false; break; | 2564 | case SpvOpTypeCooperativeMatrixNV: *hasResult = true; *hasResultType = false; break; |
| @@ -2559,6 +2816,9 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy | |||
| 2559 | case SpvOpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break; | 2816 | case SpvOpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break; |
| 2560 | case SpvOpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; | 2817 | case SpvOpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; |
| 2561 | case SpvOpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; | 2818 | case SpvOpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; |
| 2819 | + case SpvOpCompositeConstructContinuedINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 2820 | + case SpvOpConvertFToBF16INTEL: *hasResult = true; *hasResultType = true; break; | ||
| 2821 | + case SpvOpConvertBF16ToFINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 2562 | case SpvOpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break; | 2822 | case SpvOpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break; |
| 2563 | case SpvOpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break; | 2823 | case SpvOpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break; |
| 2564 | case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break; | 2824 | case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break; |
| @@ -69,6 +69,10 @@ enum SourceLanguage { | |||
| 69 | SourceLanguageHLSL = 5, | 69 | SourceLanguageHLSL = 5, |
| 70 | SourceLanguageCPP_for_OpenCL = 6, | 70 | SourceLanguageCPP_for_OpenCL = 6, |
| 71 | SourceLanguageSYCL = 7, | 71 | SourceLanguageSYCL = 7, |
| 72 | + SourceLanguageHERO_C = 8, | ||
| 73 | + SourceLanguageNZSL = 9, | ||
| 74 | + SourceLanguageWGSL = 10, | ||
| 75 | + SourceLanguageSlang = 11, | ||
| 72 | SourceLanguageMax = 0x7fffffff, | 76 | SourceLanguageMax = 0x7fffffff, |
| 73 | }; | 77 | }; |
| 74 | 78 | ||
| @@ -156,6 +160,9 @@ enum ExecutionMode { | |||
| 156 | ExecutionModeSubgroupsPerWorkgroupId = 37, | 160 | ExecutionModeSubgroupsPerWorkgroupId = 37, |
| 157 | ExecutionModeLocalSizeId = 38, | 161 | ExecutionModeLocalSizeId = 38, |
| 158 | ExecutionModeLocalSizeHintId = 39, | 162 | ExecutionModeLocalSizeHintId = 39, |
| 163 | + ExecutionModeNonCoherentColorAttachmentReadEXT = 4169, | ||
| 164 | + ExecutionModeNonCoherentDepthAttachmentReadEXT = 4170, | ||
| 165 | + ExecutionModeNonCoherentStencilAttachmentReadEXT = 4171, | ||
| 159 | ExecutionModeSubgroupUniformControlFlowKHR = 4421, | 166 | ExecutionModeSubgroupUniformControlFlowKHR = 4421, |
| 160 | ExecutionModePostDepthCoverage = 4446, | 167 | ExecutionModePostDepthCoverage = 4446, |
| 161 | ExecutionModeDenormPreserve = 4459, | 168 | ExecutionModeDenormPreserve = 4459, |
| @@ -165,6 +172,11 @@ enum ExecutionMode { | |||
| 165 | ExecutionModeRoundingModeRTZ = 4463, | 172 | ExecutionModeRoundingModeRTZ = 4463, |
| 166 | ExecutionModeEarlyAndLateFragmentTestsAMD = 5017, | 173 | ExecutionModeEarlyAndLateFragmentTestsAMD = 5017, |
| 167 | ExecutionModeStencilRefReplacingEXT = 5027, | 174 | ExecutionModeStencilRefReplacingEXT = 5027, |
| 175 | + ExecutionModeCoalescingAMDX = 5069, | ||
| 176 | + ExecutionModeMaxNodeRecursionAMDX = 5071, | ||
| 177 | + ExecutionModeStaticNumWorkgroupsAMDX = 5072, | ||
| 178 | + ExecutionModeShaderIndexAMDX = 5073, | ||
| 179 | + ExecutionModeMaxNumWorkgroupsAMDX = 5077, | ||
| 168 | ExecutionModeStencilRefUnchangedFrontAMD = 5079, | 180 | ExecutionModeStencilRefUnchangedFrontAMD = 5079, |
| 169 | ExecutionModeStencilRefGreaterFrontAMD = 5080, | 181 | ExecutionModeStencilRefGreaterFrontAMD = 5080, |
| 170 | ExecutionModeStencilRefLessFrontAMD = 5081, | 182 | ExecutionModeStencilRefLessFrontAMD = 5081, |
| @@ -195,6 +207,8 @@ enum ExecutionMode { | |||
| 195 | ExecutionModeNoGlobalOffsetINTEL = 5895, | 207 | ExecutionModeNoGlobalOffsetINTEL = 5895, |
| 196 | ExecutionModeNumSIMDWorkitemsINTEL = 5896, | 208 | ExecutionModeNumSIMDWorkitemsINTEL = 5896, |
| 197 | ExecutionModeSchedulerTargetFmaxMhzINTEL = 5903, | 209 | ExecutionModeSchedulerTargetFmaxMhzINTEL = 5903, |
| 210 | + ExecutionModeStreamingInterfaceINTEL = 6154, | ||
| 211 | + ExecutionModeRegisterMapInterfaceINTEL = 6160, | ||
| 198 | ExecutionModeNamedBarrierCountINTEL = 6417, | 212 | ExecutionModeNamedBarrierCountINTEL = 6417, |
| 199 | ExecutionModeMax = 0x7fffffff, | 213 | ExecutionModeMax = 0x7fffffff, |
| 200 | }; | 214 | }; |
| @@ -213,6 +227,9 @@ enum StorageClass { | |||
| 213 | StorageClassAtomicCounter = 10, | 227 | StorageClassAtomicCounter = 10, |
| 214 | StorageClassImage = 11, | 228 | StorageClassImage = 11, |
| 215 | StorageClassStorageBuffer = 12, | 229 | StorageClassStorageBuffer = 12, |
| 230 | + StorageClassTileImageEXT = 4172, | ||
| 231 | + StorageClassNodePayloadAMDX = 5068, | ||
| 232 | + StorageClassNodeOutputPayloadAMDX = 5076, | ||
| 216 | StorageClassCallableDataKHR = 5328, | 233 | StorageClassCallableDataKHR = 5328, |
| 217 | StorageClassCallableDataNV = 5328, | 234 | StorageClassCallableDataNV = 5328, |
| 218 | StorageClassIncomingCallableDataKHR = 5329, | 235 | StorageClassIncomingCallableDataKHR = 5329, |
| @@ -227,6 +244,7 @@ enum StorageClass { | |||
| 227 | StorageClassShaderRecordBufferNV = 5343, | 244 | StorageClassShaderRecordBufferNV = 5343, |
| 228 | StorageClassPhysicalStorageBuffer = 5349, | 245 | StorageClassPhysicalStorageBuffer = 5349, |
| 229 | StorageClassPhysicalStorageBufferEXT = 5349, | 246 | StorageClassPhysicalStorageBufferEXT = 5349, |
| 247 | + StorageClassHitObjectAttributeNV = 5385, | ||
| 230 | StorageClassTaskPayloadWorkgroupEXT = 5402, | 248 | StorageClassTaskPayloadWorkgroupEXT = 5402, |
| 231 | StorageClassCodeSectionINTEL = 5605, | 249 | StorageClassCodeSectionINTEL = 5605, |
| 232 | StorageClassDeviceOnlyINTEL = 5936, | 250 | StorageClassDeviceOnlyINTEL = 5936, |
| @@ -242,6 +260,7 @@ enum Dim { | |||
| 242 | DimRect = 4, | 260 | DimRect = 4, |
| 243 | DimBuffer = 5, | 261 | DimBuffer = 5, |
| 244 | DimSubpassData = 6, | 262 | DimSubpassData = 6, |
| 263 | + DimTileImageDataEXT = 4173, | ||
| 245 | DimMax = 0x7fffffff, | 264 | DimMax = 0x7fffffff, |
| 246 | }; | 265 | }; |
| 247 | 266 | ||
| @@ -348,6 +367,8 @@ enum ImageChannelDataType { | |||
| 348 | ImageChannelDataTypeFloat = 14, | 367 | ImageChannelDataTypeFloat = 14, |
| 349 | ImageChannelDataTypeUnormInt24 = 15, | 368 | ImageChannelDataTypeUnormInt24 = 15, |
| 350 | ImageChannelDataTypeUnormInt101010_2 = 16, | 369 | ImageChannelDataTypeUnormInt101010_2 = 16, |
| 370 | + ImageChannelDataTypeUnsignedIntRaw10EXT = 19, | ||
| 371 | + ImageChannelDataTypeUnsignedIntRaw12EXT = 20, | ||
| 351 | ImageChannelDataTypeMax = 0x7fffffff, | 372 | ImageChannelDataTypeMax = 0x7fffffff, |
| 352 | }; | 373 | }; |
| 353 | 374 | ||
| @@ -452,6 +473,7 @@ enum FunctionParameterAttribute { | |||
| 452 | FunctionParameterAttributeNoCapture = 5, | 473 | FunctionParameterAttributeNoCapture = 5, |
| 453 | FunctionParameterAttributeNoWrite = 6, | 474 | FunctionParameterAttributeNoWrite = 6, |
| 454 | FunctionParameterAttributeNoReadWrite = 7, | 475 | FunctionParameterAttributeNoReadWrite = 7, |
| 476 | + FunctionParameterAttributeRuntimeAlignedINTEL = 5940, | ||
| 455 | FunctionParameterAttributeMax = 0x7fffffff, | 477 | FunctionParameterAttributeMax = 0x7fffffff, |
| 456 | }; | 478 | }; |
| 457 | 479 | ||
| @@ -505,7 +527,13 @@ enum Decoration { | |||
| 505 | DecorationMaxByteOffsetId = 47, | 527 | DecorationMaxByteOffsetId = 47, |
| 506 | DecorationNoSignedWrap = 4469, | 528 | DecorationNoSignedWrap = 4469, |
| 507 | DecorationNoUnsignedWrap = 4470, | 529 | DecorationNoUnsignedWrap = 4470, |
| 530 | + DecorationWeightTextureQCOM = 4487, | ||
| 531 | + DecorationBlockMatchTextureQCOM = 4488, | ||
| 508 | DecorationExplicitInterpAMD = 4999, | 532 | DecorationExplicitInterpAMD = 4999, |
| 533 | + DecorationNodeSharesPayloadLimitsWithAMDX = 5019, | ||
| 534 | + DecorationNodeMaxPayloadsAMDX = 5020, | ||
| 535 | + DecorationTrackFinishWritingAMDX = 5078, | ||
| 536 | + DecorationPayloadNodeNameAMDX = 5091, | ||
| 509 | DecorationOverrideCoverageNV = 5248, | 537 | DecorationOverrideCoverageNV = 5248, |
| 510 | DecorationPassthroughNV = 5250, | 538 | DecorationPassthroughNV = 5250, |
| 511 | DecorationViewportRelativeNV = 5252, | 539 | DecorationViewportRelativeNV = 5252, |
| @@ -522,6 +550,7 @@ enum Decoration { | |||
| 522 | DecorationRestrictPointerEXT = 5355, | 550 | DecorationRestrictPointerEXT = 5355, |
| 523 | DecorationAliasedPointer = 5356, | 551 | DecorationAliasedPointer = 5356, |
| 524 | DecorationAliasedPointerEXT = 5356, | 552 | DecorationAliasedPointerEXT = 5356, |
| 553 | + DecorationHitObjectShaderRecordBufferNV = 5386, | ||
| 525 | DecorationBindlessSamplerNV = 5398, | 554 | DecorationBindlessSamplerNV = 5398, |
| 526 | DecorationBindlessImageNV = 5399, | 555 | DecorationBindlessImageNV = 5399, |
| 527 | DecorationBoundSamplerNV = 5400, | 556 | DecorationBoundSamplerNV = 5400, |
| @@ -554,20 +583,45 @@ enum Decoration { | |||
| 554 | DecorationMergeINTEL = 5834, | 583 | DecorationMergeINTEL = 5834, |
| 555 | DecorationBankBitsINTEL = 5835, | 584 | DecorationBankBitsINTEL = 5835, |
| 556 | DecorationForcePow2DepthINTEL = 5836, | 585 | DecorationForcePow2DepthINTEL = 5836, |
| 586 | + DecorationStridesizeINTEL = 5883, | ||
| 587 | + DecorationWordsizeINTEL = 5884, | ||
| 588 | + DecorationTrueDualPortINTEL = 5885, | ||
| 557 | DecorationBurstCoalesceINTEL = 5899, | 589 | DecorationBurstCoalesceINTEL = 5899, |
| 558 | DecorationCacheSizeINTEL = 5900, | 590 | DecorationCacheSizeINTEL = 5900, |
| 559 | DecorationDontStaticallyCoalesceINTEL = 5901, | 591 | DecorationDontStaticallyCoalesceINTEL = 5901, |
| 560 | DecorationPrefetchINTEL = 5902, | 592 | DecorationPrefetchINTEL = 5902, |
| 561 | DecorationStallEnableINTEL = 5905, | 593 | DecorationStallEnableINTEL = 5905, |
| 562 | DecorationFuseLoopsInFunctionINTEL = 5907, | 594 | DecorationFuseLoopsInFunctionINTEL = 5907, |
| 595 | + DecorationMathOpDSPModeINTEL = 5909, | ||
| 563 | DecorationAliasScopeINTEL = 5914, | 596 | DecorationAliasScopeINTEL = 5914, |
| 564 | DecorationNoAliasINTEL = 5915, | 597 | DecorationNoAliasINTEL = 5915, |
| 598 | + DecorationInitiationIntervalINTEL = 5917, | ||
| 599 | + DecorationMaxConcurrencyINTEL = 5918, | ||
| 600 | + DecorationPipelineEnableINTEL = 5919, | ||
| 565 | DecorationBufferLocationINTEL = 5921, | 601 | DecorationBufferLocationINTEL = 5921, |
| 566 | DecorationIOPipeStorageINTEL = 5944, | 602 | DecorationIOPipeStorageINTEL = 5944, |
| 567 | DecorationFunctionFloatingPointModeINTEL = 6080, | 603 | DecorationFunctionFloatingPointModeINTEL = 6080, |
| 568 | DecorationSingleElementVectorINTEL = 6085, | 604 | DecorationSingleElementVectorINTEL = 6085, |
| 569 | DecorationVectorComputeCallableFunctionINTEL = 6087, | 605 | DecorationVectorComputeCallableFunctionINTEL = 6087, |
| 570 | DecorationMediaBlockIOINTEL = 6140, | 606 | DecorationMediaBlockIOINTEL = 6140, |
| 607 | + DecorationStallFreeINTEL = 6151, | ||
| 608 | + DecorationFPMaxErrorDecorationINTEL = 6170, | ||
| 609 | + DecorationLatencyControlLabelINTEL = 6172, | ||
| 610 | + DecorationLatencyControlConstraintINTEL = 6173, | ||
| 611 | + DecorationConduitKernelArgumentINTEL = 6175, | ||
| 612 | + DecorationRegisterMapKernelArgumentINTEL = 6176, | ||
| 613 | + DecorationMMHostInterfaceAddressWidthINTEL = 6177, | ||
| 614 | + DecorationMMHostInterfaceDataWidthINTEL = 6178, | ||
| 615 | + DecorationMMHostInterfaceLatencyINTEL = 6179, | ||
| 616 | + DecorationMMHostInterfaceReadWriteModeINTEL = 6180, | ||
| 617 | + DecorationMMHostInterfaceMaxBurstINTEL = 6181, | ||
| 618 | + DecorationMMHostInterfaceWaitRequestINTEL = 6182, | ||
| 619 | + DecorationStableKernelArgumentINTEL = 6183, | ||
| 620 | + DecorationHostAccessINTEL = 6188, | ||
| 621 | + DecorationInitModeINTEL = 6190, | ||
| 622 | + DecorationImplementInRegisterMapINTEL = 6191, | ||
| 623 | + DecorationCacheControlLoadINTEL = 6442, | ||
| 624 | + DecorationCacheControlStoreINTEL = 6443, | ||
| 571 | DecorationMax = 0x7fffffff, | 625 | DecorationMax = 0x7fffffff, |
| 572 | }; | 626 | }; |
| 573 | 627 | ||
| @@ -643,6 +697,8 @@ enum BuiltIn { | |||
| 643 | BuiltInBaryCoordSmoothSampleAMD = 4997, | 697 | BuiltInBaryCoordSmoothSampleAMD = 4997, |
| 644 | BuiltInBaryCoordPullModelAMD = 4998, | 698 | BuiltInBaryCoordPullModelAMD = 4998, |
| 645 | BuiltInFragStencilRefEXT = 5014, | 699 | BuiltInFragStencilRefEXT = 5014, |
| 700 | + BuiltInCoalescedInputCountAMDX = 5021, | ||
| 701 | + BuiltInShaderIndexAMDX = 5073, | ||
| 646 | BuiltInViewportMaskNV = 5253, | 702 | BuiltInViewportMaskNV = 5253, |
| 647 | BuiltInSecondaryPositionNV = 5257, | 703 | BuiltInSecondaryPositionNV = 5257, |
| 648 | BuiltInSecondaryViewportMaskNV = 5258, | 704 | BuiltInSecondaryViewportMaskNV = 5258, |
| @@ -695,6 +751,9 @@ enum BuiltIn { | |||
| 695 | BuiltInHitKindKHR = 5333, | 751 | BuiltInHitKindKHR = 5333, |
| 696 | BuiltInHitKindNV = 5333, | 752 | BuiltInHitKindNV = 5333, |
| 697 | BuiltInCurrentRayTimeNV = 5334, | 753 | BuiltInCurrentRayTimeNV = 5334, |
| 754 | + BuiltInHitTriangleVertexPositionsKHR = 5335, | ||
| 755 | + BuiltInHitMicroTriangleVertexPositionsNV = 5337, | ||
| 756 | + BuiltInHitMicroTriangleVertexBarycentricsNV = 5344, | ||
| 698 | BuiltInIncomingRayFlagsKHR = 5351, | 757 | BuiltInIncomingRayFlagsKHR = 5351, |
| 699 | BuiltInIncomingRayFlagsNV = 5351, | 758 | BuiltInIncomingRayFlagsNV = 5351, |
| 700 | BuiltInRayGeometryIndexKHR = 5352, | 759 | BuiltInRayGeometryIndexKHR = 5352, |
| @@ -702,6 +761,8 @@ enum BuiltIn { | |||
| 702 | BuiltInSMCountNV = 5375, | 761 | BuiltInSMCountNV = 5375, |
| 703 | BuiltInWarpIDNV = 5376, | 762 | BuiltInWarpIDNV = 5376, |
| 704 | BuiltInSMIDNV = 5377, | 763 | BuiltInSMIDNV = 5377, |
| 764 | + BuiltInHitKindFrontFacingMicroTriangleNV = 5405, | ||
| 765 | + BuiltInHitKindBackFacingMicroTriangleNV = 5406, | ||
| 705 | BuiltInCullMaskKHR = 6021, | 766 | BuiltInCullMaskKHR = 6021, |
| 706 | BuiltInMax = 0x7fffffff, | 767 | BuiltInMax = 0x7fffffff, |
| 707 | }; | 768 | }; |
| @@ -736,6 +797,8 @@ enum LoopControlShift { | |||
| 736 | LoopControlMaxInterleavingINTELShift = 21, | 797 | LoopControlMaxInterleavingINTELShift = 21, |
| 737 | LoopControlSpeculatedIterationsINTELShift = 22, | 798 | LoopControlSpeculatedIterationsINTELShift = 22, |
| 738 | LoopControlNoFusionINTELShift = 23, | 799 | LoopControlNoFusionINTELShift = 23, |
| 800 | + LoopControlLoopCountINTELShift = 24, | ||
| 801 | + LoopControlMaxReinvocationDelayINTELShift = 25, | ||
| 739 | LoopControlMax = 0x7fffffff, | 802 | LoopControlMax = 0x7fffffff, |
| 740 | }; | 803 | }; |
| 741 | 804 | ||
| @@ -758,6 +821,8 @@ enum LoopControlMask { | |||
| 758 | LoopControlMaxInterleavingINTELMask = 0x00200000, | 821 | LoopControlMaxInterleavingINTELMask = 0x00200000, |
| 759 | LoopControlSpeculatedIterationsINTELMask = 0x00400000, | 822 | LoopControlSpeculatedIterationsINTELMask = 0x00400000, |
| 760 | LoopControlNoFusionINTELMask = 0x00800000, | 823 | LoopControlNoFusionINTELMask = 0x00800000, |
| 824 | + LoopControlLoopCountINTELMask = 0x01000000, | ||
| 825 | + LoopControlMaxReinvocationDelayINTELMask = 0x02000000, | ||
| 761 | }; | 826 | }; |
| 762 | 827 | ||
| 763 | enum FunctionControlShift { | 828 | enum FunctionControlShift { |
| @@ -962,6 +1027,9 @@ enum Capability { | |||
| 962 | CapabilityShaderViewportIndex = 70, | 1027 | CapabilityShaderViewportIndex = 70, |
| 963 | CapabilityUniformDecoration = 71, | 1028 | CapabilityUniformDecoration = 71, |
| 964 | CapabilityCoreBuiltinsARM = 4165, | 1029 | CapabilityCoreBuiltinsARM = 4165, |
| 1030 | + CapabilityTileImageColorReadAccessEXT = 4166, | ||
| 1031 | + CapabilityTileImageDepthReadAccessEXT = 4167, | ||
| 1032 | + CapabilityTileImageStencilReadAccessEXT = 4168, | ||
| 965 | CapabilityFragmentShadingRateKHR = 4422, | 1033 | CapabilityFragmentShadingRateKHR = 4422, |
| 966 | CapabilitySubgroupBallotKHR = 4423, | 1034 | CapabilitySubgroupBallotKHR = 4423, |
| 967 | CapabilityDrawParameters = 4427, | 1035 | CapabilityDrawParameters = 4427, |
| @@ -993,6 +1061,9 @@ enum Capability { | |||
| 993 | CapabilityRayQueryKHR = 4472, | 1061 | CapabilityRayQueryKHR = 4472, |
| 994 | CapabilityRayTraversalPrimitiveCullingKHR = 4478, | 1062 | CapabilityRayTraversalPrimitiveCullingKHR = 4478, |
| 995 | CapabilityRayTracingKHR = 4479, | 1063 | CapabilityRayTracingKHR = 4479, |
| 1064 | + CapabilityTextureSampleWeightedQCOM = 4484, | ||
| 1065 | + CapabilityTextureBoxFilterQCOM = 4485, | ||
| 1066 | + CapabilityTextureBlockMatchQCOM = 4486, | ||
| 996 | CapabilityFloat16ImageAMD = 5008, | 1067 | CapabilityFloat16ImageAMD = 5008, |
| 997 | CapabilityImageGatherBiasLodAMD = 5009, | 1068 | CapabilityImageGatherBiasLodAMD = 5009, |
| 998 | CapabilityFragmentMaskAMD = 5010, | 1069 | CapabilityFragmentMaskAMD = 5010, |
| @@ -1000,6 +1071,7 @@ enum Capability { | |||
| 1000 | CapabilityImageReadWriteLodAMD = 5015, | 1071 | CapabilityImageReadWriteLodAMD = 5015, |
| 1001 | CapabilityInt64ImageEXT = 5016, | 1072 | CapabilityInt64ImageEXT = 5016, |
| 1002 | CapabilityShaderClockKHR = 5055, | 1073 | CapabilityShaderClockKHR = 5055, |
| 1074 | + CapabilityShaderEnqueueAMDX = 5067, | ||
| 1003 | CapabilitySampleMaskOverrideCoverageNV = 5249, | 1075 | CapabilitySampleMaskOverrideCoverageNV = 5249, |
| 1004 | CapabilityGeometryShaderPassthroughNV = 5251, | 1076 | CapabilityGeometryShaderPassthroughNV = 5251, |
| 1005 | CapabilityShaderViewportIndexLayerEXT = 5254, | 1077 | CapabilityShaderViewportIndexLayerEXT = 5254, |
| @@ -1041,6 +1113,7 @@ enum Capability { | |||
| 1041 | CapabilityUniformTexelBufferArrayNonUniformIndexingEXT = 5311, | 1113 | CapabilityUniformTexelBufferArrayNonUniformIndexingEXT = 5311, |
| 1042 | CapabilityStorageTexelBufferArrayNonUniformIndexing = 5312, | 1114 | CapabilityStorageTexelBufferArrayNonUniformIndexing = 5312, |
| 1043 | CapabilityStorageTexelBufferArrayNonUniformIndexingEXT = 5312, | 1115 | CapabilityStorageTexelBufferArrayNonUniformIndexingEXT = 5312, |
| 1116 | + CapabilityRayTracingPositionFetchKHR = 5336, | ||
| 1044 | CapabilityRayTracingNV = 5340, | 1117 | CapabilityRayTracingNV = 5340, |
| 1045 | CapabilityRayTracingMotionBlurNV = 5341, | 1118 | CapabilityRayTracingMotionBlurNV = 5341, |
| 1046 | CapabilityVulkanMemoryModel = 5345, | 1119 | CapabilityVulkanMemoryModel = 5345, |
| @@ -1058,8 +1131,12 @@ enum Capability { | |||
| 1058 | CapabilityFragmentShaderPixelInterlockEXT = 5378, | 1131 | CapabilityFragmentShaderPixelInterlockEXT = 5378, |
| 1059 | CapabilityDemoteToHelperInvocation = 5379, | 1132 | CapabilityDemoteToHelperInvocation = 5379, |
| 1060 | CapabilityDemoteToHelperInvocationEXT = 5379, | 1133 | CapabilityDemoteToHelperInvocationEXT = 5379, |
| 1134 | + CapabilityDisplacementMicromapNV = 5380, | ||
| 1061 | CapabilityRayTracingOpacityMicromapEXT = 5381, | 1135 | CapabilityRayTracingOpacityMicromapEXT = 5381, |
| 1136 | + CapabilityShaderInvocationReorderNV = 5383, | ||
| 1062 | CapabilityBindlessTextureNV = 5390, | 1137 | CapabilityBindlessTextureNV = 5390, |
| 1138 | + CapabilityRayQueryPositionFetchKHR = 5391, | ||
| 1139 | + CapabilityRayTracingDisplacementMicromapNV = 5409, | ||
| 1063 | CapabilitySubgroupShuffleINTEL = 5568, | 1140 | CapabilitySubgroupShuffleINTEL = 5568, |
| 1064 | CapabilitySubgroupBufferBlockIOINTEL = 5569, | 1141 | CapabilitySubgroupBufferBlockIOINTEL = 5569, |
| 1065 | CapabilitySubgroupImageBlockIOINTEL = 5570, | 1142 | CapabilitySubgroupImageBlockIOINTEL = 5570, |
| @@ -1092,10 +1169,13 @@ enum Capability { | |||
| 1092 | CapabilityFPGAMemoryAccessesINTEL = 5898, | 1169 | CapabilityFPGAMemoryAccessesINTEL = 5898, |
| 1093 | CapabilityFPGAClusterAttributesINTEL = 5904, | 1170 | CapabilityFPGAClusterAttributesINTEL = 5904, |
| 1094 | CapabilityLoopFuseINTEL = 5906, | 1171 | CapabilityLoopFuseINTEL = 5906, |
| 1172 | + CapabilityFPGADSPControlINTEL = 5908, | ||
| 1095 | CapabilityMemoryAccessAliasingINTEL = 5910, | 1173 | CapabilityMemoryAccessAliasingINTEL = 5910, |
| 1174 | + CapabilityFPGAInvocationPipeliningAttributesINTEL = 5916, | ||
| 1096 | CapabilityFPGABufferLocationINTEL = 5920, | 1175 | CapabilityFPGABufferLocationINTEL = 5920, |
| 1097 | CapabilityArbitraryPrecisionFixedPointINTEL = 5922, | 1176 | CapabilityArbitraryPrecisionFixedPointINTEL = 5922, |
| 1098 | CapabilityUSMStorageClassesINTEL = 5935, | 1177 | CapabilityUSMStorageClassesINTEL = 5935, |
| 1178 | + CapabilityRuntimeAlignedAttributeINTEL = 5939, | ||
| 1099 | CapabilityIOPipesINTEL = 5943, | 1179 | CapabilityIOPipesINTEL = 5943, |
| 1100 | CapabilityBlockingPipesINTEL = 5945, | 1180 | CapabilityBlockingPipesINTEL = 5945, |
| 1101 | CapabilityFPGARegINTEL = 5948, | 1181 | CapabilityFPGARegINTEL = 5948, |
| @@ -1108,16 +1188,26 @@ enum Capability { | |||
| 1108 | CapabilityDotProduct = 6019, | 1188 | CapabilityDotProduct = 6019, |
| 1109 | CapabilityDotProductKHR = 6019, | 1189 | CapabilityDotProductKHR = 6019, |
| 1110 | CapabilityRayCullMaskKHR = 6020, | 1190 | CapabilityRayCullMaskKHR = 6020, |
| 1191 | + CapabilityCooperativeMatrixKHR = 6022, | ||
| 1111 | CapabilityBitInstructions = 6025, | 1192 | CapabilityBitInstructions = 6025, |
| 1112 | CapabilityGroupNonUniformRotateKHR = 6026, | 1193 | CapabilityGroupNonUniformRotateKHR = 6026, |
| 1113 | CapabilityAtomicFloat32AddEXT = 6033, | 1194 | CapabilityAtomicFloat32AddEXT = 6033, |
| 1114 | CapabilityAtomicFloat64AddEXT = 6034, | 1195 | CapabilityAtomicFloat64AddEXT = 6034, |
| 1115 | - CapabilityLongConstantCompositeINTEL = 6089, | 1196 | + CapabilityLongCompositesINTEL = 6089, |
| 1116 | CapabilityOptNoneINTEL = 6094, | 1197 | CapabilityOptNoneINTEL = 6094, |
| 1117 | CapabilityAtomicFloat16AddEXT = 6095, | 1198 | CapabilityAtomicFloat16AddEXT = 6095, |
| 1118 | CapabilityDebugInfoModuleINTEL = 6114, | 1199 | CapabilityDebugInfoModuleINTEL = 6114, |
| 1200 | + CapabilityBFloat16ConversionINTEL = 6115, | ||
| 1119 | CapabilitySplitBarrierINTEL = 6141, | 1201 | CapabilitySplitBarrierINTEL = 6141, |
| 1202 | + CapabilityFPGAClusterAttributesV2INTEL = 6150, | ||
| 1203 | + CapabilityFPGAKernelAttributesv2INTEL = 6161, | ||
| 1204 | + CapabilityFPMaxErrorINTEL = 6169, | ||
| 1205 | + CapabilityFPGALatencyControlINTEL = 6171, | ||
| 1206 | + CapabilityFPGAArgumentInterfacesINTEL = 6174, | ||
| 1207 | + CapabilityGlobalVariableHostAccessINTEL = 6187, | ||
| 1208 | + CapabilityGlobalVariableFPGADecorationsINTEL = 6189, | ||
| 1120 | CapabilityGroupUniformArithmeticKHR = 6400, | 1209 | CapabilityGroupUniformArithmeticKHR = 6400, |
| 1210 | + CapabilityCacheControlsINTEL = 6441, | ||
| 1121 | CapabilityMax = 0x7fffffff, | 1211 | CapabilityMax = 0x7fffffff, |
| 1122 | }; | 1212 | }; |
| 1123 | 1213 | ||
| @@ -1224,6 +1314,68 @@ enum PackedVectorFormat { | |||
| 1224 | PackedVectorFormatMax = 0x7fffffff, | 1314 | PackedVectorFormatMax = 0x7fffffff, |
| 1225 | }; | 1315 | }; |
| 1226 | 1316 | ||
| 1317 | +enum CooperativeMatrixOperandsShift { | ||
| 1318 | + CooperativeMatrixOperandsMatrixASignedComponentsKHRShift = 0, | ||
| 1319 | + CooperativeMatrixOperandsMatrixBSignedComponentsKHRShift = 1, | ||
| 1320 | + CooperativeMatrixOperandsMatrixCSignedComponentsKHRShift = 2, | ||
| 1321 | + CooperativeMatrixOperandsMatrixResultSignedComponentsKHRShift = 3, | ||
| 1322 | + CooperativeMatrixOperandsSaturatingAccumulationKHRShift = 4, | ||
| 1323 | + CooperativeMatrixOperandsMax = 0x7fffffff, | ||
| 1324 | +}; | ||
| 1325 | + | ||
| 1326 | +enum CooperativeMatrixOperandsMask { | ||
| 1327 | + CooperativeMatrixOperandsMaskNone = 0, | ||
| 1328 | + CooperativeMatrixOperandsMatrixASignedComponentsKHRMask = 0x00000001, | ||
| 1329 | + CooperativeMatrixOperandsMatrixBSignedComponentsKHRMask = 0x00000002, | ||
| 1330 | + CooperativeMatrixOperandsMatrixCSignedComponentsKHRMask = 0x00000004, | ||
| 1331 | + CooperativeMatrixOperandsMatrixResultSignedComponentsKHRMask = 0x00000008, | ||
| 1332 | + CooperativeMatrixOperandsSaturatingAccumulationKHRMask = 0x00000010, | ||
| 1333 | +}; | ||
| 1334 | + | ||
| 1335 | +enum CooperativeMatrixLayout { | ||
| 1336 | + CooperativeMatrixLayoutRowMajorKHR = 0, | ||
| 1337 | + CooperativeMatrixLayoutColumnMajorKHR = 1, | ||
| 1338 | + CooperativeMatrixLayoutMax = 0x7fffffff, | ||
| 1339 | +}; | ||
| 1340 | + | ||
| 1341 | +enum CooperativeMatrixUse { | ||
| 1342 | + CooperativeMatrixUseMatrixAKHR = 0, | ||
| 1343 | + CooperativeMatrixUseMatrixBKHR = 1, | ||
| 1344 | + CooperativeMatrixUseMatrixAccumulatorKHR = 2, | ||
| 1345 | + CooperativeMatrixUseMax = 0x7fffffff, | ||
| 1346 | +}; | ||
| 1347 | + | ||
| 1348 | +enum InitializationModeQualifier { | ||
| 1349 | + InitializationModeQualifierInitOnDeviceReprogramINTEL = 0, | ||
| 1350 | + InitializationModeQualifierInitOnDeviceResetINTEL = 1, | ||
| 1351 | + InitializationModeQualifierMax = 0x7fffffff, | ||
| 1352 | +}; | ||
| 1353 | + | ||
| 1354 | +enum HostAccessQualifier { | ||
| 1355 | + HostAccessQualifierNoneINTEL = 0, | ||
| 1356 | + HostAccessQualifierReadINTEL = 1, | ||
| 1357 | + HostAccessQualifierWriteINTEL = 2, | ||
| 1358 | + HostAccessQualifierReadWriteINTEL = 3, | ||
| 1359 | + HostAccessQualifierMax = 0x7fffffff, | ||
| 1360 | +}; | ||
| 1361 | + | ||
| 1362 | +enum LoadCacheControl { | ||
| 1363 | + LoadCacheControlUncachedINTEL = 0, | ||
| 1364 | + LoadCacheControlCachedINTEL = 1, | ||
| 1365 | + LoadCacheControlStreamingINTEL = 2, | ||
| 1366 | + LoadCacheControlInvalidateAfterReadINTEL = 3, | ||
| 1367 | + LoadCacheControlConstCachedINTEL = 4, | ||
| 1368 | + LoadCacheControlMax = 0x7fffffff, | ||
| 1369 | +}; | ||
| 1370 | + | ||
| 1371 | +enum StoreCacheControl { | ||
| 1372 | + StoreCacheControlUncachedINTEL = 0, | ||
| 1373 | + StoreCacheControlWriteThroughINTEL = 1, | ||
| 1374 | + StoreCacheControlWriteBackINTEL = 2, | ||
| 1375 | + StoreCacheControlStreamingINTEL = 3, | ||
| 1376 | + StoreCacheControlMax = 0x7fffffff, | ||
| 1377 | +}; | ||
| 1378 | + | ||
| 1227 | enum Op { | 1379 | enum Op { |
| 1228 | OpNop = 0, | 1380 | OpNop = 0, |
| 1229 | OpUndef = 1, | 1381 | OpUndef = 1, |
| @@ -1569,6 +1721,9 @@ enum Op { | |||
| 1569 | OpPtrEqual = 401, | 1721 | OpPtrEqual = 401, |
| 1570 | OpPtrNotEqual = 402, | 1722 | OpPtrNotEqual = 402, |
| 1571 | OpPtrDiff = 403, | 1723 | OpPtrDiff = 403, |
| 1724 | + OpColorAttachmentReadEXT = 4160, | ||
| 1725 | + OpDepthAttachmentReadEXT = 4161, | ||
| 1726 | + OpStencilAttachmentReadEXT = 4162, | ||
| 1572 | OpTerminateInvocation = 4416, | 1727 | OpTerminateInvocation = 4416, |
| 1573 | OpSubgroupBallotKHR = 4421, | 1728 | OpSubgroupBallotKHR = 4421, |
| 1574 | OpSubgroupFirstInvocationKHR = 4422, | 1729 | OpSubgroupFirstInvocationKHR = 4422, |
| @@ -1594,6 +1749,11 @@ enum Op { | |||
| 1594 | OpUDotAccSatKHR = 4454, | 1749 | OpUDotAccSatKHR = 4454, |
| 1595 | OpSUDotAccSat = 4455, | 1750 | OpSUDotAccSat = 4455, |
| 1596 | OpSUDotAccSatKHR = 4455, | 1751 | OpSUDotAccSatKHR = 4455, |
| 1752 | + OpTypeCooperativeMatrixKHR = 4456, | ||
| 1753 | + OpCooperativeMatrixLoadKHR = 4457, | ||
| 1754 | + OpCooperativeMatrixStoreKHR = 4458, | ||
| 1755 | + OpCooperativeMatrixMulAddKHR = 4459, | ||
| 1756 | + OpCooperativeMatrixLengthKHR = 4460, | ||
| 1597 | OpTypeRayQueryKHR = 4472, | 1757 | OpTypeRayQueryKHR = 4472, |
| 1598 | OpRayQueryInitializeKHR = 4473, | 1758 | OpRayQueryInitializeKHR = 4473, |
| 1599 | OpRayQueryTerminateKHR = 4474, | 1759 | OpRayQueryTerminateKHR = 4474, |
| @@ -1601,6 +1761,10 @@ enum Op { | |||
| 1601 | OpRayQueryConfirmIntersectionKHR = 4476, | 1761 | OpRayQueryConfirmIntersectionKHR = 4476, |
| 1602 | OpRayQueryProceedKHR = 4477, | 1762 | OpRayQueryProceedKHR = 4477, |
| 1603 | OpRayQueryGetIntersectionTypeKHR = 4479, | 1763 | OpRayQueryGetIntersectionTypeKHR = 4479, |
| 1764 | + OpImageSampleWeightedQCOM = 4480, | ||
| 1765 | + OpImageBoxFilterQCOM = 4481, | ||
| 1766 | + OpImageBlockMatchSSDQCOM = 4482, | ||
| 1767 | + OpImageBlockMatchSADQCOM = 4483, | ||
| 1604 | OpGroupIAddNonUniformAMD = 5000, | 1768 | OpGroupIAddNonUniformAMD = 5000, |
| 1605 | OpGroupFAddNonUniformAMD = 5001, | 1769 | OpGroupFAddNonUniformAMD = 5001, |
| 1606 | OpGroupFMinNonUniformAMD = 5002, | 1770 | OpGroupFMinNonUniformAMD = 5002, |
| @@ -1612,11 +1776,49 @@ enum Op { | |||
| 1612 | OpFragmentMaskFetchAMD = 5011, | 1776 | OpFragmentMaskFetchAMD = 5011, |
| 1613 | OpFragmentFetchAMD = 5012, | 1777 | OpFragmentFetchAMD = 5012, |
| 1614 | OpReadClockKHR = 5056, | 1778 | OpReadClockKHR = 5056, |
| 1779 | + OpFinalizeNodePayloadsAMDX = 5075, | ||
| 1780 | + OpFinishWritingNodePayloadAMDX = 5078, | ||
| 1781 | + OpInitializeNodePayloadsAMDX = 5090, | ||
| 1782 | + OpHitObjectRecordHitMotionNV = 5249, | ||
| 1783 | + OpHitObjectRecordHitWithIndexMotionNV = 5250, | ||
| 1784 | + OpHitObjectRecordMissMotionNV = 5251, | ||
| 1785 | + OpHitObjectGetWorldToObjectNV = 5252, | ||
| 1786 | + OpHitObjectGetObjectToWorldNV = 5253, | ||
| 1787 | + OpHitObjectGetObjectRayDirectionNV = 5254, | ||
| 1788 | + OpHitObjectGetObjectRayOriginNV = 5255, | ||
| 1789 | + OpHitObjectTraceRayMotionNV = 5256, | ||
| 1790 | + OpHitObjectGetShaderRecordBufferHandleNV = 5257, | ||
| 1791 | + OpHitObjectGetShaderBindingTableRecordIndexNV = 5258, | ||
| 1792 | + OpHitObjectRecordEmptyNV = 5259, | ||
| 1793 | + OpHitObjectTraceRayNV = 5260, | ||
| 1794 | + OpHitObjectRecordHitNV = 5261, | ||
| 1795 | + OpHitObjectRecordHitWithIndexNV = 5262, | ||
| 1796 | + OpHitObjectRecordMissNV = 5263, | ||
| 1797 | + OpHitObjectExecuteShaderNV = 5264, | ||
| 1798 | + OpHitObjectGetCurrentTimeNV = 5265, | ||
| 1799 | + OpHitObjectGetAttributesNV = 5266, | ||
| 1800 | + OpHitObjectGetHitKindNV = 5267, | ||
| 1801 | + OpHitObjectGetPrimitiveIndexNV = 5268, | ||
| 1802 | + OpHitObjectGetGeometryIndexNV = 5269, | ||
| 1803 | + OpHitObjectGetInstanceIdNV = 5270, | ||
| 1804 | + OpHitObjectGetInstanceCustomIndexNV = 5271, | ||
| 1805 | + OpHitObjectGetWorldRayDirectionNV = 5272, | ||
| 1806 | + OpHitObjectGetWorldRayOriginNV = 5273, | ||
| 1807 | + OpHitObjectGetRayTMaxNV = 5274, | ||
| 1808 | + OpHitObjectGetRayTMinNV = 5275, | ||
| 1809 | + OpHitObjectIsEmptyNV = 5276, | ||
| 1810 | + OpHitObjectIsHitNV = 5277, | ||
| 1811 | + OpHitObjectIsMissNV = 5278, | ||
| 1812 | + OpReorderThreadWithHitObjectNV = 5279, | ||
| 1813 | + OpReorderThreadWithHintNV = 5280, | ||
| 1814 | + OpTypeHitObjectNV = 5281, | ||
| 1615 | OpImageSampleFootprintNV = 5283, | 1815 | OpImageSampleFootprintNV = 5283, |
| 1616 | OpEmitMeshTasksEXT = 5294, | 1816 | OpEmitMeshTasksEXT = 5294, |
| 1617 | OpSetMeshOutputsEXT = 5295, | 1817 | OpSetMeshOutputsEXT = 5295, |
| 1618 | OpGroupNonUniformPartitionNV = 5296, | 1818 | OpGroupNonUniformPartitionNV = 5296, |
| 1619 | OpWritePackedPrimitiveIndices4x8NV = 5299, | 1819 | OpWritePackedPrimitiveIndices4x8NV = 5299, |
| 1820 | + OpFetchMicroTriangleVertexPositionNV = 5300, | ||
| 1821 | + OpFetchMicroTriangleVertexBarycentricNV = 5301, | ||
| 1620 | OpReportIntersectionKHR = 5334, | 1822 | OpReportIntersectionKHR = 5334, |
| 1621 | OpReportIntersectionNV = 5334, | 1823 | OpReportIntersectionNV = 5334, |
| 1622 | OpIgnoreIntersectionNV = 5335, | 1824 | OpIgnoreIntersectionNV = 5335, |
| @@ -1624,6 +1826,7 @@ enum Op { | |||
| 1624 | OpTraceNV = 5337, | 1826 | OpTraceNV = 5337, |
| 1625 | OpTraceMotionNV = 5338, | 1827 | OpTraceMotionNV = 5338, |
| 1626 | OpTraceRayMotionNV = 5339, | 1828 | OpTraceRayMotionNV = 5339, |
| 1829 | + OpRayQueryGetIntersectionTriangleVertexPositionsKHR = 5340, | ||
| 1627 | OpTypeAccelerationStructureKHR = 5341, | 1830 | OpTypeAccelerationStructureKHR = 5341, |
| 1628 | OpTypeAccelerationStructureNV = 5341, | 1831 | OpTypeAccelerationStructureNV = 5341, |
| 1629 | OpExecuteCallableNV = 5344, | 1832 | OpExecuteCallableNV = 5344, |
| @@ -1885,6 +2088,9 @@ enum Op { | |||
| 1885 | OpTypeStructContinuedINTEL = 6090, | 2088 | OpTypeStructContinuedINTEL = 6090, |
| 1886 | OpConstantCompositeContinuedINTEL = 6091, | 2089 | OpConstantCompositeContinuedINTEL = 6091, |
| 1887 | OpSpecConstantCompositeContinuedINTEL = 6092, | 2090 | OpSpecConstantCompositeContinuedINTEL = 6092, |
| 2091 | + OpCompositeConstructContinuedINTEL = 6096, | ||
| 2092 | + OpConvertFToBF16INTEL = 6116, | ||
| 2093 | + OpConvertBF16ToFINTEL = 6117, | ||
| 1888 | OpControlBarrierArriveINTEL = 6142, | 2094 | OpControlBarrierArriveINTEL = 6142, |
| 1889 | OpControlBarrierWaitINTEL = 6143, | 2095 | OpControlBarrierWaitINTEL = 6143, |
| 1890 | OpGroupIMulKHR = 6401, | 2096 | OpGroupIMulKHR = 6401, |
| @@ -2250,6 +2456,9 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2250 | case OpPtrEqual: *hasResult = true; *hasResultType = true; break; | 2456 | case OpPtrEqual: *hasResult = true; *hasResultType = true; break; |
| 2251 | case OpPtrNotEqual: *hasResult = true; *hasResultType = true; break; | 2457 | case OpPtrNotEqual: *hasResult = true; *hasResultType = true; break; |
| 2252 | case OpPtrDiff: *hasResult = true; *hasResultType = true; break; | 2458 | case OpPtrDiff: *hasResult = true; *hasResultType = true; break; |
| 2459 | + case OpColorAttachmentReadEXT: *hasResult = true; *hasResultType = true; break; | ||
| 2460 | + case OpDepthAttachmentReadEXT: *hasResult = true; *hasResultType = true; break; | ||
| 2461 | + case OpStencilAttachmentReadEXT: *hasResult = true; *hasResultType = true; break; | ||
| 2253 | case OpTerminateInvocation: *hasResult = false; *hasResultType = false; break; | 2462 | case OpTerminateInvocation: *hasResult = false; *hasResultType = false; break; |
| 2254 | case OpSubgroupBallotKHR: *hasResult = true; *hasResultType = true; break; | 2463 | case OpSubgroupBallotKHR: *hasResult = true; *hasResultType = true; break; |
| 2255 | case OpSubgroupFirstInvocationKHR: *hasResult = true; *hasResultType = true; break; | 2464 | case OpSubgroupFirstInvocationKHR: *hasResult = true; *hasResultType = true; break; |
| @@ -2269,6 +2478,11 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2269 | case OpSDotAccSat: *hasResult = true; *hasResultType = true; break; | 2478 | case OpSDotAccSat: *hasResult = true; *hasResultType = true; break; |
| 2270 | case OpUDotAccSat: *hasResult = true; *hasResultType = true; break; | 2479 | case OpUDotAccSat: *hasResult = true; *hasResultType = true; break; |
| 2271 | case OpSUDotAccSat: *hasResult = true; *hasResultType = true; break; | 2480 | case OpSUDotAccSat: *hasResult = true; *hasResultType = true; break; |
| 2481 | + case OpTypeCooperativeMatrixKHR: *hasResult = true; *hasResultType = false; break; | ||
| 2482 | + case OpCooperativeMatrixLoadKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2483 | + case OpCooperativeMatrixStoreKHR: *hasResult = false; *hasResultType = false; break; | ||
| 2484 | + case OpCooperativeMatrixMulAddKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2485 | + case OpCooperativeMatrixLengthKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2272 | case OpTypeRayQueryKHR: *hasResult = true; *hasResultType = false; break; | 2486 | case OpTypeRayQueryKHR: *hasResult = true; *hasResultType = false; break; |
| 2273 | case OpRayQueryInitializeKHR: *hasResult = false; *hasResultType = false; break; | 2487 | case OpRayQueryInitializeKHR: *hasResult = false; *hasResultType = false; break; |
| 2274 | case OpRayQueryTerminateKHR: *hasResult = false; *hasResultType = false; break; | 2488 | case OpRayQueryTerminateKHR: *hasResult = false; *hasResultType = false; break; |
| @@ -2276,6 +2490,10 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2276 | case OpRayQueryConfirmIntersectionKHR: *hasResult = false; *hasResultType = false; break; | 2490 | case OpRayQueryConfirmIntersectionKHR: *hasResult = false; *hasResultType = false; break; |
| 2277 | case OpRayQueryProceedKHR: *hasResult = true; *hasResultType = true; break; | 2491 | case OpRayQueryProceedKHR: *hasResult = true; *hasResultType = true; break; |
| 2278 | case OpRayQueryGetIntersectionTypeKHR: *hasResult = true; *hasResultType = true; break; | 2492 | case OpRayQueryGetIntersectionTypeKHR: *hasResult = true; *hasResultType = true; break; |
| 2493 | + case OpImageSampleWeightedQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2494 | + case OpImageBoxFilterQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2495 | + case OpImageBlockMatchSSDQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2496 | + case OpImageBlockMatchSADQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2279 | case OpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; | 2497 | case OpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; |
| 2280 | case OpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; | 2498 | case OpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; |
| 2281 | case OpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break; | 2499 | case OpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break; |
| @@ -2287,17 +2505,56 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2287 | case OpFragmentMaskFetchAMD: *hasResult = true; *hasResultType = true; break; | 2505 | case OpFragmentMaskFetchAMD: *hasResult = true; *hasResultType = true; break; |
| 2288 | case OpFragmentFetchAMD: *hasResult = true; *hasResultType = true; break; | 2506 | case OpFragmentFetchAMD: *hasResult = true; *hasResultType = true; break; |
| 2289 | case OpReadClockKHR: *hasResult = true; *hasResultType = true; break; | 2507 | case OpReadClockKHR: *hasResult = true; *hasResultType = true; break; |
| 2508 | + case OpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; | ||
| 2509 | + case OpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break; | ||
| 2510 | + case OpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; | ||
| 2511 | + case OpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2512 | + case OpHitObjectRecordHitWithIndexMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2513 | + case OpHitObjectRecordMissMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2514 | + case OpHitObjectGetWorldToObjectNV: *hasResult = true; *hasResultType = true; break; | ||
| 2515 | + case OpHitObjectGetObjectToWorldNV: *hasResult = true; *hasResultType = true; break; | ||
| 2516 | + case OpHitObjectGetObjectRayDirectionNV: *hasResult = true; *hasResultType = true; break; | ||
| 2517 | + case OpHitObjectGetObjectRayOriginNV: *hasResult = true; *hasResultType = true; break; | ||
| 2518 | + case OpHitObjectTraceRayMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2519 | + case OpHitObjectGetShaderRecordBufferHandleNV: *hasResult = true; *hasResultType = true; break; | ||
| 2520 | + case OpHitObjectGetShaderBindingTableRecordIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2521 | + case OpHitObjectRecordEmptyNV: *hasResult = false; *hasResultType = false; break; | ||
| 2522 | + case OpHitObjectTraceRayNV: *hasResult = false; *hasResultType = false; break; | ||
| 2523 | + case OpHitObjectRecordHitNV: *hasResult = false; *hasResultType = false; break; | ||
| 2524 | + case OpHitObjectRecordHitWithIndexNV: *hasResult = false; *hasResultType = false; break; | ||
| 2525 | + case OpHitObjectRecordMissNV: *hasResult = false; *hasResultType = false; break; | ||
| 2526 | + case OpHitObjectExecuteShaderNV: *hasResult = false; *hasResultType = false; break; | ||
| 2527 | + case OpHitObjectGetCurrentTimeNV: *hasResult = true; *hasResultType = true; break; | ||
| 2528 | + case OpHitObjectGetAttributesNV: *hasResult = false; *hasResultType = false; break; | ||
| 2529 | + case OpHitObjectGetHitKindNV: *hasResult = true; *hasResultType = true; break; | ||
| 2530 | + case OpHitObjectGetPrimitiveIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2531 | + case OpHitObjectGetGeometryIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2532 | + case OpHitObjectGetInstanceIdNV: *hasResult = true; *hasResultType = true; break; | ||
| 2533 | + case OpHitObjectGetInstanceCustomIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2534 | + case OpHitObjectGetWorldRayDirectionNV: *hasResult = true; *hasResultType = true; break; | ||
| 2535 | + case OpHitObjectGetWorldRayOriginNV: *hasResult = true; *hasResultType = true; break; | ||
| 2536 | + case OpHitObjectGetRayTMaxNV: *hasResult = true; *hasResultType = true; break; | ||
| 2537 | + case OpHitObjectGetRayTMinNV: *hasResult = true; *hasResultType = true; break; | ||
| 2538 | + case OpHitObjectIsEmptyNV: *hasResult = true; *hasResultType = true; break; | ||
| 2539 | + case OpHitObjectIsHitNV: *hasResult = true; *hasResultType = true; break; | ||
| 2540 | + case OpHitObjectIsMissNV: *hasResult = true; *hasResultType = true; break; | ||
| 2541 | + case OpReorderThreadWithHitObjectNV: *hasResult = false; *hasResultType = false; break; | ||
| 2542 | + case OpReorderThreadWithHintNV: *hasResult = false; *hasResultType = false; break; | ||
| 2543 | + case OpTypeHitObjectNV: *hasResult = true; *hasResultType = false; break; | ||
| 2290 | case OpImageSampleFootprintNV: *hasResult = true; *hasResultType = true; break; | 2544 | case OpImageSampleFootprintNV: *hasResult = true; *hasResultType = true; break; |
| 2291 | case OpEmitMeshTasksEXT: *hasResult = false; *hasResultType = false; break; | 2545 | case OpEmitMeshTasksEXT: *hasResult = false; *hasResultType = false; break; |
| 2292 | case OpSetMeshOutputsEXT: *hasResult = false; *hasResultType = false; break; | 2546 | case OpSetMeshOutputsEXT: *hasResult = false; *hasResultType = false; break; |
| 2293 | case OpGroupNonUniformPartitionNV: *hasResult = true; *hasResultType = true; break; | 2547 | case OpGroupNonUniformPartitionNV: *hasResult = true; *hasResultType = true; break; |
| 2294 | case OpWritePackedPrimitiveIndices4x8NV: *hasResult = false; *hasResultType = false; break; | 2548 | case OpWritePackedPrimitiveIndices4x8NV: *hasResult = false; *hasResultType = false; break; |
| 2549 | + case OpFetchMicroTriangleVertexPositionNV: *hasResult = true; *hasResultType = true; break; | ||
| 2550 | + case OpFetchMicroTriangleVertexBarycentricNV: *hasResult = true; *hasResultType = true; break; | ||
| 2295 | case OpReportIntersectionNV: *hasResult = true; *hasResultType = true; break; | 2551 | case OpReportIntersectionNV: *hasResult = true; *hasResultType = true; break; |
| 2296 | case OpIgnoreIntersectionNV: *hasResult = false; *hasResultType = false; break; | 2552 | case OpIgnoreIntersectionNV: *hasResult = false; *hasResultType = false; break; |
| 2297 | case OpTerminateRayNV: *hasResult = false; *hasResultType = false; break; | 2553 | case OpTerminateRayNV: *hasResult = false; *hasResultType = false; break; |
| 2298 | case OpTraceNV: *hasResult = false; *hasResultType = false; break; | 2554 | case OpTraceNV: *hasResult = false; *hasResultType = false; break; |
| 2299 | case OpTraceMotionNV: *hasResult = false; *hasResultType = false; break; | 2555 | case OpTraceMotionNV: *hasResult = false; *hasResultType = false; break; |
| 2300 | case OpTraceRayMotionNV: *hasResult = false; *hasResultType = false; break; | 2556 | case OpTraceRayMotionNV: *hasResult = false; *hasResultType = false; break; |
| 2557 | + case OpRayQueryGetIntersectionTriangleVertexPositionsKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2301 | case OpTypeAccelerationStructureNV: *hasResult = true; *hasResultType = false; break; | 2558 | case OpTypeAccelerationStructureNV: *hasResult = true; *hasResultType = false; break; |
| 2302 | case OpExecuteCallableNV: *hasResult = false; *hasResultType = false; break; | 2559 | case OpExecuteCallableNV: *hasResult = false; *hasResultType = false; break; |
| 2303 | case OpTypeCooperativeMatrixNV: *hasResult = true; *hasResultType = false; break; | 2560 | case OpTypeCooperativeMatrixNV: *hasResult = true; *hasResultType = false; break; |
| @@ -2555,6 +2812,9 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2555 | case OpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break; | 2812 | case OpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break; |
| 2556 | case OpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; | 2813 | case OpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; |
| 2557 | case OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; | 2814 | case OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; |
| 2815 | + case OpCompositeConstructContinuedINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 2816 | + case OpConvertFToBF16INTEL: *hasResult = true; *hasResultType = true; break; | ||
| 2817 | + case OpConvertBF16ToFINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 2558 | case OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break; | 2818 | case OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break; |
| 2559 | case OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break; | 2819 | case OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break; |
| 2560 | case OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break; | 2820 | case OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break; |
| @@ -2569,18 +2829,52 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2569 | } | 2829 | } |
| 2570 | 2830 | ||
| 2571 | 2831 | ||
| 2572 | -// Overload operator| for mask bit combining | 2832 | +// Overload bitwise operators for mask bit combining |
| 2573 | 2833 | ||
| 2574 | inline ImageOperandsMask operator|(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) | unsigned(b)); } | 2834 | inline ImageOperandsMask operator|(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) | unsigned(b)); } |
| 2835 | +inline ImageOperandsMask operator&(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) & unsigned(b)); } | ||
| 2836 | +inline ImageOperandsMask operator^(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) ^ unsigned(b)); } | ||
| 2837 | +inline ImageOperandsMask operator~(ImageOperandsMask a) { return ImageOperandsMask(~unsigned(a)); } | ||
| 2575 | inline FPFastMathModeMask operator|(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) | unsigned(b)); } | 2838 | inline FPFastMathModeMask operator|(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) | unsigned(b)); } |
| 2839 | +inline FPFastMathModeMask operator&(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) & unsigned(b)); } | ||
| 2840 | +inline FPFastMathModeMask operator^(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) ^ unsigned(b)); } | ||
| 2841 | +inline FPFastMathModeMask operator~(FPFastMathModeMask a) { return FPFastMathModeMask(~unsigned(a)); } | ||
| 2576 | inline SelectionControlMask operator|(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) | unsigned(b)); } | 2842 | inline SelectionControlMask operator|(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) | unsigned(b)); } |
| 2843 | +inline SelectionControlMask operator&(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) & unsigned(b)); } | ||
| 2844 | +inline SelectionControlMask operator^(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) ^ unsigned(b)); } | ||
| 2845 | +inline SelectionControlMask operator~(SelectionControlMask a) { return SelectionControlMask(~unsigned(a)); } | ||
| 2577 | inline LoopControlMask operator|(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) | unsigned(b)); } | 2846 | inline LoopControlMask operator|(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) | unsigned(b)); } |
| 2847 | +inline LoopControlMask operator&(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) & unsigned(b)); } | ||
| 2848 | +inline LoopControlMask operator^(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) ^ unsigned(b)); } | ||
| 2849 | +inline LoopControlMask operator~(LoopControlMask a) { return LoopControlMask(~unsigned(a)); } | ||
| 2578 | inline FunctionControlMask operator|(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) | unsigned(b)); } | 2850 | inline FunctionControlMask operator|(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) | unsigned(b)); } |
| 2851 | +inline FunctionControlMask operator&(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) & unsigned(b)); } | ||
| 2852 | +inline FunctionControlMask operator^(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) ^ unsigned(b)); } | ||
| 2853 | +inline FunctionControlMask operator~(FunctionControlMask a) { return FunctionControlMask(~unsigned(a)); } | ||
| 2579 | inline MemorySemanticsMask operator|(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) | unsigned(b)); } | 2854 | inline MemorySemanticsMask operator|(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) | unsigned(b)); } |
| 2855 | +inline MemorySemanticsMask operator&(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) & unsigned(b)); } | ||
| 2856 | +inline MemorySemanticsMask operator^(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) ^ unsigned(b)); } | ||
| 2857 | +inline MemorySemanticsMask operator~(MemorySemanticsMask a) { return MemorySemanticsMask(~unsigned(a)); } | ||
| 2580 | inline MemoryAccessMask operator|(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) | unsigned(b)); } | 2858 | inline MemoryAccessMask operator|(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) | unsigned(b)); } |
| 2859 | +inline MemoryAccessMask operator&(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) & unsigned(b)); } | ||
| 2860 | +inline MemoryAccessMask operator^(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) ^ unsigned(b)); } | ||
| 2861 | +inline MemoryAccessMask operator~(MemoryAccessMask a) { return MemoryAccessMask(~unsigned(a)); } | ||
| 2581 | inline KernelProfilingInfoMask operator|(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) | unsigned(b)); } | 2862 | inline KernelProfilingInfoMask operator|(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) | unsigned(b)); } |
| 2863 | +inline KernelProfilingInfoMask operator&(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) & unsigned(b)); } | ||
| 2864 | +inline KernelProfilingInfoMask operator^(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) ^ unsigned(b)); } | ||
| 2865 | +inline KernelProfilingInfoMask operator~(KernelProfilingInfoMask a) { return KernelProfilingInfoMask(~unsigned(a)); } | ||
| 2582 | inline RayFlagsMask operator|(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) | unsigned(b)); } | 2866 | inline RayFlagsMask operator|(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) | unsigned(b)); } |
| 2867 | +inline RayFlagsMask operator&(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) & unsigned(b)); } | ||
| 2868 | +inline RayFlagsMask operator^(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) ^ unsigned(b)); } | ||
| 2869 | +inline RayFlagsMask operator~(RayFlagsMask a) { return RayFlagsMask(~unsigned(a)); } | ||
| 2583 | inline FragmentShadingRateMask operator|(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) | unsigned(b)); } | 2870 | inline FragmentShadingRateMask operator|(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) | unsigned(b)); } |
| 2871 | +inline FragmentShadingRateMask operator&(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) & unsigned(b)); } | ||
| 2872 | +inline FragmentShadingRateMask operator^(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) ^ unsigned(b)); } | ||
| 2873 | +inline FragmentShadingRateMask operator~(FragmentShadingRateMask a) { return FragmentShadingRateMask(~unsigned(a)); } | ||
| 2874 | +inline CooperativeMatrixOperandsMask operator|(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) | unsigned(b)); } | ||
| 2875 | +inline CooperativeMatrixOperandsMask operator&(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) & unsigned(b)); } | ||
| 2876 | +inline CooperativeMatrixOperandsMask operator^(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) ^ unsigned(b)); } | ||
| 2877 | +inline CooperativeMatrixOperandsMask operator~(CooperativeMatrixOperandsMask a) { return CooperativeMatrixOperandsMask(~unsigned(a)); } | ||
| 2584 | 2878 | ||
| 2585 | } // end namespace spv | 2879 | } // end namespace spv |
| 2586 | 2880 | ||
| @@ -69,6 +69,10 @@ enum class SourceLanguage : unsigned { | |||
| 69 | HLSL = 5, | 69 | HLSL = 5, |
| 70 | CPP_for_OpenCL = 6, | 70 | CPP_for_OpenCL = 6, |
| 71 | SYCL = 7, | 71 | SYCL = 7, |
| 72 | + HERO_C = 8, | ||
| 73 | + NZSL = 9, | ||
| 74 | + WGSL = 10, | ||
| 75 | + Slang = 11, | ||
| 72 | Max = 0x7fffffff, | 76 | Max = 0x7fffffff, |
| 73 | }; | 77 | }; |
| 74 | 78 | ||
| @@ -156,6 +160,9 @@ enum class ExecutionMode : unsigned { | |||
| 156 | SubgroupsPerWorkgroupId = 37, | 160 | SubgroupsPerWorkgroupId = 37, |
| 157 | LocalSizeId = 38, | 161 | LocalSizeId = 38, |
| 158 | LocalSizeHintId = 39, | 162 | LocalSizeHintId = 39, |
| 163 | + NonCoherentColorAttachmentReadEXT = 4169, | ||
| 164 | + NonCoherentDepthAttachmentReadEXT = 4170, | ||
| 165 | + NonCoherentStencilAttachmentReadEXT = 4171, | ||
| 159 | SubgroupUniformControlFlowKHR = 4421, | 166 | SubgroupUniformControlFlowKHR = 4421, |
| 160 | PostDepthCoverage = 4446, | 167 | PostDepthCoverage = 4446, |
| 161 | DenormPreserve = 4459, | 168 | DenormPreserve = 4459, |
| @@ -165,6 +172,11 @@ enum class ExecutionMode : unsigned { | |||
| 165 | RoundingModeRTZ = 4463, | 172 | RoundingModeRTZ = 4463, |
| 166 | EarlyAndLateFragmentTestsAMD = 5017, | 173 | EarlyAndLateFragmentTestsAMD = 5017, |
| 167 | StencilRefReplacingEXT = 5027, | 174 | StencilRefReplacingEXT = 5027, |
| 175 | + CoalescingAMDX = 5069, | ||
| 176 | + MaxNodeRecursionAMDX = 5071, | ||
| 177 | + StaticNumWorkgroupsAMDX = 5072, | ||
| 178 | + ShaderIndexAMDX = 5073, | ||
| 179 | + MaxNumWorkgroupsAMDX = 5077, | ||
| 168 | StencilRefUnchangedFrontAMD = 5079, | 180 | StencilRefUnchangedFrontAMD = 5079, |
| 169 | StencilRefGreaterFrontAMD = 5080, | 181 | StencilRefGreaterFrontAMD = 5080, |
| 170 | StencilRefLessFrontAMD = 5081, | 182 | StencilRefLessFrontAMD = 5081, |
| @@ -195,6 +207,8 @@ enum class ExecutionMode : unsigned { | |||
| 195 | NoGlobalOffsetINTEL = 5895, | 207 | NoGlobalOffsetINTEL = 5895, |
| 196 | NumSIMDWorkitemsINTEL = 5896, | 208 | NumSIMDWorkitemsINTEL = 5896, |
| 197 | SchedulerTargetFmaxMhzINTEL = 5903, | 209 | SchedulerTargetFmaxMhzINTEL = 5903, |
| 210 | + StreamingInterfaceINTEL = 6154, | ||
| 211 | + RegisterMapInterfaceINTEL = 6160, | ||
| 198 | NamedBarrierCountINTEL = 6417, | 212 | NamedBarrierCountINTEL = 6417, |
| 199 | Max = 0x7fffffff, | 213 | Max = 0x7fffffff, |
| 200 | }; | 214 | }; |
| @@ -213,6 +227,9 @@ enum class StorageClass : unsigned { | |||
| 213 | AtomicCounter = 10, | 227 | AtomicCounter = 10, |
| 214 | Image = 11, | 228 | Image = 11, |
| 215 | StorageBuffer = 12, | 229 | StorageBuffer = 12, |
| 230 | + TileImageEXT = 4172, | ||
| 231 | + NodePayloadAMDX = 5068, | ||
| 232 | + NodeOutputPayloadAMDX = 5076, | ||
| 216 | CallableDataKHR = 5328, | 233 | CallableDataKHR = 5328, |
| 217 | CallableDataNV = 5328, | 234 | CallableDataNV = 5328, |
| 218 | IncomingCallableDataKHR = 5329, | 235 | IncomingCallableDataKHR = 5329, |
| @@ -227,6 +244,7 @@ enum class StorageClass : unsigned { | |||
| 227 | ShaderRecordBufferNV = 5343, | 244 | ShaderRecordBufferNV = 5343, |
| 228 | PhysicalStorageBuffer = 5349, | 245 | PhysicalStorageBuffer = 5349, |
| 229 | PhysicalStorageBufferEXT = 5349, | 246 | PhysicalStorageBufferEXT = 5349, |
| 247 | + HitObjectAttributeNV = 5385, | ||
| 230 | TaskPayloadWorkgroupEXT = 5402, | 248 | TaskPayloadWorkgroupEXT = 5402, |
| 231 | CodeSectionINTEL = 5605, | 249 | CodeSectionINTEL = 5605, |
| 232 | DeviceOnlyINTEL = 5936, | 250 | DeviceOnlyINTEL = 5936, |
| @@ -242,6 +260,7 @@ enum class Dim : unsigned { | |||
| 242 | Rect = 4, | 260 | Rect = 4, |
| 243 | Buffer = 5, | 261 | Buffer = 5, |
| 244 | SubpassData = 6, | 262 | SubpassData = 6, |
| 263 | + TileImageDataEXT = 4173, | ||
| 245 | Max = 0x7fffffff, | 264 | Max = 0x7fffffff, |
| 246 | }; | 265 | }; |
| 247 | 266 | ||
| @@ -348,6 +367,8 @@ enum class ImageChannelDataType : unsigned { | |||
| 348 | Float = 14, | 367 | Float = 14, |
| 349 | UnormInt24 = 15, | 368 | UnormInt24 = 15, |
| 350 | UnormInt101010_2 = 16, | 369 | UnormInt101010_2 = 16, |
| 370 | + UnsignedIntRaw10EXT = 19, | ||
| 371 | + UnsignedIntRaw12EXT = 20, | ||
| 351 | Max = 0x7fffffff, | 372 | Max = 0x7fffffff, |
| 352 | }; | 373 | }; |
| 353 | 374 | ||
| @@ -452,6 +473,7 @@ enum class FunctionParameterAttribute : unsigned { | |||
| 452 | NoCapture = 5, | 473 | NoCapture = 5, |
| 453 | NoWrite = 6, | 474 | NoWrite = 6, |
| 454 | NoReadWrite = 7, | 475 | NoReadWrite = 7, |
| 476 | + RuntimeAlignedINTEL = 5940, | ||
| 455 | Max = 0x7fffffff, | 477 | Max = 0x7fffffff, |
| 456 | }; | 478 | }; |
| 457 | 479 | ||
| @@ -505,7 +527,13 @@ enum class Decoration : unsigned { | |||
| 505 | MaxByteOffsetId = 47, | 527 | MaxByteOffsetId = 47, |
| 506 | NoSignedWrap = 4469, | 528 | NoSignedWrap = 4469, |
| 507 | NoUnsignedWrap = 4470, | 529 | NoUnsignedWrap = 4470, |
| 530 | + WeightTextureQCOM = 4487, | ||
| 531 | + BlockMatchTextureQCOM = 4488, | ||
| 508 | ExplicitInterpAMD = 4999, | 532 | ExplicitInterpAMD = 4999, |
| 533 | + NodeSharesPayloadLimitsWithAMDX = 5019, | ||
| 534 | + NodeMaxPayloadsAMDX = 5020, | ||
| 535 | + TrackFinishWritingAMDX = 5078, | ||
| 536 | + PayloadNodeNameAMDX = 5091, | ||
| 509 | OverrideCoverageNV = 5248, | 537 | OverrideCoverageNV = 5248, |
| 510 | PassthroughNV = 5250, | 538 | PassthroughNV = 5250, |
| 511 | ViewportRelativeNV = 5252, | 539 | ViewportRelativeNV = 5252, |
| @@ -522,6 +550,7 @@ enum class Decoration : unsigned { | |||
| 522 | RestrictPointerEXT = 5355, | 550 | RestrictPointerEXT = 5355, |
| 523 | AliasedPointer = 5356, | 551 | AliasedPointer = 5356, |
| 524 | AliasedPointerEXT = 5356, | 552 | AliasedPointerEXT = 5356, |
| 553 | + HitObjectShaderRecordBufferNV = 5386, | ||
| 525 | BindlessSamplerNV = 5398, | 554 | BindlessSamplerNV = 5398, |
| 526 | BindlessImageNV = 5399, | 555 | BindlessImageNV = 5399, |
| 527 | BoundSamplerNV = 5400, | 556 | BoundSamplerNV = 5400, |
| @@ -554,20 +583,45 @@ enum class Decoration : unsigned { | |||
| 554 | MergeINTEL = 5834, | 583 | MergeINTEL = 5834, |
| 555 | BankBitsINTEL = 5835, | 584 | BankBitsINTEL = 5835, |
| 556 | ForcePow2DepthINTEL = 5836, | 585 | ForcePow2DepthINTEL = 5836, |
| 586 | + StridesizeINTEL = 5883, | ||
| 587 | + WordsizeINTEL = 5884, | ||
| 588 | + TrueDualPortINTEL = 5885, | ||
| 557 | BurstCoalesceINTEL = 5899, | 589 | BurstCoalesceINTEL = 5899, |
| 558 | CacheSizeINTEL = 5900, | 590 | CacheSizeINTEL = 5900, |
| 559 | DontStaticallyCoalesceINTEL = 5901, | 591 | DontStaticallyCoalesceINTEL = 5901, |
| 560 | PrefetchINTEL = 5902, | 592 | PrefetchINTEL = 5902, |
| 561 | StallEnableINTEL = 5905, | 593 | StallEnableINTEL = 5905, |
| 562 | FuseLoopsInFunctionINTEL = 5907, | 594 | FuseLoopsInFunctionINTEL = 5907, |
| 595 | + MathOpDSPModeINTEL = 5909, | ||
| 563 | AliasScopeINTEL = 5914, | 596 | AliasScopeINTEL = 5914, |
| 564 | NoAliasINTEL = 5915, | 597 | NoAliasINTEL = 5915, |
| 598 | + InitiationIntervalINTEL = 5917, | ||
| 599 | + MaxConcurrencyINTEL = 5918, | ||
| 600 | + PipelineEnableINTEL = 5919, | ||
| 565 | BufferLocationINTEL = 5921, | 601 | BufferLocationINTEL = 5921, |
| 566 | IOPipeStorageINTEL = 5944, | 602 | IOPipeStorageINTEL = 5944, |
| 567 | FunctionFloatingPointModeINTEL = 6080, | 603 | FunctionFloatingPointModeINTEL = 6080, |
| 568 | SingleElementVectorINTEL = 6085, | 604 | SingleElementVectorINTEL = 6085, |
| 569 | VectorComputeCallableFunctionINTEL = 6087, | 605 | VectorComputeCallableFunctionINTEL = 6087, |
| 570 | MediaBlockIOINTEL = 6140, | 606 | MediaBlockIOINTEL = 6140, |
| 607 | + StallFreeINTEL = 6151, | ||
| 608 | + FPMaxErrorDecorationINTEL = 6170, | ||
| 609 | + LatencyControlLabelINTEL = 6172, | ||
| 610 | + LatencyControlConstraintINTEL = 6173, | ||
| 611 | + ConduitKernelArgumentINTEL = 6175, | ||
| 612 | + RegisterMapKernelArgumentINTEL = 6176, | ||
| 613 | + MMHostInterfaceAddressWidthINTEL = 6177, | ||
| 614 | + MMHostInterfaceDataWidthINTEL = 6178, | ||
| 615 | + MMHostInterfaceLatencyINTEL = 6179, | ||
| 616 | + MMHostInterfaceReadWriteModeINTEL = 6180, | ||
| 617 | + MMHostInterfaceMaxBurstINTEL = 6181, | ||
| 618 | + MMHostInterfaceWaitRequestINTEL = 6182, | ||
| 619 | + StableKernelArgumentINTEL = 6183, | ||
| 620 | + HostAccessINTEL = 6188, | ||
| 621 | + InitModeINTEL = 6190, | ||
| 622 | + ImplementInRegisterMapINTEL = 6191, | ||
| 623 | + CacheControlLoadINTEL = 6442, | ||
| 624 | + CacheControlStoreINTEL = 6443, | ||
| 571 | Max = 0x7fffffff, | 625 | Max = 0x7fffffff, |
| 572 | }; | 626 | }; |
| 573 | 627 | ||
| @@ -643,6 +697,8 @@ enum class BuiltIn : unsigned { | |||
| 643 | BaryCoordSmoothSampleAMD = 4997, | 697 | BaryCoordSmoothSampleAMD = 4997, |
| 644 | BaryCoordPullModelAMD = 4998, | 698 | BaryCoordPullModelAMD = 4998, |
| 645 | FragStencilRefEXT = 5014, | 699 | FragStencilRefEXT = 5014, |
| 700 | + CoalescedInputCountAMDX = 5021, | ||
| 701 | + ShaderIndexAMDX = 5073, | ||
| 646 | ViewportMaskNV = 5253, | 702 | ViewportMaskNV = 5253, |
| 647 | SecondaryPositionNV = 5257, | 703 | SecondaryPositionNV = 5257, |
| 648 | SecondaryViewportMaskNV = 5258, | 704 | SecondaryViewportMaskNV = 5258, |
| @@ -695,6 +751,9 @@ enum class BuiltIn : unsigned { | |||
| 695 | HitKindKHR = 5333, | 751 | HitKindKHR = 5333, |
| 696 | HitKindNV = 5333, | 752 | HitKindNV = 5333, |
| 697 | CurrentRayTimeNV = 5334, | 753 | CurrentRayTimeNV = 5334, |
| 754 | + HitTriangleVertexPositionsKHR = 5335, | ||
| 755 | + HitMicroTriangleVertexPositionsNV = 5337, | ||
| 756 | + HitMicroTriangleVertexBarycentricsNV = 5344, | ||
| 698 | IncomingRayFlagsKHR = 5351, | 757 | IncomingRayFlagsKHR = 5351, |
| 699 | IncomingRayFlagsNV = 5351, | 758 | IncomingRayFlagsNV = 5351, |
| 700 | RayGeometryIndexKHR = 5352, | 759 | RayGeometryIndexKHR = 5352, |
| @@ -702,6 +761,8 @@ enum class BuiltIn : unsigned { | |||
| 702 | SMCountNV = 5375, | 761 | SMCountNV = 5375, |
| 703 | WarpIDNV = 5376, | 762 | WarpIDNV = 5376, |
| 704 | SMIDNV = 5377, | 763 | SMIDNV = 5377, |
| 764 | + HitKindFrontFacingMicroTriangleNV = 5405, | ||
| 765 | + HitKindBackFacingMicroTriangleNV = 5406, | ||
| 705 | CullMaskKHR = 6021, | 766 | CullMaskKHR = 6021, |
| 706 | Max = 0x7fffffff, | 767 | Max = 0x7fffffff, |
| 707 | }; | 768 | }; |
| @@ -736,6 +797,8 @@ enum class LoopControlShift : unsigned { | |||
| 736 | MaxInterleavingINTEL = 21, | 797 | MaxInterleavingINTEL = 21, |
| 737 | SpeculatedIterationsINTEL = 22, | 798 | SpeculatedIterationsINTEL = 22, |
| 738 | NoFusionINTEL = 23, | 799 | NoFusionINTEL = 23, |
| 800 | + LoopCountINTEL = 24, | ||
| 801 | + MaxReinvocationDelayINTEL = 25, | ||
| 739 | Max = 0x7fffffff, | 802 | Max = 0x7fffffff, |
| 740 | }; | 803 | }; |
| 741 | 804 | ||
| @@ -758,6 +821,8 @@ enum class LoopControlMask : unsigned { | |||
| 758 | MaxInterleavingINTEL = 0x00200000, | 821 | MaxInterleavingINTEL = 0x00200000, |
| 759 | SpeculatedIterationsINTEL = 0x00400000, | 822 | SpeculatedIterationsINTEL = 0x00400000, |
| 760 | NoFusionINTEL = 0x00800000, | 823 | NoFusionINTEL = 0x00800000, |
| 824 | + LoopCountINTEL = 0x01000000, | ||
| 825 | + MaxReinvocationDelayINTEL = 0x02000000, | ||
| 761 | }; | 826 | }; |
| 762 | 827 | ||
| 763 | enum class FunctionControlShift : unsigned { | 828 | enum class FunctionControlShift : unsigned { |
| @@ -962,6 +1027,9 @@ enum class Capability : unsigned { | |||
| 962 | ShaderViewportIndex = 70, | 1027 | ShaderViewportIndex = 70, |
| 963 | UniformDecoration = 71, | 1028 | UniformDecoration = 71, |
| 964 | CoreBuiltinsARM = 4165, | 1029 | CoreBuiltinsARM = 4165, |
| 1030 | + TileImageColorReadAccessEXT = 4166, | ||
| 1031 | + TileImageDepthReadAccessEXT = 4167, | ||
| 1032 | + TileImageStencilReadAccessEXT = 4168, | ||
| 965 | FragmentShadingRateKHR = 4422, | 1033 | FragmentShadingRateKHR = 4422, |
| 966 | SubgroupBallotKHR = 4423, | 1034 | SubgroupBallotKHR = 4423, |
| 967 | DrawParameters = 4427, | 1035 | DrawParameters = 4427, |
| @@ -993,6 +1061,9 @@ enum class Capability : unsigned { | |||
| 993 | RayQueryKHR = 4472, | 1061 | RayQueryKHR = 4472, |
| 994 | RayTraversalPrimitiveCullingKHR = 4478, | 1062 | RayTraversalPrimitiveCullingKHR = 4478, |
| 995 | RayTracingKHR = 4479, | 1063 | RayTracingKHR = 4479, |
| 1064 | + TextureSampleWeightedQCOM = 4484, | ||
| 1065 | + TextureBoxFilterQCOM = 4485, | ||
| 1066 | + TextureBlockMatchQCOM = 4486, | ||
| 996 | Float16ImageAMD = 5008, | 1067 | Float16ImageAMD = 5008, |
| 997 | ImageGatherBiasLodAMD = 5009, | 1068 | ImageGatherBiasLodAMD = 5009, |
| 998 | FragmentMaskAMD = 5010, | 1069 | FragmentMaskAMD = 5010, |
| @@ -1000,6 +1071,7 @@ enum class Capability : unsigned { | |||
| 1000 | ImageReadWriteLodAMD = 5015, | 1071 | ImageReadWriteLodAMD = 5015, |
| 1001 | Int64ImageEXT = 5016, | 1072 | Int64ImageEXT = 5016, |
| 1002 | ShaderClockKHR = 5055, | 1073 | ShaderClockKHR = 5055, |
| 1074 | + ShaderEnqueueAMDX = 5067, | ||
| 1003 | SampleMaskOverrideCoverageNV = 5249, | 1075 | SampleMaskOverrideCoverageNV = 5249, |
| 1004 | GeometryShaderPassthroughNV = 5251, | 1076 | GeometryShaderPassthroughNV = 5251, |
| 1005 | ShaderViewportIndexLayerEXT = 5254, | 1077 | ShaderViewportIndexLayerEXT = 5254, |
| @@ -1041,6 +1113,7 @@ enum class Capability : unsigned { | |||
| 1041 | UniformTexelBufferArrayNonUniformIndexingEXT = 5311, | 1113 | UniformTexelBufferArrayNonUniformIndexingEXT = 5311, |
| 1042 | StorageTexelBufferArrayNonUniformIndexing = 5312, | 1114 | StorageTexelBufferArrayNonUniformIndexing = 5312, |
| 1043 | StorageTexelBufferArrayNonUniformIndexingEXT = 5312, | 1115 | StorageTexelBufferArrayNonUniformIndexingEXT = 5312, |
| 1116 | + RayTracingPositionFetchKHR = 5336, | ||
| 1044 | RayTracingNV = 5340, | 1117 | RayTracingNV = 5340, |
| 1045 | RayTracingMotionBlurNV = 5341, | 1118 | RayTracingMotionBlurNV = 5341, |
| 1046 | VulkanMemoryModel = 5345, | 1119 | VulkanMemoryModel = 5345, |
| @@ -1058,8 +1131,12 @@ enum class Capability : unsigned { | |||
| 1058 | FragmentShaderPixelInterlockEXT = 5378, | 1131 | FragmentShaderPixelInterlockEXT = 5378, |
| 1059 | DemoteToHelperInvocation = 5379, | 1132 | DemoteToHelperInvocation = 5379, |
| 1060 | DemoteToHelperInvocationEXT = 5379, | 1133 | DemoteToHelperInvocationEXT = 5379, |
| 1134 | + DisplacementMicromapNV = 5380, | ||
| 1061 | RayTracingOpacityMicromapEXT = 5381, | 1135 | RayTracingOpacityMicromapEXT = 5381, |
| 1136 | + ShaderInvocationReorderNV = 5383, | ||
| 1062 | BindlessTextureNV = 5390, | 1137 | BindlessTextureNV = 5390, |
| 1138 | + RayQueryPositionFetchKHR = 5391, | ||
| 1139 | + RayTracingDisplacementMicromapNV = 5409, | ||
| 1063 | SubgroupShuffleINTEL = 5568, | 1140 | SubgroupShuffleINTEL = 5568, |
| 1064 | SubgroupBufferBlockIOINTEL = 5569, | 1141 | SubgroupBufferBlockIOINTEL = 5569, |
| 1065 | SubgroupImageBlockIOINTEL = 5570, | 1142 | SubgroupImageBlockIOINTEL = 5570, |
| @@ -1092,10 +1169,13 @@ enum class Capability : unsigned { | |||
| 1092 | FPGAMemoryAccessesINTEL = 5898, | 1169 | FPGAMemoryAccessesINTEL = 5898, |
| 1093 | FPGAClusterAttributesINTEL = 5904, | 1170 | FPGAClusterAttributesINTEL = 5904, |
| 1094 | LoopFuseINTEL = 5906, | 1171 | LoopFuseINTEL = 5906, |
| 1172 | + FPGADSPControlINTEL = 5908, | ||
| 1095 | MemoryAccessAliasingINTEL = 5910, | 1173 | MemoryAccessAliasingINTEL = 5910, |
| 1174 | + FPGAInvocationPipeliningAttributesINTEL = 5916, | ||
| 1096 | FPGABufferLocationINTEL = 5920, | 1175 | FPGABufferLocationINTEL = 5920, |
| 1097 | ArbitraryPrecisionFixedPointINTEL = 5922, | 1176 | ArbitraryPrecisionFixedPointINTEL = 5922, |
| 1098 | USMStorageClassesINTEL = 5935, | 1177 | USMStorageClassesINTEL = 5935, |
| 1178 | + RuntimeAlignedAttributeINTEL = 5939, | ||
| 1099 | IOPipesINTEL = 5943, | 1179 | IOPipesINTEL = 5943, |
| 1100 | BlockingPipesINTEL = 5945, | 1180 | BlockingPipesINTEL = 5945, |
| 1101 | FPGARegINTEL = 5948, | 1181 | FPGARegINTEL = 5948, |
| @@ -1108,16 +1188,26 @@ enum class Capability : unsigned { | |||
| 1108 | DotProduct = 6019, | 1188 | DotProduct = 6019, |
| 1109 | DotProductKHR = 6019, | 1189 | DotProductKHR = 6019, |
| 1110 | RayCullMaskKHR = 6020, | 1190 | RayCullMaskKHR = 6020, |
| 1191 | + CooperativeMatrixKHR = 6022, | ||
| 1111 | BitInstructions = 6025, | 1192 | BitInstructions = 6025, |
| 1112 | GroupNonUniformRotateKHR = 6026, | 1193 | GroupNonUniformRotateKHR = 6026, |
| 1113 | AtomicFloat32AddEXT = 6033, | 1194 | AtomicFloat32AddEXT = 6033, |
| 1114 | AtomicFloat64AddEXT = 6034, | 1195 | AtomicFloat64AddEXT = 6034, |
| 1115 | - LongConstantCompositeINTEL = 6089, | 1196 | + LongCompositesINTEL = 6089, |
| 1116 | OptNoneINTEL = 6094, | 1197 | OptNoneINTEL = 6094, |
| 1117 | AtomicFloat16AddEXT = 6095, | 1198 | AtomicFloat16AddEXT = 6095, |
| 1118 | DebugInfoModuleINTEL = 6114, | 1199 | DebugInfoModuleINTEL = 6114, |
| 1200 | + BFloat16ConversionINTEL = 6115, | ||
| 1119 | SplitBarrierINTEL = 6141, | 1201 | SplitBarrierINTEL = 6141, |
| 1202 | + FPGAClusterAttributesV2INTEL = 6150, | ||
| 1203 | + FPGAKernelAttributesv2INTEL = 6161, | ||
| 1204 | + FPMaxErrorINTEL = 6169, | ||
| 1205 | + FPGALatencyControlINTEL = 6171, | ||
| 1206 | + FPGAArgumentInterfacesINTEL = 6174, | ||
| 1207 | + GlobalVariableHostAccessINTEL = 6187, | ||
| 1208 | + GlobalVariableFPGADecorationsINTEL = 6189, | ||
| 1120 | GroupUniformArithmeticKHR = 6400, | 1209 | GroupUniformArithmeticKHR = 6400, |
| 1210 | + CacheControlsINTEL = 6441, | ||
| 1121 | Max = 0x7fffffff, | 1211 | Max = 0x7fffffff, |
| 1122 | }; | 1212 | }; |
| 1123 | 1213 | ||
| @@ -1224,6 +1314,68 @@ enum class PackedVectorFormat : unsigned { | |||
| 1224 | Max = 0x7fffffff, | 1314 | Max = 0x7fffffff, |
| 1225 | }; | 1315 | }; |
| 1226 | 1316 | ||
| 1317 | +enum class CooperativeMatrixOperandsShift : unsigned { | ||
| 1318 | + MatrixASignedComponentsKHR = 0, | ||
| 1319 | + MatrixBSignedComponentsKHR = 1, | ||
| 1320 | + MatrixCSignedComponentsKHR = 2, | ||
| 1321 | + MatrixResultSignedComponentsKHR = 3, | ||
| 1322 | + SaturatingAccumulationKHR = 4, | ||
| 1323 | + Max = 0x7fffffff, | ||
| 1324 | +}; | ||
| 1325 | + | ||
| 1326 | +enum class CooperativeMatrixOperandsMask : unsigned { | ||
| 1327 | + MaskNone = 0, | ||
| 1328 | + MatrixASignedComponentsKHR = 0x00000001, | ||
| 1329 | + MatrixBSignedComponentsKHR = 0x00000002, | ||
| 1330 | + MatrixCSignedComponentsKHR = 0x00000004, | ||
| 1331 | + MatrixResultSignedComponentsKHR = 0x00000008, | ||
| 1332 | + SaturatingAccumulationKHR = 0x00000010, | ||
| 1333 | +}; | ||
| 1334 | + | ||
| 1335 | +enum class CooperativeMatrixLayout : unsigned { | ||
| 1336 | + RowMajorKHR = 0, | ||
| 1337 | + ColumnMajorKHR = 1, | ||
| 1338 | + Max = 0x7fffffff, | ||
| 1339 | +}; | ||
| 1340 | + | ||
| 1341 | +enum class CooperativeMatrixUse : unsigned { | ||
| 1342 | + MatrixAKHR = 0, | ||
| 1343 | + MatrixBKHR = 1, | ||
| 1344 | + MatrixAccumulatorKHR = 2, | ||
| 1345 | + Max = 0x7fffffff, | ||
| 1346 | +}; | ||
| 1347 | + | ||
| 1348 | +enum class InitializationModeQualifier : unsigned { | ||
| 1349 | + InitOnDeviceReprogramINTEL = 0, | ||
| 1350 | + InitOnDeviceResetINTEL = 1, | ||
| 1351 | + Max = 0x7fffffff, | ||
| 1352 | +}; | ||
| 1353 | + | ||
| 1354 | +enum class HostAccessQualifier : unsigned { | ||
| 1355 | + NoneINTEL = 0, | ||
| 1356 | + ReadINTEL = 1, | ||
| 1357 | + WriteINTEL = 2, | ||
| 1358 | + ReadWriteINTEL = 3, | ||
| 1359 | + Max = 0x7fffffff, | ||
| 1360 | +}; | ||
| 1361 | + | ||
| 1362 | +enum class LoadCacheControl : unsigned { | ||
| 1363 | + UncachedINTEL = 0, | ||
| 1364 | + CachedINTEL = 1, | ||
| 1365 | + StreamingINTEL = 2, | ||
| 1366 | + InvalidateAfterReadINTEL = 3, | ||
| 1367 | + ConstCachedINTEL = 4, | ||
| 1368 | + Max = 0x7fffffff, | ||
| 1369 | +}; | ||
| 1370 | + | ||
| 1371 | +enum class StoreCacheControl : unsigned { | ||
| 1372 | + UncachedINTEL = 0, | ||
| 1373 | + WriteThroughINTEL = 1, | ||
| 1374 | + WriteBackINTEL = 2, | ||
| 1375 | + StreamingINTEL = 3, | ||
| 1376 | + Max = 0x7fffffff, | ||
| 1377 | +}; | ||
| 1378 | + | ||
| 1227 | enum class Op : unsigned { | 1379 | enum class Op : unsigned { |
| 1228 | OpNop = 0, | 1380 | OpNop = 0, |
| 1229 | OpUndef = 1, | 1381 | OpUndef = 1, |
| @@ -1569,6 +1721,9 @@ enum class Op : unsigned { | |||
| 1569 | OpPtrEqual = 401, | 1721 | OpPtrEqual = 401, |
| 1570 | OpPtrNotEqual = 402, | 1722 | OpPtrNotEqual = 402, |
| 1571 | OpPtrDiff = 403, | 1723 | OpPtrDiff = 403, |
| 1724 | + OpColorAttachmentReadEXT = 4160, | ||
| 1725 | + OpDepthAttachmentReadEXT = 4161, | ||
| 1726 | + OpStencilAttachmentReadEXT = 4162, | ||
| 1572 | OpTerminateInvocation = 4416, | 1727 | OpTerminateInvocation = 4416, |
| 1573 | OpSubgroupBallotKHR = 4421, | 1728 | OpSubgroupBallotKHR = 4421, |
| 1574 | OpSubgroupFirstInvocationKHR = 4422, | 1729 | OpSubgroupFirstInvocationKHR = 4422, |
| @@ -1594,6 +1749,11 @@ enum class Op : unsigned { | |||
| 1594 | OpUDotAccSatKHR = 4454, | 1749 | OpUDotAccSatKHR = 4454, |
| 1595 | OpSUDotAccSat = 4455, | 1750 | OpSUDotAccSat = 4455, |
| 1596 | OpSUDotAccSatKHR = 4455, | 1751 | OpSUDotAccSatKHR = 4455, |
| 1752 | + OpTypeCooperativeMatrixKHR = 4456, | ||
| 1753 | + OpCooperativeMatrixLoadKHR = 4457, | ||
| 1754 | + OpCooperativeMatrixStoreKHR = 4458, | ||
| 1755 | + OpCooperativeMatrixMulAddKHR = 4459, | ||
| 1756 | + OpCooperativeMatrixLengthKHR = 4460, | ||
| 1597 | OpTypeRayQueryKHR = 4472, | 1757 | OpTypeRayQueryKHR = 4472, |
| 1598 | OpRayQueryInitializeKHR = 4473, | 1758 | OpRayQueryInitializeKHR = 4473, |
| 1599 | OpRayQueryTerminateKHR = 4474, | 1759 | OpRayQueryTerminateKHR = 4474, |
| @@ -1601,6 +1761,10 @@ enum class Op : unsigned { | |||
| 1601 | OpRayQueryConfirmIntersectionKHR = 4476, | 1761 | OpRayQueryConfirmIntersectionKHR = 4476, |
| 1602 | OpRayQueryProceedKHR = 4477, | 1762 | OpRayQueryProceedKHR = 4477, |
| 1603 | OpRayQueryGetIntersectionTypeKHR = 4479, | 1763 | OpRayQueryGetIntersectionTypeKHR = 4479, |
| 1764 | + OpImageSampleWeightedQCOM = 4480, | ||
| 1765 | + OpImageBoxFilterQCOM = 4481, | ||
| 1766 | + OpImageBlockMatchSSDQCOM = 4482, | ||
| 1767 | + OpImageBlockMatchSADQCOM = 4483, | ||
| 1604 | OpGroupIAddNonUniformAMD = 5000, | 1768 | OpGroupIAddNonUniformAMD = 5000, |
| 1605 | OpGroupFAddNonUniformAMD = 5001, | 1769 | OpGroupFAddNonUniformAMD = 5001, |
| 1606 | OpGroupFMinNonUniformAMD = 5002, | 1770 | OpGroupFMinNonUniformAMD = 5002, |
| @@ -1612,11 +1776,49 @@ enum class Op : unsigned { | |||
| 1612 | OpFragmentMaskFetchAMD = 5011, | 1776 | OpFragmentMaskFetchAMD = 5011, |
| 1613 | OpFragmentFetchAMD = 5012, | 1777 | OpFragmentFetchAMD = 5012, |
| 1614 | OpReadClockKHR = 5056, | 1778 | OpReadClockKHR = 5056, |
| 1779 | + OpFinalizeNodePayloadsAMDX = 5075, | ||
| 1780 | + OpFinishWritingNodePayloadAMDX = 5078, | ||
| 1781 | + OpInitializeNodePayloadsAMDX = 5090, | ||
| 1782 | + OpHitObjectRecordHitMotionNV = 5249, | ||
| 1783 | + OpHitObjectRecordHitWithIndexMotionNV = 5250, | ||
| 1784 | + OpHitObjectRecordMissMotionNV = 5251, | ||
| 1785 | + OpHitObjectGetWorldToObjectNV = 5252, | ||
| 1786 | + OpHitObjectGetObjectToWorldNV = 5253, | ||
| 1787 | + OpHitObjectGetObjectRayDirectionNV = 5254, | ||
| 1788 | + OpHitObjectGetObjectRayOriginNV = 5255, | ||
| 1789 | + OpHitObjectTraceRayMotionNV = 5256, | ||
| 1790 | + OpHitObjectGetShaderRecordBufferHandleNV = 5257, | ||
| 1791 | + OpHitObjectGetShaderBindingTableRecordIndexNV = 5258, | ||
| 1792 | + OpHitObjectRecordEmptyNV = 5259, | ||
| 1793 | + OpHitObjectTraceRayNV = 5260, | ||
| 1794 | + OpHitObjectRecordHitNV = 5261, | ||
| 1795 | + OpHitObjectRecordHitWithIndexNV = 5262, | ||
| 1796 | + OpHitObjectRecordMissNV = 5263, | ||
| 1797 | + OpHitObjectExecuteShaderNV = 5264, | ||
| 1798 | + OpHitObjectGetCurrentTimeNV = 5265, | ||
| 1799 | + OpHitObjectGetAttributesNV = 5266, | ||
| 1800 | + OpHitObjectGetHitKindNV = 5267, | ||
| 1801 | + OpHitObjectGetPrimitiveIndexNV = 5268, | ||
| 1802 | + OpHitObjectGetGeometryIndexNV = 5269, | ||
| 1803 | + OpHitObjectGetInstanceIdNV = 5270, | ||
| 1804 | + OpHitObjectGetInstanceCustomIndexNV = 5271, | ||
| 1805 | + OpHitObjectGetWorldRayDirectionNV = 5272, | ||
| 1806 | + OpHitObjectGetWorldRayOriginNV = 5273, | ||
| 1807 | + OpHitObjectGetRayTMaxNV = 5274, | ||
| 1808 | + OpHitObjectGetRayTMinNV = 5275, | ||
| 1809 | + OpHitObjectIsEmptyNV = 5276, | ||
| 1810 | + OpHitObjectIsHitNV = 5277, | ||
| 1811 | + OpHitObjectIsMissNV = 5278, | ||
| 1812 | + OpReorderThreadWithHitObjectNV = 5279, | ||
| 1813 | + OpReorderThreadWithHintNV = 5280, | ||
| 1814 | + OpTypeHitObjectNV = 5281, | ||
| 1615 | OpImageSampleFootprintNV = 5283, | 1815 | OpImageSampleFootprintNV = 5283, |
| 1616 | OpEmitMeshTasksEXT = 5294, | 1816 | OpEmitMeshTasksEXT = 5294, |
| 1617 | OpSetMeshOutputsEXT = 5295, | 1817 | OpSetMeshOutputsEXT = 5295, |
| 1618 | OpGroupNonUniformPartitionNV = 5296, | 1818 | OpGroupNonUniformPartitionNV = 5296, |
| 1619 | OpWritePackedPrimitiveIndices4x8NV = 5299, | 1819 | OpWritePackedPrimitiveIndices4x8NV = 5299, |
| 1820 | + OpFetchMicroTriangleVertexPositionNV = 5300, | ||
| 1821 | + OpFetchMicroTriangleVertexBarycentricNV = 5301, | ||
| 1620 | OpReportIntersectionKHR = 5334, | 1822 | OpReportIntersectionKHR = 5334, |
| 1621 | OpReportIntersectionNV = 5334, | 1823 | OpReportIntersectionNV = 5334, |
| 1622 | OpIgnoreIntersectionNV = 5335, | 1824 | OpIgnoreIntersectionNV = 5335, |
| @@ -1624,6 +1826,7 @@ enum class Op : unsigned { | |||
| 1624 | OpTraceNV = 5337, | 1826 | OpTraceNV = 5337, |
| 1625 | OpTraceMotionNV = 5338, | 1827 | OpTraceMotionNV = 5338, |
| 1626 | OpTraceRayMotionNV = 5339, | 1828 | OpTraceRayMotionNV = 5339, |
| 1829 | + OpRayQueryGetIntersectionTriangleVertexPositionsKHR = 5340, | ||
| 1627 | OpTypeAccelerationStructureKHR = 5341, | 1830 | OpTypeAccelerationStructureKHR = 5341, |
| 1628 | OpTypeAccelerationStructureNV = 5341, | 1831 | OpTypeAccelerationStructureNV = 5341, |
| 1629 | OpExecuteCallableNV = 5344, | 1832 | OpExecuteCallableNV = 5344, |
| @@ -1885,6 +2088,9 @@ enum class Op : unsigned { | |||
| 1885 | OpTypeStructContinuedINTEL = 6090, | 2088 | OpTypeStructContinuedINTEL = 6090, |
| 1886 | OpConstantCompositeContinuedINTEL = 6091, | 2089 | OpConstantCompositeContinuedINTEL = 6091, |
| 1887 | OpSpecConstantCompositeContinuedINTEL = 6092, | 2090 | OpSpecConstantCompositeContinuedINTEL = 6092, |
| 2091 | + OpCompositeConstructContinuedINTEL = 6096, | ||
| 2092 | + OpConvertFToBF16INTEL = 6116, | ||
| 2093 | + OpConvertBF16ToFINTEL = 6117, | ||
| 1888 | OpControlBarrierArriveINTEL = 6142, | 2094 | OpControlBarrierArriveINTEL = 6142, |
| 1889 | OpControlBarrierWaitINTEL = 6143, | 2095 | OpControlBarrierWaitINTEL = 6143, |
| 1890 | OpGroupIMulKHR = 6401, | 2096 | OpGroupIMulKHR = 6401, |
| @@ -2250,6 +2456,9 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2250 | case Op::OpPtrEqual: *hasResult = true; *hasResultType = true; break; | 2456 | case Op::OpPtrEqual: *hasResult = true; *hasResultType = true; break; |
| 2251 | case Op::OpPtrNotEqual: *hasResult = true; *hasResultType = true; break; | 2457 | case Op::OpPtrNotEqual: *hasResult = true; *hasResultType = true; break; |
| 2252 | case Op::OpPtrDiff: *hasResult = true; *hasResultType = true; break; | 2458 | case Op::OpPtrDiff: *hasResult = true; *hasResultType = true; break; |
| 2459 | + case Op::OpColorAttachmentReadEXT: *hasResult = true; *hasResultType = true; break; | ||
| 2460 | + case Op::OpDepthAttachmentReadEXT: *hasResult = true; *hasResultType = true; break; | ||
| 2461 | + case Op::OpStencilAttachmentReadEXT: *hasResult = true; *hasResultType = true; break; | ||
| 2253 | case Op::OpTerminateInvocation: *hasResult = false; *hasResultType = false; break; | 2462 | case Op::OpTerminateInvocation: *hasResult = false; *hasResultType = false; break; |
| 2254 | case Op::OpSubgroupBallotKHR: *hasResult = true; *hasResultType = true; break; | 2463 | case Op::OpSubgroupBallotKHR: *hasResult = true; *hasResultType = true; break; |
| 2255 | case Op::OpSubgroupFirstInvocationKHR: *hasResult = true; *hasResultType = true; break; | 2464 | case Op::OpSubgroupFirstInvocationKHR: *hasResult = true; *hasResultType = true; break; |
| @@ -2269,6 +2478,11 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2269 | case Op::OpSDotAccSat: *hasResult = true; *hasResultType = true; break; | 2478 | case Op::OpSDotAccSat: *hasResult = true; *hasResultType = true; break; |
| 2270 | case Op::OpUDotAccSat: *hasResult = true; *hasResultType = true; break; | 2479 | case Op::OpUDotAccSat: *hasResult = true; *hasResultType = true; break; |
| 2271 | case Op::OpSUDotAccSat: *hasResult = true; *hasResultType = true; break; | 2480 | case Op::OpSUDotAccSat: *hasResult = true; *hasResultType = true; break; |
| 2481 | + case Op::OpTypeCooperativeMatrixKHR: *hasResult = true; *hasResultType = false; break; | ||
| 2482 | + case Op::OpCooperativeMatrixLoadKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2483 | + case Op::OpCooperativeMatrixStoreKHR: *hasResult = false; *hasResultType = false; break; | ||
| 2484 | + case Op::OpCooperativeMatrixMulAddKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2485 | + case Op::OpCooperativeMatrixLengthKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2272 | case Op::OpTypeRayQueryKHR: *hasResult = true; *hasResultType = false; break; | 2486 | case Op::OpTypeRayQueryKHR: *hasResult = true; *hasResultType = false; break; |
| 2273 | case Op::OpRayQueryInitializeKHR: *hasResult = false; *hasResultType = false; break; | 2487 | case Op::OpRayQueryInitializeKHR: *hasResult = false; *hasResultType = false; break; |
| 2274 | case Op::OpRayQueryTerminateKHR: *hasResult = false; *hasResultType = false; break; | 2488 | case Op::OpRayQueryTerminateKHR: *hasResult = false; *hasResultType = false; break; |
| @@ -2276,6 +2490,10 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2276 | case Op::OpRayQueryConfirmIntersectionKHR: *hasResult = false; *hasResultType = false; break; | 2490 | case Op::OpRayQueryConfirmIntersectionKHR: *hasResult = false; *hasResultType = false; break; |
| 2277 | case Op::OpRayQueryProceedKHR: *hasResult = true; *hasResultType = true; break; | 2491 | case Op::OpRayQueryProceedKHR: *hasResult = true; *hasResultType = true; break; |
| 2278 | case Op::OpRayQueryGetIntersectionTypeKHR: *hasResult = true; *hasResultType = true; break; | 2492 | case Op::OpRayQueryGetIntersectionTypeKHR: *hasResult = true; *hasResultType = true; break; |
| 2493 | + case Op::OpImageSampleWeightedQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2494 | + case Op::OpImageBoxFilterQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2495 | + case Op::OpImageBlockMatchSSDQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2496 | + case Op::OpImageBlockMatchSADQCOM: *hasResult = true; *hasResultType = true; break; | ||
| 2279 | case Op::OpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; | 2497 | case Op::OpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; |
| 2280 | case Op::OpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; | 2498 | case Op::OpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; |
| 2281 | case Op::OpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break; | 2499 | case Op::OpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break; |
| @@ -2287,17 +2505,56 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2287 | case Op::OpFragmentMaskFetchAMD: *hasResult = true; *hasResultType = true; break; | 2505 | case Op::OpFragmentMaskFetchAMD: *hasResult = true; *hasResultType = true; break; |
| 2288 | case Op::OpFragmentFetchAMD: *hasResult = true; *hasResultType = true; break; | 2506 | case Op::OpFragmentFetchAMD: *hasResult = true; *hasResultType = true; break; |
| 2289 | case Op::OpReadClockKHR: *hasResult = true; *hasResultType = true; break; | 2507 | case Op::OpReadClockKHR: *hasResult = true; *hasResultType = true; break; |
| 2508 | + case Op::OpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; | ||
| 2509 | + case Op::OpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break; | ||
| 2510 | + case Op::OpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; | ||
| 2511 | + case Op::OpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2512 | + case Op::OpHitObjectRecordHitWithIndexMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2513 | + case Op::OpHitObjectRecordMissMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2514 | + case Op::OpHitObjectGetWorldToObjectNV: *hasResult = true; *hasResultType = true; break; | ||
| 2515 | + case Op::OpHitObjectGetObjectToWorldNV: *hasResult = true; *hasResultType = true; break; | ||
| 2516 | + case Op::OpHitObjectGetObjectRayDirectionNV: *hasResult = true; *hasResultType = true; break; | ||
| 2517 | + case Op::OpHitObjectGetObjectRayOriginNV: *hasResult = true; *hasResultType = true; break; | ||
| 2518 | + case Op::OpHitObjectTraceRayMotionNV: *hasResult = false; *hasResultType = false; break; | ||
| 2519 | + case Op::OpHitObjectGetShaderRecordBufferHandleNV: *hasResult = true; *hasResultType = true; break; | ||
| 2520 | + case Op::OpHitObjectGetShaderBindingTableRecordIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2521 | + case Op::OpHitObjectRecordEmptyNV: *hasResult = false; *hasResultType = false; break; | ||
| 2522 | + case Op::OpHitObjectTraceRayNV: *hasResult = false; *hasResultType = false; break; | ||
| 2523 | + case Op::OpHitObjectRecordHitNV: *hasResult = false; *hasResultType = false; break; | ||
| 2524 | + case Op::OpHitObjectRecordHitWithIndexNV: *hasResult = false; *hasResultType = false; break; | ||
| 2525 | + case Op::OpHitObjectRecordMissNV: *hasResult = false; *hasResultType = false; break; | ||
| 2526 | + case Op::OpHitObjectExecuteShaderNV: *hasResult = false; *hasResultType = false; break; | ||
| 2527 | + case Op::OpHitObjectGetCurrentTimeNV: *hasResult = true; *hasResultType = true; break; | ||
| 2528 | + case Op::OpHitObjectGetAttributesNV: *hasResult = false; *hasResultType = false; break; | ||
| 2529 | + case Op::OpHitObjectGetHitKindNV: *hasResult = true; *hasResultType = true; break; | ||
| 2530 | + case Op::OpHitObjectGetPrimitiveIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2531 | + case Op::OpHitObjectGetGeometryIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2532 | + case Op::OpHitObjectGetInstanceIdNV: *hasResult = true; *hasResultType = true; break; | ||
| 2533 | + case Op::OpHitObjectGetInstanceCustomIndexNV: *hasResult = true; *hasResultType = true; break; | ||
| 2534 | + case Op::OpHitObjectGetWorldRayDirectionNV: *hasResult = true; *hasResultType = true; break; | ||
| 2535 | + case Op::OpHitObjectGetWorldRayOriginNV: *hasResult = true; *hasResultType = true; break; | ||
| 2536 | + case Op::OpHitObjectGetRayTMaxNV: *hasResult = true; *hasResultType = true; break; | ||
| 2537 | + case Op::OpHitObjectGetRayTMinNV: *hasResult = true; *hasResultType = true; break; | ||
| 2538 | + case Op::OpHitObjectIsEmptyNV: *hasResult = true; *hasResultType = true; break; | ||
| 2539 | + case Op::OpHitObjectIsHitNV: *hasResult = true; *hasResultType = true; break; | ||
| 2540 | + case Op::OpHitObjectIsMissNV: *hasResult = true; *hasResultType = true; break; | ||
| 2541 | + case Op::OpReorderThreadWithHitObjectNV: *hasResult = false; *hasResultType = false; break; | ||
| 2542 | + case Op::OpReorderThreadWithHintNV: *hasResult = false; *hasResultType = false; break; | ||
| 2543 | + case Op::OpTypeHitObjectNV: *hasResult = true; *hasResultType = false; break; | ||
| 2290 | case Op::OpImageSampleFootprintNV: *hasResult = true; *hasResultType = true; break; | 2544 | case Op::OpImageSampleFootprintNV: *hasResult = true; *hasResultType = true; break; |
| 2291 | case Op::OpEmitMeshTasksEXT: *hasResult = false; *hasResultType = false; break; | 2545 | case Op::OpEmitMeshTasksEXT: *hasResult = false; *hasResultType = false; break; |
| 2292 | case Op::OpSetMeshOutputsEXT: *hasResult = false; *hasResultType = false; break; | 2546 | case Op::OpSetMeshOutputsEXT: *hasResult = false; *hasResultType = false; break; |
| 2293 | case Op::OpGroupNonUniformPartitionNV: *hasResult = true; *hasResultType = true; break; | 2547 | case Op::OpGroupNonUniformPartitionNV: *hasResult = true; *hasResultType = true; break; |
| 2294 | case Op::OpWritePackedPrimitiveIndices4x8NV: *hasResult = false; *hasResultType = false; break; | 2548 | case Op::OpWritePackedPrimitiveIndices4x8NV: *hasResult = false; *hasResultType = false; break; |
| 2549 | + case Op::OpFetchMicroTriangleVertexPositionNV: *hasResult = true; *hasResultType = true; break; | ||
| 2550 | + case Op::OpFetchMicroTriangleVertexBarycentricNV: *hasResult = true; *hasResultType = true; break; | ||
| 2295 | case Op::OpReportIntersectionNV: *hasResult = true; *hasResultType = true; break; | 2551 | case Op::OpReportIntersectionNV: *hasResult = true; *hasResultType = true; break; |
| 2296 | case Op::OpIgnoreIntersectionNV: *hasResult = false; *hasResultType = false; break; | 2552 | case Op::OpIgnoreIntersectionNV: *hasResult = false; *hasResultType = false; break; |
| 2297 | case Op::OpTerminateRayNV: *hasResult = false; *hasResultType = false; break; | 2553 | case Op::OpTerminateRayNV: *hasResult = false; *hasResultType = false; break; |
| 2298 | case Op::OpTraceNV: *hasResult = false; *hasResultType = false; break; | 2554 | case Op::OpTraceNV: *hasResult = false; *hasResultType = false; break; |
| 2299 | case Op::OpTraceMotionNV: *hasResult = false; *hasResultType = false; break; | 2555 | case Op::OpTraceMotionNV: *hasResult = false; *hasResultType = false; break; |
| 2300 | case Op::OpTraceRayMotionNV: *hasResult = false; *hasResultType = false; break; | 2556 | case Op::OpTraceRayMotionNV: *hasResult = false; *hasResultType = false; break; |
| 2557 | + case Op::OpRayQueryGetIntersectionTriangleVertexPositionsKHR: *hasResult = true; *hasResultType = true; break; | ||
| 2301 | case Op::OpTypeAccelerationStructureNV: *hasResult = true; *hasResultType = false; break; | 2558 | case Op::OpTypeAccelerationStructureNV: *hasResult = true; *hasResultType = false; break; |
| 2302 | case Op::OpExecuteCallableNV: *hasResult = false; *hasResultType = false; break; | 2559 | case Op::OpExecuteCallableNV: *hasResult = false; *hasResultType = false; break; |
| 2303 | case Op::OpTypeCooperativeMatrixNV: *hasResult = true; *hasResultType = false; break; | 2560 | case Op::OpTypeCooperativeMatrixNV: *hasResult = true; *hasResultType = false; break; |
| @@ -2555,6 +2812,9 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2555 | case Op::OpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break; | 2812 | case Op::OpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break; |
| 2556 | case Op::OpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; | 2813 | case Op::OpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; |
| 2557 | case Op::OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; | 2814 | case Op::OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; |
| 2815 | + case Op::OpCompositeConstructContinuedINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 2816 | + case Op::OpConvertFToBF16INTEL: *hasResult = true; *hasResultType = true; break; | ||
| 2817 | + case Op::OpConvertBF16ToFINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 2558 | case Op::OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break; | 2818 | case Op::OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break; |
| 2559 | case Op::OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break; | 2819 | case Op::OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break; |
| 2560 | case Op::OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break; | 2820 | case Op::OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break; |
| @@ -2569,18 +2829,52 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | |||
| 2569 | } | 2829 | } |
| 2570 | #endif /* SPV_ENABLE_UTILITY_CODE */ | 2830 | #endif /* SPV_ENABLE_UTILITY_CODE */ |
| 2571 | 2831 | ||
| 2572 | -// Overload operator| for mask bit combining | 2832 | +// Overload bitwise operators for mask bit combining |
| 2573 | 2833 | ||
| 2574 | -inline ImageOperandsMask operator|(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) | unsigned(b)); } | 2834 | +constexpr ImageOperandsMask operator|(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) | unsigned(b)); } |
| 2575 | -inline FPFastMathModeMask operator|(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) | unsigned(b)); } | 2835 | +constexpr ImageOperandsMask operator&(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) & unsigned(b)); } |
| 2576 | -inline SelectionControlMask operator|(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) | unsigned(b)); } | 2836 | +constexpr ImageOperandsMask operator^(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) ^ unsigned(b)); } |
| 2577 | -inline LoopControlMask operator|(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) | unsigned(b)); } | 2837 | +constexpr ImageOperandsMask operator~(ImageOperandsMask a) { return ImageOperandsMask(~unsigned(a)); } |
| 2578 | -inline FunctionControlMask operator|(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) | unsigned(b)); } | 2838 | +constexpr FPFastMathModeMask operator|(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) | unsigned(b)); } |
| 2579 | -inline MemorySemanticsMask operator|(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) | unsigned(b)); } | 2839 | +constexpr FPFastMathModeMask operator&(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) & unsigned(b)); } |
| 2580 | -inline MemoryAccessMask operator|(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) | unsigned(b)); } | 2840 | +constexpr FPFastMathModeMask operator^(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) ^ unsigned(b)); } |
| 2581 | -inline KernelProfilingInfoMask operator|(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) | unsigned(b)); } | 2841 | +constexpr FPFastMathModeMask operator~(FPFastMathModeMask a) { return FPFastMathModeMask(~unsigned(a)); } |
| 2582 | -inline RayFlagsMask operator|(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) | unsigned(b)); } | 2842 | +constexpr SelectionControlMask operator|(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) | unsigned(b)); } |
| 2583 | -inline FragmentShadingRateMask operator|(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) | unsigned(b)); } | 2843 | +constexpr SelectionControlMask operator&(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) & unsigned(b)); } |
| 2844 | +constexpr SelectionControlMask operator^(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) ^ unsigned(b)); } | ||
| 2845 | +constexpr SelectionControlMask operator~(SelectionControlMask a) { return SelectionControlMask(~unsigned(a)); } | ||
| 2846 | +constexpr LoopControlMask operator|(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) | unsigned(b)); } | ||
| 2847 | +constexpr LoopControlMask operator&(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) & unsigned(b)); } | ||
| 2848 | +constexpr LoopControlMask operator^(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) ^ unsigned(b)); } | ||
| 2849 | +constexpr LoopControlMask operator~(LoopControlMask a) { return LoopControlMask(~unsigned(a)); } | ||
| 2850 | +constexpr FunctionControlMask operator|(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) | unsigned(b)); } | ||
| 2851 | +constexpr FunctionControlMask operator&(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) & unsigned(b)); } | ||
| 2852 | +constexpr FunctionControlMask operator^(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) ^ unsigned(b)); } | ||
| 2853 | +constexpr FunctionControlMask operator~(FunctionControlMask a) { return FunctionControlMask(~unsigned(a)); } | ||
| 2854 | +constexpr MemorySemanticsMask operator|(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) | unsigned(b)); } | ||
| 2855 | +constexpr MemorySemanticsMask operator&(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) & unsigned(b)); } | ||
| 2856 | +constexpr MemorySemanticsMask operator^(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) ^ unsigned(b)); } | ||
| 2857 | +constexpr MemorySemanticsMask operator~(MemorySemanticsMask a) { return MemorySemanticsMask(~unsigned(a)); } | ||
| 2858 | +constexpr MemoryAccessMask operator|(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) | unsigned(b)); } | ||
| 2859 | +constexpr MemoryAccessMask operator&(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) & unsigned(b)); } | ||
| 2860 | +constexpr MemoryAccessMask operator^(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) ^ unsigned(b)); } | ||
| 2861 | +constexpr MemoryAccessMask operator~(MemoryAccessMask a) { return MemoryAccessMask(~unsigned(a)); } | ||
| 2862 | +constexpr KernelProfilingInfoMask operator|(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) | unsigned(b)); } | ||
| 2863 | +constexpr KernelProfilingInfoMask operator&(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) & unsigned(b)); } | ||
| 2864 | +constexpr KernelProfilingInfoMask operator^(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) ^ unsigned(b)); } | ||
| 2865 | +constexpr KernelProfilingInfoMask operator~(KernelProfilingInfoMask a) { return KernelProfilingInfoMask(~unsigned(a)); } | ||
| 2866 | +constexpr RayFlagsMask operator|(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) | unsigned(b)); } | ||
| 2867 | +constexpr RayFlagsMask operator&(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) & unsigned(b)); } | ||
| 2868 | +constexpr RayFlagsMask operator^(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) ^ unsigned(b)); } | ||
| 2869 | +constexpr RayFlagsMask operator~(RayFlagsMask a) { return RayFlagsMask(~unsigned(a)); } | ||
| 2870 | +constexpr FragmentShadingRateMask operator|(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) | unsigned(b)); } | ||
| 2871 | +constexpr FragmentShadingRateMask operator&(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) & unsigned(b)); } | ||
| 2872 | +constexpr FragmentShadingRateMask operator^(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) ^ unsigned(b)); } | ||
| 2873 | +constexpr FragmentShadingRateMask operator~(FragmentShadingRateMask a) { return FragmentShadingRateMask(~unsigned(a)); } | ||
| 2874 | +constexpr CooperativeMatrixOperandsMask operator|(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) | unsigned(b)); } | ||
| 2875 | +constexpr CooperativeMatrixOperandsMask operator&(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) & unsigned(b)); } | ||
| 2876 | +constexpr CooperativeMatrixOperandsMask operator^(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) ^ unsigned(b)); } | ||
| 2877 | +constexpr CooperativeMatrixOperandsMask operator~(CooperativeMatrixOperandsMask a) { return CooperativeMatrixOperandsMask(~unsigned(a)); } | ||
| 2584 | 2878 | ||
| 2585 | } // end namespace spv | 2879 | } // end namespace spv |
| 2586 | 2880 | ||
| @@ -75,7 +75,11 @@ | |||
| 75 | "OpenCL_CPP": 4, | 75 | "OpenCL_CPP": 4, |
| 76 | "HLSL": 5, | 76 | "HLSL": 5, |
| 77 | "CPP_for_OpenCL": 6, | 77 | "CPP_for_OpenCL": 6, |
| 78 | - "SYCL": 7 | 78 | + "SYCL": 7, |
| 79 | + "HERO_C": 8, | ||
| 80 | + "NZSL": 9, | ||
| 81 | + "WGSL": 10, | ||
| 82 | + "Slang": 11 | ||
| 79 | } | 83 | } |
| 80 | }, | 84 | }, |
| 81 | { | 85 | { |
| @@ -175,6 +179,9 @@ | |||
| 175 | "SubgroupsPerWorkgroupId": 37, | 179 | "SubgroupsPerWorkgroupId": 37, |
| 176 | "LocalSizeId": 38, | 180 | "LocalSizeId": 38, |
| 177 | "LocalSizeHintId": 39, | 181 | "LocalSizeHintId": 39, |
| 182 | + "NonCoherentColorAttachmentReadEXT": 4169, | ||
| 183 | + "NonCoherentDepthAttachmentReadEXT": 4170, | ||
| 184 | + "NonCoherentStencilAttachmentReadEXT": 4171, | ||
| 178 | "SubgroupUniformControlFlowKHR": 4421, | 185 | "SubgroupUniformControlFlowKHR": 4421, |
| 179 | "PostDepthCoverage": 4446, | 186 | "PostDepthCoverage": 4446, |
| 180 | "DenormPreserve": 4459, | 187 | "DenormPreserve": 4459, |
| @@ -184,6 +191,11 @@ | |||
| 184 | "RoundingModeRTZ": 4463, | 191 | "RoundingModeRTZ": 4463, |
| 185 | "EarlyAndLateFragmentTestsAMD": 5017, | 192 | "EarlyAndLateFragmentTestsAMD": 5017, |
| 186 | "StencilRefReplacingEXT": 5027, | 193 | "StencilRefReplacingEXT": 5027, |
| 194 | + "CoalescingAMDX": 5069, | ||
| 195 | + "MaxNodeRecursionAMDX": 5071, | ||
| 196 | + "StaticNumWorkgroupsAMDX": 5072, | ||
| 197 | + "ShaderIndexAMDX": 5073, | ||
| 198 | + "MaxNumWorkgroupsAMDX": 5077, | ||
| 187 | "StencilRefUnchangedFrontAMD": 5079, | 199 | "StencilRefUnchangedFrontAMD": 5079, |
| 188 | "StencilRefGreaterFrontAMD": 5080, | 200 | "StencilRefGreaterFrontAMD": 5080, |
| 189 | "StencilRefLessFrontAMD": 5081, | 201 | "StencilRefLessFrontAMD": 5081, |
| @@ -214,6 +226,8 @@ | |||
| 214 | "NoGlobalOffsetINTEL": 5895, | 226 | "NoGlobalOffsetINTEL": 5895, |
| 215 | "NumSIMDWorkitemsINTEL": 5896, | 227 | "NumSIMDWorkitemsINTEL": 5896, |
| 216 | "SchedulerTargetFmaxMhzINTEL": 5903, | 228 | "SchedulerTargetFmaxMhzINTEL": 5903, |
| 229 | + "StreamingInterfaceINTEL": 6154, | ||
| 230 | + "RegisterMapInterfaceINTEL": 6160, | ||
| 217 | "NamedBarrierCountINTEL": 6417 | 231 | "NamedBarrierCountINTEL": 6417 |
| 218 | } | 232 | } |
| 219 | }, | 233 | }, |
| @@ -235,6 +249,9 @@ | |||
| 235 | "AtomicCounter": 10, | 249 | "AtomicCounter": 10, |
| 236 | "Image": 11, | 250 | "Image": 11, |
| 237 | "StorageBuffer": 12, | 251 | "StorageBuffer": 12, |
| 252 | + "TileImageEXT": 4172, | ||
| 253 | + "NodePayloadAMDX": 5068, | ||
| 254 | + "NodeOutputPayloadAMDX": 5076, | ||
| 238 | "CallableDataKHR": 5328, | 255 | "CallableDataKHR": 5328, |
| 239 | "CallableDataNV": 5328, | 256 | "CallableDataNV": 5328, |
| 240 | "IncomingCallableDataKHR": 5329, | 257 | "IncomingCallableDataKHR": 5329, |
| @@ -249,6 +266,7 @@ | |||
| 249 | "ShaderRecordBufferNV": 5343, | 266 | "ShaderRecordBufferNV": 5343, |
| 250 | "PhysicalStorageBuffer": 5349, | 267 | "PhysicalStorageBuffer": 5349, |
| 251 | "PhysicalStorageBufferEXT": 5349, | 268 | "PhysicalStorageBufferEXT": 5349, |
| 269 | + "HitObjectAttributeNV": 5385, | ||
| 252 | "TaskPayloadWorkgroupEXT": 5402, | 270 | "TaskPayloadWorkgroupEXT": 5402, |
| 253 | "CodeSectionINTEL": 5605, | 271 | "CodeSectionINTEL": 5605, |
| 254 | "DeviceOnlyINTEL": 5936, | 272 | "DeviceOnlyINTEL": 5936, |
| @@ -266,7 +284,8 @@ | |||
| 266 | "Cube": 3, | 284 | "Cube": 3, |
| 267 | "Rect": 4, | 285 | "Rect": 4, |
| 268 | "Buffer": 5, | 286 | "Buffer": 5, |
| 269 | - "SubpassData": 6 | 287 | + "SubpassData": 6, |
| 288 | + "TileImageDataEXT": 4173 | ||
| 270 | } | 289 | } |
| 271 | }, | 290 | }, |
| 272 | { | 291 | { |
| @@ -387,7 +406,9 @@ | |||
| 387 | "HalfFloat": 13, | 406 | "HalfFloat": 13, |
| 388 | "Float": 14, | 407 | "Float": 14, |
| 389 | "UnormInt24": 15, | 408 | "UnormInt24": 15, |
| 390 | - "UnormInt101010_2": 16 | 409 | + "UnormInt101010_2": 16, |
| 410 | + "UnsignedIntRaw10EXT": 19, | ||
| 411 | + "UnsignedIntRaw12EXT": 20 | ||
| 391 | } | 412 | } |
| 392 | }, | 413 | }, |
| 393 | { | 414 | { |
| @@ -474,7 +495,8 @@ | |||
| 474 | "NoAlias": 4, | 495 | "NoAlias": 4, |
| 475 | "NoCapture": 5, | 496 | "NoCapture": 5, |
| 476 | "NoWrite": 6, | 497 | "NoWrite": 6, |
| 477 | - "NoReadWrite": 7 | 498 | + "NoReadWrite": 7, |
| 499 | + "RuntimeAlignedINTEL": 5940 | ||
| 478 | } | 500 | } |
| 479 | }, | 501 | }, |
| 480 | { | 502 | { |
| @@ -531,7 +553,13 @@ | |||
| 531 | "MaxByteOffsetId": 47, | 553 | "MaxByteOffsetId": 47, |
| 532 | "NoSignedWrap": 4469, | 554 | "NoSignedWrap": 4469, |
| 533 | "NoUnsignedWrap": 4470, | 555 | "NoUnsignedWrap": 4470, |
| 556 | + "WeightTextureQCOM": 4487, | ||
| 557 | + "BlockMatchTextureQCOM": 4488, | ||
| 534 | "ExplicitInterpAMD": 4999, | 558 | "ExplicitInterpAMD": 4999, |
| 559 | + "NodeSharesPayloadLimitsWithAMDX": 5019, | ||
| 560 | + "NodeMaxPayloadsAMDX": 5020, | ||
| 561 | + "TrackFinishWritingAMDX": 5078, | ||
| 562 | + "PayloadNodeNameAMDX": 5091, | ||
| 535 | "OverrideCoverageNV": 5248, | 563 | "OverrideCoverageNV": 5248, |
| 536 | "PassthroughNV": 5250, | 564 | "PassthroughNV": 5250, |
| 537 | "ViewportRelativeNV": 5252, | 565 | "ViewportRelativeNV": 5252, |
| @@ -548,6 +576,7 @@ | |||
| 548 | "RestrictPointerEXT": 5355, | 576 | "RestrictPointerEXT": 5355, |
| 549 | "AliasedPointer": 5356, | 577 | "AliasedPointer": 5356, |
| 550 | "AliasedPointerEXT": 5356, | 578 | "AliasedPointerEXT": 5356, |
| 579 | + "HitObjectShaderRecordBufferNV": 5386, | ||
| 551 | "BindlessSamplerNV": 5398, | 580 | "BindlessSamplerNV": 5398, |
| 552 | "BindlessImageNV": 5399, | 581 | "BindlessImageNV": 5399, |
| 553 | "BoundSamplerNV": 5400, | 582 | "BoundSamplerNV": 5400, |
| @@ -580,20 +609,45 @@ | |||
| 580 | "MergeINTEL": 5834, | 609 | "MergeINTEL": 5834, |
| 581 | "BankBitsINTEL": 5835, | 610 | "BankBitsINTEL": 5835, |
| 582 | "ForcePow2DepthINTEL": 5836, | 611 | "ForcePow2DepthINTEL": 5836, |
| 612 | + "StridesizeINTEL": 5883, | ||
| 613 | + "WordsizeINTEL": 5884, | ||
| 614 | + "TrueDualPortINTEL": 5885, | ||
| 583 | "BurstCoalesceINTEL": 5899, | 615 | "BurstCoalesceINTEL": 5899, |
| 584 | "CacheSizeINTEL": 5900, | 616 | "CacheSizeINTEL": 5900, |
| 585 | "DontStaticallyCoalesceINTEL": 5901, | 617 | "DontStaticallyCoalesceINTEL": 5901, |
| 586 | "PrefetchINTEL": 5902, | 618 | "PrefetchINTEL": 5902, |
| 587 | "StallEnableINTEL": 5905, | 619 | "StallEnableINTEL": 5905, |
| 588 | "FuseLoopsInFunctionINTEL": 5907, | 620 | "FuseLoopsInFunctionINTEL": 5907, |
| 621 | + "MathOpDSPModeINTEL": 5909, | ||
| 589 | "AliasScopeINTEL": 5914, | 622 | "AliasScopeINTEL": 5914, |
| 590 | "NoAliasINTEL": 5915, | 623 | "NoAliasINTEL": 5915, |
| 624 | + "InitiationIntervalINTEL": 5917, | ||
| 625 | + "MaxConcurrencyINTEL": 5918, | ||
| 626 | + "PipelineEnableINTEL": 5919, | ||
| 591 | "BufferLocationINTEL": 5921, | 627 | "BufferLocationINTEL": 5921, |
| 592 | "IOPipeStorageINTEL": 5944, | 628 | "IOPipeStorageINTEL": 5944, |
| 593 | "FunctionFloatingPointModeINTEL": 6080, | 629 | "FunctionFloatingPointModeINTEL": 6080, |
| 594 | "SingleElementVectorINTEL": 6085, | 630 | "SingleElementVectorINTEL": 6085, |
| 595 | "VectorComputeCallableFunctionINTEL": 6087, | 631 | "VectorComputeCallableFunctionINTEL": 6087, |
| 596 | - "MediaBlockIOINTEL": 6140 | 632 | + "MediaBlockIOINTEL": 6140, |
| 633 | + "StallFreeINTEL": 6151, | ||
| 634 | + "FPMaxErrorDecorationINTEL": 6170, | ||
| 635 | + "LatencyControlLabelINTEL": 6172, | ||
| 636 | + "LatencyControlConstraintINTEL": 6173, | ||
| 637 | + "ConduitKernelArgumentINTEL": 6175, | ||
| 638 | + "RegisterMapKernelArgumentINTEL": 6176, | ||
| 639 | + "MMHostInterfaceAddressWidthINTEL": 6177, | ||
| 640 | + "MMHostInterfaceDataWidthINTEL": 6178, | ||
| 641 | + "MMHostInterfaceLatencyINTEL": 6179, | ||
| 642 | + "MMHostInterfaceReadWriteModeINTEL": 6180, | ||
| 643 | + "MMHostInterfaceMaxBurstINTEL": 6181, | ||
| 644 | + "MMHostInterfaceWaitRequestINTEL": 6182, | ||
| 645 | + "StableKernelArgumentINTEL": 6183, | ||
| 646 | + "HostAccessINTEL": 6188, | ||
| 647 | + "InitModeINTEL": 6190, | ||
| 648 | + "ImplementInRegisterMapINTEL": 6191, | ||
| 649 | + "CacheControlLoadINTEL": 6442, | ||
| 650 | + "CacheControlStoreINTEL": 6443 | ||
| 597 | } | 651 | } |
| 598 | }, | 652 | }, |
| 599 | { | 653 | { |
| @@ -672,6 +726,8 @@ | |||
| 672 | "BaryCoordSmoothSampleAMD": 4997, | 726 | "BaryCoordSmoothSampleAMD": 4997, |
| 673 | "BaryCoordPullModelAMD": 4998, | 727 | "BaryCoordPullModelAMD": 4998, |
| 674 | "FragStencilRefEXT": 5014, | 728 | "FragStencilRefEXT": 5014, |
| 729 | + "CoalescedInputCountAMDX": 5021, | ||
| 730 | + "ShaderIndexAMDX": 5073, | ||
| 675 | "ViewportMaskNV": 5253, | 731 | "ViewportMaskNV": 5253, |
| 676 | "SecondaryPositionNV": 5257, | 732 | "SecondaryPositionNV": 5257, |
| 677 | "SecondaryViewportMaskNV": 5258, | 733 | "SecondaryViewportMaskNV": 5258, |
| @@ -724,6 +780,9 @@ | |||
| 724 | "HitKindKHR": 5333, | 780 | "HitKindKHR": 5333, |
| 725 | "HitKindNV": 5333, | 781 | "HitKindNV": 5333, |
| 726 | "CurrentRayTimeNV": 5334, | 782 | "CurrentRayTimeNV": 5334, |
| 783 | + "HitTriangleVertexPositionsKHR": 5335, | ||
| 784 | + "HitMicroTriangleVertexPositionsNV": 5337, | ||
| 785 | + "HitMicroTriangleVertexBarycentricsNV": 5344, | ||
| 727 | "IncomingRayFlagsKHR": 5351, | 786 | "IncomingRayFlagsKHR": 5351, |
| 728 | "IncomingRayFlagsNV": 5351, | 787 | "IncomingRayFlagsNV": 5351, |
| 729 | "RayGeometryIndexKHR": 5352, | 788 | "RayGeometryIndexKHR": 5352, |
| @@ -731,6 +790,8 @@ | |||
| 731 | "SMCountNV": 5375, | 790 | "SMCountNV": 5375, |
| 732 | "WarpIDNV": 5376, | 791 | "WarpIDNV": 5376, |
| 733 | "SMIDNV": 5377, | 792 | "SMIDNV": 5377, |
| 793 | + "HitKindFrontFacingMicroTriangleNV": 5405, | ||
| 794 | + "HitKindBackFacingMicroTriangleNV": 5406, | ||
| 734 | "CullMaskKHR": 6021 | 795 | "CullMaskKHR": 6021 |
| 735 | } | 796 | } |
| 736 | }, | 797 | }, |
| @@ -764,7 +825,9 @@ | |||
| 764 | "LoopCoalesceINTEL": 20, | 825 | "LoopCoalesceINTEL": 20, |
| 765 | "MaxInterleavingINTEL": 21, | 826 | "MaxInterleavingINTEL": 21, |
| 766 | "SpeculatedIterationsINTEL": 22, | 827 | "SpeculatedIterationsINTEL": 22, |
| 767 | - "NoFusionINTEL": 23 | 828 | + "NoFusionINTEL": 23, |
| 829 | + "LoopCountINTEL": 24, | ||
| 830 | + "MaxReinvocationDelayINTEL": 25 | ||
| 768 | } | 831 | } |
| 769 | }, | 832 | }, |
| 770 | { | 833 | { |
| @@ -944,6 +1007,9 @@ | |||
| 944 | "ShaderViewportIndex": 70, | 1007 | "ShaderViewportIndex": 70, |
| 945 | "UniformDecoration": 71, | 1008 | "UniformDecoration": 71, |
| 946 | "CoreBuiltinsARM": 4165, | 1009 | "CoreBuiltinsARM": 4165, |
| 1010 | + "TileImageColorReadAccessEXT": 4166, | ||
| 1011 | + "TileImageDepthReadAccessEXT": 4167, | ||
| 1012 | + "TileImageStencilReadAccessEXT": 4168, | ||
| 947 | "FragmentShadingRateKHR": 4422, | 1013 | "FragmentShadingRateKHR": 4422, |
| 948 | "SubgroupBallotKHR": 4423, | 1014 | "SubgroupBallotKHR": 4423, |
| 949 | "DrawParameters": 4427, | 1015 | "DrawParameters": 4427, |
| @@ -975,6 +1041,9 @@ | |||
| 975 | "RayQueryKHR": 4472, | 1041 | "RayQueryKHR": 4472, |
| 976 | "RayTraversalPrimitiveCullingKHR": 4478, | 1042 | "RayTraversalPrimitiveCullingKHR": 4478, |
| 977 | "RayTracingKHR": 4479, | 1043 | "RayTracingKHR": 4479, |
| 1044 | + "TextureSampleWeightedQCOM": 4484, | ||
| 1045 | + "TextureBoxFilterQCOM": 4485, | ||
| 1046 | + "TextureBlockMatchQCOM": 4486, | ||
| 978 | "Float16ImageAMD": 5008, | 1047 | "Float16ImageAMD": 5008, |
| 979 | "ImageGatherBiasLodAMD": 5009, | 1048 | "ImageGatherBiasLodAMD": 5009, |
| 980 | "FragmentMaskAMD": 5010, | 1049 | "FragmentMaskAMD": 5010, |
| @@ -982,6 +1051,7 @@ | |||
| 982 | "ImageReadWriteLodAMD": 5015, | 1051 | "ImageReadWriteLodAMD": 5015, |
| 983 | "Int64ImageEXT": 5016, | 1052 | "Int64ImageEXT": 5016, |
| 984 | "ShaderClockKHR": 5055, | 1053 | "ShaderClockKHR": 5055, |
| 1054 | + "ShaderEnqueueAMDX": 5067, | ||
| 985 | "SampleMaskOverrideCoverageNV": 5249, | 1055 | "SampleMaskOverrideCoverageNV": 5249, |
| 986 | "GeometryShaderPassthroughNV": 5251, | 1056 | "GeometryShaderPassthroughNV": 5251, |
| 987 | "ShaderViewportIndexLayerEXT": 5254, | 1057 | "ShaderViewportIndexLayerEXT": 5254, |
| @@ -1023,6 +1093,7 @@ | |||
| 1023 | "UniformTexelBufferArrayNonUniformIndexingEXT": 5311, | 1093 | "UniformTexelBufferArrayNonUniformIndexingEXT": 5311, |
| 1024 | "StorageTexelBufferArrayNonUniformIndexing": 5312, | 1094 | "StorageTexelBufferArrayNonUniformIndexing": 5312, |
| 1025 | "StorageTexelBufferArrayNonUniformIndexingEXT": 5312, | 1095 | "StorageTexelBufferArrayNonUniformIndexingEXT": 5312, |
| 1096 | + "RayTracingPositionFetchKHR": 5336, | ||
| 1026 | "RayTracingNV": 5340, | 1097 | "RayTracingNV": 5340, |
| 1027 | "RayTracingMotionBlurNV": 5341, | 1098 | "RayTracingMotionBlurNV": 5341, |
| 1028 | "VulkanMemoryModel": 5345, | 1099 | "VulkanMemoryModel": 5345, |
| @@ -1040,8 +1111,12 @@ | |||
| 1040 | "FragmentShaderPixelInterlockEXT": 5378, | 1111 | "FragmentShaderPixelInterlockEXT": 5378, |
| 1041 | "DemoteToHelperInvocation": 5379, | 1112 | "DemoteToHelperInvocation": 5379, |
| 1042 | "DemoteToHelperInvocationEXT": 5379, | 1113 | "DemoteToHelperInvocationEXT": 5379, |
| 1114 | + "DisplacementMicromapNV": 5380, | ||
| 1043 | "RayTracingOpacityMicromapEXT": 5381, | 1115 | "RayTracingOpacityMicromapEXT": 5381, |
| 1116 | + "ShaderInvocationReorderNV": 5383, | ||
| 1044 | "BindlessTextureNV": 5390, | 1117 | "BindlessTextureNV": 5390, |
| 1118 | + "RayQueryPositionFetchKHR": 5391, | ||
| 1119 | + "RayTracingDisplacementMicromapNV": 5409, | ||
| 1045 | "SubgroupShuffleINTEL": 5568, | 1120 | "SubgroupShuffleINTEL": 5568, |
| 1046 | "SubgroupBufferBlockIOINTEL": 5569, | 1121 | "SubgroupBufferBlockIOINTEL": 5569, |
| 1047 | "SubgroupImageBlockIOINTEL": 5570, | 1122 | "SubgroupImageBlockIOINTEL": 5570, |
| @@ -1074,10 +1149,13 @@ | |||
| 1074 | "FPGAMemoryAccessesINTEL": 5898, | 1149 | "FPGAMemoryAccessesINTEL": 5898, |
| 1075 | "FPGAClusterAttributesINTEL": 5904, | 1150 | "FPGAClusterAttributesINTEL": 5904, |
| 1076 | "LoopFuseINTEL": 5906, | 1151 | "LoopFuseINTEL": 5906, |
| 1152 | + "FPGADSPControlINTEL": 5908, | ||
| 1077 | "MemoryAccessAliasingINTEL": 5910, | 1153 | "MemoryAccessAliasingINTEL": 5910, |
| 1154 | + "FPGAInvocationPipeliningAttributesINTEL": 5916, | ||
| 1078 | "FPGABufferLocationINTEL": 5920, | 1155 | "FPGABufferLocationINTEL": 5920, |
| 1079 | "ArbitraryPrecisionFixedPointINTEL": 5922, | 1156 | "ArbitraryPrecisionFixedPointINTEL": 5922, |
| 1080 | "USMStorageClassesINTEL": 5935, | 1157 | "USMStorageClassesINTEL": 5935, |
| 1158 | + "RuntimeAlignedAttributeINTEL": 5939, | ||
| 1081 | "IOPipesINTEL": 5943, | 1159 | "IOPipesINTEL": 5943, |
| 1082 | "BlockingPipesINTEL": 5945, | 1160 | "BlockingPipesINTEL": 5945, |
| 1083 | "FPGARegINTEL": 5948, | 1161 | "FPGARegINTEL": 5948, |
| @@ -1090,16 +1168,26 @@ | |||
| 1090 | "DotProduct": 6019, | 1168 | "DotProduct": 6019, |
| 1091 | "DotProductKHR": 6019, | 1169 | "DotProductKHR": 6019, |
| 1092 | "RayCullMaskKHR": 6020, | 1170 | "RayCullMaskKHR": 6020, |
| 1171 | + "CooperativeMatrixKHR": 6022, | ||
| 1093 | "BitInstructions": 6025, | 1172 | "BitInstructions": 6025, |
| 1094 | "GroupNonUniformRotateKHR": 6026, | 1173 | "GroupNonUniformRotateKHR": 6026, |
| 1095 | "AtomicFloat32AddEXT": 6033, | 1174 | "AtomicFloat32AddEXT": 6033, |
| 1096 | "AtomicFloat64AddEXT": 6034, | 1175 | "AtomicFloat64AddEXT": 6034, |
| 1097 | - "LongConstantCompositeINTEL": 6089, | 1176 | + "LongCompositesINTEL": 6089, |
| 1098 | "OptNoneINTEL": 6094, | 1177 | "OptNoneINTEL": 6094, |
| 1099 | "AtomicFloat16AddEXT": 6095, | 1178 | "AtomicFloat16AddEXT": 6095, |
| 1100 | "DebugInfoModuleINTEL": 6114, | 1179 | "DebugInfoModuleINTEL": 6114, |
| 1180 | + "BFloat16ConversionINTEL": 6115, | ||
| 1101 | "SplitBarrierINTEL": 6141, | 1181 | "SplitBarrierINTEL": 6141, |
| 1102 | - "GroupUniformArithmeticKHR": 6400 | 1182 | + "FPGAClusterAttributesV2INTEL": 6150, |
| 1183 | + "FPGAKernelAttributesv2INTEL": 6161, | ||
| 1184 | + "FPMaxErrorINTEL": 6169, | ||
| 1185 | + "FPGALatencyControlINTEL": 6171, | ||
| 1186 | + "FPGAArgumentInterfacesINTEL": 6174, | ||
| 1187 | + "GlobalVariableHostAccessINTEL": 6187, | ||
| 1188 | + "GlobalVariableFPGADecorationsINTEL": 6189, | ||
| 1189 | + "GroupUniformArithmeticKHR": 6400, | ||
| 1190 | + "CacheControlsINTEL": 6441 | ||
| 1103 | } | 1191 | } |
| 1104 | }, | 1192 | }, |
| 1105 | { | 1193 | { |
| @@ -1212,6 +1300,80 @@ | |||
| 1212 | "PackedVectorFormat4x8BitKHR": 0 | 1300 | "PackedVectorFormat4x8BitKHR": 0 |
| 1213 | } | 1301 | } |
| 1214 | }, | 1302 | }, |
| 1303 | + { | ||
| 1304 | + "Name": "CooperativeMatrixOperands", | ||
| 1305 | + "Type": "Bit", | ||
| 1306 | + "Values": | ||
| 1307 | + { | ||
| 1308 | + "MatrixASignedComponentsKHR": 0, | ||
| 1309 | + "MatrixBSignedComponentsKHR": 1, | ||
| 1310 | + "MatrixCSignedComponentsKHR": 2, | ||
| 1311 | + "MatrixResultSignedComponentsKHR": 3, | ||
| 1312 | + "SaturatingAccumulationKHR": 4 | ||
| 1313 | + } | ||
| 1314 | + }, | ||
| 1315 | + { | ||
| 1316 | + "Name": "CooperativeMatrixLayout", | ||
| 1317 | + "Type": "Value", | ||
| 1318 | + "Values": | ||
| 1319 | + { | ||
| 1320 | + "RowMajorKHR": 0, | ||
| 1321 | + "ColumnMajorKHR": 1 | ||
| 1322 | + } | ||
| 1323 | + }, | ||
| 1324 | + { | ||
| 1325 | + "Name": "CooperativeMatrixUse", | ||
| 1326 | + "Type": "Value", | ||
| 1327 | + "Values": | ||
| 1328 | + { | ||
| 1329 | + "MatrixAKHR": 0, | ||
| 1330 | + "MatrixBKHR": 1, | ||
| 1331 | + "MatrixAccumulatorKHR": 2 | ||
| 1332 | + } | ||
| 1333 | + }, | ||
| 1334 | + { | ||
| 1335 | + "Name": "InitializationModeQualifier", | ||
| 1336 | + "Type": "Value", | ||
| 1337 | + "Values": | ||
| 1338 | + { | ||
| 1339 | + "InitOnDeviceReprogramINTEL": 0, | ||
| 1340 | + "InitOnDeviceResetINTEL": 1 | ||
| 1341 | + } | ||
| 1342 | + }, | ||
| 1343 | + { | ||
| 1344 | + "Name": "HostAccessQualifier", | ||
| 1345 | + "Type": "Value", | ||
| 1346 | + "Values": | ||
| 1347 | + { | ||
| 1348 | + "NoneINTEL": 0, | ||
| 1349 | + "ReadINTEL": 1, | ||
| 1350 | + "WriteINTEL": 2, | ||
| 1351 | + "ReadWriteINTEL": 3 | ||
| 1352 | + } | ||
| 1353 | + }, | ||
| 1354 | + { | ||
| 1355 | + "Name": "LoadCacheControl", | ||
| 1356 | + "Type": "Value", | ||
| 1357 | + "Values": | ||
| 1358 | + { | ||
| 1359 | + "UncachedINTEL": 0, | ||
| 1360 | + "CachedINTEL": 1, | ||
| 1361 | + "StreamingINTEL": 2, | ||
| 1362 | + "InvalidateAfterReadINTEL": 3, | ||
| 1363 | + "ConstCachedINTEL": 4 | ||
| 1364 | + } | ||
| 1365 | + }, | ||
| 1366 | + { | ||
| 1367 | + "Name": "StoreCacheControl", | ||
| 1368 | + "Type": "Value", | ||
| 1369 | + "Values": | ||
| 1370 | + { | ||
| 1371 | + "UncachedINTEL": 0, | ||
| 1372 | + "WriteThroughINTEL": 1, | ||
| 1373 | + "WriteBackINTEL": 2, | ||
| 1374 | + "StreamingINTEL": 3 | ||
| 1375 | + } | ||
| 1376 | + }, | ||
| 1215 | { | 1377 | { |
| 1216 | "Name": "Op", | 1378 | "Name": "Op", |
| 1217 | "Type": "Value", | 1379 | "Type": "Value", |
| @@ -1561,6 +1723,9 @@ | |||
| 1561 | "OpPtrEqual": 401, | 1723 | "OpPtrEqual": 401, |
| 1562 | "OpPtrNotEqual": 402, | 1724 | "OpPtrNotEqual": 402, |
| 1563 | "OpPtrDiff": 403, | 1725 | "OpPtrDiff": 403, |
| 1726 | + "OpColorAttachmentReadEXT": 4160, | ||
| 1727 | + "OpDepthAttachmentReadEXT": 4161, | ||
| 1728 | + "OpStencilAttachmentReadEXT": 4162, | ||
| 1564 | "OpTerminateInvocation": 4416, | 1729 | "OpTerminateInvocation": 4416, |
| 1565 | "OpSubgroupBallotKHR": 4421, | 1730 | "OpSubgroupBallotKHR": 4421, |
| 1566 | "OpSubgroupFirstInvocationKHR": 4422, | 1731 | "OpSubgroupFirstInvocationKHR": 4422, |
| @@ -1586,6 +1751,11 @@ | |||
| 1586 | "OpUDotAccSatKHR": 4454, | 1751 | "OpUDotAccSatKHR": 4454, |
| 1587 | "OpSUDotAccSat": 4455, | 1752 | "OpSUDotAccSat": 4455, |
| 1588 | "OpSUDotAccSatKHR": 4455, | 1753 | "OpSUDotAccSatKHR": 4455, |
| 1754 | + "OpTypeCooperativeMatrixKHR": 4456, | ||
| 1755 | + "OpCooperativeMatrixLoadKHR": 4457, | ||
| 1756 | + "OpCooperativeMatrixStoreKHR": 4458, | ||
| 1757 | + "OpCooperativeMatrixMulAddKHR": 4459, | ||
| 1758 | + "OpCooperativeMatrixLengthKHR": 4460, | ||
| 1589 | "OpTypeRayQueryKHR": 4472, | 1759 | "OpTypeRayQueryKHR": 4472, |
| 1590 | "OpRayQueryInitializeKHR": 4473, | 1760 | "OpRayQueryInitializeKHR": 4473, |
| 1591 | "OpRayQueryTerminateKHR": 4474, | 1761 | "OpRayQueryTerminateKHR": 4474, |
| @@ -1593,6 +1763,10 @@ | |||
| 1593 | "OpRayQueryConfirmIntersectionKHR": 4476, | 1763 | "OpRayQueryConfirmIntersectionKHR": 4476, |
| 1594 | "OpRayQueryProceedKHR": 4477, | 1764 | "OpRayQueryProceedKHR": 4477, |
| 1595 | "OpRayQueryGetIntersectionTypeKHR": 4479, | 1765 | "OpRayQueryGetIntersectionTypeKHR": 4479, |
| 1766 | + "OpImageSampleWeightedQCOM": 4480, | ||
| 1767 | + "OpImageBoxFilterQCOM": 4481, | ||
| 1768 | + "OpImageBlockMatchSSDQCOM": 4482, | ||
| 1769 | + "OpImageBlockMatchSADQCOM": 4483, | ||
| 1596 | "OpGroupIAddNonUniformAMD": 5000, | 1770 | "OpGroupIAddNonUniformAMD": 5000, |
| 1597 | "OpGroupFAddNonUniformAMD": 5001, | 1771 | "OpGroupFAddNonUniformAMD": 5001, |
| 1598 | "OpGroupFMinNonUniformAMD": 5002, | 1772 | "OpGroupFMinNonUniformAMD": 5002, |
| @@ -1604,11 +1778,49 @@ | |||
| 1604 | "OpFragmentMaskFetchAMD": 5011, | 1778 | "OpFragmentMaskFetchAMD": 5011, |
| 1605 | "OpFragmentFetchAMD": 5012, | 1779 | "OpFragmentFetchAMD": 5012, |
| 1606 | "OpReadClockKHR": 5056, | 1780 | "OpReadClockKHR": 5056, |
| 1781 | + "OpFinalizeNodePayloadsAMDX": 5075, | ||
| 1782 | + "OpFinishWritingNodePayloadAMDX": 5078, | ||
| 1783 | + "OpInitializeNodePayloadsAMDX": 5090, | ||
| 1784 | + "OpHitObjectRecordHitMotionNV": 5249, | ||
| 1785 | + "OpHitObjectRecordHitWithIndexMotionNV": 5250, | ||
| 1786 | + "OpHitObjectRecordMissMotionNV": 5251, | ||
| 1787 | + "OpHitObjectGetWorldToObjectNV": 5252, | ||
| 1788 | + "OpHitObjectGetObjectToWorldNV": 5253, | ||
| 1789 | + "OpHitObjectGetObjectRayDirectionNV": 5254, | ||
| 1790 | + "OpHitObjectGetObjectRayOriginNV": 5255, | ||
| 1791 | + "OpHitObjectTraceRayMotionNV": 5256, | ||
| 1792 | + "OpHitObjectGetShaderRecordBufferHandleNV": 5257, | ||
| 1793 | + "OpHitObjectGetShaderBindingTableRecordIndexNV": 5258, | ||
| 1794 | + "OpHitObjectRecordEmptyNV": 5259, | ||
| 1795 | + "OpHitObjectTraceRayNV": 5260, | ||
| 1796 | + "OpHitObjectRecordHitNV": 5261, | ||
| 1797 | + "OpHitObjectRecordHitWithIndexNV": 5262, | ||
| 1798 | + "OpHitObjectRecordMissNV": 5263, | ||
| 1799 | + "OpHitObjectExecuteShaderNV": 5264, | ||
| 1800 | + "OpHitObjectGetCurrentTimeNV": 5265, | ||
| 1801 | + "OpHitObjectGetAttributesNV": 5266, | ||
| 1802 | + "OpHitObjectGetHitKindNV": 5267, | ||
| 1803 | + "OpHitObjectGetPrimitiveIndexNV": 5268, | ||
| 1804 | + "OpHitObjectGetGeometryIndexNV": 5269, | ||
| 1805 | + "OpHitObjectGetInstanceIdNV": 5270, | ||
| 1806 | + "OpHitObjectGetInstanceCustomIndexNV": 5271, | ||
| 1807 | + "OpHitObjectGetWorldRayDirectionNV": 5272, | ||
| 1808 | + "OpHitObjectGetWorldRayOriginNV": 5273, | ||
| 1809 | + "OpHitObjectGetRayTMaxNV": 5274, | ||
| 1810 | + "OpHitObjectGetRayTMinNV": 5275, | ||
| 1811 | + "OpHitObjectIsEmptyNV": 5276, | ||
| 1812 | + "OpHitObjectIsHitNV": 5277, | ||
| 1813 | + "OpHitObjectIsMissNV": 5278, | ||
| 1814 | + "OpReorderThreadWithHitObjectNV": 5279, | ||
| 1815 | + "OpReorderThreadWithHintNV": 5280, | ||
| 1816 | + "OpTypeHitObjectNV": 5281, | ||
| 1607 | "OpImageSampleFootprintNV": 5283, | 1817 | "OpImageSampleFootprintNV": 5283, |
| 1608 | "OpEmitMeshTasksEXT": 5294, | 1818 | "OpEmitMeshTasksEXT": 5294, |
| 1609 | "OpSetMeshOutputsEXT": 5295, | 1819 | "OpSetMeshOutputsEXT": 5295, |
| 1610 | "OpGroupNonUniformPartitionNV": 5296, | 1820 | "OpGroupNonUniformPartitionNV": 5296, |
| 1611 | "OpWritePackedPrimitiveIndices4x8NV": 5299, | 1821 | "OpWritePackedPrimitiveIndices4x8NV": 5299, |
| 1822 | + "OpFetchMicroTriangleVertexPositionNV": 5300, | ||
| 1823 | + "OpFetchMicroTriangleVertexBarycentricNV": 5301, | ||
| 1612 | "OpReportIntersectionKHR": 5334, | 1824 | "OpReportIntersectionKHR": 5334, |
| 1613 | "OpReportIntersectionNV": 5334, | 1825 | "OpReportIntersectionNV": 5334, |
| 1614 | "OpIgnoreIntersectionNV": 5335, | 1826 | "OpIgnoreIntersectionNV": 5335, |
| @@ -1616,6 +1828,7 @@ | |||
| 1616 | "OpTraceNV": 5337, | 1828 | "OpTraceNV": 5337, |
| 1617 | "OpTraceMotionNV": 5338, | 1829 | "OpTraceMotionNV": 5338, |
| 1618 | "OpTraceRayMotionNV": 5339, | 1830 | "OpTraceRayMotionNV": 5339, |
| 1831 | + "OpRayQueryGetIntersectionTriangleVertexPositionsKHR": 5340, | ||
| 1619 | "OpTypeAccelerationStructureKHR": 5341, | 1832 | "OpTypeAccelerationStructureKHR": 5341, |
| 1620 | "OpTypeAccelerationStructureNV": 5341, | 1833 | "OpTypeAccelerationStructureNV": 5341, |
| 1621 | "OpExecuteCallableNV": 5344, | 1834 | "OpExecuteCallableNV": 5344, |
| @@ -1877,6 +2090,9 @@ | |||
| 1877 | "OpTypeStructContinuedINTEL": 6090, | 2090 | "OpTypeStructContinuedINTEL": 6090, |
| 1878 | "OpConstantCompositeContinuedINTEL": 6091, | 2091 | "OpConstantCompositeContinuedINTEL": 6091, |
| 1879 | "OpSpecConstantCompositeContinuedINTEL": 6092, | 2092 | "OpSpecConstantCompositeContinuedINTEL": 6092, |
| 2093 | + "OpCompositeConstructContinuedINTEL": 6096, | ||
| 2094 | + "OpConvertFToBF16INTEL": 6116, | ||
| 2095 | + "OpConvertBF16ToFINTEL": 6117, | ||
| 1880 | "OpControlBarrierArriveINTEL": 6142, | 2096 | "OpControlBarrierArriveINTEL": 6142, |
| 1881 | "OpControlBarrierWaitINTEL": 6143, | 2097 | "OpControlBarrierWaitINTEL": 6143, |
| 1882 | "OpGroupIMulKHR": 6401, | 2098 | "OpGroupIMulKHR": 6401, |
| @@ -60,6 +60,10 @@ spv = { | |||
| 60 | HLSL = 5, | 60 | HLSL = 5, |
| 61 | CPP_for_OpenCL = 6, | 61 | CPP_for_OpenCL = 6, |
| 62 | SYCL = 7, | 62 | SYCL = 7, |
| 63 | + HERO_C = 8, | ||
| 64 | + NZSL = 9, | ||
| 65 | + WGSL = 10, | ||
| 66 | + Slang = 11, | ||
| 63 | }, | 67 | }, |
| 64 | 68 | ||
| 65 | ExecutionModel = { | 69 | ExecutionModel = { |
| @@ -143,6 +147,9 @@ spv = { | |||
| 143 | SubgroupsPerWorkgroupId = 37, | 147 | SubgroupsPerWorkgroupId = 37, |
| 144 | LocalSizeId = 38, | 148 | LocalSizeId = 38, |
| 145 | LocalSizeHintId = 39, | 149 | LocalSizeHintId = 39, |
| 150 | + NonCoherentColorAttachmentReadEXT = 4169, | ||
| 151 | + NonCoherentDepthAttachmentReadEXT = 4170, | ||
| 152 | + NonCoherentStencilAttachmentReadEXT = 4171, | ||
| 146 | SubgroupUniformControlFlowKHR = 4421, | 153 | SubgroupUniformControlFlowKHR = 4421, |
| 147 | PostDepthCoverage = 4446, | 154 | PostDepthCoverage = 4446, |
| 148 | DenormPreserve = 4459, | 155 | DenormPreserve = 4459, |
| @@ -152,6 +159,11 @@ spv = { | |||
| 152 | RoundingModeRTZ = 4463, | 159 | RoundingModeRTZ = 4463, |
| 153 | EarlyAndLateFragmentTestsAMD = 5017, | 160 | EarlyAndLateFragmentTestsAMD = 5017, |
| 154 | StencilRefReplacingEXT = 5027, | 161 | StencilRefReplacingEXT = 5027, |
| 162 | + CoalescingAMDX = 5069, | ||
| 163 | + MaxNodeRecursionAMDX = 5071, | ||
| 164 | + StaticNumWorkgroupsAMDX = 5072, | ||
| 165 | + ShaderIndexAMDX = 5073, | ||
| 166 | + MaxNumWorkgroupsAMDX = 5077, | ||
| 155 | StencilRefUnchangedFrontAMD = 5079, | 167 | StencilRefUnchangedFrontAMD = 5079, |
| 156 | StencilRefGreaterFrontAMD = 5080, | 168 | StencilRefGreaterFrontAMD = 5080, |
| 157 | StencilRefLessFrontAMD = 5081, | 169 | StencilRefLessFrontAMD = 5081, |
| @@ -182,6 +194,8 @@ spv = { | |||
| 182 | NoGlobalOffsetINTEL = 5895, | 194 | NoGlobalOffsetINTEL = 5895, |
| 183 | NumSIMDWorkitemsINTEL = 5896, | 195 | NumSIMDWorkitemsINTEL = 5896, |
| 184 | SchedulerTargetFmaxMhzINTEL = 5903, | 196 | SchedulerTargetFmaxMhzINTEL = 5903, |
| 197 | + StreamingInterfaceINTEL = 6154, | ||
| 198 | + RegisterMapInterfaceINTEL = 6160, | ||
| 185 | NamedBarrierCountINTEL = 6417, | 199 | NamedBarrierCountINTEL = 6417, |
| 186 | }, | 200 | }, |
| 187 | 201 | ||
| @@ -199,6 +213,9 @@ spv = { | |||
| 199 | AtomicCounter = 10, | 213 | AtomicCounter = 10, |
| 200 | Image = 11, | 214 | Image = 11, |
| 201 | StorageBuffer = 12, | 215 | StorageBuffer = 12, |
| 216 | + TileImageEXT = 4172, | ||
| 217 | + NodePayloadAMDX = 5068, | ||
| 218 | + NodeOutputPayloadAMDX = 5076, | ||
| 202 | CallableDataKHR = 5328, | 219 | CallableDataKHR = 5328, |
| 203 | CallableDataNV = 5328, | 220 | CallableDataNV = 5328, |
| 204 | IncomingCallableDataKHR = 5329, | 221 | IncomingCallableDataKHR = 5329, |
| @@ -213,6 +230,7 @@ spv = { | |||
| 213 | ShaderRecordBufferNV = 5343, | 230 | ShaderRecordBufferNV = 5343, |
| 214 | PhysicalStorageBuffer = 5349, | 231 | PhysicalStorageBuffer = 5349, |
| 215 | PhysicalStorageBufferEXT = 5349, | 232 | PhysicalStorageBufferEXT = 5349, |
| 233 | + HitObjectAttributeNV = 5385, | ||
| 216 | TaskPayloadWorkgroupEXT = 5402, | 234 | TaskPayloadWorkgroupEXT = 5402, |
| 217 | CodeSectionINTEL = 5605, | 235 | CodeSectionINTEL = 5605, |
| 218 | DeviceOnlyINTEL = 5936, | 236 | DeviceOnlyINTEL = 5936, |
| @@ -227,6 +245,7 @@ spv = { | |||
| 227 | Rect = 4, | 245 | Rect = 4, |
| 228 | Buffer = 5, | 246 | Buffer = 5, |
| 229 | SubpassData = 6, | 247 | SubpassData = 6, |
| 248 | + TileImageDataEXT = 4173, | ||
| 230 | }, | 249 | }, |
| 231 | 250 | ||
| 232 | SamplerAddressingMode = { | 251 | SamplerAddressingMode = { |
| @@ -328,6 +347,8 @@ spv = { | |||
| 328 | Float = 14, | 347 | Float = 14, |
| 329 | UnormInt24 = 15, | 348 | UnormInt24 = 15, |
| 330 | UnormInt101010_2 = 16, | 349 | UnormInt101010_2 = 16, |
| 350 | + UnsignedIntRaw10EXT = 19, | ||
| 351 | + UnsignedIntRaw12EXT = 20, | ||
| 331 | }, | 352 | }, |
| 332 | 353 | ||
| 333 | ImageOperandsShift = { | 354 | ImageOperandsShift = { |
| @@ -426,6 +447,7 @@ spv = { | |||
| 426 | NoCapture = 5, | 447 | NoCapture = 5, |
| 427 | NoWrite = 6, | 448 | NoWrite = 6, |
| 428 | NoReadWrite = 7, | 449 | NoReadWrite = 7, |
| 450 | + RuntimeAlignedINTEL = 5940, | ||
| 429 | }, | 451 | }, |
| 430 | 452 | ||
| 431 | Decoration = { | 453 | Decoration = { |
| @@ -478,7 +500,13 @@ spv = { | |||
| 478 | MaxByteOffsetId = 47, | 500 | MaxByteOffsetId = 47, |
| 479 | NoSignedWrap = 4469, | 501 | NoSignedWrap = 4469, |
| 480 | NoUnsignedWrap = 4470, | 502 | NoUnsignedWrap = 4470, |
| 503 | + WeightTextureQCOM = 4487, | ||
| 504 | + BlockMatchTextureQCOM = 4488, | ||
| 481 | ExplicitInterpAMD = 4999, | 505 | ExplicitInterpAMD = 4999, |
| 506 | + NodeSharesPayloadLimitsWithAMDX = 5019, | ||
| 507 | + NodeMaxPayloadsAMDX = 5020, | ||
| 508 | + TrackFinishWritingAMDX = 5078, | ||
| 509 | + PayloadNodeNameAMDX = 5091, | ||
| 482 | OverrideCoverageNV = 5248, | 510 | OverrideCoverageNV = 5248, |
| 483 | PassthroughNV = 5250, | 511 | PassthroughNV = 5250, |
| 484 | ViewportRelativeNV = 5252, | 512 | ViewportRelativeNV = 5252, |
| @@ -495,6 +523,7 @@ spv = { | |||
| 495 | RestrictPointerEXT = 5355, | 523 | RestrictPointerEXT = 5355, |
| 496 | AliasedPointer = 5356, | 524 | AliasedPointer = 5356, |
| 497 | AliasedPointerEXT = 5356, | 525 | AliasedPointerEXT = 5356, |
| 526 | + HitObjectShaderRecordBufferNV = 5386, | ||
| 498 | BindlessSamplerNV = 5398, | 527 | BindlessSamplerNV = 5398, |
| 499 | BindlessImageNV = 5399, | 528 | BindlessImageNV = 5399, |
| 500 | BoundSamplerNV = 5400, | 529 | BoundSamplerNV = 5400, |
| @@ -527,20 +556,45 @@ spv = { | |||
| 527 | MergeINTEL = 5834, | 556 | MergeINTEL = 5834, |
| 528 | BankBitsINTEL = 5835, | 557 | BankBitsINTEL = 5835, |
| 529 | ForcePow2DepthINTEL = 5836, | 558 | ForcePow2DepthINTEL = 5836, |
| 559 | + StridesizeINTEL = 5883, | ||
| 560 | + WordsizeINTEL = 5884, | ||
| 561 | + TrueDualPortINTEL = 5885, | ||
| 530 | BurstCoalesceINTEL = 5899, | 562 | BurstCoalesceINTEL = 5899, |
| 531 | CacheSizeINTEL = 5900, | 563 | CacheSizeINTEL = 5900, |
| 532 | DontStaticallyCoalesceINTEL = 5901, | 564 | DontStaticallyCoalesceINTEL = 5901, |
| 533 | PrefetchINTEL = 5902, | 565 | PrefetchINTEL = 5902, |
| 534 | StallEnableINTEL = 5905, | 566 | StallEnableINTEL = 5905, |
| 535 | FuseLoopsInFunctionINTEL = 5907, | 567 | FuseLoopsInFunctionINTEL = 5907, |
| 568 | + MathOpDSPModeINTEL = 5909, | ||
| 536 | AliasScopeINTEL = 5914, | 569 | AliasScopeINTEL = 5914, |
| 537 | NoAliasINTEL = 5915, | 570 | NoAliasINTEL = 5915, |
| 571 | + InitiationIntervalINTEL = 5917, | ||
| 572 | + MaxConcurrencyINTEL = 5918, | ||
| 573 | + PipelineEnableINTEL = 5919, | ||
| 538 | BufferLocationINTEL = 5921, | 574 | BufferLocationINTEL = 5921, |
| 539 | IOPipeStorageINTEL = 5944, | 575 | IOPipeStorageINTEL = 5944, |
| 540 | FunctionFloatingPointModeINTEL = 6080, | 576 | FunctionFloatingPointModeINTEL = 6080, |
| 541 | SingleElementVectorINTEL = 6085, | 577 | SingleElementVectorINTEL = 6085, |
| 542 | VectorComputeCallableFunctionINTEL = 6087, | 578 | VectorComputeCallableFunctionINTEL = 6087, |
| 543 | MediaBlockIOINTEL = 6140, | 579 | MediaBlockIOINTEL = 6140, |
| 580 | + StallFreeINTEL = 6151, | ||
| 581 | + FPMaxErrorDecorationINTEL = 6170, | ||
| 582 | + LatencyControlLabelINTEL = 6172, | ||
| 583 | + LatencyControlConstraintINTEL = 6173, | ||
| 584 | + ConduitKernelArgumentINTEL = 6175, | ||
| 585 | + RegisterMapKernelArgumentINTEL = 6176, | ||
| 586 | + MMHostInterfaceAddressWidthINTEL = 6177, | ||
| 587 | + MMHostInterfaceDataWidthINTEL = 6178, | ||
| 588 | + MMHostInterfaceLatencyINTEL = 6179, | ||
| 589 | + MMHostInterfaceReadWriteModeINTEL = 6180, | ||
| 590 | + MMHostInterfaceMaxBurstINTEL = 6181, | ||
| 591 | + MMHostInterfaceWaitRequestINTEL = 6182, | ||
| 592 | + StableKernelArgumentINTEL = 6183, | ||
| 593 | + HostAccessINTEL = 6188, | ||
| 594 | + InitModeINTEL = 6190, | ||
| 595 | + ImplementInRegisterMapINTEL = 6191, | ||
| 596 | + CacheControlLoadINTEL = 6442, | ||
| 597 | + CacheControlStoreINTEL = 6443, | ||
| 544 | }, | 598 | }, |
| 545 | 599 | ||
| 546 | BuiltIn = { | 600 | BuiltIn = { |
| @@ -615,6 +669,8 @@ spv = { | |||
| 615 | BaryCoordSmoothSampleAMD = 4997, | 669 | BaryCoordSmoothSampleAMD = 4997, |
| 616 | BaryCoordPullModelAMD = 4998, | 670 | BaryCoordPullModelAMD = 4998, |
| 617 | FragStencilRefEXT = 5014, | 671 | FragStencilRefEXT = 5014, |
| 672 | + CoalescedInputCountAMDX = 5021, | ||
| 673 | + ShaderIndexAMDX = 5073, | ||
| 618 | ViewportMaskNV = 5253, | 674 | ViewportMaskNV = 5253, |
| 619 | SecondaryPositionNV = 5257, | 675 | SecondaryPositionNV = 5257, |
| 620 | SecondaryViewportMaskNV = 5258, | 676 | SecondaryViewportMaskNV = 5258, |
| @@ -667,6 +723,9 @@ spv = { | |||
| 667 | HitKindKHR = 5333, | 723 | HitKindKHR = 5333, |
| 668 | HitKindNV = 5333, | 724 | HitKindNV = 5333, |
| 669 | CurrentRayTimeNV = 5334, | 725 | CurrentRayTimeNV = 5334, |
| 726 | + HitTriangleVertexPositionsKHR = 5335, | ||
| 727 | + HitMicroTriangleVertexPositionsNV = 5337, | ||
| 728 | + HitMicroTriangleVertexBarycentricsNV = 5344, | ||
| 670 | IncomingRayFlagsKHR = 5351, | 729 | IncomingRayFlagsKHR = 5351, |
| 671 | IncomingRayFlagsNV = 5351, | 730 | IncomingRayFlagsNV = 5351, |
| 672 | RayGeometryIndexKHR = 5352, | 731 | RayGeometryIndexKHR = 5352, |
| @@ -674,6 +733,8 @@ spv = { | |||
| 674 | SMCountNV = 5375, | 733 | SMCountNV = 5375, |
| 675 | WarpIDNV = 5376, | 734 | WarpIDNV = 5376, |
| 676 | SMIDNV = 5377, | 735 | SMIDNV = 5377, |
| 736 | + HitKindFrontFacingMicroTriangleNV = 5405, | ||
| 737 | + HitKindBackFacingMicroTriangleNV = 5406, | ||
| 677 | CullMaskKHR = 6021, | 738 | CullMaskKHR = 6021, |
| 678 | }, | 739 | }, |
| 679 | 740 | ||
| @@ -706,6 +767,8 @@ spv = { | |||
| 706 | MaxInterleavingINTEL = 21, | 767 | MaxInterleavingINTEL = 21, |
| 707 | SpeculatedIterationsINTEL = 22, | 768 | SpeculatedIterationsINTEL = 22, |
| 708 | NoFusionINTEL = 23, | 769 | NoFusionINTEL = 23, |
| 770 | + LoopCountINTEL = 24, | ||
| 771 | + MaxReinvocationDelayINTEL = 25, | ||
| 709 | }, | 772 | }, |
| 710 | 773 | ||
| 711 | LoopControlMask = { | 774 | LoopControlMask = { |
| @@ -727,6 +790,8 @@ spv = { | |||
| 727 | MaxInterleavingINTEL = 0x00200000, | 790 | MaxInterleavingINTEL = 0x00200000, |
| 728 | SpeculatedIterationsINTEL = 0x00400000, | 791 | SpeculatedIterationsINTEL = 0x00400000, |
| 729 | NoFusionINTEL = 0x00800000, | 792 | NoFusionINTEL = 0x00800000, |
| 793 | + LoopCountINTEL = 0x01000000, | ||
| 794 | + MaxReinvocationDelayINTEL = 0x02000000, | ||
| 730 | }, | 795 | }, |
| 731 | 796 | ||
| 732 | FunctionControlShift = { | 797 | FunctionControlShift = { |
| @@ -924,6 +989,9 @@ spv = { | |||
| 924 | ShaderViewportIndex = 70, | 989 | ShaderViewportIndex = 70, |
| 925 | UniformDecoration = 71, | 990 | UniformDecoration = 71, |
| 926 | CoreBuiltinsARM = 4165, | 991 | CoreBuiltinsARM = 4165, |
| 992 | + TileImageColorReadAccessEXT = 4166, | ||
| 993 | + TileImageDepthReadAccessEXT = 4167, | ||
| 994 | + TileImageStencilReadAccessEXT = 4168, | ||
| 927 | FragmentShadingRateKHR = 4422, | 995 | FragmentShadingRateKHR = 4422, |
| 928 | SubgroupBallotKHR = 4423, | 996 | SubgroupBallotKHR = 4423, |
| 929 | DrawParameters = 4427, | 997 | DrawParameters = 4427, |
| @@ -955,6 +1023,9 @@ spv = { | |||
| 955 | RayQueryKHR = 4472, | 1023 | RayQueryKHR = 4472, |
| 956 | RayTraversalPrimitiveCullingKHR = 4478, | 1024 | RayTraversalPrimitiveCullingKHR = 4478, |
| 957 | RayTracingKHR = 4479, | 1025 | RayTracingKHR = 4479, |
| 1026 | + TextureSampleWeightedQCOM = 4484, | ||
| 1027 | + TextureBoxFilterQCOM = 4485, | ||
| 1028 | + TextureBlockMatchQCOM = 4486, | ||
| 958 | Float16ImageAMD = 5008, | 1029 | Float16ImageAMD = 5008, |
| 959 | ImageGatherBiasLodAMD = 5009, | 1030 | ImageGatherBiasLodAMD = 5009, |
| 960 | FragmentMaskAMD = 5010, | 1031 | FragmentMaskAMD = 5010, |
| @@ -962,6 +1033,7 @@ spv = { | |||
| 962 | ImageReadWriteLodAMD = 5015, | 1033 | ImageReadWriteLodAMD = 5015, |
| 963 | Int64ImageEXT = 5016, | 1034 | Int64ImageEXT = 5016, |
| 964 | ShaderClockKHR = 5055, | 1035 | ShaderClockKHR = 5055, |
| 1036 | + ShaderEnqueueAMDX = 5067, | ||
| 965 | SampleMaskOverrideCoverageNV = 5249, | 1037 | SampleMaskOverrideCoverageNV = 5249, |
| 966 | GeometryShaderPassthroughNV = 5251, | 1038 | GeometryShaderPassthroughNV = 5251, |
| 967 | ShaderViewportIndexLayerEXT = 5254, | 1039 | ShaderViewportIndexLayerEXT = 5254, |
| @@ -1003,6 +1075,7 @@ spv = { | |||
| 1003 | UniformTexelBufferArrayNonUniformIndexingEXT = 5311, | 1075 | UniformTexelBufferArrayNonUniformIndexingEXT = 5311, |
| 1004 | StorageTexelBufferArrayNonUniformIndexing = 5312, | 1076 | StorageTexelBufferArrayNonUniformIndexing = 5312, |
| 1005 | StorageTexelBufferArrayNonUniformIndexingEXT = 5312, | 1077 | StorageTexelBufferArrayNonUniformIndexingEXT = 5312, |
| 1078 | + RayTracingPositionFetchKHR = 5336, | ||
| 1006 | RayTracingNV = 5340, | 1079 | RayTracingNV = 5340, |
| 1007 | RayTracingMotionBlurNV = 5341, | 1080 | RayTracingMotionBlurNV = 5341, |
| 1008 | VulkanMemoryModel = 5345, | 1081 | VulkanMemoryModel = 5345, |
| @@ -1020,8 +1093,12 @@ spv = { | |||
| 1020 | FragmentShaderPixelInterlockEXT = 5378, | 1093 | FragmentShaderPixelInterlockEXT = 5378, |
| 1021 | DemoteToHelperInvocation = 5379, | 1094 | DemoteToHelperInvocation = 5379, |
| 1022 | DemoteToHelperInvocationEXT = 5379, | 1095 | DemoteToHelperInvocationEXT = 5379, |
| 1096 | + DisplacementMicromapNV = 5380, | ||
| 1023 | RayTracingOpacityMicromapEXT = 5381, | 1097 | RayTracingOpacityMicromapEXT = 5381, |
| 1098 | + ShaderInvocationReorderNV = 5383, | ||
| 1024 | BindlessTextureNV = 5390, | 1099 | BindlessTextureNV = 5390, |
| 1100 | + RayQueryPositionFetchKHR = 5391, | ||
| 1101 | + RayTracingDisplacementMicromapNV = 5409, | ||
| 1025 | SubgroupShuffleINTEL = 5568, | 1102 | SubgroupShuffleINTEL = 5568, |
| 1026 | SubgroupBufferBlockIOINTEL = 5569, | 1103 | SubgroupBufferBlockIOINTEL = 5569, |
| 1027 | SubgroupImageBlockIOINTEL = 5570, | 1104 | SubgroupImageBlockIOINTEL = 5570, |
| @@ -1054,10 +1131,13 @@ spv = { | |||
| 1054 | FPGAMemoryAccessesINTEL = 5898, | 1131 | FPGAMemoryAccessesINTEL = 5898, |
| 1055 | FPGAClusterAttributesINTEL = 5904, | 1132 | FPGAClusterAttributesINTEL = 5904, |
| 1056 | LoopFuseINTEL = 5906, | 1133 | LoopFuseINTEL = 5906, |
| 1134 | + FPGADSPControlINTEL = 5908, | ||
| 1057 | MemoryAccessAliasingINTEL = 5910, | 1135 | MemoryAccessAliasingINTEL = 5910, |
| 1136 | + FPGAInvocationPipeliningAttributesINTEL = 5916, | ||
| 1058 | FPGABufferLocationINTEL = 5920, | 1137 | FPGABufferLocationINTEL = 5920, |
| 1059 | ArbitraryPrecisionFixedPointINTEL = 5922, | 1138 | ArbitraryPrecisionFixedPointINTEL = 5922, |
| 1060 | USMStorageClassesINTEL = 5935, | 1139 | USMStorageClassesINTEL = 5935, |
| 1140 | + RuntimeAlignedAttributeINTEL = 5939, | ||
| 1061 | IOPipesINTEL = 5943, | 1141 | IOPipesINTEL = 5943, |
| 1062 | BlockingPipesINTEL = 5945, | 1142 | BlockingPipesINTEL = 5945, |
| 1063 | FPGARegINTEL = 5948, | 1143 | FPGARegINTEL = 5948, |
| @@ -1070,16 +1150,26 @@ spv = { | |||
| 1070 | DotProduct = 6019, | 1150 | DotProduct = 6019, |
| 1071 | DotProductKHR = 6019, | 1151 | DotProductKHR = 6019, |
| 1072 | RayCullMaskKHR = 6020, | 1152 | RayCullMaskKHR = 6020, |
| 1153 | + CooperativeMatrixKHR = 6022, | ||
| 1073 | BitInstructions = 6025, | 1154 | BitInstructions = 6025, |
| 1074 | GroupNonUniformRotateKHR = 6026, | 1155 | GroupNonUniformRotateKHR = 6026, |
| 1075 | AtomicFloat32AddEXT = 6033, | 1156 | AtomicFloat32AddEXT = 6033, |
| 1076 | AtomicFloat64AddEXT = 6034, | 1157 | AtomicFloat64AddEXT = 6034, |
| 1077 | - LongConstantCompositeINTEL = 6089, | 1158 | + LongCompositesINTEL = 6089, |
| 1078 | OptNoneINTEL = 6094, | 1159 | OptNoneINTEL = 6094, |
| 1079 | AtomicFloat16AddEXT = 6095, | 1160 | AtomicFloat16AddEXT = 6095, |
| 1080 | DebugInfoModuleINTEL = 6114, | 1161 | DebugInfoModuleINTEL = 6114, |
| 1162 | + BFloat16ConversionINTEL = 6115, | ||
| 1081 | SplitBarrierINTEL = 6141, | 1163 | SplitBarrierINTEL = 6141, |
| 1164 | + FPGAClusterAttributesV2INTEL = 6150, | ||
| 1165 | + FPGAKernelAttributesv2INTEL = 6161, | ||
| 1166 | + FPMaxErrorINTEL = 6169, | ||
| 1167 | + FPGALatencyControlINTEL = 6171, | ||
| 1168 | + FPGAArgumentInterfacesINTEL = 6174, | ||
| 1169 | + GlobalVariableHostAccessINTEL = 6187, | ||
| 1170 | + GlobalVariableFPGADecorationsINTEL = 6189, | ||
| 1082 | GroupUniformArithmeticKHR = 6400, | 1171 | GroupUniformArithmeticKHR = 6400, |
| 1172 | + CacheControlsINTEL = 6441, | ||
| 1083 | }, | 1173 | }, |
| 1084 | 1174 | ||
| 1085 | RayFlagsShift = { | 1175 | RayFlagsShift = { |
| @@ -1175,6 +1265,61 @@ spv = { | |||
| 1175 | PackedVectorFormat4x8BitKHR = 0, | 1265 | PackedVectorFormat4x8BitKHR = 0, |
| 1176 | }, | 1266 | }, |
| 1177 | 1267 | ||
| 1268 | + CooperativeMatrixOperandsShift = { | ||
| 1269 | + MatrixASignedComponentsKHR = 0, | ||
| 1270 | + MatrixBSignedComponentsKHR = 1, | ||
| 1271 | + MatrixCSignedComponentsKHR = 2, | ||
| 1272 | + MatrixResultSignedComponentsKHR = 3, | ||
| 1273 | + SaturatingAccumulationKHR = 4, | ||
| 1274 | + }, | ||
| 1275 | + | ||
| 1276 | + CooperativeMatrixOperandsMask = { | ||
| 1277 | + MaskNone = 0, | ||
| 1278 | + MatrixASignedComponentsKHR = 0x00000001, | ||
| 1279 | + MatrixBSignedComponentsKHR = 0x00000002, | ||
| 1280 | + MatrixCSignedComponentsKHR = 0x00000004, | ||
| 1281 | + MatrixResultSignedComponentsKHR = 0x00000008, | ||
| 1282 | + SaturatingAccumulationKHR = 0x00000010, | ||
| 1283 | + }, | ||
| 1284 | + | ||
| 1285 | + CooperativeMatrixLayout = { | ||
| 1286 | + RowMajorKHR = 0, | ||
| 1287 | + ColumnMajorKHR = 1, | ||
| 1288 | + }, | ||
| 1289 | + | ||
| 1290 | + CooperativeMatrixUse = { | ||
| 1291 | + MatrixAKHR = 0, | ||
| 1292 | + MatrixBKHR = 1, | ||
| 1293 | + MatrixAccumulatorKHR = 2, | ||
| 1294 | + }, | ||
| 1295 | + | ||
| 1296 | + InitializationModeQualifier = { | ||
| 1297 | + InitOnDeviceReprogramINTEL = 0, | ||
| 1298 | + InitOnDeviceResetINTEL = 1, | ||
| 1299 | + }, | ||
| 1300 | + | ||
| 1301 | + HostAccessQualifier = { | ||
| 1302 | + NoneINTEL = 0, | ||
| 1303 | + ReadINTEL = 1, | ||
| 1304 | + WriteINTEL = 2, | ||
| 1305 | + ReadWriteINTEL = 3, | ||
| 1306 | + }, | ||
| 1307 | + | ||
| 1308 | + LoadCacheControl = { | ||
| 1309 | + UncachedINTEL = 0, | ||
| 1310 | + CachedINTEL = 1, | ||
| 1311 | + StreamingINTEL = 2, | ||
| 1312 | + InvalidateAfterReadINTEL = 3, | ||
| 1313 | + ConstCachedINTEL = 4, | ||
| 1314 | + }, | ||
| 1315 | + | ||
| 1316 | + StoreCacheControl = { | ||
| 1317 | + UncachedINTEL = 0, | ||
| 1318 | + WriteThroughINTEL = 1, | ||
| 1319 | + WriteBackINTEL = 2, | ||
| 1320 | + StreamingINTEL = 3, | ||
| 1321 | + }, | ||
| 1322 | + | ||
| 1178 | Op = { | 1323 | Op = { |
| 1179 | OpNop = 0, | 1324 | OpNop = 0, |
| 1180 | OpUndef = 1, | 1325 | OpUndef = 1, |
| @@ -1520,6 +1665,9 @@ spv = { | |||
| 1520 | OpPtrEqual = 401, | 1665 | OpPtrEqual = 401, |
| 1521 | OpPtrNotEqual = 402, | 1666 | OpPtrNotEqual = 402, |
| 1522 | OpPtrDiff = 403, | 1667 | OpPtrDiff = 403, |
| 1668 | + OpColorAttachmentReadEXT = 4160, | ||
| 1669 | + OpDepthAttachmentReadEXT = 4161, | ||
| 1670 | + OpStencilAttachmentReadEXT = 4162, | ||
| 1523 | OpTerminateInvocation = 4416, | 1671 | OpTerminateInvocation = 4416, |
| 1524 | OpSubgroupBallotKHR = 4421, | 1672 | OpSubgroupBallotKHR = 4421, |
| 1525 | OpSubgroupFirstInvocationKHR = 4422, | 1673 | OpSubgroupFirstInvocationKHR = 4422, |
| @@ -1545,6 +1693,11 @@ spv = { | |||
| 1545 | OpUDotAccSatKHR = 4454, | 1693 | OpUDotAccSatKHR = 4454, |
| 1546 | OpSUDotAccSat = 4455, | 1694 | OpSUDotAccSat = 4455, |
| 1547 | OpSUDotAccSatKHR = 4455, | 1695 | OpSUDotAccSatKHR = 4455, |
| 1696 | + OpTypeCooperativeMatrixKHR = 4456, | ||
| 1697 | + OpCooperativeMatrixLoadKHR = 4457, | ||
| 1698 | + OpCooperativeMatrixStoreKHR = 4458, | ||
| 1699 | + OpCooperativeMatrixMulAddKHR = 4459, | ||
| 1700 | + OpCooperativeMatrixLengthKHR = 4460, | ||
| 1548 | OpTypeRayQueryKHR = 4472, | 1701 | OpTypeRayQueryKHR = 4472, |
| 1549 | OpRayQueryInitializeKHR = 4473, | 1702 | OpRayQueryInitializeKHR = 4473, |
| 1550 | OpRayQueryTerminateKHR = 4474, | 1703 | OpRayQueryTerminateKHR = 4474, |
| @@ -1552,6 +1705,10 @@ spv = { | |||
| 1552 | OpRayQueryConfirmIntersectionKHR = 4476, | 1705 | OpRayQueryConfirmIntersectionKHR = 4476, |
| 1553 | OpRayQueryProceedKHR = 4477, | 1706 | OpRayQueryProceedKHR = 4477, |
| 1554 | OpRayQueryGetIntersectionTypeKHR = 4479, | 1707 | OpRayQueryGetIntersectionTypeKHR = 4479, |
| 1708 | + OpImageSampleWeightedQCOM = 4480, | ||
| 1709 | + OpImageBoxFilterQCOM = 4481, | ||
| 1710 | + OpImageBlockMatchSSDQCOM = 4482, | ||
| 1711 | + OpImageBlockMatchSADQCOM = 4483, | ||
| 1555 | OpGroupIAddNonUniformAMD = 5000, | 1712 | OpGroupIAddNonUniformAMD = 5000, |
| 1556 | OpGroupFAddNonUniformAMD = 5001, | 1713 | OpGroupFAddNonUniformAMD = 5001, |
| 1557 | OpGroupFMinNonUniformAMD = 5002, | 1714 | OpGroupFMinNonUniformAMD = 5002, |
| @@ -1563,11 +1720,49 @@ spv = { | |||
| 1563 | OpFragmentMaskFetchAMD = 5011, | 1720 | OpFragmentMaskFetchAMD = 5011, |
| 1564 | OpFragmentFetchAMD = 5012, | 1721 | OpFragmentFetchAMD = 5012, |
| 1565 | OpReadClockKHR = 5056, | 1722 | OpReadClockKHR = 5056, |
| 1723 | + OpFinalizeNodePayloadsAMDX = 5075, | ||
| 1724 | + OpFinishWritingNodePayloadAMDX = 5078, | ||
| 1725 | + OpInitializeNodePayloadsAMDX = 5090, | ||
| 1726 | + OpHitObjectRecordHitMotionNV = 5249, | ||
| 1727 | + OpHitObjectRecordHitWithIndexMotionNV = 5250, | ||
| 1728 | + OpHitObjectRecordMissMotionNV = 5251, | ||
| 1729 | + OpHitObjectGetWorldToObjectNV = 5252, | ||
| 1730 | + OpHitObjectGetObjectToWorldNV = 5253, | ||
| 1731 | + OpHitObjectGetObjectRayDirectionNV = 5254, | ||
| 1732 | + OpHitObjectGetObjectRayOriginNV = 5255, | ||
| 1733 | + OpHitObjectTraceRayMotionNV = 5256, | ||
| 1734 | + OpHitObjectGetShaderRecordBufferHandleNV = 5257, | ||
| 1735 | + OpHitObjectGetShaderBindingTableRecordIndexNV = 5258, | ||
| 1736 | + OpHitObjectRecordEmptyNV = 5259, | ||
| 1737 | + OpHitObjectTraceRayNV = 5260, | ||
| 1738 | + OpHitObjectRecordHitNV = 5261, | ||
| 1739 | + OpHitObjectRecordHitWithIndexNV = 5262, | ||
| 1740 | + OpHitObjectRecordMissNV = 5263, | ||
| 1741 | + OpHitObjectExecuteShaderNV = 5264, | ||
| 1742 | + OpHitObjectGetCurrentTimeNV = 5265, | ||
| 1743 | + OpHitObjectGetAttributesNV = 5266, | ||
| 1744 | + OpHitObjectGetHitKindNV = 5267, | ||
| 1745 | + OpHitObjectGetPrimitiveIndexNV = 5268, | ||
| 1746 | + OpHitObjectGetGeometryIndexNV = 5269, | ||
| 1747 | + OpHitObjectGetInstanceIdNV = 5270, | ||
| 1748 | + OpHitObjectGetInstanceCustomIndexNV = 5271, | ||
| 1749 | + OpHitObjectGetWorldRayDirectionNV = 5272, | ||
| 1750 | + OpHitObjectGetWorldRayOriginNV = 5273, | ||
| 1751 | + OpHitObjectGetRayTMaxNV = 5274, | ||
| 1752 | + OpHitObjectGetRayTMinNV = 5275, | ||
| 1753 | + OpHitObjectIsEmptyNV = 5276, | ||
| 1754 | + OpHitObjectIsHitNV = 5277, | ||
| 1755 | + OpHitObjectIsMissNV = 5278, | ||
| 1756 | + OpReorderThreadWithHitObjectNV = 5279, | ||
| 1757 | + OpReorderThreadWithHintNV = 5280, | ||
| 1758 | + OpTypeHitObjectNV = 5281, | ||
| 1566 | OpImageSampleFootprintNV = 5283, | 1759 | OpImageSampleFootprintNV = 5283, |
| 1567 | OpEmitMeshTasksEXT = 5294, | 1760 | OpEmitMeshTasksEXT = 5294, |
| 1568 | OpSetMeshOutputsEXT = 5295, | 1761 | OpSetMeshOutputsEXT = 5295, |
| 1569 | OpGroupNonUniformPartitionNV = 5296, | 1762 | OpGroupNonUniformPartitionNV = 5296, |
| 1570 | OpWritePackedPrimitiveIndices4x8NV = 5299, | 1763 | OpWritePackedPrimitiveIndices4x8NV = 5299, |
| 1764 | + OpFetchMicroTriangleVertexPositionNV = 5300, | ||
| 1765 | + OpFetchMicroTriangleVertexBarycentricNV = 5301, | ||
| 1571 | OpReportIntersectionKHR = 5334, | 1766 | OpReportIntersectionKHR = 5334, |
| 1572 | OpReportIntersectionNV = 5334, | 1767 | OpReportIntersectionNV = 5334, |
| 1573 | OpIgnoreIntersectionNV = 5335, | 1768 | OpIgnoreIntersectionNV = 5335, |
| @@ -1575,6 +1770,7 @@ spv = { | |||
| 1575 | OpTraceNV = 5337, | 1770 | OpTraceNV = 5337, |
| 1576 | OpTraceMotionNV = 5338, | 1771 | OpTraceMotionNV = 5338, |
| 1577 | OpTraceRayMotionNV = 5339, | 1772 | OpTraceRayMotionNV = 5339, |
| 1773 | + OpRayQueryGetIntersectionTriangleVertexPositionsKHR = 5340, | ||
| 1578 | OpTypeAccelerationStructureKHR = 5341, | 1774 | OpTypeAccelerationStructureKHR = 5341, |
| 1579 | OpTypeAccelerationStructureNV = 5341, | 1775 | OpTypeAccelerationStructureNV = 5341, |
| 1580 | OpExecuteCallableNV = 5344, | 1776 | OpExecuteCallableNV = 5344, |
| @@ -1836,6 +2032,9 @@ spv = { | |||
| 1836 | OpTypeStructContinuedINTEL = 6090, | 2032 | OpTypeStructContinuedINTEL = 6090, |
| 1837 | OpConstantCompositeContinuedINTEL = 6091, | 2033 | OpConstantCompositeContinuedINTEL = 6091, |
| 1838 | OpSpecConstantCompositeContinuedINTEL = 6092, | 2034 | OpSpecConstantCompositeContinuedINTEL = 6092, |
| 2035 | + OpCompositeConstructContinuedINTEL = 6096, | ||
| 2036 | + OpConvertFToBF16INTEL = 6116, | ||
| 2037 | + OpConvertBF16ToFINTEL = 6117, | ||
| 1839 | OpControlBarrierArriveINTEL = 6142, | 2038 | OpControlBarrierArriveINTEL = 6142, |
| 1840 | OpControlBarrierWaitINTEL = 6143, | 2039 | OpControlBarrierWaitINTEL = 6143, |
| 1841 | OpGroupIMulKHR = 6401, | 2040 | OpGroupIMulKHR = 6401, |
| @@ -60,6 +60,10 @@ spv = { | |||
| 60 | 'HLSL' : 5, | 60 | 'HLSL' : 5, |
| 61 | 'CPP_for_OpenCL' : 6, | 61 | 'CPP_for_OpenCL' : 6, |
| 62 | 'SYCL' : 7, | 62 | 'SYCL' : 7, |
| 63 | + 'HERO_C' : 8, | ||
| 64 | + 'NZSL' : 9, | ||
| 65 | + 'WGSL' : 10, | ||
| 66 | + 'Slang' : 11, | ||
| 63 | }, | 67 | }, |
| 64 | 68 | ||
| 65 | 'ExecutionModel' : { | 69 | 'ExecutionModel' : { |
| @@ -143,6 +147,9 @@ spv = { | |||
| 143 | 'SubgroupsPerWorkgroupId' : 37, | 147 | 'SubgroupsPerWorkgroupId' : 37, |
| 144 | 'LocalSizeId' : 38, | 148 | 'LocalSizeId' : 38, |
| 145 | 'LocalSizeHintId' : 39, | 149 | 'LocalSizeHintId' : 39, |
| 150 | + 'NonCoherentColorAttachmentReadEXT' : 4169, | ||
| 151 | + 'NonCoherentDepthAttachmentReadEXT' : 4170, | ||
| 152 | + 'NonCoherentStencilAttachmentReadEXT' : 4171, | ||
| 146 | 'SubgroupUniformControlFlowKHR' : 4421, | 153 | 'SubgroupUniformControlFlowKHR' : 4421, |
| 147 | 'PostDepthCoverage' : 4446, | 154 | 'PostDepthCoverage' : 4446, |
| 148 | 'DenormPreserve' : 4459, | 155 | 'DenormPreserve' : 4459, |
| @@ -152,6 +159,11 @@ spv = { | |||
| 152 | 'RoundingModeRTZ' : 4463, | 159 | 'RoundingModeRTZ' : 4463, |
| 153 | 'EarlyAndLateFragmentTestsAMD' : 5017, | 160 | 'EarlyAndLateFragmentTestsAMD' : 5017, |
| 154 | 'StencilRefReplacingEXT' : 5027, | 161 | 'StencilRefReplacingEXT' : 5027, |
| 162 | + 'CoalescingAMDX' : 5069, | ||
| 163 | + 'MaxNodeRecursionAMDX' : 5071, | ||
| 164 | + 'StaticNumWorkgroupsAMDX' : 5072, | ||
| 165 | + 'ShaderIndexAMDX' : 5073, | ||
| 166 | + 'MaxNumWorkgroupsAMDX' : 5077, | ||
| 155 | 'StencilRefUnchangedFrontAMD' : 5079, | 167 | 'StencilRefUnchangedFrontAMD' : 5079, |
| 156 | 'StencilRefGreaterFrontAMD' : 5080, | 168 | 'StencilRefGreaterFrontAMD' : 5080, |
| 157 | 'StencilRefLessFrontAMD' : 5081, | 169 | 'StencilRefLessFrontAMD' : 5081, |
| @@ -182,6 +194,8 @@ spv = { | |||
| 182 | 'NoGlobalOffsetINTEL' : 5895, | 194 | 'NoGlobalOffsetINTEL' : 5895, |
| 183 | 'NumSIMDWorkitemsINTEL' : 5896, | 195 | 'NumSIMDWorkitemsINTEL' : 5896, |
| 184 | 'SchedulerTargetFmaxMhzINTEL' : 5903, | 196 | 'SchedulerTargetFmaxMhzINTEL' : 5903, |
| 197 | + 'StreamingInterfaceINTEL' : 6154, | ||
| 198 | + 'RegisterMapInterfaceINTEL' : 6160, | ||
| 185 | 'NamedBarrierCountINTEL' : 6417, | 199 | 'NamedBarrierCountINTEL' : 6417, |
| 186 | }, | 200 | }, |
| 187 | 201 | ||
| @@ -199,6 +213,9 @@ spv = { | |||
| 199 | 'AtomicCounter' : 10, | 213 | 'AtomicCounter' : 10, |
| 200 | 'Image' : 11, | 214 | 'Image' : 11, |
| 201 | 'StorageBuffer' : 12, | 215 | 'StorageBuffer' : 12, |
| 216 | + 'TileImageEXT' : 4172, | ||
| 217 | + 'NodePayloadAMDX' : 5068, | ||
| 218 | + 'NodeOutputPayloadAMDX' : 5076, | ||
| 202 | 'CallableDataKHR' : 5328, | 219 | 'CallableDataKHR' : 5328, |
| 203 | 'CallableDataNV' : 5328, | 220 | 'CallableDataNV' : 5328, |
| 204 | 'IncomingCallableDataKHR' : 5329, | 221 | 'IncomingCallableDataKHR' : 5329, |
| @@ -213,6 +230,7 @@ spv = { | |||
| 213 | 'ShaderRecordBufferNV' : 5343, | 230 | 'ShaderRecordBufferNV' : 5343, |
| 214 | 'PhysicalStorageBuffer' : 5349, | 231 | 'PhysicalStorageBuffer' : 5349, |
| 215 | 'PhysicalStorageBufferEXT' : 5349, | 232 | 'PhysicalStorageBufferEXT' : 5349, |
| 233 | + 'HitObjectAttributeNV' : 5385, | ||
| 216 | 'TaskPayloadWorkgroupEXT' : 5402, | 234 | 'TaskPayloadWorkgroupEXT' : 5402, |
| 217 | 'CodeSectionINTEL' : 5605, | 235 | 'CodeSectionINTEL' : 5605, |
| 218 | 'DeviceOnlyINTEL' : 5936, | 236 | 'DeviceOnlyINTEL' : 5936, |
| @@ -227,6 +245,7 @@ spv = { | |||
| 227 | 'Rect' : 4, | 245 | 'Rect' : 4, |
| 228 | 'Buffer' : 5, | 246 | 'Buffer' : 5, |
| 229 | 'SubpassData' : 6, | 247 | 'SubpassData' : 6, |
| 248 | + 'TileImageDataEXT' : 4173, | ||
| 230 | }, | 249 | }, |
| 231 | 250 | ||
| 232 | 'SamplerAddressingMode' : { | 251 | 'SamplerAddressingMode' : { |
| @@ -328,6 +347,8 @@ spv = { | |||
| 328 | 'Float' : 14, | 347 | 'Float' : 14, |
| 329 | 'UnormInt24' : 15, | 348 | 'UnormInt24' : 15, |
| 330 | 'UnormInt101010_2' : 16, | 349 | 'UnormInt101010_2' : 16, |
| 350 | + 'UnsignedIntRaw10EXT' : 19, | ||
| 351 | + 'UnsignedIntRaw12EXT' : 20, | ||
| 331 | }, | 352 | }, |
| 332 | 353 | ||
| 333 | 'ImageOperandsShift' : { | 354 | 'ImageOperandsShift' : { |
| @@ -426,6 +447,7 @@ spv = { | |||
| 426 | 'NoCapture' : 5, | 447 | 'NoCapture' : 5, |
| 427 | 'NoWrite' : 6, | 448 | 'NoWrite' : 6, |
| 428 | 'NoReadWrite' : 7, | 449 | 'NoReadWrite' : 7, |
| 450 | + 'RuntimeAlignedINTEL' : 5940, | ||
| 429 | }, | 451 | }, |
| 430 | 452 | ||
| 431 | 'Decoration' : { | 453 | 'Decoration' : { |
| @@ -478,7 +500,13 @@ spv = { | |||
| 478 | 'MaxByteOffsetId' : 47, | 500 | 'MaxByteOffsetId' : 47, |
| 479 | 'NoSignedWrap' : 4469, | 501 | 'NoSignedWrap' : 4469, |
| 480 | 'NoUnsignedWrap' : 4470, | 502 | 'NoUnsignedWrap' : 4470, |
| 503 | + 'WeightTextureQCOM' : 4487, | ||
| 504 | + 'BlockMatchTextureQCOM' : 4488, | ||
| 481 | 'ExplicitInterpAMD' : 4999, | 505 | 'ExplicitInterpAMD' : 4999, |
| 506 | + 'NodeSharesPayloadLimitsWithAMDX' : 5019, | ||
| 507 | + 'NodeMaxPayloadsAMDX' : 5020, | ||
| 508 | + 'TrackFinishWritingAMDX' : 5078, | ||
| 509 | + 'PayloadNodeNameAMDX' : 5091, | ||
| 482 | 'OverrideCoverageNV' : 5248, | 510 | 'OverrideCoverageNV' : 5248, |
| 483 | 'PassthroughNV' : 5250, | 511 | 'PassthroughNV' : 5250, |
| 484 | 'ViewportRelativeNV' : 5252, | 512 | 'ViewportRelativeNV' : 5252, |
| @@ -495,6 +523,7 @@ spv = { | |||
| 495 | 'RestrictPointerEXT' : 5355, | 523 | 'RestrictPointerEXT' : 5355, |
| 496 | 'AliasedPointer' : 5356, | 524 | 'AliasedPointer' : 5356, |
| 497 | 'AliasedPointerEXT' : 5356, | 525 | 'AliasedPointerEXT' : 5356, |
| 526 | + 'HitObjectShaderRecordBufferNV' : 5386, | ||
| 498 | 'BindlessSamplerNV' : 5398, | 527 | 'BindlessSamplerNV' : 5398, |
| 499 | 'BindlessImageNV' : 5399, | 528 | 'BindlessImageNV' : 5399, |
| 500 | 'BoundSamplerNV' : 5400, | 529 | 'BoundSamplerNV' : 5400, |
| @@ -527,20 +556,45 @@ spv = { | |||
| 527 | 'MergeINTEL' : 5834, | 556 | 'MergeINTEL' : 5834, |
| 528 | 'BankBitsINTEL' : 5835, | 557 | 'BankBitsINTEL' : 5835, |
| 529 | 'ForcePow2DepthINTEL' : 5836, | 558 | 'ForcePow2DepthINTEL' : 5836, |
| 559 | + 'StridesizeINTEL' : 5883, | ||
| 560 | + 'WordsizeINTEL' : 5884, | ||
| 561 | + 'TrueDualPortINTEL' : 5885, | ||
| 530 | 'BurstCoalesceINTEL' : 5899, | 562 | 'BurstCoalesceINTEL' : 5899, |
| 531 | 'CacheSizeINTEL' : 5900, | 563 | 'CacheSizeINTEL' : 5900, |
| 532 | 'DontStaticallyCoalesceINTEL' : 5901, | 564 | 'DontStaticallyCoalesceINTEL' : 5901, |
| 533 | 'PrefetchINTEL' : 5902, | 565 | 'PrefetchINTEL' : 5902, |
| 534 | 'StallEnableINTEL' : 5905, | 566 | 'StallEnableINTEL' : 5905, |
| 535 | 'FuseLoopsInFunctionINTEL' : 5907, | 567 | 'FuseLoopsInFunctionINTEL' : 5907, |
| 568 | + 'MathOpDSPModeINTEL' : 5909, | ||
| 536 | 'AliasScopeINTEL' : 5914, | 569 | 'AliasScopeINTEL' : 5914, |
| 537 | 'NoAliasINTEL' : 5915, | 570 | 'NoAliasINTEL' : 5915, |
| 571 | + 'InitiationIntervalINTEL' : 5917, | ||
| 572 | + 'MaxConcurrencyINTEL' : 5918, | ||
| 573 | + 'PipelineEnableINTEL' : 5919, | ||
| 538 | 'BufferLocationINTEL' : 5921, | 574 | 'BufferLocationINTEL' : 5921, |
| 539 | 'IOPipeStorageINTEL' : 5944, | 575 | 'IOPipeStorageINTEL' : 5944, |
| 540 | 'FunctionFloatingPointModeINTEL' : 6080, | 576 | 'FunctionFloatingPointModeINTEL' : 6080, |
| 541 | 'SingleElementVectorINTEL' : 6085, | 577 | 'SingleElementVectorINTEL' : 6085, |
| 542 | 'VectorComputeCallableFunctionINTEL' : 6087, | 578 | 'VectorComputeCallableFunctionINTEL' : 6087, |
| 543 | 'MediaBlockIOINTEL' : 6140, | 579 | 'MediaBlockIOINTEL' : 6140, |
| 580 | + 'StallFreeINTEL' : 6151, | ||
| 581 | + 'FPMaxErrorDecorationINTEL' : 6170, | ||
| 582 | + 'LatencyControlLabelINTEL' : 6172, | ||
| 583 | + 'LatencyControlConstraintINTEL' : 6173, | ||
| 584 | + 'ConduitKernelArgumentINTEL' : 6175, | ||
| 585 | + 'RegisterMapKernelArgumentINTEL' : 6176, | ||
| 586 | + 'MMHostInterfaceAddressWidthINTEL' : 6177, | ||
| 587 | + 'MMHostInterfaceDataWidthINTEL' : 6178, | ||
| 588 | + 'MMHostInterfaceLatencyINTEL' : 6179, | ||
| 589 | + 'MMHostInterfaceReadWriteModeINTEL' : 6180, | ||
| 590 | + 'MMHostInterfaceMaxBurstINTEL' : 6181, | ||
| 591 | + 'MMHostInterfaceWaitRequestINTEL' : 6182, | ||
| 592 | + 'StableKernelArgumentINTEL' : 6183, | ||
| 593 | + 'HostAccessINTEL' : 6188, | ||
| 594 | + 'InitModeINTEL' : 6190, | ||
| 595 | + 'ImplementInRegisterMapINTEL' : 6191, | ||
| 596 | + 'CacheControlLoadINTEL' : 6442, | ||
| 597 | + 'CacheControlStoreINTEL' : 6443, | ||
| 544 | }, | 598 | }, |
| 545 | 599 | ||
| 546 | 'BuiltIn' : { | 600 | 'BuiltIn' : { |
| @@ -615,6 +669,8 @@ spv = { | |||
| 615 | 'BaryCoordSmoothSampleAMD' : 4997, | 669 | 'BaryCoordSmoothSampleAMD' : 4997, |
| 616 | 'BaryCoordPullModelAMD' : 4998, | 670 | 'BaryCoordPullModelAMD' : 4998, |
| 617 | 'FragStencilRefEXT' : 5014, | 671 | 'FragStencilRefEXT' : 5014, |
| 672 | + 'CoalescedInputCountAMDX' : 5021, | ||
| 673 | + 'ShaderIndexAMDX' : 5073, | ||
| 618 | 'ViewportMaskNV' : 5253, | 674 | 'ViewportMaskNV' : 5253, |
| 619 | 'SecondaryPositionNV' : 5257, | 675 | 'SecondaryPositionNV' : 5257, |
| 620 | 'SecondaryViewportMaskNV' : 5258, | 676 | 'SecondaryViewportMaskNV' : 5258, |
| @@ -667,6 +723,9 @@ spv = { | |||
| 667 | 'HitKindKHR' : 5333, | 723 | 'HitKindKHR' : 5333, |
| 668 | 'HitKindNV' : 5333, | 724 | 'HitKindNV' : 5333, |
| 669 | 'CurrentRayTimeNV' : 5334, | 725 | 'CurrentRayTimeNV' : 5334, |
| 726 | + 'HitTriangleVertexPositionsKHR' : 5335, | ||
| 727 | + 'HitMicroTriangleVertexPositionsNV' : 5337, | ||
| 728 | + 'HitMicroTriangleVertexBarycentricsNV' : 5344, | ||
| 670 | 'IncomingRayFlagsKHR' : 5351, | 729 | 'IncomingRayFlagsKHR' : 5351, |
| 671 | 'IncomingRayFlagsNV' : 5351, | 730 | 'IncomingRayFlagsNV' : 5351, |
| 672 | 'RayGeometryIndexKHR' : 5352, | 731 | 'RayGeometryIndexKHR' : 5352, |
| @@ -674,6 +733,8 @@ spv = { | |||
| 674 | 'SMCountNV' : 5375, | 733 | 'SMCountNV' : 5375, |
| 675 | 'WarpIDNV' : 5376, | 734 | 'WarpIDNV' : 5376, |
| 676 | 'SMIDNV' : 5377, | 735 | 'SMIDNV' : 5377, |
| 736 | + 'HitKindFrontFacingMicroTriangleNV' : 5405, | ||
| 737 | + 'HitKindBackFacingMicroTriangleNV' : 5406, | ||
| 677 | 'CullMaskKHR' : 6021, | 738 | 'CullMaskKHR' : 6021, |
| 678 | }, | 739 | }, |
| 679 | 740 | ||
| @@ -706,6 +767,8 @@ spv = { | |||
| 706 | 'MaxInterleavingINTEL' : 21, | 767 | 'MaxInterleavingINTEL' : 21, |
| 707 | 'SpeculatedIterationsINTEL' : 22, | 768 | 'SpeculatedIterationsINTEL' : 22, |
| 708 | 'NoFusionINTEL' : 23, | 769 | 'NoFusionINTEL' : 23, |
| 770 | + 'LoopCountINTEL' : 24, | ||
| 771 | + 'MaxReinvocationDelayINTEL' : 25, | ||
| 709 | }, | 772 | }, |
| 710 | 773 | ||
| 711 | 'LoopControlMask' : { | 774 | 'LoopControlMask' : { |
| @@ -727,6 +790,8 @@ spv = { | |||
| 727 | 'MaxInterleavingINTEL' : 0x00200000, | 790 | 'MaxInterleavingINTEL' : 0x00200000, |
| 728 | 'SpeculatedIterationsINTEL' : 0x00400000, | 791 | 'SpeculatedIterationsINTEL' : 0x00400000, |
| 729 | 'NoFusionINTEL' : 0x00800000, | 792 | 'NoFusionINTEL' : 0x00800000, |
| 793 | + 'LoopCountINTEL' : 0x01000000, | ||
| 794 | + 'MaxReinvocationDelayINTEL' : 0x02000000, | ||
| 730 | }, | 795 | }, |
| 731 | 796 | ||
| 732 | 'FunctionControlShift' : { | 797 | 'FunctionControlShift' : { |
| @@ -924,6 +989,9 @@ spv = { | |||
| 924 | 'ShaderViewportIndex' : 70, | 989 | 'ShaderViewportIndex' : 70, |
| 925 | 'UniformDecoration' : 71, | 990 | 'UniformDecoration' : 71, |
| 926 | 'CoreBuiltinsARM' : 4165, | 991 | 'CoreBuiltinsARM' : 4165, |
| 992 | + 'TileImageColorReadAccessEXT' : 4166, | ||
| 993 | + 'TileImageDepthReadAccessEXT' : 4167, | ||
| 994 | + 'TileImageStencilReadAccessEXT' : 4168, | ||
| 927 | 'FragmentShadingRateKHR' : 4422, | 995 | 'FragmentShadingRateKHR' : 4422, |
| 928 | 'SubgroupBallotKHR' : 4423, | 996 | 'SubgroupBallotKHR' : 4423, |
| 929 | 'DrawParameters' : 4427, | 997 | 'DrawParameters' : 4427, |
| @@ -955,6 +1023,9 @@ spv = { | |||
| 955 | 'RayQueryKHR' : 4472, | 1023 | 'RayQueryKHR' : 4472, |
| 956 | 'RayTraversalPrimitiveCullingKHR' : 4478, | 1024 | 'RayTraversalPrimitiveCullingKHR' : 4478, |
| 957 | 'RayTracingKHR' : 4479, | 1025 | 'RayTracingKHR' : 4479, |
| 1026 | + 'TextureSampleWeightedQCOM' : 4484, | ||
| 1027 | + 'TextureBoxFilterQCOM' : 4485, | ||
| 1028 | + 'TextureBlockMatchQCOM' : 4486, | ||
| 958 | 'Float16ImageAMD' : 5008, | 1029 | 'Float16ImageAMD' : 5008, |
| 959 | 'ImageGatherBiasLodAMD' : 5009, | 1030 | 'ImageGatherBiasLodAMD' : 5009, |
| 960 | 'FragmentMaskAMD' : 5010, | 1031 | 'FragmentMaskAMD' : 5010, |
| @@ -962,6 +1033,7 @@ spv = { | |||
| 962 | 'ImageReadWriteLodAMD' : 5015, | 1033 | 'ImageReadWriteLodAMD' : 5015, |
| 963 | 'Int64ImageEXT' : 5016, | 1034 | 'Int64ImageEXT' : 5016, |
| 964 | 'ShaderClockKHR' : 5055, | 1035 | 'ShaderClockKHR' : 5055, |
| 1036 | + 'ShaderEnqueueAMDX' : 5067, | ||
| 965 | 'SampleMaskOverrideCoverageNV' : 5249, | 1037 | 'SampleMaskOverrideCoverageNV' : 5249, |
| 966 | 'GeometryShaderPassthroughNV' : 5251, | 1038 | 'GeometryShaderPassthroughNV' : 5251, |
| 967 | 'ShaderViewportIndexLayerEXT' : 5254, | 1039 | 'ShaderViewportIndexLayerEXT' : 5254, |
| @@ -1003,6 +1075,7 @@ spv = { | |||
| 1003 | 'UniformTexelBufferArrayNonUniformIndexingEXT' : 5311, | 1075 | 'UniformTexelBufferArrayNonUniformIndexingEXT' : 5311, |
| 1004 | 'StorageTexelBufferArrayNonUniformIndexing' : 5312, | 1076 | 'StorageTexelBufferArrayNonUniformIndexing' : 5312, |
| 1005 | 'StorageTexelBufferArrayNonUniformIndexingEXT' : 5312, | 1077 | 'StorageTexelBufferArrayNonUniformIndexingEXT' : 5312, |
| 1078 | + 'RayTracingPositionFetchKHR' : 5336, | ||
| 1006 | 'RayTracingNV' : 5340, | 1079 | 'RayTracingNV' : 5340, |
| 1007 | 'RayTracingMotionBlurNV' : 5341, | 1080 | 'RayTracingMotionBlurNV' : 5341, |
| 1008 | 'VulkanMemoryModel' : 5345, | 1081 | 'VulkanMemoryModel' : 5345, |
| @@ -1020,8 +1093,12 @@ spv = { | |||
| 1020 | 'FragmentShaderPixelInterlockEXT' : 5378, | 1093 | 'FragmentShaderPixelInterlockEXT' : 5378, |
| 1021 | 'DemoteToHelperInvocation' : 5379, | 1094 | 'DemoteToHelperInvocation' : 5379, |
| 1022 | 'DemoteToHelperInvocationEXT' : 5379, | 1095 | 'DemoteToHelperInvocationEXT' : 5379, |
| 1096 | + 'DisplacementMicromapNV' : 5380, | ||
| 1023 | 'RayTracingOpacityMicromapEXT' : 5381, | 1097 | 'RayTracingOpacityMicromapEXT' : 5381, |
| 1098 | + 'ShaderInvocationReorderNV' : 5383, | ||
| 1024 | 'BindlessTextureNV' : 5390, | 1099 | 'BindlessTextureNV' : 5390, |
| 1100 | + 'RayQueryPositionFetchKHR' : 5391, | ||
| 1101 | + 'RayTracingDisplacementMicromapNV' : 5409, | ||
| 1025 | 'SubgroupShuffleINTEL' : 5568, | 1102 | 'SubgroupShuffleINTEL' : 5568, |
| 1026 | 'SubgroupBufferBlockIOINTEL' : 5569, | 1103 | 'SubgroupBufferBlockIOINTEL' : 5569, |
| 1027 | 'SubgroupImageBlockIOINTEL' : 5570, | 1104 | 'SubgroupImageBlockIOINTEL' : 5570, |
| @@ -1054,10 +1131,13 @@ spv = { | |||
| 1054 | 'FPGAMemoryAccessesINTEL' : 5898, | 1131 | 'FPGAMemoryAccessesINTEL' : 5898, |
| 1055 | 'FPGAClusterAttributesINTEL' : 5904, | 1132 | 'FPGAClusterAttributesINTEL' : 5904, |
| 1056 | 'LoopFuseINTEL' : 5906, | 1133 | 'LoopFuseINTEL' : 5906, |
| 1134 | + 'FPGADSPControlINTEL' : 5908, | ||
| 1057 | 'MemoryAccessAliasingINTEL' : 5910, | 1135 | 'MemoryAccessAliasingINTEL' : 5910, |
| 1136 | + 'FPGAInvocationPipeliningAttributesINTEL' : 5916, | ||
| 1058 | 'FPGABufferLocationINTEL' : 5920, | 1137 | 'FPGABufferLocationINTEL' : 5920, |
| 1059 | 'ArbitraryPrecisionFixedPointINTEL' : 5922, | 1138 | 'ArbitraryPrecisionFixedPointINTEL' : 5922, |
| 1060 | 'USMStorageClassesINTEL' : 5935, | 1139 | 'USMStorageClassesINTEL' : 5935, |
| 1140 | + 'RuntimeAlignedAttributeINTEL' : 5939, | ||
| 1061 | 'IOPipesINTEL' : 5943, | 1141 | 'IOPipesINTEL' : 5943, |
| 1062 | 'BlockingPipesINTEL' : 5945, | 1142 | 'BlockingPipesINTEL' : 5945, |
| 1063 | 'FPGARegINTEL' : 5948, | 1143 | 'FPGARegINTEL' : 5948, |
| @@ -1070,16 +1150,26 @@ spv = { | |||
| 1070 | 'DotProduct' : 6019, | 1150 | 'DotProduct' : 6019, |
| 1071 | 'DotProductKHR' : 6019, | 1151 | 'DotProductKHR' : 6019, |
| 1072 | 'RayCullMaskKHR' : 6020, | 1152 | 'RayCullMaskKHR' : 6020, |
| 1153 | + 'CooperativeMatrixKHR' : 6022, | ||
| 1073 | 'BitInstructions' : 6025, | 1154 | 'BitInstructions' : 6025, |
| 1074 | 'GroupNonUniformRotateKHR' : 6026, | 1155 | 'GroupNonUniformRotateKHR' : 6026, |
| 1075 | 'AtomicFloat32AddEXT' : 6033, | 1156 | 'AtomicFloat32AddEXT' : 6033, |
| 1076 | 'AtomicFloat64AddEXT' : 6034, | 1157 | 'AtomicFloat64AddEXT' : 6034, |
| 1077 | - 'LongConstantCompositeINTEL' : 6089, | 1158 | + 'LongCompositesINTEL' : 6089, |
| 1078 | 'OptNoneINTEL' : 6094, | 1159 | 'OptNoneINTEL' : 6094, |
| 1079 | 'AtomicFloat16AddEXT' : 6095, | 1160 | 'AtomicFloat16AddEXT' : 6095, |
| 1080 | 'DebugInfoModuleINTEL' : 6114, | 1161 | 'DebugInfoModuleINTEL' : 6114, |
| 1162 | + 'BFloat16ConversionINTEL' : 6115, | ||
| 1081 | 'SplitBarrierINTEL' : 6141, | 1163 | 'SplitBarrierINTEL' : 6141, |
| 1164 | + 'FPGAClusterAttributesV2INTEL' : 6150, | ||
| 1165 | + 'FPGAKernelAttributesv2INTEL' : 6161, | ||
| 1166 | + 'FPMaxErrorINTEL' : 6169, | ||
| 1167 | + 'FPGALatencyControlINTEL' : 6171, | ||
| 1168 | + 'FPGAArgumentInterfacesINTEL' : 6174, | ||
| 1169 | + 'GlobalVariableHostAccessINTEL' : 6187, | ||
| 1170 | + 'GlobalVariableFPGADecorationsINTEL' : 6189, | ||
| 1082 | 'GroupUniformArithmeticKHR' : 6400, | 1171 | 'GroupUniformArithmeticKHR' : 6400, |
| 1172 | + 'CacheControlsINTEL' : 6441, | ||
| 1083 | }, | 1173 | }, |
| 1084 | 1174 | ||
| 1085 | 'RayFlagsShift' : { | 1175 | 'RayFlagsShift' : { |
| @@ -1175,6 +1265,61 @@ spv = { | |||
| 1175 | 'PackedVectorFormat4x8BitKHR' : 0, | 1265 | 'PackedVectorFormat4x8BitKHR' : 0, |
| 1176 | }, | 1266 | }, |
| 1177 | 1267 | ||
| 1268 | + 'CooperativeMatrixOperandsShift' : { | ||
| 1269 | + 'MatrixASignedComponentsKHR' : 0, | ||
| 1270 | + 'MatrixBSignedComponentsKHR' : 1, | ||
| 1271 | + 'MatrixCSignedComponentsKHR' : 2, | ||
| 1272 | + 'MatrixResultSignedComponentsKHR' : 3, | ||
| 1273 | + 'SaturatingAccumulationKHR' : 4, | ||
| 1274 | + }, | ||
| 1275 | + | ||
| 1276 | + 'CooperativeMatrixOperandsMask' : { | ||
| 1277 | + 'MaskNone' : 0, | ||
| 1278 | + 'MatrixASignedComponentsKHR' : 0x00000001, | ||
| 1279 | + 'MatrixBSignedComponentsKHR' : 0x00000002, | ||
| 1280 | + 'MatrixCSignedComponentsKHR' : 0x00000004, | ||
| 1281 | + 'MatrixResultSignedComponentsKHR' : 0x00000008, | ||
| 1282 | + 'SaturatingAccumulationKHR' : 0x00000010, | ||
| 1283 | + }, | ||
| 1284 | + | ||
| 1285 | + 'CooperativeMatrixLayout' : { | ||
| 1286 | + 'RowMajorKHR' : 0, | ||
| 1287 | + 'ColumnMajorKHR' : 1, | ||
| 1288 | + }, | ||
| 1289 | + | ||
| 1290 | + 'CooperativeMatrixUse' : { | ||
| 1291 | + 'MatrixAKHR' : 0, | ||
| 1292 | + 'MatrixBKHR' : 1, | ||
| 1293 | + 'MatrixAccumulatorKHR' : 2, | ||
| 1294 | + }, | ||
| 1295 | + | ||
| 1296 | + 'InitializationModeQualifier' : { | ||
| 1297 | + 'InitOnDeviceReprogramINTEL' : 0, | ||
| 1298 | + 'InitOnDeviceResetINTEL' : 1, | ||
| 1299 | + }, | ||
| 1300 | + | ||
| 1301 | + 'HostAccessQualifier' : { | ||
| 1302 | + 'NoneINTEL' : 0, | ||
| 1303 | + 'ReadINTEL' : 1, | ||
| 1304 | + 'WriteINTEL' : 2, | ||
| 1305 | + 'ReadWriteINTEL' : 3, | ||
| 1306 | + }, | ||
| 1307 | + | ||
| 1308 | + 'LoadCacheControl' : { | ||
| 1309 | + 'UncachedINTEL' : 0, | ||
| 1310 | + 'CachedINTEL' : 1, | ||
| 1311 | + 'StreamingINTEL' : 2, | ||
| 1312 | + 'InvalidateAfterReadINTEL' : 3, | ||
| 1313 | + 'ConstCachedINTEL' : 4, | ||
| 1314 | + }, | ||
| 1315 | + | ||
| 1316 | + 'StoreCacheControl' : { | ||
| 1317 | + 'UncachedINTEL' : 0, | ||
| 1318 | + 'WriteThroughINTEL' : 1, | ||
| 1319 | + 'WriteBackINTEL' : 2, | ||
| 1320 | + 'StreamingINTEL' : 3, | ||
| 1321 | + }, | ||
| 1322 | + | ||
| 1178 | 'Op' : { | 1323 | 'Op' : { |
| 1179 | 'OpNop' : 0, | 1324 | 'OpNop' : 0, |
| 1180 | 'OpUndef' : 1, | 1325 | 'OpUndef' : 1, |
| @@ -1520,6 +1665,9 @@ spv = { | |||
| 1520 | 'OpPtrEqual' : 401, | 1665 | 'OpPtrEqual' : 401, |
| 1521 | 'OpPtrNotEqual' : 402, | 1666 | 'OpPtrNotEqual' : 402, |
| 1522 | 'OpPtrDiff' : 403, | 1667 | 'OpPtrDiff' : 403, |
| 1668 | + 'OpColorAttachmentReadEXT' : 4160, | ||
| 1669 | + 'OpDepthAttachmentReadEXT' : 4161, | ||
| 1670 | + 'OpStencilAttachmentReadEXT' : 4162, | ||
| 1523 | 'OpTerminateInvocation' : 4416, | 1671 | 'OpTerminateInvocation' : 4416, |
| 1524 | 'OpSubgroupBallotKHR' : 4421, | 1672 | 'OpSubgroupBallotKHR' : 4421, |
| 1525 | 'OpSubgroupFirstInvocationKHR' : 4422, | 1673 | 'OpSubgroupFirstInvocationKHR' : 4422, |
| @@ -1545,6 +1693,11 @@ spv = { | |||
| 1545 | 'OpUDotAccSatKHR' : 4454, | 1693 | 'OpUDotAccSatKHR' : 4454, |
| 1546 | 'OpSUDotAccSat' : 4455, | 1694 | 'OpSUDotAccSat' : 4455, |
| 1547 | 'OpSUDotAccSatKHR' : 4455, | 1695 | 'OpSUDotAccSatKHR' : 4455, |
| 1696 | + 'OpTypeCooperativeMatrixKHR' : 4456, | ||
| 1697 | + 'OpCooperativeMatrixLoadKHR' : 4457, | ||
| 1698 | + 'OpCooperativeMatrixStoreKHR' : 4458, | ||
| 1699 | + 'OpCooperativeMatrixMulAddKHR' : 4459, | ||
| 1700 | + 'OpCooperativeMatrixLengthKHR' : 4460, | ||
| 1548 | 'OpTypeRayQueryKHR' : 4472, | 1701 | 'OpTypeRayQueryKHR' : 4472, |
| 1549 | 'OpRayQueryInitializeKHR' : 4473, | 1702 | 'OpRayQueryInitializeKHR' : 4473, |
| 1550 | 'OpRayQueryTerminateKHR' : 4474, | 1703 | 'OpRayQueryTerminateKHR' : 4474, |
| @@ -1552,6 +1705,10 @@ spv = { | |||
| 1552 | 'OpRayQueryConfirmIntersectionKHR' : 4476, | 1705 | 'OpRayQueryConfirmIntersectionKHR' : 4476, |
| 1553 | 'OpRayQueryProceedKHR' : 4477, | 1706 | 'OpRayQueryProceedKHR' : 4477, |
| 1554 | 'OpRayQueryGetIntersectionTypeKHR' : 4479, | 1707 | 'OpRayQueryGetIntersectionTypeKHR' : 4479, |
| 1708 | + 'OpImageSampleWeightedQCOM' : 4480, | ||
| 1709 | + 'OpImageBoxFilterQCOM' : 4481, | ||
| 1710 | + 'OpImageBlockMatchSSDQCOM' : 4482, | ||
| 1711 | + 'OpImageBlockMatchSADQCOM' : 4483, | ||
| 1555 | 'OpGroupIAddNonUniformAMD' : 5000, | 1712 | 'OpGroupIAddNonUniformAMD' : 5000, |
| 1556 | 'OpGroupFAddNonUniformAMD' : 5001, | 1713 | 'OpGroupFAddNonUniformAMD' : 5001, |
| 1557 | 'OpGroupFMinNonUniformAMD' : 5002, | 1714 | 'OpGroupFMinNonUniformAMD' : 5002, |
| @@ -1563,11 +1720,49 @@ spv = { | |||
| 1563 | 'OpFragmentMaskFetchAMD' : 5011, | 1720 | 'OpFragmentMaskFetchAMD' : 5011, |
| 1564 | 'OpFragmentFetchAMD' : 5012, | 1721 | 'OpFragmentFetchAMD' : 5012, |
| 1565 | 'OpReadClockKHR' : 5056, | 1722 | 'OpReadClockKHR' : 5056, |
| 1723 | + 'OpFinalizeNodePayloadsAMDX' : 5075, | ||
| 1724 | + 'OpFinishWritingNodePayloadAMDX' : 5078, | ||
| 1725 | + 'OpInitializeNodePayloadsAMDX' : 5090, | ||
| 1726 | + 'OpHitObjectRecordHitMotionNV' : 5249, | ||
| 1727 | + 'OpHitObjectRecordHitWithIndexMotionNV' : 5250, | ||
| 1728 | + 'OpHitObjectRecordMissMotionNV' : 5251, | ||
| 1729 | + 'OpHitObjectGetWorldToObjectNV' : 5252, | ||
| 1730 | + 'OpHitObjectGetObjectToWorldNV' : 5253, | ||
| 1731 | + 'OpHitObjectGetObjectRayDirectionNV' : 5254, | ||
| 1732 | + 'OpHitObjectGetObjectRayOriginNV' : 5255, | ||
| 1733 | + 'OpHitObjectTraceRayMotionNV' : 5256, | ||
| 1734 | + 'OpHitObjectGetShaderRecordBufferHandleNV' : 5257, | ||
| 1735 | + 'OpHitObjectGetShaderBindingTableRecordIndexNV' : 5258, | ||
| 1736 | + 'OpHitObjectRecordEmptyNV' : 5259, | ||
| 1737 | + 'OpHitObjectTraceRayNV' : 5260, | ||
| 1738 | + 'OpHitObjectRecordHitNV' : 5261, | ||
| 1739 | + 'OpHitObjectRecordHitWithIndexNV' : 5262, | ||
| 1740 | + 'OpHitObjectRecordMissNV' : 5263, | ||
| 1741 | + 'OpHitObjectExecuteShaderNV' : 5264, | ||
| 1742 | + 'OpHitObjectGetCurrentTimeNV' : 5265, | ||
| 1743 | + 'OpHitObjectGetAttributesNV' : 5266, | ||
| 1744 | + 'OpHitObjectGetHitKindNV' : 5267, | ||
| 1745 | + 'OpHitObjectGetPrimitiveIndexNV' : 5268, | ||
| 1746 | + 'OpHitObjectGetGeometryIndexNV' : 5269, | ||
| 1747 | + 'OpHitObjectGetInstanceIdNV' : 5270, | ||
| 1748 | + 'OpHitObjectGetInstanceCustomIndexNV' : 5271, | ||
| 1749 | + 'OpHitObjectGetWorldRayDirectionNV' : 5272, | ||
| 1750 | + 'OpHitObjectGetWorldRayOriginNV' : 5273, | ||
| 1751 | + 'OpHitObjectGetRayTMaxNV' : 5274, | ||
| 1752 | + 'OpHitObjectGetRayTMinNV' : 5275, | ||
| 1753 | + 'OpHitObjectIsEmptyNV' : 5276, | ||
| 1754 | + 'OpHitObjectIsHitNV' : 5277, | ||
| 1755 | + 'OpHitObjectIsMissNV' : 5278, | ||
| 1756 | + 'OpReorderThreadWithHitObjectNV' : 5279, | ||
| 1757 | + 'OpReorderThreadWithHintNV' : 5280, | ||
| 1758 | + 'OpTypeHitObjectNV' : 5281, | ||
| 1566 | 'OpImageSampleFootprintNV' : 5283, | 1759 | 'OpImageSampleFootprintNV' : 5283, |
| 1567 | 'OpEmitMeshTasksEXT' : 5294, | 1760 | 'OpEmitMeshTasksEXT' : 5294, |
| 1568 | 'OpSetMeshOutputsEXT' : 5295, | 1761 | 'OpSetMeshOutputsEXT' : 5295, |
| 1569 | 'OpGroupNonUniformPartitionNV' : 5296, | 1762 | 'OpGroupNonUniformPartitionNV' : 5296, |
| 1570 | 'OpWritePackedPrimitiveIndices4x8NV' : 5299, | 1763 | 'OpWritePackedPrimitiveIndices4x8NV' : 5299, |
| 1764 | + 'OpFetchMicroTriangleVertexPositionNV' : 5300, | ||
| 1765 | + 'OpFetchMicroTriangleVertexBarycentricNV' : 5301, | ||
| 1571 | 'OpReportIntersectionKHR' : 5334, | 1766 | 'OpReportIntersectionKHR' : 5334, |
| 1572 | 'OpReportIntersectionNV' : 5334, | 1767 | 'OpReportIntersectionNV' : 5334, |
| 1573 | 'OpIgnoreIntersectionNV' : 5335, | 1768 | 'OpIgnoreIntersectionNV' : 5335, |
| @@ -1575,6 +1770,7 @@ spv = { | |||
| 1575 | 'OpTraceNV' : 5337, | 1770 | 'OpTraceNV' : 5337, |
| 1576 | 'OpTraceMotionNV' : 5338, | 1771 | 'OpTraceMotionNV' : 5338, |
| 1577 | 'OpTraceRayMotionNV' : 5339, | 1772 | 'OpTraceRayMotionNV' : 5339, |
| 1773 | + 'OpRayQueryGetIntersectionTriangleVertexPositionsKHR' : 5340, | ||
| 1578 | 'OpTypeAccelerationStructureKHR' : 5341, | 1774 | 'OpTypeAccelerationStructureKHR' : 5341, |
| 1579 | 'OpTypeAccelerationStructureNV' : 5341, | 1775 | 'OpTypeAccelerationStructureNV' : 5341, |
| 1580 | 'OpExecuteCallableNV' : 5344, | 1776 | 'OpExecuteCallableNV' : 5344, |
| @@ -1836,6 +2032,9 @@ spv = { | |||
| 1836 | 'OpTypeStructContinuedINTEL' : 6090, | 2032 | 'OpTypeStructContinuedINTEL' : 6090, |
| 1837 | 'OpConstantCompositeContinuedINTEL' : 6091, | 2033 | 'OpConstantCompositeContinuedINTEL' : 6091, |
| 1838 | 'OpSpecConstantCompositeContinuedINTEL' : 6092, | 2034 | 'OpSpecConstantCompositeContinuedINTEL' : 6092, |
| 2035 | + 'OpCompositeConstructContinuedINTEL' : 6096, | ||
| 2036 | + 'OpConvertFToBF16INTEL' : 6116, | ||
| 2037 | + 'OpConvertBF16ToFINTEL' : 6117, | ||
| 1839 | 'OpControlBarrierArriveINTEL' : 6142, | 2038 | 'OpControlBarrierArriveINTEL' : 6142, |
| 1840 | 'OpControlBarrierWaitINTEL' : 6143, | 2039 | 'OpControlBarrierWaitINTEL' : 6143, |
| 1841 | 'OpGroupIMulKHR' : 6401, | 2040 | 'OpGroupIMulKHR' : 6401, |
| @@ -68,6 +68,10 @@ enum SourceLanguage : uint | |||
| 68 | HLSL = 5, | 68 | HLSL = 5, |
| 69 | CPP_for_OpenCL = 6, | 69 | CPP_for_OpenCL = 6, |
| 70 | SYCL = 7, | 70 | SYCL = 7, |
| 71 | + HERO_C = 8, | ||
| 72 | + NZSL = 9, | ||
| 73 | + WGSL = 10, | ||
| 74 | + Slang = 11, | ||
| 71 | } | 75 | } |
| 72 | 76 | ||
| 73 | enum ExecutionModel : uint | 77 | enum ExecutionModel : uint |
| @@ -155,6 +159,9 @@ enum ExecutionMode : uint | |||
| 155 | SubgroupsPerWorkgroupId = 37, | 159 | SubgroupsPerWorkgroupId = 37, |
| 156 | LocalSizeId = 38, | 160 | LocalSizeId = 38, |
| 157 | LocalSizeHintId = 39, | 161 | LocalSizeHintId = 39, |
| 162 | + NonCoherentColorAttachmentReadEXT = 4169, | ||
| 163 | + NonCoherentDepthAttachmentReadEXT = 4170, | ||
| 164 | + NonCoherentStencilAttachmentReadEXT = 4171, | ||
| 158 | SubgroupUniformControlFlowKHR = 4421, | 165 | SubgroupUniformControlFlowKHR = 4421, |
| 159 | PostDepthCoverage = 4446, | 166 | PostDepthCoverage = 4446, |
| 160 | DenormPreserve = 4459, | 167 | DenormPreserve = 4459, |
| @@ -164,6 +171,11 @@ enum ExecutionMode : uint | |||
| 164 | RoundingModeRTZ = 4463, | 171 | RoundingModeRTZ = 4463, |
| 165 | EarlyAndLateFragmentTestsAMD = 5017, | 172 | EarlyAndLateFragmentTestsAMD = 5017, |
| 166 | StencilRefReplacingEXT = 5027, | 173 | StencilRefReplacingEXT = 5027, |
| 174 | + CoalescingAMDX = 5069, | ||
| 175 | + MaxNodeRecursionAMDX = 5071, | ||
| 176 | + StaticNumWorkgroupsAMDX = 5072, | ||
| 177 | + ShaderIndexAMDX = 5073, | ||
| 178 | + MaxNumWorkgroupsAMDX = 5077, | ||
| 167 | StencilRefUnchangedFrontAMD = 5079, | 179 | StencilRefUnchangedFrontAMD = 5079, |
| 168 | StencilRefGreaterFrontAMD = 5080, | 180 | StencilRefGreaterFrontAMD = 5080, |
| 169 | StencilRefLessFrontAMD = 5081, | 181 | StencilRefLessFrontAMD = 5081, |
| @@ -194,6 +206,8 @@ enum ExecutionMode : uint | |||
| 194 | NoGlobalOffsetINTEL = 5895, | 206 | NoGlobalOffsetINTEL = 5895, |
| 195 | NumSIMDWorkitemsINTEL = 5896, | 207 | NumSIMDWorkitemsINTEL = 5896, |
| 196 | SchedulerTargetFmaxMhzINTEL = 5903, | 208 | SchedulerTargetFmaxMhzINTEL = 5903, |
| 209 | + StreamingInterfaceINTEL = 6154, | ||
| 210 | + RegisterMapInterfaceINTEL = 6160, | ||
| 197 | NamedBarrierCountINTEL = 6417, | 211 | NamedBarrierCountINTEL = 6417, |
| 198 | } | 212 | } |
| 199 | 213 | ||
| @@ -212,6 +226,9 @@ enum StorageClass : uint | |||
| 212 | AtomicCounter = 10, | 226 | AtomicCounter = 10, |
| 213 | Image = 11, | 227 | Image = 11, |
| 214 | StorageBuffer = 12, | 228 | StorageBuffer = 12, |
| 229 | + TileImageEXT = 4172, | ||
| 230 | + NodePayloadAMDX = 5068, | ||
| 231 | + NodeOutputPayloadAMDX = 5076, | ||
| 215 | CallableDataKHR = 5328, | 232 | CallableDataKHR = 5328, |
| 216 | CallableDataNV = 5328, | 233 | CallableDataNV = 5328, |
| 217 | IncomingCallableDataKHR = 5329, | 234 | IncomingCallableDataKHR = 5329, |
| @@ -226,6 +243,7 @@ enum StorageClass : uint | |||
| 226 | ShaderRecordBufferNV = 5343, | 243 | ShaderRecordBufferNV = 5343, |
| 227 | PhysicalStorageBuffer = 5349, | 244 | PhysicalStorageBuffer = 5349, |
| 228 | PhysicalStorageBufferEXT = 5349, | 245 | PhysicalStorageBufferEXT = 5349, |
| 246 | + HitObjectAttributeNV = 5385, | ||
| 229 | TaskPayloadWorkgroupEXT = 5402, | 247 | TaskPayloadWorkgroupEXT = 5402, |
| 230 | CodeSectionINTEL = 5605, | 248 | CodeSectionINTEL = 5605, |
| 231 | DeviceOnlyINTEL = 5936, | 249 | DeviceOnlyINTEL = 5936, |
| @@ -241,6 +259,7 @@ enum Dim : uint | |||
| 241 | Rect = 4, | 259 | Rect = 4, |
| 242 | Buffer = 5, | 260 | Buffer = 5, |
| 243 | SubpassData = 6, | 261 | SubpassData = 6, |
| 262 | + TileImageDataEXT = 4173, | ||
| 244 | } | 263 | } |
| 245 | 264 | ||
| 246 | enum SamplerAddressingMode : uint | 265 | enum SamplerAddressingMode : uint |
| @@ -347,6 +366,8 @@ enum ImageChannelDataType : uint | |||
| 347 | Float = 14, | 366 | Float = 14, |
| 348 | UnormInt24 = 15, | 367 | UnormInt24 = 15, |
| 349 | UnormInt101010_2 = 16, | 368 | UnormInt101010_2 = 16, |
| 369 | + UnsignedIntRaw10EXT = 19, | ||
| 370 | + UnsignedIntRaw12EXT = 20, | ||
| 350 | } | 371 | } |
| 351 | 372 | ||
| 352 | enum ImageOperandsShift : uint | 373 | enum ImageOperandsShift : uint |
| @@ -453,6 +474,7 @@ enum FunctionParameterAttribute : uint | |||
| 453 | NoCapture = 5, | 474 | NoCapture = 5, |
| 454 | NoWrite = 6, | 475 | NoWrite = 6, |
| 455 | NoReadWrite = 7, | 476 | NoReadWrite = 7, |
| 477 | + RuntimeAlignedINTEL = 5940, | ||
| 456 | } | 478 | } |
| 457 | 479 | ||
| 458 | enum Decoration : uint | 480 | enum Decoration : uint |
| @@ -506,7 +528,13 @@ enum Decoration : uint | |||
| 506 | MaxByteOffsetId = 47, | 528 | MaxByteOffsetId = 47, |
| 507 | NoSignedWrap = 4469, | 529 | NoSignedWrap = 4469, |
| 508 | NoUnsignedWrap = 4470, | 530 | NoUnsignedWrap = 4470, |
| 531 | + WeightTextureQCOM = 4487, | ||
| 532 | + BlockMatchTextureQCOM = 4488, | ||
| 509 | ExplicitInterpAMD = 4999, | 533 | ExplicitInterpAMD = 4999, |
| 534 | + NodeSharesPayloadLimitsWithAMDX = 5019, | ||
| 535 | + NodeMaxPayloadsAMDX = 5020, | ||
| 536 | + TrackFinishWritingAMDX = 5078, | ||
| 537 | + PayloadNodeNameAMDX = 5091, | ||
| 510 | OverrideCoverageNV = 5248, | 538 | OverrideCoverageNV = 5248, |
| 511 | PassthroughNV = 5250, | 539 | PassthroughNV = 5250, |
| 512 | ViewportRelativeNV = 5252, | 540 | ViewportRelativeNV = 5252, |
| @@ -523,6 +551,7 @@ enum Decoration : uint | |||
| 523 | RestrictPointerEXT = 5355, | 551 | RestrictPointerEXT = 5355, |
| 524 | AliasedPointer = 5356, | 552 | AliasedPointer = 5356, |
| 525 | AliasedPointerEXT = 5356, | 553 | AliasedPointerEXT = 5356, |
| 554 | + HitObjectShaderRecordBufferNV = 5386, | ||
| 526 | BindlessSamplerNV = 5398, | 555 | BindlessSamplerNV = 5398, |
| 527 | BindlessImageNV = 5399, | 556 | BindlessImageNV = 5399, |
| 528 | BoundSamplerNV = 5400, | 557 | BoundSamplerNV = 5400, |
| @@ -555,20 +584,45 @@ enum Decoration : uint | |||
| 555 | MergeINTEL = 5834, | 584 | MergeINTEL = 5834, |
| 556 | BankBitsINTEL = 5835, | 585 | BankBitsINTEL = 5835, |
| 557 | ForcePow2DepthINTEL = 5836, | 586 | ForcePow2DepthINTEL = 5836, |
| 587 | + StridesizeINTEL = 5883, | ||
| 588 | + WordsizeINTEL = 5884, | ||
| 589 | + TrueDualPortINTEL = 5885, | ||
| 558 | BurstCoalesceINTEL = 5899, | 590 | BurstCoalesceINTEL = 5899, |
| 559 | CacheSizeINTEL = 5900, | 591 | CacheSizeINTEL = 5900, |
| 560 | DontStaticallyCoalesceINTEL = 5901, | 592 | DontStaticallyCoalesceINTEL = 5901, |
| 561 | PrefetchINTEL = 5902, | 593 | PrefetchINTEL = 5902, |
| 562 | StallEnableINTEL = 5905, | 594 | StallEnableINTEL = 5905, |
| 563 | FuseLoopsInFunctionINTEL = 5907, | 595 | FuseLoopsInFunctionINTEL = 5907, |
| 596 | + MathOpDSPModeINTEL = 5909, | ||
| 564 | AliasScopeINTEL = 5914, | 597 | AliasScopeINTEL = 5914, |
| 565 | NoAliasINTEL = 5915, | 598 | NoAliasINTEL = 5915, |
| 599 | + InitiationIntervalINTEL = 5917, | ||
| 600 | + MaxConcurrencyINTEL = 5918, | ||
| 601 | + PipelineEnableINTEL = 5919, | ||
| 566 | BufferLocationINTEL = 5921, | 602 | BufferLocationINTEL = 5921, |
| 567 | IOPipeStorageINTEL = 5944, | 603 | IOPipeStorageINTEL = 5944, |
| 568 | FunctionFloatingPointModeINTEL = 6080, | 604 | FunctionFloatingPointModeINTEL = 6080, |
| 569 | SingleElementVectorINTEL = 6085, | 605 | SingleElementVectorINTEL = 6085, |
| 570 | VectorComputeCallableFunctionINTEL = 6087, | 606 | VectorComputeCallableFunctionINTEL = 6087, |
| 571 | MediaBlockIOINTEL = 6140, | 607 | MediaBlockIOINTEL = 6140, |
| 608 | + StallFreeINTEL = 6151, | ||
| 609 | + FPMaxErrorDecorationINTEL = 6170, | ||
| 610 | + LatencyControlLabelINTEL = 6172, | ||
| 611 | + LatencyControlConstraintINTEL = 6173, | ||
| 612 | + ConduitKernelArgumentINTEL = 6175, | ||
| 613 | + RegisterMapKernelArgumentINTEL = 6176, | ||
| 614 | + MMHostInterfaceAddressWidthINTEL = 6177, | ||
| 615 | + MMHostInterfaceDataWidthINTEL = 6178, | ||
| 616 | + MMHostInterfaceLatencyINTEL = 6179, | ||
| 617 | + MMHostInterfaceReadWriteModeINTEL = 6180, | ||
| 618 | + MMHostInterfaceMaxBurstINTEL = 6181, | ||
| 619 | + MMHostInterfaceWaitRequestINTEL = 6182, | ||
| 620 | + StableKernelArgumentINTEL = 6183, | ||
| 621 | + HostAccessINTEL = 6188, | ||
| 622 | + InitModeINTEL = 6190, | ||
| 623 | + ImplementInRegisterMapINTEL = 6191, | ||
| 624 | + CacheControlLoadINTEL = 6442, | ||
| 625 | + CacheControlStoreINTEL = 6443, | ||
| 572 | } | 626 | } |
| 573 | 627 | ||
| 574 | enum BuiltIn : uint | 628 | enum BuiltIn : uint |
| @@ -644,6 +698,8 @@ enum BuiltIn : uint | |||
| 644 | BaryCoordSmoothSampleAMD = 4997, | 698 | BaryCoordSmoothSampleAMD = 4997, |
| 645 | BaryCoordPullModelAMD = 4998, | 699 | BaryCoordPullModelAMD = 4998, |
| 646 | FragStencilRefEXT = 5014, | 700 | FragStencilRefEXT = 5014, |
| 701 | + CoalescedInputCountAMDX = 5021, | ||
| 702 | + ShaderIndexAMDX = 5073, | ||
| 647 | ViewportMaskNV = 5253, | 703 | ViewportMaskNV = 5253, |
| 648 | SecondaryPositionNV = 5257, | 704 | SecondaryPositionNV = 5257, |
| 649 | SecondaryViewportMaskNV = 5258, | 705 | SecondaryViewportMaskNV = 5258, |
| @@ -696,6 +752,9 @@ enum BuiltIn : uint | |||
| 696 | HitKindKHR = 5333, | 752 | HitKindKHR = 5333, |
| 697 | HitKindNV = 5333, | 753 | HitKindNV = 5333, |
| 698 | CurrentRayTimeNV = 5334, | 754 | CurrentRayTimeNV = 5334, |
| 755 | + HitTriangleVertexPositionsKHR = 5335, | ||
| 756 | + HitMicroTriangleVertexPositionsNV = 5337, | ||
| 757 | + HitMicroTriangleVertexBarycentricsNV = 5344, | ||
| 699 | IncomingRayFlagsKHR = 5351, | 758 | IncomingRayFlagsKHR = 5351, |
| 700 | IncomingRayFlagsNV = 5351, | 759 | IncomingRayFlagsNV = 5351, |
| 701 | RayGeometryIndexKHR = 5352, | 760 | RayGeometryIndexKHR = 5352, |
| @@ -703,6 +762,8 @@ enum BuiltIn : uint | |||
| 703 | SMCountNV = 5375, | 762 | SMCountNV = 5375, |
| 704 | WarpIDNV = 5376, | 763 | WarpIDNV = 5376, |
| 705 | SMIDNV = 5377, | 764 | SMIDNV = 5377, |
| 765 | + HitKindFrontFacingMicroTriangleNV = 5405, | ||
| 766 | + HitKindBackFacingMicroTriangleNV = 5406, | ||
| 706 | CullMaskKHR = 6021, | 767 | CullMaskKHR = 6021, |
| 707 | } | 768 | } |
| 708 | 769 | ||
| @@ -738,6 +799,8 @@ enum LoopControlShift : uint | |||
| 738 | MaxInterleavingINTEL = 21, | 799 | MaxInterleavingINTEL = 21, |
| 739 | SpeculatedIterationsINTEL = 22, | 800 | SpeculatedIterationsINTEL = 22, |
| 740 | NoFusionINTEL = 23, | 801 | NoFusionINTEL = 23, |
| 802 | + LoopCountINTEL = 24, | ||
| 803 | + MaxReinvocationDelayINTEL = 25, | ||
| 741 | } | 804 | } |
| 742 | 805 | ||
| 743 | enum LoopControlMask : uint | 806 | enum LoopControlMask : uint |
| @@ -760,6 +823,8 @@ enum LoopControlMask : uint | |||
| 760 | MaxInterleavingINTEL = 0x00200000, | 823 | MaxInterleavingINTEL = 0x00200000, |
| 761 | SpeculatedIterationsINTEL = 0x00400000, | 824 | SpeculatedIterationsINTEL = 0x00400000, |
| 762 | NoFusionINTEL = 0x00800000, | 825 | NoFusionINTEL = 0x00800000, |
| 826 | + LoopCountINTEL = 0x01000000, | ||
| 827 | + MaxReinvocationDelayINTEL = 0x02000000, | ||
| 763 | } | 828 | } |
| 764 | 829 | ||
| 765 | enum FunctionControlShift : uint | 830 | enum FunctionControlShift : uint |
| @@ -969,6 +1034,9 @@ enum Capability : uint | |||
| 969 | ShaderViewportIndex = 70, | 1034 | ShaderViewportIndex = 70, |
| 970 | UniformDecoration = 71, | 1035 | UniformDecoration = 71, |
| 971 | CoreBuiltinsARM = 4165, | 1036 | CoreBuiltinsARM = 4165, |
| 1037 | + TileImageColorReadAccessEXT = 4166, | ||
| 1038 | + TileImageDepthReadAccessEXT = 4167, | ||
| 1039 | + TileImageStencilReadAccessEXT = 4168, | ||
| 972 | FragmentShadingRateKHR = 4422, | 1040 | FragmentShadingRateKHR = 4422, |
| 973 | SubgroupBallotKHR = 4423, | 1041 | SubgroupBallotKHR = 4423, |
| 974 | DrawParameters = 4427, | 1042 | DrawParameters = 4427, |
| @@ -1000,6 +1068,9 @@ enum Capability : uint | |||
| 1000 | RayQueryKHR = 4472, | 1068 | RayQueryKHR = 4472, |
| 1001 | RayTraversalPrimitiveCullingKHR = 4478, | 1069 | RayTraversalPrimitiveCullingKHR = 4478, |
| 1002 | RayTracingKHR = 4479, | 1070 | RayTracingKHR = 4479, |
| 1071 | + TextureSampleWeightedQCOM = 4484, | ||
| 1072 | + TextureBoxFilterQCOM = 4485, | ||
| 1073 | + TextureBlockMatchQCOM = 4486, | ||
| 1003 | Float16ImageAMD = 5008, | 1074 | Float16ImageAMD = 5008, |
| 1004 | ImageGatherBiasLodAMD = 5009, | 1075 | ImageGatherBiasLodAMD = 5009, |
| 1005 | FragmentMaskAMD = 5010, | 1076 | FragmentMaskAMD = 5010, |
| @@ -1007,6 +1078,7 @@ enum Capability : uint | |||
| 1007 | ImageReadWriteLodAMD = 5015, | 1078 | ImageReadWriteLodAMD = 5015, |
| 1008 | Int64ImageEXT = 5016, | 1079 | Int64ImageEXT = 5016, |
| 1009 | ShaderClockKHR = 5055, | 1080 | ShaderClockKHR = 5055, |
| 1081 | + ShaderEnqueueAMDX = 5067, | ||
| 1010 | SampleMaskOverrideCoverageNV = 5249, | 1082 | SampleMaskOverrideCoverageNV = 5249, |
| 1011 | GeometryShaderPassthroughNV = 5251, | 1083 | GeometryShaderPassthroughNV = 5251, |
| 1012 | ShaderViewportIndexLayerEXT = 5254, | 1084 | ShaderViewportIndexLayerEXT = 5254, |
| @@ -1048,6 +1120,7 @@ enum Capability : uint | |||
| 1048 | UniformTexelBufferArrayNonUniformIndexingEXT = 5311, | 1120 | UniformTexelBufferArrayNonUniformIndexingEXT = 5311, |
| 1049 | StorageTexelBufferArrayNonUniformIndexing = 5312, | 1121 | StorageTexelBufferArrayNonUniformIndexing = 5312, |
| 1050 | StorageTexelBufferArrayNonUniformIndexingEXT = 5312, | 1122 | StorageTexelBufferArrayNonUniformIndexingEXT = 5312, |
| 1123 | + RayTracingPositionFetchKHR = 5336, | ||
| 1051 | RayTracingNV = 5340, | 1124 | RayTracingNV = 5340, |
| 1052 | RayTracingMotionBlurNV = 5341, | 1125 | RayTracingMotionBlurNV = 5341, |
| 1053 | VulkanMemoryModel = 5345, | 1126 | VulkanMemoryModel = 5345, |
| @@ -1065,8 +1138,12 @@ enum Capability : uint | |||
| 1065 | FragmentShaderPixelInterlockEXT = 5378, | 1138 | FragmentShaderPixelInterlockEXT = 5378, |
| 1066 | DemoteToHelperInvocation = 5379, | 1139 | DemoteToHelperInvocation = 5379, |
| 1067 | DemoteToHelperInvocationEXT = 5379, | 1140 | DemoteToHelperInvocationEXT = 5379, |
| 1141 | + DisplacementMicromapNV = 5380, | ||
| 1068 | RayTracingOpacityMicromapEXT = 5381, | 1142 | RayTracingOpacityMicromapEXT = 5381, |
| 1143 | + ShaderInvocationReorderNV = 5383, | ||
| 1069 | BindlessTextureNV = 5390, | 1144 | BindlessTextureNV = 5390, |
| 1145 | + RayQueryPositionFetchKHR = 5391, | ||
| 1146 | + RayTracingDisplacementMicromapNV = 5409, | ||
| 1070 | SubgroupShuffleINTEL = 5568, | 1147 | SubgroupShuffleINTEL = 5568, |
| 1071 | SubgroupBufferBlockIOINTEL = 5569, | 1148 | SubgroupBufferBlockIOINTEL = 5569, |
| 1072 | SubgroupImageBlockIOINTEL = 5570, | 1149 | SubgroupImageBlockIOINTEL = 5570, |
| @@ -1099,10 +1176,13 @@ enum Capability : uint | |||
| 1099 | FPGAMemoryAccessesINTEL = 5898, | 1176 | FPGAMemoryAccessesINTEL = 5898, |
| 1100 | FPGAClusterAttributesINTEL = 5904, | 1177 | FPGAClusterAttributesINTEL = 5904, |
| 1101 | LoopFuseINTEL = 5906, | 1178 | LoopFuseINTEL = 5906, |
| 1179 | + FPGADSPControlINTEL = 5908, | ||
| 1102 | MemoryAccessAliasingINTEL = 5910, | 1180 | MemoryAccessAliasingINTEL = 5910, |
| 1181 | + FPGAInvocationPipeliningAttributesINTEL = 5916, | ||
| 1103 | FPGABufferLocationINTEL = 5920, | 1182 | FPGABufferLocationINTEL = 5920, |
| 1104 | ArbitraryPrecisionFixedPointINTEL = 5922, | 1183 | ArbitraryPrecisionFixedPointINTEL = 5922, |
| 1105 | USMStorageClassesINTEL = 5935, | 1184 | USMStorageClassesINTEL = 5935, |
| 1185 | + RuntimeAlignedAttributeINTEL = 5939, | ||
| 1106 | IOPipesINTEL = 5943, | 1186 | IOPipesINTEL = 5943, |
| 1107 | BlockingPipesINTEL = 5945, | 1187 | BlockingPipesINTEL = 5945, |
| 1108 | FPGARegINTEL = 5948, | 1188 | FPGARegINTEL = 5948, |
| @@ -1115,16 +1195,26 @@ enum Capability : uint | |||
| 1115 | DotProduct = 6019, | 1195 | DotProduct = 6019, |
| 1116 | DotProductKHR = 6019, | 1196 | DotProductKHR = 6019, |
| 1117 | RayCullMaskKHR = 6020, | 1197 | RayCullMaskKHR = 6020, |
| 1198 | + CooperativeMatrixKHR = 6022, | ||
| 1118 | BitInstructions = 6025, | 1199 | BitInstructions = 6025, |
| 1119 | GroupNonUniformRotateKHR = 6026, | 1200 | GroupNonUniformRotateKHR = 6026, |
| 1120 | AtomicFloat32AddEXT = 6033, | 1201 | AtomicFloat32AddEXT = 6033, |
| 1121 | AtomicFloat64AddEXT = 6034, | 1202 | AtomicFloat64AddEXT = 6034, |
| 1122 | - LongConstantCompositeINTEL = 6089, | 1203 | + LongCompositesINTEL = 6089, |
| 1123 | OptNoneINTEL = 6094, | 1204 | OptNoneINTEL = 6094, |
| 1124 | AtomicFloat16AddEXT = 6095, | 1205 | AtomicFloat16AddEXT = 6095, |
| 1125 | DebugInfoModuleINTEL = 6114, | 1206 | DebugInfoModuleINTEL = 6114, |
| 1207 | + BFloat16ConversionINTEL = 6115, | ||
| 1126 | SplitBarrierINTEL = 6141, | 1208 | SplitBarrierINTEL = 6141, |
| 1209 | + FPGAClusterAttributesV2INTEL = 6150, | ||
| 1210 | + FPGAKernelAttributesv2INTEL = 6161, | ||
| 1211 | + FPMaxErrorINTEL = 6169, | ||
| 1212 | + FPGALatencyControlINTEL = 6171, | ||
| 1213 | + FPGAArgumentInterfacesINTEL = 6174, | ||
| 1214 | + GlobalVariableHostAccessINTEL = 6187, | ||
| 1215 | + GlobalVariableFPGADecorationsINTEL = 6189, | ||
| 1127 | GroupUniformArithmeticKHR = 6400, | 1216 | GroupUniformArithmeticKHR = 6400, |
| 1217 | + CacheControlsINTEL = 6441, | ||
| 1128 | } | 1218 | } |
| 1129 | 1219 | ||
| 1130 | enum RayFlagsShift : uint | 1220 | enum RayFlagsShift : uint |
| @@ -1232,6 +1322,69 @@ enum PackedVectorFormat : uint | |||
| 1232 | PackedVectorFormat4x8BitKHR = 0, | 1322 | PackedVectorFormat4x8BitKHR = 0, |
| 1233 | } | 1323 | } |
| 1234 | 1324 | ||
| 1325 | +enum CooperativeMatrixOperandsShift : uint | ||
| 1326 | +{ | ||
| 1327 | + MatrixASignedComponentsKHR = 0, | ||
| 1328 | + MatrixBSignedComponentsKHR = 1, | ||
| 1329 | + MatrixCSignedComponentsKHR = 2, | ||
| 1330 | + MatrixResultSignedComponentsKHR = 3, | ||
| 1331 | + SaturatingAccumulationKHR = 4, | ||
| 1332 | +} | ||
| 1333 | + | ||
| 1334 | +enum CooperativeMatrixOperandsMask : uint | ||
| 1335 | +{ | ||
| 1336 | + MaskNone = 0, | ||
| 1337 | + MatrixASignedComponentsKHR = 0x00000001, | ||
| 1338 | + MatrixBSignedComponentsKHR = 0x00000002, | ||
| 1339 | + MatrixCSignedComponentsKHR = 0x00000004, | ||
| 1340 | + MatrixResultSignedComponentsKHR = 0x00000008, | ||
| 1341 | + SaturatingAccumulationKHR = 0x00000010, | ||
| 1342 | +} | ||
| 1343 | + | ||
| 1344 | +enum CooperativeMatrixLayout : uint | ||
| 1345 | +{ | ||
| 1346 | + RowMajorKHR = 0, | ||
| 1347 | + ColumnMajorKHR = 1, | ||
| 1348 | +} | ||
| 1349 | + | ||
| 1350 | +enum CooperativeMatrixUse : uint | ||
| 1351 | +{ | ||
| 1352 | + MatrixAKHR = 0, | ||
| 1353 | + MatrixBKHR = 1, | ||
| 1354 | + MatrixAccumulatorKHR = 2, | ||
| 1355 | +} | ||
| 1356 | + | ||
| 1357 | +enum InitializationModeQualifier : uint | ||
| 1358 | +{ | ||
| 1359 | + InitOnDeviceReprogramINTEL = 0, | ||
| 1360 | + InitOnDeviceResetINTEL = 1, | ||
| 1361 | +} | ||
| 1362 | + | ||
| 1363 | +enum HostAccessQualifier : uint | ||
| 1364 | +{ | ||
| 1365 | + NoneINTEL = 0, | ||
| 1366 | + ReadINTEL = 1, | ||
| 1367 | + WriteINTEL = 2, | ||
| 1368 | + ReadWriteINTEL = 3, | ||
| 1369 | +} | ||
| 1370 | + | ||
| 1371 | +enum LoadCacheControl : uint | ||
| 1372 | +{ | ||
| 1373 | + UncachedINTEL = 0, | ||
| 1374 | + CachedINTEL = 1, | ||
| 1375 | + StreamingINTEL = 2, | ||
| 1376 | + InvalidateAfterReadINTEL = 3, | ||
| 1377 | + ConstCachedINTEL = 4, | ||
| 1378 | +} | ||
| 1379 | + | ||
| 1380 | +enum StoreCacheControl : uint | ||
| 1381 | +{ | ||
| 1382 | + UncachedINTEL = 0, | ||
| 1383 | + WriteThroughINTEL = 1, | ||
| 1384 | + WriteBackINTEL = 2, | ||
| 1385 | + StreamingINTEL = 3, | ||
| 1386 | +} | ||
| 1387 | + | ||
| 1235 | enum Op : uint | 1388 | enum Op : uint |
| 1236 | { | 1389 | { |
| 1237 | OpNop = 0, | 1390 | OpNop = 0, |
| @@ -1578,6 +1731,9 @@ enum Op : uint | |||
| 1578 | OpPtrEqual = 401, | 1731 | OpPtrEqual = 401, |
| 1579 | OpPtrNotEqual = 402, | 1732 | OpPtrNotEqual = 402, |
| 1580 | OpPtrDiff = 403, | 1733 | OpPtrDiff = 403, |
| 1734 | + OpColorAttachmentReadEXT = 4160, | ||
| 1735 | + OpDepthAttachmentReadEXT = 4161, | ||
| 1736 | + OpStencilAttachmentReadEXT = 4162, | ||
| 1581 | OpTerminateInvocation = 4416, | 1737 | OpTerminateInvocation = 4416, |
| 1582 | OpSubgroupBallotKHR = 4421, | 1738 | OpSubgroupBallotKHR = 4421, |
| 1583 | OpSubgroupFirstInvocationKHR = 4422, | 1739 | OpSubgroupFirstInvocationKHR = 4422, |
| @@ -1603,6 +1759,11 @@ enum Op : uint | |||
| 1603 | OpUDotAccSatKHR = 4454, | 1759 | OpUDotAccSatKHR = 4454, |
| 1604 | OpSUDotAccSat = 4455, | 1760 | OpSUDotAccSat = 4455, |
| 1605 | OpSUDotAccSatKHR = 4455, | 1761 | OpSUDotAccSatKHR = 4455, |
| 1762 | + OpTypeCooperativeMatrixKHR = 4456, | ||
| 1763 | + OpCooperativeMatrixLoadKHR = 4457, | ||
| 1764 | + OpCooperativeMatrixStoreKHR = 4458, | ||
| 1765 | + OpCooperativeMatrixMulAddKHR = 4459, | ||
| 1766 | + OpCooperativeMatrixLengthKHR = 4460, | ||
| 1606 | OpTypeRayQueryKHR = 4472, | 1767 | OpTypeRayQueryKHR = 4472, |
| 1607 | OpRayQueryInitializeKHR = 4473, | 1768 | OpRayQueryInitializeKHR = 4473, |
| 1608 | OpRayQueryTerminateKHR = 4474, | 1769 | OpRayQueryTerminateKHR = 4474, |
| @@ -1610,6 +1771,10 @@ enum Op : uint | |||
| 1610 | OpRayQueryConfirmIntersectionKHR = 4476, | 1771 | OpRayQueryConfirmIntersectionKHR = 4476, |
| 1611 | OpRayQueryProceedKHR = 4477, | 1772 | OpRayQueryProceedKHR = 4477, |
| 1612 | OpRayQueryGetIntersectionTypeKHR = 4479, | 1773 | OpRayQueryGetIntersectionTypeKHR = 4479, |
| 1774 | + OpImageSampleWeightedQCOM = 4480, | ||
| 1775 | + OpImageBoxFilterQCOM = 4481, | ||
| 1776 | + OpImageBlockMatchSSDQCOM = 4482, | ||
| 1777 | + OpImageBlockMatchSADQCOM = 4483, | ||
| 1613 | OpGroupIAddNonUniformAMD = 5000, | 1778 | OpGroupIAddNonUniformAMD = 5000, |
| 1614 | OpGroupFAddNonUniformAMD = 5001, | 1779 | OpGroupFAddNonUniformAMD = 5001, |
| 1615 | OpGroupFMinNonUniformAMD = 5002, | 1780 | OpGroupFMinNonUniformAMD = 5002, |
| @@ -1621,11 +1786,49 @@ enum Op : uint | |||
| 1621 | OpFragmentMaskFetchAMD = 5011, | 1786 | OpFragmentMaskFetchAMD = 5011, |
| 1622 | OpFragmentFetchAMD = 5012, | 1787 | OpFragmentFetchAMD = 5012, |
| 1623 | OpReadClockKHR = 5056, | 1788 | OpReadClockKHR = 5056, |
| 1789 | + OpFinalizeNodePayloadsAMDX = 5075, | ||
| 1790 | + OpFinishWritingNodePayloadAMDX = 5078, | ||
| 1791 | + OpInitializeNodePayloadsAMDX = 5090, | ||
| 1792 | + OpHitObjectRecordHitMotionNV = 5249, | ||
| 1793 | + OpHitObjectRecordHitWithIndexMotionNV = 5250, | ||
| 1794 | + OpHitObjectRecordMissMotionNV = 5251, | ||
| 1795 | + OpHitObjectGetWorldToObjectNV = 5252, | ||
| 1796 | + OpHitObjectGetObjectToWorldNV = 5253, | ||
| 1797 | + OpHitObjectGetObjectRayDirectionNV = 5254, | ||
| 1798 | + OpHitObjectGetObjectRayOriginNV = 5255, | ||
| 1799 | + OpHitObjectTraceRayMotionNV = 5256, | ||
| 1800 | + OpHitObjectGetShaderRecordBufferHandleNV = 5257, | ||
| 1801 | + OpHitObjectGetShaderBindingTableRecordIndexNV = 5258, | ||
| 1802 | + OpHitObjectRecordEmptyNV = 5259, | ||
| 1803 | + OpHitObjectTraceRayNV = 5260, | ||
| 1804 | + OpHitObjectRecordHitNV = 5261, | ||
| 1805 | + OpHitObjectRecordHitWithIndexNV = 5262, | ||
| 1806 | + OpHitObjectRecordMissNV = 5263, | ||
| 1807 | + OpHitObjectExecuteShaderNV = 5264, | ||
| 1808 | + OpHitObjectGetCurrentTimeNV = 5265, | ||
| 1809 | + OpHitObjectGetAttributesNV = 5266, | ||
| 1810 | + OpHitObjectGetHitKindNV = 5267, | ||
| 1811 | + OpHitObjectGetPrimitiveIndexNV = 5268, | ||
| 1812 | + OpHitObjectGetGeometryIndexNV = 5269, | ||
| 1813 | + OpHitObjectGetInstanceIdNV = 5270, | ||
| 1814 | + OpHitObjectGetInstanceCustomIndexNV = 5271, | ||
| 1815 | + OpHitObjectGetWorldRayDirectionNV = 5272, | ||
| 1816 | + OpHitObjectGetWorldRayOriginNV = 5273, | ||
| 1817 | + OpHitObjectGetRayTMaxNV = 5274, | ||
| 1818 | + OpHitObjectGetRayTMinNV = 5275, | ||
| 1819 | + OpHitObjectIsEmptyNV = 5276, | ||
| 1820 | + OpHitObjectIsHitNV = 5277, | ||
| 1821 | + OpHitObjectIsMissNV = 5278, | ||
| 1822 | + OpReorderThreadWithHitObjectNV = 5279, | ||
| 1823 | + OpReorderThreadWithHintNV = 5280, | ||
| 1824 | + OpTypeHitObjectNV = 5281, | ||
| 1624 | OpImageSampleFootprintNV = 5283, | 1825 | OpImageSampleFootprintNV = 5283, |
| 1625 | OpEmitMeshTasksEXT = 5294, | 1826 | OpEmitMeshTasksEXT = 5294, |
| 1626 | OpSetMeshOutputsEXT = 5295, | 1827 | OpSetMeshOutputsEXT = 5295, |
| 1627 | OpGroupNonUniformPartitionNV = 5296, | 1828 | OpGroupNonUniformPartitionNV = 5296, |
| 1628 | OpWritePackedPrimitiveIndices4x8NV = 5299, | 1829 | OpWritePackedPrimitiveIndices4x8NV = 5299, |
| 1830 | + OpFetchMicroTriangleVertexPositionNV = 5300, | ||
| 1831 | + OpFetchMicroTriangleVertexBarycentricNV = 5301, | ||
| 1629 | OpReportIntersectionKHR = 5334, | 1832 | OpReportIntersectionKHR = 5334, |
| 1630 | OpReportIntersectionNV = 5334, | 1833 | OpReportIntersectionNV = 5334, |
| 1631 | OpIgnoreIntersectionNV = 5335, | 1834 | OpIgnoreIntersectionNV = 5335, |
| @@ -1633,6 +1836,7 @@ enum Op : uint | |||
| 1633 | OpTraceNV = 5337, | 1836 | OpTraceNV = 5337, |
| 1634 | OpTraceMotionNV = 5338, | 1837 | OpTraceMotionNV = 5338, |
| 1635 | OpTraceRayMotionNV = 5339, | 1838 | OpTraceRayMotionNV = 5339, |
| 1839 | + OpRayQueryGetIntersectionTriangleVertexPositionsKHR = 5340, | ||
| 1636 | OpTypeAccelerationStructureKHR = 5341, | 1840 | OpTypeAccelerationStructureKHR = 5341, |
| 1637 | OpTypeAccelerationStructureNV = 5341, | 1841 | OpTypeAccelerationStructureNV = 5341, |
| 1638 | OpExecuteCallableNV = 5344, | 1842 | OpExecuteCallableNV = 5344, |
| @@ -1894,6 +2098,9 @@ enum Op : uint | |||
| 1894 | OpTypeStructContinuedINTEL = 6090, | 2098 | OpTypeStructContinuedINTEL = 6090, |
| 1895 | OpConstantCompositeContinuedINTEL = 6091, | 2099 | OpConstantCompositeContinuedINTEL = 6091, |
| 1896 | OpSpecConstantCompositeContinuedINTEL = 6092, | 2100 | OpSpecConstantCompositeContinuedINTEL = 6092, |
| 2101 | + OpCompositeConstructContinuedINTEL = 6096, | ||
| 2102 | + OpConvertFToBF16INTEL = 6116, | ||
| 2103 | + OpConvertBF16ToFINTEL = 6117, | ||
| 1897 | OpControlBarrierArriveINTEL = 6142, | 2104 | OpControlBarrierArriveINTEL = 6142, |
| 1898 | OpControlBarrierWaitINTEL = 6143, | 2105 | OpControlBarrierWaitINTEL = 6143, |
| 1899 | OpGroupIMulKHR = 6401, | 2106 | OpGroupIMulKHR = 6401, |
| @@ -0,0 +1,47 @@ | |||
| 1 | +# Copyright (c) 2015-2023 The Khronos Group Inc. | ||
| 2 | +# | ||
| 3 | +# Permission is hereby granted, free of charge, to any person obtaining a | ||
| 4 | +# copy of this software and/or associated documentation files (the | ||
| 5 | +# "Materials"), to deal in the Materials without restriction, including | ||
| 6 | +# without limitation the rights to use, copy, modify, merge, publish, | ||
| 7 | +# distribute, sublicense, and/or sell copies of the Materials, and to | ||
| 8 | +# permit persons to whom the Materials are furnished to do so, subject to | ||
| 9 | +# the following conditions: | ||
| 10 | +# | ||
| 11 | +# The above copyright notice and this permission notice shall be included | ||
| 12 | +# in all copies or substantial portions of the Materials. | ||
| 13 | +# | ||
| 14 | +# MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS | ||
| 15 | +# KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS | ||
| 16 | +# SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT | ||
| 17 | +# https://www.khronos.org/registry/ | ||
| 18 | +# | ||
| 19 | +# THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
| 20 | +# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
| 21 | +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | ||
| 22 | +# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY | ||
| 23 | +# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, | ||
| 24 | +# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE | ||
| 25 | +# MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. | ||
| 26 | + | ||
| 27 | +add_library(simple_test STATIC) | ||
| 28 | + | ||
| 29 | +target_sources(simple_test PRIVATE | ||
| 30 | + example.cpp | ||
| 31 | +) | ||
| 32 | + | ||
| 33 | +target_link_libraries(simple_test PRIVATE | ||
| 34 | + SPIRV-Headers::SPIRV-Headers | ||
| 35 | +) | ||
| 36 | + | ||
| 37 | +if (NOT TARGET SPIRV-Headers) | ||
| 38 | + message(FATAL_ERROR "SPIRV-Headers target not defined!") | ||
| 39 | +endif() | ||
| 40 | + | ||
| 41 | +if (NOT PROJECT_NAME STREQUAL "SPIRV-Headers") | ||
| 42 | + message(FATAL_ERROR "PROJECT_NAME changed!") # Needed for backcompat with SPIRV-Tools. | ||
| 43 | +endif() | ||
| 44 | + | ||
| 45 | +if (NOT DEFINED SPIRV-Headers_SOURCE_DIR) | ||
| 46 | + message(FATAL_ERROR "SPIRV-Headers_SOURCE_DIR not defined!") # Needed for backcompat with SPIRV-Tools. | ||
| 47 | +endif() | ||
| @@ -0,0 +1,23 @@ | |||
| 1 | +cmake_minimum_required(VERSION 3.0) | ||
| 2 | + | ||
| 3 | +project(TEST_FIND_PACKAGE LANGUAGES CXX) | ||
| 4 | + | ||
| 5 | +add_library(find_package_example STATIC | ||
| 6 | + ${CMAKE_CURRENT_SOURCE_DIR}/../example.cpp | ||
| 7 | +) | ||
| 8 | + | ||
| 9 | +find_package(SPIRV-Headers REQUIRED CONFIG) | ||
| 10 | + | ||
| 11 | +if (NOT TARGET SPIRV-Headers::SPIRV-Headers) | ||
| 12 | + message(FATAL_ERROR "SPIRV-Headers::SPIRV-Headers target not defined") | ||
| 13 | +endif() | ||
| 14 | + | ||
| 15 | +target_link_libraries(find_package_example PRIVATE | ||
| 16 | + SPIRV-Headers::SPIRV-Headers | ||
| 17 | +) | ||
| 18 | + | ||
| 19 | +if (NOT DEFINED SPIRV-Headers_VERSION) | ||
| 20 | + message(FATAL_ERROR "SPIRV-Headers_VERSION not provided!") | ||
| 21 | +endif() | ||
| 22 | + | ||
| 23 | +message(STATUS "SPIRV-Headers_VERSION = ${SPIRV-Headers_VERSION}") | ||
| @@ -0,0 +1,23 @@ | |||
| 1 | +cmake_minimum_required(VERSION 3.14) | ||
| 2 | + | ||
| 3 | +project(TEST_PKGCONFIG LANGUAGES CXX) | ||
| 4 | + | ||
| 5 | +add_library(pkgconfig_example STATIC) | ||
| 6 | + | ||
| 7 | +target_sources(pkgconfig_example PRIVATE | ||
| 8 | + ${CMAKE_CURRENT_SOURCE_DIR}/../example.cpp | ||
| 9 | +) | ||
| 10 | + | ||
| 11 | +find_package(PkgConfig REQUIRED) | ||
| 12 | + | ||
| 13 | +pkg_check_modules(SPIRV_HEADERS REQUIRED IMPORTED_TARGET SPIRV-Headers) | ||
| 14 | + | ||
| 15 | +target_link_libraries(pkgconfig_example PRIVATE | ||
| 16 | + PkgConfig::SPIRV_HEADERS | ||
| 17 | +) | ||
| 18 | + | ||
| 19 | +if (NOT DEFINED SPIRV_HEADERS_VERSION) | ||
| 20 | + message(FATAL_ERROR "SPIRV_HEADERS_VERSION not defined!") | ||
| 21 | +endif() | ||
| 22 | + | ||
| 23 | +message(STATUS "PkgConfig::SPIRV_HEADERS version = ${SPIRV_HEADERS_VERSION}") | ||
| @@ -26,3 +26,4 @@ mk_extinst('AMD_shader_explicit_vertex_parameter', 'extinst.spv-amd-shader-expli | |||
| 26 | mk_extinst('AMD_shader_trinary_minmax', 'extinst.spv-amd-shader-trinary-minmax.grammar.json') | 26 | mk_extinst('AMD_shader_trinary_minmax', 'extinst.spv-amd-shader-trinary-minmax.grammar.json') |
| 27 | mk_extinst('NonSemanticDebugPrintf', 'extinst.nonsemantic.debugprintf.grammar.json') | 27 | mk_extinst('NonSemanticDebugPrintf', 'extinst.nonsemantic.debugprintf.grammar.json') |
| 28 | mk_extinst('NonSemanticClspvReflection', 'extinst.nonsemantic.clspvreflection.grammar.json') | 28 | mk_extinst('NonSemanticClspvReflection', 'extinst.nonsemantic.clspvreflection.grammar.json') |
| 29 | +mk_extinst('NonSemanticDebugBreak', 'extinst.nonsemantic.debugbreak.grammar.json') | ||
| @@ -1,5 +1,7 @@ | |||
| 1 | #!/usr/bin/env bash | 1 | #!/usr/bin/env bash |
| 2 | 2 | ||
| 3 | +set -ex | ||
| 4 | + | ||
| 3 | python3 bin/makeExtinstHeaders.py | 5 | python3 bin/makeExtinstHeaders.py |
| 4 | 6 | ||
| 5 | cd ../../include/spirv/unified1 | 7 | cd ../../include/spirv/unified1 |
| @@ -574,17 +574,11 @@ namespace { | |||
| 574 | 574 | ||
| 575 | // C++ printer | 575 | // C++ printer |
| 576 | class TPrinterCPP : public TPrinterCBase { | 576 | class TPrinterCPP : public TPrinterCBase { |
| 577 | - private: | 577 | + protected: |
| 578 | - void printPrologue(std::ostream& out) const override { | 578 | + void printMaskOperators(std::ostream& out, const std::string& specifiers) const { |
| 579 | - TPrinterCBase::printPrologue(out); | ||
| 580 | - out << "namespace spv {\n\n"; | ||
| 581 | - } | ||
| 582 | - | ||
| 583 | - void printEpilogue(std::ostream& out) const override { | ||
| 584 | const Json::Value& enums = spvRoot["spv"]["enum"]; | 579 | const Json::Value& enums = spvRoot["spv"]["enum"]; |
| 585 | 580 | ||
| 586 | - // Create overloaded operator| for mask types | 581 | + out << "// Overload bitwise operators for mask bit combining\n\n"; |
| 587 | - out << "// Overload operator| for mask bit combining\n\n"; | ||
| 588 | 582 | ||
| 589 | for (auto opClass = enums.begin(); opClass != enums.end(); ++opClass) { | 583 | for (auto opClass = enums.begin(); opClass != enums.end(); ++opClass) { |
| 590 | const bool isMask = (*opClass)["Type"].asString() == "Bit"; | 584 | const bool isMask = (*opClass)["Type"].asString() == "Bit"; |
| @@ -593,11 +587,29 @@ namespace { | |||
| 593 | if (isMask) { | 587 | if (isMask) { |
| 594 | const auto typeName = opName + styleStr(enumMask); | 588 | const auto typeName = opName + styleStr(enumMask); |
| 595 | 589 | ||
| 596 | - out << "inline " + typeName + " operator|(" + typeName + " a, " + typeName + " b) { return " + | 590 | + // Overload operator| |
| 597 | - typeName + "(unsigned(a) | unsigned(b)); }\n"; | 591 | + out << specifiers << " " << typeName << " operator|(" << typeName << " a, " << typeName << " b) { return " << |
| 592 | + typeName << "(unsigned(a) | unsigned(b)); }\n"; | ||
| 593 | + // Overload operator& | ||
| 594 | + out << specifiers << " " << typeName << " operator&(" << typeName << " a, " << typeName << " b) { return " << | ||
| 595 | + typeName << "(unsigned(a) & unsigned(b)); }\n"; | ||
| 596 | + // Overload operator^ | ||
| 597 | + out << specifiers << " " << typeName << " operator^(" << typeName << " a, " << typeName << " b) { return " << | ||
| 598 | + typeName << "(unsigned(a) ^ unsigned(b)); }\n"; | ||
| 599 | + // Overload operator~ | ||
| 600 | + out << specifiers << " " << typeName << " operator~(" << typeName << " a) { return " << | ||
| 601 | + typeName << "(~unsigned(a)); }\n"; | ||
| 598 | } | 602 | } |
| 599 | } | 603 | } |
| 604 | + } | ||
| 605 | + private: | ||
| 606 | + void printPrologue(std::ostream& out) const override { | ||
| 607 | + TPrinterCBase::printPrologue(out); | ||
| 608 | + out << "namespace spv {\n\n"; | ||
| 609 | + } | ||
| 600 | 610 | ||
| 611 | + void printEpilogue(std::ostream& out) const override { | ||
| 612 | + printMaskOperators(out, "inline"); | ||
| 601 | out << "\n} // end namespace spv\n\n"; | 613 | out << "\n} // end namespace spv\n\n"; |
| 602 | out << "#endif // #ifndef spirv_" << headerGuardSuffix() << std::endl; | 614 | out << "#endif // #ifndef spirv_" << headerGuardSuffix() << std::endl; |
| 603 | } | 615 | } |
| @@ -633,6 +645,11 @@ namespace { | |||
| 633 | // C++11 printer (uses enum classes) | 645 | // C++11 printer (uses enum classes) |
| 634 | class TPrinterCPP11 final : public TPrinterCPP { | 646 | class TPrinterCPP11 final : public TPrinterCPP { |
| 635 | private: | 647 | private: |
| 648 | + void printEpilogue(std::ostream& out) const override { | ||
| 649 | + printMaskOperators(out, "constexpr"); | ||
| 650 | + out << "\n} // end namespace spv\n\n"; | ||
| 651 | + out << "#endif // #ifndef spirv_" << headerGuardSuffix() << std::endl; | ||
| 652 | + } | ||
| 636 | std::string enumBeg(const std::string& s, enumStyle_t style) const override { | 653 | std::string enumBeg(const std::string& s, enumStyle_t style) const override { |
| 637 | return std::string("enum class ") + s + styleStr(style) + " : unsigned {\n"; | 654 | return std::string("enum class ") + s + styleStr(style) + " : unsigned {\n"; |
| 638 | } | 655 | } |
| @@ -36,8 +36,185 @@ | |||
| 36 | 36 | ||
| 37 | 37 | ||
| 38 | 38 | ||
| 39 | +namespace { | ||
| 40 | +// Returns true if the given string is a valid SPIR-V version. | ||
| 41 | +bool validSpirvVersionString(const std::string s) { | ||
| 42 | + return | ||
| 43 | + s == "1.0" || | ||
| 44 | + s == "1.1" || | ||
| 45 | + s == "1.2" || | ||
| 46 | + s == "1.3" || | ||
| 47 | + s == "1.4" || | ||
| 48 | + s == "1.5" || | ||
| 49 | + s == "1.6"; | ||
| 50 | +} | ||
| 51 | + | ||
| 52 | +// Returns true if the given string is a valid version | ||
| 53 | +// specifier in the grammar file. | ||
| 54 | +bool validSpirvVersionStringSpecifier(const std::string s) { | ||
| 55 | + return s == "None" || validSpirvVersionString(s); | ||
| 56 | +} | ||
| 57 | +} // anonymous namespace | ||
| 58 | + | ||
| 39 | namespace spv { | 59 | namespace spv { |
| 40 | 60 | ||
| 61 | +bool IsLegacyDoublyEnabledInstruction(const std::string& instruction) { | ||
| 62 | + static std::unordered_set<std::string> allowed = { | ||
| 63 | + "OpSubgroupBallotKHR", | ||
| 64 | + "OpSubgroupFirstInvocationKHR", | ||
| 65 | + "OpSubgroupAllKHR", | ||
| 66 | + "OpSubgroupAnyKHR", | ||
| 67 | + "OpSubgroupAllEqualKHR", | ||
| 68 | + "OpSubgroupReadInvocationKHR", | ||
| 69 | + "OpTraceRayKHR", | ||
| 70 | + "OpExecuteCallableKHR", | ||
| 71 | + "OpConvertUToAccelerationStructureKHR", | ||
| 72 | + "OpIgnoreIntersectionKHR", | ||
| 73 | + "OpTerminateRayKHR", | ||
| 74 | + "OpTypeRayQueryKHR", | ||
| 75 | + "OpRayQueryInitializeKHR", | ||
| 76 | + "OpRayQueryTerminateKHR", | ||
| 77 | + "OpRayQueryGenerateIntersectionKHR", | ||
| 78 | + "OpRayQueryConfirmIntersectionKHR", | ||
| 79 | + "OpRayQueryProceedKHR", | ||
| 80 | + "OpRayQueryGetIntersectionTypeKHR", | ||
| 81 | + "OpGroupIAddNonUniformAMD", | ||
| 82 | + "OpGroupFAddNonUniformAMD", | ||
| 83 | + "OpGroupFMinNonUniformAMD", | ||
| 84 | + "OpGroupUMinNonUniformAMD", | ||
| 85 | + "OpGroupSMinNonUniformAMD", | ||
| 86 | + "OpGroupFMaxNonUniformAMD", | ||
| 87 | + "OpGroupUMaxNonUniformAMD", | ||
| 88 | + "OpGroupSMaxNonUniformAMD", | ||
| 89 | + "OpFragmentMaskFetchAMD", | ||
| 90 | + "OpFragmentFetchAMD", | ||
| 91 | + "OpImageSampleFootprintNV", | ||
| 92 | + "OpGroupNonUniformPartitionNV", | ||
| 93 | + "OpWritePackedPrimitiveIndices4x8NV", | ||
| 94 | + "OpReportIntersectionNV", | ||
| 95 | + "OpReportIntersectionKHR", | ||
| 96 | + "OpIgnoreIntersectionNV", | ||
| 97 | + "OpTerminateRayNV", | ||
| 98 | + "OpTraceNV", | ||
| 99 | + "OpTraceMotionNV", | ||
| 100 | + "OpTraceRayMotionNV", | ||
| 101 | + "OpTypeAccelerationStructureNV", | ||
| 102 | + "OpTypeAccelerationStructureKHR", | ||
| 103 | + "OpExecuteCallableNV", | ||
| 104 | + "OpTypeCooperativeMatrixNV", | ||
| 105 | + "OpCooperativeMatrixLoadNV", | ||
| 106 | + "OpCooperativeMatrixStoreNV", | ||
| 107 | + "OpCooperativeMatrixMulAddNV", | ||
| 108 | + "OpCooperativeMatrixLengthNV", | ||
| 109 | + "OpBeginInvocationInterlockEXT", | ||
| 110 | + "OpEndInvocationInterlockEXT", | ||
| 111 | + "OpIsHelperInvocationEXT", | ||
| 112 | + "OpConstantFunctionPointerINTEL", | ||
| 113 | + "OpFunctionPointerCallINTEL", | ||
| 114 | + "OpAssumeTrueKHR", | ||
| 115 | + "OpExpectKHR", | ||
| 116 | + "OpLoopControlINTEL", | ||
| 117 | + "OpAliasDomainDeclINTEL", | ||
| 118 | + "OpAliasScopeDeclINTEL", | ||
| 119 | + "OpAliasScopeListDeclINTEL", | ||
| 120 | + "OpReadPipeBlockingINTEL", | ||
| 121 | + "OpWritePipeBlockingINTEL", | ||
| 122 | + "OpFPGARegINTEL", | ||
| 123 | + "OpRayQueryGetRayTMinKHR", | ||
| 124 | + "OpRayQueryGetRayFlagsKHR", | ||
| 125 | + "OpRayQueryGetIntersectionTKHR", | ||
| 126 | + "OpRayQueryGetIntersectionInstanceCustomIndexKHR", | ||
| 127 | + "OpRayQueryGetIntersectionInstanceIdKHR", | ||
| 128 | + "OpRayQueryGetIntersectionInstanceShaderBindingTableRecordOffsetKHR", | ||
| 129 | + "OpRayQueryGetIntersectionGeometryIndexKHR", | ||
| 130 | + "OpRayQueryGetIntersectionPrimitiveIndexKHR", | ||
| 131 | + "OpRayQueryGetIntersectionBarycentricsKHR", | ||
| 132 | + "OpRayQueryGetIntersectionFrontFaceKHR", | ||
| 133 | + "OpRayQueryGetIntersectionCandidateAABBOpaqueKHR", | ||
| 134 | + "OpRayQueryGetIntersectionObjectRayDirectionKHR", | ||
| 135 | + "OpRayQueryGetIntersectionObjectRayOriginKHR", | ||
| 136 | + "OpRayQueryGetWorldRayDirectionKHR", | ||
| 137 | + "OpRayQueryGetWorldRayOriginKHR", | ||
| 138 | + "OpRayQueryGetIntersectionObjectToWorldKHR", | ||
| 139 | + "OpRayQueryGetIntersectionWorldToObjectKHR", | ||
| 140 | + "OpAtomicFAddEXT", | ||
| 141 | + }; | ||
| 142 | + return allowed.count(instruction) != 0; | ||
| 143 | +} | ||
| 144 | + | ||
| 145 | +bool EnumValue::IsValid(OperandClass oc, const std::string& context) const | ||
| 146 | +{ | ||
| 147 | + bool result = true; | ||
| 148 | + if (firstVersion.empty()) { | ||
| 149 | + std::cerr << "Error: " << context << " " << name << " \"version\" must be set, probably to \"None\"" << std::endl; | ||
| 150 | + result = false; | ||
| 151 | + } else if (!validSpirvVersionStringSpecifier(firstVersion)) { | ||
| 152 | + std::cerr << "Error: " << context << " " << name << " \"version\" is invalid: " << firstVersion << std::endl; | ||
| 153 | + result = false; | ||
| 154 | + } | ||
| 155 | + if (!lastVersion.empty() && !validSpirvVersionString(lastVersion)) { | ||
| 156 | + std::cerr << "Error: " << context << " " << name << " \"lastVersion\" is invalid: " << lastVersion << std::endl; | ||
| 157 | + result = false; | ||
| 158 | + } | ||
| 159 | + | ||
| 160 | + // When a feature is introduced by an extension, the firstVersion is set to | ||
| 161 | + // "None". There are three cases: | ||
| 162 | + // - A new capability should be guarded/enabled by the extension | ||
| 163 | + // - A new instruction should be: | ||
| 164 | + // - Guarded/enabled by a new capability. | ||
| 165 | + // - Not enabled by *both* a capability and an extension. | ||
| 166 | + // There are many existing instructions that are already like this, | ||
| 167 | + // and we grandparent them as allowed. | ||
| 168 | + // - Other enums fall into two cases: | ||
| 169 | + // 1. The enum is part of a new operand kind introduced by the extension. | ||
| 170 | + // In this case we rely on transitivity: The use of the operand occurs | ||
| 171 | + // in a new instruction that itself is guarded; or as the operand of | ||
| 172 | + // another operand that itself is (recursively) guarded. | ||
| 173 | + // 2. The enum is a new case in an existing operand kind. This case | ||
| 174 | + // should be guarded by a capability. However, we do not check this | ||
| 175 | + // here. Checking it requires more context than we have here. | ||
| 176 | + if (oc == OperandOpcode) { | ||
| 177 | + const bool instruction_unusable = | ||
| 178 | + (firstVersion == "None") && extensions.empty() && capabilities.empty(); | ||
| 179 | + if (instruction_unusable) { | ||
| 180 | + std::cerr << "Error: " << context << " " << name << " is not usable: " | ||
| 181 | + << "its version is set to \"None\", and it is not enabled by a " | ||
| 182 | + << "capability or extension. Guard it with a capability." | ||
| 183 | + << std::endl; | ||
| 184 | + result = false; | ||
| 185 | + } | ||
| 186 | + // Complain if an instruction is not in any core version and also enabled by | ||
| 187 | + // both an extension and a capability. | ||
| 188 | + // It's important to check the "not in any core version" case, because, | ||
| 189 | + // for example, OpTerminateInvocation is in SPIR-V 1.6 *and* enabled by an | ||
| 190 | + // extension, and guarded by the Shader capability. | ||
| 191 | + const bool instruction_doubly_enabled = (firstVersion == "None") && | ||
| 192 | + !extensions.empty() && | ||
| 193 | + !capabilities.empty(); | ||
| 194 | + if (instruction_doubly_enabled && !IsLegacyDoublyEnabledInstruction(name)) { | ||
| 195 | + std::cerr << "Error: " << context << " " << name << " is doubly-enabled: " | ||
| 196 | + << "it is enabled by both a capability and an extension. " | ||
| 197 | + << "Guard it with a capability only." << std::endl; | ||
| 198 | + result = false; | ||
| 199 | + } | ||
| 200 | + } | ||
| 201 | + if (oc == OperandCapability) { | ||
| 202 | + // If capability X lists capabilities Y and Z, then Y and Z are *enabled* | ||
| 203 | + // when X is enabled. They are not *guards* on X's use. | ||
| 204 | + // Only versions and extensions can guard a capability. | ||
| 205 | + const bool capability_unusable = | ||
| 206 | + (firstVersion == "None") && extensions.empty(); | ||
| 207 | + if (capability_unusable) { | ||
| 208 | + std::cerr << "Error: " << context << " " << name << " is not usable: " | ||
| 209 | + << "its version is set to \"None\", and it is not enabled by " | ||
| 210 | + << "an extension. Guard it with an extension." << std::endl; | ||
| 211 | + result = false; | ||
| 212 | + } | ||
| 213 | + } | ||
| 214 | + | ||
| 215 | + return result; | ||
| 216 | +} | ||
| 217 | + | ||
| 41 | // The set of objects that hold all the instruction/operand | 218 | // The set of objects that hold all the instruction/operand |
| 42 | // parameterization information. | 219 | // parameterization information. |
| 43 | InstructionValues InstructionDesc; | 220 | InstructionValues InstructionDesc; |
| @@ -88,6 +265,13 @@ EnumValues RayQueryCommittedIntersectionTypeParams; | |||
| 88 | EnumValues RayQueryCandidateIntersectionTypeParams; | 265 | EnumValues RayQueryCandidateIntersectionTypeParams; |
| 89 | EnumValues FragmentShadingRateParams; | 266 | EnumValues FragmentShadingRateParams; |
| 90 | EnumValues PackedVectorFormatParams; | 267 | EnumValues PackedVectorFormatParams; |
| 268 | +EnumValues CooperativeMatrixOperandsParams; | ||
| 269 | +EnumValues CooperativeMatrixLayoutParams; | ||
| 270 | +EnumValues CooperativeMatrixUseParams; | ||
| 271 | +EnumValues InitializationModeQualifierParams; | ||
| 272 | +EnumValues HostAccessQualifierParams; | ||
| 273 | +EnumValues LoadCacheControlParams; | ||
| 274 | +EnumValues StoreCacheControlParams; | ||
| 91 | 275 | ||
| 92 | std::pair<bool, std::string> ReadFile(const std::string& path) | 276 | std::pair<bool, std::string> ReadFile(const std::string& path) |
| 93 | { | 277 | { |
| @@ -158,6 +342,8 @@ ClassOptionality ToOperandClassAndOptionality(const std::string& operandKind, co | |||
| 158 | type = OperandLiteralNumber; | 342 | type = OperandLiteralNumber; |
| 159 | } else if (operandKind == "LiteralContextDependentNumber") { | 343 | } else if (operandKind == "LiteralContextDependentNumber") { |
| 160 | type = OperandAnySizeLiteralNumber; | 344 | type = OperandAnySizeLiteralNumber; |
| 345 | + } else if (operandKind == "LiteralFloat") { | ||
| 346 | + type = OperandLiteralNumber; | ||
| 161 | } else if (operandKind == "SourceLanguage") { | 347 | } else if (operandKind == "SourceLanguage") { |
| 162 | type = OperandSource; | 348 | type = OperandSource; |
| 163 | } else if (operandKind == "ExecutionModel") { | 349 | } else if (operandKind == "ExecutionModel") { |
| @@ -234,6 +420,20 @@ ClassOptionality ToOperandClassAndOptionality(const std::string& operandKind, co | |||
| 234 | type = OperandFragmentShadingRate; | 420 | type = OperandFragmentShadingRate; |
| 235 | } else if (operandKind == "PackedVectorFormat") { | 421 | } else if (operandKind == "PackedVectorFormat") { |
| 236 | type = OperandPackedVectorFormat; | 422 | type = OperandPackedVectorFormat; |
| 423 | + } else if (operandKind == "CooperativeMatrixOperands") { | ||
| 424 | + type = OperandCooperativeMatrixOperands; | ||
| 425 | + } else if (operandKind == "CooperativeMatrixLayout") { | ||
| 426 | + type = OperandCooperativeMatrixLayout; | ||
| 427 | + } else if (operandKind == "CooperativeMatrixUse") { | ||
| 428 | + type = OperandCooperativeMatrixUse; | ||
| 429 | + } else if (operandKind == "InitializationModeQualifier") { | ||
| 430 | + type = OperandInitializationModeQualifier; | ||
| 431 | + } else if (operandKind == "HostAccessQualifier") { | ||
| 432 | + type = OperandHostAccessQualifier; | ||
| 433 | + } else if (operandKind == "LoadCacheControl") { | ||
| 434 | + type = OperandLoadCacheControl; | ||
| 435 | + } else if (operandKind == "StoreCacheControl") { | ||
| 436 | + type = OperandStoreCacheControl; | ||
| 237 | } | 437 | } |
| 238 | 438 | ||
| 239 | if (type == OperandNone) { | 439 | if (type == OperandNone) { |
| @@ -273,6 +473,8 @@ void jsonToSpirv(const std::string& jsonPath, bool buildingHeaders) | |||
| 273 | return; | 473 | return; |
| 274 | initialized = true; | 474 | initialized = true; |
| 275 | 475 | ||
| 476 | + size_t errorCount = 0; | ||
| 477 | + | ||
| 276 | // Read the JSON grammar file. | 478 | // Read the JSON grammar file. |
| 277 | bool fileReadOk = false; | 479 | bool fileReadOk = false; |
| 278 | std::string content; | 480 | std::string content; |
| @@ -326,8 +528,10 @@ void jsonToSpirv(const std::string& jsonPath, bool buildingHeaders) | |||
| 326 | for (const auto& printingClass : printingClasses) { | 528 | for (const auto& printingClass : printingClasses) { |
| 327 | if (printingClass["tag"].asString().size() > 0) | 529 | if (printingClass["tag"].asString().size() > 0) |
| 328 | tags.insert(printingClass["tag"].asString()); // just for error checking | 530 | tags.insert(printingClass["tag"].asString()); // just for error checking |
| 329 | - else | 531 | + else { |
| 330 | std::cerr << "Error: each instruction_printing_class requires a non-empty \"tag\"" << std::endl; | 532 | std::cerr << "Error: each instruction_printing_class requires a non-empty \"tag\"" << std::endl; |
| 533 | + std::exit(1); | ||
| 534 | + } | ||
| 331 | if (buildingHeaders || printingClass["tag"].asString() != "@exclude") { | 535 | if (buildingHeaders || printingClass["tag"].asString() != "@exclude") { |
| 332 | InstructionPrintingClasses.push_back({printingClass["tag"].asString(), | 536 | InstructionPrintingClasses.push_back({printingClass["tag"].asString(), |
| 333 | printingClass["heading"].asString()}); | 537 | printingClass["heading"].asString()}); |
| @@ -343,6 +547,7 @@ void jsonToSpirv(const std::string& jsonPath, bool buildingHeaders) | |||
| 343 | if (printingClass.size() == 0) { | 547 | if (printingClass.size() == 0) { |
| 344 | std::cerr << "Error: " << inst["opname"].asString() | 548 | std::cerr << "Error: " << inst["opname"].asString() |
| 345 | << " requires a non-empty printing \"class\" tag" << std::endl; | 549 | << " requires a non-empty printing \"class\" tag" << std::endl; |
| 550 | + std::exit(1); | ||
| 346 | } | 551 | } |
| 347 | if (!buildingHeaders && printingClass == "@exclude") | 552 | if (!buildingHeaders && printingClass == "@exclude") |
| 348 | continue; | 553 | continue; |
| @@ -350,6 +555,7 @@ void jsonToSpirv(const std::string& jsonPath, bool buildingHeaders) | |||
| 350 | std::cerr << "Error: " << inst["opname"].asString() | 555 | std::cerr << "Error: " << inst["opname"].asString() |
| 351 | << " requires a \"class\" declared as a \"tag\" in \"instruction printing_class\"" | 556 | << " requires a \"class\" declared as a \"tag\" in \"instruction printing_class\"" |
| 352 | << std::endl; | 557 | << std::endl; |
| 558 | + std::exit(1); | ||
| 353 | } | 559 | } |
| 354 | const auto opcode = inst["opcode"].asUInt(); | 560 | const auto opcode = inst["opcode"].asUInt(); |
| 355 | const std::string name = inst["opname"].asString(); | 561 | const std::string name = inst["opname"].asString(); |
| @@ -387,12 +593,15 @@ void jsonToSpirv(const std::string& jsonPath, bool buildingHeaders) | |||
| 387 | std::move(caps), std::move(version), std::move(lastVersion), std::move(exts), | 593 | std::move(caps), std::move(version), std::move(lastVersion), std::move(exts), |
| 388 | std::move(operands))), | 594 | std::move(operands))), |
| 389 | printingClass, defTypeId, defResultId); | 595 | printingClass, defTypeId, defResultId); |
| 596 | + if (!InstructionDesc.back().IsValid(OperandOpcode, "instruction")) { | ||
| 597 | + errorCount++; | ||
| 598 | + } | ||
| 390 | } | 599 | } |
| 391 | 600 | ||
| 392 | // Specific additional context-dependent operands | 601 | // Specific additional context-dependent operands |
| 393 | 602 | ||
| 394 | // Populate dest with EnumValue objects constructed from source. | 603 | // Populate dest with EnumValue objects constructed from source. |
| 395 | - const auto populateEnumValues = [&getCaps,&getExts](EnumValues* dest, const Json::Value& source, bool bitEnum) { | 604 | + const auto populateEnumValues = [&getCaps,&getExts,&errorCount](EnumValues* dest, const Json::Value& source, bool bitEnum) { |
| 396 | // A lambda for determining the numeric value to be used for a given | 605 | // A lambda for determining the numeric value to be used for a given |
| 397 | // enumerant in JSON form, and whether that value is a 0 in a bitfield. | 606 | // enumerant in JSON form, and whether that value is a 0 in a bitfield. |
| 398 | auto getValue = [&bitEnum](const Json::Value& enumerant) { | 607 | auto getValue = [&bitEnum](const Json::Value& enumerant) { |
| @@ -451,12 +660,22 @@ void jsonToSpirv(const std::string& jsonPath, bool buildingHeaders) | |||
| 451 | } | 660 | } |
| 452 | }; | 661 | }; |
| 453 | 662 | ||
| 454 | - const auto establishOperandClass = [&populateEnumValues]( | 663 | + const auto establishOperandClass = [&populateEnumValues,&errorCount]( |
| 455 | const std::string& enumName, spv::OperandClass operandClass, | 664 | const std::string& enumName, spv::OperandClass operandClass, |
| 456 | spv::EnumValues* enumValues, const Json::Value& operandEnum, const std::string& category) { | 665 | spv::EnumValues* enumValues, const Json::Value& operandEnum, const std::string& category) { |
| 457 | assert(category == "BitEnum" || category == "ValueEnum"); | 666 | assert(category == "BitEnum" || category == "ValueEnum"); |
| 458 | bool bitEnum = (category == "BitEnum"); | 667 | bool bitEnum = (category == "BitEnum"); |
| 668 | + if (!operandEnum["version"].empty()) { | ||
| 669 | + std::cerr << "Error: container for " << enumName << " operand_kind must not have a version field" << std::endl; | ||
| 670 | + errorCount++; | ||
| 671 | + } | ||
| 459 | populateEnumValues(enumValues, operandEnum, bitEnum); | 672 | populateEnumValues(enumValues, operandEnum, bitEnum); |
| 673 | + const std::string errContext = "enum " + enumName; | ||
| 674 | + for (const auto& e: *enumValues) { | ||
| 675 | + if (!e.IsValid(operandClass, errContext)) { | ||
| 676 | + errorCount++; | ||
| 677 | + } | ||
| 678 | + } | ||
| 460 | OperandClassParams[operandClass].set(enumName, enumValues, bitEnum); | 679 | OperandClassParams[operandClass].set(enumName, enumValues, bitEnum); |
| 461 | }; | 680 | }; |
| 462 | 681 | ||
| @@ -544,8 +763,26 @@ void jsonToSpirv(const std::string& jsonPath, bool buildingHeaders) | |||
| 544 | establishOperandClass(enumName, OperandFragmentShadingRate, &FragmentShadingRateParams, operandEnum, category); | 763 | establishOperandClass(enumName, OperandFragmentShadingRate, &FragmentShadingRateParams, operandEnum, category); |
| 545 | } else if (enumName == "PackedVectorFormat") { | 764 | } else if (enumName == "PackedVectorFormat") { |
| 546 | establishOperandClass(enumName, OperandPackedVectorFormat, &PackedVectorFormatParams, operandEnum, category); | 765 | establishOperandClass(enumName, OperandPackedVectorFormat, &PackedVectorFormatParams, operandEnum, category); |
| 766 | + } else if (enumName == "CooperativeMatrixOperands") { | ||
| 767 | + establishOperandClass(enumName, OperandCooperativeMatrixOperands, &CooperativeMatrixOperandsParams, operandEnum, category); | ||
| 768 | + } else if (enumName == "CooperativeMatrixLayout") { | ||
| 769 | + establishOperandClass(enumName, OperandCooperativeMatrixLayout, &CooperativeMatrixLayoutParams, operandEnum, category); | ||
| 770 | + } else if (enumName == "CooperativeMatrixUse") { | ||
| 771 | + establishOperandClass(enumName, OperandCooperativeMatrixUse, &CooperativeMatrixUseParams, operandEnum, category); | ||
| 772 | + } else if (enumName == "InitializationModeQualifier") { | ||
| 773 | + establishOperandClass(enumName, OperandInitializationModeQualifier, &InitializationModeQualifierParams, operandEnum, category); | ||
| 774 | + } else if (enumName == "HostAccessQualifier") { | ||
| 775 | + establishOperandClass(enumName, OperandHostAccessQualifier, &HostAccessQualifierParams, operandEnum, category); | ||
| 776 | + } else if (enumName == "LoadCacheControl") { | ||
| 777 | + establishOperandClass(enumName, OperandLoadCacheControl, &LoadCacheControlParams, operandEnum, category); | ||
| 778 | + } else if (enumName == "StoreCacheControl") { | ||
| 779 | + establishOperandClass(enumName, OperandStoreCacheControl, &StoreCacheControlParams, operandEnum, category); | ||
| 547 | } | 780 | } |
| 548 | } | 781 | } |
| 782 | + | ||
| 783 | + if (errorCount > 0) { | ||
| 784 | + std::exit(1); | ||
| 785 | + } | ||
| 549 | } | 786 | } |
| 550 | 787 | ||
| 551 | }; // end namespace spv | 788 | }; // end namespace spv |
| @@ -96,6 +96,13 @@ enum OperandClass { | |||
| 96 | OperandQuantizationModes, | 96 | OperandQuantizationModes, |
| 97 | OperandOverflowModes, | 97 | OperandOverflowModes, |
| 98 | OperandPackedVectorFormat, | 98 | OperandPackedVectorFormat, |
| 99 | + OperandCooperativeMatrixOperands, | ||
| 100 | + OperandCooperativeMatrixLayout, | ||
| 101 | + OperandCooperativeMatrixUse, | ||
| 102 | + OperandInitializationModeQualifier, | ||
| 103 | + OperandHostAccessQualifier, | ||
| 104 | + OperandLoadCacheControl, | ||
| 105 | + OperandStoreCacheControl, | ||
| 99 | 106 | ||
| 100 | OperandOpcode, | 107 | OperandOpcode, |
| 101 | 108 | ||
| @@ -184,6 +191,7 @@ public: | |||
| 184 | 191 | ||
| 185 | iterator begin() { return values.begin(); } | 192 | iterator begin() { return values.begin(); } |
| 186 | iterator end() { return values.end(); } | 193 | iterator end() { return values.end(); } |
| 194 | + EValue& back() { return values.back(); } | ||
| 187 | 195 | ||
| 188 | private: | 196 | private: |
| 189 | ContainerType values; | 197 | ContainerType values; |
| @@ -216,6 +224,10 @@ public: | |||
| 216 | Extensions extensions; | 224 | Extensions extensions; |
| 217 | OperandParameters operands; | 225 | OperandParameters operands; |
| 218 | const char* desc; | 226 | const char* desc; |
| 227 | + | ||
| 228 | + // Returns true if this enum is valid, in isolation. | ||
| 229 | + // Otherwise emits a diagnostic to std::cerr and returns false. | ||
| 230 | + bool IsValid(OperandClass oc, const std::string& context) const; | ||
| 219 | }; | 231 | }; |
| 220 | 232 | ||
| 221 | using EnumValues = EnumValuesContainer<EnumValue>; | 233 | using EnumValues = EnumValuesContainer<EnumValue>; |