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add zhaoxin processors support. #240
vicwang创建于 2025年9月5日
add zhaoxin processors support. #240
已开启
vicwang创建于 2025年9月5日
从refs/pull/240/head合入到openEuler-22.03-LTS-SP4
共 2 个文件变更+87-1
Mopenjdk-latest.spec+6-1
@@ -898,7 +898,7 @@ Name: java-latest-%{origin}
898Version: %{newjavaver}.%{buildver}898Version: %{newjavaver}.%{buildver}
899# This package needs `.rolling` as part of Release so as to not conflict on install with899# This package needs `.rolling` as part of Release so as to not conflict on install with
900# java-X-openjdk. I.e. when latest rolling release is also an LTS release packaged as900# java-X-openjdk. I.e. when latest rolling release is also an LTS release packaged as
901-Release: 2901+Release: 3
902 902 
903# java-1.5.0-ibm from jpackage.org set Epoch to 1 for unknown reasons903# java-1.5.0-ibm from jpackage.org set Epoch to 1 for unknown reasons
904# and this change was brought into RHEL-4. java-1.5.0-ibm packages904# and this change was brought into RHEL-4. java-1.5.0-ibm packages
@@ -980,6 +980,7 @@ Patch8: downgrade-the-glibc-symver-of-log2f-posix_spawn.patch
980 980 
981# 23.0.1981# 23.0.1
982Patch9: 8332854-Unable-to-build-openjdk-with-with-harfbuzz=system.patch982Patch9: 8332854-Unable-to-build-openjdk-with-with-harfbuzz=system.patch
983+Patch10: zhaoxin-processors-support.patch
983 984 
984############################################985############################################
985#986#
@@ -1218,6 +1219,7 @@ pushd %{top_level_dir_name}
1218%patch7 -p11219%patch7 -p1
1219%patch8 -p11220%patch8 -p1
1220%patch9 -p11221%patch9 -p1
1222+%patch10 -p1
1221popd # openjdk1223popd # openjdk
1222 1224 
1223%patch10001225%patch1000
@@ -1795,6 +1797,9 @@ cjc.mainProgram(args) -- the returns from copy_jdk_configs.lua should not affect
1795 1797 
1796 1798 
1797%changelog1799%changelog
1800+* Fri Sep 5 2025 vicwang-oc <vicwang-oc@zhaoxin.com> - 1:23.0.1.11-3
1801+- add zhaoxin processors support.
1802+ 
1798* Mon Jun 9 2025 Benshuai5D <zhanngyunbo7@huawei.com> - 1:23.0.1.11-21803* Mon Jun 9 2025 Benshuai5D <zhanngyunbo7@huawei.com> - 1:23.0.1.11-2
1799- remove OpenJDK23U-jdk tar1804- remove OpenJDK23U-jdk tar
1800 1805 
Azhaoxin-processors-support.patch+81-0
@@ -0,0 +1,81 @@
1+diff --git a/src/hotspot/cpu/x86/vm_version_x86.cpp b/src/hotspot/cpu/x86/vm_version_x86.cpp
2+index f5389d0ef90..9126ea35365 100644
3+--- a/src/hotspot/cpu/x86/vm_version_x86.cpp
4++++ b/src/hotspot/cpu/x86/vm_version_x86.cpp
5+@@ -887,10 +887,18 @@ void VM_Version::get_processor_features() {
6+ if (UseSSE < 1)
7+ _features &= ~CPU_SSE;
8+
9+- //since AVX instructions is slower than SSE in some ZX cpus, force USEAVX=0.
10+- if (is_zx() && ((cpu_family() == 6) || (cpu_family() == 7))) {
11+- UseAVX = 0;
12+- }
13++ // ZX cpus specific settings
14++ if (is_zx() && FLAG_IS_DEFAULT(UseAVX)) {
15++ if (cpu_family() == 7) {
16++ if (extended_cpu_model() == 0x5B || extended_cpu_model() == 0x6B) {
17++ UseAVX = 1;
18++ } else if (extended_cpu_model() == 0x1B || extended_cpu_model() == 0x3B) {
19++ UseAVX = 0;
20++ }
21++ } else if (cpu_family() == 6) {
22++ UseAVX = 0;
23++ }
24++ }
25+
26+ // UseSSE is set to the smaller of what hardware supports and what
27+ // the command line requires. I.e., you cannot set UseSSE to 2 on
28+@@ -2637,6 +2645,7 @@ void VM_Version::resolve_cpu_information_details(void) {
29+
30+ const char* VM_Version::cpu_family_description(void) {
31+ int cpu_family_id = extended_cpu_family();
32++ int cpu_model_id = extended_cpu_model();
33+ if (is_amd()) {
34+ if (cpu_family_id < ExtendedFamilyIdLength_AMD) {
35+ return _family_id_amd[cpu_family_id];
36+@@ -2650,6 +2659,22 @@ const char* VM_Version::cpu_family_description(void) {
37+ return _family_id_intel[cpu_family_id];
38+ }
39+ }
40++ if (is_zx()) {
41++ if (cpu_family_id == 7) {
42++ switch (cpu_model_id) {
43++ case 0x1B:
44++ return "wudaokou";
45++ case 0x3B:
46++ return "lujiazui";
47++ case 0x5B:
48++ return "yongfeng";
49++ case 0x6B:
50++ return "shijidadao";
51++ }
52++ } else if (cpu_family_id == 6) {
53++ return "zhangjiang";
54++ }
55++ }
56+ if (is_hygon()) {
57+ return "Dhyana";
58+ }
59+@@ -2669,6 +2694,9 @@ int VM_Version::cpu_type_description(char* const buf, size_t buf_len) {
60+ } else if (is_amd()) {
61+ cpu_type = "AMD";
62+ x64 = cpu_is_em64t() ? " AMD64" : "";
63++ } else if (is_zx()) {
64++ cpu_type = "Zhaoxin";
65++ x64 = cpu_is_em64t() ? " x86_64" : "";
66+ } else if (is_hygon()) {
67+ cpu_type = "Hygon";
68+ x64 = cpu_is_em64t() ? " AMD64" : "";
69+@@ -3239,6 +3267,12 @@ int VM_Version::allocate_prefetch_distance(bool use_watermark_prefetch) {
70+ } else {
71+ return 128; // Athlon
72+ }
73++ } else if (is_zx()) {
74++ if (supports_sse2()) {
75++ return 256;
76++ } else {
77++ return 128;
78++ }
79+ } else { // Intel
80+ if (supports_sse3() && cpu_family() == 6) {
81+ if (supports_sse4_2() && supports_ht()) { // Nehalem based cpus