已合并
【PR】: add Ascend910_9363 ini #3559
handong12138创建于 7月10日
【PR】: add Ascend910_9363 ini #3559
已合并
共 3 个文件变更+284-1
| @@ -352,6 +352,7 @@ | |||
| 352 | <file value="Ascend910B4.ini" install_mod="440" entity="true"/> | 352 | <file value="Ascend910B4.ini" install_mod="440" entity="true"/> |
| 353 | <file value="Ascend910B4-1.ini" install_mod="440" entity="true"/> | 353 | <file value="Ascend910B4-1.ini" install_mod="440" entity="true"/> |
| 354 | <file value="Ascend910_9362.ini" install_mod="440" entity="true"/> | 354 | <file value="Ascend910_9362.ini" install_mod="440" entity="true"/> |
| 355 | + <file value="Ascend910_9363.ini" install_mod="440" entity="true"/> | ||
| 355 | <file value="Ascend910_9372.ini" install_mod="440" entity="true"/> | 356 | <file value="Ascend910_9372.ini" install_mod="440" entity="true"/> |
| 356 | <file value="Ascend910_9381.ini" install_mod="440" entity="true"/> | 357 | <file value="Ascend910_9381.ini" install_mod="440" entity="true"/> |
| 357 | <file value="Ascend910_9382.ini" install_mod="440" entity="true"/> | 358 | <file value="Ascend910_9382.ini" install_mod="440" entity="true"/> |
| @@ -20,7 +20,7 @@ cube_core_cnt=20 | |||
| 20 | vector_core_cnt=40 | 20 | vector_core_cnt=40 |
| 21 | ai_cpu_cnt=6 | 21 | ai_cpu_cnt=6 |
| 22 | memory_type= | 22 | memory_type= |
| 23 | -memory_size=34359738368 | 23 | +memory_size=68719476736 |
| 24 | l2_type=0 | 24 | l2_type=0 |
| 25 | l2_size=176160768 | 25 | l2_size=176160768 |
| 26 | l2PageNum=64 | 26 | l2PageNum=64 |
| @@ -0,0 +1,282 @@ | |||
| 1 | +# [Platform Info configuration begin] | ||
| 2 | +#************************************************************************************** | ||
| 3 | +# | ||
| 4 | +[version] | ||
| 5 | +SoC_version=Ascend910_9363 | ||
| 6 | +Short_SoC_version=Ascend910_93 | ||
| 7 | +AIC_version=AIC-C-220 | ||
| 8 | +CCEC_AIC_version=dav-c220-cube | ||
| 9 | +CCEC_AIV_version=dav-c220-vec | ||
| 10 | +CCEC_CUBE_version=dav-c220-cube | ||
| 11 | +CCEC_VECTOR_version=dav-c220-vec | ||
| 12 | +Compiler_aicpu_support_os=true | ||
| 13 | +Arch_type=4 | ||
| 14 | +NpuArch=2201 | ||
| 15 | +Chip_type=5 | ||
| 16 | + | ||
| 17 | +[SoCInfo] | ||
| 18 | +ai_core_cnt=20 | ||
| 19 | +cube_core_cnt=20 | ||
| 20 | +vector_core_cnt=40 | ||
| 21 | +ai_cpu_cnt=6 | ||
| 22 | +memory_type= | ||
| 23 | +memory_size=34359738368 | ||
| 24 | +l2_type=0 | ||
| 25 | +l2_size=176160768 | ||
| 26 | +l2PageNum=64 | ||
| 27 | +normal_stream_num=32768 | ||
| 28 | +normal_stream_depth=2048 | ||
| 29 | +huge_stream_num=0 | ||
| 30 | +huge_stream_depth=0 | ||
| 31 | +ffts_mode=ffts-plus | ||
| 32 | +core_type_list=CubeCore,VectorCore | ||
| 33 | +cube_vector_combine=split | ||
| 34 | +hardware_sync_betweencore=1 | ||
| 35 | +vir_type_list=4,5,10,20 | ||
| 36 | +support_bf16=1 | ||
| 37 | +support_inf_nan=1 | ||
| 38 | + | ||
| 39 | +[AICoreSpec] | ||
| 40 | +cube_freq=1500 | ||
| 41 | +cube_m_size=16 | ||
| 42 | +cube_n_size=16 | ||
| 43 | +cube_k_size=16 | ||
| 44 | +vec_calc_size=128 | ||
| 45 | +l0_a_size=65536 | ||
| 46 | +l0_b_size=65536 | ||
| 47 | +l0_c_size=131072 | ||
| 48 | +l1_size=524288 | ||
| 49 | +fb0_size=2048 | ||
| 50 | +fb1_size=1024 | ||
| 51 | +fb2_size=2048 | ||
| 52 | +fb3_size=2048 | ||
| 53 | +bt_size=1024 | ||
| 54 | +smask_buffer=0 | ||
| 55 | +ub_size=196608 | ||
| 56 | +ubblock_size=32 | ||
| 57 | +ubbank_size=4096 | ||
| 58 | +ubbank_num=64 | ||
| 59 | +ubburst_in_one_block=32 | ||
| 60 | +ubbank_group_num=16 | ||
| 61 | +unzip_engines=4 | ||
| 62 | +unzip_max_ratios=64 | ||
| 63 | +unzip_channels=2 | ||
| 64 | +unzip_is_tight=1 | ||
| 65 | +support_fixpipe=1 | ||
| 66 | +sparsity=1 | ||
| 67 | +padding_size=32 | ||
| 68 | + | ||
| 69 | +[AICoreMemoryRates] | ||
| 70 | +ddr_rate=32 | ||
| 71 | +ddr_read_rate=32 | ||
| 72 | +ddr_write_rate=32 | ||
| 73 | +l2_rate=110 | ||
| 74 | +l2_read_rate=110 | ||
| 75 | +l2_write_rate=86 | ||
| 76 | +l1_to_l0_a_rate=512 | ||
| 77 | +l1_to_l0_b_rate=256 | ||
| 78 | +l1_to_ub_rate=128 | ||
| 79 | +l0_c_to_ub_rate=256 | ||
| 80 | +ub_to_l2_rate=64 | ||
| 81 | +ub_to_ddr_rate=64 | ||
| 82 | +ub_to_l1_rate=128 | ||
| 83 | + | ||
| 84 | +[DtypeMKN] | ||
| 85 | +Default=16,16,16 | ||
| 86 | +DT_INT8=16,32,16 | ||
| 87 | +DT_UINT8=16,32,16 | ||
| 88 | +DT_INT4=16,64,16 | ||
| 89 | +DT_INT2=16,128,16 | ||
| 90 | +DT_UINT2=16,128,16 | ||
| 91 | +DT_UINT1=16,256,16 | ||
| 92 | + | ||
| 93 | +[CPUCache] | ||
| 94 | +AICPUSyncBySW=0 | ||
| 95 | +TSCPUSyncBySW=0 | ||
| 96 | + | ||
| 97 | +[DSARandom] | ||
| 98 | +CounterWorkspaceSize=48 | ||
| 99 | + | ||
| 100 | +[AICoreintrinsicDtypeMap] | ||
| 101 | +0=Intrinsic_vrec|float16,float32 | ||
| 102 | +1=Intrinsic_vadd|float16,float32,int32,int16 | ||
| 103 | +2=Intrinsic_vadds|float16,float32,int32,int16 | ||
| 104 | +3=Intrinsic_vsub|float16,float32,int32,int16 | ||
| 105 | +4=Intrinsic_vdiv|float16,float32 | ||
| 106 | +5=Intrinsic_vrsqrt|float16,float32 | ||
| 107 | +6=Intrinsic_vmul|float16,float32,int32,int16 | ||
| 108 | +7=Intrinsic_vmax|float16,float32,int32,int16 | ||
| 109 | +9=Intrinsic_vmin|float16,float32,int32,int16 | ||
| 110 | +10=Intrinsic_vln|float16,float32 | ||
| 111 | +11=Intrinsic_vexp|float16,float32 | ||
| 112 | +12=Intrinsic_vmuls|float16,float32,int32,int16 | ||
| 113 | +13=Intrinsic_vabs|float16,float32 | ||
| 114 | +14=Intrinsic_vcmax|float16,float32 | ||
| 115 | +15=Intrinsic_vcgmax|float16,float32 | ||
| 116 | +16=Intrinsic_vcmin|float16,float32 | ||
| 117 | +17=Intrinsic_vcgmin|float16,float32 | ||
| 118 | +18=Intrinsic_vcadd|float16,float32 | ||
| 119 | +19=Intrinsic_vcgadd|float16,float32 | ||
| 120 | +20=Intrinsic_vcpadd|float16,float32 | ||
| 121 | +24=Intrinsic_vconv|f322f32r,f322f32f,f322f32c,deq,f322f32a,f322f32z,f322f16,f322f16r,f322f16f,f322f16c,f322f16a,f322f16z,f322f16o,f322s64r,f322s64f,f322s64c,f322s64a,f322s64z,f322s32r,f322s32f,f322s32c,f322s32a,f322s32z,f322s16r,f322s16f,f322s16c,f322s16a,f322s16z,f162f32,f162s32r,f162s32f,f162s32c,f162s32a,f162s32z,f162s16r,f162s16f,f162s16c,f162s16a,f162s16z,f162s8,f162s8r,f162s8f,f162s8c,f162s8a,f162s8z,f162u8,f162u8r,f162u8f,f162u8c,f162u8a,f162u8z,u82f16,s82f16,s162f16,s162f16r,s162f16f,s162f16c,s162f16a,s162f16z,s162f32,s162s8,s162u8,s322f32,s322f32r,s322f32f,s322f32c,s322f32a,s322f32z,s322f16,s322s64,s322s16,s642s32,s642f32r,s642f32f,s642f32c,s642f32a,s642f32z,f322bf16r,f322bf16f,f322bf16c,f322bf16a,f322bf16z,bf162f32,bf162s32r,bf162s32f,bf162s32c,bf162s32a,bf162s32z | ||
| 122 | +25=Intrinsic_mmad|u32u8u8,s32s8s8,s32u8s8,f16f16f16,f32f16f16,f16f16u2,u8,s8,f162f16,f162f32,f16u2,u8s8,h322f32,f32f32f32,f322f32 | ||
 | |||
| 123 | +26=Intrinsic_vor|int16,uint16 | ||
| 124 | +27=Intrinsic_vand|int16,uint16 | ||
| 125 | +28=Intrinsic_vaxpy|f16f16f16,f32f32f32,f32f16f16,float16,float32 | ||
| 126 | +29=Intrinsic_vnot|int16,uint16 | ||
| 127 | +30=Intrinsic_vsqrt|float16,float32 | ||
| 128 | +31=Intrinsic_vrelu|float16,float32,int32 | ||
| 129 | +32=Intrinsic_vmla|f16f16f16,f32f32f32,f32f16f16,float16,float32 | ||
| 130 | +33=Intrinsic_vmadd|float16,float32 | ||
| 131 | +34=Intrinsic_vmaddrelu|float16,float32 | ||
| 132 | +42=Intrinsic_vsel|float16,float32 | ||
| 133 | +43=Intrinsic_vcmp|float16,float32,int16 | ||
🟡 Medium Priority 变更行：Ascend910_9363.ini diff 第 133 行， 受影响的行为/契约： 失败模式：Ascend910_9363 与 9362 共享相同的 注意：workspace 中该文件已被修正为 建议：将第 133 行改为   | |||
| 134 | +45=Intrinsic_vcmpv_ne|float16,float32 | ||
| 135 | +46=Intrinsic_vcmpv_eq|float16,float32,int32 | ||
| 136 | +47=Intrinsic_vcmpv_gt|float16,float32 | ||
| 137 | +48=Intrinsic_vcmpv_ge|float16,float32 | ||
| 138 | +49=Intrinsic_vcmpv_lt|float16,float32 | ||
| 139 | +50=Intrinsic_vcmpv_le|float16,float32 | ||
| 140 | +59=Intrinsic_sqrt|int64,float32 | ||
| 141 | +60=Intrinsic_abs|int64,float32 | ||
| 142 | +61=Intrinsic_bcnt0|uint64 | ||
| 143 | +62=Intrinsic_bcnt1|uint64 | ||
| 144 | +63=Intrinsic_clz|uint64 | ||
| 145 | +64=Intrinsic_max|int64,float32 | ||
| 146 | +65=Intrinsic_min|int64,float32 | ||
| 147 | +67=Intrinsic_vtranspose|uint16,int16,float16 | ||
| 148 | +71=Intrinsic_vlrelu|float16,float32 | ||
| 149 | +73=Intrinsic_vbitsort|float16 | ||
| 150 | +76=Intrinsic_vmrgsort4|float16 | ||
| 151 | +79=Intrinsic_vmulconv|u8f16f16,s8f16f16 | ||
| 152 | +104=Intrinsic_vnchwconv|int16,uint16,int8,uint8,float16,int32,uint32,float32 | ||
| 153 | +108=Intrinsic_vcmpvs_ne|float16,float32 | ||
| 154 | +109=Intrinsic_vcmpvs_eq|float16,float32,int32 | ||
| 155 | +110=Intrinsic_vcmpvs_gt|float16,float32 | ||
| 156 | +111=Intrinsic_vcmpvs_ge|float16,float32 | ||
| 157 | +112=Intrinsic_vcmpvs_lt|float16,float32 | ||
| 158 | +113=Intrinsic_vcmpvs_le|float16,float32 | ||
| 159 | +114=Intrinsic_vmaxs|float16,float32,int32,int16 | ||
| 160 | +115=Intrinsic_vmins|float16,float32,int32,int16 | ||
| 161 | +116=Intrinsic_vmaddrelu|float16,float32 | ||
| 162 | +117=Intrinsic_vgather|int16,uint16,float16,float32,int32,uint32 | ||
| 163 | +118=Intrinsic_vreduce|int16,uint16,float16,float32,int32,uint32 | ||
| 164 | +119=Intrinsic_vshr|uint16,int16,uint32,int32 | ||
| 165 | +120=Intrinsic_vgatherb|u16u16,s16s16,f16f16,u32u32,s32s32,f32f32 | ||
| 166 | +121=Intrinsic_vbrcb|u16u16,s16s16,f16f16,u32u32,s32s32,f32f32 | ||
| 167 | +122=Intrinsic_vbi|float16,float32 | ||
| 168 | +123=Intrinsic_data_move_pad|uint8,int8,uint16,int16,float16,int32,float32,uint32,bfloat16 | ||
| 169 | +124=Intrinsic_vreducev2|int16,uint16,float16,float32,int32,uint32 | ||
| 170 | +125=Intrinsic_vbitsort32|float16,float32 | ||
| 171 | +126=Intrinsic_vmrgsort4v2|float16,float32 | ||
| 172 | +127=Intrinsic_vshl|int16,uint16,int32,uint32 | ||
| 173 | +128=Intrinsic_vcopy|int16,uint16,float16,float32,int32,uint32 | ||
| 174 | +129=Intrinsic_data_move_out2l1|u8,s8,f16,u16,s16,f32,s32,u32 | ||
| 175 | +130=Intrinsic_data_move_out2l0a|u8,s8,f16,u16,s16,f32,s32,u32 | ||
| 176 | +131=Intrinsic_data_move_out2l0b|u8,s8,f16,u16,s16,f32,s32,u32 | ||
| 177 | +132=Intrinsic_data_move_l12l0a|u8,s8,f16,u16,s16,f32,s32,u32 | ||
| 178 | +133=Intrinsic_data_move_l12l0b|u8,s8,f16,u16,s16,f32,s32,u32 | ||
| 179 | +134=Intrinsic_data_move_l12out|u8,s8,f16,u16,s16,f32,s32,u32 | ||
| 180 | +135=Intrinsic_data_move_l12bt|u8,s8,f16,u16,s16,f32,s32,u32 | ||
| 181 | +136=Intrinsic_data_move_transpose_l12l0a|u8,s8,f16,u16,s16,f32,s32,u32 | ||
| 182 | +137=Intrinsic_data_move_transpose_l12l0b|u8,s8,f16,u16,s16,f32,s32,u32 | ||
| 183 | +138=Intrinsic_set_l1|f16,u16,s16,f32,s32,u32 | ||
| 184 | +139=Intrinsic_set_l0a|f16,u16,s16,f32,s32,u32 | ||
| 185 | +140=Intrinsic_set_l0b|f16,u16,s16,f32,s32,u32 | ||
| 186 | +141=Intrinsic_fix_pipe_l0c2l1|f32,s32,f16 | ||
| 187 | +142=Intrinsic_fix_pipe_l0c2out|f32,s32,f16 | ||
| 188 | +143=Intrinsic_fix_pipe_l12fb|u8,s8,f16,u16,s16,f32,s32,u32 | ||
| 189 | +144=Intrinsic_fix_pipe_support_multiple_output|true | ||
| 190 | +145=Intrinsic_fix_pipe_unit_list|pre_conv,pre_act,post_transform | ||
| 191 | +146=Intrinsic_fix_pipe_pre_conv_func_list|requant,dequant,quant,cast | ||
| 192 | +147=Intrinsic_fix_pipe_pre_conv_requant|s322s8,s322u8,s322s4 | ||
| 193 | +148=Intrinsic_fix_pipe_pre_conv_dequant|s322f16 | ||
| 194 | +149=Intrinsic_fix_pipe_pre_conv_quant|f322s8,f322u8,f322s4 | ||
| 195 | +150=Intrinsic_fix_pipe_pre_conv_cast|f322f16,f322bf16 | ||
| 196 | +151=Intrinsic_fix_pipe_pre_act_func_list|normal_relu,scalar_relu,vector_relu | ||
| 197 | +152=Intrinsic_fix_pipe_pre_act_normal_relu|f32,f16,bf16,s8,u8,s4,s32 | ||
| 198 | +153=Intrinsic_fix_pipe_pre_act_scalar_relu|f16,s8,u8,s4 | ||
| 199 | +154=Intrinsic_fix_pipe_pre_act_vector_relu|f16,s8,u8,s4 | ||
| 200 | +155=Intrinsic_fix_pipe_post_transform_func_list|nz2nd | ||
| 201 | +156=Intrinsic_fix_pipe_post_transform_nz2nd|f32,f16,bf16,s8,u8,s4,s32 | ||
| 202 | +157=Intrinsic_data_move_out2l1_nd2nz|u8,s8,f16,bf16,u16,s16,f32,s32,u32 | ||
| 203 | +158=Intrinsic_vaddrelu|int16,float16,float32 | ||
| 204 | + | ||
| 205 | +[CUBECoreintrinsicDtypeMap] | ||
| 206 | +0=Intrinsic_mmad|u32u8u8,s32s8s8,s32u8s8,f16f16f16,f32f16f16,f16f16u2,u8,s8,f162f16,f162f32,f16u2,u8s8 | ||
| 207 | + | ||
| 208 | +[VectorCoreintrinsicDtypeMap] | ||
| 209 | +0=Intrinsic_vrec|float16,float32 | ||
| 210 | +1=Intrinsic_vadd|float16,float32,int32,int16 | ||
| 211 | +2=Intrinsic_vadds|float16,float32,int32,int16 | ||
| 212 | +3=Intrinsic_vsub|float16,float32,int32,int16 | ||
| 213 | +4=Intrinsic_vdiv|float16,float32 | ||
| 214 | +5=Intrinsic_vrsqrt|float16,float32 | ||
| 215 | +6=Intrinsic_vmul|float16,float32,int32,int16 | ||
| 216 | +7=Intrinsic_vmax|float16,float32,int32,int16 | ||
| 217 | +9=Intrinsic_vmin|float16,float32,int32,int16 | ||
| 218 | +10=Intrinsic_vln|float16,float32 | ||
| 219 | +11=Intrinsic_vexp|float16,float32 | ||
| 220 | +12=Intrinsic_vmuls|float16,float32,int32,int16 | ||
| 221 | +13=Intrinsic_vabs|float16,float32 | ||
| 222 | +14=Intrinsic_vcmax|float16,float32 | ||
| 223 | +15=Intrinsic_vcgmax|float16,float32 | ||
| 224 | +16=Intrinsic_vcmin|float16,float32 | ||
| 225 | +17=Intrinsic_vcgmin|float16,float32 | ||
| 226 | +18=Intrinsic_vcadd|float16,float32 | ||
| 227 | +19=Intrinsic_vcgadd|float16,float32 | ||
| 228 | +20=Intrinsic_vcpadd|float16,float32 | ||
| 229 | +24=Intrinsic_vconv|f322f32r,f322f32f,f322f32c,deq,f322f32a,f322f32z,f322f16,f322f16r,f322f16f,f322f16c,f322f16a,f322f16z,f322f16o,f322s64r,f322s64f,f322s64c,f322s64a,f322s64z,f322s32r,f322s32f,f322s32c,f322s32a,f322s32z,f322s16r,f322s16f,f322s16c,f322s16a,f322s16z,f162f32,f162s32r,f162s32f,f162s32c,f162s32a,f162s32z,f162s16r,f162s16f,f162s16c,f162s16a,f162s16z,f162s8,f162s8r,f162s8f,f162s8c,f162s8a,f162s8z,f162u8,f162u8r,f162u8f,f162u8c,f162u8a,f162u8z,u82f16,s82f16,s162f16,s162f16r,s162f16f,s162f16c,s162f16a,s162f16z,s162f32,s162s8,s162u8,s322f32,s322f32r,s322f32f,s322f32c,s322f32a,s322f32z,s322f16,s322s64,s322s16,s642s32,s642f32r,s642f32f,s642f32c,s642f32a,s642f32z,f322bf16r,f322bf16f,f322bf16c,f322bf16a,f322bf16z,bf162f32,bf162s32r,bf162s32f,bf162s32c,bf162s32a,bf162s32z | ||
| 230 | +25=Intrinsic_mmad|u32u8u8,s32s8s8,s32u8s8,f16f16f16,f32f16f16,f16f16u2,u8,s8,f162f16,f162f32,f16u2,u8s8 | ||
| 231 | +26=Intrinsic_vor|int16,uint16 | ||
| 232 | +27=Intrinsic_vand|int16,uint16 | ||
| 233 | +28=Intrinsic_vaxpy|f16f16f16,f32f32f32,f32f16f16,float16,float32 | ||
| 234 | +29=Intrinsic_vnot|int16,uint16 | ||
| 235 | +30=Intrinsic_vsqrt|float16,float32 | ||
| 236 | +31=Intrinsic_vrelu|float16,float32,int32 | ||
| 237 | +32=Intrinsic_vmla|f16f16f16,f32f32f32,f32f16f16,float16,float32 | ||
| 238 | +33=Intrinsic_vmadd|float16,float32 | ||
| 239 | +42=Intrinsic_vsel|float16,float32 | ||
| 240 | +43=Intrinsic_vcmp|float16,float32 | ||
| 241 | +45=Intrinsic_vcmpv_ne|float16,float32 | ||
| 242 | +46=Intrinsic_vcmpv_eq|float16,float32,int32 | ||
| 243 | +47=Intrinsic_vcmpv_gt|float16,float32 | ||
| 244 | +48=Intrinsic_vcmpv_ge|float16,float32 | ||
| 245 | +49=Intrinsic_vcmpv_lt|float16,float32 | ||
| 246 | +50=Intrinsic_vcmpv_le|float16,float32 | ||
| 247 | +59=Intrinsic_sqrt|int64,float32 | ||
| 248 | +60=Intrinsic_abs|int64,float32 | ||
| 249 | +61=Intrinsic_bcnt0|uint64 | ||
| 250 | +62=Intrinsic_bcnt1|uint64 | ||
| 251 | +63=Intrinsic_clz|uint64 | ||
| 252 | +64=Intrinsic_max|int64,float32 | ||
| 253 | +65=Intrinsic_min|int64,float32 | ||
| 254 | +67=Intrinsic_vtranspose|uint16,int16,float16 | ||
| 255 | +71=Intrinsic_vlrelu|float16,float32 | ||
| 256 | +73=Intrinsic_vbitsort|float16 | ||
| 257 | +76=Intrinsic_vmrgsort4|float16 | ||
| 258 | +104=Intrinsic_vnchwconv|int16,uint16,int8,uint8,float16,int32,uint32,float32 | ||
| 259 | +105=Intrinsic_vcopy|int16,uint16,float16,float32,int32,uint32 | ||
| 260 | +108=Intrinsic_vcmpvs_ne|float16,float32 | ||
| 261 | +109=Intrinsic_vcmpvs_eq|float16,float32,int32 | ||
| 262 | +110=Intrinsic_vcmpvs_gt|float16,float32 | ||
| 263 | +111=Intrinsic_vcmpvs_ge|float16,float32 | ||
| 264 | +112=Intrinsic_vcmpvs_lt|float16,float32 | ||
| 265 | +113=Intrinsic_vcmpvs_le|float16,float32 | ||
| 266 | +114=Intrinsic_vmaxs|float16,float32,int32,int16 | ||
| 267 | +115=Intrinsic_vmins|float16,float32,int32,int16 | ||
| 268 | +116=Intrinsic_vmaddrelu|float16,float32 | ||
| 269 | +117=Intrinsic_vgather|int16,uint16,float16,float32,int32,uint32 | ||
| 270 | +118=Intrinsic_vmulconv|u8f16f16,s8f16f16 | ||
| 271 | +121=Intrinsic_vshr|uint16,int16,uint32,int32 | ||
| 272 | +122=Intrinsic_vgatherb|u16u16,s16s16,f16f16,u32u32,s32s32,f32f32 | ||
| 273 | +123=Intrinsic_vbrcb|u16u16,s16s16,f16f16,u32u32,s32s32,f32f32 | ||
| 274 | +124=Intrinsic_vbi|float16,float32 | ||
| 275 | +125=Intrinsic_data_move_pad|uint8,int8,uint16,int16,float16,int32,float32,uint32,bfloat16 | ||
| 276 | +126=Intrinsic_vreduce|int16,uint16,float16,float32,int32,uint32 | ||
| 277 | +127=Intrinsic_vreducev2|int16,uint16,float16,float32,int32,uint32 | ||
| 278 | +128=Intrinsic_vbitsort32|float16,float32 | ||
| 279 | +129=Intrinsic_vmrgsort4v2|float16,float32 | ||
| 280 | +130=Intrinsic_vshl|int16,uint16,int32,uint32 | ||
| 281 | +131=Intrinsic_fix_pipe_l0c2out|f32,s32,f16 | ||
| 282 | +132=Intrinsic_vaddrelu|int16,float16,float32 | ||
🟡 Medium Priority
变更行：Ascend910_9363.ini diff 第 122 行，
25=Intrinsic_mmad|u32u8u8,s32s8s8,s32u8s8,f16f16f16,f32f16f16,f16f16u2,u8,s8,f162f16,f162f32,f16u2,u8s8受影响的行为/契约：
[AICoreintrinsicDtypeMap]中Intrinsic_mmad（矩阵乘加）内在函数的数据类型映射表缺少,h322f32,f32f32f32,f322f32三种类型组合（半精度→float32 累加、纯 float32、float32→float32）。失败模式：9363 与 9362 共享相同的 AIC 版本（AIC-C-220）和架构参数。在同系列所有其他芯片配置（9362、9372、9381、9382、9391、9392）的
[AICoreintrinsicDtypeMap]中，25=Intrinsic_mmad均包含尾部的,h322f32,f32f32f32,f322f32。缺少这些类型组合将导致编译器无法为这些常见精度组合生成正确的矩阵乘加指令，可能引起编译失败或运行时精度回退。注意：workspace 中该文件已被修正，此处报告的是 diff 版本中的问题。
建议：将第 122 行改为在末尾追加
,h322f32,f32f32f32,f322f32，与 9362 及所有其他 93xx 系列芯片配置保持一致。