已合并
dynamic_mx_quant 小尾轴场景性能优化 #10030
季骏创建于 9月8日
dynamic_mx_quant 小尾轴场景性能优化 #10030
已合并
共 2 个文件变更+2084-1160
| @@ -580,8 +580,8 @@ DynamicMxQuantNotTailAxisOptimizeLargeTail<xDtype, yDtype, roundMode, calcMode>: | |||
| 580 | Reg::RegLayout::ZERO, Reg::SatMode::NO_SAT, Reg::MaskMergeMode::ZEROING, AscendC::RoundMode::CAST_TRUNC}; | 580 | Reg::RegLayout::ZERO, Reg::SatMode::NO_SAT, Reg::MaskMergeMode::ZEROING, AscendC::RoundMode::CAST_TRUNC}; |
| 581 | static constexpr Reg::CastTrait castTraitFp32toBF16One = { | 581 | static constexpr Reg::CastTrait castTraitFp32toBF16One = { |
| 582 | Reg::RegLayout::ONE, Reg::SatMode::NO_SAT, Reg::MaskMergeMode::ZEROING, AscendC::RoundMode::CAST_TRUNC}; | 582 | Reg::RegLayout::ONE, Reg::SatMode::NO_SAT, Reg::MaskMergeMode::ZEROING, AscendC::RoundMode::CAST_TRUNC}; |
| 583 | - static constexpr Reg::CastTrait castTraitCublsHalf2Bf16 = {Reg::RegLayout::UNKNOWN, Reg::SatMode::UNKNOWN, | 583 | + static constexpr Reg::CastTrait castTraitCeilAlgHalf2Bf16 = {Reg::RegLayout::UNKNOWN, Reg::SatMode::UNKNOWN, |
| 584 | - Reg::MaskMergeMode::ZEROING, RoundMode::CAST_RINT}; | 584 | + Reg::MaskMergeMode::ZEROING, RoundMode::CAST_RINT}; |
| 585 | 585 | ||
| 586 | Reg::Duplicate(maxEleU16, BF16_MAX_EXP); | 586 | Reg::Duplicate(maxEleU16, BF16_MAX_EXP); |
| 587 | Reg::Duplicate(maxEleU32, FP32_MX_MAX_EXP); | 587 | Reg::Duplicate(maxEleU32, FP32_MX_MAX_EXP); |
| @@ -614,9 +614,9 @@ DynamicMxQuantNotTailAxisOptimizeLargeTail<xDtype, yDtype, roundMode, calcMode>: | |||
| 614 | Reg::And(x0AbsU16, x0U16, absForXU16, pregAll16); | 614 | Reg::And(x0AbsU16, x0U16, absForXU16, pregAll16); |
| 615 | Reg::And(x1AbsU16, x1U16, absForXU16, pregAll16); | 615 | Reg::And(x1AbsU16, x1U16, absForXU16, pregAll16); |
| 616 | if constexpr (IsSame<xDtype, half>::value) { | 616 | if constexpr (IsSame<xDtype, half>::value) { |
| 617 | - Reg::Cast<bfloat16_t, xDtype, castTraitCublsHalf2Bf16>( | 617 | + Reg::Cast<bfloat16_t, xDtype, castTraitCeilAlgHalf2Bf16>( |
| 618 | (Reg::RegTensor<bfloat16_t>&)x0AbsU16, (Reg::RegTensor<float16_t>&)x0AbsU16, pregAll16); | 618 | (Reg::RegTensor<bfloat16_t>&)x0AbsU16, (Reg::RegTensor<float16_t>&)x0AbsU16, pregAll16); |
| 619 | - Reg::Cast<bfloat16_t, xDtype, castTraitCublsHalf2Bf16>( | 619 | + Reg::Cast<bfloat16_t, xDtype, castTraitCeilAlgHalf2Bf16>( |
| 620 | (Reg::RegTensor<bfloat16_t>&)x1AbsU16, (Reg::RegTensor<float16_t>&)x1AbsU16, pregAll16); | 620 | (Reg::RegTensor<bfloat16_t>&)x1AbsU16, (Reg::RegTensor<float16_t>&)x1AbsU16, pregAll16); |
| 621 | } | 621 | } |
| 622 | Reg::Max(x1AbsU16, x1AbsU16, x0AbsU16, pregAll16); | 622 | Reg::Max(x1AbsU16, x1AbsU16, x0AbsU16, pregAll16); |