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优化conv dw确定性计算优化分支进入逻辑 #4898
jiangqi创建于 5月15日
优化conv dw确定性计算优化分支进入逻辑 #4898
已合并
jiangqi创建于 5月15日
从jiangqi2025/ops-nnfix_conv合入到cann/ops-nnmaster
共 2 个文件变更+76-4
Mconv/convolution_backward/op_api/aclnn_convolution_backward.cpp+75-3
@@ -149,6 +149,75 @@ static bool IsPaddingValidFor3D(const aclTensor *weight, const ConvolutionBackwa
149 return true;149 return true;
150}150}
151 151 
152+static bool IsExceedL1For3DDw(const aclTensor *gradOutput, const aclTensor *input,
153+ const aclTensor *weight, const ConvolutionBackwardParams &params) {
154+ constexpr int64_t kDefaultC0 = 16;
155+ constexpr int64_t kFp32BlockReduce = 8;
156+ 
157+ auto gradOutputShape = gradOutput->GetViewShape();
158+ auto weightShape = weight->GetViewShape();
159+ auto inputShape = input->GetViewShape();
160+ 
161+ int64_t wOut = gradOutputShape.GetDim(kWDimNCHWIdx);
162+ int64_t wIn = inputShape.GetDim(kWDimNCHWIdx);
163+ 
164+ int64_t kernelH = weightShape.GetDim(kHDimNCHWIdx);
165+ int64_t strideH = (*params.stride)[kSTRIDEHIdx];
166+ int64_t dilationH = (*params.dilation)[kDILATIONHIdx];
167+ int64_t kernelHDilation = (kernelH - 1) * dilationH + 1;
168+ 
169+ int64_t padU = (*params.padding)[0];
170+ int64_t padD = (params.padding->Size() == 4) ? (*params.padding)[1] : padU;
171+ 
172+ bool strideHRead = (padU == 0 && padD == 0) && (strideH > kernelH && kernelH == 1);
173+ int32_t tempStrideH = static_cast<int32_t>(strideHRead ? kernelH : strideH);
174+ 
175+ DataType gradOutputDtype = gradOutput->GetDataType();
176+ DataType inputDtype = input->GetDataType();
177+ int32_t aDtypeBytes = static_cast<int32_t>(ge::GetSizeByDataType(gradOutputDtype));
178+ int32_t bDtypeBytes = static_cast<int32_t>(ge::GetSizeByDataType(inputDtype));
179+ 
180+ int32_t k0 = kDefaultC0;
181+ int32_t minKL0 = 1;
182+ if (inputDtype == DataType::DT_FLOAT) {
183+ k0 = kFp32BlockReduce;
184+ minKL0 = 2;
185+ }
186+ 
187+ int32_t al1MinSize = kDefaultC0 * k0 * aDtypeBytes * minKL0;
188+ int32_t kl1Min = static_cast<int32_t>(wIn);
189+ int32_t bl1MinSize = 0;
190+ 
191+ if (wOut >= kDefaultC0) {
192+ if (wOut % kDefaultC0 == 0) {
193+ bl1MinSize = kernelHDilation * kl1Min * minKL0 * k0 * bDtypeBytes;
194+ } else {
195+ bl1MinSize = (kernelHDilation + tempStrideH) * kl1Min * minKL0 * k0 * bDtypeBytes;
196+ }
197+ } else {
198+ wOut = std::max(1, static_cast<int32_t>(wOut));
199+ int32_t bl1AlignFactor = (kDefaultC0 + static_cast<int32_t>(wOut) - 1) / static_cast<int32_t>(wOut);
200+ bl1AlignFactor += (kDefaultC0 % wOut != 0) ? 1 : 0;
201+ int64_t raw = (kernelHDilation + (bl1AlignFactor - 1) * tempStrideH) * kl1Min;
202+ int32_t alignedVal = (raw + kDefaultC0 - 1) / kDefaultC0 * kDefaultC0;
203+ bl1MinSize = alignedVal * minKL0 * k0 * bDtypeBytes;
204+ }
205+ 
206+ uint64_t l1Size = 0;
207+ auto platformInfo = GetCurrentPlatformInfo().GetPlatformInfos();
208+ if (platformInfo != nullptr) {
209+ platformInfo->GetLocalMemSize(fe::LocalMemType::L1, l1Size);
210+ }
211+ 
212+ OP_LOGD("IsExceedL1For3DDw: al1=%d, bl1=%d, l1=%lu", al1MinSize, bl1MinSize, l1Size);
213+ return static_cast<uint64_t>(al1MinSize + bl1MinSize) > l1Size;
214+}
215+ 
216+static bool isConv3dDwV2Valid(const aclTensor *gradOutput, const aclTensor *input,
217+ const aclTensor *weight, const ConvolutionBackwardParams &params) {
218+ return IsPaddingValidFor3D(weight, params) && !IsExceedL1For3DDw(gradOutput, input, weight, params);
219+}
220+ 
152static bool ConvBackGoHf32(const ConvolutionBackwardInputTensor& inputTensor, int8_t cubeMathType) {221static bool ConvBackGoHf32(const ConvolutionBackwardInputTensor& inputTensor, int8_t cubeMathType) {
153 auto promoteType = op::PromoteType(inputTensor.input->GetDataType(), inputTensor.weight->GetDataType());222 auto promoteType = op::PromoteType(inputTensor.input->GetDataType(), inputTensor.weight->GetDataType());
154 if (inputTensor.gradOutput != nullptr) {223 if (inputTensor.gradOutput != nullptr) {
@@ -1323,7 +1392,8 @@ static aclnnStatus CalculateConv2DBackward(ConvolutionBackwardInputTensor &input
1323 1392 
1324 int64_t deterministicValue = GetDeterministicValue();1393 int64_t deterministicValue = GetDeterministicValue();
1325 1394 
1326- if (deterministicValue && IsPaddingValidFor3D(inputTensor.weight, params)) {1395+ if (deterministicValue && curArch == NpuArch::DAV_2201 &&
1396+ isConv3dDwV2Valid(inputTensor.gradOutput, inputTensor.input, inputTensor.weight, params)) {
1327 FVector<int64_t> newStride = {1, (*params.stride)[0], (*params.stride)[1]};1397 FVector<int64_t> newStride = {1, (*params.stride)[0], (*params.stride)[1]};
1328 FVector<int64_t> newDilation = {1, (*params.dilation)[0], (*params.dilation)[1]};1398 FVector<int64_t> newDilation = {1, (*params.dilation)[0], (*params.dilation)[1]};
1329 FVector<int64_t> newPadding = {0, 0, (*params.padding)[0], (*params.padding)[0], (*params.padding)[1], (*params.padding)[1]};1399 FVector<int64_t> newPadding = {0, 0, (*params.padding)[0], (*params.padding)[0], (*params.padding)[1], (*params.padding)[1]};
@@ -1402,6 +1472,7 @@ static aclnnStatus CalcConv2DBackTransposeInputGrad(ConvolutionBackwardInputTens
1402static aclnnStatus CalculateConv2DTransposeBackward(ConvolutionBackwardInputTensor &inputTensor,1472static aclnnStatus CalculateConv2DTransposeBackward(ConvolutionBackwardInputTensor &inputTensor,
1403 ConvolutionBackwardResult &outputTensor,1473 ConvolutionBackwardResult &outputTensor,
1404 ConvolutionBackwardParams &params, aclOpExecutor *executor) {1474 ConvolutionBackwardParams &params, aclOpExecutor *executor) {
1475+ auto curArch = GetCurrentPlatformInfo().GetCurNpuArch();
1405 // 950：无2D原型，直接抛错1476 // 950：无2D原型，直接抛错
1406 OP_CHECK(!(Ops::NN::AclnnUtil::IsRegbase()),1477 OP_CHECK(!(Ops::NN::AclnnUtil::IsRegbase()),
1407 OP_LOGE(ACLNN_ERR_INNER_NULLPTR, "No kernel for Conv2DBackwardFiler"),1478 OP_LOGE(ACLNN_ERR_INNER_NULLPTR, "No kernel for Conv2DBackwardFiler"),
@@ -1435,7 +1506,8 @@ static aclnnStatus CalculateConv2DTransposeBackward(ConvolutionBackwardInputTens
1435 const aclTensor *gradWeightFZ = nullptr;1506 const aclTensor *gradWeightFZ = nullptr;
1436 1507
1437 int64_t deterministicValue = GetDeterministicValue();1508 int64_t deterministicValue = GetDeterministicValue();
1438- if (deterministicValue && IsPaddingValidFor3D(inputTensor.weight, params)) {1509+ if (deterministicValue && curArch == NpuArch::DAV_2201 &&
1510+ isConv3dDwV2Valid(inputTensor.input, inputTensor.gradOutput, inputTensor.weight, params)) {
1439 FVector<int64_t> newStride = {1, (*params.stride)[0], (*params.stride)[1]};1511 FVector<int64_t> newStride = {1, (*params.stride)[0], (*params.stride)[1]};
1440 FVector<int64_t> newDilation = {1, (*params.dilation)[0], (*params.dilation)[1]};1512 FVector<int64_t> newDilation = {1, (*params.dilation)[0], (*params.dilation)[1]};
1441 FVector<int64_t> newPadding = {0, 0, (*params.padding)[0], (*params.padding)[0], (*params.padding)[1], (*params.padding)[1]};1513 FVector<int64_t> newPadding = {0, 0, (*params.padding)[0], (*params.padding)[0], (*params.padding)[1], (*params.padding)[1]};
@@ -2668,7 +2740,7 @@ static bool isConv2dTo3d(const ConvolutionBackwardInputTensor &inputTensor,
2668 if (curArch == NpuArch::DAV_2201) {2740 if (curArch == NpuArch::DAV_2201) {
2669 int64_t deterministicValue = GetDeterministicValue();2741 int64_t deterministicValue = GetDeterministicValue();
2670 if (deterministicValue && (*params.outputMask)[1] && (!(*params.outputMask)[0])) {2742 if (deterministicValue && (*params.outputMask)[1] && (!(*params.outputMask)[0])) {
2671- if (!IsPaddingValidFor3D(inputTensor.weight, params)) {2743+ if (!isConv3dDwV2Valid(inputTensor.gradOutput, inputTensor.input, inputTensor.weight, params)) {
2672 return false;2744 return false;
2673 }2745 }
2674 return true;2746 return true;
Mconv/convolution_backward/tests/st/aclnnConvTbcBackward/atk_aclnnConvTbcBackward.json+1-1
此文件变更行数或变更字符数较多，你可以直接 查看源码