LayerNorm类算子VL/UB block去硬编码-ops-nn-AtomGit

已合并

LayerNorm类算子VL/UB block去硬编码 #9042

rk创建于 16 天前从wangpengbo26/ops-nn： ln_VL 合入到 cann/ops-nn： master

LayerNorm类算子VL/UB block去硬编码 #9042

已合并

rk创建于 16 天前

从wangpengbo26/ops-nn ln_VL合入到cann/ops-nn master

收起

norm
- add_layer_norm_quant
  - op_host
    - add_layer_norm_quant_tiling_arch35.cpp
  - op_kernel / arch35
    - add_layer_norm_quant_regbase_helper.h
- layer_norm_grad / op_kernel / arch35
  - layer_norm_grad_api.h
  - layer_norm_grad_base.h
  - layer_norm_grad_grouped_reduce_big_m_impl.h
- layer_norm_grad_v3 / op_kernel / arch35
  - layer_norm_grad_v3_api.h
  - layer_norm_grad_v3_base.h
- layer_norm_v3
  - op_host / arch35
    - layer_norm_v3_regbase_no_reduce_tiling.cpp
    - layer_norm_v3_regbase_norm_not_equal_params_tiling.cpp
    - layer_norm_v3_regbase_two_pass_perf_tiling.cpp
    - layer_norm_v3_tiling_base.cpp
    - layer_norm_v3_welford_multi_reduce_tiling.cpp
  - op_kernel / arch35
    - layer_norm_v3_common.h
- layer_norm_v4
  - op_host
    - layer_norm_v4_regbase_two_pass_perf_tiling.cpp
    - layer_norm_v4_tiling_base.cpp
  - op_kernel / arch35
    - layer_norm_v4_regbase_common.h
    - layer_norm_v4_welford.h

共 17 个文件变更+46-55

Mnorm/add_layer_norm_quant/op_host/add_layer_norm_quant_tiling_arch35.cpp+4-6

Mnorm/add_layer_norm_quant/op_kernel/arch35/add_layer_norm_quant_regbase_helper.h+1-1

	@@ -86,7 +86,7 @@ constexpr AscendC::MicroAPI::DivSpecificMode divHighPrecMode = {
86	true,	86	true,
87	};	87	};
88		88
89	-constexpr uint32_t FLOAT_BLOCK_ELEM = 8;	89	+constexpr uint32_t FLOAT_BLOCK_ELEM = blockSize_ / sizeof(float);
90	constexpr float ZERO_ME = 0.0;	90	constexpr float ZERO_ME = 0.0;
91		91
92	template <HardEvent ent>	92	template <HardEvent ent>

Mnorm/layer_norm_grad/op_kernel/arch35/layer_norm_grad_api.h+5-4

	@@ -17,6 +17,7 @@
17		17
18	#include "kernel_tiling/kernel_tiling.h"	18	#include "kernel_tiling/kernel_tiling.h"
19	#include "kernel_operator.h"	19	#include "kernel_operator.h"
		20	+#include "op_kernel/platform_util.h"
20		21
21	namespace LayerNormGrad {	22	namespace LayerNormGrad {
22	using namespace AscendC;	23	using namespace AscendC;
	@@ -24,8 +25,8 @@ using AscendC::Reg::LoadAlign;
24	using AscendC::Reg::Move;	25	using AscendC::Reg::Move;
25	using AscendC::Reg::StoreAlign;	26	using AscendC::Reg::StoreAlign;
26		27
27	-constexpr static int64_t BLOCK_SIZE = 32;	28	+constexpr static int64_t BLOCK_SIZE = Ops::Base::GetUbBlockSize();
28	-	29	+constexpr static int64_t VECTOR_LENGTH = Ops::Base::GetVRegSize();
29	namespace Arith {	30	namespace Arith {
30	/**	31	/**
31	* Computes the minimum of two 64-bit integers (aicore)	32	* Computes the minimum of two 64-bit integers (aicore)
	@@ -151,7 +152,7 @@ namespace CalcOp {
151	__aicore__ inline void VectorAdd(const LocalTensor<float>& dstTensor, const LocalTensor<float>& src0Tensor,	152	__aicore__ inline void VectorAdd(const LocalTensor<float>& dstTensor, const LocalTensor<float>& src0Tensor,
152	const LocalTensor<float>& src1Tensor, const int64_t count)	153	const LocalTensor<float>& src1Tensor, const int64_t count)
153	{	154	{
154	- constexpr static int64_t VREG_SIZE = 256;	155	+ constexpr static int64_t VREG_SIZE = VECTOR_LENGTH;
155	constexpr static int64_t VL_FP32 = VREG_SIZE / sizeof(float);	156	constexpr static int64_t VL_FP32 = VREG_SIZE / sizeof(float);
156	uint16_t loopTimes = Arith::CeilDiv(static_cast<int64_t>(count * sizeof(float)), static_cast<int64_t>(VREG_SIZE));	157	uint16_t loopTimes = Arith::CeilDiv(static_cast<int64_t>(count * sizeof(float)), static_cast<int64_t>(VREG_SIZE));
157	__VEC_SCOPE__	158	__VEC_SCOPE__
	@@ -202,7 +203,7 @@ __aicore__ inline int64_t GetCacheID(const int64_t idx)
202	__aicore__ inline void UpdateCache(const LocalTensor<float>& dstTensor, const LocalTensor<float>& srcTensor,	203	__aicore__ inline void UpdateCache(const LocalTensor<float>& dstTensor, const LocalTensor<float>& srcTensor,
203	const int64_t cacheID, const int64_t stride, const int64_t count)	204	const int64_t cacheID, const int64_t stride, const int64_t count)
204	{	205	{
205	- constexpr static int64_t VREG_SIZE = 256;	206	+ constexpr static int64_t VREG_SIZE = VECTOR_LENGTH;
206	constexpr static int64_t VL_FP32 = VREG_SIZE / sizeof(float);	207	constexpr static int64_t VL_FP32 = VREG_SIZE / sizeof(float);
207	uint16_t outerLoopTimes = Arith::CeilDiv(count * sizeof(float), VREG_SIZE);	208	uint16_t outerLoopTimes = Arith::CeilDiv(count * sizeof(float), VREG_SIZE);
208	uint16_t innerLoopTimes = cacheID;	209	uint16_t innerLoopTimes = cacheID;

Mnorm/layer_norm_grad/op_kernel/arch35/layer_norm_grad_base.h+6-11

	@@ -21,11 +21,6 @@
21	#include "../../norm_common/reduce_common_regbase.h"	21	#include "../../norm_common/reduce_common_regbase.h"
22	#include "layer_norm_grad_api.h"	22	#include "layer_norm_grad_api.h"
23		23
24	-/**
25	- * Get the block size of unified buffer in bytes
26	- */
27	-__aicore__ inline constexpr uint32_t GetUbBlockSize() { return 32U; }
28	-
29	namespace LayerNormGrad {	24	namespace LayerNormGrad {
30	using namespace AscendC;	25	using namespace AscendC;
31	using AscendC::MicroAPI::LoadDist;	26	using AscendC::MicroAPI::LoadDist;
	@@ -233,8 +228,8 @@ __aicore__ inline void LayerNormGradBase::CopyIn(const LocalTensor<T>& dstTensor
233	params.blockLen = colSize * sizeof(T);	228	params.blockLen = colSize * sizeof(T);
234	params.srcStride = srcStride * sizeof(T) - params.blockLen;	229	params.srcStride = srcStride * sizeof(T) - params.blockLen;
235	params.dstStride = (dstStride * sizeof(T) -	230	params.dstStride = (dstStride * sizeof(T) -
236	- Aligned(static_cast<int64_t>(params.blockLen), static_cast<int64_t>(GetUbBlockSize()))) /	231	+ Aligned(static_cast<int64_t>(params.blockLen), static_cast<int64_t>(BLOCK_SIZE))) /
237	- GetUbBlockSize();	232	+ BLOCK_SIZE;
238	DataCopyPadExtParams<T> padParams;	233	DataCopyPadExtParams<T> padParams;
239	padParams.isPad = false;	234	padParams.isPad = false;
240	DataCopyPad(dstTensor, srcTensor, params, padParams);	235	DataCopyPad(dstTensor, srcTensor, params, padParams);
	@@ -275,8 +270,8 @@ __aicore__ inline void LayerNormGradBase::CopyOut(const GlobalTensor<T>& dstTens
275	params.blockLen = colSize * sizeof(T);	270	params.blockLen = colSize * sizeof(T);
276	params.dstStride = dstStride * sizeof(T) - params.blockLen;	271	params.dstStride = dstStride * sizeof(T) - params.blockLen;
277	params.srcStride = (srcStride * sizeof(T) -	272	params.srcStride = (srcStride * sizeof(T) -
278	- Aligned(static_cast<int64_t>(params.blockLen), static_cast<int64_t>(GetUbBlockSize()))) /	273	+ Aligned(static_cast<int64_t>(params.blockLen), static_cast<int64_t>(BLOCK_SIZE))) /
279	- GetUbBlockSize();	274	+ BLOCK_SIZE;
280	DataCopyPad(dstTensor, srcTensor, params);	275	DataCopyPad(dstTensor, srcTensor, params);
281	}	276	}
282		277
	@@ -285,7 +280,7 @@ __aicore__ inline void LayerNormGradBase::CopyUB2UB(const LocalTensor<float>& ds
285	{	280	{
286	// CopyUB2UB	281	// CopyUB2UB
287	DataCopy(dstTensor, srcTensor,	282	DataCopy(dstTensor, srcTensor,
288	- Aligned(static_cast<int64_t>(count), static_cast<int64_t>(GetUbBlockSize() / sizeof(float))));	283	+ Aligned(static_cast<int64_t>(count), static_cast<int64_t>(BLOCK_SIZE / sizeof(float))));
289	}	284	}
290		285
291	template <typename T>	286	template <typename T>
	@@ -566,7 +561,7 @@ __aicore__ inline void LayerNormGradBase::LastReduceSum(const LocalTensor<float>
566	uint32_t outerLoopStride = stride;	561	uint32_t outerLoopStride = stride;
567	uint32_t innerLoopStride = VL_FP32;	562	uint32_t innerLoopStride = VL_FP32;
568	uint32_t outerLoopDstStride = Aligned(static_cast<int64_t>(foldPoint),	563	uint32_t outerLoopDstStride = Aligned(static_cast<int64_t>(foldPoint),
569	- static_cast<int64_t>(GetUbBlockSize() / sizeof(float)));	564	+ static_cast<int64_t>(BLOCK_SIZE / sizeof(float)));
570		565
571	int64_t foldSrcBOffset = foldPoint * VL_FP32;	566	int64_t foldSrcBOffset = foldPoint * VL_FP32;
572	int64_t tailSrcAOffset = mainFoldLoopTimes * VL_FP32;	567	int64_t tailSrcAOffset = mainFoldLoopTimes * VL_FP32;

Mnorm/layer_norm_grad/op_kernel/arch35/layer_norm_grad_grouped_reduce_big_m_impl.h+2-2

	@@ -536,10 +536,10 @@ __aicore__ inline void LayerNormGradGroupedReduceBigMBackward<T, U>::Init(
536	MainFoldCount = Nloop - BasicBlockLoop;	536	MainFoldCount = Nloop - BasicBlockLoop;
537		537
538	NfactorBlockAligned = Aligned(static_cast<int64_t>(backwardNfactor * sizeof(float)),	538	NfactorBlockAligned = Aligned(static_cast<int64_t>(backwardNfactor * sizeof(float)),
539	- static_cast<int64_t>(GetUbBlockSize())) /	539	+ static_cast<int64_t>(BLOCK_SIZE)) /
540	sizeof(float);	540	sizeof(float);
541	MfactorBlockAligned = Aligned(static_cast<int64_t>(backwardMfactor * sizeof(float)),	541	MfactorBlockAligned = Aligned(static_cast<int64_t>(backwardMfactor * sizeof(float)),
542	- static_cast<int64_t>(GetUbBlockSize())) /	542	+ static_cast<int64_t>(BLOCK_SIZE)) /
543	sizeof(float);	543	sizeof(float);
544		544
545	if (BasicBlockLoop == 0) {	545	if (BasicBlockLoop == 0) {

Mnorm/layer_norm_grad_v3/op_kernel/arch35/layer_norm_grad_v3_api.h+3-2

	@@ -17,11 +17,12 @@
17		17
18	#include "kernel_tiling/kernel_tiling.h"	18	#include "kernel_tiling/kernel_tiling.h"
19	#include "kernel_operator.h"	19	#include "kernel_operator.h"
		20	+#include "op_kernel/platform_util.h"
20		21
21	namespace LayerNormGradV3 {	22	namespace LayerNormGradV3 {
22	using namespace AscendC;	23	using namespace AscendC;
23		24
24	-constexpr static int64_t BLOCK_SIZE = 32;	25	+constexpr static int64_t BLOCK_SIZE = Ops::Base::GetUbBlockSize();
25		26
26	namespace Arith {	27	namespace Arith {
27	/**	28	/**
	@@ -146,4 +147,4 @@ __aicore__ inline void CopyOut1D(const GlobalTensor<T>& dstTensor, const LocalTe
146		147
147	} // namespace LayerNormGradV3	148	} // namespace LayerNormGradV3
148		149
149	-#endif // LAYER_NORM_GRAD_V3_API_	150	+#endif // LAYER_NORM_GRAD_V3_API_

Mnorm/layer_norm_grad_v3/op_kernel/arch35/layer_norm_grad_v3_base.h+1-1

	@@ -24,7 +24,7 @@
24	/**	24	/**
25	* Get the block size of unified buffer in bytes	25	* Get the block size of unified buffer in bytes
26	*/	26	*/
27	-__aicore__ inline constexpr uint32_t GetUbBlockSize() { return 32U; }	27	+__aicore__ inline constexpr uint32_t GetUbBlockSize() { return Ops::Base::GetUbBlockSize(); }
28		28
29	namespace LayerNormGradV3 {	29	namespace LayerNormGradV3 {
30	using namespace AscendC;	30	using namespace AscendC;

Mnorm/layer_norm_v3/op_host/arch35/layer_norm_v3_regbase_no_reduce_tiling.cpp+1-2

	@@ -24,7 +24,6 @@ namespace optiling {
24	static constexpr int64_t LNV3_DOUBLE_BUFFER = 2;	24	static constexpr int64_t LNV3_DOUBLE_BUFFER = 2;
25	static constexpr uint32_t LNV3_MINIMAL_WORKSPACE = 32;	25	static constexpr uint32_t LNV3_MINIMAL_WORKSPACE = 32;
26	static constexpr int64_t LNV3_NUM_TWO = 2;	26	static constexpr int64_t LNV3_NUM_TWO = 2;
27	-static constexpr int64_t LNV3_BLOCK_SIZE = 32;
28	static constexpr int64_t MIN_TILING_BITS_SIZE_PER_CORE = 32768; // 4KB	27	static constexpr int64_t MIN_TILING_BITS_SIZE_PER_CORE = 32768; // 4KB
29	static constexpr int64_t CACHE_LINE_BYTE_LENGTH = 512;	28	static constexpr int64_t CACHE_LINE_BYTE_LENGTH = 512;
30		29
	@@ -92,7 +91,7 @@ ge::graphStatus LayerNormV3RegBaseNoReduceTiling::DoOpTiling()
92	blockNum_ = (a + aBlockFactor - 1) / aBlockFactor;	91	blockNum_ = (a + aBlockFactor - 1) / aBlockFactor;
93	td_.set_aBlockFactor(aBlockFactor);	92	td_.set_aBlockFactor(aBlockFactor);
94		93
95	- int64_t aUbFactor = (commonParams.ubSizePlatForm - LNV3_BLOCK_SIZE * LNV3_NUM_TWO) /	94	+ int64_t aUbFactor = (commonParams.ubSizePlatForm - commonParams.blockSize * LNV3_NUM_TWO) /
96	(LNV3_DOUBLE_BUFFER * (xElemSize * LNV3_NUM_TWO + betaElemSize * LNV3_NUM_TWO) + tmpSize);	95	(LNV3_DOUBLE_BUFFER * (xElemSize * LNV3_NUM_TWO + betaElemSize * LNV3_NUM_TWO) + tmpSize);
97	aUbFactor = (aUbFactor * xElemSize) / CACHE_LINE_BYTE_LENGTH * CACHE_LINE_BYTE_LENGTH / xElemSize;	96	aUbFactor = (aUbFactor * xElemSize) / CACHE_LINE_BYTE_LENGTH * CACHE_LINE_BYTE_LENGTH / xElemSize;
98	td_.set_aUbFactor(aUbFactor);	97	td_.set_aUbFactor(aUbFactor);

Mnorm/layer_norm_v3/op_host/arch35/layer_norm_v3_regbase_norm_not_equal_params_tiling.cpp+5-6

	@@ -20,8 +20,6 @@ namespace optiling {
20	static constexpr int64_t LNV3_DOUBLE_BUFFER = 2;	20	static constexpr int64_t LNV3_DOUBLE_BUFFER = 2;
21	static constexpr uint32_t LNV3_MINIMAL_WORKSPACE = 32;	21	static constexpr uint32_t LNV3_MINIMAL_WORKSPACE = 32;
22	static constexpr int64_t LNV3_NUM_TWO = 2;	22	static constexpr int64_t LNV3_NUM_TWO = 2;
23	-static constexpr int64_t LNV3_BLOCK_SIZE = 32;
24	-static constexpr int64_t LNV3_B32_ALIGN_NUM = LNV3_BLOCK_SIZE / sizeof(float);
25		23
26	int64_t LayerNormV3RegBaseNormNotEqualParamsTiling::GetUBCanUseSize()	24	int64_t LayerNormV3RegBaseNormNotEqualParamsTiling::GetUBCanUseSize()
27	{	25	{
	@@ -48,7 +46,8 @@ int64_t LayerNormV3RegBaseNormNotEqualParamsTiling::GetRowWeight(bool isFullB)
48		46
49	bool LayerNormV3RegBaseNormNotEqualParamsTiling::CanFitInBuffer(int64_t curAxisNum, bool isFullB)	47	bool LayerNormV3RegBaseNormNotEqualParamsTiling::CanFitInBuffer(int64_t curAxisNum, bool isFullB)
50	{	48	{
51	- int64_t curAxisNumAlign = (curAxisNum + LNV3_B32_ALIGN_NUM - 1) / LNV3_B32_ALIGN_NUM * LNV3_B32_ALIGN_NUM;	49	+ int64_t b32AlignNum = commonParams.blockSize / sizeof(float);
		50	+ int64_t curAxisNumAlign = (curAxisNum + b32AlignNum - 1) / b32AlignNum * b32AlignNum;
52	int64_t ubCanUseSize = GetUBCanUseSize();	51	int64_t ubCanUseSize = GetUBCanUseSize();
53	int64_t rowWeight = GetRowWeight(isFullB);	52	int64_t rowWeight = GetRowWeight(isFullB);
54		53
	@@ -102,7 +101,7 @@ uint64_t LayerNormV3RegBaseNormNotEqualParamsTiling::GetTilingKey() const
102		101
103	static inline int64_t CeilDiv(int64_t a, int64_t b) { return b == 0 ? a : (a + b - 1) / b; }	102	static inline int64_t CeilDiv(int64_t a, int64_t b) { return b == 0 ? a : (a + b - 1) / b; }
104		103
105	-static inline int64_t AlignB32(int64_t val) { return CeilDiv(val, LNV3_B32_ALIGN_NUM) * LNV3_B32_ALIGN_NUM; }	104	+static inline int64_t AlignB32(int64_t val, int64_t alignNum) { return CeilDiv(val, alignNum) * alignNum; }
106		105
107	void LayerNormV3RegBaseNormNotEqualParamsTiling::SetBasicTilingParams()	106	void LayerNormV3RegBaseNormNotEqualParamsTiling::SetBasicTilingParams()
108	{	107	{
	@@ -129,7 +128,7 @@ bool LayerNormV3RegBaseNormNotEqualParamsTiling::UpdateTiling()
129	}	128	}
130		129
131	int64_t a = commonParams.colSize;	130	int64_t a = commonParams.colSize;
132	- ubFactorAlignB32 = AlignB32(ubFactor);	131	+ ubFactorAlignB32 = AlignB32(ubFactor, commonParams.blockSize / sizeof(float));
133	formerBlockUbLoops = CeilDiv(blockFactor, ubFactor);	132	formerBlockUbLoops = CeilDiv(blockFactor, ubFactor);
134	tailBlockUbLoops = CeilDiv(a - blockFactor * (blockNum_ - 1), ubFactor);	133	tailBlockUbLoops = CeilDiv(a - blockFactor * (blockNum_ - 1), ubFactor);
135		134
	@@ -146,7 +145,7 @@ bool LayerNormV3RegBaseNormNotEqualParamsTiling::ComputeTiling()
146		145
147	blockFactor = CeilDiv(a, commonParams.coreNum);	146	blockFactor = CeilDiv(a, commonParams.coreNum);
148	blockNum_ = CeilDiv(a, blockFactor);	147	blockNum_ = CeilDiv(a, blockFactor);
149	- ubFactorAlignB32 = AlignB32(ubFactor);	148	+ ubFactorAlignB32 = AlignB32(ubFactor, commonParams.blockSize / sizeof(float));
150		149
151	formerBlockUbLoops = CeilDiv(blockFactor, ubFactor);	150	formerBlockUbLoops = CeilDiv(blockFactor, ubFactor);
152	tailBlockUbLoops = CeilDiv(a - blockFactor * (blockNum_ - 1), ubFactor);	151	tailBlockUbLoops = CeilDiv(a - blockFactor * (blockNum_ - 1), ubFactor);

Mnorm/layer_norm_v3/op_host/arch35/layer_norm_v3_regbase_two_pass_perf_tiling.cpp+4-4

	@@ -20,8 +20,6 @@ namespace optiling {
20	static constexpr int64_t LNV3_DOUBLE_BUFFER = 2;	20	static constexpr int64_t LNV3_DOUBLE_BUFFER = 2;
21	static constexpr uint32_t LNV3_MINIMAL_WORKSPACE = 32;	21	static constexpr uint32_t LNV3_MINIMAL_WORKSPACE = 32;
22	static constexpr int64_t LNV3_NUM_TWO = 2;	22	static constexpr int64_t LNV3_NUM_TWO = 2;
23	-static constexpr int64_t LNV3_BLOCK_SIZE = 32;
24	-static constexpr int64_t LNV3_B32_ALIGN_NUM = LNV3_BLOCK_SIZE / sizeof(float);
25	static constexpr int64_t LNV3_ROW_THRESHOLD = 4096;	23	static constexpr int64_t LNV3_ROW_THRESHOLD = 4096;
26	static constexpr int64_t LNV3_COL_THRESHOLD = 8192;	24	static constexpr int64_t LNV3_COL_THRESHOLD = 8192;
27		25
	@@ -48,7 +46,8 @@ int64_t LayerNormV3RegBaseTwoPassPerfTiling::GetRowWeight()
48		46
49	bool LayerNormV3RegBaseTwoPassPerfTiling::CanFitInBuffer(int64_t curA)	47	bool LayerNormV3RegBaseTwoPassPerfTiling::CanFitInBuffer(int64_t curA)
50	{	48	{
51	- int64_t curAAlign = (curA + LNV3_B32_ALIGN_NUM - 1) / LNV3_B32_ALIGN_NUM * LNV3_B32_ALIGN_NUM;	49	+ int64_t b32AlignNum = commonParams.blockSize / sizeof(float);
		50	+ int64_t curAAlign = (curA + b32AlignNum - 1) / b32AlignNum * b32AlignNum;
52	int64_t ubCanUseSize = GetUBCanUseSize();	51	int64_t ubCanUseSize = GetUBCanUseSize();
53	int64_t rowWeight = GetRowWeight();	52	int64_t rowWeight = GetRowWeight();
54		53
	@@ -130,7 +129,8 @@ ge::graphStatus LayerNormV3RegBaseTwoPassPerfTiling::DoOpTiling()
130	aUbFactor--;	129	aUbFactor--;
131	}	130	}
132	td_.set_aUbFactor(aUbFactor);	131	td_.set_aUbFactor(aUbFactor);
133	- int64_t aUbFactorAlignB32 = (aUbFactor + LNV3_B32_ALIGN_NUM - 1) / LNV3_B32_ALIGN_NUM * LNV3_B32_ALIGN_NUM;	132	+ int64_t b32AlignNum = commonParams.blockSize / sizeof(float);
		133	+ int64_t aUbFactorAlignB32 = (aUbFactor + b32AlignNum - 1) / b32AlignNum * b32AlignNum;
134	td_.set_aUbFactorAlignB32(aUbFactorAlignB32);	134	td_.set_aUbFactorAlignB32(aUbFactorAlignB32);
135		135
136	int64_t formerBlockUbLoops = (aBlockFactor + aUbFactor - 1) / aUbFactor;	136	int64_t formerBlockUbLoops = (aBlockFactor + aUbFactor - 1) / aUbFactor;

Mnorm/layer_norm_v3/op_host/arch35/layer_norm_v3_tiling_base.cpp+4-3

	@@ -16,6 +16,7 @@
16	#include "layer_norm_v3_tiling.h"	16	#include "layer_norm_v3_tiling.h"
17	#include "layer_norm_v3_tiling_arch35.h"	17	#include "layer_norm_v3_tiling_arch35.h"
18	#include "norm/layer_norm/op_host/arch35/layer_norm_tiling_arch35.h"	18	#include "norm/layer_norm/op_host/arch35/layer_norm_tiling_arch35.h"
		19	+#include "op_common/op_host/util/platform_util.h"
19		20
20	using namespace Ops::Base;	21	using namespace Ops::Base;
21		22
	@@ -28,7 +29,6 @@ constexpr size_t OUTPUT_IDX_MEAN = 1;
28	constexpr size_t OUTPUT_IDX_RSTD = 2;	29	constexpr size_t OUTPUT_IDX_RSTD = 2;
29	constexpr float DEFAULT_EPSILON_V3 = 1e-5;	30	constexpr float DEFAULT_EPSILON_V3 = 1e-5;
30	constexpr uint64_t BASE_WSP_SIZE = 32;	31	constexpr uint64_t BASE_WSP_SIZE = 32;
31	-constexpr uint64_t BLOCK_SIZE = 32;
32	constexpr float DEFAULT_EPSILON_V1 = 1e-7;	32	constexpr float DEFAULT_EPSILON_V1 = 1e-7;
33	const gert::Shape g_vec_1_shape = {1};	33	const gert::Shape g_vec_1_shape = {1};
34		34
	@@ -358,15 +358,16 @@ ge::graphStatus LayerNormV3TilingBase::GetShapeAttrsInfo()
358	commonParams.coefficient = static_cast<float>(1.0) / static_cast<float>(commonParams.rowSize);	358	commonParams.coefficient = static_cast<float>(1.0) / static_cast<float>(commonParams.rowSize);
359	uint64_t alignment = 16;	359	uint64_t alignment = 16;
360	uint64_t gammaBetaAlignment = 16;	360	uint64_t gammaBetaAlignment = 16;
		361	+ const uint64_t blockSize = Ops::Base::GetUbBlockSize(context_);
361	if (LN_DTYPE_SIZE_MAP.find(commonParams.tensorDtype) != LN_DTYPE_SIZE_MAP.end()) {	362	if (LN_DTYPE_SIZE_MAP.find(commonParams.tensorDtype) != LN_DTYPE_SIZE_MAP.end()) {
362	- alignment = BLOCK_SIZE / LN_DTYPE_SIZE_MAP.at(commonParams.tensorDtype);	363	+ alignment = blockSize / LN_DTYPE_SIZE_MAP.at(commonParams.tensorDtype);
363	} else {	364	} else {
364	OP_LOGE_FOR_INVALID_DTYPE(context_->GetNodeName(), "x", ToString(commonParams.tensorDtype).c_str(),	365	OP_LOGE_FOR_INVALID_DTYPE(context_->GetNodeName(), "x", ToString(commonParams.tensorDtype).c_str(),
365	"FLOAT, FLOAT16 or BF16");	366	"FLOAT, FLOAT16 or BF16");
366	return ge::GRAPH_FAILED;	367	return ge::GRAPH_FAILED;
367	}	368	}
368	if (LN_DTYPE_SIZE_MAP.find(commonParams.paramDtype) != LN_DTYPE_SIZE_MAP.end()) {	369	if (LN_DTYPE_SIZE_MAP.find(commonParams.paramDtype) != LN_DTYPE_SIZE_MAP.end()) {
369	- gammaBetaAlignment = BLOCK_SIZE / LN_DTYPE_SIZE_MAP.at(commonParams.paramDtype);	370	+ gammaBetaAlignment = blockSize / LN_DTYPE_SIZE_MAP.at(commonParams.paramDtype);
370	} else {	371	} else {
371	OP_LOGE_FOR_INVALID_DTYPE(context_->GetNodeName(), "gamma and beta", ToString(commonParams.paramDtype).c_str(),	372	OP_LOGE_FOR_INVALID_DTYPE(context_->GetNodeName(), "gamma and beta", ToString(commonParams.paramDtype).c_str(),
372	"FLOAT, FLOAT16 or BF16");	373	"FLOAT, FLOAT16 or BF16");

Mnorm/layer_norm_v3/op_host/arch35/layer_norm_v3_welford_multi_reduce_tiling.cpp+1-4

	@@ -25,8 +25,6 @@ constexpr static int64_t AGGREGATION_COUNT = 256;
25	constexpr static uint32_t DEFAULT_WORKSPACE = 16 * 1024 * 1024;	25	constexpr static uint32_t DEFAULT_WORKSPACE = 16 * 1024 * 1024;
26	constexpr static int64_t B32_SIZE = 4;	26	constexpr static int64_t B32_SIZE = 4;
27	constexpr static int64_t B16_SIZE = 2;	27	constexpr static int64_t B16_SIZE = 2;
28	-constexpr static int64_t B32_ALIGN_NUM = 32 / sizeof(float);
29	-constexpr static int64_t BLOCK_BYTES = 32;
30		28
31	static inline int64_t CeilDiv(int64_t a, int64_t b) { return b == 0 ? a : (a + b - 1) / b; }	29	static inline int64_t CeilDiv(int64_t a, int64_t b) { return b == 0 ? a : (a + b - 1) / b; }
32		30
	@@ -132,11 +130,10 @@ ge::graphStatus LayerNormV3WelfordMultiReduceTiling::DoOpTiling()
132	td_.set_nullptrBeta(commonParams.betaNullPtr);	130	td_.set_nullptrBeta(commonParams.betaNullPtr);
133	td_.set_epsilon(commonParams.eps);	131	td_.set_epsilon(commonParams.eps);
134		132
135	- // r0Align: r0 aligned to 32B boundary in elements
136	int64_t tensorTypeSize = (commonParams.tensorDtype == ge::DT_FLOAT16 \|\| commonParams.tensorDtype == ge::DT_BF16) ?	133	int64_t tensorTypeSize = (commonParams.tensorDtype == ge::DT_FLOAT16 \|\| commonParams.tensorDtype == ge::DT_BF16) ?
137	B16_SIZE :	134	B16_SIZE :
138	B32_SIZE;	135	B32_SIZE;
139	- int64_t r0AlignedBytes = CeilDiv(r0 * tensorTypeSize, BLOCK_BYTES) * BLOCK_BYTES;	136	+ int64_t r0AlignedBytes = CeilDiv(r0 * tensorTypeSize, commonParams.blockSize) * commonParams.blockSize;
140	int64_t r0Align = r0AlignedBytes / tensorTypeSize;	137	int64_t r0Align = r0AlignedBytes / tensorTypeSize;
141	td_.set_r0Align(r0Align);	138	td_.set_r0Align(r0Align);
142		139

Mnorm/layer_norm_v3/op_kernel/arch35/layer_norm_v3_common.h+1-1

	@@ -25,7 +25,7 @@ using namespace AscendC;
25	using AscendC::Reg::LoadAlign;	25	using AscendC::Reg::LoadAlign;
26	using AscendC::Reg::StoreAlign;	26	using AscendC::Reg::StoreAlign;
27		27
28	-constexpr static int64_t BLOCK_SIZE = 32;	28	+constexpr static int64_t BLOCK_SIZE = platform::GetUbBlockSize();
29	constexpr static uint32_t FLOAT_BYTES = 4;	29	constexpr static uint32_t FLOAT_BYTES = 4;
30	constexpr static int64_t MAX_STRIDE = 65535;	30	constexpr static int64_t MAX_STRIDE = 65535;
31	constexpr static int64_t DOUBLE_BUFFER = 2;	31	constexpr static int64_t DOUBLE_BUFFER = 2;

Mnorm/layer_norm_v4/op_host/layer_norm_v4_regbase_two_pass_perf_tiling.cpp+4-4

	@@ -19,8 +19,6 @@ namespace optiling {
19	static constexpr int64_t LN_DOUBLE_BUFFER = 2;	19	static constexpr int64_t LN_DOUBLE_BUFFER = 2;
20	static constexpr uint32_t LN_MINIMAL_WORKSPACE = 32;	20	static constexpr uint32_t LN_MINIMAL_WORKSPACE = 32;
21	static constexpr int64_t LN_NUM_TWO = 2;	21	static constexpr int64_t LN_NUM_TWO = 2;
22	-static constexpr int64_t LN_BLOCK_SIZE = 32;
23	-static constexpr int64_t LN_B32_ALIGN_NUM = LN_BLOCK_SIZE / sizeof(float);
24	static constexpr int64_t LN_ROW_THRESHOLD = 4096;	22	static constexpr int64_t LN_ROW_THRESHOLD = 4096;
25	static constexpr int64_t LN_COL_THRESHOLD = 8192;	23	static constexpr int64_t LN_COL_THRESHOLD = 8192;
26		24
	@@ -46,7 +44,8 @@ int64_t LayerNormV4RegBaseTwoPassPerfTiling::GetRowWeight()
46		44
47	bool LayerNormV4RegBaseTwoPassPerfTiling::CanFitInBuffer(int64_t curA)	45	bool LayerNormV4RegBaseTwoPassPerfTiling::CanFitInBuffer(int64_t curA)
48	{	46	{
49	- int64_t curAAlign = (curA + LN_B32_ALIGN_NUM - 1) / LN_B32_ALIGN_NUM * LN_B32_ALIGN_NUM;	47	+ int64_t b32AlignNum = commonParams.blockSize / sizeof(float);
		48	+ int64_t curAAlign = (curA + b32AlignNum - 1) / b32AlignNum * b32AlignNum;
50	int64_t ubCanUseSize = GetUBCanUseSize();	49	int64_t ubCanUseSize = GetUBCanUseSize();
51	int64_t rowWeight = GetRowWeight();	50	int64_t rowWeight = GetRowWeight();
52		51
	@@ -123,7 +122,8 @@ ge::graphStatus LayerNormV4RegBaseTwoPassPerfTiling::DoOpTiling()
123	aUbFactor--;	122	aUbFactor--;
124	}	123	}
125	td_.set_aUbFactor(aUbFactor);	124	td_.set_aUbFactor(aUbFactor);
126	- int64_t aUbFactorAlignB32 = (aUbFactor + LN_B32_ALIGN_NUM - 1) / LN_B32_ALIGN_NUM * LN_B32_ALIGN_NUM;	125	+ int64_t b32AlignNum = commonParams.blockSize / sizeof(float);
		126	+ int64_t aUbFactorAlignB32 = (aUbFactor + b32AlignNum - 1) / b32AlignNum * b32AlignNum;
127	td_.set_aUbFactorAlignB32(aUbFactorAlignB32);	127	td_.set_aUbFactorAlignB32(aUbFactorAlignB32);
128		128
129	int64_t formerBlockUbLoops = (aBlockFactor + aUbFactor - 1) / aUbFactor;	129	int64_t formerBlockUbLoops = (aBlockFactor + aUbFactor - 1) / aUbFactor;

Mnorm/layer_norm_v4/op_host/layer_norm_v4_tiling_base.cpp+1-2

Mnorm/layer_norm_v4/op_kernel/arch35/layer_norm_v4_regbase_common.h+2-1

	@@ -18,12 +18,13 @@
18		18
19	#include "kernel_tiling/kernel_tiling.h"	19	#include "kernel_tiling/kernel_tiling.h"
20	#include "kernel_operator.h"	20	#include "kernel_operator.h"
		21	+#include "../../inc/platform.h"
21		22
22	namespace LayerNormV4 {	23	namespace LayerNormV4 {
23	using namespace AscendC;	24	using namespace AscendC;
24	using AscendC::Reg::StoreAlign;	25	using AscendC::Reg::StoreAlign;
25		26
26	-constexpr static int64_t BLOCK_SIZE = 32;	27	+constexpr static int64_t BLOCK_SIZE = platform::GetUbBlockSize();
27	constexpr static uint32_t FLOAT_BYTES = 4;	28	constexpr static uint32_t FLOAT_BYTES = 4;
28	constexpr static int64_t MAX_STRIDE = 65535;	29	constexpr static int64_t MAX_STRIDE = 65535;
29	constexpr static int64_t DOUBLE_BUFFER = 2;	30	constexpr static int64_t DOUBLE_BUFFER = 2;

Mnorm/layer_norm_v4/op_kernel/arch35/layer_norm_v4_welford.h+1-1

	@@ -352,7 +352,7 @@ private:
352	constexpr static int64_t AGGREGATION_COUNT = 256;	352	constexpr static int64_t AGGREGATION_COUNT = 256;
353	constexpr static uint32_t VL_F32 = VECTOR_REG_WIDTH / sizeof(float);	353	constexpr static uint32_t VL_F32 = VECTOR_REG_WIDTH / sizeof(float);
354	constexpr static uint32_t VL_MEAN = VECTOR_REG_WIDTH / sizeof(M);	354	constexpr static uint32_t VL_MEAN = VECTOR_REG_WIDTH / sizeof(M);
355	- constexpr static int64_t BLOCK_SIZE = 32;	355	+ constexpr static int64_t BLOCK_SIZE = platform::GetUbBlockSize();
356		356
357	// TQue	357	// TQue
358	TQue<QuePosition::VECIN, 1> inQueueX;	358	TQue<QuePosition::VECIN, 1> inQueueX;

	@@ -23,7 +23,6 @@ constexpr int32_t CONST_32 = 32;
23	constexpr uint64_t KERNEL_BUFFER_NUM = 2;	23	constexpr uint64_t KERNEL_BUFFER_NUM = 2;
24	constexpr uint64_t USR_WORKSPACE_SIZE_910B = 1;	24	constexpr uint64_t USR_WORKSPACE_SIZE_910B = 1;
25		25
26	-constexpr uint32_t BLOCK_SIZE = 32;
27	constexpr uint64_t UB_RESERVED_BYTE = 256;	26	constexpr uint64_t UB_RESERVED_BYTE = 256;
28	constexpr int32_t MAX_ROW_STEP = 255;	27	constexpr int32_t MAX_ROW_STEP = 255;
29		28
	@@ -310,8 +309,7 @@ bool AddLayerNormQuantRegbaseTiling::GetShapeInfo()
310	}	309	}
311	this->rows_ = numRow;	310	this->rows_ = numRow;
312	this->cols_ = numCol;	311	this->cols_ = numCol;
313	- this->colsAligned_ = Ops::Base::CeilDiv(this->cols_, static_cast<int64_t>(BLOCK_SIZE)) *	312	+ this->colsAligned_ = Ops::Base::CeilDiv(this->cols_, static_cast<int64_t>(this->blockSize_)) * this->blockSize_;
314	- BLOCK_SIZE; // 32 element aligned
315	this->avgFactor_ = 1.0f / (static_cast<float>(this->cols_));	313	this->avgFactor_ = 1.0f / (static_cast<float>(this->cols_));
316		314
317	OP_LOGW("GetShapeInfo", "[M, N] = [%ld, %ld], dtSizeX1=%lu, avgFactor_=%f", this->rows_, this->cols_,	315	OP_LOGW("GetShapeInfo", "[M, N] = [%ld, %ld], dtSizeX1=%lu, avgFactor_=%f", this->rows_, this->cols_,
	@@ -416,7 +414,7 @@ bool AddLayerNormQuantRegbaseTiling::DoUbTiling()
416		414
417	bool AddLayerNormQuantRegbaseTiling::CheckDynQuantFullLoadTiling()	415	bool AddLayerNormQuantRegbaseTiling::CheckDynQuantFullLoadTiling()
418	{	416	{
419	- int64_t blkFp32Nums = BLOCK_SIZE / sizeof(float);	417	+ int64_t blkFp32Nums = this->blockSize_ / sizeof(float);
420	int64_t tmpBinaryAddNum = (this->cols_ > this->vlFp32_) ? FindFloorPowerTwo(this->cols_) : this->vlFp32_;	418	int64_t tmpBinaryAddNum = (this->cols_ > this->vlFp32_) ? FindFloorPowerTwo(this->cols_) : this->vlFp32_;
421		419
422	int64_t binaryAddUbSize = Ops::Base::CeilDiv((tmpBinaryAddNum / this->vlFp32_), blkFp32Nums) * blkFp32Nums *	420	int64_t binaryAddUbSize = Ops::Base::CeilDiv((tmpBinaryAddNum / this->vlFp32_), blkFp32Nums) * blkFp32Nums *
	@@ -472,7 +470,7 @@ bool AddLayerNormQuantRegbaseTiling::CheckDynQuantWelfordTiling()
472	int64_t tmpSliceNums = sizeof(float) * (this->bufferNum_ * this->outQuantNums_ + 1);	470	int64_t tmpSliceNums = sizeof(float) * (this->bufferNum_ * this->outQuantNums_ + 1);
473		471
474	// COUNT(tmpMean, tmpRstd, tmpMax1, tmpMax2) = 4	472	// COUNT(tmpMean, tmpRstd, tmpMax1, tmpMax2) = 4
475	- int64_t constTmpBufSize = this->bufferNum_ * this->outQuantNums_ * BLOCK_SIZE + BLOCK_SIZE * 4;	473	+ int64_t constTmpBufSize = this->bufferNum_ * this->outQuantNums_ * this->blockSize_ + this->blockSize_ * 4;
476	int64_t ubAvaliable = static_cast<int64_t>(this->ubSize_) - UB_RESERVED_BYTE - constTmpBufSize;	474	int64_t ubAvaliable = static_cast<int64_t>(this->ubSize_) - UB_RESERVED_BYTE - constTmpBufSize;
477		475
478	this->colsPerLoop_ = ubAvaliable / (quantSliceNums + weightSliceNums + elewiseSliceNums + tmpSliceNums);	476	this->colsPerLoop_ = ubAvaliable / (quantSliceNums + weightSliceNums + elewiseSliceNums + tmpSliceNums);
	@@ -499,7 +497,7 @@ bool AddLayerNormQuantRegbaseTiling::CheckDynQuantWelfordTiling()
499		497
500	bool AddLayerNormQuantRegbaseTiling::CheckStcQuantFullLoadTiling()	498	bool AddLayerNormQuantRegbaseTiling::CheckStcQuantFullLoadTiling()
501	{	499	{
502	- int64_t blkFp32Nums = BLOCK_SIZE / sizeof(float);	500	+ int64_t blkFp32Nums = this->blockSize_ / sizeof(float);
503	int64_t tmpBinaryAddNum = (this->cols_ > this->vlFp32_) ? FindFloorPowerTwo(this->cols_) : this->vlFp32_;	501	int64_t tmpBinaryAddNum = (this->cols_ > this->vlFp32_) ? FindFloorPowerTwo(this->cols_) : this->vlFp32_;
504		502
505	int64_t binaryAddUbSize = Ops::Base::CeilDiv((tmpBinaryAddNum / this->vlFp32_), blkFp32Nums) * blkFp32Nums *	503	int64_t binaryAddUbSize = Ops::Base::CeilDiv((tmpBinaryAddNum / this->vlFp32_), blkFp32Nums) * blkFp32Nums *

	@@ -23,7 +23,6 @@ constexpr size_t K_INPUT_IDX_X = 0;
23	constexpr size_t K_INPUT_IDX_NORM_SHAPE = 1;	23	constexpr size_t K_INPUT_IDX_NORM_SHAPE = 1;
24	constexpr size_t K_INPUT_IDX_GAMMA = 2;	24	constexpr size_t K_INPUT_IDX_GAMMA = 2;
25	constexpr size_t K_INPUT_IDX_BETA = 3;	25	constexpr size_t K_INPUT_IDX_BETA = 3;
26	-constexpr uint64_t BLOCK_SIZE = 32;
27	constexpr uint64_t SIZE_OF_FLOAT = 4;	26	constexpr uint64_t SIZE_OF_FLOAT = 4;
28	constexpr uint64_t SIZE_OF_HALF = 2;	27	constexpr uint64_t SIZE_OF_HALF = 2;
29	constexpr uint64_t BASE_WSP_SIZE = 32;	28	constexpr uint64_t BASE_WSP_SIZE = 32;
	@@ -98,7 +97,7 @@ ge::graphStatus GetCommonShapeAttrsInfo(gert::TilingContext* context, uint64_t c
98	commonParams.coefficient = static_cast<float>(1.0) / static_cast<float>(commonParams.rowSize);	97	commonParams.coefficient = static_cast<float>(1.0) / static_cast<float>(commonParams.rowSize);
99	uint64_t alignment = 16;	98	uint64_t alignment = 16;
100	if (DTYPE_SIZE_MAP.find(commonParams.tensorDtype) != DTYPE_SIZE_MAP.end()) {	99	if (DTYPE_SIZE_MAP.find(commonParams.tensorDtype) != DTYPE_SIZE_MAP.end()) {
101	- alignment = BLOCK_SIZE / DTYPE_SIZE_MAP.at(commonParams.tensorDtype);	100	+ alignment = Ops::Base::GetUbBlockSize(context) / DTYPE_SIZE_MAP.at(commonParams.tensorDtype);
102	} else {	101	} else {
103	OP_LOGE_FOR_INVALID_DTYPE(context->GetNodeName(), "x", ToString(commonParams.tensorDtype).c_str(),	102	OP_LOGE_FOR_INVALID_DTYPE(context->GetNodeName(), "x", ToString(commonParams.tensorDtype).c_str(),
104	"FLOAT, FLOAT16 or BF16");	103	"FLOAT, FLOAT16 or BF16");