| 文件 | 最后提交记录 | 最后更新时间 |
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KVM: x86: Introduce support for Zhaoxin PAUSEOPT instruction zhaoxin inclusion category: feature -------------------- This patch adds support for the PAUSEOPT instruction, a Zhaoxin-specific counterpart to Intel’s TPAUSE. Two key differences distinguish PAUSEOPT from TPAUSE: 1. PAUSEOPT uses a delta TSC, calculated as the smaller of (MSR_PAUSEOPT_CONTROL[31:2] << 2) and the EDX:EAX input to PAUSEOPT, subtracted from the current TSC. TPAUSE, by contrast, uses a target TSC computed from the smaller of (MSR_IA32_UMWAIT_CONTROL[31:2] << 2) and its EDX:EAX input. 2. PAUSEOPT currently supports only the C0.1 optimization state, whereas TPAUSE may support both C0.1 and C0.2 states. This feature depends on a pending QEMU patch to recognize PAUSEOPT, as well as the preceding patch in this series that adds Linux kernel support for PAUSEOPT. Guest Behavioral notes: - Writes to the PAUSEOPT/TPAUSE CONTROL MSR are ignored (WRMSR is nopped). - Executing PAUSEOPT or TPAUSE succeeds in entering the optimized state for the duration specified by EDX:EAX. - External interrupts and other defined events will break out of this optimized state. - On any VM exit that interrupts PAUSEOPT, such as an external-interrupt VM exit, if the VMM will resume execution at the instruction following PAUSEOPT, the software must clear the PAUSEOPT_TARGET_TSC field in the VMCS. This cleanup is implemented in this patch. Signed-off-by: LeoLiu-oc <leoliu-oc@zhaoxin.com> | 10 个月前 |